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* ENGR00301869-3 ARM: dts: imx6sx: add adc support on i.MX6SX-SDB platformLuwei Zhou2014-04-16
| | | | | | add adc devicetree support for i.MX6SX-SDB platform. Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ENGR00301869-2 ARM: imx_v7_defconfig: enable ADC in default configLuwei Zhou2014-04-16
| | | | | | Enable ADC driver in default config. Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ENGR00301993 imx6sx: fix kernel can't boot at imx6sx for mfg configFrank Li2014-04-16
| | | | | | Miss imx6sx support. Signed-off-by: Frank Li <Frank.Li@freescale.com>
* ENGR00301290-2 ARM: imx6sx: enable usbphy dummy clockPeter Chen2014-04-16
| | | | | | | | If usbphy is enabled, we need to enable usbphy dump clock, it is the requirement from IC engineer, it is used to guarantee some RTL operation correctness without software operation. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00301290-1 ARM: imx6sx: add usb supportPeter Chen2014-04-16
| | | | | | | - Add usbotg1 and usbotg2 support - Enable usbotg1 at arm2 board Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00301635 ARM: dts: imx6sx: add thermal monitor supportAnson Huang2014-04-16
| | | | | | add thermal monitor support for i.MX6SX. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00301650 ARM: dts: imx6sx: add anatop regulator supportRobin Gong2014-04-16
| | | | | | Enable Anatop regulator on imx6sx. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00301552-3 ARM: imx6sx: Add sgtl5000 support with SSI for 17x17 ARM2 boardNicolin Chen2014-04-16
| | | | | | | This patch adds SSI and sgtl5000 devicetree nodes for imx6sx 17x17 ARM2 board. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00301552-2 ARM: dtsi: Add SSI, ASRC and AUDMUX support for imx6sxNicolin Chen2014-04-16
| | | | | | | | | This patch adds default nodes for ASRC and AUDMUX/SSI for i.MX6 SoloX. It also appends two pin groups for AUDMUX. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00301552-1 ARM: imx6sx: Correct audio_clk in the clock treeNicolin Chen2014-04-16
| | | | | | | | | | | | | We currently has asrc_* clocks in the imx6sx clock tree while actually, according to the Reference Manual, all of them should be named after the audio_clk that controls the external MCLK output from MCLK pad of AUDMUX. Thus fix it along with its gate clock missing in the current clock tree. Meanwhile, this patch also configures a default clock rate for it -- 24MHz. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00301106 PXP: enable PXP in imx6sx-sdbFancy Fang2014-04-16
| | | | | | | Enable PXP module in imx6sx-sdb by default. This make sure PXP can be used in imx6sx-sdb. Signed-off-by: Fancy Fang <chen.fang@freescale.com>
* ENGR00300939 ARM: dts: imx: Add power supply for imx6sx sdb lcdifSandor Yu2014-04-16
| | | | | | | -Change lcd1_reset pin to GPIO mode -Add regulator reg_lcd_3v3 for lcdif Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00300890-2 ARM: imx_v7{_mfg}_defconfig: enable the SPI-NOR frameworkHuang Shijie2014-04-16
| | | | | | enable the SPI NOR framework and the Quadspi driver. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00300430-12 ARM: clk: add a new helper which can re-parent the clockHuang Shijie2014-04-16
| | | | | | | | | | | | | The clock for qspi may be different when different NOR flashes are connected to the board. So the IMX6SX_CLK_QSPI1_SEL/IMX6SX_CLK_QSPI2_SEL should have the re-parent capability. This patch adds a new helper to register the clock which needs the re-parent capability. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00300430-10 ARM: dts: imx6sx-17x17-arm2: enable the qspi2Huang Shijie2014-04-16
| | | | | | enable the qspi2. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00300430-9 ARM: dts: imx6sx: add the properties for QuadSpiHuang Shijie2014-04-16
| | | | | | add the qspi2 property and its pinctrl. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00300745 ARM: dts: imx: Add lcdif support for imx6sx sdb boardSandor Yu2014-04-16
| | | | | | | | -Add pin mux setting for pwm3 in imx6sx.dtsi -Add pwm3 setting for lcdif backlight -Add lcdif1 in imx6sx-sdb.dtsi Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00300439-6 dts: imx6sx: add flexcan stop mode supportDong Aisheng2014-04-16
| | | | | | | Add flexcan stop mode support. The driver does not use alias id now, so remove it too. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00300439-5 can: flexcan: parse stop mode control bits from device treeDong Aisheng2014-04-16
| | | | | | | | | | Starting from IMX6, the flexcan stop mode control bits is SoC specific, move it out of IP driver and parse it from devicetree. It's good from maintain perspective and can avoid adding too many SoC specifi bits in driver but with no IP changes when the IMX SoC series keep growing. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00300439-4 dts: imx6sx-arm2: add flexcan supportDong Aisheng2014-04-16
| | | | | | Add flexcan support Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00300439-3 imx6sx: use auxdata for can transceiver settingDong Aisheng2014-04-16
| | | | | | | We still do not have a framework for can tranceiver settings. Use audxdata as workaround as before. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00300439-2 imx6sx: fix can_sel parent clockDong Aisheng2014-04-16
| | | | | | The default parent of can_sel clock is invalid, need manually set it. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00300439-1 dts: imx6sx-17x17-arm2: add usdhc2 and usdhc4 supportDong Aisheng2014-04-16
| | | | | | add usdhc2 and usdhc4 support Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00300665 ARM: dts: imx6sx-sdb: enable VGEN1 always onRobin Gong2014-04-16
| | | | | | | | On imx6sx-sdb board, there is one level shift between soc and enet phy chip, so need keep VGEN1 always on, else system can't mount NFS. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00300479-2 ARM: dts: imx6sx-sdb: Add pfuze supportRobin Gong2014-04-16
| | | | | | Add pfuze pmic driver support for imx6sx-sdb board Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00300479-1 ARM: dts: imx6sx-17x17-arm2: Add pfuze supportRobin Gong2014-04-16
| | | | | | Add pfuze support on imx6sx-17x17-arm2 board Signed-off-by: Robin Gong <b38343@freescale.com>
* clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes being reparented during clk_set_rate. To avoid breaking existing platforms, all callers of clk_register_mux() are adjusted to pass the new flag. Platform maintainers are encouraged to remove the flag if they wish to allow mux reparenting on set_rate. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Mike Turquette <mturquette@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Chao Xie <xiechao.mail@gmail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: "Emilio López" <emilio@elopez.com.ar> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Andrew Chew <achew@nvidia.com> Cc: Doug Anderson <dianders@chromium.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Tomasz Figa <t.figa@samsung.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: spear-devel@list.st.com Cc: linux-tegra@vger.kernel.org Tested-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Stephen Warren <swarren@nvidia.com> [tegra] Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [sunxi] Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> [Zynq] Signed-off-by: Mike Turquette <mturquette@linaro.org>
* ENGR00300625-2 ARM:dts:imx6sx: add enet_out clk to avoid Last bit is not setFugang Duan2014-04-16
| | | | | | | | enet_out clock is the same as ptp clock, driver use the clock to check whether SOC supply clock to phy or not. So add enet_out clk to imx6sx dts file to avoid receive frame "L" bit is not set. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00300474-2 ARM:dts: Replace phy regulator with gpio control in dtsLuwei Zhou2014-04-16
| | | | | | | Ther is some issue when using regulator contorl phy supply.The patch replace the regulator with gpio direct control. Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ENGR00299593-3 ARM: imx_v7_defconfig: enable max7322 in default configLuwei Zhou2014-04-16
| | | | | | Enable max7322 extention gpio driver in config Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ENGR00299593-2 ARM: dts: imx6sx-17X17-arm2: add max7322 gpio regulator dts ↵Luwei Zhou2014-04-16
| | | | | | | | | | | support FEC on imx6sx-17X17arm2 needs to make PHY work in 1.8v power supply. The 1.8v power supply is controlled by max7322 output0 pin.Enable max7322 dts support and phy regulator on imx6sx-17x17-arm2 platform in this patch. Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ENGR00299180-2 ARM: imx: use dedicated ocram for lpm on i.mx6sxAnson Huang2014-04-16
| | | | | | | On i.MX6SX, there is dedicated ocram for low power mode, dts has different compatible string from mmio-sram, so update it. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00299180-1 ARM: dts: imx6sx: add compatible string for ocram_sAnson Huang2014-04-16
| | | | | | | Add compatible string for ocram_s to separate it from ocram, as this ocram_s is dedicated for low power mode. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00299749 ARM: dts: imx: add pxp v4l2 output support on imx6sx 17x17 arm2 ↵Robby Cai2014-04-16
| | | | | | | | board Add V4L2 output via PxP support Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00299748-2 ARM: dts: imx: add pxp support for imx6sx 17x17 arm2 boardRobby Cai2014-04-16
| | | | | | | - add pxp resources - add a dummy clock for imx6sl/imx6dl Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00299746-5 ARM: dts: imx: add lcdif support on imx6sx 17x17 arm2 boardRobby Cai2014-04-16
| | | | | | | | - add pinmux setting for lcdif - add pwm3 setting for lcdif backlight - add a dummy clock for imx23/imx28/imx60 Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00299746-2 ARM: imx6sx: correct lcdif clocksRobby Cai2014-04-16
| | | | | | | | | | - correct LCDIF pixel clock's parent selection - correct LCDIF PODF clock's parent - Set LCDIF1_PRE_SEL clock parent to PLL5_VIDEO, and set LCDIF1_SEL clock's parent to LCDIF1_PODF. They are set for pixel clock. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00299746-1 ARM: dts: imx6sx: Add PWM supportRobby Cai2014-04-16
| | | | | | add PWM[1-4] support in imx6sx.dtsi Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00300245 ARM: dts: imx6sx: add egalax support for sdb boardFugang Duan2014-04-16
| | | | | | | - Add egalax touch screen support for sdb board. - Correct i2c3 pinctrl. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00292341 imx6sl hwrngDan Douglass2014-04-16
| | | | | | | | | | | | Add hwrng support for i.MX6SL. 1. Add RNG driver. This driver originated as fsl-rngc.c. It has been modified to support device tree. The name has been changed since it supports both b and c variants of RNG. 2. Added clock and compatible info to the device tree data. 3. Added the entry in the options in the Kconfig for hwrng. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
* ENGR00300036 ARM: dts: imx6sx: add fec support for sdb boardFugang Duan2014-04-16
| | | | | | Add fec support for imx6sx-sdb board. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00300074-2 ARM:imx:clk: Remove enet clock gate enabled after system bootFugang Duan2014-04-16
| | | | | | | | After enet bootup, enet disable all clock to save power causes system hang, so there had workaround to enable enet clock gate. Now the issue is fixed, remove the workaround. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00299774 ARM: dts: imx6sx: add sdb board supportAnson Huang2014-04-16
| | | | | | Add i.MX6SX SDB board support. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00299756-3 ARM: imx6q: Add the clock route from external OSC to ESAI clockNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch mainly adds the clock route from external 24.576MHz OSC to internal ESAI clock via analog clock2 PADs on the SoC and pll4 so that ESAI can get an entirely synchronous clock source against CS42888. [ 1, We found if using pll4 to generate a 24.576MHz from inernal 24.0MHz OSC, we would get noise during the audio playback via ESAI->CS42888 even though this generated clock's rate is equal to the external one statistically. It might be resulted from the tiny difference between two clock source, which might be crucial to the sensitive CODEC we use -- CS42888. So we here apply the old 3.0.35 way to feed ESAI the same clock source as CS42888. 2, Ideally, we should use bypass mode for pll4 since we only need to get the raw rate (24.576MHz) while currently bypass mode in clk-pllv3.c isn't entirely supported: The clock rate would be fixed to 24.0MHz if setting to bypass, which would cause child clock get an incorrect rate and the driver who uses the child clock fail to derive a needed clock rate, and it might be dangerous to involve the clk-pllv3.c driver to this fix. Thus we here apply 3.0.35 way provisionally. ] Expected result: anaclk2 0 1 24576000 lvds2_in 0 1 24576000 pll4_sel 0 1 24576000 pll4_audio 0 1 786432000 pll4_post_div 0 1 786432000 pll4_audio_div 0 1 786432000 esai_sel 0 1 786432000 esai_pred 0 1 98304000 esai_podf 0 1 24576000 esai 0 1 24576000 Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00299756-2 ARM: imx6q: Add missing lvds2 clock to the clock treeNicolin Chen2014-04-16
| | | | | | | | | | | | | | | We actually have lvds2 (analog clock2), an I/O clock like lvds1, in the SoC. And this lvds2, along with lvds1, can be used to provide external clock source to the internal pll, such as pll4_audio and pll5_video. So This patch mainly adds the lvds2 to the clock tree and fix its relationship with pll4 accordingly. [ To reduce the risk from code changing. This patch only takes care of pll4 related part. We might later need to add the relationship with pll5 too. ] Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00298052-7 ARM: imx6q: remove function imx6q_lvds_cabc_init()Liu Ying2014-04-16
| | | | | | | | This patch removes the function imx6q_lvds_cabc_init() from the machine layer since we have a dedicated Hannstar CABC driver to control the CABC feature. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00298052-6 ARM: dts: imx6qdl-sabresd: remove lvds_cabc_ctrlLiu Ying2014-04-16
| | | | | | | This patch removes the device tree node lvds_cabc_ctrl, since it is replaced by hannstar_cabc_lvds0 and hannstar_cabc_lvds1. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00298052-5 ARM: dts: imx6qdl-sabresd: support Hannstar CABCLiu Ying2014-04-16
| | | | | | | | | This patch adds a device tree node for the Hannstar CABC function. We currently disable the CABC feature since it makes a panel's backlight unstable when display content varies considerably from time to time. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00298052-4 ARM: dts: imx6qdl-sabreauto: support Hannstar CABCLiu Ying2014-04-16
| | | | | | | | | | | | This patch adds a device tree node for the Hannstar CABC function. The LVDS0 and LVDS1 interfaces of the i.MX6dql Sabreauto platform shares a control pin for the CABC function, but LVDS1's control wire is invalid for the unpopulated resistor R265 on the main board. We currently disable the CABC feature since it makes a panel's backlight unstable when display content varies considerably from time to time. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00298052-3 ARM: imx_v7_defconfig: enable Hannstar CABC driverLiu Ying2014-04-16
| | | | | | This patch enables the Hannstar CABC driver in imx_v7_defconfig. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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