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* ENGR00311992-3 ARM: imx: add cpufreq support for i.mx6sxAnson Huang2014-05-08
| | | | | | | | | | | | | | | Enable cpufreq support for i.MX6SX, currently three setpoints are supported, the freq/volt table are as below: VDDARM_CAP VDDSOC_CAP 996M: 1.250V 1.175V 792M: 1.175V 1.175V 396M: 1.075V 1.175V All upper voltages are 25mV higher then the minimum value defined in datasheet, this 25mV is to cover board level IR drop. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00311992-1 ARM: dts: imx6sx: enable cpufreqAnson Huang2014-05-08
| | | | | | | Add cpufreq related opp info to support cpufreq driver for i.MX6SX. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00311249 ARM: imx: add DDR/IO low power mode for i.mx6sxAnson Huang2014-05-04
| | | | | | | Set DDR/IO to low power mode for i.MX6SX when system enter DSM mode, it can save ~8mW power(from 25mA lower to 19mA). Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00309798 arm: create standalone dts for a9 when m4 is runningRichard Zhu2014-04-30
| | | | | | | | | | Create standalone dts for a9 when m4 is running, since there are some conflictions in the following modules * i2c3 * flexcan1&2 * uart2 Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00303665-3 ARM: imx: add busfreq support for i.MX6SXAnson Huang2014-04-30
| | | | | | | | | Add busfreq support for i.MX6SX, add a new ddr3 asm code and use a busfreq info structure to pass necessary info for low level busfreq change function, the structure will be placed in front of ocram function. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00303665-2 ARM: imx: correct clock tree info on i.MX6SXAnson Huang2014-04-30
| | | | | | | | | | From reference manual, periph2_pre's parent list option 3 is pll4_audio_div, not pll2_198m. And periph2_clk2 's parent of option 1 should be osc, not pll2. Need to mask handshake of mmdc ch0. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00303665-1 ARM: dts: imx6sx: add busfreq supportAnson Huang2014-04-30
| | | | | | Add busfreq support; Signed-off-by: Anson Huang <b20788@freescale.com>
* serial: imx: Remove init() and exit() platform callbacksAlexander Shiyan2014-04-29
| | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00310878-2 ASoC: fsl_esai: cherry-pick from upstream and merge to mainlineShengjiu Wang2014-04-29
| | | | | | | | | | | | | | | cherry-picked commit is 43d24e76b69826ce32292f47060ad78cdd0197fa Header of this commit is "ASoC: fsl_esai: Add ESAI CPU DAI driver", use upstream driver to replace current one. Merged feature is: 1. Move setting of PRRC and PCRC to the end of hw_params, and disable it in shutdown function. 2. Merged the xrun handler with this commit. 3. Use dma init with NO_RESIDUE|NO_DT|COMPAT. 4. Add spba clock for ESAI Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00310878-1 Asoc: fsl: refine clock tree for ESAIShengjiu Wang2014-04-29
| | | | | | | There are three clock for ESAI, esai_extal, esai_ipg, esai_mem. Make the clock for ESAI more clear. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00310785 ARM: imx6sx: dts: Move sound nodes to sub-dts for arm2 boardsNicolin Chen2014-04-28
| | | | | | | | | | | | We disable spdif and sai in imx6sx-*-arm2.dts and only enable them in their sub-dts like imx6sx-17x17-arm2-spdif.dts while we haven't put the sound nodes into the sub-dts because the dependancy between sound and spdif/sai. This would result people get the frequent -517 probe error everytime they insert a new device or module. So this patch puts them to the sub-dts. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00310290 ARM: imx: enable necessary clocks for i.mx6sxAnson Huang2014-04-25
| | | | | | | | On i.MX6SX, when CA9 and CM4 are working together, CA9 can NOT disable those shared modules' clock, so keep those clocks CM4 needs always enabled. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00309977-2 ARM: imx6q/sl: Set SPDIF clock to 22736841HzNicolin Chen2014-04-23
| | | | | | | | | | | | | | | | | | | | Since we no longer use clk_set_rate() in spdif driver, the rate we provide to it on imx6q/sl platforms is no more contented for its supporting sample rates. By setting the clock to 22736841Hz, we can get the sample rates: 48008Hz for 48000Hz 32005Hz for 32000Hz 43859Hz for 44100Hz The results for 48KHz and 32KHz has changed comparing to the previous release, but the one for 44100Hz has a bit lose even though it should be the best we can get based on the current clock rate. If user want to playback a perfect 44100Hz, they need to change the parent clock rate. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00309977-1 ARM: imx6sx: Separate SPDIF and Audio clocksNicolin Chen2014-04-23
| | | | | | | | | | | | | | | | | | | Shawn's patch -- ARM: imx: shared gate support for i.MX clk_gate2 clocko has fixed the problem of clock conflicts due to sharing a same gate. So from now on, we can no longer need to take care the shared gate clock for each audio clock route. Thus this patch separates them by using the new clock registering helper function. And meanwhile, we set a proper rate for each route so as to support each module. For S/PDIF, we use 98304000Hz so that the current driver would perfectly get 32000Hz and 48000Hz sample rate playback support, even though we can only get 43885Hz for 44100Hz sample rate in this way -- If user want to playback 44100Hz group sample rates, they need to change the parent rate. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00309934 ARM: imx_v7_defconfig: Select CONFIG_USB_G_NCM as moduleLi Jun2014-04-23
| | | | | | Enable g_ncm as module for use g_ncm gadget driver. Signed-off-by: Li Jun <b47624@freescale.com>
* ARM: imx: add shared gate clock supportShawn Guo2014-04-22
| | | | | | | | | | | | | | | It's quite common on i.MX that one gate bit controls the gating of multiple clocks, i.e. this is a shared gate. The patch adds the function imx_clk_gate2_shared() for such case. The clocks controlled by the same gate bits should call this function with a pointer to a single share count variable, so that the gate bits will only be operated on the first enabling and the last disabling of these shared gate clocks. Thanks to Gerhard Sittig <gsi@denx.de> for this idea. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ARM: imx: lock is always valid for clk_gate2Shawn Guo2014-04-22
| | | | | | | | The imx specific clk_gate2 always has a valid lock with the clock. So the validation on gate->lock is not really needed. Remove it. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ARM: imx: define struct clk_gate2 on our ownShawn Guo2014-04-22
| | | | | | | | | | | | | The imx clk-gate2 driver implements an i.MX specific gate clock, which has two bits controlling the gate states. While this is a completely separate gate driver from the common clk-gate one, it reuses the common clk_gate structure. Such reusing makes the extending of clk_gate2 clumsy. Let's define struct clk_gate2 on our own to make the driver independent of the common clk-gate one, and ease the clk_gate2 extending at a later time. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00309828 ARM: imx6sx: Add imx6sx-17x17-arm2-mlb.dtb in MakefileLuwei Zhou2014-04-22
| | | | | | Add imx6sx-17x17-arm2-mlb.dtb in devicetree makefile list Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clockIain Paton2014-04-19
| | | | | | | | | | Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite replaces the ecspi5 clock with the i2c4 clock. Handle this difference using cpu_is_imx6dl(). Signed-off-by: Iain Paton <ipaton0@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00309297-2 ARM: imx6sx: Updata asrc_p2p DT bindingsNicolin Chen2014-04-18
| | | | | | | | Since we changed asrc_p2p's DT bindings to support record case, we should update it in imx6sx platform as well. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* futex: Allow architectures to skip futex_atomic_cmpxchg_inatomic() testHeiko Carstens2014-04-17
| | | | | | | | | | | | | | If an architecture has futex_atomic_cmpxchg_inatomic() implemented and there is no runtime check necessary, allow to skip the test within futex_init(). This allows to get rid of some code which would always give the same result, and also allows the compiler to optimize a couple of if statements away. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Finn Thain <fthain@telegraphics.com.au> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Link: http://lkml.kernel.org/r/20140302120947.GA3641@osiris Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* ENGR00309073-1 ASoC: fsl: Naming of p2p item is not properShengjiu Wang2014-04-17
| | | | | | Change the output-rate, output-width to p2p-rate, p2p-width. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00308643 Add imx6sx-19x19-arm2-csi.dtsSandor Yu2014-04-17
| | | | | | | csi camera ov5640 pin conflict with esai and sai in 19x19 arm2 board, add this file to resolve it. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00307014-08 enable vadc in defconfigSandor Yu2014-04-17
| | | | | | Default add vadc to defconfig as module. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00307014-07 ARM: DTS: Add vadc driver in imx6sx dtsSandor Yu2014-04-17
| | | | | | | Add vadc item in imx6sx.dtsi and enable it in 19x19 arm2 and sdb board. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00307014-04 ARM: imx6x: Set vadc clock source from Pll3Sandor Yu2014-04-17
| | | | | | Set vadc clock parent to PLL3 USB OTG. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00309031-2 dts: imx6sx-sdb-emmc: add emmc support on uSDHC4Dong Aisheng2014-04-17
| | | | | | | | | The eMMC interface is shared with uSDHC4 BOOT card slot and the eMMC chip is DNP by default. User needs burn the eMMC chip onto the board manually and do hw rework to enable eMMC signals. We create a new dts imx6sx-sdb-emmc.dts for easy eMMC test after doing hw rework. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00309031-1 dts: imx6sx-sdb: move usdhc4 gpios pins out of hog groupDong Aisheng2014-04-17
| | | | | | | | | | | | | | For imx6sx sdb board, the eMMC interface and uSDHC4 BOOT card slot are shared and the eMMC chip is DNP by default. If burn the eMMC chip onto the board and do hw rework to enable eMMC signals, the cd-gpio and wp-gpios will be reused as eMMC DATA signals. So we'd better move this two gpio pin out of hog group for easy disable this gpio setting in another dts. It's required for the next patch which adds the eMMC support in another dts file. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ARM: dts: imx6sl-evk: Keep VGEN1 regulator always enabledFabio Estevam2014-04-16
| | | | | | | | | | | | | | | | | | | On imx6sl-evk board the VGEN1 regulator powers up the NVCC_1P2V domain of the imx6sl SoC, so we need to keep it always powered. According to imx6sl datasheet the GPIO block has three supplies: NVCC33_IO, NVCC18_IO and NVCC_1P2V and it states that: "All digital I/O supplies (NVCC_xxxx) must be powered under normal conditions whether the associated I/O pins are in use or not" This problem has been observed by the fact that a GPIO connected to an LED could not work when the PMIC driver was enabled. Keeping VGEN1 regulator always enabled fixes the problem. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> (cherry picked from commit d2c3936ebe88ce3cc188d01be0c684884e396293)
* ENGR00308382-2 mcc: enable mcc a9 linux demoRichard Zhu2014-04-16
| | | | | | enable mcc a9 linux demo on imx6sx. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00308060-4 arm: add the mcc supportRichard Zhu2014-04-16
| | | | | | enable imx6sx mcc support. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00308060-2 mcc: implementation mcc on imx6sxRichard Zhu2014-04-16
| | | | | | | | | | | | | | | | | | | - inherited mcc ver 001.002 from vibryd mqx release. - use mu general int4 as the cpu2cpu int (num is 122 at a9 side). - add linux wait_event/wake_up mechanism on the buffer management of share memory - replace wait_event_interruptible### by wait_event###, so the sleep task wouldn't be waken up by reboot or CTRL+C signals. - use the offset address to do the MQX_TO_VIRT and VIRT_TO_MQX exchanges. - regmap_bits_updat can't write 1 to clear the bit-set asr, use regmap_read/write - fix mu irq clear hang issue only do the regmap once in the isr register func, and replace the multi-regmap operations in the kinds of mx6sx mcc related apis by one global imx_mu_reg. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00308060-1 mcc: implementation mcc common on imx6sxRichard Zhu2014-04-16
| | | | | | | | | | | | | - inherited mcc ver 001.002 from vibryd mqx release. - let lwevent related codes mqx specified. - use the offset address to do the MQX_TO_VIRT and VIRT_TO_MQX exchanges. - add some modification in mcc common codes, since all the shm access should be protected by sema4. - double check the list head, and make the recv more robust. Acked-by: Shawn Guo Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00308478 ARM: dts: imx6sx-sdb: Add camera support via the camera adapterRobby Cai2014-04-16
| | | | | | | | | | | | | | Previously we support camera features via mx51 expansion board due to footprint mirror issue on imx6sx sdb board. Now we switch to the adapter board (sch700-28342) to support same features. And the support via mx51 expansion board is deprecated. The changes include - Change the PINs setting for power and reset signal. - Add status flag to avoid the conflict use of LCD1_RESET pin by LCDIF1/CSI. For LCDIF1, it's used as LCD_PWR_EN, for CSI/camera, as RESET pin. Signed-off-by: Robby Cai <r63905@freescale.com>
* ENGR00305366-01 net: fec: disable netfilter in defaultFugang Duan2014-04-16
| | | | | | | Disable netfilter feature for enet can increase 30Mbps bandwidth for imx6sx enet tx path. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00307635-8 ARM: imx6sx: Add SAI support to each board level dtsNicolin Chen2014-04-16
| | | | | | | | | | | SAI has pin conflicts with other moudles on all current boards of Solo X and two sdma event conflicts with UART5. Thus this patch adds new dtbs for SAI cases that occupy the pins and the event IDs of SDMA. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-7 ARM: imx6sx: Update SAI DT bindings and its pinctrl groupsNicolin Chen2014-04-16
| | | | | | | | | | Since we adds clock controls to SAI driver, we should also update its DTB to support it. This patch also appends two essential pinctrl groups to the DTB. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-5 ASoC: imx-wm8962: Add non-SSI cpu dai supportNicolin Chen2014-04-16
| | | | | | | | | | | | The current imx-wm8962 machine driver is designed for SSI as CPU DAI only while as its name we should make the driver more generic to any other CPU DAI on i.MX serires -- ESAI, SAI for example. So this patch makes the driver more general so as to support those non-SSI cases. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-4 ARM: imx6sx: Use 24.576MHz for both SSI and SAI clocksNicolin Chen2014-04-16
| | | | | | | SAI derives its mclk from SSI_CLK, so this patch sets a default value for them. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-3 ARM: imx6sx: Update sdma DT bindingNicolin Chen2014-04-16
| | | | | | | | | Since we've created a new compatible for imx6sx-sdma, we here update its dtsi accordingly. Acked-by: Robin Gong <b38343@freescale.com> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00306955-2 ARM:dts:im6x: Add device tree for IRAM used by low power code.Ranjani Vaidyanathan2014-04-16
| | | | | | | Ensure that fsl,lpm-sram is only set for the memory that is used by low power code in the dts files. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ENGR00306955-1 ARM:imx6x Ensure that both IRAM and OCRAM_S can be mapped in ↵Ranjani Vaidyanathan2014-04-16
| | | | | | | | | | | | | | | | | | | the IRAM page table To prevent a page table walk in the DDR, its required that the low power code use a minimal set of page tables that are stored in IRAM. This IRAM page table needs to have a known virtual address so the mapping needs to be created at the beginning of boot using iotable_init(). This patch fixes the following issues: 1. Ensure that OCRAM_S, IRAM, AIPS1 and AIPS2 can all be mapped by the IMX_IO_P2V macro. 2. Ensure Section mapping is used for the required addresses in the IRAM page table. 3. Obtain the address of the IRAM/OCRAM_S to be used by low power code from the device tree. Since the device tree is not setup early in the boot, use the flat device tree apis to get the address. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ENGR00306653-3: ARM: imx_v7_defconfig enable snvs_pwrkey driver by defaultRobin Gong2014-04-16
| | | | | | enable snvs_pwrkey driver by default Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00306653-1: ARM: dts: imx6sx: add snvs power key nodeRobin Gong2014-04-16
| | | | | | | Put snvs-pwrkey device node in imx6sx.dtsi since all boards with i.mx6sx were designed with ONOFF as power key and it's a function at soc level. Signed-off-by: Robin Gong <b38343@freescale.com>
* Input: tsc2007 - add device tree support.Denis Carikli2014-04-16
| | | | | Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* ENGR00306443-2 dts:Add QoS description in imx6sx dtsLoren HUANG2014-04-16
| | | | | | Add QoS description in imx6sx dts for gc400t QoS adjustment. Signed-off-by: Loren HUANG <b02279@freescale.com>
* ENGR00306443-1 mx6sx:Update the gc400t QoSLoren HUANG2014-04-16
| | | | | | | | | | Per SoC team recommandation, update the gc400t QoS value to write 2 and Read 8. It can improve gpu performance in most case. 3d fill: 165->172Mpixel/s 2d fill: 190->228Mpixel/s Signed-off-by: Loren HUANG <b02279@freescale.com>
* ENGR00298286 arm: dts: imx6qdl: add clock to CAAM.Dan Douglass2014-04-16
| | | | | | | | CAAM depends on the clock used by WEIM interface. This patch supplied by Haung Shijie corrects the issue by adding the clock to the device tree entry for CAAM. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
* ENGR00306569: ARM: dts: imx6sx-sdb: Add mma8451 sensor dts supportLuwei Zhou2014-04-16
| | | | | | | This patch add mma8451 sensor device tree support on i.MX6SX-SDB platform. Signed-off-by: Luwei Zhou <b45643@freescale.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-14 20:48:57 -0400