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* x86, mce: mce_intel.c needs <asm/apic.h>H. Peter Anvin2009-06-17
| | | | | | | | | mce_intel.c uses apic_write() and lapic_get_maxlvt(), and so it needs <asm/apic.h>. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
* x86, mce: rename _64.c files which are no longer 64-bit-specificHidetoshi Seto2009-06-16
| | | | | | | | | Rename files that are no longer 64bit specific: mce_amd_64.c => mce_amd.c mce_intel_64.c => mce_intel.c Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: mce.h cleanupHidetoshi Seto2009-06-16
| | | | | | | | | | Reorder definitions. - static inline dummy mcheck_init() for !CONFIG_X86_MCE - gather defs for exception, threshold handler Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: remove therm_throt.hHidetoshi Seto2009-06-16
| | | | | | | Now all symbols in the header are static. Remove the header. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: remove intel_set_thermal_handler()Hidetoshi Seto2009-06-16
| | | | | | | and make intel_thermal_interrupt() static. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: squash mce_intel.c into therm_throt.cHidetoshi Seto2009-06-16
| | | | | | | move intel_init_thermal() into therm_throt.c Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: unify smp_thermal_interruptHidetoshi Seto2009-06-16
| | | | | | | | | | | | Put common functions into therm_throt.c, modify Makefile. unexpected_thermal_interrupt intel_thermal_interrupt smp_thermal_interrupt intel_set_thermal_handler Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: unify smp_thermal_interrupt, prepareHidetoshi Seto2009-06-16
| | | | | | | Let them in same shape. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: unify smp_thermal_interrupt, prepare mce_intel_64Hidetoshi Seto2009-06-16
| | | | | | | Break smp_thermal_interrupt() into two functions. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: unify smp_thermal_interrupt, prepare p4Hidetoshi Seto2009-06-16
| | | | | | | Remove unused argument regs from handlers, and use inc_irq_stat. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: make mce_disabled booleanHidetoshi Seto2009-06-16
| | | | | | | | | | The mce_disabled on 32bit is a tristate variable [1,0,-1], while 64bit version is boolean [0,1]. This patch makes mce_disabled always boolean, and use mce_p5_enabled to indicate the third state instead. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: unify mce.hHidetoshi Seto2009-06-16
| | | | | | | | | | | | | | There are 2 headers: arch/x86/include/asm/mce.h arch/x86/kernel/cpu/mcheck/mce.h and in the latter small header: #include <asm/mce.h> This patch move all contents in the latter header into the former, and fix all files using the latter to include the former instead. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: sysfs entries for new mce optionsHidetoshi Seto2009-06-16
| | | | | | | | Add sysfs interface for admins who want to tweak these options without rebooting the system. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: rename static variables around triggerHidetoshi Seto2009-06-16
| | | | | | | | | | | | | | | | "trigger" is not straight forward name for valiable that holds name of user mode helper program which triggered by machine check events. This patch renames this valiable and kins to more recognizable names. trigger => mce_helper trigger_argv => mce_helper_argv notify_user => mce_need_notify No functional changes. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: add __read_mostlyHidetoshi Seto2009-06-16
| | | | | | | | Add __read_mostly to data written during setup. Suggested-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: cleanup mce_start()Hidetoshi Seto2009-06-16
| | | | | | | | | | | | Simplify interface of mce_start(): - no_way_out = mce_start(no_way_out, &order); + order = mce_start(&no_way_out); Now Monarch and Subjects share same exit(return) in usual path. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: don't init timer if !mce_availableHidetoshi Seto2009-06-16
| | | | | | | | | In mce_cpu_restart, mce_init_timer is called unconditionally. If !mce_available (e.g. mce is disabled), there are no useful work for timer. Stop running it. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* x86, mce: fix a race condition about mce_callin and no_way_outHuang Ying2009-06-16
| | | | | | | | | | | | | | | | If one CPU has no_way_out == 1, all other CPUs should have no_way_out == 1. But despite global_nwo is read after mce_callin, global_nwo is updated after mce_callin too. So it is possible that some CPU read global_nwo before some other CPU update global_nwo, so that no_way_out == 1 for some CPU, while no_way_out == 0 for some other CPU. This patch fixes this race condition via moving mce_callin updating after global_nwo updating, with a smp_wmb in between. A smp_rmb is added between their reading too. Signed-off-by: Huang Ying <ying.huang@intel.com> Acked-by: Andi Kleen <ak@linux.intel.com> Acked-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next-2.6Linus Torvalds2009-06-16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next-2.6: (30 commits) sparc64: Update defconfig. sparc: Wire up sys_rt_tgsigqueueinfo(). openprom: Squelch useless GCC warning. sparc: replace uses of CPU_MASK_ALL_PTR sparc64: Add proper dynamic ftrace support. sparc: Simplify code using is_power_of_2() routine. sparc: move of_device common code to of_device_common sparc: remove dma-mapping_{32|64}.h sparc: use dma_map_page instead of dma_map_single sparc: add sync_single_for_device and sync_sg_for_device to struct dma_ops sparc: move the duplication in dma-mapping_{32|64}.h to dma-mapping.h p9100: use standard fields for framebuffer physical address and length leo: use standard fields for framebuffer physical address and length cg6: use standard fields for framebuffer physical address and length cg3: use standard fields for framebuffer physical address and length cg14: use standard fields for framebuffer physical address and length bw2: use standard fields for framebuffer physical address and length sparc64: fix and optimize irq distribution sparc64: Use new dynamic per-cpu allocator. sparc64: Only allocate per-cpu areas for possible cpus. ...
| * sparc64: Update defconfig.David S. Miller2009-06-16
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc: Wire up sys_rt_tgsigqueueinfo().David S. Miller2009-06-16
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc: replace uses of CPU_MASK_ALL_PTRStephen Rothwell2009-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU_MASK_ALL is the (deprecated) "all bits set" cpumask, defined as so: #define CPU_MASK_ALL (cpumask_t) { { ... } } Taking the address of such a temporary is questionable at best, unfortunately 321a8e9d (cpumask: add CPU_MASK_ALL_PTR macro) added CPU_MASK_ALL_PTR: #define CPU_MASK_ALL_PTR (&CPU_MASK_ALL) Which formalizes this practice. One day gcc could bite us over this usage (though we seem to have gotten away with it so far). [Description by Rusty Russell] Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Add proper dynamic ftrace support.David S. Miller2009-06-16
| | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Steven Rostedt <rostedt@goodmis.org> Acked-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Simplify code using is_power_of_2() routine.Robert P. J. Day2009-06-16
| | | | | | | | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc: move of_device common code to of_device_commonRobert Reif2009-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves code common to of_device_32.c and of_device_64.c into of_device_common.h and of_device_common.c. The only functional difference is in sparc32 where of_bus_default_map is used in place of of_bus_sbus_map because they are equivelent. There is still room for further code consolidation with some minor refactoring. Boot tested on sparc32 and compile tested on sparc64. Signed-off-by: Robert Reif <reif@earthlink.net> Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc: remove dma-mapping_{32|64}.hFUJITA Tomonori2009-06-16
| | | | | | | | | | | | | | | | | | This modifies SPARC32 to use struct dma_map ops. It means that we can remove dma-mapping_{32|64}.h. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc: use dma_map_page instead of dma_map_singleFUJITA Tomonori2009-06-16
| | | | | | | | | | | | | | | | | | | | | | | | This patch converts dma_map_single and dma_unmap_single to use map_page and unmap_page respectively and removes unnecessary map_single and unmap_single. map_page can be used to implement map_single but the opposite is impossible. Having only dma_map_page in struct dma_ops is enough. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc: add sync_single_for_device and sync_sg_for_device to struct dma_opsFUJITA Tomonori2009-06-16
| | | | | | | | | | | | | | | | | | This adds sync_single_for_device() and sync_sg_for_device() to struct dma_ops in order to unify dma-mpping_{32|64}.h. dma-mpping_32.h needs them though dma-mpping_64.h doesn't. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc: move the duplication in dma-mapping_{32|64}.h to dma-mapping.hFUJITA Tomonori2009-06-16
| | | | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: fix and optimize irq distributionHong H. Pham2009-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | irq_choose_cpu() should compare the affinity mask against cpu_online_map rather than CPU_MASK_ALL, since irq_select_affinity() sets the interrupt's affinity mask to cpu_online_map "and" CPU_MASK_ALL (which ends up being just cpu_online_map). The mask comparison in irq_choose_cpu() will always fail since the two masks are not the same. So the CPU chosen is the first CPU in the intersection of cpu_online_map and CPU_MASK_ALL, which is always CPU0. That means all interrupts are reassigned to CPU0... Distributing interrupts to CPUs in a linearly increasing round robin fashion is not optimal for the UltraSPARC T1/T2. Also, the irq_rover in irq_choose_cpu() causes an interrupt to be assigned to a different processor each time the interrupt is allocated and released. This may lead to an unbalanced distribution over time. A static mapping of interrupts to processors is done to optimize and balance interrupt distribution. For the T1/T2, interrupts are spread to different cores first, and then to strands within a core. The following is some benchmarks showing the effects of interrupt distribution on a T2. The test was done with iperf using a pair of T5220 boxes, each with a 10GBe NIU (XAUI) connected back to back. TCP | Stock Linear RR IRQ Optimized IRQ Streams | 2.6.30-rc5 Distribution Distribution | GBits/sec GBits/sec GBits/sec --------+----------------------------------------- 1 0.839 0.862 0.868 8 1.16 4.96 5.88 16 1.15 6.40 8.04 100 1.09 7.28 8.68 Signed-off-by: Hong H. Pham <hong.pham@windriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Use new dynamic per-cpu allocator.David S. Miller2009-06-16
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Only allocate per-cpu areas for possible cpus.David S. Miller2009-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This gets us real close to the generic implementation of setup_per_cpu_areas() except: 1) We store the per-cpu offset into the trap_block[], whereas the generic code has it's own static array. 2) We have to initialize the %g5 register to hold the boot cpu's per-cpu area offset. 3) The OBP/MDESC cpu info scan is performed at the end. Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Get rid of real_setup_per_cpu_areas().David S. Miller2009-06-16
| | | | | | | | | | | | | | | | | | | | | | Now that we defer the cpu_data() initializations to the end of per-cpu setup, we can get rid of this local hack we had to setup the per-cpu areas eary. This is a necessary step in order to support HAVE_DYNAMIC_PER_CPU_AREA since the per-cpu setup must run when page structs are available. Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Defer cpu_data() setup until end of per-cpu data initialization.David S. Miller2009-06-16
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Make mdesc_fill_in_cpu_data take a cpumask_t pointer.David S. Miller2009-06-16
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc: Call OF and MD cpu scanning explicitly from paging_init()David S. Miller2009-06-16
| | | | | | | | | | | | | | We need to split up the cpu present mask setup from the cpu_data initialization, and this is a first step towards that. Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Refactor MDESC cpu scanning code using an iterator.David S. Miller2009-06-16
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Refactor OBP cpu scanning code using an iterator.David S. Miller2009-06-16
| | | | | | | | | | | | With feedback from Sam Ravnborg. Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Use BUILD_BUG_ON() in trap_init().David S. Miller2009-06-16
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Store per-cpu offset in trap_block[]David S. Miller2009-06-16
| | | | | | | | | | | | | | Surprisingly this actually makes LOAD_PER_CPU_BASE() a little more efficient. Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Move trap_block[] definitions into a new header file.David S. Miller2009-06-16
| | | | | | | | | | | | | | | | Later we're going to want to get at these definitions from asm/percpu.h and that's not possible via cpudata.h because of the set of dependencies the non-trap_block[] stuff has. Signed-off-by: David S. Miller <davem@davemloft.net>
| * sparc64: Reclaim trap_block[]->hdescDavid S. Miller2009-06-16
| | | | | | | | | | | | | | | | | | | | This really isn't necessary at all, a local variable suits the job just fine. This frees up 8 bytes in the trap_block[] that we can use later to store the per-cpu base addresses. Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge branch 'for-linus' of ↵Linus Torvalds2009-06-16
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (27 commits) Blackfin: hook up new rt_tgsigqueueinfo syscall Blackfin: improve CLKIN_HZ config default Blackfin: initial support for ftrace grapher Blackfin: initial support for ftrace Blackfin: enable support for LOCKDEP Blackfin: add preliminary support for STACKTRACE Blackfin: move custom sections into sections.h Blackfin: punt unused/wrong mutex-dec.h Blackfin: add support for irqflags Blackfin: add support for bzip2/lzma compressed kernel images Blackfin: convert Kconfig style to def_bool Blackfin: bf548-ezkit: update smsc911x resources Blackfin: update aedos-ipipe code to upstream 1.10-00 Blackfin: bf537-stamp: update ADP5520 resources Blackfin: bf518f-ezbrd: fix SPI CS for SPI flash Blackfin: define SPI IRQ in board resources Blackfin: do not configure the UART early if on wrong processor Blackfin: fix deadlock in SMP IPI handler Blackfin: fix flag storage for irq funcs Blackfin: push down exception oops checking ...
| * | Blackfin: hook up new rt_tgsigqueueinfo syscallMike Frysinger2009-06-13
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: improve CLKIN_HZ config defaultMike Frysinger2009-06-13
| | | | | | | | | | | | | | | | | | | | | | | | Most boards use 25000000 as the default HZ, so rather than add a whole bunch more boards, make it the default for everyone. This also fixes randconfig builds as there was no default before. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: initial support for ftrace grapherMike Frysinger2009-06-13
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: initial support for ftraceMike Frysinger2009-06-13
| | | | | | | | | | | | | | | | | | Just the basic ftrace support here -- mcount and the ftrace stub. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: enable support for LOCKDEPMike Frysinger2009-06-13
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: add preliminary support for STACKTRACEMike Frysinger2009-06-13
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: move custom sections into sections.hMike Frysinger2009-06-13
| | | | | | | | | | | | | | | | | | | | | The Blackfin arch has a bunch of custom section markings for its on-chip regions, but they aren't declared in the right header. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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