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* perf/x86/ibs: Fix undefined reference to `get_ibs_caps'Robert Richter2012-05-14
| | | | | | | | | | | Fixing i386 allnoconfig built errors: arch/x86/built-in.o: In function `amd_pmu_hw_config': perf_event_amd.c:(.text+0xc3e1): undefined reference to `get_ibs_caps' Reported-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Fix usage of IBS op current countRobert Richter2012-05-09
| | | | | | | | | | | | The value of IbsOpCurCnt rolls over when it reaches IbsOpMaxCnt. Thus, it is reset to zero by hardware. To get the correct count we need to add the max count to it in case we received an ibs sample (valid bit set). Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-13-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Catch spurious interrupts after stopping IBSRobert Richter2012-05-09
| | | | | | | | | | | After disabling IBS there could be still incomming NMIs with samples that even have the valid bit cleared. Mark all this NMIs as handled to avoid spurious interrupt messages. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-12-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Implement workaround for IBS erratum #420Robert Richter2012-05-09
| | | | | | | | | | | | | | | | | | | When disabling ibs there might be the case where hardware continuously generates interrupts. This is described in erratum #420 (Instruction- Based Sampling Engine May Generate Interrupt that Cannot Be Cleared). To avoid this we must clear the counter mask first and then clear the enable bit. This patch implements this. See Revision Guide for AMD Family 10h Processors, Publication #41322. Note: We now keep track of the last read ibs config value which is then used to disable ibs. To update the config value we pass now a pointer to the functions reading it. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-11-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Extend hw period that triggers overflowRobert Richter2012-05-09
| | | | | | | | | | | If the last hw period is too short we might hit the irq handler which biases the results. Thus try to have a max last period that triggers the sw overflow. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-10-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Trigger overflow if remaining period is too smallRobert Richter2012-05-09
| | | | | | | | | | | | | | | | There are cases where the remaining period is smaller than the minimal possible value. In this case the counter is restarted with the minimal period. This is of no use as the interrupt handler will trigger immediately again and most likely hits itself. This biases the results. So, if the remaining period is within the min range, we better do not restart the counter and instead trigger the overflow. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-9-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Rename some variablesRobert Richter2012-05-09
| | | | | | | | | | Simple patch that just renames some variables for better understanding. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-8-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Precise event sampling with IBS for AMD CPUsRobert Richter2012-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for precise event sampling with IBS. There are two counting modes to count either cycles or micro-ops. If the corresponding performance counter events (hw events) are setup with the precise flag set, the request is redirected to the ibs pmu: perf record -a -e cpu-cycles:p ... # use ibs op counting cycle count perf record -a -e r076:p ... # same as -e cpu-cycles:p perf record -a -e r0C1:p ... # use ibs op counting micro-ops Each ibs sample contains a linear address that points to the instruction that was causing the sample to trigger. With ibs we have skid 0. Thus, ibs supports precise levels 1 and 2. Samples are marked with the PERF_EFLAGS_EXACT flag set. In rare cases the rip is invalid when IBS was not able to record the rip correctly. Then the PERF_EFLAGS_EXACT flag is cleared and the rip is taken from pt_regs. V2: * don't drop samples in precise level 2 if rip is invalid, instead support the PERF_EFLAGS_EXACT flag Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/20120502103309.GP18810@erda.amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Take instruction pointer from ibs sampleRobert Richter2012-05-09
| | | | | | | | | | | | | Each IBS sample contains a linear address of the instruction that caused the sample to trigger. This address is more precise than the rip that was taken from the interrupt handler's stack. Update the rip with that address. We use this in the next patch to implement precise-event sampling on AMD systems using IBS. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-6-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Fix frequency profilingRobert Richter2012-05-09
| | | | | | | | | | | | | | | Fixing profiling at a fixed frequency, in this case the freq value and sample period was setup incorrectly. Since sampling periods are adjusted we also allow periods that have lower 4 bits set. Another fix is the setup of the hw counter: If we modify hwc->sample_period, we also need to update hwc->last_period and hwc->period_left. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-5-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Enable ibs op micro-ops counting modeRobert Richter2012-05-09
| | | | | | | | | Allow enabling ibs op micro-ops counting mode. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-4-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf: Pass last sampling period to perf_sample_data_init()Robert Richter2012-05-09
| | | | | | | | | | | | | | | | | | | | | We always need to pass the last sample period to perf_sample_data_init(), otherwise the event distribution will be wrong. Thus, modifiyng the function interface with the required period as argument. So basically a pattern like this: perf_sample_data_init(&data, ~0ULL); data.period = event->hw.last_period; will now be like that: perf_sample_data_init(&data, ~0ULL, event->hw.last_period); Avoids unininitialized data.period and simplifies code. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-3-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* perf/x86-ibs: Fix update of periodRobert Richter2012-05-09
| | | | | | | | | | | The last sw period was not correctly updated on overflow and thus led to wrong distribution of events. We always need to properly initialize data.period in struct perf_sample_data. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-2-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* Merge branch 'perf/x86-ibs' into perf/coreIngo Molnar2012-05-09
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| * perf/x86: Clean up register_nmi_handler() usageIngo Molnar2012-04-25
| | | | | | | | | | | | | | | | | | | | A function name represents the pointer to it - no need to take the address of it. (Fixing this helps us introduce some macro magic around register_nmi_handler() in the future.) Cc: Robert Richter <robert.richter@amd.com> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org>
| * perf/x86: Implement 64-bit counter support for IBSRobert Richter2012-03-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements 64 bit counter support for IBS. The sampling period is no longer limited to the hw counter width. The functions perf_event_set_period() and perf_event_try_update() can be used as generic functions. They can replace similar code that is duplicate across architectures. Signed-off-by: Robert Richter <robert.richter@amd.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Link: http://lkml.kernel.org/r/1323968199-9326-5-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * perf/x86: Implement IBS pmu control opsRobert Richter2012-03-08
| | | | | | | | | | | | | | | | | | | | | | | | Add code to control the IBS pmu. We need to maintain per-cpu states. Since some states are used and changed by the nmi handler, access to these states must be atomic. Signed-off-by: Robert Richter <robert.richter@amd.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Link: http://lkml.kernel.org/r/1323968199-9326-4-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * perf/x86: Implement IBS interrupt handlerRobert Richter2012-03-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements code to handle ibs interrupts. If ibs data is available a raw perf_event data sample is created and sent back to the userland. This patch only implements the storage of ibs data in the raw sample, but this could be extended in a later patch by generating generic event data such as the rip from the ibs sampling data. Signed-off-by: Robert Richter <robert.richter@amd.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Link: http://lkml.kernel.org/r/1323968199-9326-3-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * perf/x86: Implement IBS event configurationRobert Richter2012-03-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements perf configuration for AMD IBS. The IBS pmu is selected using the type attribute in sysfs. There are two types of ibs pmus, for instruction fetch (IBS_FETCH) and for instruction execution (IBS_OP): /sys/bus/event_source/devices/ibs_fetch/type /sys/bus/event_source/devices/ibs_op/type Except for the sample period IBS can only be set up with raw config values and raw data samples. The event attributes for the syscall should be programmed like this (IBS_FETCH): type = get_pmu_type("/sys/bus/event_source/devices/ibs_fetch/type"); memset(&attr, 0, sizeof(attr)); attr.type = type; attr.sample_type = PERF_SAMPLE_CPU | PERF_SAMPLE_RAW; attr.config = IBS_FETCH_CONFIG_DEFAULT; This implementation does not yet support 64 bit counters. It is limited to the hardware counter bit width which is 20 bits. 64 bit support can be added later. Signed-off-by: Robert Richter <robert.richter@amd.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Link: http://lkml.kernel.org/r/1323968199-9326-2-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | Merge branch 'tip/perf/core-4' of ↵Ingo Molnar2012-05-07
|\ \ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace into perf/core
| * | ftrace/x86: Use asm/kprobes.h instead of linux/kprobes.hSteven Rostedt2012-05-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_KPROBES is not set, then linux/kprobes.h will not include asm/kprobes.h needed by x86/ftrace.c for the BREAKPOINT macro. The x86/ftrace.c file should just include asm/kprobes.h as it does not need the rest of kprobes. Reported-by: Ingo Molnar <mingo@elte.hu> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
| * | ftrace/x86: Remove the complex ftrace NMI handling codeSteven Rostedt2012-04-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As ftrace function tracing would require modifying code that could be executed in NMI context, which is not stopped with stop_machine(), ftrace had to do a complex algorithm with various stages of setup and memory barriers to make it work. With the new breakpoint method, this is no longer required. The changes to the code can be done without any problem in NMI context, as well as without stop machine altogether. Remove the complex code as it is no longer needed. Also, a lot of the notrace annotations could be removed from the NMI code as it is now safe to trace them. With the exception of do_nmi itself, which does some special work to handle running in the debug stack. The breakpoint method can cause NMIs to double nest the debug stack if it's not setup properly, and that is done in do_nmi(), thus that function must not be traced. (Note the arch sh may want to do the same) Cc: Paul Mundt <lethal@linux-sh.org> Cc: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
| * | ftrace/x86: Have arch x86_64 use breakpoints instead of stop machineSteven Rostedt2012-04-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This method changes x86 to add a breakpoint to the mcount locations instead of calling stop machine. Now that iret can be handled by NMIs, we perform the following to update code: 1) Add a breakpoint to all locations that will be modified 2) Sync all cores 3) Update all locations to be either a nop or call (except breakpoint op) 4) Sync all cores 5) Remove the breakpoint with the new code. 6) Sync all cores [ Added updates that Masami suggested: Use unlikely(modifying_ftrace_code) in int3 trap to keep kprobes efficient. Don't use NOTIFY_* in ftrace handler in int3 as it is not a notifier. ] Cc: H. Peter Anvin <hpa@zytor.com> Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
* | | perf: Remove PERF_COUNTERS config optionRobert Richter2012-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renaming remaining PERF_COUNTERS options into PERF_EVENTS. Think we can get rid of PERF_COUNTERS now. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333643084-26776-5-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* | | perf/x86: Fix cmpxchg() usage in amd_put_event_constraints()Robert Richter2012-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the return value of cmpxchg() is used to match an event. The change removes the duplicate event comparison and traverses the list until an event was removed. This also fixes the following warning: arch/x86/kernel/cpu/perf_event_amd.c:170: warning: value computed is not used Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333643084-26776-3-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* | | perf: Trivial cleanup of duplicate codeRobert Richter2012-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | Removing duplicate code. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333643084-26776-2-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* | | sparc32,leon: add notify_cpu_starting()Yong Zhang2012-04-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise cpu_active_mask will not set, which lead to other issue. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Signed-off-by: Konrad Eisele <konrad@gaisler.com> Reviewed-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2012-04-21
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull "ARM: SoC fixes" from Olof Johansson: * at91, ux500, imx, omap and bcmring: - at91 fixes for =m driver build issues, irqdomain fixes and config dependency fixes - ux500 kconfig dependency fixes and a smp wakeup bugfix - imx idle bugfix and build fix due to irq domain changes - omap uart pinmux fixes, softreset regression revert and misc fixes - bcmring build error regression fix * ux500 and imx had some small defconfig updates in this branch * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (27 commits) ARM: bcmring: fix UART declarations ARM: imx: Fix imx5 idle logic bug ARM: imx27-dt: Fix build due to removal of irq_domain_add_simple() ARM: imx_v4_v5_defconfig: Add support for CONFIG_REGULATOR_FIXED_VOLTAGE ARM: OMAP1: DMTIMER: fix broken timer clock source selection ARM: OMAP: serial: Fix the ocp smart idlemode handling bug ARM: OMAP2+: UART: Fix incorrect population of default uart pads ARM: OMAP: sram: fix BUG in dpll code for !PM case dmaengine: Kconfig: fix Atmel at_hdmac entry USB: gadget/at91_udc: add gpio_to_irq() function to vbus interrupt USB: ohci-at91: change annotations for probe/remove functions leds-atmel-pwm.c: Make pwmled_probe() __devinit ARM: at91: fix at91sam9261ek Ethernet dm9000 irq ARM: at91: fix rm9200ek flash size ARM: at91: remove empty at91_init_serial function ARM: at91: fix typo in at91_pmc_base assembly declaration ARM: at91: Export at91_matrix_base ARM: at91: Export at91_pmc_base ARM: at91: Export at91_ramc_base ARM: at91: Export at91_st_base ...
| * \ \ Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixesOlof Johansson2012-04-19
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here is another fixes series for AT91 designed for 3.4-rc. We experienced some issues while compiling some drivers as modules: Joachim has corrected several of them. We may reduce this number of exported values by reworking some drivers, in the future. Some drivers are also modified here, I would like to keep them in the series as the modifications are really related with our recent move to irqdomains or simply related with compiler annotations. I keep dmaengine Kconfig modification in this "fixes" series. The DMA driver will not be available for 9x5 SoC family otherwise. * tag 'at91-fixes' of git://github.com/at91linux/linux-at91: dmaengine: Kconfig: fix Atmel at_hdmac entry USB: gadget/at91_udc: add gpio_to_irq() function to vbus interrupt USB: ohci-at91: change annotations for probe/remove functions leds-atmel-pwm.c: Make pwmled_probe() __devinit ARM: at91: fix at91sam9261ek Ethernet dm9000 irq ARM: at91: fix rm9200ek flash size ARM: at91: remove empty at91_init_serial function ARM: at91: fix typo in at91_pmc_base assembly declaration ARM: at91: Export at91_matrix_base ARM: at91: Export at91_pmc_base ARM: at91: Export at91_ramc_base ARM: at91: Export at91_st_base
| | * | | ARM: at91: fix at91sam9261ek Ethernet dm9000 irqJean-Christophe PLAGNIOL-VILLARD2012-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | You need to setup the dm9000 irq via gpio_to_irq() since d0fbda9add (ARM: at91/gpio: drop PIN_BASE). Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> [3.2+]
| | * | | ARM: at91: fix rm9200ek flash sizeJean-Christophe PLAGNIOL-VILLARD2012-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The flash size is 8MiB. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | | ARM: at91: remove empty at91_init_serial functionJoachim Eastwood2012-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The real function is long gone and the empty one will generate warnings when configured without Atmel serial: arch/arm/mach-at91/at91rm9200_devices.c:1176: warning: 'struct at91_uart_config' declared inside parameter list arch/arm/mach-at91/at91rm9200_devices.c:1176: warning: its scope is only this definition or declaration, which is probably not what you want Signed-off-by: Joachim Eastwood <joachim.eastwood@jotron.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | | ARM: at91: fix typo in at91_pmc_base assembly declarationNicolas Ferre2012-04-16
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | | ARM: at91: Export at91_matrix_baseJoachim Eastwood2012-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | at91_matrix_* macro's are used by at91_udc usb gadget driver, which can be built as module, therefore we need to export the variable containing matrix base address. Signed-off-by: Joachim Eastwood <joachim.eastwood@jotron.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | | ARM: at91: Export at91_pmc_baseJoachim Eastwood2012-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit b55149529d26 (ARM: at91/PMC: make register base soc independent) building atmel_usba_udc as a module fails with following message ERROR: "at91_pmc_base" [drivers/usb/gadget/atmel_usba_udc.ko] undefined! make[1]: *** [__modpost] Error 1 make: *** [modules] Error 2 Export symbol to allow driver to be built as a module again. Signed-off-by: Joachim Eastwood <joachim.eastwood@jotron.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | | ARM: at91: Export at91_ramc_baseJoachim Eastwood2012-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit f363c40 (ARM: at91: make sdram/ddr register base soc independent) building at91_cf as a module fails with: ERROR: "at91_ramc_base" [drivers/pcmcia/at91_cf.ko] undefined! make[1]: *** [__modpost] Error 1 make: *** [modules] Error 2 Export at91_ramc_base symbol to allow drivers using at91_ramc_* functions to be built as modules again. Signed-off-by: Joachim Eastwood <joachim.eastwood@jotron.com> [nicolas.ferre@atmel.com: modify slightly commit message] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | | ARM: at91: Export at91_st_baseJoachim Eastwood2012-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit 5e9cf5e (ARM: at91: make ST (System Timer) soc independent) building at91rm9200_wdt as a module fails with following message ERROR: "at91_st_base" [drivers/watchdog/at91rm9200_wdt.ko] undefined! make[1]: *** [__modpost] Error 1 make: *** [modules] Error 2 Export symbol to allow wdt driver to be built as a module again. Signed-off-by: Joachim Eastwood <joachim.eastwood@jotron.com> [nicolas.ferre@atmel.com: use EXPORT_SYMBOL_GPL()] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | | Merge branch 'fixes-for-arm-soc-20120416' of ↵Olof Johansson2012-04-19
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes * 'fixes-for-arm-soc-20120416' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: update defconfig ARM: ux500: Fix unmet direct dependency ARM: ux500: wake secondary cpu via resched
| | * | | | ARM: ux500: update defconfigLinus Walleij2012-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some new drivers and changed Kconfig dependencies for the v3.4 kernel affecting the U8500 defconfig: - The SOC config options are now brought in by default - No need to explicitly select misc devices anymore - I2C is selected by default - We now have support for charging from the AB8500 so compile in this - The regulator framework needs to be explictly selected Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ux500: Fix unmet direct dependencyLee Jones2012-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent change to a Kconfig configuration saw MACH_U8500 remove TPS6105X selection. In doing so Kconfig stopped selecting REGULATORS, which is still required. This patch sees UX500_SOC_DB8500 explicitly select it instead. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ux500: wake secondary cpu via reschedJonas Aaberg2012-04-11
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wake secondary cpu via resched instead of "Unknown IPI message 0x1" Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Reviewed-by: Rickard Andersson <rickard.andersson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | Merge tag 'v3.4-rc3-imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6 ↵Olof Johansson2012-04-19
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into fixes ARM i.MX misc fixes for -rc * tag 'v3.4-rc3-imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6: ARM: imx: Fix imx5 idle logic bug ARM: imx27-dt: Fix build due to removal of irq_domain_add_simple() ARM: imx_v4_v5_defconfig: Add support for CONFIG_REGULATOR_FIXED_VOLTAGE
| | * | | | ARM: imx: Fix imx5 idle logic bugRobert Lee2012-04-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The imx5_idle() check of the tzic_eanble_wake() return value uses incorrect (inverted) logic causing all attempt to idle to fail. Signed-off-by: Robert Lee <rob.lee@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | | ARM: imx27-dt: Fix build due to removal of irq_domain_add_simple()Fabio Estevam2012-04-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 6b783f7c (irq_domain: Remove irq_domain_add_simple() replaced irq_domain_add_simple with irq_domain_add_legacy() Implement this conversion so that imx27-dt can be built again. Reported-by: Chris Ball <cjb@laptop.org> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | | ARM: imx_v4_v5_defconfig: Add support for CONFIG_REGULATOR_FIXED_VOLTAGEFabio Estevam2012-04-18
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for CONFIG_REGULATOR_FIXED_VOLTAGE. Without this option the mx27_3ds cannot have the external Ethernet functional due to the need of smsc regulators. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | Merge tag 'omap-fixes-for-v3.4-rc3' of ↵Olof Johansson2012-04-19
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fix regression for bad uart muxing and oops when PM is not set. Revert one softreset regression and few other minor fixes. * tag 'omap-fixes-for-v3.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP1: DMTIMER: fix broken timer clock source selection ARM: OMAP: serial: Fix the ocp smart idlemode handling bug ARM: OMAP2+: UART: Fix incorrect population of default uart pads ARM: OMAP: sram: fix BUG in dpll code for !PM case ARM: OMAP2/3: VENC hwmods: Remove OCPIF_SWSUP_IDLE flag from VENC slave interface ARM: OMAP2+: hwmod: Revert "ARM: OMAP2+: hwmod: Make omap_hwmod_softreset wait for reset status" ARM: OMAP2+: hwmod: add softreset delay field and OMAP4 data ARM: OMAP1: mux: add missing include
| | * | | | ARM: OMAP1: DMTIMER: fix broken timer clock source selectionPaul Walmsley2012-04-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMTIMER source selection on OMAP1 is broken. omap1_dm_timer_set_src() tries to use __raw_{read,write}l() to read from and write to physical addresses, but those functions take virtual addresses. sparse caught this: arch/arm/mach-omap1/timer.c:50:13: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap1/timer.c:50:13: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap1/timer.c:50:13: got unsigned int arch/arm/mach-omap1/timer.c:52:9: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap1/timer.c:52:9: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap1/timer.c:52:9: got unsigned int Fix by using omap_{read,writel}(), just like the other users of the MOD_CONF_CTRL_1 register in the OMAP1 codebase. Of course, in the long term, removing omap_{read,write}l() is the appropriate thing to do; but this will take some work to do this cleanly. Looks like this was caused by 97933d6 (ARM: OMAP1: dmtimer: conversion to platform devices) that dangerously moved code and changed it in the same patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com> Cc: stable@vger.kernel.org [tony@atomide.com: updated comments to include the breaking commit] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | ARM: OMAP: serial: Fix the ocp smart idlemode handling bugSantosh Shilimkar2012-04-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current serial UART code, while fidling with ocp idlemode bits, forget about the smart idle wakeup bit even if it is supported by UART IP block. This will lead to missing the module wakeup on OMAP's where the smart idle wakeup is supported. This was the root cause of the console sluggishness issue, I have been observing on OMAP4 devices and also can be potential reason for some other UART wakeup issues. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Kevin Hilman <khilman@ti.com> Acked-by: Govindraj.R <govindraj.raja@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Cc: stable@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | ARM: OMAP2+: UART: Fix incorrect population of default uart padsGovindraj.R2012-04-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit (7496ba3 ARM: OMAP2+: UART: Add default mux for all uarts) wrongly added muxing of default pads for all uarts. This causes breakage on multiple boards using uart pins for alternate functions. For example, on zoom3 random oopses can be seen with nfsroot as the smsc911x ethernet FIFO timings on GPMC bus are controlled by gpmc_wait2 and gpmc_wait3 pins. This means we can't mux these pads to uart4 functionality as commit 7496ba3 was doing. Not all boards tend to use all uarts and most of unused uart pins are muxed for other purpose. This commit breaks the modules which where trying to use unused uart pins on their boards. So remove the default pad muxing. Note that this is not a complete fix, as we now rely on bootloader set muxing for the uart wake-up events. Further patching is needed to enable wake-up events for uarts that are already muxed to uart mode. Cc: Felipe Balbi <balbi@ti.com> Cc: Kevin Hilman <khilman@ti.com> Acked-by: Russ Dill <russ.dill@gmail.com> Reported-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> [tony@atomide.com: updated comments to describe oops on zoom3] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | ARM: OMAP: sram: fix BUG in dpll code for !PM caseGrazvydas Ignotas2012-04-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | _omap3_sram_configure_core_dpll is called when SDRC is reprogrammed, which is done regardless of CONFIG_PM setting, so we always need it's setup code too. Without this, we hit a BUG() on OMAP3 when kernel is built without CONFIG_PM: Reprogramming SDRC clock to 332000000 Hz ------------[ cut here ]------------ kernel BUG at arch/arm/plat-omap/sram.c:342! Internal error: Oops - BUG: 0 [#1] ARM ... [<c001c694>] (omap3_configure_core_dpll+0x68/0x6c) from [<c001b2dc>] (omap3_core_dpll_m2_set_rate+0x1) [<c001b2dc>] (omap3_core_dpll_m2_set_rate+0x138/0x1b0) from [<c001a478>] (omap2_clk_set_rate+0x14/0x2) [<c001a478>] (omap2_clk_set_rate+0x14/0x20) from [<c001c9dc>] (clk_set_rate+0x54/0x74) [<c001c9dc>] (clk_set_rate+0x54/0x74) from [<c022b9c8>] (omap_sdrc_init+0x70/0x90) [<c022b9c8>] (omap_sdrc_init+0x70/0x90) from [<c022f178>] (omap3pandora_init+0x11c/0x164) [<c022f178>] (omap3pandora_init+0x11c/0x164) from [<c022849c>] (customize_machine+0x20/0x28) [<c022849c>] (customize_machine+0x20/0x28) from [<c0225810>] (do_one_initcall+0xa0/0x16c) [<c0225810>] (do_one_initcall+0xa0/0x16c) from [<c02259e0>] (kernel_init+0x104/0x1ac) [<c02259e0>] (kernel_init+0x104/0x1ac) from [<c0009cec>] (kernel_thread_exit+0x0/0x8) Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-28 13:21:51 -0500