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* Fix container_of() usageAlexey Dobriyan2008-02-08
| | | | | | | | | | Using "attr" twice is not OK, because it effectively prohibits such container_of() on variables not named "attr". Signed-off-by: Alexey Dobriyan <adobriyan@sw.ru> Acked-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sh: intc - remove default interrupt priority tablesMagnus Damm2008-01-27
| | | | | | | | | | | | | This patch removes interrupt priority tables from the intc code. Optimal priority assignment varies with embedded application anyway, so keeping the interrupt priority tables together with cpu-specific code doesn't make sense. The function intc_set_priority() should be used instead to set the desired interrupt priority level. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add support for SH7763 CPU subtype.Yoshihiro Shimoda2008-01-27
| | | | | Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Support denormalization on SH-4 FPU.Stuart Menefy2008-01-27
| | | | | Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH-2A FPU support.Paul Mundt2008-01-27
| | | | | Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Kobject: convert arch/* from kobject_unregister() to kobject_put()Greg Kroah-Hartman2008-01-24
| | | | | | | | | | | There is no need for kobject_unregister() anymore, thanks to Kay's kobject cleanup changes, so replace all instances of it with kobject_put(). Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Kobject: change arch/sh/kernel/cpu/sh4/sq.c to use kobject_init_and_addGreg Kroah-Hartman2008-01-24
| | | | | | | | | Stop using kobject_register, as this way we can control the sending of the uevent properly, after everything is properly initialized. Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* sh: Kill off the remaining ST40 cruft.Paul Mundt2007-11-06
| | | | | | | | | | | | | The ST40 stuff in-tree hasn't built for some time, and hasn't been updated for over 3 years. ST maintains their own out-of-tree changes and rebases occasionally, and that's ultimately where all of the ST40 users go anyways. In order for the ST40 code to be brought up to date most of the stuff removed in this changeset would have to be rewritten anyways, so there's very little benefit in keeping the remnants around either. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use boot_cpu_data for CPU probe.Paul Mundt2007-09-27
| | | | | | | | | | This moves off of smp_processor_id() and only sets the probe information for the boot CPU directly. This will be copied out for the secondaries, so there's no reason to do this each time. This also allows for some header tidying. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Disable L2 reporting for present URAM only parts.Paul Mundt2007-09-26
| | | | | | | | | The probing logic works for both URAM and L2, with no way to distinguish between the two. Disable the probing for now and let the CPU subtypes that have this in a real L2 configuration explicitly say so. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off volatile silliness in sq_flush_range().Paul Mundt2007-09-20
| | | | | | | | | | | CC arch/sh/kernel/cpu/sh4/sq.o arch/sh/kernel/cpu/sh4/sq.c: In function 'sq_flush_range': arch/sh/kernel/cpu/sh4/sq.c:65: warning: passing argument 1 of 'prefetch' discards qualifiers from pointer target type This didn't actually need to be volatile in the first place, so just kill off the qualifier entirely. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - mark data structures as __initdataMagnus Damm2007-09-20
| | | | | | | | | | | With the intc core improved it is now possible to put the intc data structures in the initdata section. Version two of this patch puts the __initdata inside DECLARE_INTC_DESC() and removes the __initdata included in the board specific r2d code. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add a clear register to struct intc_prio_regMagnus Damm2007-09-20
| | | | | | | | We need a secondary register member in struct intc_prio_reg to support dual priority registers used by ipi on x3. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - remove redundant irq code for sh03, snapgear and titanMagnus Damm2007-09-20
| | | | | | | | | | | | | | This patch removes redundant board specific interrupt code for boards using sh775x processors and 4 IRQ lines in "Individual Interrupt Mode" aka IRLM. Three boards are affected: sh03, snapgear and titan. The right way to do this is to use cpu specific code provided by intc. A nice side effect is that sh03 now compiles, board not BROKEN any more. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for SH7760Magnus Damm2007-09-20
| | | | | | | | | | | | | | | | This patch converts the cpu specific interrupt setup code for sh7760 from ipr + intc2 to intc. New vectors are also added to match the information provided by the datasheet. Vectors for IRQ4-IRQ7 are enabled by default. Use plat_irq_setup_pins() if pins IRL0-3 should be used in IRLM mode. The patch also adds the SIM block to the serial port platform data. Version two of this patch fixes MMCIF problems reported by Manuel Lauss. Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: missing symbol fix for sh4-202Magnus Damm2007-08-22
| | | | | | | | | This patch adds a plat_irq_setup() symbol for sh4-202. Without this fix it is impossible to build a working kernel using the microdev_defconfig. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Silence sq compile warning on sh4 nommu.Paul Mundt2007-07-26
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: remove support for sh73180 and solution engine 73180Magnus Damm2007-07-24
| | | | | | | | | This patch removes old dead code: - kill off sh73180 cpu support - get rid of broken solution engine 73180 board support Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for SH7750 and its variantsMagnus Damm2007-07-20
| | | | | | | | | | | | | This patch converts the cpu specific 7750 setup code to use the new intc controller. Many new vectors are added and multiple processor variants including 7091, 7750, 7750s, 7750r, 7751 and 7751r should all have the correct vectors hooked up. IRLM interrupts can be enabled using ipr_irq_enable_irlm() which now is marked as __init. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: IPR/INTC2 IRQ setup consolidation.Magnus Damm2007-07-19
| | | | | | | | | | This patch unifies the cpu specific interrupt setup functions for interrupt controller blocks such as ipr, intc2 and intc. There is no point in having separate functions for each interrupt controller, so let's clean this up. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* mm: Remove slab destructors from kmem_cache_create().Paul Mundt2007-07-19
| | | | | | | | | | | | | | Slab destructors were no longer supported after Christoph's c59def9f222d44bb7e2f0a559f2906191a0862d7 change. They've been BUGs for both slab and slub, and slob never supported them either. This rips out support for the dtor pointer from kmem_cache_create() completely and fixes up every single callsite in the kernel (there were about 224, not including the slab allocator definitions themselves, or the documentation references). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Preliminary support for the SH-X3 CPU.Paul Mundt2007-06-20
| | | | | | This adds basic support for UP SH-X3. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: rework ipr codeMagnus Damm2007-06-15
| | | | | | | | | | | | | | | | | This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: rework intc2 codeMagnus Damm2007-06-14
| | | | | | | | | | | | | | | | | | | The shared intc2 code currently contains cpu-specific #ifdefs. This is a tad unclean and it prevents us from using the shared code to drive board-specific irqs on the se7780 board. This patch reworks the intc2 code by moving the base addresses of the intc2 registers into struct intc2_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. One logic change has been made - the original shared intc2 code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix SH-4 CPU selects.Paul Mundt2007-06-07
| | | | | | | | | Now that select no longer works for selecting the "closest" CPU, we have to explicitly reference the precise sub-type in the few places where it actually matters (presently only setup code and some legacy sh-sci cruft). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix SH4-202 clock fwk set_rate() mismatch.Paul Mundt2007-06-03
| | | | | | | With the SH7722 changes, ->set_rate() also takes an algo_id, SH4-202 was overlooked when this change went in. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: trivial build cleanups.Evgeniy Polyakov2007-05-31
| | | | | | | | | | Several errors were spotted during building for custom config (SMP included). Although SMP still does not compile (no ipi and __smp_call_function) and does not work, this looks a bit cleaner. Some other errors obtained via gcc-4.1.0 build. Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up various compile warnings for SE boards.Paul Mundt2007-05-21
| | | | | | | | | | | | - setup-sh7750.c only defines the sh7751_ipr_map when building with SH7751 support. - 7722 Solution Engine was missing a mach-type entry, causing the macro in cf-enabler to be undefined. - arch/sh/mm/init.c needs linux/pagemap.h. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* spelling fixes: arch/sh/Simon Arlott2007-05-21
| | | | | | | Spelling fixes in arch/sh/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix PC adjustments for varying opcode length.Paul Mundt2007-05-08
| | | | | | | | | | | | | | | | | | | | There are a few different cases for figuring out how to size the instruction. We read in the instruction located at regs->pc - 4 when rewinding the opcode to figure out if there's a 32-bit opcode before the faulting instruction, with a default of a - 2 adjustment on a mismatch. In practice this works for the cases where pc - 4 is just another 16-bit opcode, or we happen to have a 32-bit and a 16-bit immediately preceeding the pc value. In the cases where we aren't rewinding, this is much less ugly.. We also don't bother fixing up the places where we're explicitly dealing with 16-bit instructions, since this might lead to confusion regarding the encoding size possibilities on other CPU variants. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Share exception vector table for SH-3/4.Paul Mundt2007-05-08
| | | | | | | | | | | The only difference between these at the moment are the FPU exceptions, and these are hidden away under CONFIG_SH_FPU (which is only set for the SH-4 case anyways..). This consolidates the two tables, and updates SH-4 to use the updated copy. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH7722 clock framework support.dmitry pervushin2007-05-06
| | | | | | | This adds support for the SH7722 (MobileR) to the clock framework. Signed-off-by: dmitry pervushin <dimka@nomadgs.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add SH7785 Highlander board support (R7785RP).Paul Mundt2007-05-06
| | | | | | | | | | | This adds preliminary support for the SH7785-based Highlander board. Some of the Highlander support code is reordered so that most of it can be reused directly. This also plugs in missing SH7785 checks in the places that need it, as this is the first board to support the CPU. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix SH-3 cache entry_mask and way_size calculation.Paul Mundt2007-03-12
| | | | | | | | The code for performing the calculation was only in the SH-4 probe path, move it out to the common path so the other parts get this right too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: rts7751r2d board updates.Paul Mundt2007-02-15
| | | | | | | | This tidies up some of the rts7751r2d mess and gets it booting again. Update the defconfig, too. Signed-off-by: Masayuki Hosokawa <hosokawa@ace-jp.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fixup cpu_data references for the non-boot CPUs.Paul Mundt2007-02-12
| | | | | | | There are a lot of bogus cpu_data-> references that only end up working for the boot CPU, convert these to current_cpu_data to fixup SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH-DMAC compile fixesManuel Lauss2007-02-12
| | | | | | | | | | | | | | | | | This patch does the following: - remove the make_ipr_irq stuff from dma-sh.c and replace it with a simple channel<->irq mapping table. - add DMTEx_IRQ constants for sh4 cpus - fix sh7751 DMAE irq number The SH7780 uses the same IRQs for DMA as other SH4 types, so I put the constants on top of the dma.h file. Other CPU types need to #define their own DMTEx_IRQ contants in their appropriate header. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: add SH7760 IPR IRQ dataManuel Lauss2007-02-12
| | | | | | | Add SH7760 IPR IRQ data; makes 2.6.20-rc bootable again. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Lazy dcache writeback optimizations.Paul Mundt2007-02-12
| | | | | | | | | | | | | | | This converts the lazy dcache handling to the model described in Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a bonus, this slightly cuts down on the cache flushing frequency. With that and the PTEA handling out of the way, the update_mmu_cache() implementations can be consolidated, and we no longer have to worry about which configuration the cache is in for the SH7705 case. And finally, explicitly disable the lazy writeback on SMP (SH-4A). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH-MobileR SH7722 CPU support.Paul Mundt2006-12-11
| | | | | | This adds CPU support for the SH7722. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Convert remaining remap_area_pages() users to ioremap_page_range().Paul Mundt2006-12-11
| | | | | | A couple of these were missed. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: register rtc resources for sh775x.Jamie Lenehan2006-12-11
| | | | | | | | Register the RTC resources for the sh775x subtype so that the new generic RTC support in drivers/rtc/rtc-sh.c will work. Signed-off-by: Jamie Lenehan <lenehan@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* [PATCH] slab: remove kmem_cache_tChristoph Lameter2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace all uses of kmem_cache_t with struct kmem_cache. The patch was generated using the following script: #!/bin/sh # # Replace one string by another in all the kernel sources. # set -e for file in `find * -name "*.c" -o -name "*.h"|xargs grep -l $1`; do quilt add $file sed -e "1,\$s/$1/$2/g" $file >/tmp/$$ mv /tmp/$$ $file quilt refresh done The script was run like this sh replace kmem_cache_t "struct kmem_cache" Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* sh: sh775x/titan fixes for irq header changes.Jamie Lenehan2006-12-05
| | | | | | | | | | | | | | | | | | | | | The following moves the creation of IPR interupts into setup-7750.c and updates a few other things to make it all work after the "Drop CPU subtype IRQ headers" commit. It boots and runs fine on my titan board. - adds an ipr_idx to the ipr_data and uses a function in the subtype code to calculate the address of the IPR registers - adds a function to enable individual interrupt mode for externals in the subtype code and calls that from the titan board code instead of doing it directly. - I changed the shift in the ipr_data to be the actual # of bits to shift, instead of the numnber / 4 - made it easier to match with the manual. Signed-off-by: Jamie Lenehan <lenehan@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Clock framework tidying.Paul Mundt2006-12-05
| | | | | | | | This syncs up the SH clock framework with the linux/clk.h API, for which there were only some minor changes required, namely the clk_get() dev_id and subsequent callsites. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix store queue bitmap end.Paul Mundt2006-12-05
| | | | | | | | | | | | | The end of the store queue bitmap is miscalculated when searching for a free range in sq_remap(), missing the PAGE_SHIFT shift that's done in sq_api_init(). This runs in to workloads where we can scan beyond the end of the bitmap. Spotted by Paul Jackson: http://marc.theaimsgroup.com/?l=linux-kernel&m=116493191224097&w Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: TLB miss fast-path optimizations.Stuart Menefy2006-12-05
| | | | | | | | Handle simple TLB miss faults which can be resolved completely from the page table in assembler. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Set up correct siginfo structures for page faults.Stuart Menefy2006-12-05
| | | | | | | | Remove the previous saving of fault codes into the thread_struct as they are never used, and appeared to be inherited from x86. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: gcc4 support.Stuart Menefy2006-12-05
| | | | | | | | | | | | This fixes up the kernel for gcc4. The existing exception handlers needed some wrapping for pt_regs access, acessing the registers via a RELOC_HIDE() pointer. The strcpy() issues popped up here too, so add -ffreestanding and kill off the symbol export. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Drop CPU subtype IRQ headers.Paul Mundt2006-12-05
| | | | | | | | | | | | | This drops the various IRQ headers that were floating around and primarily providing hardcoded IRQ definitions for the various CPU subtypes. This quickly got to be an unmaintainable mess, made even more evident by the subtle breakage introduced by the SH-2 and SH-2A changes. Now that subtypes are able to register IRQ maps directly, just rip all of the headers out. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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