aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
Commit message (Collapse)AuthorAge
...
* ENGR00273425 ARM: imx: enable suspend code for imx6q/dlRobin Gong2014-04-16
| | | | | | | | Enable DSM code for imx6, the code porting form kernel 3.5.7.So with the patch, we can suspend imx6q, imx6dl from iram to decrease power number of DDR IO: save ~15mA@1.5V on imx6qsabresd, but need more ~30us in suspend and resume back. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00273974-3 ARM: imx_v6_v7_defconfig: enable mxc vout driverLiu Ying2014-04-16
| | | | | | Enable the mxc v4l2 output driver. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00273974-2 ARM: dts: imx6qdl-sabresd: enable mxc voutLiu Ying2014-04-16
| | | | | | Enable the mxc vout for imx6q{dl}-sabresd boards. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00273972-2 ARM:dts:imx6qdl-sabresd:Add pfuze100 support on Sabresd boardRobin Gong2014-04-16
| | | | | | Add pfuze100 regulator device node in imx6qdl-sabresd.dtsi. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00273972-1 ARM:imx:enable pfuze100 regulator driver supportRobin Gong2014-04-16
| | | | | | Enable pufze100 regulator driver built in imx_v6_v7_defconfig Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00274009 ARM: imx: gpt clk on i.mx6sl can NOT source from OSCAnson Huang2014-04-16
| | | | | | | | | | | There is no OSC clock source option for gpt on i.mx6sl, it can only source from perclk, and perclk can be from OSC. As perclk is clock source of many low speed devices, set it to be from OSC, this can avoid freq varying when bus clk(ipg) is scaled. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00273867-2 ARM: imx: Enable cpuidle driver by defaultAnson Huang2014-04-16
| | | | | | Enable cpuidle driver by default. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00273867-1 ARM: imx: Enable cpuidle for i.mx6q and i.mx6dlAnson Huang2014-04-16
| | | | | | | | | | | | | Enable cpuidle for i.mx6q and i.mx6dl, two cpuidle levels supported: 1. Simple WFI; 2. WAIT mode enabled; Currently only i.mx6q > TO1.1 and i.mx6dl > TO1.0 support this feature, as they have WAIT mode available. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00273838-6 arm: dtsi: imx6qdl: Remove fifo-depth for ssiNicolin Chen2014-04-16
| | | | | | | | | | | Remove fifo-depth for ssi and let the driver use the default value 8. Doing this modification is because 15 fifo-depth, an odd number, is not working perfectly with ssi dual-fifo mode by setting sdma water mark to 13 (result from 15 - 2). Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00273848-03 MX6 HDMI: Add HDMI setting in dtsSandor Yu2014-04-16
| | | | | | | Add HDMI core and video driver dts for MX6Q/DL SabreSD board. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00273848-01 iMX6Q clock: Add imx_clk_mux2 functionSandor Yu2014-04-16
| | | | | | | Add new imx_clk_mux2 function with flag CLK_SET_RATE_PARENT for IPU DI clock. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00273512-2 ARM: imx: Change GPT clock source to OSCAnson Huang2014-04-16
| | | | | | | | | | GPT clock is system clock source, need to avoid freq varying, as system bus clock(ipg) may be changed, for i.mx6 series SOCs, all of them except i.mx6q TO1.0 support sourcing GPT clk from OSC directly, so switch gpt clock to OSC if the SOCs support this feature, as OSC freq is constant. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00273512-1 ARM: imx: Add i.mx6sl cpu type checkAnson Huang2014-04-16
| | | | | | Add i.mx6sl cpu type check and i.mx6 series SOC check. Signed-off-by: Anson Huang <b20788@freescale.com>
* ARM: imx_v6_v7_defconfig: enable WEIM driverHuang Shijie2014-04-16
| | | | | | | | | enable the weim driver. Since the NOR is connected to the WEIM for imx6q{dl}-sabreauto, we also enable the MTD_PHYSMAP_OF module. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabresd: enable the SPI NORHuang Shijie2014-04-16
| | | | | | | enable the spi nor for imx6q{dl}-sabresd boards. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: add SPI/NOR for mx6q{dl}-sabreauto boardsHuang Shijie2014-04-16
| | | | | | | | Since the SPI/NOR has pin conflict with the WEIM NOR, we disable the spi/nor by default. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ENGR00269945 ARM: imx: Enable PU powerAnson Huang2014-04-16
| | | | | | | | | | | | | | PU is turned off in uboot, so we need to turn it on here to avoid kernel hang during GPU init. PU power enable need to follow the flows: 1. Enable xPU's clk; 2. Enable PU power rail and wait for PU power stable; 3. Enable PU power gate in GPC; Otherwise, some chips' PU may not work. Signed-off-by: Anson Huang <b20788@freescale.com>
* ARM: dts: imx6qdl-sabreauto: enable the WEIM NORHuang Shijie2014-04-16
| | | | | | | | | Enable the WEIM NOR for imx6q{dl}-sabreauto boards. For the pin conflict with SPI NOR, its status is set to "disabled". Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl: add more information for WEIMHuang Shijie2014-04-16
| | | | | | | | Add the clock and compatible information for the weim. Also adds the weim label. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ENGR00240988: ARM: imx: enable GPU support in defconfigShawn Guo2014-04-16
| | | | | | Turn on CMA with a 256 MiB pool and vivante gpu/drm options. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00240988: ARM: imx6q: add dma_zone_size for GPU limitShawn Guo2014-04-16
| | | | | | | | GPU has a limit on physical address that it accesses, which must be below 2GiB. Since i.MX6Q/DL maps system memory at 0x10000000 (offset 256MiB), we set dma_zone_size as (SZ_2G - SZ_256M) to ensure that. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00240988: ARM: dts: add gpu nodes for imx6q and imx6dlShawn Guo2014-04-16
| | | | | | It adds gpu nodes for imx6q and imx6dl. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00240988: ARM: imx6q: add gpu clock initialzatin codeLoren HUANG2014-04-16
| | | | | | | | This is a cherry-pick of commit 80f38bb (ENGR00240988-3 Add gpu clock initialzatin code) from 3.5.7 kernel. Signed-off-by: Loren HUANG <b02279@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00273073-4 ARM: imx_v6_v7_defconfig: enable more cpufreq governorsAnson Huang2014-04-16
| | | | | | | 1. Enable all supported governors; 2. Select interactive governor by default; Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00273073-3 ARM: imx_v6_v7_defconfig: run save defconfigAnson Huang2014-04-16
| | | | | | | | | Run make ARCH=arm savedefconfig on imx_v6_v7_defconfig to clean up some unnecessary/unrelated items, so that next time when we run savedefconfig, we only see related changes. No functional changes. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00273073-1 arm: add cpu idle notification callbackAnson Huang2014-04-16
| | | | | | | | | | | | | | | Some modules may need to know cpu idle status and take actions before and after cpu idle, so we can add notification callback when enter/exit cpu idle, then modules only need to register this notification callback, everytime cpu enter/exit idle, the callback chain will be executed. Currently only cpufreq interactive governor use this notification, as it wants to save power, the timers of interactive governor are only enabled when cpu is not in idle. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00272973-4 ARM: imx_v6_v7_defconfig: enable PWM and bl optionsLiu Ying2014-04-16
| | | | | | This patch enables some necessary options for PWM backlight support. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00272973-3 ARM: dts: imx: enable pwm bl for mx6 sabresdLiu Ying2014-04-16
| | | | | | | This patch enables pwm backlight support on pwm1 in mx6 sabresd dts. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00272973-2 ARM: dts: imx: enable pwm1 for mx6 sabresdLiu Ying2014-04-16
| | | | | | | This patch enables pwm1 on pin SD1_DAT3 as display pwm backlight controller in mx6 sabresd dts. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00272973-1 ARM: dts: imx6qdl: rename pwm0 pinctrlLiu Ying2014-04-16
| | | | | | | This patch renames pwm0 pinctrl to pwm1 to avoid confusion on the first pwm module's name. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00269945: ARM: imx: enable SATA support in defconfigShawn Guo2014-04-16
| | | | | | Enable SATA support in imx_v6_v7_defconfig. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: dtsi: enable ahci sata on imx6q platformsRichard Zhu2014-04-16
| | | | | | | | | Only imx6q has the ahci sata controller, enable it on imx6q platforms. Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00240987: ARM: imx: enable IPU and display support in defconfigShawn Guo2014-04-16
| | | | | | | It disables DRM_IMX which is the community support of IPU/display, and enables our internal version of IPU and display (LDB and LCD) support. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00240987: ARM: dts: enable LDB and LCD support for imx6qdl-sabresdShawn Guo2014-04-16
| | | | | | | | | | | | | | This is a fast-forward porting of LDB and LCD DTS changes from 3.5.7 kernel. Along with the changes, the "&ldb" node gets removed from imx6q.dtsi, since it's only used by community kernel and will conflict with our internal LDB bindings. While adding alias for ipu in imx6qdl.dtsi, it also sorts all those aliases alphabetically. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00240987: ARM: imx: select SRAM for ARCH_MXCShawn Guo2014-04-16
| | | | | | | Most of IMX SoCs have IRAM/SRAM integrated for audio/video uses, so let's select SRAM to build in the generic on-chip SRAM driver support. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00240987: ARM: imx6q: initialize clocks for IPUShawn Guo2014-04-16
| | | | | | This is a fast-forward porting from 3.5.7 kernel. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00240987: ARM: imx6q: add vdoa gate clockShawn Guo2014-04-16
| | | | | | Add the missing vdoa gate clock for imx6q. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: dts: imx: ocram size is different between imx6q and imx6dlShawn Guo2014-04-16
| | | | | | | | | | The ocram on imx6q is 256 KiB while on imx6dl it's 128 KiB. Let's have separate node for imx6q and imx6dl. It also changes imx6q size 0x3f000 to 0x40000 to match the hardware. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: dts: add sram for imx53 and imx6qPhilipp Zabel2014-04-16
| | | | | | | | This patch enables the On-Chip SRAM (OCRAM) on i.MX53 and i.MX6 SoCs. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00269945: ARM: imx: enable cpufreq and thermal support in defconfigShawn Guo2014-04-16
| | | | | | | | Enable cpufreq and thermal support in defconfig, so that cpufreq can be used as the cpu_cooling device to throttle CPUs when passive trip point gets crossed. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: dts: imx: add tempmon node for imx6q thermal supportShawn Guo2014-04-16
| | | | | | | Mark ocotp as a syscon node and add tempmon for imx6q thermal support. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx6q: remove board specific CLKO setupShawn Guo2014-04-16
| | | | | | | | | | | The CLKO is widely used by imx6q board designs to clock audio codec. Since most codecs accept 24 MHz frequency, let's initially set up CLKO with OSC24M (cko <-- cko2 <-- osc). Then those board specific CLKO setup for audio codec can be removed. The board dts files also need an update on cko reference in codec node. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx6q: add the missing cko output selectionShawn Guo2014-04-16
| | | | | | | | The clock output on imx6q CCM_CLKO1 pad is not always cko1 clock, and there is a multiplexer to select between cko1 and cko2. Add this missing selection as the clock cko. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx6q: add cko2 clocksShawn Guo2014-04-16
| | | | | | | It adds the missing cko2 clocks, including multiplexer, divider and gate. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx6q: add spdif gate clockShawn Guo2014-04-16
| | | | | | It adds the missing spdif gate clock into imx6q clock driver. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX6: add ethernet phy fixup for KSZ9031Sascha Hauer2014-04-16
| | | | | | | | | | The KSZ9031 is used on the i.MX6 based Data Modul eDM-QMX6 board. It needs the same fixup to the rx/tx delays as other i.MX6 boards. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX6: add ethernet phy fixup for AR8031Sascha Hauer2014-04-16
| | | | | | | | | The AR8031 is used on the i.MX6 based sabreSD, sabreauto and wandboard. All need the same fixup, so add it for all i.MX6. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX6: call ksz9021 phy fixup for all i.MX6 boardsSascha Hauer2014-04-16
| | | | | | | | | | In current U-Boot the sabrelite, nitrogen6x and titanium all need the same fixup for the ksz9021 phy. Instead of limiting the fixup to a single board apply them for all. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by defaultNicolin Chen2014-04-16
| | | | | | | | | | Commit 42914fdde5bcda9f9118f20456d2c22300cda645 upstream. Enable imx-wm8962 and PM_RUNTIME, essential for WM8962 CODEC driver. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: dtsi: imx6qdl-sabresd: Enable WM8962 audio supportNicolin Chen2014-04-16
| | | | | | | | | | Commit 77b38fc36c5dc6f99d1db0a3c216724e53e5e257 upstream. Enable WM8962 ALSA machine driver via devicetree. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-04 20:28:50 -0400