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* ENGR00275004-2 ARM: dts: imx6qdl-sabresd: add max11801_ts deviceRobin Gong2014-04-16
| | | | | | Add max11801_ts device node Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00273792-2 ARM:iMX6x: Improve CPUFREQ driver.Ranjani Vaidyanathan2014-04-16
| | | | | | | | 1. Add support for VDDSOC/VDDPU operating points that track the VDDARM_CAP within 50mV to the device tree. 2. Add CPU freq and VDDSOC/VDDPU operating points to MX6DL and MX6SL. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
* ENGR00275500: dts: Add ptp clock pin support for i.MX6Q/DL sabreautoLuwei Zhou2014-04-16
| | | | | | Add ptp clock dts support on i.MX6Q/DL sabreauto. Signed-off-by: Luwei Zhou <B45643@freescale.com>
* ENGR00275479 ptp: Remove old way of PTP pin collisionLuwei Zhou2014-04-16
| | | | | | | This reverts commit aa0cfc5afaf18ce8fab696483b4ca533e4741430. We should use dts to deal with pin collision. Signed-off-by: Luwei Zhou <B45643@freescale.com>
* ENGR00275481 dts: Remove PTP pin collision in dtsLuwei Zhou2014-04-16
| | | | | | | This reverts commit 944b782d88b1ecece76942345f5e149c63a1d6d8. We will use dts to deal with pin collision. Signed-off-by: Luwei Zhou <B45643@freescale.com>
* ENGR00275403 ARM: imx: Support CPU hotplugAnson Huang2014-04-16
| | | | | | | | | | | | | | When doing secondary cores enable/disable, the enable bit and reset bit in SRC should be written together. Without this, CPU hotplug can NOT pass stress test, and with this, it can passed over 500k iterations CPU hotplug test with many threads running in background, at least three boards are tested. When trying hotplug a secondary core, it should stay in idle forever before it is disabled from SRC. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00275414 dts: Add device tree support for ptpLuwei Zhou2014-04-16
| | | | | | Add device tree support for ptp. Signed-off-by: Luwei Zhou <B45643@freescale.com>
* ENGR00275410 ptp: fix ptp pin collisionLuwei Zhou2014-04-16
| | | | | | | Ptp ts_clk pin have collision with spdif and i2c3, remove other modules pin ctrl when enable ptp. Signed-off-by: Luwei Zhou <B45643@freescale.com>
* ENGR00275394 i.MX6:IEEE1588: disable phy Ar8031 SmartEEELuwei Zhou2014-04-16
| | | | | | | | | | | | | | | | | | | Connecting two boards directly more than 2 hours, Ar8031 phy link status generates glitch, which cause ethernet link down/up issue, but ethernet still be active. There have three cases to validate the issue: Item#1: If add performance stress test while runing IEEE1588, the link down/up issue cannot be found. Item#2: If insert switch between two net nodes and run IEEE1588 test, the issue also cannot be found. Item#3: If disable AR8031 SmartEEE feature, after two days overnight test, no such issue found. The issue is caused by phy Ar8031 SmartEEE feature, Item#1 and Item#2 can prevent phy enter lpm mode, which match the Item#3 test result, so disable SmartEEE feature to avoid the link issue generation. Signed-off-by: Luwei Zhou <B45643@freescale.com>
* ENGR00275023-5 ARM: imx: Support standby mode for suspendAnson Huang2014-04-16
| | | | | | | | | Support standby mode for suspend, standby mode will only make CCM enter STOP mode with OSC on and no PMIC_STBY_REQ asserted, standby mode focus more on resume latency than power number. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00275023-4 ARM: imx: Setting CPU isolation according to dtsAnson Huang2014-04-16
| | | | | | | | | | Different boards may use different PMICs, and the PMICs' power rail ramp up time can impact the DSM mode a lot, so we need to adjust the CPU isolation timing setting according to board dts setting, if there is no such setting defined in dts, use default value. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00275023-3 ARM: imx: Correct CCM setting for DSM modeAnson Huang2014-04-16
| | | | | | | | | | | RBC is already enabled right before suspend, so no need to enable it in the CCM lpm setting; Need to disable CCM int_mem_clk_lpm before entering DSM and enable it after resume, as the whole ARM core will be powered down in DSM. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00275023-2 ARM: imx: Correct CCM_CGPR bit17's nameAnson Huang2014-04-16
| | | | | | | | | | Correct CCM_CGPR bit17's name according to latest RM, it is called INT_MEM_CLK_LPM. Add parameter for setting CCM_CGPR_INT_MEM_CLK_LPM to support both enable and disable setting. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00275023-1 ARM: imx: Enable unsafe resume for MMCAnson Huang2014-04-16
| | | | | | | | As we often use SD/MMC rootfs, need to enable this configuration for successfully resume of rootfs, otherwise, rootfs will be broken after resume. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00275385 touch: imx_v6_v7_defconfig: enable egalax single-touch supportLuwei Zhou2014-04-16
| | | | | | Enable egalax touchscreen single-touch support in imx_v6_v7_defconfig. Signed-off-by: Luwei Zhou <B45643@freescale.com>
* ENGR00275070 arm: dts: add hdmi properties to i.mx6 sabreauto dtsSandor Yu2014-04-16
| | | | | | | | | | - Add hdmi properties to dts for sabreauto board. - Remove lcd properties from sabreauto dts, because no parallel lcd panel for sabresdauto board. - Change the primary lvds channel from 1 to 0 for the sabreauto board. - Set hdmi as default secondly display for all i.mx6 board. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00275246-03: ARM: imx6sl: config iomux-gpr1 to select clock for fecFugang Duan2014-04-16
| | | | | | | | Config iomux-gpr1 to select clock source for fec system clock. Clear gpr1[14], gpr1[18-17] bit to select the fec clock source from internal anatop PLL. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00275246-01: ARM: dts: add fec phy reset for imx6sl evk boardFugang Duan2014-04-16
| | | | | | | | Add fec phy reset for imx6sl evk board. Add iomux gpr device node, which used for fec to clear gpr1[14], gpr1[18-17] bit to select the fec clock sourcr from internal anatop PLL. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00274585-8 arm: defconfig: imx_v6_v7: enable cs42888Shengjiu Wang2014-04-16
| | | | | | build-in cs42888 by default. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00274585-7 dtsi: add device tree for asrc p2p and esai.Shengjiu Wang2014-04-16
| | | | | | add devicetree for asrc p2p and esai. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00274412-3 ARM: imx_v6_v7_defconfig: enable ePxP driverRobby Cai2014-04-16
| | | | | | Enable ePxP DMAENGINE driver by default. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00274412-2 ARM: dts: enable ePxP for imx6dl_sd and imx6sl_evkRobby Cai2014-04-16
| | | | | | Enable ePxP in DTS for imx6 duallite sabresd and imx6 sololite evk board. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00274059-02 ARM: Add new dts for imx6q/imx6dl SabreSD hdcpSandor Yu2014-04-16
| | | | | | | | | hdcp ddc pins conflict with i2c2, add new dts file for imx6q and imx6dl SabreSD board, enable hdcp and disable i2c2 in these dts files. Remove hdmi pins property from mx6qdl-sabresd.dtsi. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00274226-03 HDMI DTS: Add prefix "fsl" to mxc specific dts properties.Sandor Yu2014-04-16
| | | | | | Add prefix "fsl" to mxc specific dts properties. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00274226-02 MX6 HDMI: Add prefix "fsl" to mxc specific dts properties.Sandor Yu2014-04-16
| | | | | | | - Add prefix "fsl" to mxc specific dts properties. - imx_hdmi_type will been referenced by app move it to mxc_hdmi.h. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00274055 MX6 HDMI: Enable HDMI video in defconfigSandor Yu2014-04-16
| | | | | | Enable i.MX6 HDMI video in defconfig Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00274026 MX6 Clock: Replace imx_clk_mux2 function with imx_clk_mux_flagsSandor Yu2014-04-16
| | | | | | | The function of imx_clk_mux2 is cover by imx_clk_mux_flags. Remove imx_clk_mux2 and replace with imx_clk_mux_flags function. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00274473-6 ARM: dts: imx6qdl: pass clocks and regulator to gpcAnson Huang2014-04-16
| | | | | | | Now that gpc module is a platform driver, pass related clocks and regulator from dts. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00274473-5 ARM: imx: Support PU regulator on/off dynamicallyAnson Huang2014-04-16
| | | | | | | | | | | | | 1. Change GPC to platform driver to support regulator nofication in order to implement dynamical PU regulator on/off; 2. Remove previous enabling PU regulator during kernel boot up, PU modules will handle it. 3. Support dynamical PU regulator on/off according to regulator notification. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00274473-3 ARM: dts: imx6qdl: remove PU LDO always-on attributeAnson Huang2014-04-16
| | | | | | | PU regulator can be turned off when there is no PU module running, so remove always-on attribute. Signed-off-by: Anson Huang <b20788@freescale.com>
* ARM: dts: imx6q: add quirky select input for USB_OTG_IDShawn Guo2014-04-16
| | | | | | | | | | | | | | | | | | | For some reason, the select input of pin function USB_OTG_ID is not implemented via a regular select input register but using the bit USB_OTG_ID_ SEL (shift 13) of IOMUXC_GPR1 register (offset 0x4). As per the workaround for such quirk implemented in pinctrl driver, we need to compose the input_val cell as below. 31 23 15 7 0 | 0xff | shift | width | select | Thus, we have 0xff0d0100 for MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID and 0xff0d0101 for MX6QDL_PAD_GPIO_1__USB_OTG_ID in input_val cell. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Peter Chen <peter.chen@freescale.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* ENGR00269945: ARM: imx6: report soc info via soc deviceShawn Guo2014-04-16
| | | | | | | | | | | | | | | | | | The patch enables soc bus infrastructure and adds a function imx_soc_device_init() to report soc info via soc device interface for imx6qdl and imx6sl. With the support, user space can get soc related info by looking at sysfs like below. $ cat /sys/devices/soc0/machine Freescale i.MX6 Quad SABRE Smart Device Board $ cat /sys/devices/soc0/family Freescale i.MX $ cat /sys/devices/soc0/soc_id i.MX6Q $ cat /sys/devices/soc0/revision 1.2 Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00269945: ARM: imx: use imx_init_revision_from_anatop() on imx6slShawn Guo2014-04-16
| | | | | | | Add imx6sl support into imx_init_revision_from_anatop(), so that it can be used to initialize cpu type and revision on imx6sl. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00269945: ARM: imx6qdl: add a common function to initialize revision ↵Shawn Guo2014-04-16
| | | | | | | | | | | from anatop The patch creates a common function imx_init_revision_from_anatop() by merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any SoC that encodes revision info in anatop can use it to initialize revision. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00269945: ARM: imx6qdl: use common soc revision helpersShawn Guo2014-04-16
| | | | | | | | It calls imx_set_soc_revision() to set up soc revision in imx6q_init_revision(), and replaces all the occurrences imx6q_revision() and imx6dl_revision() with common helper imx_get_soc_revision(). Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00269945: ARM: imx: add soc revision helper functionsShawn Guo2014-04-16
| | | | | | | | Similar to what we do for cpu type, the patch adds helper functions imx_set_soc_revision() and imx_get_soc_revision() to maintain imx_soc_revision in cpu.c. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00274761-2 Upgrade VPU driver for Linux 3.10 kernelHongzhang Yang2014-04-16
| | | | | | | | | | | Add VPU node in dtsi - Add VPU node (common part) in imx6qdl.dtsi. It was defined in imx6.dtsi in Linux 3.5.7. - Add "iram" property for gen_pool api callings - Add "resets" property for device_reset api calling - Add VPU node (soc specific part) in imx6q.dtsi and imx6dl.dtsi Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
* ENGR00274768-2 ARM: imx: Use irq #32 for cpuidle instead of irq #125Anson Huang2014-04-16
| | | | | | | | | IRQ #125's status is not constant on different boards, IRQ #32 is IOMUXC's interrupt which can be triggered manually at anytime, use this irq instead of #125 to generate interrupt for avoiding CCM enter low power mode by mistake. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00269945: ARM: imx6sl: initialize use count of IPG clockShawn Guo2014-04-16
| | | | | | | | | | | | | | | | | | | | We're running into a system hang during imx6sl boot. It's been tracked down to SDMA driver function sdma_init(). System hangs immediately after the clk_disable() is called in sdma_init(). It turns out that the issue is caused by IPG bus clock which is the parent of sdma clock is turned off accidentally due to the incorrect initial use count. IPG clock is initial on and should be always on when system operates. But the use count of the clock is zero initially. So when the last child clock gets disabled, the use count of IPG clock reaches zero, and thus clock framework will turn off IPG clock (and possibly parent clocks along the way), and causes the system hang. Let's initialize the use count of IPG clock by calling clk_prepare_enable() on it to match the on state of the clock, so that the clock will not be turned off accidentally. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00269945: ARM: dts: imx6sl reuses imx6q sdma firmwareShawn Guo2014-04-16
| | | | | | | There is no imx6sl specific sdma firmware. Instead, imx6sl reuses imx6q sdma firmware. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00274821 ARM: Add i.MX6 FB properties to dts for SabreAuto boardSandor Yu2014-04-16
| | | | | | | | | | - Add Framebuffer and ldb properties to dts for i.MX6Q and i.MX6DL SabreAuto board. - Add PWM3 and backlight properties to dts for i.MX6Q and i.Mx6DL SabreAuto board. - fix i2c2 indent in dts. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00274470 egalax: imx_v6_v7_defconfig: enable egalax touchscreen supportLuwei2014-04-16
| | | | | | Enable egalax touchscreen support in imx_v6_v7_defconfig. Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ENGR00274749 ARM: imx6q: Improve lvds cabc gpio request logicLiu Ying2014-04-16
| | | | | | | | | This patch removes the unnecessary gpio_set_value() and gpio_free() function calls after request the gpios with gpio_requestion_one() successfully. Also, this patch adds a warning message if the request fails. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00264465-3 arm: imx6qdl:Disable Hannstar LVDS panel CABCLiu Ying2014-04-16
| | | | | | | | | | | Hannstar LVDS panel CABC function turns backlight density automatically according to display content. This may introduce annoying unstable backlight when display content changes. So, this patch disables the CABC function if a platform's of device tree provides controlling gpios in lvds_cabc_ctrl node. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 35048e80235a7e337a35d8747b153bdd0afb621a)
* ENGR00264465-2 arm: dts: imx6qdl-sabresd:Add lvds_cabc_ctrl nodeLiu Ying2014-04-16
| | | | | | | | | This patch adds lvds_cabc_ctrl node in imx6qdl-sabresd.dtsi file. This node contains two gpio entries for the Hannstar LVDS panel CABC control function on LVDS0 and LVDS1 interfaces. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 974371d0b8e57a47fc2a0f500376d61c47340d24)
* ENGR00264465-1 arm: dts: imx6qdl-sabresd:Add LVDS CABC pinmuxLiu Ying2014-04-16
| | | | | | | | | This patch adds pinmux entries for LVDS0 and LVDS1 to control the Hannstar LVDS panel CABC function. Pin NANDF_CS2 and pin NANDF_CS3 are configured to be gpio so that they can control the CABC function. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit e5607e333915ddd8650af02895979fde3a82197d)
* ENGR00274056-2 ARM: imx: add device cooling by defaultAnson Huang2014-04-16
| | | | | | Enable device cooling by default. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00274286-4 arm: imx_v6_v7_defconfig: Enable asrc by defaultNicolin Chen2014-04-16
| | | | | | Build-in ASRC. Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00274286-3 arm: dts: imx6qdl: Add asrc supportNicolin Chen2014-04-16
| | | | | | Complete required DT bindings. Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00274215: dts: imx6: add egalax support on i.MX6Q/DL AUTO/SDLuwei2014-04-16
| | | | | | Add egalax touchscreen devicetree support on i.MX6Q/DL sabre-auto/sd platform. Signed-off-by: Luwei Zhou <b45643@freescale.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-10 07:59:22 -0400