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* ENGR00277843-03 ARM: clk: update imx6sl lcdif clock tree.Sandor Yu2014-04-16
| | | | | | Add CLK_SET_RATE_PARENT flag for IMX6SL_CLK_LCDIF_PIX_SEL. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00277715-9 ARM: dts: Add spdif support for imx6sl-evkNicolin Chen2014-04-16
| | | | | | | | Complete spdif devicetree binding for imx6sl, also add its support for imx6sl-evk board. Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00277715-8 ARM: dts: Add WM8962 support for imx6sl-evkNicolin Chen2014-04-16
| | | | | | | | | | | Add WM8962 support for imx6sl-evk: * Add missing baud clock for ssi * Drop fifo-depth which would cause odd-number watermark * Add pinctrl group for audmux on evk board * Add WM8962-related devictree binding for evk board Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00277715-7 ARM: clk: Config audio clocks for imx6slNicolin Chen2014-04-16
| | | | | | | | * Set extern_audio to 24MHz as audio codec MCLK for WM8962 * Set pll3_pfd3 as spdif's parent Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00277715-6 ARM: clk: Add missing pll4_audio_div for imx6slNicolin Chen2014-04-16
| | | | | | | There's a dividor for pll4_audio clock missing in clock tree, thus add it. Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00277715-5 ARM: clk: Correct pll4_audio_div clock name for imx6qNicolin Chen2014-04-16
| | | | | | | Use the correct name 'pll4_audio_div' instead of 'pll4_aduio_div' Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00277715-4 ARM: dts: Add WM8962 jack detecting support for SabreSDNicolin Chen2014-04-16
| | | | | | | Update devicetree to add WM8962 jack detecting support Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00278097-3 ARM: imx: sabreauto: enable USB functionPeter Chen2014-04-16
| | | | | | Enable OTG and host 1 USB function. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00278128 ARM: dts: Add kpp support for i.MX6SLAnson Huang2014-04-16
| | | | | | | Add i.MX6SL keyboard feature. There are 8 keys on i.MX6SL EVK board, enable them. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00278064 arm: dts: Add gpio keyboard support for i.mx6qdl sabreauto boardAnson Huang2014-04-16
| | | | | | | Add gpio keyboard support for i.mx6qdl sabreauto board, they are home, back, program, vol+ and vol-. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00277895: dts: ARM: imx6: add ldo-enable dts filesRobin Gong2014-04-16
| | | | | | | | | | | | | | | Currently, we use different dts files to support ldo-bypass or ldo-enable, then we need add both dts files for the boards which can support ldo-bypass mode(all boards support ldo-enable at least). So for below boards we need add ldo-enable dts file so that we can use this to easily support ldo-enable mode: 1)mx6q-sabresd board: ldo-bypass dts->mx6q-sabresd.dtb, ldo-enable dts->mx6q-sabresd-ldo.dtb 2)mx6q-sabresd board: ldo-bypass dts->mx6dl-sabresd.dtb, ldo-enable dts->mx6dl-sabresd-ldo.dtb 3)mx6sl-evk board: ldo-bypass dts->mx6sl-evk.dtb, ldo-enable dts->mx6sl-evk-ldo.dtb Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00278098 Make gpu modulable driver passing buildLoren HUANG2014-04-16
| | | | | | | | | | | | | Gpu driver requires to do cache invalid, clean and flush operation. But in 3.10 kernel, these APIs are not supposed to be called from device driver. To avoid too much code change, Revert "ARM: Fix bad merge bd1274dc005 (Merge branch 'v6v7' into devel)" to make the situation the same as 3.0.35 kernel. This reverts commit a67e1ce145785d884b29b17e4d82a6ecd67bb97a. Signed-off-by: Loren HUANG <b02279@freescale.com> Acked-by: Shawn Guo
* ENGR00275033-3 ARM: imx_v7_defconfig: enable pxp v4l2 output driverRobby Cai2014-04-16
| | | | | | enable pxp v4l2 output driver on imx6sl by default Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00275033-2 ARM: dts: enable pxp v4l2 output deviceRobby Cai2014-04-16
| | | | | | Enable pxp v4l2 output device on imx6sl evk board Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00277750-2 ARM: clk-imx6sl: lcdif: set lcdif axi clock to 200MHzRobby Cai2014-04-16
| | | | | | | | set lcdif axi clock's parent to 'pll2_pfd2' and lcdif axi clock frequency to 200MHz. Signed-off-by: Robby Cai <R63905@freescale.com> Acked-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00277750-1 ARM: clk-imx6sl: correct some clock parent selectionsRobby Cai2014-04-16
| | | | | | | | | | | | | | | | | This might not be documented clearly or correctly in IC RM (Rev. 1, 04/2013). There's one document describing the CCM change on imx6sl, which is available at http://compass.freescale.net/livelink/livelink?func=ll&objId=223814333&objAction=browse This patch does - split csi_lcdif_sels since 2'b00 for CSI means 'osc' while for LCDIF means 'pll2_bus'. - split epdc_pxp_sels since 3'b101 for EPDC means 'pll3_pfd2' while for PXP means 'pll3_pfd3' - correct 2'b10 for lcdif_axi_sels, should be 'pll3_usb_otg' instead of 'pll3_120m' Signed-off-by: Robby Cai <R63905@freescale.com> Acked-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00277663-4 ARM: dts: sabreauto: add pfuze regulator device node in dtsRobin Gong2014-04-16
| | | | | | Add pfuze regulator device node in imx6qdl-sabreauto.dtsi. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00277663-2 dts: ARM: imx6sl-evk: enable max8903 charger device node in dtsRobin Gong2014-04-16
| | | | | | | | | | Add max8903 chager in dts. Below is difference with the full function on Sabresd: 1.no adc converter on imx6sl-evk, so disable it. 2.DOK connected with UOK, that say whatever USB or DC charger plug in, always report DC charger detect. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00277663-1 dts: ARM: imx6sl: enable ldo bypass and pfuze function in dtsRobin Gong2014-04-16
| | | | | | Enable ldo-bypass by default and enable pfuze regulator device node in dts. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00277691 ARM: imx: Add speed grading check.Anson Huang2014-04-16
| | | | | | | | | | | | | | For i.MX6Q/DL, different chips may have different max speed of ARM defined in fuse map of speed_grading[1:0]: 2b'11: 1200000000Hz; 2b'10: 1000000000Hz; 2b'01: 850000000Hz; -- i.MX6Q Only, exclusive with 1GHz. 2b'00: 800000000Hz; Need to read fuse data to set max speed of ARM. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00276199 ARM: imx: Update VDDARM_CAP's voltag for cpufreq tableAnson Huang2014-04-16
| | | | | | | | | According to datasheet, VDD_CACHE_CAP must not exceed VDDARM_CAP by more than 200mV, as all of our i.MX6Q boards' VDD_CACHE_CAP are connected to VDDSOC_CAP, so we need to follow this rule by increasing VDDARM_CAP's voltage when necessary. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00277299-7 ARM: imx_v7_defconfig: Build in hdmi audioNicolin Chen2014-04-16
| | | | | | Build hdmi audio as default Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00277299-6 ARM: dts: Add hdmi audio devicetree binding for imx6qdlNicolin Chen2014-04-16
| | | | | | | Add hdmi audio devicetree binding for i.MX6Q/DL series and add its support for SabreAuto and SabreSD boards. Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00269945: ARM: enable FSL_OTP in imx_v7_defconfigShawn Guo2014-04-16
| | | | | | It enables FSL_OTP device driver support in imx_v7_defconfig. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00269945: ARM: dts: imx6: add ocotp fuse nodeShawn Guo2014-04-16
| | | | | | | | | | | | | The ocotp also plays as a fuse device beside the system controller we already have in device tree. Let's add a device node for the fuse device for imx6qdl and imx6sl. While at it, the patch also drops "fsl,imx6q-ocotp" and "fsl,imx6sl-ocotp" from system controller compatible string, since it's not used, and use node name ocotp-ctrl and ocotp-fuse for system controller and fuse device respectively. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00277654 imx: pcie: enable pcie lm errata when pcie is enabledRichard Zhu2014-04-16
| | | | | | | | Enable the SW workaround of the PCIe lower power errata only when PCIe is enabled. Otherwise, don't apply the SW workaround. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00276023-2: ARM: imx: support LDO_BYPASS mode for imx6qdlRobin Gong2014-04-16
| | | | | | | Make code change for LDO_BYPASS mode. In LDO_BYPASS mode gpc will use dummy pu regulator to be notified by xPU driver. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00276023-1 ARM: dts: imx6: adjust some device node to support LDO_BYPASSRobin Gong2014-04-16
| | | | | | Modify devicetree to support LDO_BYPASS mode. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00277223-3 ARM: imx_v7_defconfig: enable elan touch driverRobby Cai2014-04-16
| | | | | | Enable CONFIG_TOUCHSCREEN_ELAN kernel option by default. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00277223-2 ARM: dts: add elan touch supportRobby Cai2014-04-16
| | | | | | | | | Add ELAN touch support for imx6 duallite sabresd board and imx6 sololite evk board. Note: Need 4.7K Ohm pull up on 'touch_int_b'. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00276832-9 ARM: imx_v7_defconfig: enable epdc framebuffer driverRobby Cai2014-04-16
| | | | | | Enable CONFIG_FB_MXC_EINK_PANEL option by default. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00276832-8 ARM: dts: add epdc supportRobby Cai2014-04-16
| | | | | | Add DTS for epdc on imx6 duallite and sololite. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00276832-5 epdc: set epdc/pxp axi clock to maximum 200MHzRobby Cai2014-04-16
| | | | | | | | | set epdc pix clock's parent clock to pll5_video for imx6sl set epdc/pxp axi clock's parent clock to pll2_pfd2 for imx6dl set epdc/pxp axi clock to 200MHz for both imx6dl and imx6sl (on imx6dl, epdc/pxp axi clock is same one, named 'ipu2') Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00276832-3 ARM: imx_v7_defconfig: add max17135 pmic supportRobby Cai2014-04-16
| | | | | | Enable max17135 PMIC support for imx6 duallite and sololite Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00276832-2 ARM: dts: add max17135 supportRobby Cai2014-04-16
| | | | | | | Add DTS for max17135 on imx6 duallite sabresd board and imx6 sololite evk board. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00277458-4 ARM: imx_v7_defconfig: Build in imx-spdifNicolin Chen2014-04-16
| | | | | | | Build imx-spdif as default Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00277458-3 ARM: dts: Add spdif support in devicetree for i.MX6Q/DL seriesNicolin Chen2014-04-16
| | | | | | | | Complete spdif node by adding essential properties and add spdif support in corresponding board dts. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00277458-2 ARM: imx6q: Set pll3_pfd3_454m clock as spdif's parentNicolin Chen2014-04-16
| | | | | | | | Provisionally use pll3_pfd3_454m clock as spdif's parent clock, which can fairly meet our playback and capture requirement. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00277271 ARM: imx: Disable WAIT mode for i.MX6SL during kernel boot upAnson Huang2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | WAIT mode is enabled by default due to hardware reset, so we need to disable it during kernel boot up, otherwise, system may crash without proper setting for WAIT mode. CPUIdle driver will enable WAIT mode later. Below is the stack dump when crash, this patch fix it: Bad mode in data abort handler detected Internal error: Oops - bad mode: 0 [#1] SMP ARM Modules linked in: CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.9+ #369 task: 807dba88 ti: 807d0000 task.ti: 807d0000 PC is at 0xffff1044 LR is at arch_cpu_idle+0x48/0x54 pc : [<ffff1044>] lr : [<8000f7dc>] psr: 60000192 sp : 807d1f60 ip : 00000000 fp : 00000000 r10: 807d8954 r9 : 8059980c r8 : 80819280 r7 : 00000001 r6 : 80819280 r5 : 00000000 r4 : 807d0000 r3 : 8001cbe0 r2 : 807d9510 r1 : 0104b000 r0 : 80819540 Flags: nZCv IRQs off FIQs on Mode IRQ_32 ISA ARM Segment kernel Control: 10c53c7d Table: af28804a DAC: 00000017 Process swapper/0 (pid: 0, stack limit = 0x807d0238) Stack: (0x807d1f60 to 0x807d2000) 1f60: 80819540 0104b000 807d9510 8001cbe0 807d0000 00000000 80819280 00000001 1f80: 80819280 8059980c 807d8954 00000000 00000000 807d1f60 8000f7dc ffff1044 1fa0: 60000192 ffffffff 807d0000 8005de44 807d89d0 808193c0 807bf084 807dc86c 1fc0: 8000406a 412fc09a 00000000 8077fb58 ffffffff ffffffff 8077f6b4 00000000 1fe0: 00000000 807bf088 00000000 10c53c7d 807d88d0 80008074 00000000 00000000 [<8000f7dc>] (arch_cpu_idle+0x48/0x54) from [<0104b000>] (0x104b000) Code: bad PC value ---[ end trace c2c7dd3b2230692c ]--- Kernel panic - not syncing: Attempted to kill the idle task Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00277234 ARM: imx: correct RBC/WB setting flowAnson Huang2014-04-16
| | | | | | | | | | | | | | Currently RBC is enabled right before DSM in asm code and disabled after resume, as the RBC enable didn't call imx6_enable_rbc function, so everytime disabling RBC will be skipped by the logic inside imx6_enable_rbc, this will disobey the RBC rules: RBC counter should be cleared after resume and adding at least 2 CKIL(32KHz) clocks with all wakeup sources masked in GPC; Move WB setting into DSM enter/exit path only. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00276567-9 ARM: defconfig: Enable si476x support in imx_v7_defconfigNicolin Chen2014-04-16
| | | | | | Build-in si476x support as default. Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00276567-8 ARM: dtsi: Add si4763 support for imx6qdl-sabreautoNicolin Chen2014-04-16
| | | | | | Add missing devicetree nodes and binding for the support. Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00276567-3 ARM: imx6q: Set pll4 as ssi's parentNicolin Chen2014-04-16
| | | | | | | | PLL4 is a flexible pll that can be set to a value as we need, so we set it to an value that can easily derive 44.1K and 48K and then put ssi baud clock as its child clock. Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00277241 imx: pcie: Re-correct the pcie dtsRichard Zhu2014-04-16
| | | | | | pcie dts node should be placed into imx6qdl dts file Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00277201-1 3.10 kernel panic when running gpu stress testLoren HUANG2014-04-16
| | | | | | | | | | | | | | The kernel panic is caused by gcc 4.8.1 build logic. 8044b000: e24bd010 sub sp, fp, #16 8044b004: e1500004 cmp r0, r4 8044b008: b1a00004 movlt r0, r4 8044b00c: a51b0018 ldrge r0, [fp, #-24] 8044b010: e89da810 ldm sp, {r4, fp, sp, pc} With this logic, r0 may return 0xffffffff randomly in Cortex A9 processor. Current workaround is enable ARM_UNWIND to avoid such disassemble logic. Signed-off-by: Loren HUANG <b02279@freescale.com>
* ENGR00275213-3 arm: dts: enable pcie on imx6 platformsRichard Zhu2014-04-16
| | | | | | | Both imx6q and imx6dl platforms have the pcie interface, enable the pcie on those platforms. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00275213-1 arm: pcie: enable pcie on imx6 platformsRichard Zhu2014-04-16
| | | | | | | | | | | | Add PCIe related clocks definitions and select pci on imx6 platforms toggle bit18 of grp1 fix pcie pm issue: Set bit18 of gpr1 before enter into supend, and clean it after resume, can fix the following errata. Errata ERR005723_PCIe PCIe does not support L2 Power Down. Signed-off-by: Richard Zhu <r65037@freescale.com>
* PCI: exynos: Split into Synopsys part and Exynos partJingoo Han2014-04-16
| | | | | | | | | | | | | | | Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys Designware part; other parts are Exynos specific. Also, the Synopsys Designware part can be shared with other platforms; thus, it can be split two parts such as Synopsys Designware part and Exynos specific part. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Pratyush Anand <pratyush.anand@st.com> Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
* ARM: dts: Add pcie controller node for exynos5440-ssdk5440Jingoo Han2014-04-16
| | | | | | | | | This patch adds pcie controller node for exynos5440-ssdk5440, and also adds a phandle for pin controller node. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoCJingoo Han2014-04-16
| | | | | | | | | Exynos5440 has two PCIe controllers which can be used as root complex for PCIe interface. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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