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* mmc: sdhci-esdhc-imx: clear SDHCI_CTRL_EXEC_TUNING should not affect other bitsDong Aisheng2014-04-16
| | | | | | | | | | | | | | | | | | | | | Current code will clear all turning related bits like ESDHC_STD_TUNING_EN and ESDHC_MIX_CTRL_FBCLK_SEL when clear SDHCI_CTRL_EXEC_TUNING. This may cause the card which has already passed the turning to become unwork since the turning status lost. We observed this failure when enable runtime pm. BTW, imx needs to enable ESDHC_MIX_CTRL_FBCLK_SEL bit for turned clock. The FBCLK_SEL will be cleared when SDHCI_CTRL_TUNED_CLK is cleared and SDHCI_CTRL_EXEC_TUNING is not set. This is used in case we change to another normal card from a UHS card in the same slot. FBCLK_SEL is not needed for normal card. After that, SDHCI_CTRL_EXEC_TUNING will only affect ESDHC_MIX_CTRL_EXE_TUNE. Clearing it does not affect the turned card to remain working on UHS mode. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-esdhc-imx: tuning bits should not be cleared during resetDong Aisheng2014-04-16
| | | | | | | | | | We should not clear tuning bits during reset or the SD3.0/eMMC4.5 card working on UHS mode may not work after reset since the former tuning settings was lost. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-pltfm: export pltfm suspend/resume apiDong Aisheng2014-04-16
| | | | | | | | It is helpful for platforms code to use to elimiate duplicated code. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-esdhc-imx: add eMMC HS200 mode supportDong Aisheng2014-04-16
| | | | | | | Add support for eMMC 4.5 cards to work on hs200 mode. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
* mmc: core: mmc DDR mode should not depend on UHS_DDR50Dong Aisheng2014-04-16
| | | | | | | | | | | | The MMC_CAP_UHS_DDR50 must work on 1.8v. However, the eMMC DDR mode can work on either 1.8v or 3.3v and should not depend on UHS_DDR50. So get rid of this limitation to let controller without 1.8v signal voltage support can also work for eMMC DDR mode if it claims. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-esdhc-imx: add MMC_CAP_1_8V_DDR for mx6Dong Aisheng2014-04-16
| | | | | | | The i.MX6 supports 1.8v/3.3v eMMC DDR mode, so add this flag. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
* mmc: sdhci-esdhc-imx: fix cpas over write issueDong Aisheng2014-04-16
| | | | | | | | We should use '|=' instead '=', or it may over write the original caps assigned before this line. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
* mmc: sdhci-esdhc-imx: add SDHCI_TRANSFER_MODE read functionDong Aisheng2014-04-16
| | | | | | | | Used to read out the correct value of SDHCI_TRANSFER_MODE register for upper layer. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
* mmc: sdhci: clear auto cmd setting bits for no data cmdsDong Aisheng2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | The auto cmd settings bits should be cleared before sending new commands or we may receive command timeout error for normal commands due to wrongly pre-sent auto cmd. e.g. we receive CMD13 timeout error due to ACMD23 is wrongly enabled by former data commands. mmc2: new high speed DDR MMC card at address 0001 mmcblk1: mmc2:0001 SEM08G 7.39 GiB mmcblk1boot0: mmc2:0001 SEM08G partition 1 2.00 MiB mmcblk1boot1: mmc2:0001 SEM08G partition 2 2.00 MiB mmcblk1rpmb: mmc2:0001 SEM08G partition 3 128 KiB mmcblk1: p1 p2 p3 p4 < p5 p6 p7 > mmc2: Timeout waiting for hardware interrupt. mmcblk1boot1: unknown partition table mmc2: Timeout waiting for hardware interrupt. mmcblk1boot0: unknown partition table Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
* ENGR00286724-11 imx_v7_defconfig: add flexcan supportDong Aisheng2014-04-16
| | | | | | Add flexcan support. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00286724-10 dts: sabreauto: add new dts for flexcan1 supportDong Aisheng2014-04-16
| | | | | | | The flexcan1 is pin conflict with fec. So we add a new dts file with flexcan1 enabled with fec disabled for user to use. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00286724-9 dts: imx6qdl: add properties for flexcan to support wakeupDong Aisheng2014-04-16
| | | | | | | According to binding doc, add missed properties for remote wakeup support. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00286724-8 can: flexcan: add self wakeup supportDong Aisheng2014-04-16
| | | | | | | | | If wakeup is enabled, enter stop mode, else enter disabled mode. Self wake can only work on stop mode. For imx6q, the stop request has to be mannually assert on IOMUX GPR13[28:29] register, we use syscon to control that bit. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00286724-7 ARM: dts: sabreauto: add flexcan supportDong Aisheng2014-04-16
| | | | | | The flexcan1 is disabled by default since it's conflict with fec. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00286724-6 ARM: imx6q: use auxdata to pass flexcan_switch function hookDong Aisheng2014-04-16
| | | | | | | Before we have a common can tranceiver binding to handle gpios operations, we use auxdata to pass flexcan_switch function first. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00286724-5 can: flexcan: add tranceiver gpios bindingDong Aisheng2014-04-16
| | | | | | | | Add gpios for tranceiver control. Before we have a common tranceiver binding, we use this way first. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00286724-4 ARM: dts: imx6q: complement of can propertiesDong Aisheng2014-04-16
| | | | | | Add missed properties. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00286724-3 ARM: dts: imx6q: change to generic name for flexcanDong Aisheng2014-04-16
| | | | | | | As following the device tree naming rule, we change the device node name to a more generic one and use phandle name specificly. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00286724-1 net: flexcan: using per clock for clock rate calculationDong Aisheng2014-04-16
| | | | | | The per clock is used for the output clock. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* mtd: nand: use a local variable to simplify the nand_scan_tailHuang Shijie2014-04-16
| | | | | | | | | | | | | | There are too many "chip->ecc" in the nand_scan_tail() which makes the eyes sore. This patch uses a local variable "ecc" to replace the "chip->ecc" to make the code more graceful. Do the code change with "s/chip->ecc\./ecc->/g" in the nand_scan_tail, and also change some lines by hand. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: gpmi: Use devm_kzalloc()Fabio Estevam2014-04-16
| | | | | | | | | Using devm_kzalloc() can make the code simpler. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
* ASoC: generic-dmaengine-pcm: Use SNDRV_DMA_TYPE_DEV_IRAM as defaultNicolin Chen2014-04-16
| | | | | | | | | | | | | When allocating memory space for DMA buffer, use on-chip internal SRAM as default choice to save power. Since the core would allocate memory from traditional external memory if iram allocation failed, we don't need to worry about any side effect. Signed-off-by: Nicolin Chen <b42378@freescale.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Mark Brown <broonie@linaro.org> Signed-off-by: Takashi Iwai <tiwai@suse.de> (cherry picked from commit ca2b029515b4a81bbedcffc69a5d9574bb5ba475)
* ENGR00286459 usb: chipidea: imx: add request{release}_bus_freqPeter Chen2014-04-16
| | | | | | | When the usb in idle, it calls release_bus_req. When the usb is going to use, it calls request_bus_req. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286273-3 arm: dtsi: imx6sl: add iram property to support internal SRAMNicolin Chen2014-04-16
| | | | | | | By doing this, we can allow SDMA driver to allocate its memory from iram when using i.MX6 SoloLite SoC. Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00286273-2 misc: sram: Set default alignment to 4KbytesNicolin Chen2014-04-16
| | | | | | | | | | As Kernel 3.0.35 does, we set the default iram alignment to 4Kbytes, although it would waste few memory space. We here try to do this as an expediency because currently we couldn't find a perfect solution for 4Kbytes alignment requirement from SDMA. Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00286273-1 dma: imx-sdma: allocate memory from iramNicolin Chen2014-04-16
| | | | | | | | | We try to allocate memory from SoC internal SRAM so that we can turn off voltage of external DDR to save power. Surely, if we failed to get the iram DT node or allocate memory due to no enough SRAM space, we would allow SDMA driver to allocate memory in a traditional way. Signed-off-by: Nicolin Chen <b42378@freescale.com>
* ENGR00286462 mx6sl fb: fix runtime pm not work at probe timeRobby Cai2014-04-16
| | | | | | | | | | | | | | For mxsfb, the lcdif controller is enabled (with clock enabled as well) at probe time, but pm_runtime_enable() is called after its enablement, thus runtime pm function only works at next enablement. The root cause is that pm_runtime_get_sync() function need to be called after pm_runtime_enable(). This patch fixes the problem by moving the position of pm_runtime_enable() ahead. For epdc fb, runtime pm may not work at probe time if DEFAULT_PANEL_HW_INIT is turned on (off by default). Fix it for safety. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00286426-22 usb: chipidea: imx: Enable CI_HDRC_IMX_EHCI_QUIRKPeter Chen2014-04-16
| | | | | | Enable CI_HDRC_IMX_EHCI_QUIRK for controllers who use mxs-phy. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-21 usb: chipidea: host: add ehci quirk for imx controllerPeter Chen2014-04-16
| | | | | | | | When the port goes to suspend or finishes resme, it needs to notify PHY, it is not a standard EHCI operation, so we add a quirk for it. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-20 usb: chipidea: host: add quirk for ehci operationPeter Chen2014-04-16
| | | | | | | | | | | | | | | | | | For chipidea controller, it does not follow ehci spec strictly. Taking resume signal as an example, it will stop resume signal about 20-21ms later automatically, but standard ehci spec says, the resume signal is controlled by software (clear portsc.PORT_RESUME). This operation causes some remote wakeup problems for high speed devices due to host controller does not send SOF in time since software can't guarantee set run/stop bit in time (run/stop bit was cleared at the ehci suspend routine). When software sets run/stop bit, it needs 1 SoF time to make it effect. If we close the PHY clock just after setting run/stop bit, it does not be set in practice, so a software delay is needed. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-19 usb: chipidea: imx: Enable runtime pm support for imx6Peter Chen2014-04-16
| | | | | | | Currently, only imx6 SoC series add wakeup logic, so only enable runtime pm for imx6. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-18 usb: chipidea: imx: call set_wakeup when necessaryPeter Chen2014-04-16
| | | | | | | | - Disable wakeup after probe - Enable wakeup during the suspend - Disable wakeup after controller is active Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-17 usb: chipidea: usbmisc_imx: add set_wakup APIPeter Chen2014-04-16
| | | | | | | It is used to enable USB wakeup, currently only imx6 SoC series usb's wakeup is enabled. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-16 usb: chipidea: usbmisc_imx: remove the controller's clock infoPeter Chen2014-04-16
| | | | | | | | | | | Currently, the usbmisc is just an API supplier for controller driver, the controller calls related APIs to handle different things among the SoCs, before calling it, the clock must be on. So the clock operation is useless for usbmisc, it also increases the difficulties to manage the clock, especially at runtime power management situation. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-15 usb: chipidea: add wakeup interrupt handlerPeter Chen2014-04-16
| | | | | | | | | | When the controller is at suspend mode, it can be waken up by external events (like vbus, dp/dm or id change). Once we receive the wakeup interrupt, we need to resume the controller first, eg open clocks, disable some wakeup settings, etc. After that, the controller can receive the normal USB interrupts. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-14 usb: chipidea: imx: add power management supportPeter Chen2014-04-16
| | | | | | Add system and runtime power management support for imx gluy layer. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-13 usb: chipidea: Add power management supportPeter Chen2014-04-16
| | | | | | | | This commit adds runtime and system power management support for chipidea core. The runtime pm support is controlled by glue layer, it can be enabled by flag CI_HDRC_SUPPORTS_RUNTIME_PM. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-12 usb: phy-mxs: Add system suspend/resume APIPeter Chen2014-04-16
| | | | | | | | | We need this to keep PHY's power on or off during the system suspend mode. If we need to enable USB wakeup, then we must keep PHY's power being on during the system suspend mode. Otherwise, we need to keep PHY's power being off to save power. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-11 usb: phy-mxs: Add implementation of set_wakeupPeter Chen2014-04-16
| | | | | | | | | | | When we need the PHY can be waken up by external signals, we can call this API. Besides, we call mxs_phy_disconnect_line at this API to close the connection between USB PHY and controller, after that, the line state from controller is SE0. Once the PHY is out of power, without calling mxs_phy_disconnect_line, there are unknown wakeups due to dp/dm floating at device mode. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-10 usb: phy: Add set_wakeup APIPeter Chen2014-04-16
| | | | | | | | This API is used to set wakeup enable at PHY registers, in that case, the PHY can be waken up from suspend due to external events, like vbus change, dp/dm change and id change. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-9 usb: phy-mxs: Enable IC fixes for related SoCsPeter Chen2014-04-16
| | | | | | | Some PHY bugs are fixed by IC logic, but these bits are not enabled by default, so we enable them at driver. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-8 usb: phy-mxs: Add implementation of nofity_suspend{resume}Peter Chen2014-04-16
| | | | | | | Implementation of notify_suspend and notify_resume will be different according to mxs_phy_data->flags. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-7 usb: phy: add notify suspend and resume callbackPeter Chen2014-04-16
| | | | | | | They are used to notify PHY that the controller enters suspend or finishes resume. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-6 usb: phy-mxs: Add anatop regmapPeter Chen2014-04-16
| | | | | | It is needed by imx6 SoC series, but not for imx23 and imx28. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-5 ARM: dts: imx6: add anatop phandle for usbphyPeter Chen2014-04-16
| | | | | | Add anatop phandle for usbphy Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-4 usb: doc: phy-mxs: update binding for adding anatop phandlePeter Chen2014-04-16
| | | | | | | Add anatop phandle which is used to access anatop registers to control PHY's power and other USB operations. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-3 usb: phy-mxs: Add auto clock and power settingPeter Chen2014-04-16
| | | | | | | With the auto setting, the PHY's clock and power can be recovered correctly from low power mode, it is ganranteed by IC logic. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-2 usb: phy-mxs: Add platform judgement codePeter Chen2014-04-16
| | | | | | | The mxs-phy has several bugs and features at different versions, the driver code can get it through of_device_id.data. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00286426-1 usb: doc: phy-mxs: Add more compatible stringsPeter Chen2014-04-16
| | | | | | | Add "fsl,imx6q-usbphy" for imx6dq and imx6dl, add "fsl,imx6sl-usbphy" for imx6sl. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* USB: EHCI: export ehci_handshake for ehci-hcd sub-driversManjunath Goudar2014-04-16
| | | | | | | | | | | | | | | In order to split ehci-hcd.c into separate modules, handshake() must be exported. Rename the symbol to add an ehci_ prefix, to avoid any naming clashes. Signed-off-by: Manjunath Goudar <manjunath.goudar@linaro.org> [swarren, split Manjunath's patches more logically, limit this change to export just handshake()] Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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