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* drm/nouveau: enable hwmon support when both nouveau/hwmon are built as modules.Ken Milmore2011-09-20
| | | | | | | | | | | The nouveau hwmon temperature support currently only functions when hwmon is compiled into the kernel. There's no reason why this shouldn't also work when both hwmon and nouveau are modularised (as is the case with Slackware's stock kernels). Signed-off-by: Ken Milmore <ken.milmore@googlemail.com> Reviewed-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: tidy up what we have so farBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: rewrite irq handler, should be somewhat sturdier nowBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: do modeset irq handling from taskletBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: untested LVDS supportBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: track down fb positioning methodBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: determine U table config in or_mode_set()Ben Skeggs2011-09-20
| | | | | | | Takes a gamble and presumes that we can safely store something random in OR_MODE_CTRL+4, the hw doesn't seem to mind... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: dac load detectBen Skeggs2011-09-20
| | | | | | | | VBIOS does more than this, as does nv50/nvc0 driver in nouveau. Traces of the NVIDIA binary driver however, show pretty much just this being done... Seems to work for me, it'll be fine for the moment. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: handle sync polarity, kill off some unknownBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: scalingBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: push the update button in mode_set_base()Ben Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: fixup clut so it actually worksBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: initial attempt at modeset irq handlingBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: stub dac load detect, prevents oopsBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: dac encoder moduleBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: extend the init voodoo to cover crtcsBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: remove lp reordering from vram dmaobj, create fb dmaobjsBen Skeggs2011-09-20
| | | | | | Fixes CLUT being messed up. Mostly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: some magic to make evo happeirBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: they moved the linear flag..Ben Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: initial crtc object implementationBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: skeletal handling of modeset interruptsBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: start on SOR encoder functionsBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: setup a couple of dma objects we'll needBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: start on interrupt handlingBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: whip up some basic dma handling for the evo channelsBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/disp: very initial evo setupBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: allow passing in crtc to the init table parserBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/pm: enable clock/voltage hooksBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: fix INIT_GPIO for new chipsetsBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/gpio: initial implementationBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0/i2c: initial implementationBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: initial chipset description for nvdX chipsetsBen Skeggs2011-09-20
| | | | | | | All the non-stubbed functions should be okay for this chipset, the rest will be added back as they're figured out. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: allow modeset module option to select 'headless mode'Ben Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: fixup init/fini sequence to deal with no CRTCsBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: make general drm modesetting init commonBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd0: add a card_type for 0xdX chipsetsBen Skeggs2011-09-20
| | | | | | | These are different enough from 0xcX to justify it, half fermi, half kepler(??).. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv04/pm: recalibrate timer on nvclk changesMartin Peres2011-09-20
| | | | | Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/tmr: calibrate for ns timestamps on initBen Skeggs2011-09-20
| | | | | | | | | | | We previously assumed (incorrectly a lot of the time) that PTIMER would be programmed at a frequency which'd give its 64-bit timestamps in nanoseconds. By programming PTIMER ourselves, we avoid this problem. Reviewed-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvc0/gr: unblacklist nvcf accelerationBen Skeggs2011-09-20
| | | | | | Reported to be working. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: don't complain for disabled timingset entriesBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvc0/gr: copy GPC mpart config from PFFBBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvc0/vram: support non-uniform memory size per controllerBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvc0/gr: add support for nvcf chipsetBen Skeggs2011-09-20
| | | | | | untested, written from a trace, accel disabled by default until it is Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: allow a nouveau_mm to be created with holesBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: embed nouveau_mmBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv31/mpeg: support for a single class3174 userBen Skeggs2011-09-20
| | | | | | | Uncertain if/how the hw does multiple PMPEG channels, supporting one is better than none however. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: rename nv40_mpeg to nv31_mpegBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvc0/pm: more complete parsing of clock domainsBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvc0/pm: initial implementation of clocks_get()Ben Skeggs2011-09-20
| | | | | | | Not too certain on memory clock yet, but it gets the right numbers for each perflvl on my NVC0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nva3/pm: idle graphics engine before changing clocksBen Skeggs2011-09-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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