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* ENGR00321817-02 fbcon: System hang when calling fb_new_modelist()Sandor Yu2014-07-17
| | | | | | | | | | System will hang if calling fb_new_modelist() function from mxc_hdmi driver. In the function of fbcon_new_modelist(), pointer variable vc is missing null pointer check, add null pointer check vc to fix the issue. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00321817-01 HDMI: Dispaly blank after resumeSandor Yu2014-07-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Issue reproduce steps: 1. Boot up without HDMI cable plugin 2. Insert the HDMI cable. 3. echo mem > /sys/power/state , enter suspend, 4. resume it, System can resume from suspend but display is blank. Error log: mxc_sdc_fb fb.31: Unable to allocate framebuffer memory detected fb_set_par error, error code: -12 In mxc hdmi driver, if system bootup without hdmi cable plugin, driver will create a default modelist. In fbcon driver, array fb_display[] initialized when system bootup and save current mode pointer that point to default modelist. When hdmi cable is plugin the modelist will rebuild according edid data, but the pointer of video mode in fb_display[] is not updated. When system resume, fbcon will use the invalidate pointer to configured framebuffer, framebuffer will crash. Add function fb_new_modelist() after modelist is rebuild to fix the issue. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00323027 MTD:QuadSPI: Remove the M4 checking workaroundYe.Li2014-07-17
| | | | | | | | | | | | | The QuadSPI driver has a workaround to check if M4 is using QuadSPI NOR flash. When M4 is running on QuadSPI NOR, the QuadSPI driver will quit. This workaround has a bug when system booting from QuadSPI NOR. Therefore, removed the workaround and disabled the QuadSPI driver in MCC specific DTB. The MCC DTB will let the QuadSPI driver to disabled, not conflict with M4. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 6733ca3382ddb6358f4ccf8dd4f16d8f65995241)
* ENGR00323026 iMX6SX:MCC Disable ADC1 and ADC2 in MCC DTSYe.Li2014-07-17
| | | | | | | | M4 has occupied the ADC1 and ADC2 in RDC, must disable them in DTS to avoid kernel boot panic. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 046b1c214af6740e7936aae6876941e79c10da8e)
* ENGR00323074 ARM: dts: imx6sx-sdb: add v4l2 capture and csi node for vadcRobby Cai2014-07-16
| | | | | | | | | | enable dual camera support on imx6sx-sdb. For camera ov5640, need an adapter (sch 700-28342) For VADC, need expansion board (sch 700-26109) Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit ce4e36b59f225b3af75ba04accde746049a58cb4)
* ENGR00322509-2 ARM:imx6sl:busfreq: Fix incorrect clk_set_parent() call.Ranjani Vaidyanathan2014-07-15
| | | | | | | | | The code incorrectly attempts to set the parent of periph2_clk to periph2_clk2_sel. Fix this by calling the clk_set_parent() function with the correct parameters. Also replace all calls to clk_set_parent() and clk_set_rate() with imx_clk_set_parent() and imx_clk_set_rate() function that prints out error messages in case of failure. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ENGR00322509-1 Revert "ENGR00318063-6: ARM: imx6: add CLK_SET_RATE_GATE flag ↵Ranjani Vaidyanathan2014-07-15
| | | | | | | | | | | | | | | for PLL clocks" The commit aabf4911f9971d4a6f02fe74bfdd39e7d74b7154, which added a check to prevent pll rate changes when PLL is enabled, causes incorrect reporting of MMDC clock during low power IDLE. So revert the patch as the code needs to be improved to handle all cases. Revert "ENGR00318063-6: ARM: imx6: add CLK_SET_RATE_GATE flag for PLL clocks" This reverts commit aabf4911f9971d4a6f02fe74bfdd39e7d74b7154. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ENGR00318063-11: ARM: imx6: add return check for clock callsShawn Guo2014-07-15
| | | | | | | | | | | | | | There are a bunch of clk_enable_prepare, clk_set_parent and clk_set_rate calls in imx6 clock driver's initialization. They are called without retunr check. If there is something going wrong with the calls, they will just fail silently. The patch creates a set of helper functions imx_clk_enable_prepare, imx_clk_set_parent and imx_clk_set_rate, and use them instead from clock initialization to check the return and print error message to tell failures if any. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00322895 dts: imx6sx-sdb: config PAD setting for GPIO17Shengjiu Wang2014-07-15
| | | | | | | GPIO17 is used by headphone jack. if don't config the PAD setting, the gpio value is not correct. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
* ENGR00321142 gis: faster auto standards detectionSandor Yu2014-07-15
| | | | | | | | | | | | | | | | Vadc need time to auto standards detection, the default standard is NTSC, if vadc connect to PAL camera and no enough time to detect the video mode, driver will get NTSC mode. Confirmation from chip design architecture auto detect function is not required by rear-view camera application. Setting register vdec_stddbg standard_filte bits to 0 makes the standard detection faster, the issue duplicate decrease to 1%. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00322015 dts: imx6qdl: dcic: set dcic1 as disp-axi clock for dcic2Sandor Yu2014-07-15
| | | | | | | On imx6dl dcic2 clock gate depend on dcic1, so setting dcic1 as disp-axi clock for dcic2 in imx6qdl dts. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00322563 ARM:imx6sl:Ensure that the CPU frequency is maintianed at ↵Ranjani Vaidyanathan2014-07-14
| | | | | | | | | | | | | | | 396MHz in low power idle. In low power IDLE mode, CPU needs to be sourced from PLL1 instead of PLL2_PFD0 as PLL2 needs to be in bypass mode to achieve 24MHz DDR frequency. The original code attempts to relock the PLL1 at frequency that is as close as possible to 396MHz, which results in PLL1 at 648MHz and the ARM freq turns out to be 324MHz instead of 396MHz. This causes issues with CPUFREQ as 324MHz is not a frequency listed in the cpufreq table in the device tree. This patch attempts to fix this mis-match and maintains CPU freq at 396MHz in low power idle. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ALSA: usb-audio: Fix deadlocks at resumingTakashi Iwai2014-07-14
| | | | | | | | | | | | The recent addition of the USB audio mixer suspend/resume may lead to deadlocks when the driver tries to call usb_autopm_get_interface() recursively, since the function tries to sync with the finish of the other calls. For avoiding it, introduce a flag indicating the resume operation and avoids the recursive usb_autopm_get_interface() calls during the resume. Reported-and-tested-by: Bryan Quigley <gquigs@gmail.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
* ALSA: usb-audio: Save mixer status only once at suspendTakashi Iwai2014-07-14
| | | | | | | | | The suspend callback of usb-audio driver may be called multiple times per suspend when multiple USB interfaces are bound to a single sound card instance. In such a case, it's superfluous to save the mixer values multiple times. This patch fixes it by checking the counter. Signed-off-by: Takashi Iwai <tiwai@suse.de>
* ALSA: usb-audio: Use SNDRV_DEV_CODEC for mixer objectsTakashi Iwai2014-07-14
| | | | | | | | Instead of SNDRV_DEV_LOWLEVEL, use SNDRV_DEV_CODEC type for mixer objects so that they are managed in a proper release order. No functional change at this point. Signed-off-by: Takashi Iwai <tiwai@suse.de>
* ALSA: usb-audio: Resume mixer values properlyTakashi Iwai2014-07-14
| | | | | | | | Implement reset_resume callback so that the mixer values are properly restored. Still no boot quirks are called, so it might not work well on some devices. Signed-off-by: Takashi Iwai <tiwai@suse.de>
* ENGR00322581-05 tty: serial: imx: Revert "tty: serial: imx: set uart to cpu ↵Fugang Duan2014-07-14
| | | | | | | | | | | | mode by default" Since uart SDMA can work for Atheros BT module in android environment, the previous patch (commit f337845718) disable SDMA mode in default, now revert the patch to avoid the big change in dts for all platforms. By default, we enable SDMA mode for uart. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00322581-04 serial: imx: fix the software flow controlHuang Shijie2014-07-14
| | | | | | | | | | Controls the CTS pin when the CTSC bit is negated. CTS has no function when CTSC is asserted. After The CTS pin is low, it needs to enable CTSC. The patch just fix the issue. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00322581-03 tty: serial: imx: start rx_dma once RXFIFO is not emptyRobin Gong2014-07-14
| | | | | | | | Start rx_dma once RXFIFO is not empty that can avoid dma request lost and causes data delay issue. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00322581-02 tty: serial: imx: add dma sync for dma tx pathFugang Duan2014-07-14
| | | | | | | | | For DMA tx path, there have no sync between prepare the tx BD and dma callback which can ensure tx_wor submit next dma request after the last finished. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00322581-01 tty: serial: imx: use workque to increase tx performanceRobin Gong2014-07-14
| | | | | | | Use workque to submit tx dma request to increase tx performance. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00322594 usb: chipidea: udc: disconnect gadget for udc restore in ↵Li Jun2014-07-13
| | | | | | | | | non-otg mode This patch adds condition check for gadget disconnect when restore udc, if in otg fsm mode, let otg fsm handle this by otg state machine. Signed-off-by: Li Jun <b47624@freescale.com>
* ENGR00321224 usb: gadget: composite: try to dequeue cdev->req before free itLi Jun2014-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If cdev->req was queued when remove composite driver, usb_ep_free_request cannot free it, this request may get to run its completion function next time this gadget driver load again, but the memory of completion function symbol is invalid after the driver removal, which will result in kernel panic like below: ... ... ci_hdrc ci_hdrc.0: enabling a non-empty endpoint! root@imx6sxsabresd:~# Unable to handle kernel paging request at virtual address 7f02eb2c pgd = 80004000 [7f02eb2c] *pgd=a8b41811, *pte=00000000, *ppte=00000000 Internal error: Oops: 80000007 [#1] PREEMPT SMP ARM Modules linked in: g_ncm libcomposite configfs ov5642_camera ov5640_camera evbug [last unloaded: configfs] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.31-daily-02005-g914c72a #20 task: 80c7b5c8 ti: 80c70000 task.ti: 80c70000 PC is at 0x7f02eb2c LR is at _ep_nuke+0xdc/0x118 pc : [<7f02eb2c>] lr : [<803e6a90>] psr: 200f0193 sp : 80c71d30 ip : 00000000 fp : a8c1513c r10: a803f608 r9 : 00000000 r8 : a803f5d0 r7 : a8c15134 r6 : a8c1513c r5 : a8c1513c r4 : a8c15100 r3 : 7f02eb2c r2 : 00010101 r1 : a8c15100 r0 : a803f5d0 Flags: nzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c53c7d Table: a92a804a DAC: 00000015 Process swapper/0 (pid: 0, stack limit = 0x80c70238) Stack: (0x80c71d30 to 0x80c72000) 1d20: a803f010 ffffffea 00000001 c08661ac 1d40: 00000000 0000004b a8008900 a803f2f0 a803f010 803e7934 80c71d94 80047614 1d60: 00000000 00000001 80c784e4 a803f010 a803f014 80c83290 81545c00 00000000 1d80: 803e6be0 a803f150 80c6ec00 81545c00 00000000 a803f010 a8008950 00000000 1da0: 00000000 0000004b a8008900 80cc47ce 00000001 803e4810 803e47c0 a83a3140 1dc0: a8008950 80076be0 12d4bd61 00000000 00989680 a8008900 a8008950 a83a3140 1de0: c0802100 80c70000 00000000 80c70000 80c70000 80076d44 a8008900 a8008950 1e00: 80c71f20 80079a10 8007998c 0000004b 0000004b 800763a8 80c6def0 8000e948 1e20: c080210c 80c78904 80c71e48 80008558 800306d8 800306e8 200f0113 ffffffff 1e40: 80c71e7c 8000dc80 00000000 00000000 00000101 80c70000 00000202 00000057 1e60: 00000000 80c72080 80c70000 00000000 80c70000 80c70000 80d072c0 80c71e90 1e80: 800306d8 800306e8 200f0113 ffffffff 00000057 a8009240 80cc47ce 80c6d7a0 1ea0: 00000000 0000000a 80d072c0 80c720c0 ffffac69 80c70010 80c80564 00200000 1ec0: 80c70000 600f0193 00000057 00000000 c0802100 00000000 00000000 80c70000 1ee0: 80c70000 800308b4 80c70030 80030b50 80c6def0 8000e94c c080210c 80c78904 1f00: 80c71f20 80008558 8005cfc0 8044a8bc 600f0013 ffffffff 80c71f54 8000dc80 1f20: 80c71f68 00000055 05ffdea3 00000014 05fc1b18 00000014 81545130 80c7dd68 1f40: 00000000 00000000 80c70000 80c70000 00000017 80c71f68 8005cfc0 8044a8bc 1f60: 600f0013 ffffffff 05ffdea3 00000014 80d1c98c 80c70000 81545130 80d1c98c 1f80: 00000000 80c7dd68 00000000 8044a9fc 00000000 80c78564 806493ac 80c70000 1fa0: 80cc47ba 80c70000 80cc47ba 8000ec68 0000cf94 8005c894 80c70000 80c78480 1fc0: 00000000 80c26a9c ffffffff ffffffff 80c26548 00000000 00000000 80c61770 1fe0: 10c53c7d 80c784e0 80c6176c 80c7c3c4 8000406a 80008074 00000000 00000000 [<803e6a90>] (_ep_nuke+0xdc/0x118) from [<803e7934>] (udc_irq+0x5c8/0xcf4) [<803e7934>] (udc_irq+0x5c8/0xcf4) from [<803e4810>] (ci_irq+0x50/0x118) [<803e4810>] (ci_irq+0x50/0x118) from [<80076be0>] (handle_irq_event_percpu+0x54/0x17c) [<80076be0>] (handle_irq_event_percpu+0x54/0x17c) from [<80076d44>] (handle_irq_event+0x3c/0x5c) [<80076d44>] (handle_irq_event+0x3c/0x5c) from [<80079a10>] (handle_fasteoi_irq+0x84/0x14c) [<80079a10>] (handle_fasteoi_irq+0x84/0x14c) from [<800763a8>] (generic_handle_irq+0x2c/0x3c) [<800763a8>] (generic_handle_irq+0x2c/0x3c) from [<8000e948>] (handle_IRQ+0x40/0x90) [<8000e948>] (handle_IRQ+0x40/0x90) from [<80008558>] (gic_handle_irq+0x2c/0x5c) [<80008558>] (gic_handle_irq+0x2c/0x5c) from [<8000dc80>] (__irq_svc+0x40/0x70) Exception stack(0x80c71e48 to 0x80c71e90) 1e40: 00000000 00000000 00000101 80c70000 00000202 00000057 1e60: 00000000 80c72080 80c70000 00000000 80c70000 80c70000 80d072c0 80c71e90 1e80: 800306d8 800306e8 200f0113 ffffffff [<8000dc80>] (__irq_svc+0x40/0x70) from [<800306e8>] (__do_softirq+0xc8/0x200) [<800306e8>] (__do_softirq+0xc8/0x200) from [<800308b4>] (do_softirq+0x50/0x58) [<800308b4>] (do_softirq+0x50/0x58) from [<80030b50>] (irq_exit+0x9c/0xd0) [<80030b50>] (irq_exit+0x9c/0xd0) from [<8000e94c>] (handle_IRQ+0x44/0x90) [<8000e94c>] (handle_IRQ+0x44/0x90) from [<80008558>] (gic_handle_irq+0x2c/0x5c) [<80008558>] (gic_handle_irq+0x2c/0x5c) from [<8000dc80>] (__irq_svc+0x40/0x70) Exception stack(0x80c71f20 to 0x80c71f68) 1f20: 80c71f68 00000055 05ffdea3 00000014 05fc1b18 00000014 81545130 80c7dd68 1f40: 00000000 00000000 80c70000 80c70000 00000017 80c71f68 8005cfc0 8044a8bc 1f60: 600f0013 ffffffff [<8000dc80>] (__irq_svc+0x40/0x70) from [<8044a8bc>] (cpuidle_enter_state+0x50/0xe0) [<8044a8bc>] (cpuidle_enter_state+0x50/0xe0) from [<8044a9fc>] (cpuidle_idle_call+0xb0/0x148) [<8044a9fc>] (cpuidle_idle_call+0xb0/0x148) from [<8000ec68>] (arch_cpu_idle+0x10/0x54) [<8000ec68>] (arch_cpu_idle+0x10/0x54) from [<8005c894>] (cpu_startup_entry+0x104/0x150) [<8005c894>] (cpu_startup_entry+0x104/0x150) from [<80c26a9c>] (start_kernel+0x324/0x330) Code: bad PC value ---[ end trace 71c853bf79d571a9 ]--- Kernel panic - not syncing: Fatal exception in interrupt Rebooting in 60 seconds.. Signed-off-by: Li Jun <b47624@freescale.com>
* ENGR00322272-2: video: mxc ldb: remove ldb_di_sel from pixel rate setupShawn Guo2014-07-11
| | | | | | | | | | | | | | | | | Since commit 0bec46131d88 (ENGR00318063-8: ARM: imx6q: hide buggy ldb_di_sel from clk API), the mux clock ldb_di_sel becomes unavailable from the clock tree. The LDB driver sets up its pixel clock rate with the help of ldb_di_sel knowledge, and thus causes problem. The net result is the LDB pixel clock rate slows down to 50 MHz (50285714) from the original 64 MHz (64653061) on imx6q. The patch fixes the problem by removing the ldb_di_sel knowledge from the clock configuration path and just setting the rate on div_sel[chno] clock. The bonus point is that we can use chan.vm.pixelclock directly instead of calculating the required rate we need to set on ldb_di_sel_parent. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00322272-1: ARM: imx6sx: hide the buggy ldb_di_sel mux from clk APIShawn Guo2014-07-11
| | | | | | | | | | | | | | | | This is a smilar change for imx6sx clock tree as what we did for imx6q with commit 0bec46131d88 (ENGR00318063-8: ARM: imx6q: hide buggy ldb_di_sel from clk API). As the valid procedure of switching ldb_di_sel on imx6sx is not available yet, we hide this buggy mux by looking at the parent selection done by bootloader and register it statically to clock framework, so that switching this buggy mux becomes impossible. Also, since the bit width of ldb_di_sels is 3, we add two "dummy" entries for ldb_di_sels to avoid out-of-bounds error. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00322379 tty: serial: imx: set uart to cpu mode by defaultFugang Duan2014-07-11
| | | | | | | | | | Now uart cannot work well with CSR/Atheros BT module with SDMA mode. Set it to cpu mode before SDMA mode work. To enable dma mode, just add "fsl,dma-mode" in the device tree for the node. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00322050 net: fec: remove the nonstandard performance optimaztionFugang Duan2014-07-10
| | | | | | | | | | The previous patch is to increase imx6sx enet performance, and then replace wmb() with dmb(), whitch can get more 80Mbps improvement, and don't find any impact. Now enet support TSO feature, remove the nonstandard performance optimaztion. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00322047 net: fec: set ftype for AVB bandwidth reservationFugang Duan2014-07-10
| | | | | | Set the related ftype field for each queue for AVB bandwidth reservation. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00320021-3 pcie:add the pcie reg dumpRichard Zhu2014-07-09
| | | | | | | add the pcie related gpr/anatop reg dump into pcie driver Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00322021-2 pcie:can't access pcie dbi registerRichard Zhu2014-07-09
| | | | | | | | | | | | | fixed the but that the pcie dbi reg can't be accessed on the 2014.04 version. rootcause: pcie phy test power down is set in 2014.04 version uboot. solution: clear the pcie phy test power down in the kernel pcie driver initialization. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00322021-1 pcie: pcie dbi reg can not be accessedRichard Zhu2014-07-09
| | | | | | | fixed the but that the pcie dbi reg can't be accessed on the 2014.04 version. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00321941 ASoC: fsl_spdif: fix that can't get the Rx Sample RateShengjiu Wang2014-07-09
| | | | | | The SRPC register should be volatile, LOCK bit is set by the hardware. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ARM: imx: fix shared gate clockShawn Guo2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | Let's say clock A and B are two gate clocks that share the same register bit in hardware. Therefore they are registered as shared gate clocks with imx_clk_gate2_shared(). In a scenario that only clock A is enabled by clk_enable(A) while B is not used, the shared gate will be unexpectedly disabled in hardware. It happens because clk_enable(A) increments the share_count from 0 to 1, while clock B is unused to clock core, and therefore the core function will just disable B by calling clk->ops->disable() directly. The consequence of that call is share_count is decremented to 0 and the gate is disabled in hardware, even though clock A is still in use. The patch fixes the issue by initializing the share_count per hardware state and returns enable state per share_count from .is_enabled() hook, in case it's a shared gate. While at it, add a check in clk_gate2_disable() to ensure it's never called with a zero share_count. Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Fixes: f9f28cdf2167 ("ARM: imx: add shared gate clock support") Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ENGR00321733 csi: imx6sx: reinitialize csi when resumeRobby Cai2014-07-08
| | | | | | | | | | The CSI will be reset to initial state because dispmix takes effect and power off specific modules when suspend. Hence the reinitialization is needed when resume to make it work properly, otherwise the captured images are not correct. Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit a9705bae9405bbf68a5db13a97e1d94e4ba15683)
* ENGR00321358-2 dts: imx6sx: change m_can message ram to a small sizeDong Aisheng2014-07-04
| | | | | | | | | | We met an issue that access the 0x2600 offset of message ram does not work although the mx6sx spec claims a 16KB size. The reason is still unkown. Change the RAM size to a small size to use the first 2K to avoid such issue. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00321358-1 can: m_can: fix incorrect buffer offsetDong Aisheng2014-07-04
| | | | | | | Each buffer offset already contains the mram_off, so do not need add mram_off again. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00321308 ARM: imx: make sure OCOTP clk is enabled in MSLAnson Huang2014-07-04
| | | | | | | | As some modules need to access ocotp in MSL, so we need to make sure it is enabled during MSL, after kernel boot up, clk dirver will disable it in late init. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00311619 usb: chipidea: core: run resume if controller is at low power modePeter Chen2014-07-04
| | | | | | | | | Controller needs to be active during system suspend, otherwise the core may run resume when the parent is still at suspend if other driver's suspend fails, it occurs before parent's suspend has not started, but the core suspend has finished. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00320792-3 usb: gadget: mark init as late_initcallPeter Chen2014-07-04
| | | | | | | | | | | | | | | | | | | Since we introduce -EPROBE_DEFER for udc driver, it will be probed at late_initcall if it is defered. When the gadget is built in, it will return "couldn't find an available UDC" at such case. That's the problem we met at below link: http://marc.info/?l=linux-usb&m=137706435611447&w=2 We have no driver's probe at gadget driver, so we can't return -EPROBE_DEFER. And it is also not suitable to defer udc_bind_to_driver if the udc is not found temporarily, since it is hard to decide the return value for usb_gadget_probe_driver. Due to above reasons, mark gadget's init as late_initcall may be a moderate solution. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00320792-2 Revert "drivers: usb: udc-core: add deferred bind for gadget ↵Peter Chen2014-07-04
| | | | | | | | driver" This reverts commit 22392a023eee469a7068f1ea77492d5ab9af14f9. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00320792-1 Revert "usb: gadget: remove __init from gadget driver bind ↵Peter Chen2014-07-04
| | | | | | | | function" This reverts commit 6d9f0704e3acf4b754188817974247c1963c1493. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* ENGR00321288 ARM: imx: gpc: fix VADC power off while pu management activeRobin Gong2014-07-04
| | | | | | | | | bit17/bit18 of GPC_CNTR worked as VADC power state control, that's function looks different with other bits of this register: write 1 raise power request and write 0 do nothing. Need read and write only the related bit fields of the register to avoid touch bit17/bit18 on i.mx6sx. Also fix the same for pcie power on/off. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00321246 tty: serial: imx: fix wakeup fail after suspend for more than 30sFugang Duan2014-07-04
| | | | | | | | | | | | Before DMA finish, we have to disable flow control, otherwise there have one corner issue like: Flow control enable, RTS always is high while there have no uart terminal connect to imx uart, and then user transmit data by the uart, after some time, TX FIFO is _FULL_, SDMA still don't complete the current transcation, so hold on. There no SDMA interrupt generate, the "dma_wait" event cannot be waked up. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00320383-2 ARM: imx: fix random failure for ddr3 freq scaling on i.mx6sxAnson Huang2014-07-04
| | | | | | | | | | | Improve DDR3 freq scaling procedure of i.MX6SX: 1. some code of condition check is incorrect; 2. better to keep MMDC command same as ddr script; 3. improve the clock tree change of mmdc path; 4. remove precharge command. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00320383-1 ARM: imx: correct ddr3 busfreq change flow of i.mx6sxAnson Huang2014-07-03
| | | | | | | | | | | Now that we have found the root cause of ddr3 freq scaling of i.MX6SX, we can remove the previous workaround and add correct fix. Revert "ENGR00316496 ARM: imx: fix random failure for ddr3 freq scaling on i.mx6sx" This reverts commit 93510bfa720670b2f80a7f35ffb327f69fcb0f21. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00321119 media: mxc: ADV7180: Support internal vidioc enum frame intervalsLiu Ying2014-07-03
| | | | | | | | This patch adds internal vidioc enum frame intervals support so that the user space may know the frame rate ADV7180 generates. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 7de57c22a1a9ddd06166ffdb4d319fc5c1f6feb7)
* ENGR00311027 gpu:Limit the memory consumption for webglLoren Huang2014-07-03
| | | | | | | | | | | | | -When system memory is less than 200M, we will block further memory allocation for webgl. It's for pass webgl 1.0.2 conformance case conformance/rendering/multisample-cor ruption.html It's a temperory patch from vivante, should be removed in 5.0.11p2. Original patch name:5x_crash_patch.diff Date: Jul 03, 2014 Signed-off-by: Loren Huang <b02279@freescale.com> Acked-by: Shawn Guo
* ENGR00320849-3 ASoC: dmaengine: Audio suspend/resume will be failed.Shengjiu Wang2014-07-03
| | | | | | | | | | | SDMA suspend/resume is not good enough to support audio suspend/resume. So disable audio suspend/resume temporarily. Revert "ENGR00318773-5 ASoC: dmaengine: Merge trigger RESUME to START and SUSPEND to STOP" This reverts commit 29a807b337b0e74460fd3ec699e54eb61183279a. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00320849-2 ASoC: imx-cs42888: disable the delay powerdownShengjiu Wang2014-07-03
| | | | | | | | | | When test asrc p2p first, then test no asrc p2p, There is no sound after 5s. The reason is that the substream is not same for this two case, then delay powerdown will close the widget for cs42888. But the second will also use the cs42888. So set ignore_pmdown_time to 1. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00320849-1 ASoC: cs4xx8: fix the setting of Functional modeShengjiu Wang2014-07-03
| | | | | | | | | | Failed case: arecord -Dhw:0,1 -f S16_LE -r 96000 -c 2 -traw | aplay -Dhw:0,0 -f S16_LE -r 96000 -c 2 -traw. There is no sound when use this case.The reason is that the setting of Functional mode is not correct. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-06 09:46:44 -0400