135 files changed, 5720 insertions, 606 deletions

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 9120717c0701..2aa1908e5ce0 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -535,6 +535,15 @@ config PATA_OPTIDMA
 
           If unsure, say N.
 
+config PATA_PALMLD
+        tristate "Palm LifeDrive PATA support"
+        depends on MACH_PALMLD
+        help
+          This option enables support for Palm LifeDrive's internal ATA
+          port via the new ATA layer.
+
+          If unsure, say N.
+
 config PATA_PCMCIA
         tristate "PCMCIA PATA support"
         depends on PCMCIA
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 7f1ecf99528c..1558059874f0 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_PATA_MPC52xx)	+= pata_mpc52xx.o
 obj-$(CONFIG_PATA_MARVELL)      += pata_marvell.o
 obj-$(CONFIG_PATA_MPIIX)        += pata_mpiix.o
 obj-$(CONFIG_PATA_OLDPIIX)      += pata_oldpiix.o
+obj-$(CONFIG_PATA_PALMLD)       += pata_palmld.o
 obj-$(CONFIG_PATA_PCMCIA)       += pata_pcmcia.o
 obj-$(CONFIG_PATA_PDC2027X)     += pata_pdc2027x.o
 obj-$(CONFIG_PATA_PDC_OLD)      += pata_pdc202xx_old.o
diff --git a/drivers/ata/libata-acpi.c b/drivers/ata/libata-acpi.c
index 6273d98d00eb..ac176da1f94e 100644
--- a/drivers/ata/libata-acpi.c
+++ b/drivers/ata/libata-acpi.c
@@ -748,9 +748,9 @@ static int ata_acpi_run_tf(struct ata_device *dev,
 /**
  * ata_acpi_exec_tfs - get then write drive taskfile settings
  * @dev: target ATA device
- * @nr_executed: out paramter for the number of executed commands
+ * @nr_executed: out parameter for the number of executed commands
  *
- * Evaluate _GTF and excute returned taskfiles.
+ * Evaluate _GTF and execute returned taskfiles.
  *
  * LOCKING:
  * EH context.
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 94919ad03df1..fa22f94ca415 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -2864,7 +2864,7 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link,
 /**
  *      ata_set_mode - Program timings and issue SET FEATURES - XFER
  *      @link: link on which timings will be programmed
- *      @r_failed_dev: out paramter for failed device
+ *      @r_failed_dev: out parameter for failed device
  *
  *      Set ATA device disk transfer mode (PIO3, UDMA6, etc.).  If
  *      ata_set_mode() fails, pointer to the failing device is
diff --git a/drivers/ata/pata_palmld.c b/drivers/ata/pata_palmld.c
new file mode 100644
index 000000000000..11fb4ccc74b4
--- /dev/null
+++ b/drivers/ata/pata_palmld.c
@@ -0,0 +1,150 @@
+/*
+ * drivers/ata/pata_palmld.c
+ *
+ * Driver for IDE channel in Palm LifeDrive
+ *
+ * Based on research of:
+ *              Alex Osborne <ato@meshy.org>
+ *
+ * Rewrite for mainline:
+ *              Marek Vasut <marek.vasut@gmail.com>
+ *
+ * Rewritten version based on pata_ixp4xx_cf.c:
+ * ixp4xx PATA/Compact Flash driver
+ * Copyright (C) 2006-07 Tower Technologies
+ * Author: Alessandro Zummo <a.zummo@towertech.it>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/libata.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+
+#include <scsi/scsi_host.h>
+#include <mach/palmld.h>
+
+#define DRV_NAME "pata_palmld"
+
+static struct scsi_host_template palmld_sht = {
+        ATA_PIO_SHT(DRV_NAME),
+};
+
+static struct ata_port_operations palmld_port_ops = {
+        .inherits               = &ata_sff_port_ops,
+        .sff_data_xfer          = ata_sff_data_xfer_noirq,
+        .cable_detect           = ata_cable_40wire,
+};
+
+static __devinit int palmld_pata_probe(struct platform_device *pdev)
+{
+        struct ata_host *host;
+        struct ata_port *ap;
+        void __iomem *mem;
+        int ret;
+
+        /* allocate host */
+        host = ata_host_alloc(&pdev->dev, 1);
+        if (!host)
+                return -ENOMEM;
+
+        /* remap drive's physical memory address */
+        mem = devm_ioremap(&pdev->dev, PALMLD_IDE_PHYS, 0x1000);
+        if (!mem)
+                return -ENOMEM;
+
+        /* request and activate power GPIO, IRQ GPIO */
+        ret = gpio_request(GPIO_NR_PALMLD_IDE_PWEN, "HDD PWR");
+        if (ret)
+                goto err1;
+        ret = gpio_direction_output(GPIO_NR_PALMLD_IDE_PWEN, 1);
+        if (ret)
+                goto err2;
+
+        ret = gpio_request(GPIO_NR_PALMLD_IDE_RESET, "HDD RST");
+        if (ret)
+                goto err2;
+        ret = gpio_direction_output(GPIO_NR_PALMLD_IDE_RESET, 0);
+        if (ret)
+                goto err3;
+
+        /* reset the drive */
+        gpio_set_value(GPIO_NR_PALMLD_IDE_RESET, 0);
+        msleep(30);
+        gpio_set_value(GPIO_NR_PALMLD_IDE_RESET, 1);
+        msleep(30);
+
+        /* setup the ata port */
+        ap = host->ports[0];
+        ap->ops = &palmld_port_ops;
+        ap->pio_mask = ATA_PIO4;
+        ap->flags |= ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY | ATA_FLAG_PIO_POLLING;
+
+        /* memory mapping voodoo */
+        ap->ioaddr.cmd_addr = mem + 0x10;
+        ap->ioaddr.altstatus_addr = mem + 0xe;
+        ap->ioaddr.ctl_addr = mem + 0xe;
+
+        /* start the port */
+        ata_sff_std_ports(&ap->ioaddr);
+
+        /* activate host */
+        return ata_host_activate(host, 0, NULL, IRQF_TRIGGER_RISING,
+                                        &palmld_sht);
+
+err3:
+        gpio_free(GPIO_NR_PALMLD_IDE_RESET);
+err2:
+        gpio_free(GPIO_NR_PALMLD_IDE_PWEN);
+err1:
+        return ret;
+}
+
+static __devexit int palmld_pata_remove(struct platform_device *dev)
+{
+        struct ata_host *host = platform_get_drvdata(dev);
+
+        ata_host_detach(host);
+
+        /* power down the HDD */
+        gpio_set_value(GPIO_NR_PALMLD_IDE_PWEN, 0);
+
+        gpio_free(GPIO_NR_PALMLD_IDE_RESET);
+        gpio_free(GPIO_NR_PALMLD_IDE_PWEN);
+
+        return 0;
+}
+
+static struct platform_driver palmld_pata_platform_driver = {
+        .driver  = {
+                .name   = DRV_NAME,
+                .owner  = THIS_MODULE,
+        },
+        .probe          = palmld_pata_probe,
+        .remove         = __devexit_p(palmld_pata_remove),
+};
+
+static int __init palmld_pata_init(void)
+{
+        return platform_driver_register(&palmld_pata_platform_driver);
+}
+
+static void __exit palmld_pata_exit(void)
+{
+        platform_driver_unregister(&palmld_pata_platform_driver);
+}
+
+MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
+MODULE_DESCRIPTION("PalmLD PATA driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" DRV_NAME);
+
+module_init(palmld_pata_init);
+module_exit(palmld_pata_exit);
diff --git a/drivers/base/bus.c b/drivers/base/bus.c
index c6599618523e..4b04a15146d7 100644
--- a/drivers/base/bus.c
+++ b/drivers/base/bus.c
@@ -279,7 +279,7 @@ static struct device *next_device(struct klist_iter *i)
  *
  * NOTE: The device that returns a non-zero value is not retained
  * in any way, nor is its refcount incremented. If the caller needs
- * to retain this data, it should do, and increment the reference
+ * to retain this data, it should do so, and increment the reference
  * count in the supplied callback.
  */
 int bus_for_each_dev(struct bus_type *bus, struct device *start,
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index ac5e05a98b2f..bb72ada9f074 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -112,7 +112,7 @@ config GDROM
           with up to 1 GB of data. This drive will also read standard CD ROM
           disks. Select this option to access any disks in your GD ROM drive.
           Most users will want to say "Y" here.
-          You can also build this as a module which will be called gdrom.ko
+          You can also build this as a module which will be called gdrom.
 
 source "drivers/block/paride/Kconfig"
 
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index b1e9652c0d9d..30bae6de6a0d 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -692,7 +692,7 @@ config HVCS
           this driver.
 
           To compile this driver as a module, choose M here: the
-          module will be called hvcs.ko.  Additionally, this module
+          module will be called hvcs.  Additionally, this module
           will depend on arch specific APIs exported from hvcserver.ko
           which will also be compiled when this driver is built as a
           module.
diff --git a/drivers/char/amiserial.c b/drivers/char/amiserial.c
index fd3ebd1be570..72429b6b2fa8 100644
--- a/drivers/char/amiserial.c
+++ b/drivers/char/amiserial.c
@@ -779,7 +779,7 @@ static void change_speed(struct async_struct *info,
                 info->IER |= UART_IER_MSI;
         }
         /* TBD:
-         * Does clearing IER_MSI imply that we should disbale the VBL interrupt ?
+         * Does clearing IER_MSI imply that we should disable the VBL interrupt ?
          */
 
         /*
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 5fab6470f4b2..f4b3f7293feb 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -88,7 +88,7 @@ config HW_RANDOM_N2RNG
 
 config HW_RANDOM_VIA
         tristate "VIA HW Random Number Generator support"
-        depends on HW_RANDOM && X86_32
+        depends on HW_RANDOM && X86
         default HW_RANDOM
         ---help---
           This driver provides kernel-side support for the Random Number
@@ -148,3 +148,15 @@ config HW_RANDOM_VIRTIO
 
           To compile this driver as a module, choose M here: the
           module will be called virtio-rng.  If unsure, say N.
+
+config HW_RANDOM_MXC_RNGA
+        tristate "Freescale i.MX RNGA Random Number Generator"
+        depends on HW_RANDOM && ARCH_HAS_RNGA
+        ---help---
+          This driver provides kernel-side support for the Random Number
+          Generator hardware found on Freescale i.MX processors.
+
+          To compile this driver as a module, choose M here: the
+          module will be called mxc-rnga.
+
+          If unsure, say Y.
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index e81d21a5f28f..fd1ecd2f6731 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_HW_RANDOM_IXP4XX) += ixp4xx-rng.o
 obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
 obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o
 obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o
+obj-$(CONFIG_HW_RANDOM_MXC_RNGA) += mxc-rnga.o
diff --git a/drivers/char/hw_random/mxc-rnga.c b/drivers/char/hw_random/mxc-rnga.c
new file mode 100644
index 000000000000..187c6be80f43
--- /dev/null
+++ b/drivers/char/hw_random/mxc-rnga.c
@@ -0,0 +1,247 @@
+/*
+ * RNG driver for Freescale RNGA
+ *
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Author: Alan Carvalho de Assis <acassis@gmail.com>
+ */
+
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ * This driver is based on other RNG drivers.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/hw_random.h>
+#include <linux/io.h>
+
+/* RNGA Registers */
+#define RNGA_CONTROL                    0x00
+#define RNGA_STATUS                     0x04
+#define RNGA_ENTROPY                    0x08
+#define RNGA_OUTPUT_FIFO                0x0c
+#define RNGA_MODE                       0x10
+#define RNGA_VERIFICATION_CONTROL       0x14
+#define RNGA_OSC_CONTROL_COUNTER        0x18
+#define RNGA_OSC1_COUNTER               0x1c
+#define RNGA_OSC2_COUNTER               0x20
+#define RNGA_OSC_COUNTER_STATUS         0x24
+
+/* RNGA Registers Range */
+#define RNG_ADDR_RANGE                  0x28
+
+/* RNGA Control Register */
+#define RNGA_CONTROL_SLEEP              0x00000010
+#define RNGA_CONTROL_CLEAR_INT          0x00000008
+#define RNGA_CONTROL_MASK_INTS          0x00000004
+#define RNGA_CONTROL_HIGH_ASSURANCE     0x00000002
+#define RNGA_CONTROL_GO                 0x00000001
+
+#define RNGA_STATUS_LEVEL_MASK          0x0000ff00
+
+/* RNGA Status Register */
+#define RNGA_STATUS_OSC_DEAD            0x80000000
+#define RNGA_STATUS_SLEEP               0x00000010
+#define RNGA_STATUS_ERROR_INT           0x00000008
+#define RNGA_STATUS_FIFO_UNDERFLOW      0x00000004
+#define RNGA_STATUS_LAST_READ_STATUS    0x00000002
+#define RNGA_STATUS_SECURITY_VIOLATION  0x00000001
+
+static struct platform_device *rng_dev;
+
+static int mxc_rnga_data_present(struct hwrng *rng)
+{
+        int level;
+        void __iomem *rng_base = (void __iomem *)rng->priv;
+
+        /* how many random numbers is in FIFO? [0-16] */
+        level = ((__raw_readl(rng_base + RNGA_STATUS) &
+                        RNGA_STATUS_LEVEL_MASK) >> 8);
+
+        return level > 0 ? 1 : 0;
+}
+
+static int mxc_rnga_data_read(struct hwrng *rng, u32 * data)
+{
+        int err;
+        u32 ctrl;
+        void __iomem *rng_base = (void __iomem *)rng->priv;
+
+        /* retrieve a random number from FIFO */
+        *data = __raw_readl(rng_base + RNGA_OUTPUT_FIFO);
+
+        /* some error while reading this random number? */
+        err = __raw_readl(rng_base + RNGA_STATUS) & RNGA_STATUS_ERROR_INT;
+
+        /* if error: clear error interrupt, but doesn't return random number */
+        if (err) {
+                dev_dbg(&rng_dev->dev, "Error while reading random number!\n");
+                ctrl = __raw_readl(rng_base + RNGA_CONTROL);
+                __raw_writel(ctrl | RNGA_CONTROL_CLEAR_INT,
+                                        rng_base + RNGA_CONTROL);
+                return 0;
+        } else
+                return 4;
+}
+
+static int mxc_rnga_init(struct hwrng *rng)
+{
+        u32 ctrl, osc;
+        void __iomem *rng_base = (void __iomem *)rng->priv;
+
+        /* wake up */
+        ctrl = __raw_readl(rng_base + RNGA_CONTROL);
+        __raw_writel(ctrl & ~RNGA_CONTROL_SLEEP, rng_base + RNGA_CONTROL);
+
+        /* verify if oscillator is working */
+        osc = __raw_readl(rng_base + RNGA_STATUS);
+        if (osc & RNGA_STATUS_OSC_DEAD) {
+                dev_err(&rng_dev->dev, "RNGA Oscillator is dead!\n");
+                return -ENODEV;
+        }
+
+        /* go running */
+        ctrl = __raw_readl(rng_base + RNGA_CONTROL);
+        __raw_writel(ctrl | RNGA_CONTROL_GO, rng_base + RNGA_CONTROL);
+
+        return 0;
+}
+
+static void mxc_rnga_cleanup(struct hwrng *rng)
+{
+        u32 ctrl;
+        void __iomem *rng_base = (void __iomem *)rng->priv;
+
+        ctrl = __raw_readl(rng_base + RNGA_CONTROL);
+
+        /* stop rnga */
+        __raw_writel(ctrl & ~RNGA_CONTROL_GO, rng_base + RNGA_CONTROL);
+}
+
+static struct hwrng mxc_rnga = {
+        .name = "mxc-rnga",
+        .init = mxc_rnga_init,
+        .cleanup = mxc_rnga_cleanup,
+        .data_present = mxc_rnga_data_present,
+        .data_read = mxc_rnga_data_read
+};
+
+static int __init mxc_rnga_probe(struct platform_device *pdev)
+{
+        int err = -ENODEV;
+        struct clk *clk;
+        struct resource *res, *mem;
+        void __iomem *rng_base = NULL;
+
+        if (rng_dev)
+                return -EBUSY;
+
+        clk = clk_get(&pdev->dev, "rng");
+        if (IS_ERR(clk)) {
+                dev_err(&pdev->dev, "Could not get rng_clk!\n");
+                err = PTR_ERR(clk);
+                goto out;
+        }
+
+        clk_enable(clk);
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                err = -ENOENT;
+                goto err_region;
+        }
+
+        mem = request_mem_region(res->start, resource_size(res), pdev->name);
+        if (mem == NULL) {
+                err = -EBUSY;
+                goto err_region;
+        }
+
+        rng_base = ioremap(res->start, resource_size(res));
+        if (!rng_base) {
+                err = -ENOMEM;
+                goto err_ioremap;
+        }
+
+        mxc_rnga.priv = (unsigned long)rng_base;
+
+        err = hwrng_register(&mxc_rnga);
+        if (err) {
+                dev_err(&pdev->dev, "MXC RNGA registering failed (%d)\n", err);
+                goto err_register;
+        }
+
+        rng_dev = pdev;
+
+        dev_info(&pdev->dev, "MXC RNGA Registered.\n");
+
+        return 0;
+
+err_register:
+        iounmap(rng_base);
+        rng_base = NULL;
+
+err_ioremap:
+        release_mem_region(res->start, resource_size(res));
+
+err_region:
+        clk_disable(clk);
+        clk_put(clk);
+
+out:
+        return err;
+}
+
+static int __exit mxc_rnga_remove(struct platform_device *pdev)
+{
+        struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        void __iomem *rng_base = (void __iomem *)mxc_rnga.priv;
+        struct clk *clk = clk_get(&pdev->dev, "rng");
+
+        hwrng_unregister(&mxc_rnga);
+
+        iounmap(rng_base);
+
+        release_mem_region(res->start, resource_size(res));
+
+        clk_disable(clk);
+        clk_put(clk);
+
+        return 0;
+}
+
+static struct platform_driver mxc_rnga_driver = {
+        .driver = {
+                   .name = "mxc_rnga",
+                   .owner = THIS_MODULE,
+                   },
+        .remove = __exit_p(mxc_rnga_remove),
+};
+
+static int __init mod_init(void)
+{
+        return platform_driver_probe(&mxc_rnga_driver, mxc_rnga_probe);
+}
+
+static void __exit mod_exit(void)
+{
+        platform_driver_unregister(&mxc_rnga_driver);
+}
+
+module_init(mod_init);
+module_exit(mod_exit);
+
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("H/W RNGA driver for i.MX");
+MODULE_LICENSE("GPL");
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index 538313f9e7ac..00dd3de1be51 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -89,7 +89,7 @@ static struct hwrng omap_rng_ops = {
         .data_read      = omap_rng_data_read,
 };
 
-static int __init omap_rng_probe(struct platform_device *pdev)
+static int __devinit omap_rng_probe(struct platform_device *pdev)
 {
         struct resource *res, *mem;
         int ret;
diff --git a/drivers/char/hw_random/timeriomem-rng.c b/drivers/char/hw_random/timeriomem-rng.c
index dcd352ad0e7f..a94e930575f2 100644
--- a/drivers/char/hw_random/timeriomem-rng.c
+++ b/drivers/char/hw_random/timeriomem-rng.c
@@ -88,9 +88,9 @@ static struct hwrng timeriomem_rng_ops = {
         .priv           = 0,
 };
 
-static int __init timeriomem_rng_probe(struct platform_device *pdev)
+static int __devinit timeriomem_rng_probe(struct platform_device *pdev)
 {
-        struct resource *res, *mem;
+        struct resource *res;
         int ret;
 
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -98,21 +98,12 @@ static int __init timeriomem_rng_probe(struct platform_device *pdev)
         if (!res)
                 return -ENOENT;
 
-        mem = request_mem_region(res->start, res->end - res->start + 1,
-                                 pdev->name);
-        if (mem == NULL)
-                return -EBUSY;
-
-        dev_set_drvdata(&pdev->dev, mem);
-
         timeriomem_rng_data = pdev->dev.platform_data;
 
         timeriomem_rng_data->address = ioremap(res->start,
                                                 res->end - res->start + 1);
-        if (!timeriomem_rng_data->address) {
-                ret = -ENOMEM;
-                goto err_ioremap;
-        }
+        if (!timeriomem_rng_data->address)
+                return -EIO;
 
         if (timeriomem_rng_data->period != 0
                 && usecs_to_jiffies(timeriomem_rng_data->period) > 0) {
@@ -125,7 +116,7 @@ static int __init timeriomem_rng_probe(struct platform_device *pdev)
 
         ret = hwrng_register(&timeriomem_rng_ops);
         if (ret)
-                goto err_register;
+                goto failed;
 
         dev_info(&pdev->dev, "32bits from 0x%p @ %dus\n",
                         timeriomem_rng_data->address,
@@ -133,24 +124,19 @@ static int __init timeriomem_rng_probe(struct platform_device *pdev)
 
         return 0;
 
-err_register:
+failed:
         dev_err(&pdev->dev, "problem registering\n");
         iounmap(timeriomem_rng_data->address);
-err_ioremap:
-        release_resource(mem);
 
         return ret;
 }
 
 static int __devexit timeriomem_rng_remove(struct platform_device *pdev)
 {
-        struct resource *mem = dev_get_drvdata(&pdev->dev);
-
         del_timer_sync(&timeriomem_rng_timer);
         hwrng_unregister(&timeriomem_rng_ops);
 
         iounmap(timeriomem_rng_data->address);
-        release_resource(mem);
 
         return 0;
 }
diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
index 4e9573c1d39e..794aacb715c1 100644
--- a/drivers/char/hw_random/via-rng.c
+++ b/drivers/char/hw_random/via-rng.c
@@ -132,6 +132,19 @@ static int via_rng_init(struct hwrng *rng)
         struct cpuinfo_x86 *c = &cpu_data(0);
         u32 lo, hi, old_lo;
 
+        /* VIA Nano CPUs don't have the MSR_VIA_RNG anymore.  The RNG
+         * is always enabled if CPUID rng_en is set.  There is no
+         * RNG configuration like it used to be the case in this
+         * register */
+        if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
+                if (!cpu_has_xstore_enabled) {
+                        printk(KERN_ERR PFX "can't enable hardware RNG "
+                                "if XSTORE is not enabled\n");
+                        return -ENODEV;
+                }
+                return 0;
+        }
+
         /* Control the RNG via MSR.  Tread lightly and pay very close
          * close attention to values written, as the reserved fields
          * are documented to be "undefined and unpredictable"; but it
@@ -205,5 +218,5 @@ static void __exit mod_exit(void)
 module_init(mod_init);
 module_exit(mod_exit);
 
-MODULE_DESCRIPTION("H/W RNG driver for VIA chipsets");
+MODULE_DESCRIPTION("H/W RNG driver for VIA CPU with PadLock");
 MODULE_LICENSE("GPL");
diff --git a/drivers/connector/Kconfig b/drivers/connector/Kconfig
index 100bfd422066..6e6730f9dfd1 100644
--- a/drivers/connector/Kconfig
+++ b/drivers/connector/Kconfig
@@ -7,7 +7,7 @@ menuconfig CONNECTOR
           of the netlink socket protocol.
 
           Connector support can also be built as a module.  If so, the module
-          will be called cn.ko.
+          will be called cn.
 
 if CONNECTOR
 
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 01afd758072f..5b27692372bf 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -12,7 +12,7 @@ if CRYPTO_HW
 
 config CRYPTO_DEV_PADLOCK
         tristate "Support for VIA PadLock ACE"
-        depends on X86_32 && !UML
+        depends on X86 && !UML
         select CRYPTO_ALGAPI
         help
           Some VIA processors come with an integrated crypto engine
@@ -34,7 +34,7 @@ config CRYPTO_DEV_PADLOCK_AES
           Available in VIA C3 and newer CPUs.
 
           If unsure say M. The compiled module will be
-          called padlock-aes.ko
+          called padlock-aes.
 
 config CRYPTO_DEV_PADLOCK_SHA
         tristate "PadLock driver for SHA1 and SHA256 algorithms"
@@ -47,7 +47,7 @@ config CRYPTO_DEV_PADLOCK_SHA
           Available in VIA C7 and newer processors.
 
           If unsure say M. The compiled module will be
-          called padlock-sha.ko
+          called padlock-sha.
 
 config CRYPTO_DEV_GEODE
         tristate "Support for the Geode LX AES engine"
@@ -79,7 +79,7 @@ config ZCRYPT_MONOLITHIC
         bool "Monolithic zcrypt module"
         depends on ZCRYPT="m"
         help
-          Select this option if you want to have a single module z90crypt.ko
+          Select this option if you want to have a single module z90crypt,
           that contains all parts of the crypto device driver (ap bus,
           request router and all the card drivers).
 
diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index 2bef086fb342..5f753fc08730 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -2564,7 +2564,7 @@ static void hifn_tasklet_callback(unsigned long data)
                 hifn_process_queue(dev);
 }
 
-static int hifn_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+static int __devinit hifn_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 {
         int err, i;
         struct hifn_device *dev;
@@ -2696,7 +2696,7 @@ err_out_disable_pci_device:
         return err;
 }
 
-static void hifn_remove(struct pci_dev *pdev)
+static void __devexit hifn_remove(struct pci_dev *pdev)
 {
         int i;
         struct hifn_device *dev;
@@ -2744,7 +2744,7 @@ static struct pci_driver hifn_pci_driver = {
         .remove   = __devexit_p(hifn_remove),
 };
 
-static int __devinit hifn_init(void)
+static int __init hifn_init(void)
 {
         unsigned int freq;
         int err;
@@ -2789,7 +2789,7 @@ static int __devinit hifn_init(void)
         return 0;
 }
 
-static void __devexit hifn_fini(void)
+static void __exit hifn_fini(void)
 {
         pci_unregister_driver(&hifn_pci_driver);
 
diff --git a/drivers/crypto/padlock-aes.c b/drivers/crypto/padlock-aes.c
index 856b3cc25583..87f92c39b5f0 100644
--- a/drivers/crypto/padlock-aes.c
+++ b/drivers/crypto/padlock-aes.c
@@ -154,7 +154,11 @@ static inline void padlock_reset_key(struct cword *cword)
         int cpu = raw_smp_processor_id();
 
         if (cword != per_cpu(last_cword, cpu))
+#ifndef CONFIG_X86_64
                 asm volatile ("pushfl; popfl");
+#else
+                asm volatile ("pushfq; popfq");
+#endif
 }
 
 static inline void padlock_store_cword(struct cword *cword)
@@ -208,10 +212,19 @@ static inline void padlock_xcrypt_ecb(const u8 *input, u8 *output, void *key,
 
         asm volatile ("test $1, %%cl;"
                       "je 1f;"
+#ifndef CONFIG_X86_64
                       "lea -1(%%ecx), %%eax;"
                       "mov $1, %%ecx;"
+#else
+                      "lea -1(%%rcx), %%rax;"
+                      "mov $1, %%rcx;"
+#endif
                       ".byte 0xf3,0x0f,0xa7,0xc8;"      /* rep xcryptecb */
+#ifndef CONFIG_X86_64
                       "mov %%eax, %%ecx;"
+#else
+                      "mov %%rax, %%rcx;"
+#endif
                       "1:"
                       ".byte 0xf3,0x0f,0xa7,0xc8"       /* rep xcryptecb */
                       : "+S"(input), "+D"(output)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index a3918c16b3db..c70775fd3ce2 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -44,6 +44,8 @@
 #include <crypto/sha.h>
 #include <crypto/aead.h>
 #include <crypto/authenc.h>
+#include <crypto/skcipher.h>
+#include <crypto/scatterwalk.h>
 
 #include "talitos.h"
 
@@ -339,7 +341,8 @@ static void flush_channel(struct device *dev, int ch, int error, int reset_ch)
                                 status = error;
 
                 dma_unmap_single(dev, request->dma_desc,
-                        sizeof(struct talitos_desc), DMA_BIDIRECTIONAL);
+                                 sizeof(struct talitos_desc),
+                                 DMA_BIDIRECTIONAL);
 
                 /* copy entries so we can call callback outside lock */
                 saved_req.desc = request->desc;
@@ -413,7 +416,8 @@ static struct talitos_desc *current_desc(struct device *dev, int ch)
 /*
  * user diagnostics; report root cause of error based on execution unit status
  */
-static void report_eu_error(struct device *dev, int ch, struct talitos_desc *desc)
+static void report_eu_error(struct device *dev, int ch,
+                            struct talitos_desc *desc)
 {
         struct talitos_private *priv = dev_get_drvdata(dev);
         int i;
@@ -684,8 +688,8 @@ struct talitos_ctx {
         unsigned int authsize;
 };
 
-static int aead_authenc_setauthsize(struct crypto_aead *authenc,
-                                                 unsigned int authsize)
+static int aead_setauthsize(struct crypto_aead *authenc,
+                            unsigned int authsize)
 {
         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
 
@@ -694,8 +698,8 @@ static int aead_authenc_setauthsize(struct crypto_aead *authenc,
         return 0;
 }
 
-static int aead_authenc_setkey(struct crypto_aead *authenc,
-                                            const u8 *key, unsigned int keylen)
+static int aead_setkey(struct crypto_aead *authenc,
+                       const u8 *key, unsigned int keylen)
 {
         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
         struct rtattr *rta = (void *)key;
@@ -740,7 +744,7 @@ badkey:
 }
 
 /*
- * ipsec_esp_edesc - s/w-extended ipsec_esp descriptor
+ * talitos_edesc - s/w-extended descriptor
  * @src_nents: number of segments in input scatterlist
  * @dst_nents: number of segments in output scatterlist
  * @dma_len: length of dma mapped link_tbl space
@@ -752,17 +756,67 @@ badkey:
  * is greater than 1, an integrity check value is concatenated to the end
  * of link_tbl data
  */
-struct ipsec_esp_edesc {
+struct talitos_edesc {
         int src_nents;
         int dst_nents;
+        int src_is_chained;
+        int dst_is_chained;
         int dma_len;
         dma_addr_t dma_link_tbl;
         struct talitos_desc desc;
         struct talitos_ptr link_tbl[0];
 };
 
+static int talitos_map_sg(struct device *dev, struct scatterlist *sg,
+                          unsigned int nents, enum dma_data_direction dir,
+                          int chained)
+{
+        if (unlikely(chained))
+                while (sg) {
+                        dma_map_sg(dev, sg, 1, dir);
+                        sg = scatterwalk_sg_next(sg);
+                }
+        else
+                dma_map_sg(dev, sg, nents, dir);
+        return nents;
+}
+
+static void talitos_unmap_sg_chain(struct device *dev, struct scatterlist *sg,
+                                   enum dma_data_direction dir)
+{
+        while (sg) {
+                dma_unmap_sg(dev, sg, 1, dir);
+                sg = scatterwalk_sg_next(sg);
+        }
+}
+
+static void talitos_sg_unmap(struct device *dev,
+                             struct talitos_edesc *edesc,
+                             struct scatterlist *src,
+                             struct scatterlist *dst)
+{
+        unsigned int src_nents = edesc->src_nents ? : 1;
+        unsigned int dst_nents = edesc->dst_nents ? : 1;
+
+        if (src != dst) {
+                if (edesc->src_is_chained)
+                        talitos_unmap_sg_chain(dev, src, DMA_TO_DEVICE);
+                else
+                        dma_unmap_sg(dev, src, src_nents, DMA_TO_DEVICE);
+
+                if (edesc->dst_is_chained)
+                        talitos_unmap_sg_chain(dev, dst, DMA_FROM_DEVICE);
+                else
+                        dma_unmap_sg(dev, dst, dst_nents, DMA_FROM_DEVICE);
+        } else
+                if (edesc->src_is_chained)
+                        talitos_unmap_sg_chain(dev, src, DMA_BIDIRECTIONAL);
+                else
+                        dma_unmap_sg(dev, src, src_nents, DMA_BIDIRECTIONAL);
+}
+
 static void ipsec_esp_unmap(struct device *dev,
-                            struct ipsec_esp_edesc *edesc,
+                            struct talitos_edesc *edesc,
                             struct aead_request *areq)
 {
         unmap_single_talitos_ptr(dev, &edesc->desc.ptr[6], DMA_FROM_DEVICE);
@@ -772,15 +826,7 @@ static void ipsec_esp_unmap(struct device *dev,
 
         dma_unmap_sg(dev, areq->assoc, 1, DMA_TO_DEVICE);
 
-        if (areq->src != areq->dst) {
-                dma_unmap_sg(dev, areq->src, edesc->src_nents ? : 1,
-                             DMA_TO_DEVICE);
-                dma_unmap_sg(dev, areq->dst, edesc->dst_nents ? : 1,
-                             DMA_FROM_DEVICE);
-        } else {
-                dma_unmap_sg(dev, areq->src, edesc->src_nents ? : 1,
-                             DMA_BIDIRECTIONAL);
-        }
+        talitos_sg_unmap(dev, edesc, areq->src, areq->dst);
 
         if (edesc->dma_len)
                 dma_unmap_single(dev, edesc->dma_link_tbl, edesc->dma_len,
@@ -795,13 +841,14 @@ static void ipsec_esp_encrypt_done(struct device *dev,
                                    int err)
 {
         struct aead_request *areq = context;
-        struct ipsec_esp_edesc *edesc =
-                 container_of(desc, struct ipsec_esp_edesc, desc);
         struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
+        struct talitos_edesc *edesc;
         struct scatterlist *sg;
         void *icvdata;
 
+        edesc = container_of(desc, struct talitos_edesc, desc);
+
         ipsec_esp_unmap(dev, edesc, areq);
 
         /* copy the generated ICV to dst */
@@ -819,17 +866,18 @@ static void ipsec_esp_encrypt_done(struct device *dev,
 }
 
 static void ipsec_esp_decrypt_swauth_done(struct device *dev,
-                                   struct talitos_desc *desc, void *context,
-                                   int err)
+                                          struct talitos_desc *desc,
+                                          void *context, int err)
 {
         struct aead_request *req = context;
-        struct ipsec_esp_edesc *edesc =
-                 container_of(desc, struct ipsec_esp_edesc, desc);
         struct crypto_aead *authenc = crypto_aead_reqtfm(req);
         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
+        struct talitos_edesc *edesc;
         struct scatterlist *sg;
         void *icvdata;
 
+        edesc = container_of(desc, struct talitos_edesc, desc);
+
         ipsec_esp_unmap(dev, edesc, req);
 
         if (!err) {
@@ -851,20 +899,20 @@ static void ipsec_esp_decrypt_swauth_done(struct device *dev,
 }
 
 static void ipsec_esp_decrypt_hwauth_done(struct device *dev,
-                                   struct talitos_desc *desc, void *context,
-                                   int err)
+                                          struct talitos_desc *desc,
+                                          void *context, int err)
 {
         struct aead_request *req = context;
-        struct ipsec_esp_edesc *edesc =
-                 container_of(desc, struct ipsec_esp_edesc, desc);
+        struct talitos_edesc *edesc;
+
+        edesc = container_of(desc, struct talitos_edesc, desc);
 
         ipsec_esp_unmap(dev, edesc, req);
 
         /* check ICV auth status */
-        if (!err)
-                if ((desc->hdr_lo & DESC_HDR_LO_ICCR1_MASK) !=
-                    DESC_HDR_LO_ICCR1_PASS)
-                        err = -EBADMSG;
+        if (!err && ((desc->hdr_lo & DESC_HDR_LO_ICCR1_MASK) !=
+                     DESC_HDR_LO_ICCR1_PASS))
+                err = -EBADMSG;
 
         kfree(edesc);
 
@@ -886,7 +934,7 @@ static int sg_to_link_tbl(struct scatterlist *sg, int sg_count,
                 link_tbl_ptr->j_extent = 0;
                 link_tbl_ptr++;
                 cryptlen -= sg_dma_len(sg);
-                sg = sg_next(sg);
+                sg = scatterwalk_sg_next(sg);
         }
 
         /* adjust (decrease) last one (or two) entry's len to cryptlen */
@@ -910,7 +958,7 @@ static int sg_to_link_tbl(struct scatterlist *sg, int sg_count,
 /*
  * fill in and submit ipsec_esp descriptor
  */
-static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
+static int ipsec_esp(struct talitos_edesc *edesc, struct aead_request *areq,
                      u8 *giv, u64 seq,
                      void (*callback) (struct device *dev,
                                        struct talitos_desc *desc,
@@ -952,32 +1000,31 @@ static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
         desc->ptr[4].len = cpu_to_be16(cryptlen);
         desc->ptr[4].j_extent = authsize;
 
-        if (areq->src == areq->dst)
-                sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ? : 1,
-                                      DMA_BIDIRECTIONAL);
-        else
-                sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ? : 1,
-                                      DMA_TO_DEVICE);
+        sg_count = talitos_map_sg(dev, areq->src, edesc->src_nents ? : 1,
+                                  (areq->src == areq->dst) ? DMA_BIDIRECTIONAL
+                                                           : DMA_TO_DEVICE,
+                                  edesc->src_is_chained);
 
         if (sg_count == 1) {
                 desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
         } else {
                 sg_link_tbl_len = cryptlen;
 
-                if ((edesc->desc.hdr & DESC_HDR_MODE1_MDEU_CICV) &&
-                        (edesc->desc.hdr & DESC_HDR_MODE0_ENCRYPT) == 0) {
+                if (edesc->desc.hdr & DESC_HDR_MODE1_MDEU_CICV)
                         sg_link_tbl_len = cryptlen + authsize;
-                }
+
                 sg_count = sg_to_link_tbl(areq->src, sg_count, sg_link_tbl_len,
                                           &edesc->link_tbl[0]);
                 if (sg_count > 1) {
                         desc->ptr[4].j_extent |= DESC_PTR_LNKTBL_JUMP;
                         desc->ptr[4].ptr = cpu_to_be32(edesc->dma_link_tbl);
-                        dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
-                                                   edesc->dma_len, DMA_BIDIRECTIONAL);
+                        dma_sync_single_for_device(dev, edesc->dma_link_tbl,
+                                                   edesc->dma_len,
+                                                   DMA_BIDIRECTIONAL);
                 } else {
                         /* Only one segment now, so no link tbl needed */
-                        desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
+                        desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->
+                                                                      src));
                 }
         }
 
@@ -985,10 +1032,11 @@ static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
         desc->ptr[5].len = cpu_to_be16(cryptlen);
         desc->ptr[5].j_extent = authsize;
 
-        if (areq->src != areq->dst) {
-                sg_count = dma_map_sg(dev, areq->dst, edesc->dst_nents ? : 1,
-                                      DMA_FROM_DEVICE);
-        }
+        if (areq->src != areq->dst)
+                sg_count = talitos_map_sg(dev, areq->dst,
+                                          edesc->dst_nents ? : 1,
+                                          DMA_FROM_DEVICE,
+                                          edesc->dst_is_chained);
 
         if (sg_count == 1) {
                 desc->ptr[5].ptr = cpu_to_be32(sg_dma_address(areq->dst));
@@ -1033,49 +1081,55 @@ static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
         return ret;
 }
 
-
 /*
  * derive number of elements in scatterlist
  */
-static int sg_count(struct scatterlist *sg_list, int nbytes)
+static int sg_count(struct scatterlist *sg_list, int nbytes, int *chained)
 {
         struct scatterlist *sg = sg_list;
         int sg_nents = 0;
 
-        while (nbytes) {
+        *chained = 0;
+        while (nbytes > 0) {
                 sg_nents++;
                 nbytes -= sg->length;
-                sg = sg_next(sg);
+                if (!sg_is_last(sg) && (sg + 1)->length == 0)
+                        *chained = 1;
+                sg = scatterwalk_sg_next(sg);
         }
 
         return sg_nents;
 }
 
 /*
- * allocate and map the ipsec_esp extended descriptor
+ * allocate and map the extended descriptor
  */
-static struct ipsec_esp_edesc *ipsec_esp_edesc_alloc(struct aead_request *areq,
-                                                     int icv_stashing)
+static struct talitos_edesc *talitos_edesc_alloc(struct device *dev,
+                                                 struct scatterlist *src,
+                                                 struct scatterlist *dst,
+                                                 unsigned int cryptlen,
+                                                 unsigned int authsize,
+                                                 int icv_stashing,
+                                                 u32 cryptoflags)
 {
-        struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
-        struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
-        struct ipsec_esp_edesc *edesc;
+        struct talitos_edesc *edesc;
         int src_nents, dst_nents, alloc_len, dma_len;
-        gfp_t flags = areq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ? GFP_KERNEL :
+        int src_chained, dst_chained = 0;
+        gfp_t flags = cryptoflags & CRYPTO_TFM_REQ_MAY_SLEEP ? GFP_KERNEL :
                       GFP_ATOMIC;
 
-        if (areq->cryptlen + ctx->authsize > TALITOS_MAX_DATA_LEN) {
-                dev_err(ctx->dev, "cryptlen exceeds h/w max limit\n");
+        if (cryptlen + authsize > TALITOS_MAX_DATA_LEN) {
+                dev_err(dev, "length exceeds h/w max limit\n");
                 return ERR_PTR(-EINVAL);
         }
 
-        src_nents = sg_count(areq->src, areq->cryptlen + ctx->authsize);
+        src_nents = sg_count(src, cryptlen + authsize, &src_chained);
         src_nents = (src_nents == 1) ? 0 : src_nents;
 
-        if (areq->dst == areq->src) {
+        if (dst == src) {
                 dst_nents = src_nents;
         } else {
-                dst_nents = sg_count(areq->dst, areq->cryptlen + ctx->authsize);
+                dst_nents = sg_count(dst, cryptlen + authsize, &dst_chained);
                 dst_nents = (dst_nents == 1) ? 0 : dst_nents;
         }
 
@@ -1084,39 +1138,52 @@ static struct ipsec_esp_edesc *ipsec_esp_edesc_alloc(struct aead_request *areq,
          * allowing for two separate entries for ICV and generated ICV (+ 2),
          * and the ICV data itself
          */
-        alloc_len = sizeof(struct ipsec_esp_edesc);
+        alloc_len = sizeof(struct talitos_edesc);
         if (src_nents || dst_nents) {
                 dma_len = (src_nents + dst_nents + 2) *
-                                 sizeof(struct talitos_ptr) + ctx->authsize;
+                                 sizeof(struct talitos_ptr) + authsize;
                 alloc_len += dma_len;
         } else {
                 dma_len = 0;
-                alloc_len += icv_stashing ? ctx->authsize : 0;
+                alloc_len += icv_stashing ? authsize : 0;
         }
 
         edesc = kmalloc(alloc_len, GFP_DMA | flags);
         if (!edesc) {
-                dev_err(ctx->dev, "could not allocate edescriptor\n");
+                dev_err(dev, "could not allocate edescriptor\n");
                 return ERR_PTR(-ENOMEM);
         }
 
         edesc->src_nents = src_nents;
         edesc->dst_nents = dst_nents;
+        edesc->src_is_chained = src_chained;
+        edesc->dst_is_chained = dst_chained;
         edesc->dma_len = dma_len;
-        edesc->dma_link_tbl = dma_map_single(ctx->dev, &edesc->link_tbl[0],
+        edesc->dma_link_tbl = dma_map_single(dev, &edesc->link_tbl[0],
                                              edesc->dma_len, DMA_BIDIRECTIONAL);
 
         return edesc;
 }
 
-static int aead_authenc_encrypt(struct aead_request *req)
+static struct talitos_edesc *aead_edesc_alloc(struct aead_request *areq,
+                                              int icv_stashing)
+{
+        struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
+        struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
+
+        return talitos_edesc_alloc(ctx->dev, areq->src, areq->dst,
+                                   areq->cryptlen, ctx->authsize, icv_stashing,
+                                   areq->base.flags);
+}
+
+static int aead_encrypt(struct aead_request *req)
 {
         struct crypto_aead *authenc = crypto_aead_reqtfm(req);
         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
-        struct ipsec_esp_edesc *edesc;
+        struct talitos_edesc *edesc;
 
         /* allocate extended descriptor */
-        edesc = ipsec_esp_edesc_alloc(req, 0);
+        edesc = aead_edesc_alloc(req, 0);
         if (IS_ERR(edesc))
                 return PTR_ERR(edesc);
 
@@ -1126,70 +1193,67 @@ static int aead_authenc_encrypt(struct aead_request *req)
         return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_encrypt_done);
 }
 
-
-
-static int aead_authenc_decrypt(struct aead_request *req)
+static int aead_decrypt(struct aead_request *req)
 {
         struct crypto_aead *authenc = crypto_aead_reqtfm(req);
         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
         unsigned int authsize = ctx->authsize;
         struct talitos_private *priv = dev_get_drvdata(ctx->dev);
-        struct ipsec_esp_edesc *edesc;
+        struct talitos_edesc *edesc;
         struct scatterlist *sg;
         void *icvdata;
 
         req->cryptlen -= authsize;
 
         /* allocate extended descriptor */
-        edesc = ipsec_esp_edesc_alloc(req, 1);
+        edesc = aead_edesc_alloc(req, 1);
         if (IS_ERR(edesc))
                 return PTR_ERR(edesc);
 
         if ((priv->features & TALITOS_FTR_HW_AUTH_CHECK) &&
-            (((!edesc->src_nents && !edesc->dst_nents) ||
-                priv->features & TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT))) {
+            ((!edesc->src_nents && !edesc->dst_nents) ||
+             priv->features & TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT)) {
 
                 /* decrypt and check the ICV */
-                edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_DIR_INBOUND |
+                edesc->desc.hdr = ctx->desc_hdr_template |
+                                  DESC_HDR_DIR_INBOUND |
                                   DESC_HDR_MODE1_MDEU_CICV;
 
                 /* reset integrity check result bits */
                 edesc->desc.hdr_lo = 0;
 
-                return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_decrypt_hwauth_done);
+                return ipsec_esp(edesc, req, NULL, 0,
+                                 ipsec_esp_decrypt_hwauth_done);
 
-        } else {
-
-                /* Have to check the ICV with software */
+        }
 
-                edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_DIR_INBOUND;
+        /* Have to check the ICV with software */
+        edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_DIR_INBOUND;
 
-                /* stash incoming ICV for later cmp with ICV generated by the h/w */
-                if (edesc->dma_len)
-                        icvdata = &edesc->link_tbl[edesc->src_nents +
-                                                   edesc->dst_nents + 2];
-                else
-                        icvdata = &edesc->link_tbl[0];
+        /* stash incoming ICV for later cmp with ICV generated by the h/w */
+        if (edesc->dma_len)
+                icvdata = &edesc->link_tbl[edesc->src_nents +
+                                           edesc->dst_nents + 2];
+        else
+                icvdata = &edesc->link_tbl[0];
 
-                sg = sg_last(req->src, edesc->src_nents ? : 1);
+        sg = sg_last(req->src, edesc->src_nents ? : 1);
 
-                memcpy(icvdata, (char *)sg_virt(sg) + sg->length - ctx->authsize,
-                       ctx->authsize);
+        memcpy(icvdata, (char *)sg_virt(sg) + sg->length - ctx->authsize,
+               ctx->authsize);
 
-                return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_decrypt_swauth_done);
-        }
+        return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_decrypt_swauth_done);
 }
 
-static int aead_authenc_givencrypt(
-        struct aead_givcrypt_request *req)
+static int aead_givencrypt(struct aead_givcrypt_request *req)
 {
         struct aead_request *areq = &req->areq;
         struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
-        struct ipsec_esp_edesc *edesc;
+        struct talitos_edesc *edesc;
 
         /* allocate extended descriptor */
-        edesc = ipsec_esp_edesc_alloc(areq, 0);
+        edesc = aead_edesc_alloc(areq, 0);
         if (IS_ERR(edesc))
                 return PTR_ERR(edesc);
 
@@ -1204,31 +1268,228 @@ static int aead_authenc_givencrypt(
                          ipsec_esp_encrypt_done);
 }
 
+static int ablkcipher_setkey(struct crypto_ablkcipher *cipher,
+                             const u8 *key, unsigned int keylen)
+{
+        struct talitos_ctx *ctx = crypto_ablkcipher_ctx(cipher);
+        struct ablkcipher_alg *alg = crypto_ablkcipher_alg(cipher);
+
+        if (keylen > TALITOS_MAX_KEY_SIZE)
+                goto badkey;
+
+        if (keylen < alg->min_keysize || keylen > alg->max_keysize)
+                goto badkey;
+
+        memcpy(&ctx->key, key, keylen);
+        ctx->keylen = keylen;
+
+        return 0;
+
+badkey:
+        crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
+        return -EINVAL;
+}
+
+static void common_nonsnoop_unmap(struct device *dev,
+                                  struct talitos_edesc *edesc,
+                                  struct ablkcipher_request *areq)
+{
+        unmap_single_talitos_ptr(dev, &edesc->desc.ptr[5], DMA_FROM_DEVICE);
+        unmap_single_talitos_ptr(dev, &edesc->desc.ptr[2], DMA_TO_DEVICE);
+        unmap_single_talitos_ptr(dev, &edesc->desc.ptr[1], DMA_TO_DEVICE);
+
+        talitos_sg_unmap(dev, edesc, areq->src, areq->dst);
+
+        if (edesc->dma_len)
+                dma_unmap_single(dev, edesc->dma_link_tbl, edesc->dma_len,
+                                 DMA_BIDIRECTIONAL);
+}
+
+static void ablkcipher_done(struct device *dev,
+                            struct talitos_desc *desc, void *context,
+                            int err)
+{
+        struct ablkcipher_request *areq = context;
+        struct talitos_edesc *edesc;
+
+        edesc = container_of(desc, struct talitos_edesc, desc);
+
+        common_nonsnoop_unmap(dev, edesc, areq);
+
+        kfree(edesc);
+
+        areq->base.complete(&areq->base, err);
+}
+
+static int common_nonsnoop(struct talitos_edesc *edesc,
+                           struct ablkcipher_request *areq,
+                           u8 *giv,
+                           void (*callback) (struct device *dev,
+                                             struct talitos_desc *desc,
+                                             void *context, int error))
+{
+        struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
+        struct talitos_ctx *ctx = crypto_ablkcipher_ctx(cipher);
+        struct device *dev = ctx->dev;
+        struct talitos_desc *desc = &edesc->desc;
+        unsigned int cryptlen = areq->nbytes;
+        unsigned int ivsize;
+        int sg_count, ret;
+
+        /* first DWORD empty */
+        desc->ptr[0].len = 0;
+        desc->ptr[0].ptr = 0;
+        desc->ptr[0].j_extent = 0;
+
+        /* cipher iv */
+        ivsize = crypto_ablkcipher_ivsize(cipher);
+        map_single_talitos_ptr(dev, &desc->ptr[1], ivsize, giv ?: areq->info, 0,
+                               DMA_TO_DEVICE);
+
+        /* cipher key */
+        map_single_talitos_ptr(dev, &desc->ptr[2], ctx->keylen,
+                               (char *)&ctx->key, 0, DMA_TO_DEVICE);
+
+        /*
+         * cipher in
+         */
+        desc->ptr[3].len = cpu_to_be16(cryptlen);
+        desc->ptr[3].j_extent = 0;
+
+        sg_count = talitos_map_sg(dev, areq->src, edesc->src_nents ? : 1,
+                                  (areq->src == areq->dst) ? DMA_BIDIRECTIONAL
+                                                           : DMA_TO_DEVICE,
+                                  edesc->src_is_chained);
+
+        if (sg_count == 1) {
+                desc->ptr[3].ptr = cpu_to_be32(sg_dma_address(areq->src));
+        } else {
+                sg_count = sg_to_link_tbl(areq->src, sg_count, cryptlen,
+                                          &edesc->link_tbl[0]);
+                if (sg_count > 1) {
+                        desc->ptr[3].j_extent |= DESC_PTR_LNKTBL_JUMP;
+                        desc->ptr[3].ptr = cpu_to_be32(edesc->dma_link_tbl);
+                        dma_sync_single_for_device(dev, edesc->dma_link_tbl,
+                                                   edesc->dma_len,
+                                                   DMA_BIDIRECTIONAL);
+                } else {
+                        /* Only one segment now, so no link tbl needed */
+                        desc->ptr[3].ptr = cpu_to_be32(sg_dma_address(areq->
+                                                                      src));
+                }
+        }
+
+        /* cipher out */
+        desc->ptr[4].len = cpu_to_be16(cryptlen);
+        desc->ptr[4].j_extent = 0;
+
+        if (areq->src != areq->dst)
+                sg_count = talitos_map_sg(dev, areq->dst,
+                                          edesc->dst_nents ? : 1,
+                                          DMA_FROM_DEVICE,
+                                          edesc->dst_is_chained);
+
+        if (sg_count == 1) {
+                desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->dst));
+        } else {
+                struct talitos_ptr *link_tbl_ptr =
+                        &edesc->link_tbl[edesc->src_nents + 1];
+
+                desc->ptr[4].j_extent |= DESC_PTR_LNKTBL_JUMP;
+                desc->ptr[4].ptr = cpu_to_be32((struct talitos_ptr *)
+                                               edesc->dma_link_tbl +
+                                               edesc->src_nents + 1);
+                sg_count = sg_to_link_tbl(areq->dst, sg_count, cryptlen,
+                                          link_tbl_ptr);
+                dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
+                                           edesc->dma_len, DMA_BIDIRECTIONAL);
+        }
+
+        /* iv out */
+        map_single_talitos_ptr(dev, &desc->ptr[5], ivsize, ctx->iv, 0,
+                               DMA_FROM_DEVICE);
+
+        /* last DWORD empty */
+        desc->ptr[6].len = 0;
+        desc->ptr[6].ptr = 0;
+        desc->ptr[6].j_extent = 0;
+
+        ret = talitos_submit(dev, desc, callback, areq);
+        if (ret != -EINPROGRESS) {
+                common_nonsnoop_unmap(dev, edesc, areq);
+                kfree(edesc);
+        }
+        return ret;
+}
+
+static struct talitos_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request *
+                                                    areq)
+{
+        struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
+        struct talitos_ctx *ctx = crypto_ablkcipher_ctx(cipher);
+
+        return talitos_edesc_alloc(ctx->dev, areq->src, areq->dst, areq->nbytes,
+                                   0, 0, areq->base.flags);
+}
+
+static int ablkcipher_encrypt(struct ablkcipher_request *areq)
+{
+        struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
+        struct talitos_ctx *ctx = crypto_ablkcipher_ctx(cipher);
+        struct talitos_edesc *edesc;
+
+        /* allocate extended descriptor */
+        edesc = ablkcipher_edesc_alloc(areq);
+        if (IS_ERR(edesc))
+                return PTR_ERR(edesc);
+
+        /* set encrypt */
+        edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_MODE0_ENCRYPT;
+
+        return common_nonsnoop(edesc, areq, NULL, ablkcipher_done);
+}
+
+static int ablkcipher_decrypt(struct ablkcipher_request *areq)
+{
+        struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
+        struct talitos_ctx *ctx = crypto_ablkcipher_ctx(cipher);
+        struct talitos_edesc *edesc;
+
+        /* allocate extended descriptor */
+        edesc = ablkcipher_edesc_alloc(areq);
+        if (IS_ERR(edesc))
+                return PTR_ERR(edesc);
+
+        edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_DIR_INBOUND;
+
+        return common_nonsnoop(edesc, areq, NULL, ablkcipher_done);
+}
+
 struct talitos_alg_template {
-        char name[CRYPTO_MAX_ALG_NAME];
-        char driver_name[CRYPTO_MAX_ALG_NAME];
-        unsigned int blocksize;
-        struct aead_alg aead;
-        struct device *dev;
+        struct crypto_alg alg;
         __be32 desc_hdr_template;
 };
 
 static struct talitos_alg_template driver_algs[] = {
-        /* single-pass ipsec_esp descriptor */
+        /* AEAD algorithms.  These use a single-pass ipsec_esp descriptor */
         {
-                .name = "authenc(hmac(sha1),cbc(aes))",
-                .driver_name = "authenc-hmac-sha1-cbc-aes-talitos",
-                .blocksize = AES_BLOCK_SIZE,
-                .aead = {
-                        .setkey = aead_authenc_setkey,
-                        .setauthsize = aead_authenc_setauthsize,
-                        .encrypt = aead_authenc_encrypt,
-                        .decrypt = aead_authenc_decrypt,
-                        .givencrypt = aead_authenc_givencrypt,
-                        .geniv = "<built-in>",
-                        .ivsize = AES_BLOCK_SIZE,
-                        .maxauthsize = SHA1_DIGEST_SIZE,
-                        },
+                .alg = {
+                        .cra_name = "authenc(hmac(sha1),cbc(aes))",
+                        .cra_driver_name = "authenc-hmac-sha1-cbc-aes-talitos",
+                        .cra_blocksize = AES_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = AES_BLOCK_SIZE,
+                                .maxauthsize = SHA1_DIGEST_SIZE,
+                        }
+                },
                 .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
                                      DESC_HDR_SEL0_AESU |
                                      DESC_HDR_MODE0_AESU_CBC |
@@ -1238,19 +1499,23 @@ static struct talitos_alg_template driver_algs[] = {
                                      DESC_HDR_MODE1_MDEU_SHA1_HMAC,
         },
         {
-                .name = "authenc(hmac(sha1),cbc(des3_ede))",
-                .driver_name = "authenc-hmac-sha1-cbc-3des-talitos",
-                .blocksize = DES3_EDE_BLOCK_SIZE,
-                .aead = {
-                        .setkey = aead_authenc_setkey,
-                        .setauthsize = aead_authenc_setauthsize,
-                        .encrypt = aead_authenc_encrypt,
-                        .decrypt = aead_authenc_decrypt,
-                        .givencrypt = aead_authenc_givencrypt,
-                        .geniv = "<built-in>",
-                        .ivsize = DES3_EDE_BLOCK_SIZE,
-                        .maxauthsize = SHA1_DIGEST_SIZE,
-                        },
+                .alg = {
+                        .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
+                        .cra_driver_name = "authenc-hmac-sha1-cbc-3des-talitos",
+                        .cra_blocksize = DES3_EDE_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = DES3_EDE_BLOCK_SIZE,
+                                .maxauthsize = SHA1_DIGEST_SIZE,
+                        }
+                },
                 .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
                                      DESC_HDR_SEL0_DEU |
                                      DESC_HDR_MODE0_DEU_CBC |
@@ -1261,19 +1526,23 @@ static struct talitos_alg_template driver_algs[] = {
                                      DESC_HDR_MODE1_MDEU_SHA1_HMAC,
         },
         {
-                .name = "authenc(hmac(sha256),cbc(aes))",
-                .driver_name = "authenc-hmac-sha256-cbc-aes-talitos",
-                .blocksize = AES_BLOCK_SIZE,
-                .aead = {
-                        .setkey = aead_authenc_setkey,
-                        .setauthsize = aead_authenc_setauthsize,
-                        .encrypt = aead_authenc_encrypt,
-                        .decrypt = aead_authenc_decrypt,
-                        .givencrypt = aead_authenc_givencrypt,
-                        .geniv = "<built-in>",
-                        .ivsize = AES_BLOCK_SIZE,
-                        .maxauthsize = SHA256_DIGEST_SIZE,
-                        },
+                .alg = {
+                        .cra_name = "authenc(hmac(sha256),cbc(aes))",
+                        .cra_driver_name = "authenc-hmac-sha256-cbc-aes-talitos",
+                        .cra_blocksize = AES_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = AES_BLOCK_SIZE,
+                                .maxauthsize = SHA256_DIGEST_SIZE,
+                        }
+                },
                 .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
                                      DESC_HDR_SEL0_AESU |
                                      DESC_HDR_MODE0_AESU_CBC |
@@ -1283,19 +1552,23 @@ static struct talitos_alg_template driver_algs[] = {
                                      DESC_HDR_MODE1_MDEU_SHA256_HMAC,
         },
         {
-                .name = "authenc(hmac(sha256),cbc(des3_ede))",
-                .driver_name = "authenc-hmac-sha256-cbc-3des-talitos",
-                .blocksize = DES3_EDE_BLOCK_SIZE,
-                .aead = {
-                        .setkey = aead_authenc_setkey,
-                        .setauthsize = aead_authenc_setauthsize,
-                        .encrypt = aead_authenc_encrypt,
-                        .decrypt = aead_authenc_decrypt,
-                        .givencrypt = aead_authenc_givencrypt,
-                        .geniv = "<built-in>",
-                        .ivsize = DES3_EDE_BLOCK_SIZE,
-                        .maxauthsize = SHA256_DIGEST_SIZE,
-                        },
+                .alg = {
+                        .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
+                        .cra_driver_name = "authenc-hmac-sha256-cbc-3des-talitos",
+                        .cra_blocksize = DES3_EDE_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = DES3_EDE_BLOCK_SIZE,
+                                .maxauthsize = SHA256_DIGEST_SIZE,
+                        }
+                },
                 .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
                                      DESC_HDR_SEL0_DEU |
                                      DESC_HDR_MODE0_DEU_CBC |
@@ -1306,19 +1579,23 @@ static struct talitos_alg_template driver_algs[] = {
                                      DESC_HDR_MODE1_MDEU_SHA256_HMAC,
         },
         {
-                .name = "authenc(hmac(md5),cbc(aes))",
-                .driver_name = "authenc-hmac-md5-cbc-aes-talitos",
-                .blocksize = AES_BLOCK_SIZE,
-                .aead = {
-                        .setkey = aead_authenc_setkey,
-                        .setauthsize = aead_authenc_setauthsize,
-                        .encrypt = aead_authenc_encrypt,
-                        .decrypt = aead_authenc_decrypt,
-                        .givencrypt = aead_authenc_givencrypt,
-                        .geniv = "<built-in>",
-                        .ivsize = AES_BLOCK_SIZE,
-                        .maxauthsize = MD5_DIGEST_SIZE,
-                        },
+                .alg = {
+                        .cra_name = "authenc(hmac(md5),cbc(aes))",
+                        .cra_driver_name = "authenc-hmac-md5-cbc-aes-talitos",
+                        .cra_blocksize = AES_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = AES_BLOCK_SIZE,
+                                .maxauthsize = MD5_DIGEST_SIZE,
+                        }
+                },
                 .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
                                      DESC_HDR_SEL0_AESU |
                                      DESC_HDR_MODE0_AESU_CBC |
@@ -1328,19 +1605,23 @@ static struct talitos_alg_template driver_algs[] = {
                                      DESC_HDR_MODE1_MDEU_MD5_HMAC,
         },
         {
-                .name = "authenc(hmac(md5),cbc(des3_ede))",
-                .driver_name = "authenc-hmac-md5-cbc-3des-talitos",
-                .blocksize = DES3_EDE_BLOCK_SIZE,
-                .aead = {
-                        .setkey = aead_authenc_setkey,
-                        .setauthsize = aead_authenc_setauthsize,
-                        .encrypt = aead_authenc_encrypt,
-                        .decrypt = aead_authenc_decrypt,
-                        .givencrypt = aead_authenc_givencrypt,
-                        .geniv = "<built-in>",
-                        .ivsize = DES3_EDE_BLOCK_SIZE,
-                        .maxauthsize = MD5_DIGEST_SIZE,
-                        },
+                .alg = {
+                        .cra_name = "authenc(hmac(md5),cbc(des3_ede))",
+                        .cra_driver_name = "authenc-hmac-md5-cbc-3des-talitos",
+                        .cra_blocksize = DES3_EDE_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = DES3_EDE_BLOCK_SIZE,
+                                .maxauthsize = MD5_DIGEST_SIZE,
+                        }
+                },
                 .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
                                      DESC_HDR_SEL0_DEU |
                                      DESC_HDR_MODE0_DEU_CBC |
@@ -1349,6 +1630,52 @@ static struct talitos_alg_template driver_algs[] = {
                                      DESC_HDR_MODE1_MDEU_INIT |
                                      DESC_HDR_MODE1_MDEU_PAD |
                                      DESC_HDR_MODE1_MDEU_MD5_HMAC,
+        },
+        /* ABLKCIPHER algorithms. */
+        {
+                .alg = {
+                        .cra_name = "cbc(aes)",
+                        .cra_driver_name = "cbc-aes-talitos",
+                        .cra_blocksize = AES_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
+                                     CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_ablkcipher_type,
+                        .cra_ablkcipher = {
+                                .setkey = ablkcipher_setkey,
+                                .encrypt = ablkcipher_encrypt,
+                                .decrypt = ablkcipher_decrypt,
+                                .geniv = "eseqiv",
+                                .min_keysize = AES_MIN_KEY_SIZE,
+                                .max_keysize = AES_MAX_KEY_SIZE,
+                                .ivsize = AES_BLOCK_SIZE,
+                        }
+                },
+                .desc_hdr_template = DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU |
+                                     DESC_HDR_SEL0_AESU |
+                                     DESC_HDR_MODE0_AESU_CBC,
+        },
+        {
+                .alg = {
+                        .cra_name = "cbc(des3_ede)",
+                        .cra_driver_name = "cbc-3des-talitos",
+                        .cra_blocksize = DES3_EDE_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
+                                     CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_ablkcipher_type,
+                        .cra_ablkcipher = {
+                                .setkey = ablkcipher_setkey,
+                                .encrypt = ablkcipher_encrypt,
+                                .decrypt = ablkcipher_decrypt,
+                                .geniv = "eseqiv",
+                                .min_keysize = DES3_EDE_KEY_SIZE,
+                                .max_keysize = DES3_EDE_KEY_SIZE,
+                                .ivsize = DES3_EDE_BLOCK_SIZE,
+                        }
+                },
+                .desc_hdr_template = DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU |
+                                     DESC_HDR_SEL0_DEU |
+                                     DESC_HDR_MODE0_DEU_CBC |
+                                     DESC_HDR_MODE0_DEU_3DES,
         }
 };
 
@@ -1362,12 +1689,14 @@ struct talitos_crypto_alg {
 static int talitos_cra_init(struct crypto_tfm *tfm)
 {
         struct crypto_alg *alg = tfm->__crt_alg;
-        struct talitos_crypto_alg *talitos_alg =
-                 container_of(alg, struct talitos_crypto_alg, crypto_alg);
+        struct talitos_crypto_alg *talitos_alg;
         struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
 
+        talitos_alg =  container_of(alg, struct talitos_crypto_alg, crypto_alg);
+
         /* update context with ptr to dev */
         ctx->dev = talitos_alg->dev;
+
         /* copy descriptor header template value */
         ctx->desc_hdr_template = talitos_alg->desc_hdr_template;
 
@@ -1453,19 +1782,13 @@ static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev,
                 return ERR_PTR(-ENOMEM);
 
         alg = &t_alg->crypto_alg;
+        *alg = template->alg;
 
-        snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name);
-        snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
-                 template->driver_name);
         alg->cra_module = THIS_MODULE;
         alg->cra_init = talitos_cra_init;
         alg->cra_priority = TALITOS_CRA_PRIORITY;
-        alg->cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC;
-        alg->cra_blocksize = template->blocksize;
         alg->cra_alignmask = 0;
-        alg->cra_type = &crypto_aead_type;
         alg->cra_ctxsize = sizeof(struct talitos_ctx);
-        alg->cra_u.aead = template->aead;
 
         t_alg->desc_hdr_template = template->desc_hdr_template;
         t_alg->dev = dev;
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c
index facfdb1fa71c..d205d493a68a 100644
--- a/drivers/edac/e752x_edac.c
+++ b/drivers/edac/e752x_edac.c
@@ -1084,7 +1084,7 @@ static void e752x_init_sysbus_parity_mask(struct e752x_pvt *pvt)
         struct pci_dev *dev = pvt->dev_d0f1;
         int enable = 1;
 
-        /* Allow module paramter override, else see if CPU supports parity */
+        /* Allow module parameter override, else see if CPU supports parity */
         if (sysbus_parity != -1) {
                 enable = sysbus_parity;
         } else if (cpu_id[0] &&
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
index 7e67dcb3d4f6..7831a0318d3c 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
@@ -116,9 +116,16 @@ config HID_CYPRESS
         ---help---
         Support for cypress mouse and barcode readers.
 
-config DRAGONRISE_FF
-        tristate "DragonRise Inc. force feedback support"
+config HID_DRAGONRISE
+        tristate "DragonRise Inc. support" if EMBEDDED
         depends on USB_HID
+        default !EMBEDDED
+        ---help---
+        Say Y here if you have DragonRise Inc.game controllers.
+
+config DRAGONRISE_FF
+        bool "DragonRise Inc. force feedback support"
+        depends on HID_DRAGONRISE
         select INPUT_FF_MEMLESS
         ---help---
         Say Y here if you want to enable force feedback support for DragonRise Inc.
@@ -160,7 +167,7 @@ config HID_LOGITECH
         Support for Logitech devices that are not fully compliant with HID standard.
 
 config LOGITECH_FF
-        bool "Logitech force feedback"
+        bool "Logitech force feedback support"
         depends on HID_LOGITECH
         select INPUT_FF_MEMLESS
         help
@@ -176,7 +183,7 @@ config LOGITECH_FF
           force feedback.
 
 config LOGIRUMBLEPAD2_FF
-        bool "Logitech Rumblepad 2 force feedback"
+        bool "Logitech Rumblepad 2 force feedback support"
         depends on HID_LOGITECH
         select INPUT_FF_MEMLESS
         help
@@ -211,11 +218,19 @@ config HID_PANTHERLORD
         ---help---
         Support for PantherLord/GreenAsia based device support.
 
+config HID_PANTHERLORD
+        tristate "Pantherlord support" if EMBEDDED
+        depends on USB_HID
+        default !EMBEDDED
+        ---help---
+          Say Y here if you have a PantherLord/GreenAsia based game controller
+          or adapter.
+
 config PANTHERLORD_FF
         bool "Pantherlord force feedback support"
         depends on HID_PANTHERLORD
         select INPUT_FF_MEMLESS
-        help
+        ---help---
           Say Y here if you have a PantherLord/GreenAsia based game controller
           or adapter and want to enable force feedback support for it.
 
@@ -247,15 +262,38 @@ config HID_SUNPLUS
         ---help---
         Support for Sunplus wireless desktop.
 
-config GREENASIA_FF
-        tristate "GreenAsia (Product ID 0x12) force feedback support"
+config HID_GREENASIA
+        tristate "GreenAsia (Product ID 0x12) support" if EMBEDDED
         depends on USB_HID
+        default !EMBEDDED
+        ---help---
+          Say Y here if you have a GreenAsia (Product ID 0x12) based game
+          controller or adapter.
+
+config GREENASIA_FF
+        bool "GreenAsia (Product ID 0x12) force feedback support"
+        depends on HID_GREENASIA
         select INPUT_FF_MEMLESS
         ---help---
         Say Y here if you have a GreenAsia (Product ID 0x12) based game controller
         (like MANTA Warrior MM816 and SpeedLink Strike2 SL-6635) or adapter
         and want to enable force feedback support for it.
 
+config HID_SMARTJOYPLUS
+        tristate "SmartJoy PLUS PS2/USB adapter support" if EMBEDDED
+        depends on USB_HID
+        default !EMBEDDED
+        ---help---
+        Support for SmartJoy PLUS PS2/USB adapter.
+
+config SMARTJOYPLUS_FF
+        bool "SmartJoy PLUS PS2/USB adapter force feedback support"
+        depends on HID_SMARTJOYPLUS
+        select INPUT_FF_MEMLESS
+        ---help---
+        Say Y here if you have a SmartJoy PLUS PS2/USB adapter and want to
+        enable force feedback support for it.
+
 config HID_TOPSEED
         tristate "TopSeed Cyberlink remote control support" if EMBEDDED
         depends on USB_HID
@@ -263,21 +301,45 @@ config HID_TOPSEED
         ---help---
         Say Y if you have a TopSeed Cyberlink remote control.
 
-config THRUSTMASTER_FF
-        tristate "ThrustMaster devices support"
+config HID_THRUSTMASTER
+        tristate "ThrustMaster devices support" if EMBEDDED
         depends on USB_HID
+        default !EMBEDDED
+        ---help---
+          Say Y here if you have a THRUSTMASTER FireStore Dual Power 2 or
+          a THRUSTMASTER Ferrari GT Rumble Wheel.
+
+config THRUSTMASTER_FF
+        bool "ThrustMaster devices force feedback support"
+        depends on HID_THRUSTMASTER
         select INPUT_FF_MEMLESS
-        help
+        ---help---
           Say Y here if you have a THRUSTMASTER FireStore Dual Power 2 or
-          a THRUSTMASTER Ferrari GT Rumble Force or Force Feedback Wheel.
+          a THRUSTMASTER Ferrari GT Rumble Force or Force Feedback Wheel and
+          want to enable force feedback support for it.
 
-config ZEROPLUS_FF
-        tristate "Zeroplus based game controller support"
+config HID_WACOM
+        tristate "Wacom Bluetooth devices support" if EMBEDDED
+        depends on BT_HIDP
+        default !EMBEDDED
+        ---help---
+        Support for Wacom Graphire Bluetooth tablet.
+
+config HID_ZEROPLUS
+        tristate "Zeroplus based game controller support" if EMBEDDED
         depends on USB_HID
-        select INPUT_FF_MEMLESS
-        help
+        default !EMBEDDED
+        ---help---
           Say Y here if you have a Zeroplus based game controller.
 
+config ZEROPLUS_FF
+        bool "Zeroplus based game controller force feedback support"
+        depends on HID_ZEROPLUS
+        select INPUT_FF_MEMLESS
+        ---help---
+          Say Y here if you have a Zeroplus based game controller and want
+          to have force feedback support for it.
+
 endmenu
 
 endif # HID_SUPPORT
diff --git a/drivers/hid/Makefile b/drivers/hid/Makefile
index 1f7cb0fd4505..db35151673b1 100644
--- a/drivers/hid/Makefile
+++ b/drivers/hid/Makefile
@@ -22,7 +22,7 @@ obj-$(CONFIG_HID_BELKIN)	+= hid-belkin.o
 obj-$(CONFIG_HID_CHERRY)        += hid-cherry.o
 obj-$(CONFIG_HID_CHICONY)       += hid-chicony.o
 obj-$(CONFIG_HID_CYPRESS)       += hid-cypress.o
-obj-$(CONFIG_DRAGONRISE_FF)     += hid-drff.o
+obj-$(CONFIG_HID_DRAGONRISE)    += hid-drff.o
 obj-$(CONFIG_HID_EZKEY)         += hid-ezkey.o
 obj-$(CONFIG_HID_GYRATION)      += hid-gyration.o
 obj-$(CONFIG_HID_KENSINGTON)    += hid-kensington.o
@@ -34,12 +34,14 @@ obj-$(CONFIG_HID_NTRIG)		+= hid-ntrig.o
 obj-$(CONFIG_HID_PANTHERLORD)   += hid-pl.o
 obj-$(CONFIG_HID_PETALYNX)      += hid-petalynx.o
 obj-$(CONFIG_HID_SAMSUNG)       += hid-samsung.o
+obj-$(CONFIG_HID_SMARTJOYPLUS)  += hid-sjoy.o
 obj-$(CONFIG_HID_SONY)          += hid-sony.o
 obj-$(CONFIG_HID_SUNPLUS)       += hid-sunplus.o
-obj-$(CONFIG_GREENASIA_FF)      += hid-gaff.o
-obj-$(CONFIG_THRUSTMASTER_FF)   += hid-tmff.o
+obj-$(CONFIG_HID_GREENASIA)     += hid-gaff.o
+obj-$(CONFIG_HID_THRUSTMASTER)  += hid-tmff.o
 obj-$(CONFIG_HID_TOPSEED)       += hid-topseed.o
-obj-$(CONFIG_ZEROPLUS_FF)       += hid-zpff.o
+obj-$(CONFIG_HID_ZEROPLUS)      += hid-zpff.o
+obj-$(CONFIG_HID_WACOM)         += hid-wacom.o
 
 obj-$(CONFIG_USB_HID)           += usbhid/
 obj-$(CONFIG_USB_MOUSE)         += usbhid/
diff --git a/drivers/hid/hid-apple.c b/drivers/hid/hid-apple.c
index acbce5745b0c..303ccce05bb3 100644
--- a/drivers/hid/hid-apple.c
+++ b/drivers/hid/hid-apple.c
@@ -436,10 +436,6 @@ static const struct hid_device_id apple_devices[] = {
         { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY),
                 .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
 
-        /* Apple wireless Mighty Mouse */
-        { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, 0x030c),
-                .driver_data = APPLE_MIGHTYMOUSE | APPLE_INVERT_HWHEEL },
-
         { }
 };
 MODULE_DEVICE_TABLE(hid, apple_devices);
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index 8551693d645f..f2c21d5d24e8 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1312,6 +1312,8 @@ static const struct hid_device_id hid_blacklist[] = {
         { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb651) },
         { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb654) },
         { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED, USB_DEVICE_ID_TOPSEED_CYBERLINK) },
+        { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_SMARTJOY_PLUS) },
+        { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_WACOM, USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH) },
         { HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0005) },
         { HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0030) },
 
diff --git a/drivers/hid/hid-debug.c b/drivers/hid/hid-debug.c
index 47ac1a7d66e1..04359ed64b87 100644
--- a/drivers/hid/hid-debug.c
+++ b/drivers/hid/hid-debug.c
@@ -137,6 +137,14 @@ static const struct hid_usage_entry hid_usage_table[] = {
     {0, 0x44, "BarrelSwitch"},
     {0, 0x45, "Eraser"},
     {0, 0x46, "TabletPick"},
+    {0, 0x47, "Confidence"},
+    {0, 0x48, "Width"},
+    {0, 0x49, "Height"},
+    {0, 0x51, "ContactID"},
+    {0, 0x52, "InputMode"},
+    {0, 0x53, "DeviceIndex"},
+    {0, 0x54, "ContactCount"},
+    {0, 0x55, "ContactMaximumNumber"},
   { 15, 0, "PhysicalInterfaceDevice" },
     {0, 0x00, "Undefined"},
     {0, 0x01, "Physical_Interface_Device"},
@@ -514,9 +522,11 @@ static const char *events[EV_MAX + 1] = {
         [EV_FF_STATUS] = "ForceFeedbackStatus",
 };
 
-static const char *syncs[2] = {
+static const char *syncs[3] = {
         [SYN_REPORT] = "Report",                [SYN_CONFIG] = "Config",
+        [SYN_MT_REPORT] = "MT Report",
 };
+
 static const char *keys[KEY_MAX + 1] = {
         [KEY_RESERVED] = "Reserved",            [KEY_ESC] = "Esc",
         [KEY_1] = "1",                          [KEY_2] = "2",
@@ -734,8 +744,17 @@ static const char *absolutes[ABS_MAX + 1] = {
         [ABS_HAT2Y] = "Hat2Y",          [ABS_HAT3X] = "Hat3X",
         [ABS_HAT3Y] = "Hat 3Y",         [ABS_PRESSURE] = "Pressure",
         [ABS_DISTANCE] = "Distance",    [ABS_TILT_X] = "XTilt",
-        [ABS_TILT_Y] = "YTilt",         [ABS_TOOL_WIDTH] = "Tool Width",
+        [ABS_TILT_Y] = "YTilt",         [ABS_TOOL_WIDTH] = "ToolWidth",
         [ABS_VOLUME] = "Volume",        [ABS_MISC] = "Misc",
+        [ABS_MT_TOUCH_MAJOR] = "MTMajor",
+        [ABS_MT_TOUCH_MINOR] = "MTMinor",
+        [ABS_MT_WIDTH_MAJOR] = "MTMajorW",
+        [ABS_MT_WIDTH_MINOR] = "MTMinorW",
+        [ABS_MT_ORIENTATION] = "MTOrientation",
+        [ABS_MT_POSITION_X] = "MTPositionX",
+        [ABS_MT_POSITION_Y] = "MTPositionY",
+        [ABS_MT_TOOL_TYPE] = "MTToolType",
+        [ABS_MT_BLOB_ID] = "MTBlobID",
 };
 
 static const char *misc[MSC_MAX + 1] = {
diff --git a/drivers/hid/hid-drff.c b/drivers/hid/hid-drff.c
index 34f3eb65100b..a239d20ad7a5 100644
--- a/drivers/hid/hid-drff.c
+++ b/drivers/hid/hid-drff.c
@@ -32,6 +32,8 @@
 #include <linux/hid.h>
 
 #include "hid-ids.h"
+
+#ifdef CONFIG_DRAGONRISE_FF
 #include "usbhid/usbhid.h"
 
 struct drff_device {
@@ -135,6 +137,12 @@ static int drff_init(struct hid_device *hid)
 
         return 0;
 }
+#else
+static inline int drff_init(struct hid_device *hid)
+{
+        return 0;
+}
+#endif
 
 static int dr_probe(struct hid_device *hdev, const struct hid_device_id *id)
 {
diff --git a/drivers/hid/hid-gaff.c b/drivers/hid/hid-gaff.c
index 510ad3ab8d33..8a11ccddaf2e 100644
--- a/drivers/hid/hid-gaff.c
+++ b/drivers/hid/hid-gaff.c
@@ -31,6 +31,8 @@
 #include <linux/usb.h>
 #include <linux/hid.h>
 #include "hid-ids.h"
+
+#ifdef CONFIG_GREENASIA_FF
 #include "usbhid/usbhid.h"
 
 struct gaff_device {
@@ -130,6 +132,12 @@ static int gaff_init(struct hid_device *hid)
 
         return 0;
 }
+#else
+static inline int gaff_init(struct hid_device *hdev)
+{
+        return 0;
+}
+#endif
 
 static int ga_probe(struct hid_device *hdev, const struct hid_device_id *id)
 {
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index 4d5ee2bbc62b..630101037921 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -414,8 +414,10 @@
 #define USB_DEVICE_ID_VERNIER_LCSPEC    0x0006
 
 #define USB_VENDOR_ID_WACOM             0x056a
+#define USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH  0x81
 
 #define USB_VENDOR_ID_WISEGROUP         0x0925
+#define USB_DEVICE_ID_SMARTJOY_PLUS     0x0005
 #define USB_DEVICE_ID_1_PHIDGETSERVO_20 0x8101
 #define USB_DEVICE_ID_4_PHIDGETSERVO_20 0x8104
 #define USB_DEVICE_ID_8_8_4_IF_KIT      0x8201
diff --git a/drivers/hid/hid-lgff.c b/drivers/hid/hid-lgff.c
index 51aff08e10ce..56099709581c 100644
--- a/drivers/hid/hid-lgff.c
+++ b/drivers/hid/hid-lgff.c
@@ -50,6 +50,12 @@ static const signed short ff_joystick[] = {
         -1
 };
 
+static const signed short ff_joystick_ac[] = {
+        FF_CONSTANT,
+        FF_AUTOCENTER,
+        -1
+};
+
 static const signed short ff_wheel[] = {
         FF_CONSTANT,
         FF_AUTOCENTER,
@@ -60,8 +66,8 @@ static const struct dev_type devices[] = {
         { 0x046d, 0xc211, ff_rumble },
         { 0x046d, 0xc219, ff_rumble },
         { 0x046d, 0xc283, ff_joystick },
-        { 0x046d, 0xc286, ff_joystick },
-        { 0x046d, 0xc294, ff_joystick },
+        { 0x046d, 0xc286, ff_joystick_ac },
+        { 0x046d, 0xc294, ff_wheel },
         { 0x046d, 0xc295, ff_joystick },
         { 0x046d, 0xca03, ff_wheel },
 };
diff --git a/drivers/hid/hid-ntrig.c b/drivers/hid/hid-ntrig.c
index c5b252be9c21..75ed9d2c1a36 100644
--- a/drivers/hid/hid-ntrig.c
+++ b/drivers/hid/hid-ntrig.c
@@ -1,13 +1,8 @@
 /*
- *  HID driver for some ntrig "special" devices
+ *  HID driver for N-Trig touchscreens
  *
- *  Copyright (c) 1999 Andreas Gal
- *  Copyright (c) 2000-2005 Vojtech Pavlik <vojtech@suse.cz>
- *  Copyright (c) 2005 Michael Haboustak <mike-@cinci.rr.com> for Concept2, Inc
- *  Copyright (c) 2006-2007 Jiri Kosina
- *  Copyright (c) 2007 Paul Walmsley
- *  Copyright (c) 2008 Jiri Slaby
  *  Copyright (c) 2008 Rafi Rubin
+ *  Copyright (c) 2009 Stephane Chatty
  *
  */
 
@@ -29,15 +24,79 @@
 #define nt_map_key_clear(c)     hid_map_usage_clear(hi, usage, bit, max, \
                                         EV_KEY, (c))
 
+struct ntrig_data {
+        __s32 x, y, id, w, h;
+        char reading_a_point, found_contact_id;
+};
+
+/*
+ * this driver is aimed at two firmware versions in circulation:
+ *  - dual pen/finger single touch
+ *  - finger multitouch, pen not working
+ */
+
 static int ntrig_input_mapping(struct hid_device *hdev, struct hid_input *hi,
                 struct hid_field *field, struct hid_usage *usage,
                 unsigned long **bit, int *max)
 {
-        if ((usage->hid & HID_USAGE_PAGE) == HID_UP_DIGITIZER &&
-                        (usage->hid & 0xff) == 0x47) {
-                nt_map_key_clear(BTN_TOOL_DOUBLETAP);
-                return 1;
+        switch (usage->hid & HID_USAGE_PAGE) {
+
+        case HID_UP_GENDESK:
+                switch (usage->hid) {
+                case HID_GD_X:
+                        hid_map_usage(hi, usage, bit, max,
+                                        EV_ABS, ABS_MT_POSITION_X);
+                        input_set_abs_params(hi->input, ABS_X,
+                                        field->logical_minimum,
+                                        field->logical_maximum, 0, 0);
+                        return 1;
+                case HID_GD_Y:
+                        hid_map_usage(hi, usage, bit, max,
+                                        EV_ABS, ABS_MT_POSITION_Y);
+                        input_set_abs_params(hi->input, ABS_Y,
+                                        field->logical_minimum,
+                                        field->logical_maximum, 0, 0);
+                        return 1;
+                }
+                return 0;
+
+        case HID_UP_DIGITIZER:
+                switch (usage->hid) {
+                /* we do not want to map these for now */
+                case HID_DG_INVERT: /* value is always 0 */
+                case HID_DG_ERASER: /* value is always 0 */
+                case HID_DG_CONTACTID: /* value is useless */
+                case HID_DG_BARRELSWITCH:  /* doubtful */
+                case HID_DG_INPUTMODE:
+                case HID_DG_DEVICEINDEX:
+                case HID_DG_CONTACTCOUNT:
+                case HID_DG_CONTACTMAX:
+                        return -1;
+
+                /* original mapping by Rafi Rubin */
+                case HID_DG_CONFIDENCE:
+                        nt_map_key_clear(BTN_TOOL_DOUBLETAP);
+                        return 1;
+
+                /* width/height mapped on TouchMajor/TouchMinor/Orientation */
+                case HID_DG_WIDTH:
+                        hid_map_usage(hi, usage, bit, max,
+                                        EV_ABS, ABS_MT_TOUCH_MAJOR);
+                        return 1;
+                case HID_DG_HEIGHT:
+                        hid_map_usage(hi, usage, bit, max,
+                                        EV_ABS, ABS_MT_TOUCH_MINOR);
+                        input_set_abs_params(hi->input, ABS_MT_ORIENTATION,
+                                        0, 1, 0, 0);
+                        return 1;
+                }
+                return 0;
+
+        case 0xff000000:
+                /* we do not want to map these: no input-oriented meaning */
+                return -1;
         }
+
         return 0;
 }
 
@@ -51,6 +110,138 @@ static int ntrig_input_mapped(struct hid_device *hdev, struct hid_input *hi,
 
         return 0;
 }
+
+/*
+ * this function is called upon all reports
+ * so that we can filter contact point information,
+ * decide whether we are in multi or single touch mode
+ * and call input_mt_sync after each point if necessary
+ */
+static int ntrig_event (struct hid_device *hid, struct hid_field *field,
+                                        struct hid_usage *usage, __s32 value)
+{
+        struct input_dev *input = field->hidinput->input;
+        struct ntrig_data *nd = hid_get_drvdata(hid);
+
+        if (hid->claimed & HID_CLAIMED_INPUT) {
+                switch (usage->hid) {
+                case HID_GD_X:
+                        nd->x = value;
+                        nd->reading_a_point = 1;
+                        break;
+                case HID_GD_Y:
+                        nd->y = value;
+                        break;
+                case HID_DG_CONTACTID:
+                        nd->id = value;
+                        /* we receive this only when in multitouch mode */
+                        nd->found_contact_id = 1;
+                        break;
+                case HID_DG_WIDTH:
+                        nd->w = value;
+                        break;
+                case HID_DG_HEIGHT:
+                        nd->h = value;
+                        /*
+                         * when in single touch mode, this is the last
+                         * report received in a finger event. We want
+                         * to emit a normal (X, Y) position
+                         */
+                        if (! nd->found_contact_id) {
+                                input_event(input, EV_ABS, ABS_X, nd->x);
+                                input_event(input, EV_ABS, ABS_Y, nd->y);
+                        }
+                        break;
+                case HID_DG_TIPPRESSURE:
+                        /*
+                         * when in single touch mode, this is the last
+                         * report received in a pen event. We want
+                         * to emit a normal (X, Y) position
+                         */
+                        if (! nd->found_contact_id) {
+                                input_event(input, EV_ABS, ABS_X, nd->x);
+                                input_event(input, EV_ABS, ABS_Y, nd->y);
+                                input_event(input, EV_ABS, ABS_PRESSURE, value);
+                        }
+                        break;
+                case 0xff000002:
+                        /*
+                         * we receive this when the device is in multitouch
+                         * mode. The first of the three values tagged with
+                         * this usage tells if the contact point is real
+                         * or a placeholder
+                         */
+                        if (!nd->reading_a_point || value != 1)
+                                break;
+                        /* emit a normal (X, Y) for the first point only */
+                        if (nd->id == 0) {
+                                input_event(input, EV_ABS, ABS_X, nd->x);
+                                input_event(input, EV_ABS, ABS_Y, nd->y);
+                        }
+                        input_event(input, EV_ABS, ABS_MT_POSITION_X, nd->x);
+                        input_event(input, EV_ABS, ABS_MT_POSITION_Y, nd->y);
+                        if (nd->w > nd->h) {
+                                input_event(input, EV_ABS,
+                                                ABS_MT_ORIENTATION, 1);
+                                input_event(input, EV_ABS,
+                                                ABS_MT_TOUCH_MAJOR, nd->w);
+                                input_event(input, EV_ABS,
+                                                ABS_MT_TOUCH_MINOR, nd->h);
+                        } else {
+                                input_event(input, EV_ABS,
+                                                ABS_MT_ORIENTATION, 0);
+                                input_event(input, EV_ABS,
+                                                ABS_MT_TOUCH_MAJOR, nd->h);
+                                input_event(input, EV_ABS,
+                                                ABS_MT_TOUCH_MINOR, nd->w);
+                        }
+                        input_mt_sync(field->hidinput->input);
+                        nd->reading_a_point = 0;
+                        nd->found_contact_id = 0;
+                        break;
+
+                default:
+                        /* fallback to the generic hidinput handling */
+                        return 0;
+                }
+        }
+
+        /* we have handled the hidinput part, now remains hiddev */
+        if (hid->claimed & HID_CLAIMED_HIDDEV && hid->hiddev_hid_event)
+                hid->hiddev_hid_event(hid, field, usage, value);
+
+        return 1;
+}
+
+static int ntrig_probe(struct hid_device *hdev, const struct hid_device_id *id)
+{
+        int ret;
+        struct ntrig_data *nd;
+
+        nd = kmalloc(sizeof(struct ntrig_data), GFP_KERNEL);
+        if (!nd) {
+                dev_err(&hdev->dev, "cannot allocate N-Trig data\n");
+                return -ENOMEM;
+        }
+        nd->reading_a_point = 0;
+        nd->found_contact_id = 0;
+        hid_set_drvdata(hdev, nd);
+
+        ret = hid_parse(hdev);
+        if (!ret)
+                ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT);
+
+        if (ret)
+                kfree (nd);
+        return ret;
+}
+
+static void ntrig_remove(struct hid_device *hdev)
+{
+        hid_hw_stop(hdev);
+        kfree(hid_get_drvdata(hdev));
+}
+
 static const struct hid_device_id ntrig_devices[] = {
         { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN),
                 .driver_data = NTRIG_DUPLICATE_USAGES },
@@ -58,11 +249,20 @@ static const struct hid_device_id ntrig_devices[] = {
 };
 MODULE_DEVICE_TABLE(hid, ntrig_devices);
 
+static const struct hid_usage_id ntrig_grabbed_usages[] = {
+        { HID_ANY_ID, HID_ANY_ID, HID_ANY_ID },
+        { HID_ANY_ID - 1, HID_ANY_ID - 1, HID_ANY_ID - 1}
+};
+
 static struct hid_driver ntrig_driver = {
         .name = "ntrig",
         .id_table = ntrig_devices,
+        .probe = ntrig_probe,
+        .remove = ntrig_remove,
         .input_mapping = ntrig_input_mapping,
         .input_mapped = ntrig_input_mapped,
+        .usage_table = ntrig_grabbed_usages,
+        .event = ntrig_event,
 };
 
 static int ntrig_init(void)
diff --git a/drivers/hid/hid-sjoy.c b/drivers/hid/hid-sjoy.c
new file mode 100644
index 000000000000..eab169e5c371
--- /dev/null
+++ b/drivers/hid/hid-sjoy.c
@@ -0,0 +1,180 @@
+/*
+ *  Force feedback support for SmartJoy PLUS PS2->USB adapter
+ *
+ *  Copyright (c) 2009 Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
+ *
+ *  Based of hid-pl.c and hid-gaff.c
+ *   Copyright (c) 2007, 2009 Anssi Hannula <anssi.hannula@gmail.com>
+ *   Copyright (c) 2008 Lukasz Lubojanski <lukasz@lubojanski.info>
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/* #define DEBUG */
+
+#include <linux/input.h>
+#include <linux/usb.h>
+#include <linux/hid.h>
+#include "hid-ids.h"
+
+#ifdef CONFIG_SMARTJOYPLUS_FF
+#include "usbhid/usbhid.h"
+
+struct sjoyff_device {
+        struct hid_report *report;
+};
+
+static int hid_sjoyff_play(struct input_dev *dev, void *data,
+                         struct ff_effect *effect)
+{
+        struct hid_device *hid = input_get_drvdata(dev);
+        struct sjoyff_device *sjoyff = data;
+        u32 left, right;
+
+        left = effect->u.rumble.strong_magnitude;
+        right = effect->u.rumble.weak_magnitude;
+        dev_dbg(&dev->dev, "called with 0x%08x 0x%08x\n", left, right);
+
+        left = left * 0xff / 0xffff;
+        right = (right != 0); /* on/off only */
+
+        sjoyff->report->field[0]->value[1] = right;
+        sjoyff->report->field[0]->value[2] = left;
+        dev_dbg(&dev->dev, "running with 0x%02x 0x%02x\n", left, right);
+        usbhid_submit_report(hid, sjoyff->report, USB_DIR_OUT);
+
+        return 0;
+}
+
+static int sjoyff_init(struct hid_device *hid)
+{
+        struct sjoyff_device *sjoyff;
+        struct hid_report *report;
+        struct hid_input *hidinput = list_entry(hid->inputs.next,
+                                                struct hid_input, list);
+        struct list_head *report_list =
+                        &hid->report_enum[HID_OUTPUT_REPORT].report_list;
+        struct list_head *report_ptr = report_list;
+        struct input_dev *dev;
+        int error;
+
+        if (list_empty(report_list)) {
+                dev_err(&hid->dev, "no output reports found\n");
+                return -ENODEV;
+        }
+
+        report_ptr = report_ptr->next;
+
+        if (report_ptr == report_list) {
+                dev_err(&hid->dev, "required output report is "
+                                "missing\n");
+                return -ENODEV;
+        }
+
+        report = list_entry(report_ptr, struct hid_report, list);
+        if (report->maxfield < 1) {
+                dev_err(&hid->dev, "no fields in the report\n");
+                return -ENODEV;
+        }
+
+        if (report->field[0]->report_count < 3) {
+                dev_err(&hid->dev, "not enough values in the field\n");
+                return -ENODEV;
+        }
+
+        sjoyff = kzalloc(sizeof(struct sjoyff_device), GFP_KERNEL);
+        if (!sjoyff)
+                return -ENOMEM;
+
+        dev = hidinput->input;
+
+        set_bit(FF_RUMBLE, dev->ffbit);
+
+        error = input_ff_create_memless(dev, sjoyff, hid_sjoyff_play);
+        if (error) {
+                kfree(sjoyff);
+                return error;
+        }
+
+        sjoyff->report = report;
+        sjoyff->report->field[0]->value[0] = 0x01;
+        sjoyff->report->field[0]->value[1] = 0x00;
+        sjoyff->report->field[0]->value[2] = 0x00;
+        usbhid_submit_report(hid, sjoyff->report, USB_DIR_OUT);
+
+        dev_info(&hid->dev,
+                "Force feedback for SmartJoy PLUS PS2/USB adapter\n");
+
+        return 0;
+}
+#else
+static inline int sjoyff_init(struct hid_device *hid)
+{
+        return 0;
+}
+#endif
+
+static int sjoy_probe(struct hid_device *hdev, const struct hid_device_id *id)
+{
+        int ret;
+
+        ret = hid_parse(hdev);
+        if (ret) {
+                dev_err(&hdev->dev, "parse failed\n");
+                goto err;
+        }
+
+        ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT & ~HID_CONNECT_FF);
+        if (ret) {
+                dev_err(&hdev->dev, "hw start failed\n");
+                goto err;
+        }
+
+        sjoyff_init(hdev);
+
+        return 0;
+err:
+        return ret;
+}
+
+static const struct hid_device_id sjoy_devices[] = {
+        { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_SMARTJOY_PLUS) },
+        { }
+};
+MODULE_DEVICE_TABLE(hid, sjoy_devices);
+
+static struct hid_driver sjoy_driver = {
+        .name = "smartjoyplus",
+        .id_table = sjoy_devices,
+        .probe = sjoy_probe,
+};
+
+static int sjoy_init(void)
+{
+        return hid_register_driver(&sjoy_driver);
+}
+
+static void sjoy_exit(void)
+{
+        hid_unregister_driver(&sjoy_driver);
+}
+
+module_init(sjoy_init);
+module_exit(sjoy_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Jussi Kivilinna");
+
diff --git a/drivers/hid/hid-tmff.c b/drivers/hid/hid-tmff.c
index 7c1f7b50330c..fcd6ccd02fee 100644
--- a/drivers/hid/hid-tmff.c
+++ b/drivers/hid/hid-tmff.c
@@ -33,11 +33,6 @@
 
 #include "hid-ids.h"
 
-#include "usbhid/usbhid.h"
-
-/* Usages for thrustmaster devices I know about */
-#define THRUSTMASTER_USAGE_FF   (HID_UP_GENDESK | 0xbb)
-
 static const signed short ff_rumble[] = {
         FF_RUMBLE,
         -1
@@ -48,6 +43,12 @@ static const signed short ff_joystick[] = {
         -1
 };
 
+#ifdef CONFIG_THRUSTMASTER_FF
+#include "usbhid/usbhid.h"
+
+/* Usages for thrustmaster devices I know about */
+#define THRUSTMASTER_USAGE_FF   (HID_UP_GENDESK | 0xbb)
+
 struct tmff_device {
         struct hid_report *report;
         struct hid_field *ff_field;
@@ -209,6 +210,12 @@ fail:
         kfree(tmff);
         return error;
 }
+#else
+static inline int tmff_init(struct hid_device *hid, const signed short *ff_bits)
+{
+        return 0;
+}
+#endif
 
 static int tm_probe(struct hid_device *hdev, const struct hid_device_id *id)
 {
diff --git a/drivers/hid/hid-wacom.c b/drivers/hid/hid-wacom.c
new file mode 100644
index 000000000000..1f9237f511e3
--- /dev/null
+++ b/drivers/hid/hid-wacom.c
@@ -0,0 +1,259 @@
+/*
+ *  Bluetooth Wacom Tablet support
+ *
+ *  Copyright (c) 1999 Andreas Gal
+ *  Copyright (c) 2000-2005 Vojtech Pavlik <vojtech@suse.cz>
+ *  Copyright (c) 2005 Michael Haboustak <mike-@cinci.rr.com> for Concept2, Inc
+ *  Copyright (c) 2006-2007 Jiri Kosina
+ *  Copyright (c) 2007 Paul Walmsley
+ *  Copyright (c) 2008 Jiri Slaby <jirislaby@gmail.com>
+ *  Copyright (c) 2006 Andrew Zabolotny <zap@homelink.ru>
+ *  Copyright (c) 2009 Bastien Nocera <hadess@hadess.net>
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include <linux/device.h>
+#include <linux/hid.h>
+#include <linux/module.h>
+
+#include "hid-ids.h"
+
+struct wacom_data {
+        __u16 tool;
+        unsigned char butstate;
+};
+
+static int wacom_raw_event(struct hid_device *hdev, struct hid_report *report,
+                u8 *raw_data, int size)
+{
+        struct wacom_data *wdata = hid_get_drvdata(hdev);
+        struct hid_input *hidinput;
+        struct input_dev *input;
+        unsigned char *data = (unsigned char *) raw_data;
+        int tool, x, y, rw;
+
+        if (!(hdev->claimed & HID_CLAIMED_INPUT))
+                return 0;
+
+        tool = 0;
+        hidinput = list_entry(hdev->inputs.next, struct hid_input, list);
+        input = hidinput->input;
+
+        /* Check if this is a tablet report */
+        if (data[0] != 0x03)
+                return 0;
+
+        /* Get X & Y positions */
+        x = le16_to_cpu(*(__le16 *) &data[2]);
+        y = le16_to_cpu(*(__le16 *) &data[4]);
+
+        /* Get current tool identifier */
+        if (data[1] & 0x90) { /* If pen is in the in/active area */
+                switch ((data[1] >> 5) & 3) {
+                case 0: /* Pen */
+                        tool = BTN_TOOL_PEN;
+                        break;
+
+                case 1: /* Rubber */
+                        tool = BTN_TOOL_RUBBER;
+                        break;
+
+                case 2: /* Mouse with wheel */
+                case 3: /* Mouse without wheel */
+                        tool = BTN_TOOL_MOUSE;
+                        break;
+                }
+
+                /* Reset tool if out of active tablet area */
+                if (!(data[1] & 0x10))
+                        tool = 0;
+        }
+
+        /* If tool changed, notify input subsystem */
+        if (wdata->tool != tool) {
+                if (wdata->tool) {
+                        /* Completely reset old tool state */
+                        if (wdata->tool == BTN_TOOL_MOUSE) {
+                                input_report_key(input, BTN_LEFT, 0);
+                                input_report_key(input, BTN_RIGHT, 0);
+                                input_report_key(input, BTN_MIDDLE, 0);
+                                input_report_abs(input, ABS_DISTANCE,
+                                                input->absmax[ABS_DISTANCE]);
+                        } else {
+                                input_report_key(input, BTN_TOUCH, 0);
+                                input_report_key(input, BTN_STYLUS, 0);
+                                input_report_key(input, BTN_STYLUS2, 0);
+                                input_report_abs(input, ABS_PRESSURE, 0);
+                        }
+                        input_report_key(input, wdata->tool, 0);
+                        input_sync(input);
+                }
+                wdata->tool = tool;
+                if (tool)
+                        input_report_key(input, tool, 1);
+        }
+
+        if (tool) {
+                input_report_abs(input, ABS_X, x);
+                input_report_abs(input, ABS_Y, y);
+
+                switch ((data[1] >> 5) & 3) {
+                case 2: /* Mouse with wheel */
+                        input_report_key(input, BTN_MIDDLE, data[1] & 0x04);
+                        rw = (data[6] & 0x01) ? -1 :
+                                (data[6] & 0x02) ? 1 : 0;
+                        input_report_rel(input, REL_WHEEL, rw);
+                        /* fall through */
+
+                case 3: /* Mouse without wheel */
+                        input_report_key(input, BTN_LEFT, data[1] & 0x01);
+                        input_report_key(input, BTN_RIGHT, data[1] & 0x02);
+                        /* Compute distance between mouse and tablet */
+                        rw = 44 - (data[6] >> 2);
+                        if (rw < 0)
+                                rw = 0;
+                        else if (rw > 31)
+                                rw = 31;
+                        input_report_abs(input, ABS_DISTANCE, rw);
+                        break;
+
+                default:
+                        input_report_abs(input, ABS_PRESSURE,
+                                        data[6] | (((__u16) (data[1] & 0x08)) << 5));
+                        input_report_key(input, BTN_TOUCH, data[1] & 0x01);
+                        input_report_key(input, BTN_STYLUS, data[1] & 0x02);
+                        input_report_key(input, BTN_STYLUS2, (tool == BTN_TOOL_PEN) && data[1] & 0x04);
+                        break;
+                }
+
+                input_sync(input);
+        }
+
+        /* Report the state of the two buttons at the top of the tablet
+         * as two extra fingerpad keys (buttons 4 & 5). */
+        rw = data[7] & 0x03;
+        if (rw != wdata->butstate) {
+                wdata->butstate = rw;
+                input_report_key(input, BTN_0, rw & 0x02);
+                input_report_key(input, BTN_1, rw & 0x01);
+                input_event(input, EV_MSC, MSC_SERIAL, 0xf0);
+                input_sync(input);
+        }
+
+        return 1;
+}
+
+static int wacom_probe(struct hid_device *hdev,
+                const struct hid_device_id *id)
+{
+        struct hid_input *hidinput;
+        struct input_dev *input;
+        struct wacom_data *wdata;
+        int ret;
+
+        wdata = kzalloc(sizeof(*wdata), GFP_KERNEL);
+        if (wdata == NULL) {
+                dev_err(&hdev->dev, "can't alloc wacom descriptor\n");
+                return -ENOMEM;
+        }
+
+        hid_set_drvdata(hdev, wdata);
+
+        ret = hid_parse(hdev);
+        if (ret) {
+                dev_err(&hdev->dev, "parse failed\n");
+                goto err_free;
+        }
+
+        ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT);
+        if (ret) {
+                dev_err(&hdev->dev, "hw start failed\n");
+                goto err_free;
+        }
+
+        hidinput = list_entry(hdev->inputs.next, struct hid_input, list);
+        input = hidinput->input;
+
+        /* Basics */
+        input->evbit[0] |= BIT(EV_KEY) | BIT(EV_ABS) | BIT(EV_REL);
+        input->absbit[0] |= BIT(ABS_X) | BIT(ABS_Y) |
+                BIT(ABS_PRESSURE) | BIT(ABS_DISTANCE);
+        input->relbit[0] |= BIT(REL_WHEEL);
+        set_bit(BTN_TOOL_PEN, input->keybit);
+        set_bit(BTN_TOUCH, input->keybit);
+        set_bit(BTN_STYLUS, input->keybit);
+        set_bit(BTN_STYLUS2, input->keybit);
+        set_bit(BTN_LEFT, input->keybit);
+        set_bit(BTN_RIGHT, input->keybit);
+        set_bit(BTN_MIDDLE, input->keybit);
+
+        /* Pad */
+        input->evbit[0] |= BIT(EV_MSC);
+        input->mscbit[0] |= BIT(MSC_SERIAL);
+
+        /* Distance, rubber and mouse */
+        input->absbit[0] |= BIT(ABS_DISTANCE);
+        set_bit(BTN_TOOL_RUBBER, input->keybit);
+        set_bit(BTN_TOOL_MOUSE, input->keybit);
+
+        input->absmax[ABS_PRESSURE] = 511;
+        input->absmax[ABS_DISTANCE] = 32;
+
+        input->absmax[ABS_X] = 16704;
+        input->absmax[ABS_Y] = 12064;
+        input->absfuzz[ABS_X] = 4;
+        input->absfuzz[ABS_Y] = 4;
+
+        return 0;
+err_free:
+        kfree(wdata);
+        return ret;
+}
+
+static void wacom_remove(struct hid_device *hdev)
+{
+        hid_hw_stop(hdev);
+        kfree(hid_get_drvdata(hdev));
+}
+
+static const struct hid_device_id wacom_devices[] = {
+        { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_WACOM, USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH) },
+
+        { }
+};
+MODULE_DEVICE_TABLE(hid, wacom_devices);
+
+static struct hid_driver wacom_driver = {
+        .name = "wacom",
+        .id_table = wacom_devices,
+        .probe = wacom_probe,
+        .remove = wacom_remove,
+        .raw_event = wacom_raw_event,
+};
+
+static int wacom_init(void)
+{
+        int ret;
+
+        ret = hid_register_driver(&wacom_driver);
+        if (ret)
+                printk(KERN_ERR "can't register wacom driver\n");
+        printk(KERN_ERR "wacom driver registered\n");
+        return ret;
+}
+
+static void wacom_exit(void)
+{
+        hid_unregister_driver(&wacom_driver);
+}
+
+module_init(wacom_init);
+module_exit(wacom_exit);
+MODULE_LICENSE("GPL");
+
diff --git a/drivers/hid/hid-zpff.c b/drivers/hid/hid-zpff.c
index 85a198a18537..57f710757bf4 100644
--- a/drivers/hid/hid-zpff.c
+++ b/drivers/hid/hid-zpff.c
@@ -27,6 +27,7 @@
 
 #include "hid-ids.h"
 
+#ifdef CONFIG_ZEROPLUS_FF
 #include "usbhid/usbhid.h"
 
 struct zpff_device {
@@ -108,6 +109,12 @@ static int zpff_init(struct hid_device *hid)
 
         return 0;
 }
+#else
+static inline int zpff_init(struct hid_device *hid)
+{
+        return 0;
+}
+#endif
 
 static int zp_probe(struct hid_device *hdev, const struct hid_device_id *id)
 {
diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c
index 00ccf4b1985d..0c6639ea03dd 100644
--- a/drivers/hid/hidraw.c
+++ b/drivers/hid/hidraw.c
@@ -349,10 +349,7 @@ int hidraw_connect(struct hid_device *hid)
         int minor, result;
         struct hidraw *dev;
 
-        /* TODO currently we accept any HID device. This should later
-         * probably be fixed to accept only those devices which provide
-         * non-input applications
-         */
+        /* we accept any HID device, no matter the applications */
 
         dev = kzalloc(sizeof(struct hidraw), GFP_KERNEL);
         if (!dev)
diff --git a/drivers/hid/usbhid/hid-core.c b/drivers/hid/usbhid/hid-core.c
index ac8049b5f1e9..76c4bbe9dccb 100644
--- a/drivers/hid/usbhid/hid-core.c
+++ b/drivers/hid/usbhid/hid-core.c
@@ -1234,12 +1234,11 @@ static int hid_post_reset(struct usb_interface *intf)
         struct hid_device *hid = usb_get_intfdata(intf);
         struct usbhid_device *usbhid = hid->driver_data;
         int status;
- 
+
         spin_lock_irq(&usbhid->lock);
         clear_bit(HID_RESET_PENDING, &usbhid->iofl);
         spin_unlock_irq(&usbhid->lock);
         hid_set_idle(dev, intf->cur_altsetting->desc.bInterfaceNumber, 0, 0);
-        /* FIXME: Any more reinitialization needed? */
         status = hid_start_in(hid);
         if (status < 0)
                 hid_io_error(hid);
@@ -1251,14 +1250,14 @@ static int hid_post_reset(struct usb_interface *intf)
 int usbhid_get_power(struct hid_device *hid)
 {
         struct usbhid_device *usbhid = hid->driver_data;
- 
+
         return usb_autopm_get_interface(usbhid->intf);
 }
 
 void usbhid_put_power(struct hid_device *hid)
 {
         struct usbhid_device *usbhid = hid->driver_data;
- 
+
         usb_autopm_put_interface(usbhid->intf);
 }
 
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index f1c6ca7e2852..c8460fa9cfac 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -298,7 +298,7 @@ config I2C_BLACKFIN_TWI
 config I2C_BLACKFIN_TWI_CLK_KHZ
         int "Blackfin TWI I2C clock (kHz)"
         depends on I2C_BLACKFIN_TWI
-        range 10 400
+        range 21 400
         default 50
         help
           The unit of the TWI clock is kHz.
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index fc548b3d002e..26d8987e69bf 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -104,9 +104,14 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
                         write_MASTER_CTL(iface,
                                 read_MASTER_CTL(iface) | STOP);
                 else if (iface->cur_mode == TWI_I2C_MODE_REPEAT &&
-                                iface->cur_msg+1 < iface->msg_num)
-                        write_MASTER_CTL(iface,
-                                read_MASTER_CTL(iface) | RSTART);
+                         iface->cur_msg + 1 < iface->msg_num) {
+                        if (iface->pmsg[iface->cur_msg + 1].flags & I2C_M_RD)
+                                write_MASTER_CTL(iface,
+                                        read_MASTER_CTL(iface) | RSTART | MDIR);
+                        else
+                                write_MASTER_CTL(iface,
+                                        (read_MASTER_CTL(iface) | RSTART) & ~MDIR);
+                }
                 SSYNC();
                 /* Clear status */
                 write_INT_STAT(iface, XMTSERV);
@@ -134,9 +139,13 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
                                 read_MASTER_CTL(iface) | STOP);
                         SSYNC();
                 } else if (iface->cur_mode == TWI_I2C_MODE_REPEAT &&
-                                iface->cur_msg+1 < iface->msg_num) {
-                        write_MASTER_CTL(iface,
-                                read_MASTER_CTL(iface) | RSTART);
+                           iface->cur_msg + 1 < iface->msg_num) {
+                        if (iface->pmsg[iface->cur_msg + 1].flags & I2C_M_RD)
+                                write_MASTER_CTL(iface,
+                                        read_MASTER_CTL(iface) | RSTART | MDIR);
+                        else
+                                write_MASTER_CTL(iface,
+                                        (read_MASTER_CTL(iface) | RSTART) & ~MDIR);
                         SSYNC();
                 }
                 /* Clear interrupt source */
@@ -196,8 +205,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
                         /* remove restart bit and enable master receive */
                         write_MASTER_CTL(iface,
                                 read_MASTER_CTL(iface) & ~RSTART);
-                        write_MASTER_CTL(iface,
-                                read_MASTER_CTL(iface) | MEN | MDIR);
                         SSYNC();
                 } else if (iface->cur_mode == TWI_I2C_MODE_REPEAT &&
                                 iface->cur_msg+1 < iface->msg_num) {
@@ -222,18 +229,19 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
                         }
 
                         if (iface->pmsg[iface->cur_msg].len <= 255)
-                                write_MASTER_CTL(iface,
-                                iface->pmsg[iface->cur_msg].len << 6);
+                                        write_MASTER_CTL(iface,
+                                        (read_MASTER_CTL(iface) &
+                                        (~(0xff << 6))) |
+                                (iface->pmsg[iface->cur_msg].len << 6));
                         else {
-                                write_MASTER_CTL(iface, 0xff << 6);
+                                write_MASTER_CTL(iface,
+                                        (read_MASTER_CTL(iface) |
+                                        (0xff << 6)));
                                 iface->manual_stop = 1;
                         }
                         /* remove restart bit and enable master receive */
                         write_MASTER_CTL(iface,
                                 read_MASTER_CTL(iface) & ~RSTART);
-                        write_MASTER_CTL(iface, read_MASTER_CTL(iface) |
-                                MEN | ((iface->read_write == I2C_SMBUS_READ) ?
-                                MDIR : 0));
                         SSYNC();
                 } else {
                         iface->result = 1;
@@ -441,6 +449,16 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
                 }
                 iface->transPtr = data->block;
                 break;
+        case I2C_SMBUS_I2C_BLOCK_DATA:
+                if (read_write == I2C_SMBUS_READ) {
+                        iface->readNum = data->block[0];
+                        iface->cur_mode = TWI_I2C_MODE_COMBINED;
+                } else {
+                        iface->writeNum = data->block[0];
+                        iface->cur_mode = TWI_I2C_MODE_STANDARDSUB;
+                }
+                iface->transPtr = (u8 *)&data->block[1];
+                break;
         default:
                 return -1;
         }
@@ -564,7 +582,7 @@ static u32 bfin_twi_functionality(struct i2c_adapter *adap)
         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
                I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
                I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL |
-               I2C_FUNC_I2C;
+               I2C_FUNC_I2C | I2C_FUNC_SMBUS_I2C_BLOCK;
 }
 
 static struct i2c_algorithm bfin_twi_algorithm = {
@@ -614,6 +632,7 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
         struct i2c_adapter *p_adap;
         struct resource *res;
         int rc;
+        unsigned int clkhilow;
 
         iface = kzalloc(sizeof(struct bfin_twi_iface), GFP_KERNEL);
         if (!iface) {
@@ -675,10 +694,14 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
         /* Set TWI internal clock as 10MHz */
         write_CONTROL(iface, ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F);
 
+        /*
+         * We will not end up with a CLKDIV=0 because no one will specify
+         * 20kHz SCL or less in Kconfig now. (5 * 1024 / 20 = 0x100)
+         */
+        clkhilow = 5 * 1024 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ;
+
         /* Set Twi interface clock as specified */
-        write_CLKDIV(iface, ((5*1024 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ)
-                        << 8) | ((5*1024 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ)
-                        & 0xFF));
+        write_CLKDIV(iface, (clkhilow << 8) | clkhilow);
 
         /* Enable TWI */
         write_CONTROL(iface, read_CONTROL(iface) | TWI_ENA);
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index e5193bf75483..3542c6ba98f1 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -216,6 +216,7 @@ static int __devinit ocores_i2c_probe(struct platform_device *pdev)
         struct ocores_i2c_platform_data *pdata;
         struct resource *res, *res2;
         int ret;
+        int i;
 
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         if (!res)
@@ -271,6 +272,10 @@ static int __devinit ocores_i2c_probe(struct platform_device *pdev)
                 goto add_adapter_failed;
         }
 
+        /* add in known devices to the bus */
+        for (i = 0; i < pdata->num_devices; i++)
+                i2c_new_device(&i2c->adap, pdata->devices + i);
+
         return 0;
 
 add_adapter_failed:
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ece0125a1ee5..c73475dd0fba 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -333,8 +333,18 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
 
         if (cpu_is_omap2430() || cpu_is_omap34xx()) {
 
-                /* HSI2C controller internal clk rate should be 19.2 Mhz */
-                internal_clk = 19200;
+                /*
+                 * HSI2C controller internal clk rate should be 19.2 Mhz for
+                 * HS and for all modes on 2430. On 34xx we can use lower rate
+                 * to get longer filter period for better noise suppression.
+                 * The filter is iclk (fclk for HS) period.
+                 */
+                if (dev->speed > 400 || cpu_is_omap_2430())
+                        internal_clk = 19200;
+                else if (dev->speed > 100)
+                        internal_clk = 9600;
+                else
+                        internal_clk = 4000;
                 fclk_rate = clk_get_rate(dev->fclk) / 1000;
 
                 /* Compute prescaler divisor */
@@ -343,17 +353,28 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
 
                 /* If configured for High Speed */
                 if (dev->speed > 400) {
+                        unsigned long scl;
+
                         /* For first phase of HS mode */
-                        fsscll = internal_clk / (400 * 2) - 6;
-                        fssclh = internal_clk / (400 * 2) - 6;
+                        scl = internal_clk / 400;
+                        fsscll = scl - (scl / 3) - 7;
+                        fssclh = (scl / 3) - 5;
 
                         /* For second phase of HS mode */
-                        hsscll = fclk_rate / (dev->speed * 2) - 6;
-                        hssclh = fclk_rate / (dev->speed * 2) - 6;
+                        scl = fclk_rate / dev->speed;
+                        hsscll = scl - (scl / 3) - 7;
+                        hssclh = (scl / 3) - 5;
+                } else if (dev->speed > 100) {
+                        unsigned long scl;
+
+                        /* Fast mode */
+                        scl = internal_clk / dev->speed;
+                        fsscll = scl - (scl / 3) - 7;
+                        fssclh = (scl / 3) - 5;
                 } else {
-                        /* To handle F/S modes */
-                        fsscll = internal_clk / (dev->speed * 2) - 6;
-                        fssclh = internal_clk / (dev->speed * 2) - 6;
+                        /* Standard mode */
+                        fsscll = internal_clk / (dev->speed * 2) - 7;
+                        fssclh = internal_clk / (dev->speed * 2) - 5;
                 }
                 scll = (hsscll << OMAP_I2C_SCLL_HSSCLL) | fsscll;
                 sclh = (hssclh << OMAP_I2C_SCLH_HSSCLH) | fssclh;
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index acc7143d9655..035a6c7e59df 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -34,10 +34,24 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 
-#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/io.h>
-#include <mach/i2c.h>
+#include <plat/i2c.h>
+
+/*
+ * I2C register offsets will be shifted 0 or 1 bit left, depending on
+ * different SoCs
+ */
+#define REG_SHIFT_0     (0 << 0)
+#define REG_SHIFT_1     (1 << 0)
+#define REG_SHIFT(d)    ((d) & 0x1)
+
+static const struct platform_device_id i2c_pxa_id_table[] = {
+        { "pxa2xx-i2c",         REG_SHIFT_1 },
+        { "pxa3xx-pwri2c",      REG_SHIFT_0 },
+        { },
+};
+MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table);
 
 /*
  * I2C registers and bit definitions
@@ -985,6 +999,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
         struct pxa_i2c *i2c;
         struct resource *res;
         struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
+        struct platform_device_id *id = platform_get_device_id(dev);
         int ret;
         int irq;
 
@@ -1028,7 +1043,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
                 ret = -EIO;
                 goto eremap;
         }
-        i2c->reg_shift = (cpu_is_pxa3xx() && (dev->id == 1)) ? 0 : 1;
+        i2c->reg_shift = REG_SHIFT(id->driver_data);
 
         i2c->iobase = res->start;
         i2c->iosize = res_len(res);
@@ -1150,6 +1165,7 @@ static struct platform_driver i2c_pxa_driver = {
                 .name   = "pxa2xx-i2c",
                 .owner  = THIS_MODULE,
         },
+        .id_table       = i2c_pxa_id_table,
 };
 
 static int __init i2c_adap_pxa_init(void)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 1691ef0f1ee1..079a312d36fd 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -51,6 +51,11 @@ enum s3c24xx_i2c_state {
         STATE_STOP
 };
 
+enum s3c24xx_i2c_type {
+        TYPE_S3C2410,
+        TYPE_S3C2440,
+};
+
 struct s3c24xx_i2c {
         spinlock_t              lock;
         wait_queue_head_t       wait;
@@ -88,8 +93,10 @@ struct s3c24xx_i2c {
 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
 {
         struct platform_device *pdev = to_platform_device(i2c->dev);
+        enum s3c24xx_i2c_type type;
 
-        return !strcmp(pdev->name, "s3c2440-i2c");
+        type = platform_get_device_id(pdev)->driver_data;
+        return type == TYPE_S3C2440;
 }
 
 /* s3c24xx_i2c_master_complete
@@ -969,52 +976,41 @@ static int s3c24xx_i2c_resume(struct platform_device *dev)
 
 /* device driver for platform bus bits */
 
-static struct platform_driver s3c2410_i2c_driver = {
-        .probe          = s3c24xx_i2c_probe,
-        .remove         = s3c24xx_i2c_remove,
-        .suspend_late   = s3c24xx_i2c_suspend_late,
-        .resume         = s3c24xx_i2c_resume,
-        .driver         = {
-                .owner  = THIS_MODULE,
-                .name   = "s3c2410-i2c",
-        },
+static struct platform_device_id s3c24xx_driver_ids[] = {
+        {
+                .name           = "s3c2410-i2c",
+                .driver_data    = TYPE_S3C2410,
+        }, {
+                .name           = "s3c2440-i2c",
+                .driver_data    = TYPE_S3C2440,
+        }, { },
 };
+MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);
 
-static struct platform_driver s3c2440_i2c_driver = {
+static struct platform_driver s3c24xx_i2c_driver = {
         .probe          = s3c24xx_i2c_probe,
         .remove         = s3c24xx_i2c_remove,
         .suspend_late   = s3c24xx_i2c_suspend_late,
         .resume         = s3c24xx_i2c_resume,
+        .id_table       = s3c24xx_driver_ids,
         .driver         = {
                 .owner  = THIS_MODULE,
-                .name   = "s3c2440-i2c",
+                .name   = "s3c-i2c",
         },
 };
 
 static int __init i2c_adap_s3c_init(void)
 {
-        int ret;
-
-        ret = platform_driver_register(&s3c2410_i2c_driver);
-        if (ret == 0) {
-                ret = platform_driver_register(&s3c2440_i2c_driver);
-                if (ret)
-                        platform_driver_unregister(&s3c2410_i2c_driver);
-        }
-
-        return ret;
+        return platform_driver_register(&s3c24xx_i2c_driver);
 }
 subsys_initcall(i2c_adap_s3c_init);
 
 static void __exit i2c_adap_s3c_exit(void)
 {
-        platform_driver_unregister(&s3c2410_i2c_driver);
-        platform_driver_unregister(&s3c2440_i2c_driver);
+        platform_driver_unregister(&s3c24xx_i2c_driver);
 }
 module_exit(i2c_adap_s3c_exit);
 
 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
 MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:s3c2410-i2c");
-MODULE_ALIAS("platform:s3c2440-i2c");
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index cf06494bb744..9a5d0aaac9d0 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -46,7 +46,7 @@ menuconfig IDE
           SMART parameters from disk drives.
 
           To compile this driver as a module, choose M here: the
-          module will be called ide-core.ko.
+          module will be called ide-core.
 
           For further information, please read <file:Documentation/ide/ide.txt>.
 
diff --git a/drivers/ide/ide-atapi.c b/drivers/ide/ide-atapi.c
index bbdd2547f12a..702ef64a0f12 100644
--- a/drivers/ide/ide-atapi.c
+++ b/drivers/ide/ide-atapi.c
@@ -577,7 +577,7 @@ static ide_startstop_t ide_transfer_pc(ide_drive_t *drive)
 
                 /*
                  * If necessary schedule the packet transfer to occur 'timeout'
-                 * miliseconds later in ide_delayed_transfer_pc() after the
+                 * milliseconds later in ide_delayed_transfer_pc() after the
                  * device says it's ready for a packet.
                  */
                 if (drive->atapi_flags & IDE_AFLAG_ZIP_DRIVE) {
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index 5c0a631d1455..06f46fcc0772 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -232,7 +232,7 @@ config INPUT_GPIO_ROTARY_ENCODER
         depends on GPIOLIB && GENERIC_GPIO
         help
           Say Y here to add support for rotary encoders connected to GPIO lines.
-          Check file:Documentation/incput/rotary_encoder.txt for more
+          Check file:Documentation/input/rotary-encoder.txt for more
           information.
 
           To compile this driver as a module, choose M here: the
diff --git a/drivers/input/serio/ambakmi.c b/drivers/input/serio/ambakmi.c
index a28c06d686e1..89b394183a75 100644
--- a/drivers/input/serio/ambakmi.c
+++ b/drivers/input/serio/ambakmi.c
@@ -135,7 +135,7 @@ static int amba_kmi_probe(struct amba_device *dev, struct amba_id *id)
         io->dev.parent  = &dev->dev;
 
         kmi->io         = io;
-        kmi->base       = ioremap(dev->res.start, KMI_SIZE);
+        kmi->base       = ioremap(dev->res.start, resource_size(&dev->res));
         if (!kmi->base) {
                 ret = -ENOMEM;
                 goto out;
diff --git a/drivers/isdn/divert/isdn_divert.c b/drivers/isdn/divert/isdn_divert.c
index 7d97d54588d9..77e9fdda0597 100644
--- a/drivers/isdn/divert/isdn_divert.c
+++ b/drivers/isdn/divert/isdn_divert.c
@@ -183,7 +183,7 @@ int cf_command(int drvid, int mode,
           (mode != 1) ? "" : " 0 ",
           (mode != 1) ? "" : fwd_nr);
  
-  retval = divert_if.ll_cmd(&cs->ics); /* excute command */
+  retval = divert_if.ll_cmd(&cs->ics); /* execute command */
 
   if (!retval)
    { cs->prev = NULL;
diff --git a/drivers/isdn/mISDN/dsp_core.c b/drivers/isdn/mISDN/dsp_core.c
index 3083338716b2..47dbfe298b43 100644
--- a/drivers/isdn/mISDN/dsp_core.c
+++ b/drivers/isdn/mISDN/dsp_core.c
@@ -502,7 +502,7 @@ tone_off:
                         break;
                 }
                 dsp->cmx_delay = (*((int *)data)) << 3;
-                        /* miliseconds to samples */
+                        /* milliseconds to samples */
                 if (dsp->cmx_delay >= (CMX_BUFF_HALF>>1))
                         /* clip to half of maximum usable buffer
                         (half of half buffer) */
diff --git a/drivers/leds/leds-h1940.c b/drivers/leds/leds-h1940.c
index 1aa46a390a0d..173d104d9ff2 100644
--- a/drivers/leds/leds-h1940.c
+++ b/drivers/leds/leds-h1940.c
@@ -16,6 +16,8 @@
 #include <linux/string.h>
 #include <linux/ctype.h>
 #include <linux/leds.h>
+#include <linux/gpio.h>
+
 #include <mach/regs-gpio.h>
 #include <mach/hardware.h>
 #include <mach/h1940-latch.h>
diff --git a/drivers/leds/leds-s3c24xx.c b/drivers/leds/leds-s3c24xx.c
index aa2e7ae0cdae..aa7acf3b9224 100644
--- a/drivers/leds/leds-s3c24xx.c
+++ b/drivers/leds/leds-s3c24xx.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/leds.h>
+#include <linux/gpio.h>
 
 #include <mach/hardware.h>
 #include <mach/regs-gpio.h>
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig
index 60955a70d880..1bb66e1ed5a7 100644
--- a/drivers/media/dvb/dvb-usb/Kconfig
+++ b/drivers/media/dvb/dvb-usb/Kconfig
@@ -216,7 +216,7 @@ config DVB_USB_TTUSB2
         help
           Say Y here to support the Pinnacle 400e DVB-S USB2.0 receiver. The
           firmware protocol used by this module is similar to the one used by the
-          old ttusb-driver - that's why the module is called dvb-usb-ttusb2.ko.
+          old ttusb-driver - that's why the module is called dvb-usb-ttusb2.
 
 config DVB_USB_DTT200U
         tristate "WideView WT-200U and WT-220U (pen) DVB-T USB2.0 support (Yakumo/Hama/Typhoon/Yuan)"
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index 9d48da2fb013..57835f5715fc 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -758,10 +758,14 @@ config VIDEO_MX1
         ---help---
           This is a v4l2 driver for the i.MX1/i.MXL CMOS Sensor Interface
 
+config MX3_VIDEO
+        bool
+
 config VIDEO_MX3
         tristate "i.MX3x Camera Sensor Interface driver"
         depends on VIDEO_DEV && MX3_IPU && SOC_CAMERA
         select VIDEOBUF_DMA_CONTIG
+        select MX3_VIDEO
         ---help---
           This is a v4l2 driver for the i.MX3x Camera Sensor Interface
 
diff --git a/drivers/media/video/hdpvr/hdpvr-video.c b/drivers/media/video/hdpvr/hdpvr-video.c
index 3e6ffee8dfed..ccd47f57f42c 100644
--- a/drivers/media/video/hdpvr/hdpvr-video.c
+++ b/drivers/media/video/hdpvr/hdpvr-video.c
@@ -181,7 +181,7 @@ static int hdpvr_submit_buffers(struct hdpvr_device *dev)
                                  buff_list);
                 if (buf->status != BUFSTAT_AVAILABLE) {
                         v4l2_err(&dev->v4l2_dev,
-                                 "buffer not marked as availbale\n");
+                                 "buffer not marked as available\n");
                         ret = -EFAULT;
                         goto err;
                 }
diff --git a/drivers/message/fusion/lsi/mpi_history.txt b/drivers/message/fusion/lsi/mpi_history.txt
index 693e4b511354..fa9249b4971a 100644
--- a/drivers/message/fusion/lsi/mpi_history.txt
+++ b/drivers/message/fusion/lsi/mpi_history.txt
@@ -130,7 +130,7 @@ mpi_ioc.h
  *  08-08-01  01.02.01  Original release for v1.2 work.
  *                      New format for FWVersion and ProductId in
  *                      MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
- *  08-31-01  01.02.02  Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
+ *  08-31-01  01.02.02  Added event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  *                      related structure and defines.
  *                      Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  *                      Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
@@ -190,7 +190,7 @@ mpi_ioc.h
  *  10-11-06  01.05.12  Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED.
  *                      Added MaxInitiators field to PortFacts reply.
  *                      Added SAS Device Status Change ReasonCode for
- *                      asynchronous notificaiton.
+ *                      asynchronous notification.
  *                      Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event
  *                      data structure.
  *                      Added new ImageType values for FWDownload and FWUpload
@@ -623,7 +623,7 @@ mpi_fc.h
  *  11-02-00  01.01.01  Original release for post 1.0 work
  *  12-04-00  01.01.02  Added messages for Common Transport Send and
  *                      Primitive Send.
- *  01-09-01  01.01.03  Modifed some of the new flags to have an MPI prefix
+ *  01-09-01  01.01.03  Modified some of the new flags to have an MPI prefix
  *                      and modified the FcPrimitiveSend flags.
  *  01-25-01  01.01.04  Move InitiatorIndex in LinkServiceRsp reply to a larger
  *                      field.
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 660bda0c5a1e..40111a6d8d5b 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -166,7 +166,7 @@ config MMC_ATMELMCI_DMA
 
 config MMC_IMX
         tristate "Motorola i.MX Multimedia Card Interface support"
-        depends on ARCH_IMX
+        depends on ARCH_MX1
         help
           This selects the Motorola i.MX Multimedia card Interface.
           If you have a i.MX platform with a Multimedia Card slot,
diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
index cf6a100bb38f..7b603e4b41db 100644
--- a/drivers/mmc/host/atmel-mci.c
+++ b/drivers/mmc/host/atmel-mci.c
@@ -177,6 +177,7 @@ struct atmel_mci {
  *      available.
  * @wp_pin: GPIO pin used for card write protect sending, or negative
  *      if not available.
+ * @detect_is_active_high: The state of the detect pin when it is active.
  * @detect_timer: Timer used for debouncing @detect_pin interrupts.
  */
 struct atmel_mci_slot {
@@ -196,6 +197,7 @@ struct atmel_mci_slot {
 
         int                     detect_pin;
         int                     wp_pin;
+        bool                    detect_is_active_high;
 
         struct timer_list       detect_timer;
 };
@@ -924,7 +926,8 @@ static int atmci_get_cd(struct mmc_host *mmc)
         struct atmel_mci_slot   *slot = mmc_priv(mmc);
 
         if (gpio_is_valid(slot->detect_pin)) {
-                present = !gpio_get_value(slot->detect_pin);
+                present = !(gpio_get_value(slot->detect_pin) ^
+                            slot->detect_is_active_high);
                 dev_dbg(&mmc->class_dev, "card is %spresent\n",
                                 present ? "" : "not ");
         }
@@ -1028,7 +1031,8 @@ static void atmci_detect_change(unsigned long data)
                 return;
 
         enable_irq(gpio_to_irq(slot->detect_pin));
-        present = !gpio_get_value(slot->detect_pin);
+        present = !(gpio_get_value(slot->detect_pin) ^
+                    slot->detect_is_active_high);
         present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
 
         dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
@@ -1456,6 +1460,7 @@ static int __init atmci_init_slot(struct atmel_mci *host,
         slot->host = host;
         slot->detect_pin = slot_data->detect_pin;
         slot->wp_pin = slot_data->wp_pin;
+        slot->detect_is_active_high = slot_data->detect_is_active_high;
         slot->sdc_reg = sdc_reg;
 
         mmc->ops = &atmci_ops;
@@ -1477,7 +1482,8 @@ static int __init atmci_init_slot(struct atmel_mci *host,
                 if (gpio_request(slot->detect_pin, "mmc_detect")) {
                         dev_dbg(&mmc->class_dev, "no detect pin available\n");
                         slot->detect_pin = -EBUSY;
-                } else if (gpio_get_value(slot->detect_pin)) {
+                } else if (gpio_get_value(slot->detect_pin) ^
+                                slot->detect_is_active_high) {
                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
                 }
         }
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 7d4febdab286..e1aa8471ab1c 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -546,7 +546,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
                 host->mclk = clk_get_rate(host->clk);
                 DBG(host, "eventual mclk rate: %u Hz\n", host->mclk);
         }
-        host->base = ioremap(dev->res.start, SZ_4K);
+        host->base = ioremap(dev->res.start, resource_size(&dev->res));
         if (!host->base) {
                 ret = -ENOMEM;
                 goto clk_disable;
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index c40cb96255a2..1cf9cfb3b64f 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1073,7 +1073,6 @@ static int __init omap_mmc_probe(struct platform_device *pdev)
         mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
         mmc->max_seg_size = mmc->max_req_size;
 
-        mmc->ocr_avail = mmc_slot(host).ocr_mask;
         mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;
 
         if (pdata->slots[host->slot_id].wires >= 8)
@@ -1110,13 +1109,14 @@ static int __init omap_mmc_probe(struct platform_device *pdev)
                 goto err_irq;
         }
 
+        /* initialize power supplies, gpios, etc */
         if (pdata->init != NULL) {
                 if (pdata->init(&pdev->dev) != 0) {
-                        dev_dbg(mmc_dev(host->mmc),
-                                "Unable to configure MMC IRQs\n");
+                        dev_dbg(mmc_dev(host->mmc), "late init error\n");
                         goto err_irq_cd_init;
                 }
         }
+        mmc->ocr_avail = mmc_slot(host).ocr_mask;
 
         /* Request IRQ for card detect */
         if ((mmc_slot(host).card_detect_irq)) {
diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c
index 2db166b7096f..4eb4f37544ab 100644
--- a/drivers/mmc/host/s3cmci.c
+++ b/drivers/mmc/host/s3cmci.c
@@ -17,6 +17,7 @@
 #include <linux/mmc/host.h>
 #include <linux/platform_device.h>
 #include <linux/cpufreq.h>
+#include <linux/gpio.h>
 #include <linux/irq.h>
 #include <linux/io.h>
 
@@ -789,7 +790,7 @@ static void s3cmci_dma_setup(struct s3cmci_host *host,
 
         last_source = source;
 
-        s3c2410_dma_devconfig(host->dma, source, 3,
+        s3c2410_dma_devconfig(host->dma, source,
                               host->mem->start + host->sdidata);
 
         if (!setup_ok) {
@@ -1121,7 +1122,7 @@ static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
         case MMC_POWER_OFF:
         default:
                 s3c2410_gpio_setpin(S3C2410_GPE5, 0);
-                s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_OUTP);
+                s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPIO_OUTPUT);
 
                 if (host->is2440)
                         mci_con |= S3C2440_SDICON_SDRESET;
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 7d04fb9ddcaa..b8e35a0b4d72 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -154,7 +154,8 @@ config MTD_AFS_PARTS
 
           You will still need the parsing functions to be called by the driver
           for your particular device. It won't happen automatically. The
-          'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
+          'armflash' map driver (CONFIG_MTD_ARM_INTEGRATOR) does this, for
+          example.
 
 config MTD_OF_PARTS
         tristate "Flash partition map based on OF description"
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
index 6fde0a2e3567..325fab92a62c 100644
--- a/drivers/mtd/devices/Kconfig
+++ b/drivers/mtd/devices/Kconfig
@@ -49,7 +49,7 @@ config MTD_MS02NV
           If you want to compile this driver as a module ( = code which can be
           inserted in and removed from the running kernel whenever you want),
           say M here and read <file:Documentation/kbuild/modules.txt>.
-          The module will be called ms02-nv.ko.
+          The module will be called ms02-nv.
 
 config MTD_DATAFLASH
         tristate "Support for AT45xxx DataFlash"
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 890936d0275e..f3276897859e 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -260,7 +260,7 @@ config MTD_NAND_BASLER_EXCITE
         help
           This enables the driver for the NAND flash device found on the
           Basler eXcite Smart Camera. If built as a module, the driver
-          will be named "excite_nandflash.ko".
+          will be named excite_nandflash.
 
 config MTD_NAND_CAFE
         tristate "NAND support for OLPC CAFÉ chip"
@@ -282,7 +282,7 @@ config MTD_NAND_CS553X
           controller is enabled for NAND, and currently requires that
           the controller be in MMIO mode.
 
-          If you say "m", the module will be called "cs553x_nand.ko".
+          If you say "m", the module will be called cs553x_nand.
 
 config MTD_NAND_ATMEL
         tristate "Support for NAND Flash / SmartMedia on AT91 and AVR32"
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index f2e9de1414df..6391e3dc8002 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -39,7 +39,6 @@
 #include <mach/gpmc.h>
 #include <mach/onenand.h>
 #include <mach/gpio.h>
-#include <mach/pm.h>
 
 #include <mach/dma.h>
 
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index f3c4a3b910bb..3111b6c7cbc3 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1880,7 +1880,7 @@ config FEC_MPC52xx
         ---help---
           This option enables support for the MPC5200's on-chip
           Fast Ethernet Controller
-          If compiled as module, it will be called 'fec_mpc52xx.ko'.
+          If compiled as module, it will be called fec_mpc52xx.
 
 config FEC_MPC52xx_MDIO
         bool "MPC52xx FEC MDIO bus driver"
@@ -1892,7 +1892,7 @@ config FEC_MPC52xx_MDIO
           (Motorola? industry standard).
           If your board uses an external PHY connected to FEC, enable this.
           If not sure, enable.
-          If compiled as module, it will be called 'fec_mpc52xx_phy.ko'.
+          If compiled as module, it will be called fec_mpc52xx_phy.
 
 config NE_H8300
         tristate "NE2000 compatible support for H8/300"
diff --git a/drivers/net/appletalk/ltpc.c b/drivers/net/appletalk/ltpc.c
index 78cc71469136..b642647170be 100644
--- a/drivers/net/appletalk/ltpc.c
+++ b/drivers/net/appletalk/ltpc.c
@@ -1220,7 +1220,7 @@ static int __init ltpc_setup(char *str)
                 if (ints[0] > 2) {
                         dma = ints[3];
                 }
-                /* ignore any other paramters */
+                /* ignore any other parameters */
         }
         return 1;
 }
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index a740053d3af3..b6d188115caf 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -456,7 +456,8 @@ static inline void queue_put_desc(unsigned int queue, u32 phys,
         debug_desc(phys, desc);
         BUG_ON(phys & 0x1F);
         qmgr_put_entry(queue, phys);
-        BUG_ON(qmgr_stat_overflow(queue));
+        /* Don't check for queue overflow here, we've allocated sufficient
+           length and queues >= 32 don't support this check anyway. */
 }
 
 
@@ -512,8 +513,8 @@ static int eth_poll(struct napi_struct *napi, int budget)
 #endif
                         napi_complete(napi);
                         qmgr_enable_irq(rxq);
-                        if (!qmgr_stat_empty(rxq) &&
-                            napi_reschedule(napi)) {
+                        if (!qmgr_stat_below_low_watermark(rxq) &&
+                            napi_reschedule(napi)) { /* not empty again */
 #if DEBUG_RX
                                 printk(KERN_DEBUG "%s: eth_poll"
                                        " napi_reschedule successed\n",
@@ -630,9 +631,9 @@ static void eth_txdone_irq(void *unused)
                         port->tx_buff_tab[n_desc] = NULL;
                 }
 
-                start = qmgr_stat_empty(port->plat->txreadyq);
+                start = qmgr_stat_below_low_watermark(port->plat->txreadyq);
                 queue_put_desc(port->plat->txreadyq, phys, desc);
-                if (start) {
+                if (start) { /* TX-ready queue was empty */
 #if DEBUG_TX
                         printk(KERN_DEBUG "%s: eth_txdone_irq xmit ready\n",
                                port->netdev->name);
@@ -708,13 +709,14 @@ static int eth_xmit(struct sk_buff *skb, struct net_device *dev)
         queue_put_desc(TX_QUEUE(port->id), tx_desc_phys(port, n), desc);
         dev->trans_start = jiffies;
 
-        if (qmgr_stat_empty(txreadyq)) {
+        if (qmgr_stat_below_low_watermark(txreadyq)) { /* empty */
 #if DEBUG_TX
                 printk(KERN_DEBUG "%s: eth_xmit queue full\n", dev->name);
 #endif
                 netif_stop_queue(dev);
                 /* we could miss TX ready interrupt */
-                if (!qmgr_stat_empty(txreadyq)) {
+                /* really empty in fact */
+                if (!qmgr_stat_below_low_watermark(txreadyq)) {
 #if DEBUG_TX
                         printk(KERN_DEBUG "%s: eth_xmit ready again\n",
                                dev->name);
@@ -814,29 +816,29 @@ static int request_queues(struct port *port)
         int err;
 
         err = qmgr_request_queue(RXFREE_QUEUE(port->id), RX_DESCS, 0, 0,
-                            "%s:RX-free", port->netdev->name);
+                                 "%s:RX-free", port->netdev->name);
         if (err)
                 return err;
 
         err = qmgr_request_queue(port->plat->rxq, RX_DESCS, 0, 0,
-                            "%s:RX", port->netdev->name);
+                                 "%s:RX", port->netdev->name);
         if (err)
                 goto rel_rxfree;
 
         err = qmgr_request_queue(TX_QUEUE(port->id), TX_DESCS, 0, 0,
-                            "%s:TX", port->netdev->name);
+                                 "%s:TX", port->netdev->name);
         if (err)
                 goto rel_rx;
 
         err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0,
-                            "%s:TX-ready", port->netdev->name);
+                                 "%s:TX-ready", port->netdev->name);
         if (err)
                 goto rel_tx;
 
         /* TX-done queue handles skbs sent out by the NPEs */
         if (!ports_open) {
                 err = qmgr_request_queue(TXDONE_QUEUE, TXDONE_QUEUE_LEN, 0, 0,
-                                    "%s:TX-done", DRV_NAME);
+                                         "%s:TX-done", DRV_NAME);
                 if (err)
                         goto rel_txready;
         }
diff --git a/drivers/net/b44.h b/drivers/net/b44.h
index e678498de6db..d24158e7f309 100644
--- a/drivers/net/b44.h
+++ b/drivers/net/b44.h
@@ -97,7 +97,7 @@
 #define B44_DMARX_STAT  0x021CUL /* DMA RX Current Active Desc. + Status */
 #define  DMARX_STAT_CDMASK      0x00000fff /* Current Descriptor Mask */
 #define  DMARX_STAT_SMASK       0x0000f000 /* State Mask */
-#define  DMARX_STAT_SDISABLED   0x00000000 /* State Disbaled */
+#define  DMARX_STAT_SDISABLED   0x00000000 /* State Disabled */
 #define  DMARX_STAT_SACTIVE     0x00001000 /* State Active */
 #define  DMARX_STAT_SIDLE       0x00002000 /* State Idle Wait */
 #define  DMARX_STAT_SSTOPPED    0x00003000 /* State Stopped */
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c
index 8d740376bbd2..44f77eb1180f 100644
--- a/drivers/net/cnic.c
+++ b/drivers/net/cnic.c
@@ -25,6 +25,8 @@
 #include <linux/delay.h>
 #include <linux/ethtool.h>
 #include <linux/if_vlan.h>
+#include <linux/module.h>
+
 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
 #define BCM_VLAN 1
 #endif
@@ -1454,6 +1456,7 @@ static inline u16 cnic_get_vlan(struct net_device *dev,
 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
                              struct dst_entry **dst)
 {
+#if defined(CONFIG_INET)
         struct flowi fl;
         int err;
         struct rtable *rt;
@@ -1465,12 +1468,15 @@ static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
         if (!err)
                 *dst = &rt->u.dst;
         return err;
+#else
+        return -ENETUNREACH;
+#endif
 }
 
 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
                              struct dst_entry **dst)
 {
-#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
+#if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
         struct flowi fl;
 
         memset(&fl, 0, sizeof(fl));
@@ -1550,7 +1556,7 @@ static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
         clear_bit(SK_F_IPV6, &csk->flags);
 
         if (is_v6) {
-#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
+#if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
                 set_bit(SK_F_IPV6, &csk->flags);
                 err = cnic_get_v6_route(&saddr->remote.v6, &dst);
                 if (err)
diff --git a/drivers/net/e100.c b/drivers/net/e100.c
index 0f9ee1348552..af5364f49550 100644
--- a/drivers/net/e100.c
+++ b/drivers/net/e100.c
@@ -2785,7 +2785,7 @@ static int e100_resume(struct pci_dev *pdev)
         /* ack any pending wake events, disable PME */
         pci_enable_wake(pdev, 0, 0);
 
-        /* disbale reverse auto-negotiation */
+        /* disable reverse auto-negotiation */
         if (nic->phy == phy_82552_v) {
                 u16 smartspeed = mdio_read(netdev, nic->mii.phy_id,
                                            E100_82552_SMARTSPEED);
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index f37360aa12a8..44f0bf23dafc 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -62,7 +62,7 @@ struct e1000_info;
         e_printk(KERN_NOTICE, adapter, format, ## arg)
 
 
-/* Interrupt modes, as used by the IntMode paramter */
+/* Interrupt modes, as used by the IntMode parameter */
 #define E1000E_INT_MODE_LEGACY          0
 #define E1000E_INT_MODE_MSI             1
 #define E1000E_INT_MODE_MSIX            2
diff --git a/drivers/net/ehea/ehea.h b/drivers/net/ehea/ehea.h
index 16a41389575a..78952f8324e2 100644
--- a/drivers/net/ehea/ehea.h
+++ b/drivers/net/ehea/ehea.h
@@ -268,7 +268,7 @@ struct ehea_qp_init_attr {
 };
 
 /*
- * Event Queue attributes, passed as paramter
+ * Event Queue attributes, passed as parameter
  */
 struct ehea_eq_attr {
         u32 type;
diff --git a/drivers/net/igbvf/igbvf.h b/drivers/net/igbvf/igbvf.h
index 4bff35e46871..d488733893a6 100644
--- a/drivers/net/igbvf/igbvf.h
+++ b/drivers/net/igbvf/igbvf.h
@@ -45,7 +45,7 @@ struct igbvf_adapter;
 /* Interrupt defines */
 #define IGBVF_START_ITR                 648 /* ~6000 ints/sec */
 
-/* Interrupt modes, as used by the IntMode paramter */
+/* Interrupt modes, as used by the IntMode parameter */
 #define IGBVF_INT_MODE_LEGACY           0
 #define IGBVF_INT_MODE_MSI              1
 #define IGBVF_INT_MODE_MSIX             2
diff --git a/drivers/net/ipg.h b/drivers/net/ipg.h
index dd9318f19497..dfc2541bb556 100644
--- a/drivers/net/ipg.h
+++ b/drivers/net/ipg.h
@@ -514,7 +514,7 @@ enum ipg_regs {
 #define         IPG_DMALIST_ALIGN_PAD   0x07
 #define         IPG_MULTICAST_HASHTABLE_SIZE    0x40
 
-/* Number of miliseconds to wait after issuing a software reset.
+/* Number of milliseconds to wait after issuing a software reset.
  * 0x05 <= IPG_AC_RESETWAIT to account for proper 10Mbps operation.
  */
 #define         IPG_AC_RESETWAIT             0x05
diff --git a/drivers/net/mlx4/en_netdev.c b/drivers/net/mlx4/en_netdev.c
index 7bcc49de1637..e8eeef0c9c9a 100644
--- a/drivers/net/mlx4/en_netdev.c
+++ b/drivers/net/mlx4/en_netdev.c
@@ -371,7 +371,7 @@ static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
         int i;
 
         /* If we haven't received a specific coalescing setting
-         * (module param), we set the moderation paramters as follows:
+         * (module param), we set the moderation parameters as follows:
          * - moder_cnt is set to the number of mtu sized packets to
          *   satisfy our coelsing target.
          * - moder_time is set to a fixed value.
diff --git a/drivers/net/niu.h b/drivers/net/niu.h
index 8754e44cadae..3bd0b5933d59 100644
--- a/drivers/net/niu.h
+++ b/drivers/net/niu.h
@@ -3242,8 +3242,8 @@ struct niu {
         struct niu_parent               *parent;
 
         u32                             flags;
-#define NIU_FLAGS_HOTPLUG_PHY_PRESENT   0x02000000 /* Removebale PHY detected*/
-#define NIU_FLAGS_HOTPLUG_PHY           0x01000000 /* Removebale PHY */
+#define NIU_FLAGS_HOTPLUG_PHY_PRESENT   0x02000000 /* Removeable PHY detected*/
+#define NIU_FLAGS_HOTPLUG_PHY           0x01000000 /* Removeable PHY */
 #define NIU_FLAGS_VPD_VALID             0x00800000 /* VPD has valid version */
 #define NIU_FLAGS_MSIX                  0x00400000 /* MSI-X in use */
 #define NIU_FLAGS_MCAST                 0x00200000 /* multicast filter enabled */
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index c92ced247947..1fd5ecb24425 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -3174,7 +3174,7 @@ static int ql_adapter_reset(struct ql_adapter *qdev)
 
         if (value & RST_FO_FR) {
                 QPRINTK(qdev, IFDOWN, ERR,
-                        "ETIMEOUT!!! errored out of resetting the chip!\n");
+                        "ETIMEDOUT!!! errored out of resetting the chip!\n");
                 status = -ETIMEDOUT;
         }
 
diff --git a/drivers/net/qlge/qlge_mpi.c b/drivers/net/qlge/qlge_mpi.c
index 9f81b797f10b..ac9493f6c1a1 100644
--- a/drivers/net/qlge/qlge_mpi.c
+++ b/drivers/net/qlge/qlge_mpi.c
@@ -141,7 +141,7 @@ end:
 /* We are being asked by firmware to accept
  * a change to the port.  This is only
  * a change to max frame sizes (Tx/Rx), pause
- * paramters, or loopback mode. We wake up a worker
+ * parameters, or loopback mode. We wake up a worker
  * to handler processing this since a mailbox command
  * will need to be sent to ACK the request.
  */
@@ -371,7 +371,7 @@ static int ql_mpi_handler(struct ql_adapter *qdev, struct mbox_params *mbcp)
         /* We are being asked by firmware to accept
          * a change to the port.  This is only
          * a change to max frame sizes (Tx/Rx), pause
-         * paramters, or loopback mode.
+         * parameters, or loopback mode.
          */
         case AEN_IDC_REQ:
                 status = ql_idc_req_aen(qdev);
@@ -380,7 +380,7 @@ static int ql_mpi_handler(struct ql_adapter *qdev, struct mbox_params *mbcp)
         /* Process and inbound IDC event.
          * This will happen when we're trying to
          * change tx/rx max frame size, change pause
-         * paramters or loopback mode.
+         * parameters or loopback mode.
          */
         case AEN_IDC_CMPLT:
         case AEN_IDC_EXT:
diff --git a/drivers/net/skfp/h/smt.h b/drivers/net/skfp/h/smt.h
index 1ff589988d10..2976757a36fb 100644
--- a/drivers/net/skfp/h/smt.h
+++ b/drivers/net/skfp/h/smt.h
@@ -413,7 +413,7 @@ struct smt_p_reason {
 #define SMT_RDF_SUCCESS 0x00000003      /* success (PMF) */
 #define SMT_RDF_BADSET  0x00000004      /* bad set count (PMF) */
 #define SMT_RDF_ILLEGAL 0x00000005      /* read only (PMF) */
-#define SMT_RDF_NOPARAM 0x6             /* paramter not supported (PMF) */
+#define SMT_RDF_NOPARAM 0x6             /* parameter not supported (PMF) */
 #define SMT_RDF_RANGE   0x8             /* out of range */
 #define SMT_RDF_AUTHOR  0x9             /* not autohorized */
 #define SMT_RDF_LENGTH  0x0a            /* length error */
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index 329f890e2903..f1f773b17fe1 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -45,7 +45,8 @@
     defined(CONFIG_MACH_ZYLONITE) ||\
     defined(CONFIG_MACH_LITTLETON) ||\
     defined(CONFIG_MACH_ZYLONITE2) ||\
-    defined(CONFIG_ARCH_VIPER)
+    defined(CONFIG_ARCH_VIPER) ||\
+    defined(CONFIG_MACH_STARGATE2)
 
 #include <asm/mach-types.h>
 
@@ -73,7 +74,7 @@
 /* We actually can't write halfwords properly if not word aligned */
 static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg)
 {
-        if (machine_is_mainstone() && reg & 2) {
+        if ((machine_is_mainstone() || machine_is_stargate2()) && reg & 2) {
                 unsigned int v = val << 16;
                 v |= readl(ioaddr + (reg & ~2)) & 0xffff;
                 writel(v, ioaddr + (reg & ~2));
diff --git a/drivers/net/tokenring/3c359.c b/drivers/net/tokenring/3c359.c
index 534c0f38483c..0337b9d673f4 100644
--- a/drivers/net/tokenring/3c359.c
+++ b/drivers/net/tokenring/3c359.c
@@ -79,7 +79,7 @@ MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ;
 MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver \n") ;
 MODULE_FIRMWARE(FW_NAME);
 
-/* Module paramters */
+/* Module parameters */
 
 /* Ring Speed 0,4,16 
  * 0 = Autosense   
diff --git a/drivers/net/tokenring/lanstreamer.c b/drivers/net/tokenring/lanstreamer.c
index 2e70ee8f1459..46a2cc92d979 100644
--- a/drivers/net/tokenring/lanstreamer.c
+++ b/drivers/net/tokenring/lanstreamer.c
@@ -169,7 +169,7 @@ static char *open_min_error[] = {
         "Monitor Contention failer for RPL", "FDX Protocol Error"
 };
 
-/* Module paramters */
+/* Module parameters */
 
 /* Ring Speed 0,4,16
  * 0 = Autosense         
diff --git a/drivers/net/tokenring/olympic.c b/drivers/net/tokenring/olympic.c
index d068a9d36883..2d819fc85589 100644
--- a/drivers/net/tokenring/olympic.c
+++ b/drivers/net/tokenring/olympic.c
@@ -132,7 +132,7 @@ static char *open_min_error[] = {"No error", "Function Failure", "Signal Lost",
                                    "Reserved", "Reserved", "No Monitor Detected for RPL", 
                                    "Monitor Contention failer for RPL", "FDX Protocol Error"};
 
-/* Module paramters */
+/* Module parameters */
 
 MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ; 
 MODULE_DESCRIPTION("Olympic PCI/Cardbus Chipset Driver") ; 
diff --git a/drivers/net/ucc_geth_ethtool.c b/drivers/net/ucc_geth_ethtool.c
index 6fcb500257bc..61fe80dda3e3 100644
--- a/drivers/net/ucc_geth_ethtool.c
+++ b/drivers/net/ucc_geth_ethtool.c
@@ -7,7 +7,7 @@
  *
  * Limitation:
  * Can only get/set setttings of the first queue.
- * Need to re-open the interface manually after changing some paramters.
+ * Need to re-open the interface manually after changing some parameters.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index f3a2fce6166c..47f68cfa7e21 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -398,7 +398,7 @@ static void rx_complete (struct urb *urb)
 
         /* stalls need manual reset. this is rare ... except that
          * when going through USB 2.0 TTs, unplug appears this way.
-         * we avoid the highspeed version of the ETIMEOUT/EILSEQ
+         * we avoid the highspeed version of the ETIMEDOUT/EILSEQ
          * storm, recovering as needed.
          */
         case -EPIPE:
diff --git a/drivers/net/wan/ixp4xx_hss.c b/drivers/net/wan/ixp4xx_hss.c
index 765a7f5d6aa4..a6dc317083d3 100644
--- a/drivers/net/wan/ixp4xx_hss.c
+++ b/drivers/net/wan/ixp4xx_hss.c
@@ -579,7 +579,8 @@ static inline void queue_put_desc(unsigned int queue, u32 phys,
         debug_desc(phys, desc);
         BUG_ON(phys & 0x1F);
         qmgr_put_entry(queue, phys);
-        BUG_ON(qmgr_stat_overflow(queue));
+        /* Don't check for queue overflow here, we've allocated sufficient
+           length and queues >= 32 don't support this check anyway. */
 }
 
 
@@ -789,10 +790,10 @@ static void hss_hdlc_txdone_irq(void *pdev)
                 free_buffer_irq(port->tx_buff_tab[n_desc]);
                 port->tx_buff_tab[n_desc] = NULL;
 
-                start = qmgr_stat_empty(port->plat->txreadyq);
+                start = qmgr_stat_below_low_watermark(port->plat->txreadyq);
                 queue_put_desc(port->plat->txreadyq,
                                tx_desc_phys(port, n_desc), desc);
-                if (start) {
+                if (start) { /* TX-ready queue was empty */
 #if DEBUG_TX
                         printk(KERN_DEBUG "%s: hss_hdlc_txdone_irq xmit"
                                " ready\n", dev->name);
@@ -867,13 +868,13 @@ static int hss_hdlc_xmit(struct sk_buff *skb, struct net_device *dev)
         queue_put_desc(queue_ids[port->id].tx, tx_desc_phys(port, n), desc);
         dev->trans_start = jiffies;
 
-        if (qmgr_stat_empty(txreadyq)) {
+        if (qmgr_stat_below_low_watermark(txreadyq)) { /* empty */
 #if DEBUG_TX
                 printk(KERN_DEBUG "%s: hss_hdlc_xmit queue full\n", dev->name);
 #endif
                 netif_stop_queue(dev);
                 /* we could miss TX ready interrupt */
-                if (!qmgr_stat_empty(txreadyq)) {
+                if (!qmgr_stat_below_low_watermark(txreadyq)) {
 #if DEBUG_TX
                         printk(KERN_DEBUG "%s: hss_hdlc_xmit ready again\n",
                                dev->name);
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index 3d94e7dfea69..3359497012aa 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -310,7 +310,7 @@ config PRISM54
           If you want to compile the driver as a module ( = code which can be
           inserted in and removed from the running kernel whenever you want),
           say M here and read <file:Documentation/kbuild/modules.txt>.
-          The module will be called prism54.ko.
+          The module will be called prism54.
 
 config USB_ZD1201
         tristate "USB ZD1201 based Wireless device support"
diff --git a/drivers/net/wireless/hostap/Kconfig b/drivers/net/wireless/hostap/Kconfig
index 932d207bce23..c15db2293515 100644
--- a/drivers/net/wireless/hostap/Kconfig
+++ b/drivers/net/wireless/hostap/Kconfig
@@ -29,7 +29,7 @@ config HOSTAP
         PLX/PCI/CS version of the driver to actually use the driver.
 
         The driver can be compiled as a module and it will be called
-        "hostap.ko".
+        hostap.
 
 config HOSTAP_FIRMWARE
         bool "Support downloading firmware images with Host AP driver"
@@ -68,7 +68,7 @@ config HOSTAP_PLX
         driver.
 
         The driver can be compiled as a module and will be named
-        "hostap_plx.ko".
+        hostap_plx.
 
 config HOSTAP_PCI
         tristate "Host AP driver for Prism2.5 PCI adaptors"
@@ -81,7 +81,7 @@ config HOSTAP_PCI
         driver.
 
         The driver can be compiled as a module and will be named
-        "hostap_pci.ko".
+        hostap_pci.
 
 config HOSTAP_CS
         tristate "Host AP driver for Prism2/2.5/3 PC Cards"
@@ -94,4 +94,4 @@ config HOSTAP_CS
         driver.
 
         The driver can be compiled as a module and will be named
-        "hostap_cs.ko".
+        hostap_cs.
diff --git a/drivers/net/wireless/iwlwifi/Kconfig b/drivers/net/wireless/iwlwifi/Kconfig
index 8304f6406a17..736162324ba4 100644
--- a/drivers/net/wireless/iwlwifi/Kconfig
+++ b/drivers/net/wireless/iwlwifi/Kconfig
@@ -75,7 +75,7 @@ config IWLAGN
           If you want to compile the driver as a module ( = code which can be
           inserted in and removed from the running kernel whenever you want),
           say M here and read <file:Documentation/kbuild/modules.txt>.  The
-          module will be called iwlagn.ko.
+          module will be called iwlagn.
 
 
 config IWL4965
@@ -113,7 +113,7 @@ config IWL3945
           If you want to compile the driver as a module ( = code which can be
           inserted in and removed from the running kernel whenever you want),
           say M here and read <file:Documentation/kbuild/modules.txt>.  The
-          module will be called iwl3945.ko.
+          module will be called iwl3945.
 
 config IWL3945_SPECTRUM_MEASUREMENT
         bool "Enable Spectrum Measurement in iwl3945 driver"
diff --git a/drivers/net/wireless/rndis_wlan.c b/drivers/net/wireless/rndis_wlan.c
index bebf735cd4bd..ff0042ffe3e9 100644
--- a/drivers/net/wireless/rndis_wlan.c
+++ b/drivers/net/wireless/rndis_wlan.c
@@ -584,7 +584,7 @@ static int rndis_set_config_parameter(struct usbnet *dev, char *param,
         ret = rndis_set_oid(dev, OID_GEN_RNDIS_CONFIG_PARAMETER,
                                                         infobuf, info_len);
         if (ret != 0)
-                devdbg(dev, "setting rndis config paramater failed, %d.", ret);
+                devdbg(dev, "setting rndis config parameter failed, %d.", ret);
 
         kfree(infobuf);
         return ret;
diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig
index bfc5d9cf716e..1ae11c7f17af 100644
--- a/drivers/net/wireless/rt2x00/Kconfig
+++ b/drivers/net/wireless/rt2x00/Kconfig
@@ -9,11 +9,11 @@ menuconfig RT2X00
 
           When building one of the individual drivers, the rt2x00 library
           will also be created. That library (when the driver is built as
-          a module) will be called "rt2x00lib.ko".
+          a module) will be called rt2x00lib.
 
           Additionally PCI and USB libraries will also be build depending
           on the types of drivers being selected, these libraries will be
-          called "rt2x00pci.ko" and "rt2x00usb.ko".
+          called rt2x00pci and rt2x00usb.
 
 if RT2X00
 
@@ -26,7 +26,7 @@ config RT2400PCI
           This adds support for rt2400 wireless chipset family.
           Supported chips: RT2460.
 
-          When compiled as a module, this driver will be called "rt2400pci.ko".
+          When compiled as a module, this driver will be called rt2400pci.
 
 config RT2500PCI
         tristate "Ralink rt2500 (PCI/PCMCIA) support"
@@ -37,7 +37,7 @@ config RT2500PCI
           This adds support for rt2500 wireless chipset family.
           Supported chips: RT2560.
 
-          When compiled as a module, this driver will be called "rt2500pci.ko".
+          When compiled as a module, this driver will be called rt2500pci.
 
 config RT61PCI
         tristate "Ralink rt2501/rt61 (PCI/PCMCIA) support"
@@ -51,7 +51,7 @@ config RT61PCI
           This adds support for rt2501 wireless chipset family.
           Supported chips: RT2561, RT2561S & RT2661.
 
-          When compiled as a module, this driver will be called "rt61pci.ko".
+          When compiled as a module, this driver will be called rt61pci.
 
 config RT2500USB
         tristate "Ralink rt2500 (USB) support"
@@ -62,7 +62,7 @@ config RT2500USB
           This adds support for rt2500 wireless chipset family.
           Supported chips: RT2571 & RT2572.
 
-          When compiled as a module, this driver will be called "rt2500usb.ko".
+          When compiled as a module, this driver will be called rt2500usb.
 
 config RT73USB
         tristate "Ralink rt2501/rt73 (USB) support"
@@ -75,7 +75,7 @@ config RT73USB
           This adds support for rt2501 wireless chipset family.
           Supported chips: RT2571W, RT2573 & RT2671.
 
-          When compiled as a module, this driver will be called "rt73usb.ko".
+          When compiled as a module, this driver will be called rt73usb.
 
 config RT2X00_LIB_PCI
         tristate
diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h
index a631613177d0..d83e3794d340 100644
--- a/drivers/net/wireless/rt2x00/rt2x00lib.h
+++ b/drivers/net/wireless/rt2x00/rt2x00lib.h
@@ -235,7 +235,7 @@ void rt2x00link_reset_tuner(struct rt2x00_dev *rt2x00dev, bool antenna);
  * @rt2x00dev: Pointer to &struct rt2x00_dev.
  *
  * Initialize work structure and all link tuning related
- * paramters. This will not start the link tuning process itself.
+ * parameters. This will not start the link tuning process itself.
  */
 void rt2x00link_register(struct rt2x00_dev *rt2x00dev);
 
diff --git a/drivers/net/wireless/wavelan_cs.c b/drivers/net/wireless/wavelan_cs.c
index e55b33961aeb..fa2821be44c2 100644
--- a/drivers/net/wireless/wavelan_cs.c
+++ b/drivers/net/wireless/wavelan_cs.c
@@ -138,7 +138,7 @@ psa_read(struct net_device *	dev,
 
 /*------------------------------------------------------------------*/
 /*
- * Write the Paramter Storage Area to the WaveLAN card's memory
+ * Write the Parameter Storage Area to the WaveLAN card's memory
  */
 static void
 psa_write(struct net_device *   dev,
diff --git a/drivers/pci/hotplug/sgi_hotplug.c b/drivers/pci/hotplug/sgi_hotplug.c
index 3eee70928d45..2d6da78fddb6 100644
--- a/drivers/pci/hotplug/sgi_hotplug.c
+++ b/drivers/pci/hotplug/sgi_hotplug.c
@@ -679,7 +679,7 @@ alloc_err:
         return rc;
 }
 
-static int sn_pci_hotplug_init(void)
+static int __init sn_pci_hotplug_init(void)
 {
         struct pci_bus *pci_bus = NULL;
         int rc;
@@ -716,7 +716,7 @@ static int sn_pci_hotplug_init(void)
         return registered == 1 ? 0 : -ENODEV;
 }
 
-static void sn_pci_hotplug_exit(void)
+static void __exit sn_pci_hotplug_exit(void)
 {
         struct hotplug_slot *bss_hotplug_slot;
 
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index 276473543982..fbf965b31c14 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -217,7 +217,7 @@ config PCMCIA_PXA2XX
         depends on ARM && ARCH_PXA && PCMCIA
         depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \
                     || MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
-                    || ARCH_VIPER || ARCH_PXA_ESERIES)
+                    || ARCH_VIPER || ARCH_PXA_ESERIES || MACH_STARGATE2)
         help
           Say Y here to include support for the PXA2xx PCMCIA controller
 
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
index bbac46327227..047394d98ac2 100644
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -73,5 +73,6 @@ pxa2xx-obj-$(CONFIG_TRIZEPS_PCMCIA)		+= pxa2xx_trizeps4.o
 pxa2xx-obj-$(CONFIG_MACH_PALMTX)                += pxa2xx_palmtx.o
 pxa2xx-obj-$(CONFIG_MACH_PALMLD)                += pxa2xx_palmld.o
 pxa2xx-obj-$(CONFIG_MACH_E740)                  += pxa2xx_e740.o
+pxa2xx-obj-$(CONFIG_MACH_STARGATE2)             += pxa2xx_stargate2.o
 
 obj-$(CONFIG_PCMCIA_PXA2XX)                     += pxa2xx_core.o $(pxa2xx-obj-y)
diff --git a/drivers/pcmcia/pxa2xx_stargate2.c b/drivers/pcmcia/pxa2xx_stargate2.c
new file mode 100644
index 000000000000..490749ea677f
--- /dev/null
+++ b/drivers/pcmcia/pxa2xx_stargate2.c
@@ -0,0 +1,174 @@
+/*
+ * linux/drivers/pcmcia/pxa2xx_stargate2.c
+ *
+ * Stargate 2 PCMCIA specific routines.
+ *
+ * Created:     December 6, 2005
+ * Author:      Ed C. Epp
+ * Copyright:   Intel Corp 2005
+ *              Jonathan Cameron <jic23@cam.ac.uk> 2009
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+
+#include <pcmcia/ss.h>
+
+#include <asm/irq.h>
+#include <asm/mach-types.h>
+
+#include "soc_common.h"
+
+#define SG2_S0_BUFF_CTL         120
+#define SG2_S0_POWER_CTL        108
+#define SG2_S0_GPIO_RESET       82
+#define SG2_S0_GPIO_DETECT      53
+#define SG2_S0_GPIO_READY       81
+
+static struct pcmcia_irqs irqs[] = {
+        { 0, IRQ_GPIO(SG2_S0_GPIO_DETECT), "PCMCIA0 CD" },
+};
+
+static int sg2_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
+{
+        skt->irq = IRQ_GPIO(SG2_S0_GPIO_READY);
+        return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
+}
+
+static void sg2_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
+{
+        soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
+}
+
+static void sg2_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
+                                    struct pcmcia_state *state)
+{
+        state->detect = !gpio_get_value(SG2_S0_GPIO_DETECT);
+        state->ready  = !!gpio_get_value(SG2_S0_GPIO_READY);
+        state->bvd1   = 0; /* not available - battery detect on card */
+        state->bvd2   = 0; /* not available */
+        state->vs_3v  = 1; /* not available - voltage detect for card */
+        state->vs_Xv  = 0; /* not available */
+        state->wrprot = 0; /* not available - write protect */
+}
+
+static int sg2_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
+                                       const socket_state_t *state)
+{
+        /* Enable card power */
+        switch (state->Vcc) {
+        case 0:
+                /* sets power ctl register high */
+                gpio_set_value(SG2_S0_POWER_CTL, 1);
+                break;
+        case 33:
+        case 50:
+                /* sets power control register low (clear) */
+                gpio_set_value(SG2_S0_POWER_CTL, 0);
+                msleep(100);
+                break;
+        default:
+                pr_err("%s(): bad Vcc %u\n",
+                       __func__, state->Vcc);
+                return -1;
+        }
+
+        /* reset */
+        gpio_set_value(SG2_S0_GPIO_RESET, !!(state->flags & SS_RESET));
+
+        return 0;
+}
+
+static void sg2_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
+{
+        soc_pcmcia_enable_irqs(skt, irqs, ARRAY_SIZE(irqs));
+}
+
+static void sg2_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
+{
+        soc_pcmcia_disable_irqs(skt, irqs, ARRAY_SIZE(irqs));
+}
+
+static struct pcmcia_low_level sg2_pcmcia_ops __initdata = {
+        .owner                  = THIS_MODULE,
+        .hw_init                = sg2_pcmcia_hw_init,
+        .hw_shutdown            = sg2_pcmcia_hw_shutdown,
+        .socket_state           = sg2_pcmcia_socket_state,
+        .configure_socket       = sg2_pcmcia_configure_socket,
+        .socket_init            = sg2_pcmcia_socket_init,
+        .socket_suspend         = sg2_pcmcia_socket_suspend,
+        .nr                     = 1,
+};
+
+static struct platform_device *sg2_pcmcia_device;
+
+static int __init sg2_pcmcia_init(void)
+{
+        int ret;
+
+        if (!machine_is_stargate2())
+                return -ENODEV;
+
+        sg2_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
+        if (!sg2_pcmcia_device)
+                return -ENOMEM;
+
+        ret = gpio_request(SG2_S0_BUFF_CTL, "SG2 CF buff ctl");
+        if (ret)
+                goto error_put_platform_device;
+        ret = gpio_request(SG2_S0_POWER_CTL, "SG2 CF power ctl");
+        if (ret)
+                goto error_free_gpio_buff_ctl;
+        ret = gpio_request(SG2_S0_GPIO_RESET, "SG2 CF reset");
+        if (ret)
+                goto error_free_gpio_power_ctl;
+        /* Set gpio directions */
+        gpio_direction_output(SG2_S0_BUFF_CTL, 0);
+        gpio_direction_output(SG2_S0_POWER_CTL, 1);
+        gpio_direction_output(SG2_S0_GPIO_RESET, 1);
+
+        ret = platform_device_add_data(sg2_pcmcia_device,
+                                       &sg2_pcmcia_ops,
+                                       sizeof(sg2_pcmcia_ops));
+        if (ret)
+                goto error_free_gpio_reset;
+
+        ret = platform_device_add(sg2_pcmcia_device);
+        if (ret)
+                goto error_free_gpio_reset;
+
+        return 0;
+error_free_gpio_reset:
+        gpio_free(SG2_S0_GPIO_RESET);
+error_free_gpio_power_ctl:
+        gpio_free(SG2_S0_POWER_CTL);
+error_free_gpio_buff_ctl:
+        gpio_free(SG2_S0_BUFF_CTL);
+error_put_platform_device:
+        platform_device_put(sg2_pcmcia_device);
+
+        return ret;
+}
+
+static void __exit sg2_pcmcia_exit(void)
+{
+        platform_device_unregister(sg2_pcmcia_device);
+        gpio_free(SG2_S0_BUFF_CTL);
+        gpio_free(SG2_S0_POWER_CTL);
+        gpio_free(SG2_S0_GPIO_RESET);
+}
+
+fs_initcall(sg2_pcmcia_init);
+module_exit(sg2_pcmcia_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:pxa2xx-pcmcia");
diff --git a/drivers/rtc/rtc-ep93xx.c b/drivers/rtc/rtc-ep93xx.c
index f7a3283dd029..551332e4ed02 100644
--- a/drivers/rtc/rtc-ep93xx.c
+++ b/drivers/rtc/rtc-ep93xx.c
@@ -12,32 +12,56 @@
 #include <linux/module.h>
 #include <linux/rtc.h>
 #include <linux/platform_device.h>
-#include <mach/hardware.h>
+#include <linux/io.h>
+
+#define EP93XX_RTC_DATA                 0x000
+#define EP93XX_RTC_MATCH                0x004
+#define EP93XX_RTC_STATUS               0x008
+#define  EP93XX_RTC_STATUS_INTR          (1<<0)
+#define EP93XX_RTC_LOAD                 0x00C
+#define EP93XX_RTC_CONTROL              0x010
+#define  EP93XX_RTC_CONTROL_MIE          (1<<0)
+#define EP93XX_RTC_SWCOMP               0x108
+#define  EP93XX_RTC_SWCOMP_DEL_MASK      0x001f0000
+#define  EP93XX_RTC_SWCOMP_DEL_SHIFT     16
+#define  EP93XX_RTC_SWCOMP_INT_MASK      0x0000ffff
+#define  EP93XX_RTC_SWCOMP_INT_SHIFT     0
+
+#define DRV_VERSION "0.3"
 
-#define EP93XX_RTC_REG(x)       (EP93XX_RTC_BASE + (x))
-#define EP93XX_RTC_DATA         EP93XX_RTC_REG(0x0000)
-#define EP93XX_RTC_LOAD         EP93XX_RTC_REG(0x000C)
-#define EP93XX_RTC_SWCOMP       EP93XX_RTC_REG(0x0108)
-
-#define DRV_VERSION "0.2"
+/*
+ * struct device dev.platform_data is used to store our private data
+ * because struct rtc_device does not have a variable to hold it.
+ */
+struct ep93xx_rtc {
+        void __iomem    *mmio_base;
+};
 
-static int ep93xx_get_swcomp(struct device *dev, unsigned short *preload,
+static int ep93xx_rtc_get_swcomp(struct device *dev, unsigned short *preload,
                                 unsigned short *delete)
 {
-        unsigned short comp = __raw_readl(EP93XX_RTC_SWCOMP);
+        struct ep93xx_rtc *ep93xx_rtc = dev->platform_data;
+        unsigned long comp;
+
+        comp = __raw_readl(ep93xx_rtc->mmio_base + EP93XX_RTC_SWCOMP);
 
         if (preload)
-                *preload = comp & 0xffff;
+                *preload = (comp & EP93XX_RTC_SWCOMP_INT_MASK)
+                                >> EP93XX_RTC_SWCOMP_INT_SHIFT;
 
         if (delete)
-                *delete = (comp >> 16) & 0x1f;
+                *delete = (comp & EP93XX_RTC_SWCOMP_DEL_MASK)
+                                >> EP93XX_RTC_SWCOMP_DEL_SHIFT;
 
         return 0;
 }
 
 static int ep93xx_rtc_read_time(struct device *dev, struct rtc_time *tm)
 {
-        unsigned long time = __raw_readl(EP93XX_RTC_DATA);
+        struct ep93xx_rtc *ep93xx_rtc = dev->platform_data;
+        unsigned long time;
+
+         time = __raw_readl(ep93xx_rtc->mmio_base + EP93XX_RTC_DATA);
 
         rtc_time_to_tm(time, tm);
         return 0;
@@ -45,7 +69,9 @@ static int ep93xx_rtc_read_time(struct device *dev, struct rtc_time *tm)
 
 static int ep93xx_rtc_set_mmss(struct device *dev, unsigned long secs)
 {
-        __raw_writel(secs + 1, EP93XX_RTC_LOAD);
+        struct ep93xx_rtc *ep93xx_rtc = dev->platform_data;
+
+        __raw_writel(secs + 1, ep93xx_rtc->mmio_base + EP93XX_RTC_LOAD);
         return 0;
 }
 
@@ -53,7 +79,7 @@ static int ep93xx_rtc_proc(struct device *dev, struct seq_file *seq)
 {
         unsigned short preload, delete;
 
-        ep93xx_get_swcomp(dev, &preload, &delete);
+        ep93xx_rtc_get_swcomp(dev, &preload, &delete);
 
         seq_printf(seq, "preload\t\t: %d\n", preload);
         seq_printf(seq, "delete\t\t: %d\n", delete);
@@ -67,54 +93,104 @@ static const struct rtc_class_ops ep93xx_rtc_ops = {
         .proc           = ep93xx_rtc_proc,
 };
 
-static ssize_t ep93xx_sysfs_show_comp_preload(struct device *dev,
+static ssize_t ep93xx_rtc_show_comp_preload(struct device *dev,
                         struct device_attribute *attr, char *buf)
 {
         unsigned short preload;
 
-        ep93xx_get_swcomp(dev, &preload, NULL);
+        ep93xx_rtc_get_swcomp(dev, &preload, NULL);
 
         return sprintf(buf, "%d\n", preload);
 }
-static DEVICE_ATTR(comp_preload, S_IRUGO, ep93xx_sysfs_show_comp_preload, NULL);
+static DEVICE_ATTR(comp_preload, S_IRUGO, ep93xx_rtc_show_comp_preload, NULL);
 
-static ssize_t ep93xx_sysfs_show_comp_delete(struct device *dev,
+static ssize_t ep93xx_rtc_show_comp_delete(struct device *dev,
                         struct device_attribute *attr, char *buf)
 {
         unsigned short delete;
 
-        ep93xx_get_swcomp(dev, NULL, &delete);
+        ep93xx_rtc_get_swcomp(dev, NULL, &delete);
 
         return sprintf(buf, "%d\n", delete);
 }
-static DEVICE_ATTR(comp_delete, S_IRUGO, ep93xx_sysfs_show_comp_delete, NULL);
+static DEVICE_ATTR(comp_delete, S_IRUGO, ep93xx_rtc_show_comp_delete, NULL);
 
 
-static int __devinit ep93xx_rtc_probe(struct platform_device *dev)
+static int __init ep93xx_rtc_probe(struct platform_device *pdev)
 {
-        struct rtc_device *rtc = rtc_device_register("ep93xx",
-                                &dev->dev, &ep93xx_rtc_ops, THIS_MODULE);
+        struct ep93xx_rtc *ep93xx_rtc;
+        struct resource *res;
+        struct rtc_device *rtc;
+        int err;
+
+        ep93xx_rtc = kzalloc(sizeof(struct ep93xx_rtc), GFP_KERNEL);
+        if (ep93xx_rtc == NULL)
+                return -ENOMEM;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (res == NULL)
+                return -ENXIO;
+
+        res = request_mem_region(res->start, resource_size(res), pdev->name);
+        if (res == NULL)
+                return -EBUSY;
+
+        ep93xx_rtc->mmio_base = ioremap(res->start, resource_size(res));
+        if (ep93xx_rtc->mmio_base == NULL) {
+                err = -ENXIO;
+                goto fail;
+        }
 
+        pdev->dev.platform_data = ep93xx_rtc;
+
+        rtc = rtc_device_register(pdev->name,
+                                &pdev->dev, &ep93xx_rtc_ops, THIS_MODULE);
         if (IS_ERR(rtc)) {
-                return PTR_ERR(rtc);
+                err = PTR_ERR(rtc);
+                goto fail;
         }
 
-        platform_set_drvdata(dev, rtc);
+        platform_set_drvdata(pdev, rtc);
 
-        device_create_file(&dev->dev, &dev_attr_comp_preload);
-        device_create_file(&dev->dev, &dev_attr_comp_delete);
+        err = device_create_file(&pdev->dev, &dev_attr_comp_preload);
+        if (err)
+                goto fail;
+        err = device_create_file(&pdev->dev, &dev_attr_comp_delete);
+        if (err) {
+                device_remove_file(&pdev->dev, &dev_attr_comp_preload);
+                goto fail;
+        }
 
         return 0;
+
+fail:
+        if (ep93xx_rtc->mmio_base) {
+                iounmap(ep93xx_rtc->mmio_base);
+                pdev->dev.platform_data = NULL;
+        }
+        release_mem_region(res->start, resource_size(res));
+        return err;
 }
 
-static int __devexit ep93xx_rtc_remove(struct platform_device *dev)
+static int __exit ep93xx_rtc_remove(struct platform_device *pdev)
 {
-        struct rtc_device *rtc = platform_get_drvdata(dev);
+        struct rtc_device *rtc = platform_get_drvdata(pdev);
+        struct ep93xx_rtc *ep93xx_rtc = pdev->dev.platform_data;
+        struct resource *res;
+
+        /* cleanup sysfs */
+        device_remove_file(&pdev->dev, &dev_attr_comp_delete);
+        device_remove_file(&pdev->dev, &dev_attr_comp_preload);
+
+        rtc_device_unregister(rtc);
+
+        iounmap(ep93xx_rtc->mmio_base);
+        pdev->dev.platform_data = NULL;
 
-        if (rtc)
-                rtc_device_unregister(rtc);
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        release_mem_region(res->start, resource_size(res));
 
-        platform_set_drvdata(dev, NULL);
+        platform_set_drvdata(pdev, NULL);
 
         return 0;
 }
@@ -122,23 +198,22 @@ static int __devexit ep93xx_rtc_remove(struct platform_device *dev)
 /* work with hotplug and coldplug */
 MODULE_ALIAS("platform:ep93xx-rtc");
 
-static struct platform_driver ep93xx_rtc_platform_driver = {
+static struct platform_driver ep93xx_rtc_driver = {
         .driver         = {
                 .name   = "ep93xx-rtc",
                 .owner  = THIS_MODULE,
         },
-        .probe          = ep93xx_rtc_probe,
-        .remove         = __devexit_p(ep93xx_rtc_remove),
+        .remove         = __exit_p(ep93xx_rtc_remove),
 };
 
 static int __init ep93xx_rtc_init(void)
 {
-        return platform_driver_register(&ep93xx_rtc_platform_driver);
+        return platform_driver_probe(&ep93xx_rtc_driver, ep93xx_rtc_probe);
 }
 
 static void __exit ep93xx_rtc_exit(void)
 {
-        platform_driver_unregister(&ep93xx_rtc_platform_driver);
+        platform_driver_unregister(&ep93xx_rtc_driver);
 }
 
 MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
diff --git a/drivers/rtc/rtc-pl030.c b/drivers/rtc/rtc-pl030.c
index aaf1f75fa293..457231bb1029 100644
--- a/drivers/rtc/rtc-pl030.c
+++ b/drivers/rtc/rtc-pl030.c
@@ -117,7 +117,7 @@ static int pl030_probe(struct amba_device *dev, struct amba_id *id)
                 goto err_rtc;
         }
 
-        rtc->base = ioremap(dev->res.start, SZ_4K);
+        rtc->base = ioremap(dev->res.start, resource_size(&dev->res));
         if (!rtc->base) {
                 ret = -ENOMEM;
                 goto err_map;
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c
index 451fc13784d1..f41873f98f66 100644
--- a/drivers/rtc/rtc-pl031.c
+++ b/drivers/rtc/rtc-pl031.c
@@ -142,8 +142,7 @@ static int pl031_probe(struct amba_device *adev, struct amba_id *id)
                 goto out;
         }
 
-        ldata->base = ioremap(adev->res.start,
-                              adev->res.end - adev->res.start + 1);
+        ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
         if (!ldata->base) {
                 ret = -ENOMEM;
                 goto out_no_remap;
diff --git a/drivers/s390/net/Kconfig b/drivers/s390/net/Kconfig
index a7745c82b4ae..cb909a5b5047 100644
--- a/drivers/s390/net/Kconfig
+++ b/drivers/s390/net/Kconfig
@@ -8,7 +8,7 @@ config LCS
            Select this option if you want to use LCS networking on IBM System z.
            This device driver supports Token Ring (IEEE 802.5),
            FDDI (IEEE 802.7) and Ethernet.
-           To compile as a module, choose M. The module name is lcs.ko.
+           To compile as a module, choose M. The module name is lcs.
            If you do not know what it is, it's safe to choose Y.
 
 config CTCM
@@ -21,7 +21,7 @@ config CTCM
           It also supports virtual CTCs when running under VM.
           This driver also supports channel-to-channel MPC SNA devices.
           MPC is an SNA protocol device used by Communication Server for Linux.
-          To compile as a module, choose M. The module name is ctcm.ko.
+          To compile as a module, choose M. The module name is ctcm.
           To compile into the kernel, choose Y.
           If you do not need any channel-to-channel connection, choose N.
 
@@ -34,7 +34,7 @@ config NETIUCV
           link between VM guests. Using ifconfig a point-to-point connection
           can be established to the Linux on IBM System z
           running on the other VM guest. To compile as a module, choose M.
-          The module name is netiucv.ko. If unsure, choose Y.
+          The module name is netiucv. If unsure, choose Y.
 
 config SMSGIUCV
         tristate "IUCV special message support (VM only)"
@@ -50,7 +50,7 @@ config CLAW
           This driver supports channel attached CLAW devices.
           CLAW is Common Link Access for Workstation.  Common devices
           that use CLAW are RS/6000s, Cisco Routers (CIP) and 3172 devices.
-          To compile as a module, choose M. The module name is claw.ko.
+          To compile as a module, choose M. The module name is claw.
           To compile into the kernel, choose Y.
 
 config QETH
@@ -65,14 +65,14 @@ config QETH
           <http://www.ibm.com/developerworks/linux/linux390>
 
           To compile this driver as a module, choose M.
-          The module name is qeth.ko.
+          The module name is qeth.
 
 config QETH_L2
         tristate "qeth layer 2 device support"
         depends on QETH
         help
           Select this option to be able to run qeth devices in layer 2 mode.
-          To compile as a module, choose M. The module name is qeth_l2.ko.
+          To compile as a module, choose M. The module name is qeth_l2.
           If unsure, choose y.
 
 config QETH_L3
@@ -80,7 +80,7 @@ config QETH_L3
         depends on QETH
         help
           Select this option to be able to run qeth devices in layer 3 mode.
-          To compile as a module choose M. The module name is qeth_l3.ko.
+          To compile as a module choose M. The module name is qeth_l3.
           If unsure, choose Y.
 
 config QETH_IPV6
diff --git a/drivers/s390/scsi/zfcp_fc.c b/drivers/s390/scsi/zfcp_fc.c
index bb2752b4130f..35493a82d2a8 100644
--- a/drivers/s390/scsi/zfcp_fc.c
+++ b/drivers/s390/scsi/zfcp_fc.c
@@ -116,7 +116,7 @@ static void zfcp_wka_port_put(struct zfcp_wka_port *wka_port)
 {
         if (atomic_dec_return(&wka_port->refcount) != 0)
                 return;
-        /* wait 10 miliseconds, other reqs might pop in */
+        /* wait 10 milliseconds, other reqs might pop in */
         schedule_delayed_work(&wka_port->work, HZ / 100);
 }
 
diff --git a/drivers/scsi/dpt/osd_util.h b/drivers/scsi/dpt/osd_util.h
index 4b56c0436ba2..b2613c2eaac7 100644
--- a/drivers/scsi/dpt/osd_util.h
+++ b/drivers/scsi/dpt/osd_util.h
@@ -342,7 +342,7 @@ uLONG osdGetThreadID(void);
 /* wakes up the specifed thread */
 void osdWakeThread(uLONG);
 
-/* osd sleep for x miliseconds */
+/* osd sleep for x milliseconds */
 void osdSleep(uLONG);
 
 #define DPT_THREAD_PRIORITY_LOWEST 0x00
diff --git a/drivers/scsi/lpfc/lpfc_scsi.c b/drivers/scsi/lpfc/lpfc_scsi.c
index e9fa6762044a..7991ba1980ae 100644
--- a/drivers/scsi/lpfc/lpfc_scsi.c
+++ b/drivers/scsi/lpfc/lpfc_scsi.c
@@ -1174,8 +1174,8 @@ lpfc_cmd_blksize(struct scsi_cmnd *sc)
  * @reftag:         out: ref tag (reference tag)
  *
  * Description:
- *   Extract DIF paramters from the command if possible.  Otherwise,
- *   use default paratmers.
+ *   Extract DIF parameters from the command if possible.  Otherwise,
+ *   use default parameters.
  *
  **/
 static inline void
diff --git a/drivers/scsi/megaraid.h b/drivers/scsi/megaraid.h
index 795201fa0b48..512c2cc1a33f 100644
--- a/drivers/scsi/megaraid.h
+++ b/drivers/scsi/megaraid.h
@@ -469,7 +469,7 @@ typedef struct {
         u8      type;           /* Type of the device */
         u8      cur_status;     /* current status of the device */
         u8      tag_depth;      /* Level of tagging */
-        u8      sync_neg;       /* sync negotiation - ENABLE or DISBALE */
+        u8      sync_neg;       /* sync negotiation - ENABLE or DISABLE */
         u32     size;           /* configurable size in terms of 512 byte
                                    blocks */
 }__attribute__ ((packed)) phys_drv;
diff --git a/drivers/scsi/megaraid/mbox_defs.h b/drivers/scsi/megaraid/mbox_defs.h
index 170399ef06f4..b25b74764ec3 100644
--- a/drivers/scsi/megaraid/mbox_defs.h
+++ b/drivers/scsi/megaraid/mbox_defs.h
@@ -686,7 +686,7 @@ typedef struct {
  * @type        : Type of the device
  * @cur_status  : current status of the device
  * @tag_depth   : Level of tagging
- * @sync_neg    : sync negotiation - ENABLE or DISBALE
+ * @sync_neg    : sync negotiation - ENABLE or DISABLE
  * @size        : configurable size in terms of 512 byte
  */
 typedef struct {
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 641e800ed693..1132c5cae7ab 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -861,7 +861,7 @@ config SERIAL_UARTLITE
           Say Y here if you want to use the Xilinx uartlite serial controller.
 
           To compile this driver as a module, choose M here: the
-          module will be called uartlite.ko.
+          module will be called uartlite.
 
 config SERIAL_UARTLITE_CONSOLE
         bool "Support for console on Xilinx uartlite serial port"
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index cdc049d4350f..58a4879c7e48 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -686,7 +686,7 @@ static int pl010_probe(struct amba_device *dev, struct amba_id *id)
                 goto out;
         }
 
-        base = ioremap(dev->res.start, PAGE_SIZE);
+        base = ioremap(dev->res.start, resource_size(&dev->res));
         if (!base) {
                 ret = -ENOMEM;
                 goto free;
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c
index 88fdac51b6c5..bf82e28770a9 100644
--- a/drivers/serial/amba-pl011.c
+++ b/drivers/serial/amba-pl011.c
@@ -70,6 +70,23 @@ struct uart_amba_port {
         struct clk              *clk;
         unsigned int            im;     /* interrupt mask */
         unsigned int            old_status;
+        unsigned int            ifls;   /* vendor-specific */
+};
+
+/* There is by now at least one vendor with differing details, so handle it */
+struct vendor_data {
+        unsigned int            ifls;
+        unsigned int            fifosize;
+};
+
+static struct vendor_data vendor_arm = {
+        .ifls                   = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8,
+        .fifosize               = 16,
+};
+
+static struct vendor_data vendor_st = {
+        .ifls                   = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF,
+        .fifosize               = 64,
 };
 
 static void pl011_stop_tx(struct uart_port *port)
@@ -360,8 +377,7 @@ static int pl011_startup(struct uart_port *port)
         if (retval)
                 goto clk_dis;
 
-        writew(UART011_IFLS_RX4_8|UART011_IFLS_TX4_8,
-               uap->port.membase + UART011_IFLS);
+        writew(uap->ifls, uap->port.membase + UART011_IFLS);
 
         /*
          * Provoke TX FIFO interrupt into asserting.
@@ -732,6 +748,7 @@ static struct uart_driver amba_reg = {
 static int pl011_probe(struct amba_device *dev, struct amba_id *id)
 {
         struct uart_amba_port *uap;
+        struct vendor_data *vendor = id->data;
         void __iomem *base;
         int i, ret;
 
@@ -750,7 +767,7 @@ static int pl011_probe(struct amba_device *dev, struct amba_id *id)
                 goto out;
         }
 
-        base = ioremap(dev->res.start, PAGE_SIZE);
+        base = ioremap(dev->res.start, resource_size(&dev->res));
         if (!base) {
                 ret = -ENOMEM;
                 goto free;
@@ -762,12 +779,13 @@ static int pl011_probe(struct amba_device *dev, struct amba_id *id)
                 goto unmap;
         }
 
+        uap->ifls = vendor->ifls;
         uap->port.dev = &dev->dev;
         uap->port.mapbase = dev->res.start;
         uap->port.membase = base;
         uap->port.iotype = UPIO_MEM;
         uap->port.irq = dev->irq[0];
-        uap->port.fifosize = 16;
+        uap->port.fifosize = vendor->fifosize;
         uap->port.ops = &amba_pl011_pops;
         uap->port.flags = UPF_BOOT_AUTOCONF;
         uap->port.line = i;
@@ -812,6 +830,12 @@ static struct amba_id pl011_ids[] __initdata = {
         {
                 .id     = 0x00041011,
                 .mask   = 0x000fffff,
+                .data   = &vendor_arm,
+        },
+        {
+                .id     = 0x00380802,
+                .mask   = 0x00ffffff,
+                .data   = &vendor_st,
         },
         { 0, 0 },
 };
@@ -845,7 +869,11 @@ static void __exit pl011_exit(void)
         uart_unregister_driver(&amba_reg);
 }
 
-module_init(pl011_init);
+/*
+ * While this can be a module, if builtin it's most likely the console
+ * So let's leave module_exit but move module_init to an earlier place
+ */
+arch_initcall(pl011_init);
 module_exit(pl011_exit);
 
 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index 7b5d1de9cfe3..285b414f3054 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -71,7 +71,7 @@
 #define ONEMS 0xb0 /* One Millisecond register */
 #define UTS   0xb4 /* UART Test Register */
 #endif
-#if defined(CONFIG_ARCH_IMX) || defined(CONFIG_ARCH_MX1)
+#ifdef CONFIG_ARCH_MX1
 #define BIPR1 0xb0 /* Incremental Preset Register 1 */
 #define BIPR2 0xb4 /* Incremental Preset Register 2 */
 #define BIPR3 0xb8 /* Incremental Preset Register 3 */
@@ -101,7 +101,7 @@
 #define  UCR1_RTSDEN     (1<<5)  /* RTS delta interrupt enable */
 #define  UCR1_SNDBRK     (1<<4)  /* Send break */
 #define  UCR1_TDMAEN     (1<<3)  /* Transmitter ready DMA enable */
-#if defined(CONFIG_ARCH_IMX) || defined(CONFIG_ARCH_MX1)
+#ifdef CONFIG_ARCH_MX1
 #define  UCR1_UARTCLKEN  (1<<2)  /* UART clock enabled */
 #endif
 #if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2
@@ -132,7 +132,7 @@
 #define  UCR3_RXDSEN     (1<<6)  /* Receive status interrupt enable */
 #define  UCR3_AIRINTEN   (1<<5)  /* Async IR wake interrupt enable */
 #define  UCR3_AWAKEN     (1<<4)  /* Async wake interrupt enable */
-#ifdef CONFIG_ARCH_IMX
+#ifdef CONFIG_ARCH_MX1
 #define  UCR3_REF25      (1<<3)  /* Ref freq 25 MHz, only on mx1 */
 #define  UCR3_REF30      (1<<2)  /* Ref Freq 30 MHz, only on mx1 */
 #endif
@@ -186,13 +186,6 @@
 #define  UTS_SOFTRST     (1<<0)  /* Software reset */
 
 /* We've been assigned a range on the "Low-density serial ports" major */
-#ifdef CONFIG_ARCH_IMX
-#define SERIAL_IMX_MAJOR        204
-#define MINOR_START             41
-#define DEV_NAME                "ttySMX"
-#define MAX_INTERNAL_IRQ        IMX_IRQS
-#endif
-
 #ifdef CONFIG_ARCH_MXC
 #define SERIAL_IMX_MAJOR        207
 #define MINOR_START             16
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 957494775413..e8aae227b5e0 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -118,7 +118,7 @@ config SPI_GPIO
 
 config SPI_IMX
         tristate "Freescale iMX SPI controller"
-        depends on ARCH_IMX && EXPERIMENTAL
+        depends on ARCH_MX1 && EXPERIMENTAL
         help
           This enables using the Freescale iMX SPI controller in master
           mode.
@@ -171,6 +171,15 @@ config SPI_ORION
         help
           This enables using the SPI master controller on the Orion chips.
 
+config SPI_PL022
+        tristate "ARM AMBA PL022 SSP controller (EXPERIMENTAL)"
+        depends on ARM_AMBA && EXPERIMENTAL
+        default y if MACH_U300
+        help
+          This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP
+          controller. If you have an embedded system with an AMBA(R)
+          bus and a PL022 controller, say Y or M here.
+
 config SPI_PXA2XX
         tristate "PXA2xx SSP SPI master"
         depends on ARCH_PXA && EXPERIMENTAL
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 5d0451936d86..ecfadb180482 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_SPI_PXA2XX)		+= pxa2xx_spi.o
 obj-$(CONFIG_SPI_OMAP_UWIRE)            += omap_uwire.o
 obj-$(CONFIG_SPI_OMAP24XX)              += omap2_mcspi.o
 obj-$(CONFIG_SPI_ORION)                 += orion_spi.o
+obj-$(CONFIG_SPI_PL022)                 += amba-pl022.o
 obj-$(CONFIG_SPI_MPC52xx_PSC)           += mpc52xx_psc_spi.o
 obj-$(CONFIG_SPI_MPC83xx)               += spi_mpc83xx.o
 obj-$(CONFIG_SPI_S3C24XX_GPIO)          += spi_s3c24xx_gpio.o
diff --git a/drivers/spi/amba-pl022.c b/drivers/spi/amba-pl022.c
new file mode 100644
index 000000000000..da76797ce8b9
--- /dev/null
+++ b/drivers/spi/amba-pl022.c
@@ -0,0 +1,1866 @@
+/*
+ * drivers/spi/amba-pl022.c
+ *
+ * A driver for the ARM PL022 PrimeCell SSP/SPI bus master.
+ *
+ * Copyright (C) 2008-2009 ST-Ericsson AB
+ * Copyright (C) 2006 STMicroelectronics Pvt. Ltd.
+ *
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ *
+ * Initial version inspired by:
+ *      linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c
+ * Initial adoption to PL022 by:
+ *      Sachin Verma <sachin.verma@st.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * TODO:
+ * - add timeout on polled transfers
+ * - add generic DMA framework support
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/ioport.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/spi/spi.h>
+#include <linux/workqueue.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/pl022.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+
+/*
+ * This macro is used to define some register default values.
+ * reg is masked with mask, the OR:ed with an (again masked)
+ * val shifted sb steps to the left.
+ */
+#define SSP_WRITE_BITS(reg, val, mask, sb) \
+ ((reg) = (((reg) & ~(mask)) | (((val)<<(sb)) & (mask))))
+
+/*
+ * This macro is also used to define some default values.
+ * It will just shift val by sb steps to the left and mask
+ * the result with mask.
+ */
+#define GEN_MASK_BITS(val, mask, sb) \
+ (((val)<<(sb)) & (mask))
+
+#define DRIVE_TX                0
+#define DO_NOT_DRIVE_TX         1
+
+#define DO_NOT_QUEUE_DMA        0
+#define QUEUE_DMA               1
+
+#define RX_TRANSFER             1
+#define TX_TRANSFER             2
+
+/*
+ * Macros to access SSP Registers with their offsets
+ */
+#define SSP_CR0(r)      (r + 0x000)
+#define SSP_CR1(r)      (r + 0x004)
+#define SSP_DR(r)       (r + 0x008)
+#define SSP_SR(r)       (r + 0x00C)
+#define SSP_CPSR(r)     (r + 0x010)
+#define SSP_IMSC(r)     (r + 0x014)
+#define SSP_RIS(r)      (r + 0x018)
+#define SSP_MIS(r)      (r + 0x01C)
+#define SSP_ICR(r)      (r + 0x020)
+#define SSP_DMACR(r)    (r + 0x024)
+#define SSP_ITCR(r)     (r + 0x080)
+#define SSP_ITIP(r)     (r + 0x084)
+#define SSP_ITOP(r)     (r + 0x088)
+#define SSP_TDR(r)      (r + 0x08C)
+
+#define SSP_PID0(r)     (r + 0xFE0)
+#define SSP_PID1(r)     (r + 0xFE4)
+#define SSP_PID2(r)     (r + 0xFE8)
+#define SSP_PID3(r)     (r + 0xFEC)
+
+#define SSP_CID0(r)     (r + 0xFF0)
+#define SSP_CID1(r)     (r + 0xFF4)
+#define SSP_CID2(r)     (r + 0xFF8)
+#define SSP_CID3(r)     (r + 0xFFC)
+
+/*
+ * SSP Control Register 0  - SSP_CR0
+ */
+#define SSP_CR0_MASK_DSS        (0x1FUL << 0)
+#define SSP_CR0_MASK_HALFDUP    (0x1UL << 5)
+#define SSP_CR0_MASK_SPO        (0x1UL << 6)
+#define SSP_CR0_MASK_SPH        (0x1UL << 7)
+#define SSP_CR0_MASK_SCR        (0xFFUL << 8)
+#define SSP_CR0_MASK_CSS        (0x1FUL << 16)
+#define SSP_CR0_MASK_FRF        (0x3UL << 21)
+
+/*
+ * SSP Control Register 0  - SSP_CR1
+ */
+#define SSP_CR1_MASK_LBM        (0x1UL << 0)
+#define SSP_CR1_MASK_SSE        (0x1UL << 1)
+#define SSP_CR1_MASK_MS         (0x1UL << 2)
+#define SSP_CR1_MASK_SOD        (0x1UL << 3)
+#define SSP_CR1_MASK_RENDN      (0x1UL << 4)
+#define SSP_CR1_MASK_TENDN      (0x1UL << 5)
+#define SSP_CR1_MASK_MWAIT      (0x1UL << 6)
+#define SSP_CR1_MASK_RXIFLSEL   (0x7UL << 7)
+#define SSP_CR1_MASK_TXIFLSEL   (0x7UL << 10)
+
+/*
+ * SSP Data Register - SSP_DR
+ */
+#define SSP_DR_MASK_DATA        0xFFFFFFFF
+
+/*
+ * SSP Status Register - SSP_SR
+ */
+#define SSP_SR_MASK_TFE         (0x1UL << 0) /* Transmit FIFO empty */
+#define SSP_SR_MASK_TNF         (0x1UL << 1) /* Transmit FIFO not full */
+#define SSP_SR_MASK_RNE         (0x1UL << 2) /* Receive FIFO not empty */
+#define SSP_SR_MASK_RFF         (0x1UL << 3) /* Receive FIFO full */
+#define SSP_SR_MASK_BSY         (0x1UL << 4) /* Busy Flag */
+
+/*
+ * SSP Clock Prescale Register  - SSP_CPSR
+ */
+#define SSP_CPSR_MASK_CPSDVSR   (0xFFUL << 0)
+
+/*
+ * SSP Interrupt Mask Set/Clear Register - SSP_IMSC
+ */
+#define SSP_IMSC_MASK_RORIM (0x1UL << 0) /* Receive Overrun Interrupt mask */
+#define SSP_IMSC_MASK_RTIM  (0x1UL << 1) /* Receive timeout Interrupt mask */
+#define SSP_IMSC_MASK_RXIM  (0x1UL << 2) /* Receive FIFO Interrupt mask */
+#define SSP_IMSC_MASK_TXIM  (0x1UL << 3) /* Transmit FIFO Interrupt mask */
+
+/*
+ * SSP Raw Interrupt Status Register - SSP_RIS
+ */
+/* Receive Overrun Raw Interrupt status */
+#define SSP_RIS_MASK_RORRIS             (0x1UL << 0)
+/* Receive Timeout Raw Interrupt status */
+#define SSP_RIS_MASK_RTRIS              (0x1UL << 1)
+/* Receive FIFO Raw Interrupt status */
+#define SSP_RIS_MASK_RXRIS              (0x1UL << 2)
+/* Transmit FIFO Raw Interrupt status */
+#define SSP_RIS_MASK_TXRIS              (0x1UL << 3)
+
+/*
+ * SSP Masked Interrupt Status Register - SSP_MIS
+ */
+/* Receive Overrun Masked Interrupt status */
+#define SSP_MIS_MASK_RORMIS             (0x1UL << 0)
+/* Receive Timeout Masked Interrupt status */
+#define SSP_MIS_MASK_RTMIS              (0x1UL << 1)
+/* Receive FIFO Masked Interrupt status */
+#define SSP_MIS_MASK_RXMIS              (0x1UL << 2)
+/* Transmit FIFO Masked Interrupt status */
+#define SSP_MIS_MASK_TXMIS              (0x1UL << 3)
+
+/*
+ * SSP Interrupt Clear Register - SSP_ICR
+ */
+/* Receive Overrun Raw Clear Interrupt bit */
+#define SSP_ICR_MASK_RORIC              (0x1UL << 0)
+/* Receive Timeout Clear Interrupt bit */
+#define SSP_ICR_MASK_RTIC               (0x1UL << 1)
+
+/*
+ * SSP DMA Control Register - SSP_DMACR
+ */
+/* Receive DMA Enable bit */
+#define SSP_DMACR_MASK_RXDMAE           (0x1UL << 0)
+/* Transmit DMA Enable bit */
+#define SSP_DMACR_MASK_TXDMAE           (0x1UL << 1)
+
+/*
+ * SSP Integration Test control Register - SSP_ITCR
+ */
+#define SSP_ITCR_MASK_ITEN              (0x1UL << 0)
+#define SSP_ITCR_MASK_TESTFIFO          (0x1UL << 1)
+
+/*
+ * SSP Integration Test Input Register - SSP_ITIP
+ */
+#define ITIP_MASK_SSPRXD                 (0x1UL << 0)
+#define ITIP_MASK_SSPFSSIN               (0x1UL << 1)
+#define ITIP_MASK_SSPCLKIN               (0x1UL << 2)
+#define ITIP_MASK_RXDMAC                 (0x1UL << 3)
+#define ITIP_MASK_TXDMAC                 (0x1UL << 4)
+#define ITIP_MASK_SSPTXDIN               (0x1UL << 5)
+
+/*
+ * SSP Integration Test output Register - SSP_ITOP
+ */
+#define ITOP_MASK_SSPTXD                 (0x1UL << 0)
+#define ITOP_MASK_SSPFSSOUT              (0x1UL << 1)
+#define ITOP_MASK_SSPCLKOUT              (0x1UL << 2)
+#define ITOP_MASK_SSPOEn                 (0x1UL << 3)
+#define ITOP_MASK_SSPCTLOEn              (0x1UL << 4)
+#define ITOP_MASK_RORINTR                (0x1UL << 5)
+#define ITOP_MASK_RTINTR                 (0x1UL << 6)
+#define ITOP_MASK_RXINTR                 (0x1UL << 7)
+#define ITOP_MASK_TXINTR                 (0x1UL << 8)
+#define ITOP_MASK_INTR                   (0x1UL << 9)
+#define ITOP_MASK_RXDMABREQ              (0x1UL << 10)
+#define ITOP_MASK_RXDMASREQ              (0x1UL << 11)
+#define ITOP_MASK_TXDMABREQ              (0x1UL << 12)
+#define ITOP_MASK_TXDMASREQ              (0x1UL << 13)
+
+/*
+ * SSP Test Data Register - SSP_TDR
+ */
+#define TDR_MASK_TESTDATA               (0xFFFFFFFF)
+
+/*
+ * Message State
+ * we use the spi_message.state (void *) pointer to
+ * hold a single state value, that's why all this
+ * (void *) casting is done here.
+ */
+#define STATE_START                     ((void *) 0)
+#define STATE_RUNNING                   ((void *) 1)
+#define STATE_DONE                      ((void *) 2)
+#define STATE_ERROR                     ((void *) -1)
+
+/*
+ * Queue State
+ */
+#define QUEUE_RUNNING                   (0)
+#define QUEUE_STOPPED                   (1)
+/*
+ * SSP State - Whether Enabled or Disabled
+ */
+#define SSP_DISABLED                    (0)
+#define SSP_ENABLED                     (1)
+
+/*
+ * SSP DMA State - Whether DMA Enabled or Disabled
+ */
+#define SSP_DMA_DISABLED                (0)
+#define SSP_DMA_ENABLED                 (1)
+
+/*
+ * SSP Clock Defaults
+ */
+#define NMDK_SSP_DEFAULT_CLKRATE 0x2
+#define NMDK_SSP_DEFAULT_PRESCALE 0x40
+
+/*
+ * SSP Clock Parameter ranges
+ */
+#define CPSDVR_MIN 0x02
+#define CPSDVR_MAX 0xFE
+#define SCR_MIN 0x00
+#define SCR_MAX 0xFF
+
+/*
+ * SSP Interrupt related Macros
+ */
+#define DEFAULT_SSP_REG_IMSC  0x0UL
+#define DISABLE_ALL_INTERRUPTS DEFAULT_SSP_REG_IMSC
+#define ENABLE_ALL_INTERRUPTS (~DEFAULT_SSP_REG_IMSC)
+
+#define CLEAR_ALL_INTERRUPTS  0x3
+
+
+/*
+ * The type of reading going on on this chip
+ */
+enum ssp_reading {
+        READING_NULL,
+        READING_U8,
+        READING_U16,
+        READING_U32
+};
+
+/**
+ * The type of writing going on on this chip
+ */
+enum ssp_writing {
+        WRITING_NULL,
+        WRITING_U8,
+        WRITING_U16,
+        WRITING_U32
+};
+
+/**
+ * struct vendor_data - vendor-specific config parameters
+ * for PL022 derivates
+ * @fifodepth: depth of FIFOs (both)
+ * @max_bpw: maximum number of bits per word
+ * @unidir: supports unidirection transfers
+ */
+struct vendor_data {
+        int fifodepth;
+        int max_bpw;
+        bool unidir;
+};
+
+/**
+ * struct pl022 - This is the private SSP driver data structure
+ * @adev: AMBA device model hookup
+ * @phybase: The physical memory where the SSP device resides
+ * @virtbase: The virtual memory where the SSP is mapped
+ * @master: SPI framework hookup
+ * @master_info: controller-specific data from machine setup
+ * @regs: SSP controller register's virtual address
+ * @pump_messages: Work struct for scheduling work to the workqueue
+ * @lock: spinlock to syncronise access to driver data
+ * @workqueue: a workqueue on which any spi_message request is queued
+ * @busy: workqueue is busy
+ * @run: workqueue is running
+ * @pump_transfers: Tasklet used in Interrupt Transfer mode
+ * @cur_msg: Pointer to current spi_message being processed
+ * @cur_transfer: Pointer to current spi_transfer
+ * @cur_chip: pointer to current clients chip(assigned from controller_state)
+ * @tx: current position in TX buffer to be read
+ * @tx_end: end position in TX buffer to be read
+ * @rx: current position in RX buffer to be written
+ * @rx_end: end position in RX buffer to be written
+ * @readingtype: the type of read currently going on
+ * @writingtype: the type or write currently going on
+ */
+struct pl022 {
+        struct amba_device              *adev;
+        struct vendor_data              *vendor;
+        resource_size_t                 phybase;
+        void __iomem                    *virtbase;
+        struct clk                      *clk;
+        struct spi_master               *master;
+        struct pl022_ssp_controller     *master_info;
+        /* Driver message queue */
+        struct workqueue_struct         *workqueue;
+        struct work_struct              pump_messages;
+        spinlock_t                      queue_lock;
+        struct list_head                queue;
+        int                             busy;
+        int                             run;
+        /* Message transfer pump */
+        struct tasklet_struct           pump_transfers;
+        struct spi_message              *cur_msg;
+        struct spi_transfer             *cur_transfer;
+        struct chip_data                *cur_chip;
+        void                            *tx;
+        void                            *tx_end;
+        void                            *rx;
+        void                            *rx_end;
+        enum ssp_reading                read;
+        enum ssp_writing                write;
+};
+
+/**
+ * struct chip_data - To maintain runtime state of SSP for each client chip
+ * @cr0: Value of control register CR0 of SSP
+ * @cr1: Value of control register CR1 of SSP
+ * @dmacr: Value of DMA control Register of SSP
+ * @cpsr: Value of Clock prescale register
+ * @n_bytes: how many bytes(power of 2) reqd for a given data width of client
+ * @enable_dma: Whether to enable DMA or not
+ * @write: function ptr to be used to write when doing xfer for this chip
+ * @read: function ptr to be used to read when doing xfer for this chip
+ * @cs_control: chip select callback provided by chip
+ * @xfer_type: polling/interrupt/DMA
+ *
+ * Runtime state of the SSP controller, maintained per chip,
+ * This would be set according to the current message that would be served
+ */
+struct chip_data {
+        u16 cr0;
+        u16 cr1;
+        u16 dmacr;
+        u16 cpsr;
+        u8 n_bytes;
+        u8 enable_dma:1;
+        enum ssp_reading read;
+        enum ssp_writing write;
+        void (*cs_control) (u32 command);
+        int xfer_type;
+};
+
+/**
+ * null_cs_control - Dummy chip select function
+ * @command: select/delect the chip
+ *
+ * If no chip select function is provided by client this is used as dummy
+ * chip select
+ */
+static void null_cs_control(u32 command)
+{
+        pr_debug("pl022: dummy chip select control, CS=0x%x\n", command);
+}
+
+/**
+ * giveback - current spi_message is over, schedule next message and call
+ * callback of this message. Assumes that caller already
+ * set message->status; dma and pio irqs are blocked
+ * @pl022: SSP driver private data structure
+ */
+static void giveback(struct pl022 *pl022)
+{
+        struct spi_transfer *last_transfer;
+        unsigned long flags;
+        struct spi_message *msg;
+        void (*curr_cs_control) (u32 command);
+
+        /*
+         * This local reference to the chip select function
+         * is needed because we set curr_chip to NULL
+         * as a step toward termininating the message.
+         */
+        curr_cs_control = pl022->cur_chip->cs_control;
+        spin_lock_irqsave(&pl022->queue_lock, flags);
+        msg = pl022->cur_msg;
+        pl022->cur_msg = NULL;
+        pl022->cur_transfer = NULL;
+        pl022->cur_chip = NULL;
+        queue_work(pl022->workqueue, &pl022->pump_messages);
+        spin_unlock_irqrestore(&pl022->queue_lock, flags);
+
+        last_transfer = list_entry(msg->transfers.prev,
+                                        struct spi_transfer,
+                                        transfer_list);
+
+        /* Delay if requested before any change in chip select */
+        if (last_transfer->delay_usecs)
+                /*
+                 * FIXME: This runs in interrupt context.
+                 * Is this really smart?
+                 */
+                udelay(last_transfer->delay_usecs);
+
+        /*
+         * Drop chip select UNLESS cs_change is true or we are returning
+         * a message with an error, or next message is for another chip
+         */
+        if (!last_transfer->cs_change)
+                curr_cs_control(SSP_CHIP_DESELECT);
+        else {
+                struct spi_message *next_msg;
+
+                /* Holding of cs was hinted, but we need to make sure
+                 * the next message is for the same chip.  Don't waste
+                 * time with the following tests unless this was hinted.
+                 *
+                 * We cannot postpone this until pump_messages, because
+                 * after calling msg->complete (below) the driver that
+                 * sent the current message could be unloaded, which
+                 * could invalidate the cs_control() callback...
+                 */
+
+                /* get a pointer to the next message, if any */
+                spin_lock_irqsave(&pl022->queue_lock, flags);
+                if (list_empty(&pl022->queue))
+                        next_msg = NULL;
+                else
+                        next_msg = list_entry(pl022->queue.next,
+                                        struct spi_message, queue);
+                spin_unlock_irqrestore(&pl022->queue_lock, flags);
+
+                /* see if the next and current messages point
+                 * to the same chip
+                 */
+                if (next_msg && next_msg->spi != msg->spi)
+                        next_msg = NULL;
+                if (!next_msg || msg->state == STATE_ERROR)
+                        curr_cs_control(SSP_CHIP_DESELECT);
+        }
+        msg->state = NULL;
+        if (msg->complete)
+                msg->complete(msg->context);
+        /* This message is completed, so let's turn off the clock! */
+        clk_disable(pl022->clk);
+}
+
+/**
+ * flush - flush the FIFO to reach a clean state
+ * @pl022: SSP driver private data structure
+ */
+static int flush(struct pl022 *pl022)
+{
+        unsigned long limit = loops_per_jiffy << 1;
+
+        dev_dbg(&pl022->adev->dev, "flush\n");
+        do {
+                while (readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE)
+                        readw(SSP_DR(pl022->virtbase));
+        } while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_BSY) && limit--);
+        return limit;
+}
+
+/**
+ * restore_state - Load configuration of current chip
+ * @pl022: SSP driver private data structure
+ */
+static void restore_state(struct pl022 *pl022)
+{
+        struct chip_data *chip = pl022->cur_chip;
+
+        writew(chip->cr0, SSP_CR0(pl022->virtbase));
+        writew(chip->cr1, SSP_CR1(pl022->virtbase));
+        writew(chip->dmacr, SSP_DMACR(pl022->virtbase));
+        writew(chip->cpsr, SSP_CPSR(pl022->virtbase));
+        writew(DISABLE_ALL_INTERRUPTS, SSP_IMSC(pl022->virtbase));
+        writew(CLEAR_ALL_INTERRUPTS, SSP_ICR(pl022->virtbase));
+}
+
+/**
+ * load_ssp_default_config - Load default configuration for SSP
+ * @pl022: SSP driver private data structure
+ */
+
+/*
+ * Default SSP Register Values
+ */
+#define DEFAULT_SSP_REG_CR0 ( \
+        GEN_MASK_BITS(SSP_DATA_BITS_12, SSP_CR0_MASK_DSS, 0)    | \
+        GEN_MASK_BITS(SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, SSP_CR0_MASK_HALFDUP, 5) | \
+        GEN_MASK_BITS(SSP_CLK_POL_IDLE_LOW, SSP_CR0_MASK_SPO, 6) | \
+        GEN_MASK_BITS(SSP_CLK_FALLING_EDGE, SSP_CR0_MASK_SPH, 7) | \
+        GEN_MASK_BITS(NMDK_SSP_DEFAULT_CLKRATE, SSP_CR0_MASK_SCR, 8) | \
+        GEN_MASK_BITS(SSP_BITS_8, SSP_CR0_MASK_CSS, 16) | \
+        GEN_MASK_BITS(SSP_INTERFACE_MOTOROLA_SPI, SSP_CR0_MASK_FRF, 21) \
+)
+
+#define DEFAULT_SSP_REG_CR1 ( \
+        GEN_MASK_BITS(LOOPBACK_DISABLED, SSP_CR1_MASK_LBM, 0) | \
+        GEN_MASK_BITS(SSP_DISABLED, SSP_CR1_MASK_SSE, 1) | \
+        GEN_MASK_BITS(SSP_MASTER, SSP_CR1_MASK_MS, 2) | \
+        GEN_MASK_BITS(DO_NOT_DRIVE_TX, SSP_CR1_MASK_SOD, 3) | \
+        GEN_MASK_BITS(SSP_RX_MSB, SSP_CR1_MASK_RENDN, 4) | \
+        GEN_MASK_BITS(SSP_TX_MSB, SSP_CR1_MASK_TENDN, 5) | \
+        GEN_MASK_BITS(SSP_MWIRE_WAIT_ZERO, SSP_CR1_MASK_MWAIT, 6) |\
+        GEN_MASK_BITS(SSP_RX_1_OR_MORE_ELEM, SSP_CR1_MASK_RXIFLSEL, 7) | \
+        GEN_MASK_BITS(SSP_TX_1_OR_MORE_EMPTY_LOC, SSP_CR1_MASK_TXIFLSEL, 10) \
+)
+
+#define DEFAULT_SSP_REG_CPSR ( \
+        GEN_MASK_BITS(NMDK_SSP_DEFAULT_PRESCALE, SSP_CPSR_MASK_CPSDVSR, 0) \
+)
+
+#define DEFAULT_SSP_REG_DMACR (\
+        GEN_MASK_BITS(SSP_DMA_DISABLED, SSP_DMACR_MASK_RXDMAE, 0) | \
+        GEN_MASK_BITS(SSP_DMA_DISABLED, SSP_DMACR_MASK_TXDMAE, 1) \
+)
+
+
+static void load_ssp_default_config(struct pl022 *pl022)
+{
+        writew(DEFAULT_SSP_REG_CR0, SSP_CR0(pl022->virtbase));
+        writew(DEFAULT_SSP_REG_CR1, SSP_CR1(pl022->virtbase));
+        writew(DEFAULT_SSP_REG_DMACR, SSP_DMACR(pl022->virtbase));
+        writew(DEFAULT_SSP_REG_CPSR, SSP_CPSR(pl022->virtbase));
+        writew(DISABLE_ALL_INTERRUPTS, SSP_IMSC(pl022->virtbase));
+        writew(CLEAR_ALL_INTERRUPTS, SSP_ICR(pl022->virtbase));
+}
+
+/**
+ * This will write to TX and read from RX according to the parameters
+ * set in pl022.
+ */
+static void readwriter(struct pl022 *pl022)
+{
+
+        /*
+         * The FIFO depth is different inbetween primecell variants.
+         * I believe filling in too much in the FIFO might cause
+         * errons in 8bit wide transfers on ARM variants (just 8 words
+         * FIFO, means only 8x8 = 64 bits in FIFO) at least.
+         *
+         * FIXME: currently we have no logic to account for this.
+         * perhaps there is even something broken in HW regarding
+         * 8bit transfers (it doesn't fail on 16bit) so this needs
+         * more investigation...
+         */
+        dev_dbg(&pl022->adev->dev,
+                "%s, rx: %p, rxend: %p, tx: %p, txend: %p\n",
+                __func__, pl022->rx, pl022->rx_end, pl022->tx, pl022->tx_end);
+
+        /* Read as much as you can */
+        while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE)
+               && (pl022->rx < pl022->rx_end)) {
+                switch (pl022->read) {
+                case READING_NULL:
+                        readw(SSP_DR(pl022->virtbase));
+                        break;
+                case READING_U8:
+                        *(u8 *) (pl022->rx) =
+                                readw(SSP_DR(pl022->virtbase)) & 0xFFU;
+                        break;
+                case READING_U16:
+                        *(u16 *) (pl022->rx) =
+                                (u16) readw(SSP_DR(pl022->virtbase));
+                        break;
+                case READING_U32:
+                        *(u32 *) (pl022->rx) =
+                                readl(SSP_DR(pl022->virtbase));
+                        break;
+                }
+                pl022->rx += (pl022->cur_chip->n_bytes);
+        }
+        /*
+         * Write as much as you can, while keeping an eye on the RX FIFO!
+         */
+        while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_TNF)
+               && (pl022->tx < pl022->tx_end)) {
+                switch (pl022->write) {
+                case WRITING_NULL:
+                        writew(0x0, SSP_DR(pl022->virtbase));
+                        break;
+                case WRITING_U8:
+                        writew(*(u8 *) (pl022->tx), SSP_DR(pl022->virtbase));
+                        break;
+                case WRITING_U16:
+                        writew((*(u16 *) (pl022->tx)), SSP_DR(pl022->virtbase));
+                        break;
+                case WRITING_U32:
+                        writel(*(u32 *) (pl022->tx), SSP_DR(pl022->virtbase));
+                        break;
+                }
+                pl022->tx += (pl022->cur_chip->n_bytes);
+                /*
+                 * This inner reader takes care of things appearing in the RX
+                 * FIFO as we're transmitting. This will happen a lot since the
+                 * clock starts running when you put things into the TX FIFO,
+                 * and then things are continously clocked into the RX FIFO.
+                 */
+                while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE)
+                       && (pl022->rx < pl022->rx_end)) {
+                        switch (pl022->read) {
+                        case READING_NULL:
+                                readw(SSP_DR(pl022->virtbase));
+                                break;
+                        case READING_U8:
+                                *(u8 *) (pl022->rx) =
+                                        readw(SSP_DR(pl022->virtbase)) & 0xFFU;
+                                break;
+                        case READING_U16:
+                                *(u16 *) (pl022->rx) =
+                                        (u16) readw(SSP_DR(pl022->virtbase));
+                                break;
+                        case READING_U32:
+                                *(u32 *) (pl022->rx) =
+                                        readl(SSP_DR(pl022->virtbase));
+                                break;
+                        }
+                        pl022->rx += (pl022->cur_chip->n_bytes);
+                }
+        }
+        /*
+         * When we exit here the TX FIFO should be full and the RX FIFO
+         * should be empty
+         */
+}
+
+
+/**
+ * next_transfer - Move to the Next transfer in the current spi message
+ * @pl022: SSP driver private data structure
+ *
+ * This function moves though the linked list of spi transfers in the
+ * current spi message and returns with the state of current spi
+ * message i.e whether its last transfer is done(STATE_DONE) or
+ * Next transfer is ready(STATE_RUNNING)
+ */
+static void *next_transfer(struct pl022 *pl022)
+{
+        struct spi_message *msg = pl022->cur_msg;
+        struct spi_transfer *trans = pl022->cur_transfer;
+
+        /* Move to next transfer */
+        if (trans->transfer_list.next != &msg->transfers) {
+                pl022->cur_transfer =
+                    list_entry(trans->transfer_list.next,
+                               struct spi_transfer, transfer_list);
+                return STATE_RUNNING;
+        }
+        return STATE_DONE;
+}
+/**
+ * pl022_interrupt_handler - Interrupt handler for SSP controller
+ *
+ * This function handles interrupts generated for an interrupt based transfer.
+ * If a receive overrun (ROR) interrupt is there then we disable SSP, flag the
+ * current message's state as STATE_ERROR and schedule the tasklet
+ * pump_transfers which will do the postprocessing of the current message by
+ * calling giveback(). Otherwise it reads data from RX FIFO till there is no
+ * more data, and writes data in TX FIFO till it is not full. If we complete
+ * the transfer we move to the next transfer and schedule the tasklet.
+ */
+static irqreturn_t pl022_interrupt_handler(int irq, void *dev_id)
+{
+        struct pl022 *pl022 = dev_id;
+        struct spi_message *msg = pl022->cur_msg;
+        u16 irq_status = 0;
+        u16 flag = 0;
+
+        if (unlikely(!msg)) {
+                dev_err(&pl022->adev->dev,
+                        "bad message state in interrupt handler");
+                /* Never fail */
+                return IRQ_HANDLED;
+        }
+
+        /* Read the Interrupt Status Register */
+        irq_status = readw(SSP_MIS(pl022->virtbase));
+
+        if (unlikely(!irq_status))
+                return IRQ_NONE;
+
+        /* This handles the error code interrupts */
+        if (unlikely(irq_status & SSP_MIS_MASK_RORMIS)) {
+                /*
+                 * Overrun interrupt - bail out since our Data has been
+                 * corrupted
+                 */
+                dev_err(&pl022->adev->dev,
+                        "FIFO overrun\n");
+                if (readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RFF)
+                        dev_err(&pl022->adev->dev,
+                                "RXFIFO is full\n");
+                if (readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_TNF)
+                        dev_err(&pl022->adev->dev,
+                                "TXFIFO is full\n");
+
+                /*
+                 * Disable and clear interrupts, disable SSP,
+                 * mark message with bad status so it can be
+                 * retried.
+                 */
+                writew(DISABLE_ALL_INTERRUPTS,
+                       SSP_IMSC(pl022->virtbase));
+                writew(CLEAR_ALL_INTERRUPTS, SSP_ICR(pl022->virtbase));
+                writew((readw(SSP_CR1(pl022->virtbase)) &
+                        (~SSP_CR1_MASK_SSE)), SSP_CR1(pl022->virtbase));
+                msg->state = STATE_ERROR;
+
+                /* Schedule message queue handler */
+                tasklet_schedule(&pl022->pump_transfers);
+                return IRQ_HANDLED;
+        }
+
+        readwriter(pl022);
+
+        if ((pl022->tx == pl022->tx_end) && (flag == 0)) {
+                flag = 1;
+                /* Disable Transmit interrupt */
+                writew(readw(SSP_IMSC(pl022->virtbase)) &
+                       (~SSP_IMSC_MASK_TXIM),
+                       SSP_IMSC(pl022->virtbase));
+        }
+
+        /*
+         * Since all transactions must write as much as shall be read,
+         * we can conclude the entire transaction once RX is complete.
+         * At this point, all TX will always be finished.
+         */
+        if (pl022->rx >= pl022->rx_end) {
+                writew(DISABLE_ALL_INTERRUPTS,
+                       SSP_IMSC(pl022->virtbase));
+                writew(CLEAR_ALL_INTERRUPTS, SSP_ICR(pl022->virtbase));
+                if (unlikely(pl022->rx > pl022->rx_end)) {
+                        dev_warn(&pl022->adev->dev, "read %u surplus "
+                                 "bytes (did you request an odd "
+                                 "number of bytes on a 16bit bus?)\n",
+                                 (u32) (pl022->rx - pl022->rx_end));
+                }
+                /* Update total bytes transfered */
+                msg->actual_length += pl022->cur_transfer->len;
+                if (pl022->cur_transfer->cs_change)
+                        pl022->cur_chip->
+                                cs_control(SSP_CHIP_DESELECT);
+                /* Move to next transfer */
+                msg->state = next_transfer(pl022);
+                tasklet_schedule(&pl022->pump_transfers);
+                return IRQ_HANDLED;
+        }
+
+        return IRQ_HANDLED;
+}
+
+/**
+ * This sets up the pointers to memory for the next message to
+ * send out on the SPI bus.
+ */
+static int set_up_next_transfer(struct pl022 *pl022,
+                                struct spi_transfer *transfer)
+{
+        int residue;
+
+        /* Sanity check the message for this bus width */
+        residue = pl022->cur_transfer->len % pl022->cur_chip->n_bytes;
+        if (unlikely(residue != 0)) {
+                dev_err(&pl022->adev->dev,
+                        "message of %u bytes to transmit but the current "
+                        "chip bus has a data width of %u bytes!\n",
+                        pl022->cur_transfer->len,
+                        pl022->cur_chip->n_bytes);
+                dev_err(&pl022->adev->dev, "skipping this message\n");
+                return -EIO;
+        }
+        pl022->tx = (void *)transfer->tx_buf;
+        pl022->tx_end = pl022->tx + pl022->cur_transfer->len;
+        pl022->rx = (void *)transfer->rx_buf;
+        pl022->rx_end = pl022->rx + pl022->cur_transfer->len;
+        pl022->write =
+            pl022->tx ? pl022->cur_chip->write : WRITING_NULL;
+        pl022->read = pl022->rx ? pl022->cur_chip->read : READING_NULL;
+        return 0;
+}
+
+/**
+ * pump_transfers - Tasklet function which schedules next interrupt transfer
+ * when running in interrupt transfer mode.
+ * @data: SSP driver private data structure
+ *
+ */
+static void pump_transfers(unsigned long data)
+{
+        struct pl022 *pl022 = (struct pl022 *) data;
+        struct spi_message *message = NULL;
+        struct spi_transfer *transfer = NULL;
+        struct spi_transfer *previous = NULL;
+
+        /* Get current state information */
+        message = pl022->cur_msg;
+        transfer = pl022->cur_transfer;
+
+        /* Handle for abort */
+        if (message->state == STATE_ERROR) {
+                message->status = -EIO;
+                giveback(pl022);
+                return;
+        }
+
+        /* Handle end of message */
+        if (message->state == STATE_DONE) {
+                message->status = 0;
+                giveback(pl022);
+                return;
+        }
+
+        /* Delay if requested at end of transfer before CS change */
+        if (message->state == STATE_RUNNING) {
+                previous = list_entry(transfer->transfer_list.prev,
+                                        struct spi_transfer,
+                                        transfer_list);
+                if (previous->delay_usecs)
+                        /*
+                         * FIXME: This runs in interrupt context.
+                         * Is this really smart?
+                         */
+                        udelay(previous->delay_usecs);
+
+                /* Drop chip select only if cs_change is requested */
+                if (previous->cs_change)
+                        pl022->cur_chip->cs_control(SSP_CHIP_SELECT);
+        } else {
+                /* STATE_START */
+                message->state = STATE_RUNNING;
+        }
+
+        if (set_up_next_transfer(pl022, transfer)) {
+                message->state = STATE_ERROR;
+                message->status = -EIO;
+                giveback(pl022);
+                return;
+        }
+        /* Flush the FIFOs and let's go! */
+        flush(pl022);
+        writew(ENABLE_ALL_INTERRUPTS, SSP_IMSC(pl022->virtbase));
+}
+
+/**
+ * NOT IMPLEMENTED
+ * configure_dma - It configures the DMA pipes for DMA transfers
+ * @data: SSP driver's private data structure
+ *
+ */
+static int configure_dma(void *data)
+{
+        struct pl022 *pl022 = data;
+        dev_dbg(&pl022->adev->dev, "configure DMA\n");
+        return -ENOTSUPP;
+}
+
+/**
+ * do_dma_transfer - It handles transfers of the current message
+ * if it is DMA xfer.
+ * NOT FULLY IMPLEMENTED
+ * @data: SSP driver's private data structure
+ */
+static void do_dma_transfer(void *data)
+{
+        struct pl022 *pl022 = data;
+
+        if (configure_dma(data)) {
+                dev_dbg(&pl022->adev->dev, "configuration of DMA Failed!\n");
+                goto err_config_dma;
+        }
+
+        /* TODO: Implememt DMA setup of pipes here */
+
+        /* Enable target chip, set up transfer */
+        pl022->cur_chip->cs_control(SSP_CHIP_SELECT);
+        if (set_up_next_transfer(pl022, pl022->cur_transfer)) {
+                /* Error path */
+                pl022->cur_msg->state = STATE_ERROR;
+                pl022->cur_msg->status = -EIO;
+                giveback(pl022);
+                return;
+        }
+        /* Enable SSP */
+        writew((readw(SSP_CR1(pl022->virtbase)) | SSP_CR1_MASK_SSE),
+               SSP_CR1(pl022->virtbase));
+
+        /* TODO: Enable the DMA transfer here */
+        return;
+
+ err_config_dma:
+        pl022->cur_msg->state = STATE_ERROR;
+        pl022->cur_msg->status = -EIO;
+        giveback(pl022);
+        return;
+}
+
+static void do_interrupt_transfer(void *data)
+{
+        struct pl022 *pl022 = data;
+
+        /* Enable target chip */
+        pl022->cur_chip->cs_control(SSP_CHIP_SELECT);
+        if (set_up_next_transfer(pl022, pl022->cur_transfer)) {
+                /* Error path */
+                pl022->cur_msg->state = STATE_ERROR;
+                pl022->cur_msg->status = -EIO;
+                giveback(pl022);
+                return;
+        }
+        /* Enable SSP, turn on interrupts */
+        writew((readw(SSP_CR1(pl022->virtbase)) | SSP_CR1_MASK_SSE),
+               SSP_CR1(pl022->virtbase));
+        writew(ENABLE_ALL_INTERRUPTS, SSP_IMSC(pl022->virtbase));
+}
+
+static void do_polling_transfer(void *data)
+{
+        struct pl022 *pl022 = data;
+        struct spi_message *message = NULL;
+        struct spi_transfer *transfer = NULL;
+        struct spi_transfer *previous = NULL;
+        struct chip_data *chip;
+
+        chip = pl022->cur_chip;
+        message = pl022->cur_msg;
+
+        while (message->state != STATE_DONE) {
+                /* Handle for abort */
+                if (message->state == STATE_ERROR)
+                        break;
+                transfer = pl022->cur_transfer;
+
+                /* Delay if requested at end of transfer */
+                if (message->state == STATE_RUNNING) {
+                        previous =
+                            list_entry(transfer->transfer_list.prev,
+                                       struct spi_transfer, transfer_list);
+                        if (previous->delay_usecs)
+                                udelay(previous->delay_usecs);
+                        if (previous->cs_change)
+                                pl022->cur_chip->cs_control(SSP_CHIP_SELECT);
+                } else {
+                        /* STATE_START */
+                        message->state = STATE_RUNNING;
+                        pl022->cur_chip->cs_control(SSP_CHIP_SELECT);
+                }
+
+                /* Configuration Changing Per Transfer */
+                if (set_up_next_transfer(pl022, transfer)) {
+                        /* Error path */
+                        message->state = STATE_ERROR;
+                        break;
+                }
+                /* Flush FIFOs and enable SSP */
+                flush(pl022);
+                writew((readw(SSP_CR1(pl022->virtbase)) | SSP_CR1_MASK_SSE),
+                       SSP_CR1(pl022->virtbase));
+
+                dev_dbg(&pl022->adev->dev, "POLLING TRANSFER ONGOING ... \n");
+                /* FIXME: insert a timeout so we don't hang here indefinately */
+                while (pl022->tx < pl022->tx_end || pl022->rx < pl022->rx_end)
+                        readwriter(pl022);
+
+                /* Update total byte transfered */
+                message->actual_length += pl022->cur_transfer->len;
+                if (pl022->cur_transfer->cs_change)
+                        pl022->cur_chip->cs_control(SSP_CHIP_DESELECT);
+                /* Move to next transfer */
+                message->state = next_transfer(pl022);
+        }
+
+        /* Handle end of message */
+        if (message->state == STATE_DONE)
+                message->status = 0;
+        else
+                message->status = -EIO;
+
+        giveback(pl022);
+        return;
+}
+
+/**
+ * pump_messages - Workqueue function which processes spi message queue
+ * @data: pointer to private data of SSP driver
+ *
+ * This function checks if there is any spi message in the queue that
+ * needs processing and delegate control to appropriate function
+ * do_polling_transfer()/do_interrupt_transfer()/do_dma_transfer()
+ * based on the kind of the transfer
+ *
+ */
+static void pump_messages(struct work_struct *work)
+{
+        struct pl022 *pl022 =
+                container_of(work, struct pl022, pump_messages);
+        unsigned long flags;
+
+        /* Lock queue and check for queue work */
+        spin_lock_irqsave(&pl022->queue_lock, flags);
+        if (list_empty(&pl022->queue) || pl022->run == QUEUE_STOPPED) {
+                pl022->busy = 0;
+                spin_unlock_irqrestore(&pl022->queue_lock, flags);
+                return;
+        }
+        /* Make sure we are not already running a message */
+        if (pl022->cur_msg) {
+                spin_unlock_irqrestore(&pl022->queue_lock, flags);
+                return;
+        }
+        /* Extract head of queue */
+        pl022->cur_msg =
+            list_entry(pl022->queue.next, struct spi_message, queue);
+
+        list_del_init(&pl022->cur_msg->queue);
+        pl022->busy = 1;
+        spin_unlock_irqrestore(&pl022->queue_lock, flags);
+
+        /* Initial message state */
+        pl022->cur_msg->state = STATE_START;
+        pl022->cur_transfer = list_entry(pl022->cur_msg->transfers.next,
+                                            struct spi_transfer,
+                                            transfer_list);
+
+        /* Setup the SPI using the per chip configuration */
+        pl022->cur_chip = spi_get_ctldata(pl022->cur_msg->spi);
+        /*
+         * We enable the clock here, then the clock will be disabled when
+         * giveback() is called in each method (poll/interrupt/DMA)
+         */
+        clk_enable(pl022->clk);
+        restore_state(pl022);
+        flush(pl022);
+
+        if (pl022->cur_chip->xfer_type == POLLING_TRANSFER)
+                do_polling_transfer(pl022);
+        else if (pl022->cur_chip->xfer_type == INTERRUPT_TRANSFER)
+                do_interrupt_transfer(pl022);
+        else
+                do_dma_transfer(pl022);
+}
+
+
+static int __init init_queue(struct pl022 *pl022)
+{
+        INIT_LIST_HEAD(&pl022->queue);
+        spin_lock_init(&pl022->queue_lock);
+
+        pl022->run = QUEUE_STOPPED;
+        pl022->busy = 0;
+
+        tasklet_init(&pl022->pump_transfers,
+                        pump_transfers, (unsigned long)pl022);
+
+        INIT_WORK(&pl022->pump_messages, pump_messages);
+        pl022->workqueue = create_singlethread_workqueue(
+                                        dev_name(pl022->master->dev.parent));
+        if (pl022->workqueue == NULL)
+                return -EBUSY;
+
+        return 0;
+}
+
+
+static int start_queue(struct pl022 *pl022)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&pl022->queue_lock, flags);
+
+        if (pl022->run == QUEUE_RUNNING || pl022->busy) {
+                spin_unlock_irqrestore(&pl022->queue_lock, flags);
+                return -EBUSY;
+        }
+
+        pl022->run = QUEUE_RUNNING;
+        pl022->cur_msg = NULL;
+        pl022->cur_transfer = NULL;
+        pl022->cur_chip = NULL;
+        spin_unlock_irqrestore(&pl022->queue_lock, flags);
+
+        queue_work(pl022->workqueue, &pl022->pump_messages);
+
+        return 0;
+}
+
+
+static int stop_queue(struct pl022 *pl022)
+{
+        unsigned long flags;
+        unsigned limit = 500;
+        int status = 0;
+
+        spin_lock_irqsave(&pl022->queue_lock, flags);
+
+        /* This is a bit lame, but is optimized for the common execution path.
+         * A wait_queue on the pl022->busy could be used, but then the common
+         * execution path (pump_messages) would be required to call wake_up or
+         * friends on every SPI message. Do this instead */
+        pl022->run = QUEUE_STOPPED;
+        while (!list_empty(&pl022->queue) && pl022->busy && limit--) {
+                spin_unlock_irqrestore(&pl022->queue_lock, flags);
+                msleep(10);
+                spin_lock_irqsave(&pl022->queue_lock, flags);
+        }
+
+        if (!list_empty(&pl022->queue) || pl022->busy)
+                status = -EBUSY;
+
+        spin_unlock_irqrestore(&pl022->queue_lock, flags);
+
+        return status;
+}
+
+static int destroy_queue(struct pl022 *pl022)
+{
+        int status;
+
+        status = stop_queue(pl022);
+        /* we are unloading the module or failing to load (only two calls
+         * to this routine), and neither call can handle a return value.
+         * However, destroy_workqueue calls flush_workqueue, and that will
+         * block until all work is done.  If the reason that stop_queue
+         * timed out is that the work will never finish, then it does no
+         * good to call destroy_workqueue, so return anyway. */
+        if (status != 0)
+                return status;
+
+        destroy_workqueue(pl022->workqueue);
+
+        return 0;
+}
+
+static int verify_controller_parameters(struct pl022 *pl022,
+                                        struct pl022_config_chip *chip_info)
+{
+        if ((chip_info->lbm != LOOPBACK_ENABLED)
+            && (chip_info->lbm != LOOPBACK_DISABLED)) {
+                dev_err(chip_info->dev,
+                        "loopback Mode is configured incorrectly\n");
+                return -EINVAL;
+        }
+        if ((chip_info->iface < SSP_INTERFACE_MOTOROLA_SPI)
+            || (chip_info->iface > SSP_INTERFACE_UNIDIRECTIONAL)) {
+                dev_err(chip_info->dev,
+                        "interface is configured incorrectly\n");
+                return -EINVAL;
+        }
+        if ((chip_info->iface == SSP_INTERFACE_UNIDIRECTIONAL) &&
+            (!pl022->vendor->unidir)) {
+                dev_err(chip_info->dev,
+                        "unidirectional mode not supported in this "
+                        "hardware version\n");
+                return -EINVAL;
+        }
+        if ((chip_info->hierarchy != SSP_MASTER)
+            && (chip_info->hierarchy != SSP_SLAVE)) {
+                dev_err(chip_info->dev,
+                        "hierarchy is configured incorrectly\n");
+                return -EINVAL;
+        }
+        if (((chip_info->clk_freq).cpsdvsr < CPSDVR_MIN)
+            || ((chip_info->clk_freq).cpsdvsr > CPSDVR_MAX)) {
+                dev_err(chip_info->dev,
+                        "cpsdvsr is configured incorrectly\n");
+                return -EINVAL;
+        }
+        if ((chip_info->endian_rx != SSP_RX_MSB)
+            && (chip_info->endian_rx != SSP_RX_LSB)) {
+                dev_err(chip_info->dev,
+                        "RX FIFO endianess is configured incorrectly\n");
+                return -EINVAL;
+        }
+        if ((chip_info->endian_tx != SSP_TX_MSB)
+            && (chip_info->endian_tx != SSP_TX_LSB)) {
+                dev_err(chip_info->dev,
+                        "TX FIFO endianess is configured incorrectly\n");
+                return -EINVAL;
+        }
+        if ((chip_info->data_size < SSP_DATA_BITS_4)
+            || (chip_info->data_size > SSP_DATA_BITS_32)) {
+                dev_err(chip_info->dev,
+                        "DATA Size is configured incorrectly\n");
+                return -EINVAL;
+        }
+        if ((chip_info->com_mode != INTERRUPT_TRANSFER)
+            && (chip_info->com_mode != DMA_TRANSFER)
+            && (chip_info->com_mode != POLLING_TRANSFER)) {
+                dev_err(chip_info->dev,
+                        "Communication mode is configured incorrectly\n");
+                return -EINVAL;
+        }
+        if ((chip_info->rx_lev_trig < SSP_RX_1_OR_MORE_ELEM)
+            || (chip_info->rx_lev_trig > SSP_RX_32_OR_MORE_ELEM)) {
+                dev_err(chip_info->dev,
+                        "RX FIFO Trigger Level is configured incorrectly\n");
+                return -EINVAL;
+        }
+        if ((chip_info->tx_lev_trig < SSP_TX_1_OR_MORE_EMPTY_LOC)
+            || (chip_info->tx_lev_trig > SSP_TX_32_OR_MORE_EMPTY_LOC)) {
+                dev_err(chip_info->dev,
+                        "TX FIFO Trigger Level is configured incorrectly\n");
+                return -EINVAL;
+        }
+        if (chip_info->iface == SSP_INTERFACE_MOTOROLA_SPI) {
+                if ((chip_info->clk_phase != SSP_CLK_RISING_EDGE)
+                    && (chip_info->clk_phase != SSP_CLK_FALLING_EDGE)) {
+                        dev_err(chip_info->dev,
+                                "Clock Phase is configured incorrectly\n");
+                        return -EINVAL;
+                }
+                if ((chip_info->clk_pol != SSP_CLK_POL_IDLE_LOW)
+                    && (chip_info->clk_pol != SSP_CLK_POL_IDLE_HIGH)) {
+                        dev_err(chip_info->dev,
+                                "Clock Polarity is configured incorrectly\n");
+                        return -EINVAL;
+                }
+        }
+        if (chip_info->iface == SSP_INTERFACE_NATIONAL_MICROWIRE) {
+                if ((chip_info->ctrl_len < SSP_BITS_4)
+                    || (chip_info->ctrl_len > SSP_BITS_32)) {
+                        dev_err(chip_info->dev,
+                                "CTRL LEN is configured incorrectly\n");
+                        return -EINVAL;
+                }
+                if ((chip_info->wait_state != SSP_MWIRE_WAIT_ZERO)
+                    && (chip_info->wait_state != SSP_MWIRE_WAIT_ONE)) {
+                        dev_err(chip_info->dev,
+                                "Wait State is configured incorrectly\n");
+                        return -EINVAL;
+                }
+                if ((chip_info->duplex != SSP_MICROWIRE_CHANNEL_FULL_DUPLEX)
+                    && (chip_info->duplex !=
+                        SSP_MICROWIRE_CHANNEL_HALF_DUPLEX)) {
+                        dev_err(chip_info->dev,
+                                "DUPLEX is configured incorrectly\n");
+                        return -EINVAL;
+                }
+        }
+        if (chip_info->cs_control == NULL) {
+                dev_warn(chip_info->dev,
+                        "Chip Select Function is NULL for this chip\n");
+                chip_info->cs_control = null_cs_control;
+        }
+        return 0;
+}
+
+/**
+ * pl022_transfer - transfer function registered to SPI master framework
+ * @spi: spi device which is requesting transfer
+ * @msg: spi message which is to handled is queued to driver queue
+ *
+ * This function is registered to the SPI framework for this SPI master
+ * controller. It will queue the spi_message in the queue of driver if
+ * the queue is not stopped and return.
+ */
+static int pl022_transfer(struct spi_device *spi, struct spi_message *msg)
+{
+        struct pl022 *pl022 = spi_master_get_devdata(spi->master);
+        unsigned long flags;
+
+        spin_lock_irqsave(&pl022->queue_lock, flags);
+
+        if (pl022->run == QUEUE_STOPPED) {
+                spin_unlock_irqrestore(&pl022->queue_lock, flags);
+                return -ESHUTDOWN;
+        }
+        msg->actual_length = 0;
+        msg->status = -EINPROGRESS;
+        msg->state = STATE_START;
+
+        list_add_tail(&msg->queue, &pl022->queue);
+        if (pl022->run == QUEUE_RUNNING && !pl022->busy)
+                queue_work(pl022->workqueue, &pl022->pump_messages);
+
+        spin_unlock_irqrestore(&pl022->queue_lock, flags);
+        return 0;
+}
+
+static int calculate_effective_freq(struct pl022 *pl022,
+                                    int freq,
+                                    struct ssp_clock_params *clk_freq)
+{
+        /* Lets calculate the frequency parameters */
+        u16 cpsdvsr = 2;
+        u16 scr = 0;
+        bool freq_found = false;
+        u32 rate;
+        u32 max_tclk;
+        u32 min_tclk;
+
+        rate = clk_get_rate(pl022->clk);
+        /* cpsdvscr = 2 & scr 0 */
+        max_tclk = (rate / (CPSDVR_MIN * (1 + SCR_MIN)));
+        /* cpsdvsr = 254 & scr = 255 */
+        min_tclk = (rate / (CPSDVR_MAX * (1 + SCR_MAX)));
+
+        if ((freq <= max_tclk) && (freq >= min_tclk)) {
+                while (cpsdvsr <= CPSDVR_MAX && !freq_found) {
+                        while (scr <= SCR_MAX && !freq_found) {
+                                if ((rate /
+                                     (cpsdvsr * (1 + scr))) > freq)
+                                        scr += 1;
+                                else {
+                                        /*
+                                         * This bool is made true when
+                                         * effective frequency >=
+                                         * target frequency is found
+                                         */
+                                        freq_found = true;
+                                        if ((rate /
+                                             (cpsdvsr * (1 + scr))) != freq) {
+                                                if (scr == SCR_MIN) {
+                                                        cpsdvsr -= 2;
+                                                        scr = SCR_MAX;
+                                                } else
+                                                        scr -= 1;
+                                        }
+                                }
+                        }
+                        if (!freq_found) {
+                                cpsdvsr += 2;
+                                scr = SCR_MIN;
+                        }
+                }
+                if (cpsdvsr != 0) {
+                        dev_dbg(&pl022->adev->dev,
+                                "SSP Effective Frequency is %u\n",
+                                (rate / (cpsdvsr * (1 + scr))));
+                        clk_freq->cpsdvsr = (u8) (cpsdvsr & 0xFF);
+                        clk_freq->scr = (u8) (scr & 0xFF);
+                        dev_dbg(&pl022->adev->dev,
+                                "SSP cpsdvsr = %d, scr = %d\n",
+                                clk_freq->cpsdvsr, clk_freq->scr);
+                }
+        } else {
+                dev_err(&pl022->adev->dev,
+                        "controller data is incorrect: out of range frequency");
+                return -EINVAL;
+        }
+        return 0;
+}
+
+/**
+ * NOT IMPLEMENTED
+ * process_dma_info - Processes the DMA info provided by client drivers
+ * @chip_info: chip info provided by client device
+ * @chip: Runtime state maintained by the SSP controller for each spi device
+ *
+ * This function processes and stores DMA config provided by client driver
+ * into the runtime state maintained by the SSP controller driver
+ */
+static int process_dma_info(struct pl022_config_chip *chip_info,
+                            struct chip_data *chip)
+{
+        dev_err(chip_info->dev,
+                "cannot process DMA info, DMA not implemented!\n");
+        return -ENOTSUPP;
+}
+
+/**
+ * pl022_setup - setup function registered to SPI master framework
+ * @spi: spi device which is requesting setup
+ *
+ * This function is registered to the SPI framework for this SPI master
+ * controller. If it is the first time when setup is called by this device,
+ * this function will initialize the runtime state for this chip and save
+ * the same in the device structure. Else it will update the runtime info
+ * with the updated chip info. Nothing is really being written to the
+ * controller hardware here, that is not done until the actual transfer
+ * commence.
+ */
+
+/* FIXME: JUST GUESSING the spi->mode bits understood by this driver */
+#define MODEBITS        (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \
+                        | SPI_LSB_FIRST | SPI_LOOP)
+
+static int pl022_setup(struct spi_device *spi)
+{
+        struct pl022_config_chip *chip_info;
+        struct chip_data *chip;
+        int status = 0;
+        struct pl022 *pl022 = spi_master_get_devdata(spi->master);
+
+        if (spi->mode & ~MODEBITS) {
+                dev_dbg(&spi->dev, "unsupported mode bits %x\n",
+                        spi->mode & ~MODEBITS);
+                return -EINVAL;
+        }
+
+        if (!spi->max_speed_hz)
+                return -EINVAL;
+
+        /* Get controller_state if one is supplied */
+        chip = spi_get_ctldata(spi);
+
+        if (chip == NULL) {
+                chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL);
+                if (!chip) {
+                        dev_err(&spi->dev,
+                                "cannot allocate controller state\n");
+                        return -ENOMEM;
+                }
+                dev_dbg(&spi->dev,
+                        "allocated memory for controller's runtime state\n");
+        }
+
+        /* Get controller data if one is supplied */
+        chip_info = spi->controller_data;
+
+        if (chip_info == NULL) {
+                /* spi_board_info.controller_data not is supplied */
+                dev_dbg(&spi->dev,
+                        "using default controller_data settings\n");
+
+                chip_info =
+                        kzalloc(sizeof(struct pl022_config_chip), GFP_KERNEL);
+
+                if (!chip_info) {
+                        dev_err(&spi->dev,
+                                "cannot allocate controller data\n");
+                        status = -ENOMEM;
+                        goto err_first_setup;
+                }
+
+                dev_dbg(&spi->dev, "allocated memory for controller data\n");
+
+                /* Pointer back to the SPI device */
+                chip_info->dev = &spi->dev;
+                /*
+                 * Set controller data default values:
+                 * Polling is supported by default
+                 */
+                chip_info->lbm = LOOPBACK_DISABLED;
+                chip_info->com_mode = POLLING_TRANSFER;
+                chip_info->iface = SSP_INTERFACE_MOTOROLA_SPI;
+                chip_info->hierarchy = SSP_SLAVE;
+                chip_info->slave_tx_disable = DO_NOT_DRIVE_TX;
+                chip_info->endian_tx = SSP_TX_LSB;
+                chip_info->endian_rx = SSP_RX_LSB;
+                chip_info->data_size = SSP_DATA_BITS_12;
+                chip_info->rx_lev_trig = SSP_RX_1_OR_MORE_ELEM;
+                chip_info->tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC;
+                chip_info->clk_phase = SSP_CLK_FALLING_EDGE;
+                chip_info->clk_pol = SSP_CLK_POL_IDLE_LOW;
+                chip_info->ctrl_len = SSP_BITS_8;
+                chip_info->wait_state = SSP_MWIRE_WAIT_ZERO;
+                chip_info->duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX;
+                chip_info->cs_control = null_cs_control;
+        } else {
+                dev_dbg(&spi->dev,
+                        "using user supplied controller_data settings\n");
+        }
+
+        /*
+         * We can override with custom divisors, else we use the board
+         * frequency setting
+         */
+        if ((0 == chip_info->clk_freq.cpsdvsr)
+            && (0 == chip_info->clk_freq.scr)) {
+                status = calculate_effective_freq(pl022,
+                                                  spi->max_speed_hz,
+                                                  &chip_info->clk_freq);
+                if (status < 0)
+                        goto err_config_params;
+        } else {
+                if ((chip_info->clk_freq.cpsdvsr % 2) != 0)
+                        chip_info->clk_freq.cpsdvsr =
+                                chip_info->clk_freq.cpsdvsr - 1;
+        }
+        status = verify_controller_parameters(pl022, chip_info);
+        if (status) {
+                dev_err(&spi->dev, "controller data is incorrect");
+                goto err_config_params;
+        }
+        /* Now set controller state based on controller data */
+        chip->xfer_type = chip_info->com_mode;
+        chip->cs_control = chip_info->cs_control;
+
+        if (chip_info->data_size <= 8) {
+                dev_dbg(&spi->dev, "1 <= n <=8 bits per word\n");
+                chip->n_bytes = 1;
+                chip->read = READING_U8;
+                chip->write = WRITING_U8;
+        } else if (chip_info->data_size <= 16) {
+                dev_dbg(&spi->dev, "9 <= n <= 16 bits per word\n");
+                chip->n_bytes = 2;
+                chip->read = READING_U16;
+                chip->write = WRITING_U16;
+        } else {
+                if (pl022->vendor->max_bpw >= 32) {
+                        dev_dbg(&spi->dev, "17 <= n <= 32 bits per word\n");
+                        chip->n_bytes = 4;
+                        chip->read = READING_U32;
+                        chip->write = WRITING_U32;
+                } else {
+                        dev_err(&spi->dev,
+                                "illegal data size for this controller!\n");
+                        dev_err(&spi->dev,
+                                "a standard pl022 can only handle "
+                                "1 <= n <= 16 bit words\n");
+                        goto err_config_params;
+                }
+        }
+
+        /* Now Initialize all register settings required for this chip */
+        chip->cr0 = 0;
+        chip->cr1 = 0;
+        chip->dmacr = 0;
+        chip->cpsr = 0;
+        if ((chip_info->com_mode == DMA_TRANSFER)
+            && ((pl022->master_info)->enable_dma)) {
+                chip->enable_dma = 1;
+                dev_dbg(&spi->dev, "DMA mode set in controller state\n");
+                status = process_dma_info(chip_info, chip);
+                if (status < 0)
+                        goto err_config_params;
+                SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED,
+                               SSP_DMACR_MASK_RXDMAE, 0);
+                SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED,
+                               SSP_DMACR_MASK_TXDMAE, 1);
+        } else {
+                chip->enable_dma = 0;
+                dev_dbg(&spi->dev, "DMA mode NOT set in controller state\n");
+                SSP_WRITE_BITS(chip->dmacr, SSP_DMA_DISABLED,
+                               SSP_DMACR_MASK_RXDMAE, 0);
+                SSP_WRITE_BITS(chip->dmacr, SSP_DMA_DISABLED,
+                               SSP_DMACR_MASK_TXDMAE, 1);
+        }
+
+        chip->cpsr = chip_info->clk_freq.cpsdvsr;
+
+        SSP_WRITE_BITS(chip->cr0, chip_info->data_size, SSP_CR0_MASK_DSS, 0);
+        SSP_WRITE_BITS(chip->cr0, chip_info->duplex, SSP_CR0_MASK_HALFDUP, 5);
+        SSP_WRITE_BITS(chip->cr0, chip_info->clk_pol, SSP_CR0_MASK_SPO, 6);
+        SSP_WRITE_BITS(chip->cr0, chip_info->clk_phase, SSP_CR0_MASK_SPH, 7);
+        SSP_WRITE_BITS(chip->cr0, chip_info->clk_freq.scr, SSP_CR0_MASK_SCR, 8);
+        SSP_WRITE_BITS(chip->cr0, chip_info->ctrl_len, SSP_CR0_MASK_CSS, 16);
+        SSP_WRITE_BITS(chip->cr0, chip_info->iface, SSP_CR0_MASK_FRF, 21);
+        SSP_WRITE_BITS(chip->cr1, chip_info->lbm, SSP_CR1_MASK_LBM, 0);
+        SSP_WRITE_BITS(chip->cr1, SSP_DISABLED, SSP_CR1_MASK_SSE, 1);
+        SSP_WRITE_BITS(chip->cr1, chip_info->hierarchy, SSP_CR1_MASK_MS, 2);
+        SSP_WRITE_BITS(chip->cr1, chip_info->slave_tx_disable, SSP_CR1_MASK_SOD, 3);
+        SSP_WRITE_BITS(chip->cr1, chip_info->endian_rx, SSP_CR1_MASK_RENDN, 4);
+        SSP_WRITE_BITS(chip->cr1, chip_info->endian_tx, SSP_CR1_MASK_TENDN, 5);
+        SSP_WRITE_BITS(chip->cr1, chip_info->wait_state, SSP_CR1_MASK_MWAIT, 6);
+        SSP_WRITE_BITS(chip->cr1, chip_info->rx_lev_trig, SSP_CR1_MASK_RXIFLSEL, 7);
+        SSP_WRITE_BITS(chip->cr1, chip_info->tx_lev_trig, SSP_CR1_MASK_TXIFLSEL, 10);
+
+        /* Save controller_state */
+        spi_set_ctldata(spi, chip);
+        return status;
+ err_config_params:
+ err_first_setup:
+        kfree(chip);
+        return status;
+}
+
+/**
+ * pl022_cleanup - cleanup function registered to SPI master framework
+ * @spi: spi device which is requesting cleanup
+ *
+ * This function is registered to the SPI framework for this SPI master
+ * controller. It will free the runtime state of chip.
+ */
+static void pl022_cleanup(struct spi_device *spi)
+{
+        struct chip_data *chip = spi_get_ctldata(spi);
+
+        spi_set_ctldata(spi, NULL);
+        kfree(chip);
+}
+
+
+static int __init
+pl022_probe(struct amba_device *adev, struct amba_id *id)
+{
+        struct device *dev = &adev->dev;
+        struct pl022_ssp_controller *platform_info = adev->dev.platform_data;
+        struct spi_master *master;
+        struct pl022 *pl022 = NULL;     /*Data for this driver */
+        int status = 0;
+
+        dev_info(&adev->dev,
+                 "ARM PL022 driver, device ID: 0x%08x\n", adev->periphid);
+        if (platform_info == NULL) {
+                dev_err(&adev->dev, "probe - no platform data supplied\n");
+                status = -ENODEV;
+                goto err_no_pdata;
+        }
+
+        /* Allocate master with space for data */
+        master = spi_alloc_master(dev, sizeof(struct pl022));
+        if (master == NULL) {
+                dev_err(&adev->dev, "probe - cannot alloc SPI master\n");
+                status = -ENOMEM;
+                goto err_no_master;
+        }
+
+        pl022 = spi_master_get_devdata(master);
+        pl022->master = master;
+        pl022->master_info = platform_info;
+        pl022->adev = adev;
+        pl022->vendor = id->data;
+
+        /*
+         * Bus Number Which has been Assigned to this SSP controller
+         * on this board
+         */
+        master->bus_num = platform_info->bus_id;
+        master->num_chipselect = platform_info->num_chipselect;
+        master->cleanup = pl022_cleanup;
+        master->setup = pl022_setup;
+        master->transfer = pl022_transfer;
+
+        dev_dbg(&adev->dev, "BUSNO: %d\n", master->bus_num);
+
+        status = amba_request_regions(adev, NULL);
+        if (status)
+                goto err_no_ioregion;
+
+        pl022->virtbase = ioremap(adev->res.start, resource_size(&adev->res));
+        if (pl022->virtbase == NULL) {
+                status = -ENOMEM;
+                goto err_no_ioremap;
+        }
+        printk(KERN_INFO "pl022: mapped registers from 0x%08x to %p\n",
+               adev->res.start, pl022->virtbase);
+
+        pl022->clk = clk_get(&adev->dev, NULL);
+        if (IS_ERR(pl022->clk)) {
+                status = PTR_ERR(pl022->clk);
+                dev_err(&adev->dev, "could not retrieve SSP/SPI bus clock\n");
+                goto err_no_clk;
+        }
+
+        /* Disable SSP */
+        clk_enable(pl022->clk);
+        writew((readw(SSP_CR1(pl022->virtbase)) & (~SSP_CR1_MASK_SSE)),
+               SSP_CR1(pl022->virtbase));
+        load_ssp_default_config(pl022);
+        clk_disable(pl022->clk);
+
+        status = request_irq(adev->irq[0], pl022_interrupt_handler, 0, "pl022",
+                             pl022);
+        if (status < 0) {
+                dev_err(&adev->dev, "probe - cannot get IRQ (%d)\n", status);
+                goto err_no_irq;
+        }
+        /* Initialize and start queue */
+        status = init_queue(pl022);
+        if (status != 0) {
+                dev_err(&adev->dev, "probe - problem initializing queue\n");
+                goto err_init_queue;
+        }
+        status = start_queue(pl022);
+        if (status != 0) {
+                dev_err(&adev->dev, "probe - problem starting queue\n");
+                goto err_start_queue;
+        }
+        /* Register with the SPI framework */
+        amba_set_drvdata(adev, pl022);
+        status = spi_register_master(master);
+        if (status != 0) {
+                dev_err(&adev->dev,
+                        "probe - problem registering spi master\n");
+                goto err_spi_register;
+        }
+        dev_dbg(dev, "probe succeded\n");
+        return 0;
+
+ err_spi_register:
+ err_start_queue:
+ err_init_queue:
+        destroy_queue(pl022);
+        free_irq(adev->irq[0], pl022);
+ err_no_irq:
+        clk_put(pl022->clk);
+ err_no_clk:
+        iounmap(pl022->virtbase);
+ err_no_ioremap:
+        amba_release_regions(adev);
+ err_no_ioregion:
+        spi_master_put(master);
+ err_no_master:
+ err_no_pdata:
+        return status;
+}
+
+static int __exit
+pl022_remove(struct amba_device *adev)
+{
+        struct pl022 *pl022 = amba_get_drvdata(adev);
+        int status = 0;
+        if (!pl022)
+                return 0;
+
+        /* Remove the queue */
+        status = destroy_queue(pl022);
+        if (status != 0) {
+                dev_err(&adev->dev,
+                        "queue remove failed (%d)\n", status);
+                return status;
+        }
+        load_ssp_default_config(pl022);
+        free_irq(adev->irq[0], pl022);
+        clk_disable(pl022->clk);
+        clk_put(pl022->clk);
+        iounmap(pl022->virtbase);
+        amba_release_regions(adev);
+        tasklet_disable(&pl022->pump_transfers);
+        spi_unregister_master(pl022->master);
+        spi_master_put(pl022->master);
+        amba_set_drvdata(adev, NULL);
+        dev_dbg(&adev->dev, "remove succeded\n");
+        return 0;
+}
+
+#ifdef CONFIG_PM
+static int pl022_suspend(struct amba_device *adev, pm_message_t state)
+{
+        struct pl022 *pl022 = amba_get_drvdata(adev);
+        int status = 0;
+
+        status = stop_queue(pl022);
+        if (status) {
+                dev_warn(&adev->dev, "suspend cannot stop queue\n");
+                return status;
+        }
+
+        clk_enable(pl022->clk);
+        load_ssp_default_config(pl022);
+        clk_disable(pl022->clk);
+        dev_dbg(&adev->dev, "suspended\n");
+        return 0;
+}
+
+static int pl022_resume(struct amba_device *adev)
+{
+        struct pl022 *pl022 = amba_get_drvdata(adev);
+        int status = 0;
+
+        /* Start the queue running */
+        status = start_queue(pl022);
+        if (status)
+                dev_err(&adev->dev, "problem starting queue (%d)\n", status);
+        else
+                dev_dbg(&adev->dev, "resumed\n");
+
+        return status;
+}
+#else
+#define pl022_suspend NULL
+#define pl022_resume NULL
+#endif  /* CONFIG_PM */
+
+static struct vendor_data vendor_arm = {
+        .fifodepth = 8,
+        .max_bpw = 16,
+        .unidir = false,
+};
+
+
+static struct vendor_data vendor_st = {
+        .fifodepth = 32,
+        .max_bpw = 32,
+        .unidir = false,
+};
+
+static struct amba_id pl022_ids[] = {
+        {
+                /*
+                 * ARM PL022 variant, this has a 16bit wide
+                 * and 8 locations deep TX/RX FIFO
+                 */
+                .id     = 0x00041022,
+                .mask   = 0x000fffff,
+                .data   = &vendor_arm,
+        },
+        {
+                /*
+                 * ST Micro derivative, this has 32bit wide
+                 * and 32 locations deep TX/RX FIFO
+                 */
+                .id     = 0x00108022,
+                .mask   = 0xffffffff,
+                .data   = &vendor_st,
+        },
+        { 0, 0 },
+};
+
+static struct amba_driver pl022_driver = {
+        .drv = {
+                .name   = "ssp-pl022",
+        },
+        .id_table       = pl022_ids,
+        .probe          = pl022_probe,
+        .remove         = __exit_p(pl022_remove),
+        .suspend        = pl022_suspend,
+        .resume         = pl022_resume,
+};
+
+
+static int __init pl022_init(void)
+{
+        return amba_driver_register(&pl022_driver);
+}
+
+module_init(pl022_init);
+
+static void __exit pl022_exit(void)
+{
+        amba_driver_unregister(&pl022_driver);
+}
+
+module_exit(pl022_exit);
+
+MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
+MODULE_DESCRIPTION("PL022 SSP Controller Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/spi/spi_s3c24xx_gpio.c b/drivers/spi/spi_s3c24xx_gpio.c
index f2447a5476bb..bbf9371cd284 100644
--- a/drivers/spi/spi_s3c24xx_gpio.c
+++ b/drivers/spi/spi_s3c24xx_gpio.c
@@ -17,6 +17,7 @@
 #include <linux/spinlock.h>
 #include <linux/workqueue.h>
 #include <linux/platform_device.h>
+#include <linux/gpio.h>
 
 #include <linux/spi/spi.h>
 #include <linux/spi/spi_bitbang.h>
diff --git a/drivers/staging/go7007/go7007.txt b/drivers/staging/go7007/go7007.txt
index 9f6772bc68c2..1c2907c1dc81 100644
--- a/drivers/staging/go7007/go7007.txt
+++ b/drivers/staging/go7007/go7007.txt
@@ -2,7 +2,7 @@ This is a driver for the WIS GO7007SB multi-format video encoder.
 
 Pete Eberlein <pete@sensoray.com>
 
-The driver was orignally released under the GPL and is currently hosted at:
+The driver was originally released under the GPL and is currently hosted at:
 http://nikosapi.org/wiki/index.php/WIS_Go7007_Linux_driver
 The go7007 firmware can be acquired from the package on the site above.
 
@@ -24,7 +24,7 @@ These should be used instead of the non-standard GO7007 ioctls described
 below.
 
 
-The README files from the orignal package appear below:
+The README files from the original package appears below:
 
 ---------------------------------------------------------------------------
                      WIS GO7007SB Public Linux Driver
diff --git a/drivers/staging/panel/lcd-panel-cgram.txt b/drivers/staging/panel/lcd-panel-cgram.txt
index f9ceef4322a3..7f82c905763d 100644
--- a/drivers/staging/panel/lcd-panel-cgram.txt
+++ b/drivers/staging/panel/lcd-panel-cgram.txt
@@ -3,7 +3,7 @@ characters 0 to 7. The escape code to define a new character is
 '\e[LG' followed by one digit from 0 to 7, representing the character
 number, and up to 8 couples of hex digits terminated by a semi-colon
 (';'). Each couple of digits represents a line, with 1-bits for each
-illuminated pixel with LSB on the right. Lines are numberred from the
+illuminated pixel with LSB on the right. Lines are numbered from the
 top of the character to the bottom. On a 5x7 matrix, only the 5 lower
 bits of the 7 first bytes are used for each character. If the string
 is incomplete, only complete lines will be redefined. Here are some
diff --git a/drivers/staging/rt2860/common/mlme.c b/drivers/staging/rt2860/common/mlme.c
index c00f9ab9c46c..2edf2999f5c8 100644
--- a/drivers/staging/rt2860/common/mlme.c
+++ b/drivers/staging/rt2860/common/mlme.c
@@ -5664,7 +5664,7 @@ VOID 	AsicUpdateProtect(
 #if 0
         MacReg |= (pAd->CommonCfg.RtsThreshold << 8);
 #else
-        // If the user want disable RtsThreshold and enbale Amsdu/Ralink-Aggregation, set the RtsThreshold as 4096
+        // If the user want disable RtsThreshold and enable Amsdu/Ralink-Aggregation, set the RtsThreshold as 4096
         if ((
 #ifdef DOT11_N_SUPPORT
                         (pAd->CommonCfg.BACapability.field.AmsduEnable) ||
diff --git a/drivers/staging/rt2870/common/mlme.c b/drivers/staging/rt2870/common/mlme.c
index 8a82cee8bf26..a26bc033337d 100644
--- a/drivers/staging/rt2870/common/mlme.c
+++ b/drivers/staging/rt2870/common/mlme.c
@@ -5561,7 +5561,7 @@ VOID 	AsicUpdateProtect(
 #if 0
         MacReg |= (pAd->CommonCfg.RtsThreshold << 8);
 #else
-        // If the user want disable RtsThreshold and enbale Amsdu/Ralink-Aggregation, set the RtsThreshold as 4096
+        // If the user want disable RtsThreshold and enable Amsdu/Ralink-Aggregation, set the RtsThreshold as 4096
         if ((
 #ifdef DOT11_N_SUPPORT
                         (pAd->CommonCfg.BACapability.field.AmsduEnable) ||
diff --git a/drivers/staging/rt3070/common/mlme.c b/drivers/staging/rt3070/common/mlme.c
index 0ffbfa36699e..0189bab013cf 100644
--- a/drivers/staging/rt3070/common/mlme.c
+++ b/drivers/staging/rt3070/common/mlme.c
@@ -5575,7 +5575,7 @@ VOID 	AsicUpdateProtect(
         RTMP_IO_READ32(pAd, TX_RTS_CFG, &MacReg);
         MacReg &= 0xFF0000FF;
 
-        // If the user want disable RtsThreshold and enbale Amsdu/Ralink-Aggregation, set the RtsThreshold as 4096
+        // If the user want disable RtsThreshold and enable Amsdu/Ralink-Aggregation, set the RtsThreshold as 4096
     if ((
 #ifdef DOT11_N_SUPPORT
                 (pAd->CommonCfg.BACapability.field.AmsduEnable) ||
diff --git a/drivers/staging/wlan-ng/hfa384x_usb.c b/drivers/staging/wlan-ng/hfa384x_usb.c
index 888198c9a106..824e65bdc433 100644
--- a/drivers/staging/wlan-ng/hfa384x_usb.c
+++ b/drivers/staging/wlan-ng/hfa384x_usb.c
@@ -2424,7 +2424,7 @@ int hfa384x_drvr_ramdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len)
 *       0               success
 *       >0              f/w reported error - f/w status code
 *       <0              driver reported error
-*       -ETIMEOUT       timout waiting for the cmd regs to become
+*       -ETIMEDOUT      timout waiting for the cmd regs to become
 *                       available, or waiting for the control reg
 *                       to indicate the Aux port is enabled.
 *       -ENODATA        the buffer does NOT contain a valid PDA.
diff --git a/drivers/usb/host/ohci-ep93xx.c b/drivers/usb/host/ohci-ep93xx.c
index 7cf74f8c2db1..b0dbf4157d29 100644
--- a/drivers/usb/host/ohci-ep93xx.c
+++ b/drivers/usb/host/ohci-ep93xx.c
@@ -47,7 +47,7 @@ static int usb_hcd_ep93xx_probe(const struct hc_driver *driver,
         struct usb_hcd *hcd;
 
         if (pdev->resource[1].flags != IORESOURCE_IRQ) {
-                pr_debug("resource[1] is not IORESOURCE_IRQ");
+                dbg("resource[1] is not IORESOURCE_IRQ");
                 return -ENOMEM;
         }
 
@@ -65,12 +65,18 @@ static int usb_hcd_ep93xx_probe(const struct hc_driver *driver,
 
         hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
         if (hcd->regs == NULL) {
-                pr_debug("ioremap failed");
+                dbg("ioremap failed");
                 retval = -ENOMEM;
                 goto err2;
         }
 
-        usb_host_clock = clk_get(&pdev->dev, "usb_host");
+        usb_host_clock = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(usb_host_clock)) {
+                dbg("clk_get failed");
+                retval = PTR_ERR(usb_host_clock);
+                goto err3;
+        }
+
         ep93xx_start_hc(&pdev->dev);
 
         ohci_hcd_init(hcd_to_ohci(hcd));
@@ -80,6 +86,7 @@ static int usb_hcd_ep93xx_probe(const struct hc_driver *driver,
                 return retval;
 
         ep93xx_stop_hc(&pdev->dev);
+err3:
         iounmap(hcd->regs);
 err2:
         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c
index eabf20eeb370..db964db42d3c 100644
--- a/drivers/usb/serial/io_ti.c
+++ b/drivers/usb/serial/io_ti.c
@@ -102,7 +102,7 @@ struct edgeport_port {
         __u8 shadow_mcr;
         __u8 shadow_lsr;
         __u8 lsr_mask;
-        __u32 ump_read_timeout;         /* Number of miliseconds the UMP will
+        __u32 ump_read_timeout;         /* Number of milliseconds the UMP will
                                            wait without data before completing
                                            a read short */
         int baud_rate;
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 74712cb8399a..2b5a691064b7 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -397,7 +397,7 @@ config FB_SA1100
 
 config FB_IMX
         tristate "Motorola i.MX LCD support"
-        depends on FB && (ARCH_IMX || ARCH_MX2)
+        depends on FB && (ARCH_MX1 || ARCH_MX2)
         select FB_CFB_FILLRECT
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
@@ -1759,6 +1759,16 @@ config FB_68328
           Say Y here if you want to support the built-in frame buffer of
           the Motorola 68328 CPU family.
 
+config FB_PXA168
+        tristate "PXA168/910 LCD framebuffer support"
+        depends on FB && (CPU_PXA168 || CPU_PXA910)
+        select FB_CFB_FILLRECT
+        select FB_CFB_COPYAREA
+        select FB_CFB_IMAGEBLIT
+        ---help---
+          Frame buffer driver for the built-in LCD controller in the Marvell
+          MMP processor.
+
 config FB_PXA
         tristate "PXA LCD framebuffer support"
         depends on FB && ARCH_PXA
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index d8d0be5151e3..01a819f47371 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -97,6 +97,7 @@ obj-$(CONFIG_FB_GBE)              += gbefb.o
 obj-$(CONFIG_FB_CIRRUS)           += cirrusfb.o
 obj-$(CONFIG_FB_ASILIANT)         += asiliantfb.o
 obj-$(CONFIG_FB_PXA)              += pxafb.o
+obj-$(CONFIG_FB_PXA168)           += pxa168fb.o
 obj-$(CONFIG_FB_W100)             += w100fb.o
 obj-$(CONFIG_FB_TMIO)             += tmiofb.o
 obj-$(CONFIG_FB_AU1100)           += au1100fb.o
diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c
index d1f80bac54f0..fb8163d181ab 100644
--- a/drivers/video/amba-clcd.c
+++ b/drivers/video/amba-clcd.c
@@ -351,7 +351,7 @@ static int clcdfb_register(struct clcd_fb *fb)
         }
 
         fb->fb.fix.mmio_start   = fb->dev->res.start;
-        fb->fb.fix.mmio_len     = 4096;
+        fb->fb.fix.mmio_len     = resource_size(&fb->dev->res);
 
         fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
         if (!fb->regs) {
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index 9894de1c9b9f..b7af5256e887 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -706,7 +706,7 @@ static void mx3fb_dma_done(void *arg)
         dev_dbg(mx3fb->dev, "irq %d callback\n", ichannel->eof_irq);
 
         /* We only need one interrupt, it will be re-enabled as needed */
-        disable_irq(ichannel->eof_irq);
+        disable_irq_nosync(ichannel->eof_irq);
 
         complete(&mx3_fbi->flip_cmpl);
 }
@@ -1366,7 +1366,7 @@ static int init_fb_chan(struct mx3fb_data *mx3fb, struct idmac_channel *ichan)
 
         mx3fb_blank(FB_BLANK_UNBLANK, fbi);
 
-        dev_info(dev, "mx3fb: fb registered, using mode %s\n", fb_mode);
+        dev_info(dev, "registered, using mode %s\n", fb_mode);
 
         ret = register_framebuffer(fbi);
         if (ret < 0)
diff --git a/drivers/video/omap/hwa742.c b/drivers/video/omap/hwa742.c
index 8aa6e47202b9..5d4f34887a22 100644
--- a/drivers/video/omap/hwa742.c
+++ b/drivers/video/omap/hwa742.c
@@ -133,8 +133,7 @@ struct {
         struct lcd_ctrl_extif   *extif;
         struct lcd_ctrl         *int_ctrl;
 
-        void                    (*power_up)(struct device *dev);
-        void                    (*power_down)(struct device *dev);
+        struct clk              *sys_ck;
 } hwa742;
 
 struct lcd_ctrl hwa742_ctrl;
@@ -915,14 +914,13 @@ static void hwa742_suspend(void)
         hwa742_set_update_mode(OMAPFB_UPDATE_DISABLED);
         /* Enable sleep mode */
         hwa742_write_reg(HWA742_POWER_SAVE, 1 << 1);
-        if (hwa742.power_down != NULL)
-                hwa742.power_down(hwa742.fbdev->dev);
+        clk_disable(hwa742.sys_ck);
 }
 
 static void hwa742_resume(void)
 {
-        if (hwa742.power_up != NULL)
-                hwa742.power_up(hwa742.fbdev->dev);
+        clk_enable(hwa742.sys_ck);
+
         /* Disable sleep mode */
         hwa742_write_reg(HWA742_POWER_SAVE, 0);
         while (1) {
@@ -955,14 +953,13 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode,
         omapfb_conf = fbdev->dev->platform_data;
         ctrl_conf = omapfb_conf->ctrl_platform_data;
 
-        if (ctrl_conf == NULL || ctrl_conf->get_clock_rate == NULL) {
+        if (ctrl_conf == NULL) {
                 dev_err(fbdev->dev, "HWA742: missing platform data\n");
                 r = -ENOENT;
                 goto err1;
         }
 
-        hwa742.power_down = ctrl_conf->power_down;
-        hwa742.power_up = ctrl_conf->power_up;
+        hwa742.sys_ck = clk_get(NULL, "hwa_sys_ck");
 
         spin_lock_init(&hwa742.req_lock);
 
@@ -972,12 +969,11 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode,
         if ((r = hwa742.extif->init(fbdev)) < 0)
                 goto err2;
 
-        ext_clk = ctrl_conf->get_clock_rate(fbdev->dev);
+        ext_clk = clk_get_rate(hwa742.sys_ck);
         if ((r = calc_extif_timings(ext_clk, &extif_mem_div)) < 0)
                 goto err3;
         hwa742.extif->set_timings(&hwa742.reg_timings);
-        if (hwa742.power_up != NULL)
-                hwa742.power_up(fbdev->dev);
+        clk_enable(hwa742.sys_ck);
 
         calc_hwa742_clk_rates(ext_clk, &sys_clk, &pix_clk);
         if ((r = calc_extif_timings(sys_clk, &extif_mem_div)) < 0)
@@ -1040,8 +1036,7 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode,
 
         return 0;
 err4:
-        if (hwa742.power_down != NULL)
-                hwa742.power_down(fbdev->dev);
+        clk_disable(hwa742.sys_ck);
 err3:
         hwa742.extif->cleanup();
 err2:
@@ -1055,8 +1050,7 @@ static void hwa742_cleanup(void)
         hwa742_set_update_mode(OMAPFB_UPDATE_DISABLED);
         hwa742.extif->cleanup();
         hwa742.int_ctrl->cleanup();
-        if (hwa742.power_down != NULL)
-                hwa742.power_down(hwa742.fbdev->dev);
+        clk_disable(hwa742.sys_ck);
 }
 
 struct lcd_ctrl hwa742_ctrl = {
diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
new file mode 100644
index 000000000000..84d8327e47db
--- /dev/null
+++ b/drivers/video/pxa168fb.c
@@ -0,0 +1,803 @@
+/*
+ * linux/drivers/video/pxa168fb.c -- Marvell PXA168 LCD Controller
+ *
+ *  Copyright (C) 2008 Marvell International Ltd.
+ *  All rights reserved.
+ *
+ *  2009-02-16  adapted from original version for PXA168/910
+ *              Jun Nie <njun@marvell.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/fb.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/uaccess.h>
+#include <video/pxa168fb.h>
+
+#include "pxa168fb.h"
+
+#define DEFAULT_REFRESH         60      /* Hz */
+
+static int determine_best_pix_fmt(struct fb_var_screeninfo *var)
+{
+        /*
+         * Pseudocolor mode?
+         */
+        if (var->bits_per_pixel == 8)
+                return PIX_FMT_PSEUDOCOLOR;
+
+        /*
+         * Check for 565/1555.
+         */
+        if (var->bits_per_pixel == 16 && var->red.length <= 5 &&
+            var->green.length <= 6 && var->blue.length <= 5) {
+                if (var->transp.length == 0) {
+                        if (var->red.offset >= var->blue.offset)
+                                return PIX_FMT_RGB565;
+                        else
+                                return PIX_FMT_BGR565;
+                }
+
+                if (var->transp.length == 1 && var->green.length <= 5) {
+                        if (var->red.offset >= var->blue.offset)
+                                return PIX_FMT_RGB1555;
+                        else
+                                return PIX_FMT_BGR1555;
+                }
+
+                /* fall through */
+        }
+
+        /*
+         * Check for 888/A888.
+         */
+        if (var->bits_per_pixel <= 32 && var->red.length <= 8 &&
+            var->green.length <= 8 && var->blue.length <= 8) {
+                if (var->bits_per_pixel == 24 && var->transp.length == 0) {
+                        if (var->red.offset >= var->blue.offset)
+                                return PIX_FMT_RGB888PACK;
+                        else
+                                return PIX_FMT_BGR888PACK;
+                }
+
+                if (var->bits_per_pixel == 32 && var->transp.length == 8) {
+                        if (var->red.offset >= var->blue.offset)
+                                return PIX_FMT_RGBA888;
+                        else
+                                return PIX_FMT_BGRA888;
+                } else {
+                        if (var->red.offset >= var->blue.offset)
+                                return PIX_FMT_RGB888UNPACK;
+                        else
+                                return PIX_FMT_BGR888UNPACK;
+                }
+
+                /* fall through */
+        }
+
+        return -EINVAL;
+}
+
+static void set_pix_fmt(struct fb_var_screeninfo *var, int pix_fmt)
+{
+        switch (pix_fmt) {
+        case PIX_FMT_RGB565:
+                var->bits_per_pixel = 16;
+                var->red.offset = 11;    var->red.length = 5;
+                var->green.offset = 5;   var->green.length = 6;
+                var->blue.offset = 0;    var->blue.length = 5;
+                var->transp.offset = 0;  var->transp.length = 0;
+                break;
+        case PIX_FMT_BGR565:
+                var->bits_per_pixel = 16;
+                var->red.offset = 0;     var->red.length = 5;
+                var->green.offset = 5;   var->green.length = 6;
+                var->blue.offset = 11;   var->blue.length = 5;
+                var->transp.offset = 0;  var->transp.length = 0;
+                break;
+        case PIX_FMT_RGB1555:
+                var->bits_per_pixel = 16;
+                var->red.offset = 10;    var->red.length = 5;
+                var->green.offset = 5;   var->green.length = 5;
+                var->blue.offset = 0;    var->blue.length = 5;
+                var->transp.offset = 15; var->transp.length = 1;
+                break;
+        case PIX_FMT_BGR1555:
+                var->bits_per_pixel = 16;
+                var->red.offset = 0;     var->red.length = 5;
+                var->green.offset = 5;   var->green.length = 5;
+                var->blue.offset = 10;   var->blue.length = 5;
+                var->transp.offset = 15; var->transp.length = 1;
+                break;
+        case PIX_FMT_RGB888PACK:
+                var->bits_per_pixel = 24;
+                var->red.offset = 16;    var->red.length = 8;
+                var->green.offset = 8;   var->green.length = 8;
+                var->blue.offset = 0;    var->blue.length = 8;
+                var->transp.offset = 0;  var->transp.length = 0;
+                break;
+        case PIX_FMT_BGR888PACK:
+                var->bits_per_pixel = 24;
+                var->red.offset = 0;     var->red.length = 8;
+                var->green.offset = 8;   var->green.length = 8;
+                var->blue.offset = 16;   var->blue.length = 8;
+                var->transp.offset = 0;  var->transp.length = 0;
+                break;
+        case PIX_FMT_RGBA888:
+                var->bits_per_pixel = 32;
+                var->red.offset = 16;    var->red.length = 8;
+                var->green.offset = 8;   var->green.length = 8;
+                var->blue.offset = 0;    var->blue.length = 8;
+                var->transp.offset = 24; var->transp.length = 8;
+                break;
+        case PIX_FMT_BGRA888:
+                var->bits_per_pixel = 32;
+                var->red.offset = 0;     var->red.length = 8;
+                var->green.offset = 8;   var->green.length = 8;
+                var->blue.offset = 16;   var->blue.length = 8;
+                var->transp.offset = 24; var->transp.length = 8;
+                break;
+        case PIX_FMT_PSEUDOCOLOR:
+                var->bits_per_pixel = 8;
+                var->red.offset = 0;     var->red.length = 8;
+                var->green.offset = 0;   var->green.length = 8;
+                var->blue.offset = 0;    var->blue.length = 8;
+                var->transp.offset = 0;  var->transp.length = 0;
+                break;
+        }
+}
+
+static void set_mode(struct pxa168fb_info *fbi, struct fb_var_screeninfo *var,
+                     struct fb_videomode *mode, int pix_fmt, int ystretch)
+{
+        struct fb_info *info = fbi->info;
+
+        set_pix_fmt(var, pix_fmt);
+
+        var->xres = mode->xres;
+        var->yres = mode->yres;
+        var->xres_virtual = max(var->xres, var->xres_virtual);
+        if (ystretch)
+                var->yres_virtual = info->fix.smem_len /
+                        (var->xres_virtual * (var->bits_per_pixel >> 3));
+        else
+                var->yres_virtual = max(var->yres, var->yres_virtual);
+        var->grayscale = 0;
+        var->accel_flags = FB_ACCEL_NONE;
+        var->pixclock = mode->pixclock;
+        var->left_margin = mode->left_margin;
+        var->right_margin = mode->right_margin;
+        var->upper_margin = mode->upper_margin;
+        var->lower_margin = mode->lower_margin;
+        var->hsync_len = mode->hsync_len;
+        var->vsync_len = mode->vsync_len;
+        var->sync = mode->sync;
+        var->vmode = FB_VMODE_NONINTERLACED;
+        var->rotate = FB_ROTATE_UR;
+}
+
+static int pxa168fb_check_var(struct fb_var_screeninfo *var,
+                              struct fb_info *info)
+{
+        struct pxa168fb_info *fbi = info->par;
+        int pix_fmt;
+
+        /*
+         * Determine which pixel format we're going to use.
+         */
+        pix_fmt = determine_best_pix_fmt(var);
+        if (pix_fmt < 0)
+                return pix_fmt;
+        set_pix_fmt(var, pix_fmt);
+        fbi->pix_fmt = pix_fmt;
+
+        /*
+         * Basic geometry sanity checks.
+         */
+        if (var->xoffset + var->xres > var->xres_virtual)
+                return -EINVAL;
+        if (var->yoffset + var->yres > var->yres_virtual)
+                return -EINVAL;
+        if (var->xres + var->right_margin +
+            var->hsync_len + var->left_margin > 2048)
+                return -EINVAL;
+        if (var->yres + var->lower_margin +
+            var->vsync_len + var->upper_margin > 2048)
+                return -EINVAL;
+
+        /*
+         * Check size of framebuffer.
+         */
+        if (var->xres_virtual * var->yres_virtual *
+            (var->bits_per_pixel >> 3) > info->fix.smem_len)
+                return -EINVAL;
+
+        return 0;
+}
+
+/*
+ * The hardware clock divider has an integer and a fractional
+ * stage:
+ *
+ *      clk2 = clk_in / integer_divider
+ *      clk_out = clk2 * (1 - (fractional_divider >> 12))
+ *
+ * Calculate integer and fractional divider for given clk_in
+ * and clk_out.
+ */
+static void set_clock_divider(struct pxa168fb_info *fbi,
+                              const struct fb_videomode *m)
+{
+        int divider_int;
+        int needed_pixclk;
+        u64 div_result;
+        u32 x = 0;
+
+        /*
+         * Notice: The field pixclock is used by linux fb
+         * is in pixel second. E.g. struct fb_videomode &
+         * struct fb_var_screeninfo
+         */
+
+        /*
+         * Check input values.
+         */
+        if (!m || !m->pixclock || !m->refresh) {
+                dev_err(fbi->dev, "Input refresh or pixclock is wrong.\n");
+                return;
+        }
+
+        /*
+         * Using PLL/AXI clock.
+         */
+        x = 0x80000000;
+
+        /*
+         * Calc divider according to refresh rate.
+         */
+        div_result = 1000000000000ll;
+        do_div(div_result, m->pixclock);
+        needed_pixclk = (u32)div_result;
+
+        divider_int = clk_get_rate(fbi->clk) / needed_pixclk;
+
+        /* check whether divisor is too small. */
+        if (divider_int < 2) {
+                dev_warn(fbi->dev, "Warning: clock source is too slow."
+                                "Try smaller resolution\n");
+                divider_int = 2;
+        }
+
+        /*
+         * Set setting to reg.
+         */
+        x |= divider_int;
+        writel(x, fbi->reg_base + LCD_CFG_SCLK_DIV);
+}
+
+static void set_dma_control0(struct pxa168fb_info *fbi)
+{
+        u32 x;
+
+        /*
+         * Set bit to enable graphics DMA.
+         */
+        x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0);
+        x |= fbi->active ? 0x00000100 : 0;
+        fbi->active = 0;
+
+        /*
+         * If we are in a pseudo-color mode, we need to enable
+         * palette lookup.
+         */
+        if (fbi->pix_fmt == PIX_FMT_PSEUDOCOLOR)
+                x |= 0x10000000;
+
+        /*
+         * Configure hardware pixel format.
+         */
+        x &= ~(0xF << 16);
+        x |= (fbi->pix_fmt >> 1) << 16;
+
+        /*
+         * Check red and blue pixel swap.
+         * 1. source data swap
+         * 2. panel output data swap
+         */
+        x &= ~(1 << 12);
+        x |= ((fbi->pix_fmt & 1) ^ (fbi->panel_rbswap)) << 12;
+
+        writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL0);
+}
+
+static void set_dma_control1(struct pxa168fb_info *fbi, int sync)
+{
+        u32 x;
+
+        /*
+         * Configure default bits: vsync triggers DMA, gated clock
+         * enable, power save enable, configure alpha registers to
+         * display 100% graphics, and set pixel command.
+         */
+        x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL1);
+        x |= 0x2032ff81;
+
+        /*
+         * We trigger DMA on the falling edge of vsync if vsync is
+         * active low, or on the rising edge if vsync is active high.
+         */
+        if (!(sync & FB_SYNC_VERT_HIGH_ACT))
+                x |= 0x08000000;
+
+        writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL1);
+}
+
+static void set_graphics_start(struct fb_info *info, int xoffset, int yoffset)
+{
+        struct pxa168fb_info *fbi = info->par;
+        struct fb_var_screeninfo *var = &info->var;
+        int pixel_offset;
+        unsigned long addr;
+
+        pixel_offset = (yoffset * var->xres_virtual) + xoffset;
+
+        addr = fbi->fb_start_dma + (pixel_offset * (var->bits_per_pixel >> 3));
+        writel(addr, fbi->reg_base + LCD_CFG_GRA_START_ADDR0);
+}
+
+static void set_dumb_panel_control(struct fb_info *info)
+{
+        struct pxa168fb_info *fbi = info->par;
+        struct pxa168fb_mach_info *mi = fbi->dev->platform_data;
+        u32 x;
+
+        /*
+         * Preserve enable flag.
+         */
+        x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL) & 0x00000001;
+
+        x |= (fbi->is_blanked ? 0x7 : mi->dumb_mode) << 28;
+        x |= mi->gpio_output_data << 20;
+        x |= mi->gpio_output_mask << 12;
+        x |= mi->panel_rgb_reverse_lanes ? 0x00000080 : 0;
+        x |= mi->invert_composite_blank ? 0x00000040 : 0;
+        x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
+        x |= mi->invert_pix_val_ena ? 0x00000010 : 0;
+        x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
+        x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
+        x |= mi->invert_pixclock ? 0x00000002 : 0;
+
+        writel(x, fbi->reg_base + LCD_SPU_DUMB_CTRL);
+}
+
+static void set_dumb_screen_dimensions(struct fb_info *info)
+{
+        struct pxa168fb_info *fbi = info->par;
+        struct fb_var_screeninfo *v = &info->var;
+        int x;
+        int y;
+
+        x = v->xres + v->right_margin + v->hsync_len + v->left_margin;
+        y = v->yres + v->lower_margin + v->vsync_len + v->upper_margin;
+
+        writel((y << 16) | x, fbi->reg_base + LCD_SPUT_V_H_TOTAL);
+}
+
+static int pxa168fb_set_par(struct fb_info *info)
+{
+        struct pxa168fb_info *fbi = info->par;
+        struct fb_var_screeninfo *var = &info->var;
+        struct fb_videomode mode;
+        u32 x;
+        struct pxa168fb_mach_info *mi;
+
+        mi = fbi->dev->platform_data;
+
+        /*
+         * Set additional mode info.
+         */
+        if (fbi->pix_fmt == PIX_FMT_PSEUDOCOLOR)
+                info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
+        else
+                info->fix.visual = FB_VISUAL_TRUECOLOR;
+        info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
+        info->fix.ypanstep = var->yres;
+
+        /*
+         * Disable panel output while we setup the display.
+         */
+        x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL);
+        writel(x & ~1, fbi->reg_base + LCD_SPU_DUMB_CTRL);
+
+        /*
+         * Configure global panel parameters.
+         */
+        writel((var->yres << 16) | var->xres,
+                fbi->reg_base + LCD_SPU_V_H_ACTIVE);
+
+        /*
+         * convet var to video mode
+         */
+        fb_var_to_videomode(&mode, &info->var);
+
+        /* Calculate clock divisor. */
+        set_clock_divider(fbi, &mode);
+
+        /* Configure dma ctrl regs. */
+        set_dma_control0(fbi);
+        set_dma_control1(fbi, info->var.sync);
+
+        /*
+         * Configure graphics DMA parameters.
+         */
+        x = readl(fbi->reg_base + LCD_CFG_GRA_PITCH);
+        x = (x & ~0xFFFF) | ((var->xres_virtual * var->bits_per_pixel) >> 3);
+        writel(x, fbi->reg_base + LCD_CFG_GRA_PITCH);
+        writel((var->yres << 16) | var->xres,
+                fbi->reg_base + LCD_SPU_GRA_HPXL_VLN);
+        writel((var->yres << 16) | var->xres,
+                fbi->reg_base + LCD_SPU_GZM_HPXL_VLN);
+
+        /*
+         * Configure dumb panel ctrl regs & timings.
+         */
+        set_dumb_panel_control(info);
+        set_dumb_screen_dimensions(info);
+
+        writel((var->left_margin << 16) | var->right_margin,
+                        fbi->reg_base + LCD_SPU_H_PORCH);
+        writel((var->upper_margin << 16) | var->lower_margin,
+                        fbi->reg_base + LCD_SPU_V_PORCH);
+
+        /*
+         * Re-enable panel output.
+         */
+        x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL);
+        writel(x | 1, fbi->reg_base + LCD_SPU_DUMB_CTRL);
+
+        return 0;
+}
+
+static unsigned int chan_to_field(unsigned int chan, struct fb_bitfield *bf)
+{
+        return ((chan & 0xffff) >> (16 - bf->length)) << bf->offset;
+}
+
+static u32 to_rgb(u16 red, u16 green, u16 blue)
+{
+        red >>= 8;
+        green >>= 8;
+        blue >>= 8;
+
+        return (red << 16) | (green << 8) | blue;
+}
+
+static int
+pxa168fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
+                 unsigned int blue, unsigned int trans, struct fb_info *info)
+{
+        struct pxa168fb_info *fbi = info->par;
+        u32 val;
+
+        if (info->var.grayscale)
+                red = green = blue = (19595 * red + 38470 * green +
+                                        7471 * blue) >> 16;
+
+        if (info->fix.visual == FB_VISUAL_TRUECOLOR && regno < 16) {
+                val =  chan_to_field(red,   &info->var.red);
+                val |= chan_to_field(green, &info->var.green);
+                val |= chan_to_field(blue , &info->var.blue);
+                fbi->pseudo_palette[regno] = val;
+        }
+
+        if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
+                val = to_rgb(red, green, blue);
+                writel(val, fbi->reg_base + LCD_SPU_SRAM_WRDAT);
+                writel(0x8300 | regno, fbi->reg_base + LCD_SPU_SRAM_CTRL);
+        }
+
+        return 0;
+}
+
+static int pxa168fb_blank(int blank, struct fb_info *info)
+{
+        struct pxa168fb_info *fbi = info->par;
+
+        fbi->is_blanked = (blank == FB_BLANK_UNBLANK) ? 0 : 1;
+        set_dumb_panel_control(info);
+
+        return 0;
+}
+
+static int pxa168fb_pan_display(struct fb_var_screeninfo *var,
+                                struct fb_info *info)
+{
+        set_graphics_start(info, var->xoffset, var->yoffset);
+
+        return 0;
+}
+
+static irqreturn_t pxa168fb_handle_irq(int irq, void *dev_id)
+{
+        struct pxa168fb_info *fbi = dev_id;
+        u32 isr = readl(fbi->reg_base + SPU_IRQ_ISR);
+
+        if ((isr & GRA_FRAME_IRQ0_ENA_MASK)) {
+
+                writel(isr & (~GRA_FRAME_IRQ0_ENA_MASK),
+                        fbi->reg_base + SPU_IRQ_ISR);
+
+                return IRQ_HANDLED;
+        }
+        return IRQ_NONE;
+}
+
+static struct fb_ops pxa168fb_ops = {
+        .owner          = THIS_MODULE,
+        .fb_check_var   = pxa168fb_check_var,
+        .fb_set_par     = pxa168fb_set_par,
+        .fb_setcolreg   = pxa168fb_setcolreg,
+        .fb_blank       = pxa168fb_blank,
+        .fb_pan_display = pxa168fb_pan_display,
+        .fb_fillrect    = cfb_fillrect,
+        .fb_copyarea    = cfb_copyarea,
+        .fb_imageblit   = cfb_imageblit,
+};
+
+static int __init pxa168fb_init_mode(struct fb_info *info,
+                              struct pxa168fb_mach_info *mi)
+{
+        struct pxa168fb_info *fbi = info->par;
+        struct fb_var_screeninfo *var = &info->var;
+        int ret = 0;
+        u32 total_w, total_h, refresh;
+        u64 div_result;
+        const struct fb_videomode *m;
+
+        /*
+         * Set default value
+         */
+        refresh = DEFAULT_REFRESH;
+
+        /* try to find best video mode. */
+        m = fb_find_best_mode(&info->var, &info->modelist);
+        if (m)
+                fb_videomode_to_var(&info->var, m);
+
+        /* Init settings. */
+        var->xres_virtual = var->xres;
+        var->yres_virtual = info->fix.smem_len /
+                (var->xres_virtual * (var->bits_per_pixel >> 3));
+        dev_dbg(fbi->dev, "pxa168fb: find best mode: res = %dx%d\n",
+                                var->xres, var->yres);
+
+        /* correct pixclock. */
+        total_w = var->xres + var->left_margin + var->right_margin +
+                  var->hsync_len;
+        total_h = var->yres + var->upper_margin + var->lower_margin +
+                  var->vsync_len;
+
+        div_result = 1000000000000ll;
+        do_div(div_result, total_w * total_h * refresh);
+        var->pixclock = (u32)div_result;
+
+        return ret;
+}
+
+static int __init pxa168fb_probe(struct platform_device *pdev)
+{
+        struct pxa168fb_mach_info *mi;
+        struct fb_info *info = 0;
+        struct pxa168fb_info *fbi = 0;
+        struct resource *res;
+        struct clk *clk;
+        int irq, ret;
+
+        mi = pdev->dev.platform_data;
+        if (mi == NULL) {
+                dev_err(&pdev->dev, "no platform data defined\n");
+                return -EINVAL;
+        }
+
+        clk = clk_get(&pdev->dev, "LCDCLK");
+        if (IS_ERR(clk)) {
+                dev_err(&pdev->dev, "unable to get LCDCLK");
+                return PTR_ERR(clk);
+        }
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (res == NULL) {
+                dev_err(&pdev->dev, "no IO memory defined\n");
+                return -ENOENT;
+        }
+
+        irq = platform_get_irq(pdev, 0);
+        if (irq < 0) {
+                dev_err(&pdev->dev, "no IRQ defined\n");
+                return -ENOENT;
+        }
+
+        info = framebuffer_alloc(sizeof(struct pxa168fb_info), &pdev->dev);
+        if (info == NULL) {
+                clk_put(clk);
+                return -ENOMEM;
+        }
+
+        /* Initialize private data */
+        fbi = info->par;
+        fbi->info = info;
+        fbi->clk = clk;
+        fbi->dev = info->dev = &pdev->dev;
+        fbi->panel_rbswap = mi->panel_rbswap;
+        fbi->is_blanked = 0;
+        fbi->active = mi->active;
+
+        /*
+         * Initialise static fb parameters.
+         */
+        info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK |
+                      FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
+        info->node = -1;
+        strlcpy(info->fix.id, mi->id, 16);
+        info->fix.type = FB_TYPE_PACKED_PIXELS;
+        info->fix.type_aux = 0;
+        info->fix.xpanstep = 0;
+        info->fix.ypanstep = 0;
+        info->fix.ywrapstep = 0;
+        info->fix.mmio_start = res->start;
+        info->fix.mmio_len = res->end - res->start + 1;
+        info->fix.accel = FB_ACCEL_NONE;
+        info->fbops = &pxa168fb_ops;
+        info->pseudo_palette = fbi->pseudo_palette;
+
+        /*
+         * Map LCD controller registers.
+         */
+        fbi->reg_base = ioremap_nocache(res->start, res->end - res->start);
+        if (fbi->reg_base == NULL) {
+                ret = -ENOMEM;
+                goto failed;
+        }
+
+        /*
+         * Allocate framebuffer memory.
+         */
+        info->fix.smem_len = PAGE_ALIGN(DEFAULT_FB_SIZE);
+
+        info->screen_base = dma_alloc_writecombine(fbi->dev, info->fix.smem_len,
+                                                &fbi->fb_start_dma, GFP_KERNEL);
+        if (info->screen_base == NULL) {
+                ret = -ENOMEM;
+                goto failed;
+        }
+
+        info->fix.smem_start = (unsigned long)fbi->fb_start_dma;
+
+        /*
+         * Set video mode according to platform data.
+         */
+        set_mode(fbi, &info->var, mi->modes, mi->pix_fmt, 1);
+
+        fb_videomode_to_modelist(mi->modes, mi->num_modes, &info->modelist);
+
+        /*
+         * init video mode data.
+         */
+        pxa168fb_init_mode(info, mi);
+
+        ret = pxa168fb_check_var(&info->var, info);
+        if (ret)
+                goto failed_free_fbmem;
+
+        /*
+         * Fill in sane defaults.
+         */
+        ret = pxa168fb_check_var(&info->var, info);
+        if (ret)
+                goto failed;
+
+        /*
+         * enable controller clock
+         */
+        clk_enable(fbi->clk);
+
+        pxa168fb_set_par(info);
+
+        /*
+         * Configure default register values.
+         */
+        writel(0, fbi->reg_base + LCD_SPU_BLANKCOLOR);
+        writel(mi->io_pin_allocation_mode, fbi->reg_base + SPU_IOPAD_CONTROL);
+        writel(0, fbi->reg_base + LCD_CFG_GRA_START_ADDR1);
+        writel(0, fbi->reg_base + LCD_SPU_GRA_OVSA_HPXL_VLN);
+        writel(0, fbi->reg_base + LCD_SPU_SRAM_PARA0);
+        writel(CFG_CSB_256x32(0x1)|CFG_CSB_256x24(0x1)|CFG_CSB_256x8(0x1),
+                fbi->reg_base + LCD_SPU_SRAM_PARA1);
+
+        /*
+         * Allocate color map.
+         */
+        if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
+                ret = -ENOMEM;
+                goto failed_free_clk;
+        }
+
+        /*
+         * Register irq handler.
+         */
+        ret = request_irq(irq, pxa168fb_handle_irq, IRQF_SHARED,
+                                        info->fix.id, fbi);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "unable to request IRQ\n");
+                ret = -ENXIO;
+                goto failed_free_cmap;
+        }
+
+        /*
+         * Enable GFX interrupt
+         */
+        writel(GRA_FRAME_IRQ0_ENA(0x1), fbi->reg_base + SPU_IRQ_ENA);
+
+        /*
+         * Register framebuffer.
+         */
+        ret = register_framebuffer(info);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to register pxa168-fb: %d\n", ret);
+                ret = -ENXIO;
+                goto failed_free_irq;
+        }
+
+        platform_set_drvdata(pdev, fbi);
+        return 0;
+
+failed_free_irq:
+        free_irq(irq, fbi);
+failed_free_cmap:
+        fb_dealloc_cmap(&info->cmap);
+failed_free_clk:
+        clk_disable(fbi->clk);
+failed_free_fbmem:
+        dma_free_coherent(fbi->dev, info->fix.smem_len,
+                        info->screen_base, fbi->fb_start_dma);
+failed:
+        kfree(info);
+        clk_put(clk);
+
+        dev_err(&pdev->dev, "frame buffer device init failed with %d\n", ret);
+        return ret;
+}
+
+static struct platform_driver pxa168fb_driver = {
+        .driver         = {
+                .name   = "pxa168-fb",
+                .owner  = THIS_MODULE,
+        },
+        .probe          = pxa168fb_probe,
+};
+
+static int __devinit pxa168fb_init(void)
+{
+        return platform_driver_register(&pxa168fb_driver);
+}
+module_init(pxa168fb_init);
+
+MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com> "
+              "Green Wan <gwan@marvell.com>");
+MODULE_DESCRIPTION("Framebuffer driver for PXA168/910");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/pxa168fb.h b/drivers/video/pxa168fb.h
new file mode 100644
index 000000000000..eee09279c524
--- /dev/null
+++ b/drivers/video/pxa168fb.h
@@ -0,0 +1,558 @@
+#ifndef __PXA168FB_H__
+#define __PXA168FB_H__
+
+/* ------------< LCD register >------------ */
+/* Video Frame 0&1 start address registers */
+#define LCD_SPU_DMA_START_ADDR_Y0               0x00C0
+#define LCD_SPU_DMA_START_ADDR_U0               0x00C4
+#define LCD_SPU_DMA_START_ADDR_V0               0x00C8
+#define LCD_CFG_DMA_START_ADDR_0                0x00CC /* Cmd address */
+#define LCD_SPU_DMA_START_ADDR_Y1               0x00D0
+#define LCD_SPU_DMA_START_ADDR_U1               0x00D4
+#define LCD_SPU_DMA_START_ADDR_V1               0x00D8
+#define LCD_CFG_DMA_START_ADDR_1                0x00DC /* Cmd address */
+
+/* YC & UV Pitch */
+#define LCD_SPU_DMA_PITCH_YC                    0x00E0
+#define     SPU_DMA_PITCH_C(c)                  ((c) << 16)
+#define     SPU_DMA_PITCH_Y(y)                  (y)
+#define LCD_SPU_DMA_PITCH_UV                    0x00E4
+#define     SPU_DMA_PITCH_V(v)                  ((v) << 16)
+#define     SPU_DMA_PITCH_U(u)                  (u)
+
+/* Video Starting Point on Screen Register */
+#define LCD_SPUT_DMA_OVSA_HPXL_VLN              0x00E8
+#define     CFG_DMA_OVSA_VLN(y)                 ((y) << 16) /* 0~0xfff */
+#define     CFG_DMA_OVSA_HPXL(x)                (x)     /* 0~0xfff */
+
+/* Video Size Register */
+#define LCD_SPU_DMA_HPXL_VLN                    0x00EC
+#define     CFG_DMA_VLN(y)                      ((y) << 16)
+#define     CFG_DMA_HPXL(x)                     (x)
+
+/* Video Size After zooming Register */
+#define LCD_SPU_DZM_HPXL_VLN                    0x00F0
+#define     CFG_DZM_VLN(y)                      ((y) << 16)
+#define     CFG_DZM_HPXL(x)                     (x)
+
+/* Graphic Frame 0&1 Starting Address Register */
+#define LCD_CFG_GRA_START_ADDR0                 0x00F4
+#define LCD_CFG_GRA_START_ADDR1                 0x00F8
+
+/* Graphic Frame Pitch */
+#define LCD_CFG_GRA_PITCH                       0x00FC
+
+/* Graphic Starting Point on Screen Register */
+#define LCD_SPU_GRA_OVSA_HPXL_VLN               0x0100
+#define     CFG_GRA_OVSA_VLN(y)                 ((y) << 16)
+#define     CFG_GRA_OVSA_HPXL(x)                (x)
+
+/* Graphic Size Register */
+#define LCD_SPU_GRA_HPXL_VLN                    0x0104
+#define     CFG_GRA_VLN(y)                      ((y) << 16)
+#define     CFG_GRA_HPXL(x)                     (x)
+
+/* Graphic Size after Zooming Register */
+#define LCD_SPU_GZM_HPXL_VLN                    0x0108
+#define     CFG_GZM_VLN(y)                      ((y) << 16)
+#define     CFG_GZM_HPXL(x)                     (x)
+
+/* HW Cursor Starting Point on Screen Register */
+#define LCD_SPU_HWC_OVSA_HPXL_VLN               0x010C
+#define     CFG_HWC_OVSA_VLN(y)                 ((y) << 16)
+#define     CFG_HWC_OVSA_HPXL(x)                (x)
+
+/* HW Cursor Size */
+#define LCD_SPU_HWC_HPXL_VLN                    0x0110
+#define     CFG_HWC_VLN(y)                      ((y) << 16)
+#define     CFG_HWC_HPXL(x)                     (x)
+
+/* Total Screen Size Register */
+#define LCD_SPUT_V_H_TOTAL                      0x0114
+#define     CFG_V_TOTAL(y)                      ((y) << 16)
+#define     CFG_H_TOTAL(x)                      (x)
+
+/* Total Screen Active Size Register */
+#define LCD_SPU_V_H_ACTIVE                      0x0118
+#define     CFG_V_ACTIVE(y)                     ((y) << 16)
+#define     CFG_H_ACTIVE(x)                     (x)
+
+/* Screen H&V Porch Register */
+#define LCD_SPU_H_PORCH                         0x011C
+#define     CFG_H_BACK_PORCH(b)                 ((b) << 16)
+#define     CFG_H_FRONT_PORCH(f)                (f)
+#define LCD_SPU_V_PORCH                         0x0120
+#define     CFG_V_BACK_PORCH(b)                 ((b) << 16)
+#define     CFG_V_FRONT_PORCH(f)                (f)
+
+/* Screen Blank Color Register */
+#define LCD_SPU_BLANKCOLOR                      0x0124
+#define     CFG_BLANKCOLOR_MASK                 0x00FFFFFF
+#define     CFG_BLANKCOLOR_R_MASK               0x000000FF
+#define     CFG_BLANKCOLOR_G_MASK               0x0000FF00
+#define     CFG_BLANKCOLOR_B_MASK               0x00FF0000
+
+/* HW Cursor Color 1&2 Register */
+#define LCD_SPU_ALPHA_COLOR1                    0x0128
+#define     CFG_HWC_COLOR1                      0x00FFFFFF
+#define     CFG_HWC_COLOR1_R(red)               ((red) << 16)
+#define     CFG_HWC_COLOR1_G(green)             ((green) << 8)
+#define     CFG_HWC_COLOR1_B(blue)              (blue)
+#define     CFG_HWC_COLOR1_R_MASK               0x000000FF
+#define     CFG_HWC_COLOR1_G_MASK               0x0000FF00
+#define     CFG_HWC_COLOR1_B_MASK               0x00FF0000
+#define LCD_SPU_ALPHA_COLOR2                    0x012C
+#define     CFG_HWC_COLOR2                      0x00FFFFFF
+#define     CFG_HWC_COLOR2_R_MASK               0x000000FF
+#define     CFG_HWC_COLOR2_G_MASK               0x0000FF00
+#define     CFG_HWC_COLOR2_B_MASK               0x00FF0000
+
+/* Video YUV Color Key Control */
+#define LCD_SPU_COLORKEY_Y                      0x0130
+#define     CFG_CKEY_Y2(y2)                     ((y2) << 24)
+#define     CFG_CKEY_Y2_MASK                    0xFF000000
+#define     CFG_CKEY_Y1(y1)                     ((y1) << 16)
+#define     CFG_CKEY_Y1_MASK                    0x00FF0000
+#define     CFG_CKEY_Y(y)                       ((y) << 8)
+#define     CFG_CKEY_Y_MASK                     0x0000FF00
+#define     CFG_ALPHA_Y(y)                      (y)
+#define     CFG_ALPHA_Y_MASK                    0x000000FF
+#define LCD_SPU_COLORKEY_U                      0x0134
+#define     CFG_CKEY_U2(u2)                     ((u2) << 24)
+#define     CFG_CKEY_U2_MASK                    0xFF000000
+#define     CFG_CKEY_U1(u1)                     ((u1) << 16)
+#define     CFG_CKEY_U1_MASK                    0x00FF0000
+#define     CFG_CKEY_U(u)                       ((u) << 8)
+#define     CFG_CKEY_U_MASK                     0x0000FF00
+#define     CFG_ALPHA_U(u)                      (u)
+#define     CFG_ALPHA_U_MASK                    0x000000FF
+#define LCD_SPU_COLORKEY_V                      0x0138
+#define     CFG_CKEY_V2(v2)                     ((v2) << 24)
+#define     CFG_CKEY_V2_MASK                    0xFF000000
+#define     CFG_CKEY_V1(v1)                     ((v1) << 16)
+#define     CFG_CKEY_V1_MASK                    0x00FF0000
+#define     CFG_CKEY_V(v)                       ((v) << 8)
+#define     CFG_CKEY_V_MASK                     0x0000FF00
+#define     CFG_ALPHA_V(v)                      (v)
+#define     CFG_ALPHA_V_MASK                    0x000000FF
+
+/* SPI Read Data Register */
+#define LCD_SPU_SPI_RXDATA                      0x0140
+
+/* Smart Panel Read Data Register */
+#define LCD_SPU_ISA_RSDATA                      0x0144
+#define     ISA_RXDATA_16BIT_1_DATA_MASK        0x000000FF
+#define     ISA_RXDATA_16BIT_2_DATA_MASK        0x0000FF00
+#define     ISA_RXDATA_16BIT_3_DATA_MASK        0x00FF0000
+#define     ISA_RXDATA_16BIT_4_DATA_MASK        0xFF000000
+#define     ISA_RXDATA_32BIT_1_DATA_MASK        0x00FFFFFF
+
+/* HWC SRAM Read Data Register */
+#define LCD_SPU_HWC_RDDAT                       0x0158
+
+/* Gamma Table SRAM Read Data Register */
+#define LCD_SPU_GAMMA_RDDAT                     0x015c
+#define     CFG_GAMMA_RDDAT_MASK                0x000000FF
+
+/* Palette Table SRAM Read Data Register */
+#define LCD_SPU_PALETTE_RDDAT                   0x0160
+#define     CFG_PALETTE_RDDAT_MASK              0x00FFFFFF
+
+/* I/O Pads Input Read Only Register */
+#define LCD_SPU_IOPAD_IN                        0x0178
+#define     CFG_IOPAD_IN_MASK                   0x0FFFFFFF
+
+/* Reserved Read Only Registers */
+#define LCD_CFG_RDREG5F                         0x017C
+#define     IRE_FRAME_CNT_MASK                  0x000000C0
+#define     IPE_FRAME_CNT_MASK                  0x00000030
+#define     GRA_FRAME_CNT_MASK                  0x0000000C  /* Graphic */
+#define     DMA_FRAME_CNT_MASK                  0x00000003  /* Video */
+
+/* SPI Control Register. */
+#define LCD_SPU_SPI_CTRL                        0x0180
+#define     CFG_SCLKCNT(div)                    ((div) << 24)  /* 0xFF~0x2 */
+#define     CFG_SCLKCNT_MASK                    0xFF000000
+#define     CFG_RXBITS(rx)                      ((rx) << 16)   /* 0x1F~0x1 */
+#define     CFG_RXBITS_MASK                     0x00FF0000
+#define     CFG_TXBITS(tx)                      ((tx) << 8)    /* 0x1F~0x1 */
+#define     CFG_TXBITS_MASK                     0x0000FF00
+#define     CFG_CLKINV(clk)                     ((clk) << 7)
+#define     CFG_CLKINV_MASK                     0x00000080
+#define     CFG_KEEPXFER(transfer)              ((transfer) << 6)
+#define     CFG_KEEPXFER_MASK                   0x00000040
+#define     CFG_RXBITSTO0(rx)                   ((rx) << 5)
+#define     CFG_RXBITSTO0_MASK                  0x00000020
+#define     CFG_TXBITSTO0(tx)                   ((tx) << 4)
+#define     CFG_TXBITSTO0_MASK                  0x00000010
+#define     CFG_SPI_ENA(spi)                    ((spi) << 3)
+#define     CFG_SPI_ENA_MASK                    0x00000008
+#define     CFG_SPI_SEL(spi)                    ((spi) << 2)
+#define     CFG_SPI_SEL_MASK                    0x00000004
+#define     CFG_SPI_3W4WB(wire)                 ((wire) << 1)
+#define     CFG_SPI_3W4WB_MASK                  0x00000002
+#define     CFG_SPI_START(start)                (start)
+#define     CFG_SPI_START_MASK                  0x00000001
+
+/* SPI Tx Data Register */
+#define LCD_SPU_SPI_TXDATA                      0x0184
+
+/*
+   1. Smart Pannel 8-bit Bus Control Register.
+   2. AHB Slave Path Data Port Register
+*/
+#define LCD_SPU_SMPN_CTRL                       0x0188
+
+/* DMA Control 0 Register */
+#define LCD_SPU_DMA_CTRL0                       0x0190
+#define     CFG_NOBLENDING(nb)                  ((nb) << 31)
+#define     CFG_NOBLENDING_MASK                 0x80000000
+#define     CFG_GAMMA_ENA(gn)                   ((gn) << 30)
+#define     CFG_GAMMA_ENA_MASK                  0x40000000
+#define     CFG_CBSH_ENA(cn)                    ((cn) << 29)
+#define     CFG_CBSH_ENA_MASK                   0x20000000
+#define     CFG_PALETTE_ENA(pn)                 ((pn) << 28)
+#define     CFG_PALETTE_ENA_MASK                0x10000000
+#define     CFG_ARBFAST_ENA(an)                 ((an) << 27)
+#define     CFG_ARBFAST_ENA_MASK                0x08000000
+#define     CFG_HWC_1BITMOD(mode)               ((mode) << 26)
+#define     CFG_HWC_1BITMOD_MASK                0x04000000
+#define     CFG_HWC_1BITENA(mn)                 ((mn) << 25)
+#define     CFG_HWC_1BITENA_MASK                0x02000000
+#define     CFG_HWC_ENA(cn)                     ((cn) << 24)
+#define     CFG_HWC_ENA_MASK                    0x01000000
+#define     CFG_DMAFORMAT(dmaformat)            ((dmaformat) << 20)
+#define     CFG_DMAFORMAT_MASK                  0x00F00000
+#define     CFG_GRAFORMAT(graformat)            ((graformat) << 16)
+#define     CFG_GRAFORMAT_MASK                  0x000F0000
+/* for graphic part */
+#define     CFG_GRA_FTOGGLE(toggle)             ((toggle) << 15)
+#define     CFG_GRA_FTOGGLE_MASK                0x00008000
+#define     CFG_GRA_HSMOOTH(smooth)             ((smooth) << 14)
+#define     CFG_GRA_HSMOOTH_MASK                0x00004000
+#define     CFG_GRA_TSTMODE(test)               ((test) << 13)
+#define     CFG_GRA_TSTMODE_MASK                0x00002000
+#define     CFG_GRA_SWAPRB(swap)                ((swap) << 12)
+#define     CFG_GRA_SWAPRB_MASK                 0x00001000
+#define     CFG_GRA_SWAPUV(swap)                ((swap) << 11)
+#define     CFG_GRA_SWAPUV_MASK                 0x00000800
+#define     CFG_GRA_SWAPYU(swap)                ((swap) << 10)
+#define     CFG_GRA_SWAPYU_MASK                 0x00000400
+#define     CFG_YUV2RGB_GRA(cvrt)               ((cvrt) << 9)
+#define     CFG_YUV2RGB_GRA_MASK                0x00000200
+#define     CFG_GRA_ENA(gra)                    ((gra) << 8)
+#define     CFG_GRA_ENA_MASK                    0x00000100
+/* for video part */
+#define     CFG_DMA_FTOGGLE(toggle)             ((toggle) << 7)
+#define     CFG_DMA_FTOGGLE_MASK                0x00000080
+#define     CFG_DMA_HSMOOTH(smooth)             ((smooth) << 6)
+#define     CFG_DMA_HSMOOTH_MASK                0x00000040
+#define     CFG_DMA_TSTMODE(test)               ((test) << 5)
+#define     CFG_DMA_TSTMODE_MASK                0x00000020
+#define     CFG_DMA_SWAPRB(swap)                ((swap) << 4)
+#define     CFG_DMA_SWAPRB_MASK                 0x00000010
+#define     CFG_DMA_SWAPUV(swap)                ((swap) << 3)
+#define     CFG_DMA_SWAPUV_MASK                 0x00000008
+#define     CFG_DMA_SWAPYU(swap)                ((swap) << 2)
+#define     CFG_DMA_SWAPYU_MASK                 0x00000004
+#define     CFG_DMA_SWAP_MASK                   0x0000001C
+#define     CFG_YUV2RGB_DMA(cvrt)               ((cvrt) << 1)
+#define     CFG_YUV2RGB_DMA_MASK                0x00000002
+#define     CFG_DMA_ENA(video)                  (video)
+#define     CFG_DMA_ENA_MASK                    0x00000001
+
+/* DMA Control 1 Register */
+#define LCD_SPU_DMA_CTRL1                       0x0194
+#define     CFG_FRAME_TRIG(trig)                ((trig) << 31)
+#define     CFG_FRAME_TRIG_MASK                 0x80000000
+#define     CFG_VSYNC_TRIG(trig)                ((trig) << 28)
+#define     CFG_VSYNC_TRIG_MASK                 0x70000000
+#define     CFG_VSYNC_INV(inv)                  ((inv) << 27)
+#define     CFG_VSYNC_INV_MASK                  0x08000000
+#define     CFG_COLOR_KEY_MODE(cmode)           ((cmode) << 24)
+#define     CFG_COLOR_KEY_MASK                  0x07000000
+#define     CFG_CARRY(carry)                    ((carry) << 23)
+#define     CFG_CARRY_MASK                      0x00800000
+#define     CFG_LNBUF_ENA(lnbuf)                ((lnbuf) << 22)
+#define     CFG_LNBUF_ENA_MASK                  0x00400000
+#define     CFG_GATED_ENA(gated)                ((gated) << 21)
+#define     CFG_GATED_ENA_MASK                  0x00200000
+#define     CFG_PWRDN_ENA(power)                ((power) << 20)
+#define     CFG_PWRDN_ENA_MASK                  0x00100000
+#define     CFG_DSCALE(dscale)                  ((dscale) << 18)
+#define     CFG_DSCALE_MASK                     0x000C0000
+#define     CFG_ALPHA_MODE(amode)               ((amode) << 16)
+#define     CFG_ALPHA_MODE_MASK                 0x00030000
+#define     CFG_ALPHA(alpha)                    ((alpha) << 8)
+#define     CFG_ALPHA_MASK                      0x0000FF00
+#define     CFG_PXLCMD(pxlcmd)                  (pxlcmd)
+#define     CFG_PXLCMD_MASK                     0x000000FF
+
+/* SRAM Control Register */
+#define LCD_SPU_SRAM_CTRL                       0x0198
+#define     CFG_SRAM_INIT_WR_RD(mode)           ((mode) << 14)
+#define     CFG_SRAM_INIT_WR_RD_MASK            0x0000C000
+#define     CFG_SRAM_ADDR_LCDID(id)             ((id) << 8)
+#define     CFG_SRAM_ADDR_LCDID_MASK            0x00000F00
+#define     CFG_SRAM_ADDR(addr)                 (addr)
+#define     CFG_SRAM_ADDR_MASK                  0x000000FF
+
+/* SRAM Write Data Register */
+#define LCD_SPU_SRAM_WRDAT                      0x019C
+
+/* SRAM RTC/WTC Control Register */
+#define LCD_SPU_SRAM_PARA0                      0x01A0
+
+/* SRAM Power Down Control Register */
+#define LCD_SPU_SRAM_PARA1                      0x01A4
+#define     CFG_CSB_256x32(hwc)                 ((hwc) << 15)   /* HWC */
+#define     CFG_CSB_256x32_MASK                 0x00008000
+#define     CFG_CSB_256x24(palette)             ((palette) << 14)       /* Palette */
+#define     CFG_CSB_256x24_MASK                 0x00004000
+#define     CFG_CSB_256x8(gamma)                ((gamma) << 13) /* Gamma */
+#define     CFG_CSB_256x8_MASK                  0x00002000
+#define     CFG_PDWN256x32(pdwn)                ((pdwn) << 7)   /* HWC */
+#define     CFG_PDWN256x32_MASK                 0x00000080
+#define     CFG_PDWN256x24(pdwn)                ((pdwn) << 6)   /* Palette */
+#define     CFG_PDWN256x24_MASK                 0x00000040
+#define     CFG_PDWN256x8(pdwn)                 ((pdwn) << 5)   /* Gamma */
+#define     CFG_PDWN256x8_MASK                  0x00000020
+#define     CFG_PDWN32x32(pdwn)                 ((pdwn) << 3)
+#define     CFG_PDWN32x32_MASK                  0x00000008
+#define     CFG_PDWN16x66(pdwn)                 ((pdwn) << 2)
+#define     CFG_PDWN16x66_MASK                  0x00000004
+#define     CFG_PDWN32x66(pdwn)                 ((pdwn) << 1)
+#define     CFG_PDWN32x66_MASK                  0x00000002
+#define     CFG_PDWN64x66(pdwn)                 (pdwn)
+#define     CFG_PDWN64x66_MASK                  0x00000001
+
+/* Smart or Dumb Panel Clock Divider */
+#define LCD_CFG_SCLK_DIV                        0x01A8
+#define     SCLK_SOURCE_SELECT(src)             ((src) << 31)
+#define     SCLK_SOURCE_SELECT_MASK             0x80000000
+#define     CLK_FRACDIV(frac)                   ((frac) << 16)
+#define     CLK_FRACDIV_MASK                    0x0FFF0000
+#define     CLK_INT_DIV(div)                    (div)
+#define     CLK_INT_DIV_MASK                    0x0000FFFF
+
+/* Video Contrast Register */
+#define LCD_SPU_CONTRAST                        0x01AC
+#define     CFG_BRIGHTNESS(bright)              ((bright) << 16)
+#define     CFG_BRIGHTNESS_MASK                 0xFFFF0000
+#define     CFG_CONTRAST(contrast)              (contrast)
+#define     CFG_CONTRAST_MASK                   0x0000FFFF
+
+/* Video Saturation Register */
+#define LCD_SPU_SATURATION                      0x01B0
+#define     CFG_C_MULTS(mult)                   ((mult) << 16)
+#define     CFG_C_MULTS_MASK                    0xFFFF0000
+#define     CFG_SATURATION(sat)                 (sat)
+#define     CFG_SATURATION_MASK                 0x0000FFFF
+
+/* Video Hue Adjust Register */
+#define LCD_SPU_CBSH_HUE                        0x01B4
+#define     CFG_SIN0(sin0)                      ((sin0) << 16)
+#define     CFG_SIN0_MASK                       0xFFFF0000
+#define     CFG_COS0(con0)                      (con0)
+#define     CFG_COS0_MASK                       0x0000FFFF
+
+/* Dump LCD Panel Control Register */
+#define LCD_SPU_DUMB_CTRL                       0x01B8
+#define     CFG_DUMBMODE(mode)                  ((mode) << 28)
+#define     CFG_DUMBMODE_MASK                   0xF0000000
+#define     CFG_LCDGPIO_O(data)                 ((data) << 20)
+#define     CFG_LCDGPIO_O_MASK                  0x0FF00000
+#define     CFG_LCDGPIO_ENA(gpio)               ((gpio) << 12)
+#define     CFG_LCDGPIO_ENA_MASK                0x000FF000
+#define     CFG_BIAS_OUT(bias)                  ((bias) << 8)
+#define     CFG_BIAS_OUT_MASK                   0x00000100
+#define     CFG_REVERSE_RGB(rRGB)               ((rRGB) << 7)
+#define     CFG_REVERSE_RGB_MASK                0x00000080
+#define     CFG_INV_COMPBLANK(blank)            ((blank) << 6)
+#define     CFG_INV_COMPBLANK_MASK              0x00000040
+#define     CFG_INV_COMPSYNC(sync)              ((sync) << 5)
+#define     CFG_INV_COMPSYNC_MASK               0x00000020
+#define     CFG_INV_HENA(hena)                  ((hena) << 4)
+#define     CFG_INV_HENA_MASK                   0x00000010
+#define     CFG_INV_VSYNC(vsync)                ((vsync) << 3)
+#define     CFG_INV_VSYNC_MASK                  0x00000008
+#define     CFG_INV_HSYNC(hsync)                ((hsync) << 2)
+#define     CFG_INV_HSYNC_MASK                  0x00000004
+#define     CFG_INV_PCLK(pclk)                  ((pclk) << 1)
+#define     CFG_INV_PCLK_MASK                   0x00000002
+#define     CFG_DUMB_ENA(dumb)                  (dumb)
+#define     CFG_DUMB_ENA_MASK                   0x00000001
+
+/* LCD I/O Pads Control Register */
+#define SPU_IOPAD_CONTROL                       0x01BC
+#define     CFG_GRA_VM_ENA(vm)                  ((vm) << 15)        /* gfx */
+#define     CFG_GRA_VM_ENA_MASK                 0x00008000
+#define     CFG_DMA_VM_ENA(vm)                  ((vm) << 13)    /* video */
+#define     CFG_DMA_VM_ENA_MASK                 0x00002000
+#define     CFG_CMD_VM_ENA(vm)                  ((vm) << 13)
+#define     CFG_CMD_VM_ENA_MASK                 0x00000800
+#define     CFG_CSC(csc)                        ((csc) << 8)    /* csc */
+#define     CFG_CSC_MASK                        0x00000300
+#define     CFG_AXICTRL(axi)                    ((axi) << 4)
+#define     CFG_AXICTRL_MASK                    0x000000F0
+#define     CFG_IOPADMODE(iopad)                (iopad)
+#define     CFG_IOPADMODE_MASK                  0x0000000F
+
+/* LCD Interrupt Control Register */
+#define SPU_IRQ_ENA                             0x01C0
+#define     DMA_FRAME_IRQ0_ENA(irq)             ((irq) << 31)
+#define     DMA_FRAME_IRQ0_ENA_MASK             0x80000000
+#define     DMA_FRAME_IRQ1_ENA(irq)             ((irq) << 30)
+#define     DMA_FRAME_IRQ1_ENA_MASK             0x40000000
+#define     DMA_FF_UNDERFLOW_ENA(ff)            ((ff) << 29)
+#define     DMA_FF_UNDERFLOW_ENA_MASK           0x20000000
+#define     GRA_FRAME_IRQ0_ENA(irq)             ((irq) << 27)
+#define     GRA_FRAME_IRQ0_ENA_MASK             0x08000000
+#define     GRA_FRAME_IRQ1_ENA(irq)             ((irq) << 26)
+#define     GRA_FRAME_IRQ1_ENA_MASK             0x04000000
+#define     GRA_FF_UNDERFLOW_ENA(ff)            ((ff) << 25)
+#define     GRA_FF_UNDERFLOW_ENA_MASK           0x02000000
+#define     VSYNC_IRQ_ENA(vsync_irq)            ((vsync_irq) << 23)
+#define     VSYNC_IRQ_ENA_MASK                  0x00800000
+#define     DUMB_FRAMEDONE_ENA(fdone)           ((fdone) << 22)
+#define     DUMB_FRAMEDONE_ENA_MASK             0x00400000
+#define     TWC_FRAMEDONE_ENA(fdone)            ((fdone) << 21)
+#define     TWC_FRAMEDONE_ENA_MASK              0x00200000
+#define     HWC_FRAMEDONE_ENA(fdone)            ((fdone) << 20)
+#define     HWC_FRAMEDONE_ENA_MASK              0x00100000
+#define     SLV_IRQ_ENA(irq)                    ((irq) << 19)
+#define     SLV_IRQ_ENA_MASK                    0x00080000
+#define     SPI_IRQ_ENA(irq)                    ((irq) << 18)
+#define     SPI_IRQ_ENA_MASK                    0x00040000
+#define     PWRDN_IRQ_ENA(irq)                  ((irq) << 17)
+#define     PWRDN_IRQ_ENA_MASK                  0x00020000
+#define     ERR_IRQ_ENA(irq)                    ((irq) << 16)
+#define     ERR_IRQ_ENA_MASK                    0x00010000
+#define     CLEAN_SPU_IRQ_ISR(irq)              (irq)
+#define     CLEAN_SPU_IRQ_ISR_MASK              0x0000FFFF
+
+/* LCD Interrupt Status Register */
+#define SPU_IRQ_ISR                             0x01C4
+#define     DMA_FRAME_IRQ0(irq)                 ((irq) << 31)
+#define     DMA_FRAME_IRQ0_MASK                 0x80000000
+#define     DMA_FRAME_IRQ1(irq)                 ((irq) << 30)
+#define     DMA_FRAME_IRQ1_MASK                 0x40000000
+#define     DMA_FF_UNDERFLOW(ff)                ((ff) << 29)
+#define     DMA_FF_UNDERFLOW_MASK               0x20000000
+#define     GRA_FRAME_IRQ0(irq)                 ((irq) << 27)
+#define     GRA_FRAME_IRQ0_MASK                 0x08000000
+#define     GRA_FRAME_IRQ1(irq)                 ((irq) << 26)
+#define     GRA_FRAME_IRQ1_MASK                 0x04000000
+#define     GRA_FF_UNDERFLOW(ff)                ((ff) << 25)
+#define     GRA_FF_UNDERFLOW_MASK               0x02000000
+#define     VSYNC_IRQ(vsync_irq)                ((vsync_irq) << 23)
+#define     VSYNC_IRQ_MASK                      0x00800000
+#define     DUMB_FRAMEDONE(fdone)               ((fdone) << 22)
+#define     DUMB_FRAMEDONE_MASK                 0x00400000
+#define     TWC_FRAMEDONE(fdone)                ((fdone) << 21)
+#define     TWC_FRAMEDONE_MASK                  0x00200000
+#define     HWC_FRAMEDONE(fdone)                ((fdone) << 20)
+#define     HWC_FRAMEDONE_MASK                  0x00100000
+#define     SLV_IRQ(irq)                        ((irq) << 19)
+#define     SLV_IRQ_MASK                        0x00080000
+#define     SPI_IRQ(irq)                        ((irq) << 18)
+#define     SPI_IRQ_MASK                        0x00040000
+#define     PWRDN_IRQ(irq)                      ((irq) << 17)
+#define     PWRDN_IRQ_MASK                      0x00020000
+#define     ERR_IRQ(irq)                        ((irq) << 16)
+#define     ERR_IRQ_MASK                        0x00010000
+/* read-only */
+#define     DMA_FRAME_IRQ0_LEVEL_MASK           0x00008000
+#define     DMA_FRAME_IRQ1_LEVEL_MASK           0x00004000
+#define     DMA_FRAME_CNT_ISR_MASK              0x00003000
+#define     GRA_FRAME_IRQ0_LEVEL_MASK           0x00000800
+#define     GRA_FRAME_IRQ1_LEVEL_MASK           0x00000400
+#define     GRA_FRAME_CNT_ISR_MASK              0x00000300
+#define     VSYNC_IRQ_LEVEL_MASK                0x00000080
+#define     DUMB_FRAMEDONE_LEVEL_MASK           0x00000040
+#define     TWC_FRAMEDONE_LEVEL_MASK            0x00000020
+#define     HWC_FRAMEDONE_LEVEL_MASK            0x00000010
+#define     SLV_FF_EMPTY_MASK                   0x00000008
+#define     DMA_FF_ALLEMPTY_MASK                0x00000004
+#define     GRA_FF_ALLEMPTY_MASK                0x00000002
+#define     PWRDN_IRQ_LEVEL_MASK                0x00000001
+
+
+/*
+ * defined Video Memory Color format for DMA control 0 register
+ * DMA0 bit[23:20]
+ */
+#define VMODE_RGB565            0x0
+#define VMODE_RGB1555           0x1
+#define VMODE_RGB888PACKED      0x2
+#define VMODE_RGB888UNPACKED    0x3
+#define VMODE_RGBA888           0x4
+#define VMODE_YUV422PACKED      0x5
+#define VMODE_YUV422PLANAR      0x6
+#define VMODE_YUV420PLANAR      0x7
+#define VMODE_SMPNCMD           0x8
+#define VMODE_PALETTE4BIT       0x9
+#define VMODE_PALETTE8BIT       0xa
+#define VMODE_RESERVED          0xb
+
+/*
+ * defined Graphic Memory Color format for DMA control 0 register
+ * DMA0 bit[19:16]
+ */
+#define GMODE_RGB565            0x0
+#define GMODE_RGB1555           0x1
+#define GMODE_RGB888PACKED      0x2
+#define GMODE_RGB888UNPACKED    0x3
+#define GMODE_RGBA888           0x4
+#define GMODE_YUV422PACKED      0x5
+#define GMODE_YUV422PLANAR      0x6
+#define GMODE_YUV420PLANAR      0x7
+#define GMODE_SMPNCMD           0x8
+#define GMODE_PALETTE4BIT       0x9
+#define GMODE_PALETTE8BIT       0xa
+#define GMODE_RESERVED          0xb
+
+/*
+ * define for DMA control 1 register
+ */
+#define DMA1_FRAME_TRIG         31 /* bit location */
+#define DMA1_VSYNC_MODE         28
+#define DMA1_VSYNC_INV          27
+#define DMA1_CKEY               24
+#define DMA1_CARRY              23
+#define DMA1_LNBUF_ENA          22
+#define DMA1_GATED_ENA          21
+#define DMA1_PWRDN_ENA          20
+#define DMA1_DSCALE             18
+#define DMA1_ALPHA_MODE         16
+#define DMA1_ALPHA              08
+#define DMA1_PXLCMD             00
+
+/*
+ * defined for Configure Dumb Mode
+ * DUMB LCD Panel bit[31:28]
+ */
+#define DUMB16_RGB565_0         0x0
+#define DUMB16_RGB565_1         0x1
+#define DUMB18_RGB666_0         0x2
+#define DUMB18_RGB666_1         0x3
+#define DUMB12_RGB444_0         0x4
+#define DUMB12_RGB444_1         0x5
+#define DUMB24_RGB888_0         0x6
+#define DUMB_BLANK              0x7
+
+/*
+ * defined for Configure I/O Pin Allocation Mode
+ * LCD LCD I/O Pads control register bit[3:0]
+ */
+#define IOPAD_DUMB24            0x0
+#define IOPAD_DUMB18SPI         0x1
+#define IOPAD_DUMB18GPIO        0x2
+#define IOPAD_DUMB16SPI         0x3
+#define IOPAD_DUMB16GPIO        0x4
+#define IOPAD_DUMB12            0x5
+#define IOPAD_SMART18SPI        0x6
+#define IOPAD_SMART16SPI        0x7
+#define IOPAD_SMART8BOTH        0x8
+
+#endif /* __PXA168FB_H__ */
diff --git a/drivers/w1/Kconfig b/drivers/w1/Kconfig
index 9adbb4f90479..fd2c7bd9dfbe 100644
--- a/drivers/w1/Kconfig
+++ b/drivers/w1/Kconfig
@@ -8,7 +8,7 @@ menuconfig W1
           If you want W1 support, you should say Y here.
 
           This W1 support can also be built as a module.  If so, the module
-          will be called wire.ko.
+          will be called wire.
 
 if W1
 
diff --git a/drivers/w1/masters/Kconfig b/drivers/w1/masters/Kconfig
index 96d2f8e4c275..3195fb8b7d9a 100644
--- a/drivers/w1/masters/Kconfig
+++ b/drivers/w1/masters/Kconfig
@@ -12,7 +12,7 @@ config W1_MASTER_MATROX
           using Matrox's G400 GPIO pins.
 
           This support is also available as a module.  If so, the module
-          will be called matrox_w1.ko.
+          will be called matrox_w1.
 
 config W1_MASTER_DS2490
         tristate "DS2490 USB <-> W1 transport layer for 1-wire"
@@ -22,7 +22,7 @@ config W1_MASTER_DS2490
           for example DS9490*.
 
           This support is also available as a module.  If so, the module
-          will be called ds2490.ko.
+          will be called ds2490.
 
 config W1_MASTER_DS2482
         tristate "Maxim DS2482 I2C to 1-Wire bridge"
@@ -56,7 +56,7 @@ config W1_MASTER_GPIO
           GPIO pins. This driver uses the GPIO API to control the wire.
 
           This support is also available as a module.  If so, the module
-          will be called w1-gpio.ko.
+          will be called w1-gpio.
 
 config HDQ_MASTER_OMAP
         tristate "OMAP HDQ driver"
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 5eb8f21da82e..b166f2852a64 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -231,14 +231,14 @@ config DAVINCI_WATCHDOG
           NOTE: once enabled, this timer cannot be disabled.
           Say N if you are unsure.
 
-config ORION5X_WATCHDOG
-        tristate "Orion5x watchdog"
-        depends on ARCH_ORION5X
+config ORION_WATCHDOG
+        tristate "Orion watchdog"
+        depends on ARCH_ORION5X || ARCH_KIRKWOOD
         help
           Say Y here if to include support for the watchdog timer
-          in the Orion5x ARM SoCs.
+          in the Marvell Orion5x and Kirkwood ARM SoCs.
           To compile this driver as a module, choose M here: the
-          module will be called orion5x_wdt.
+          module will be called orion_wdt.
 
 # AVR32 Architecture
 
@@ -531,7 +531,7 @@ config SBC8360_WDT
           Board Computer produced by Axiomtek Co., Ltd. (www.axiomtek.com).
 
           To compile this driver as a module, choose M here: the
-          module will be called sbc8360.ko.
+          module will be called sbc8360.
 
           Most people will say N.
 
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 7f8c56b14f58..c3afa14d5be1 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -40,7 +40,7 @@ obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o
 obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
 obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o
 obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
-obj-$(CONFIG_ORION5X_WATCHDOG) += orion5x_wdt.o
+obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o
 
 # AVR32 Architecture
 obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
diff --git a/drivers/watchdog/iop_wdt.c b/drivers/watchdog/iop_wdt.c
index 96eb2cbe5874..0c9059676690 100644
--- a/drivers/watchdog/iop_wdt.c
+++ b/drivers/watchdog/iop_wdt.c
@@ -192,7 +192,7 @@ static int iop_wdt_release(struct inode *inode, struct file *file)
                 if (test_bit(WDT_ENABLED, &wdt_status))
                         state = wdt_disable();
 
-        /* if the timer is not disbaled reload and notify that we are still
+        /* if the timer is not disabled reload and notify that we are still
          * going down
          */
         if (state != 0) {
diff --git a/drivers/watchdog/orion5x_wdt.c b/drivers/watchdog/orion_wdt.c
index 2cde568e4fb0..2d9fb96a9ee9 100644
--- a/drivers/watchdog/orion5x_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -1,7 +1,7 @@
 /*
- * drivers/watchdog/orion5x_wdt.c
+ * drivers/watchdog/orion_wdt.c
  *
- * Watchdog driver for Orion5x processors
+ * Watchdog driver for Orion/Kirkwood processors
  *
  * Author: Sylver Bruneau <sylver.bruneau@googlemail.com>
  *
@@ -23,7 +23,7 @@
 #include <linux/io.h>
 #include <linux/spinlock.h>
 #include <mach/bridge-regs.h>
-#include <plat/orion5x_wdt.h>
+#include <plat/orion_wdt.h>
 
 /*
  * Watchdog timer block registers.
@@ -43,7 +43,7 @@ static unsigned int wdt_tclk;
 static unsigned long wdt_status;
 static spinlock_t wdt_lock;
 
-static void orion5x_wdt_ping(void)
+static void orion_wdt_ping(void)
 {
         spin_lock(&wdt_lock);
 
@@ -53,7 +53,7 @@ static void orion5x_wdt_ping(void)
         spin_unlock(&wdt_lock);
 }
 
-static void orion5x_wdt_enable(void)
+static void orion_wdt_enable(void)
 {
         u32 reg;
 
@@ -73,23 +73,23 @@ static void orion5x_wdt_enable(void)
         writel(reg, TIMER_CTRL);
 
         /* Enable reset on watchdog */
-        reg = readl(CPU_RESET_MASK);
-        reg |= WDT_RESET;
-        writel(reg, CPU_RESET_MASK);
+        reg = readl(RSTOUTn_MASK);
+        reg |= WDT_RESET_OUT_EN;
+        writel(reg, RSTOUTn_MASK);
 
         spin_unlock(&wdt_lock);
 }
 
-static void orion5x_wdt_disable(void)
+static void orion_wdt_disable(void)
 {
         u32 reg;
 
         spin_lock(&wdt_lock);
 
         /* Disable reset on watchdog */
-        reg = readl(CPU_RESET_MASK);
-        reg &= ~WDT_RESET;
-        writel(reg, CPU_RESET_MASK);
+        reg = readl(RSTOUTn_MASK);
+        reg &= ~WDT_RESET_OUT_EN;
+        writel(reg, RSTOUTn_MASK);
 
         /* Disable watchdog timer */
         reg = readl(TIMER_CTRL);
@@ -99,7 +99,7 @@ static void orion5x_wdt_disable(void)
         spin_unlock(&wdt_lock);
 }
 
-static int orion5x_wdt_get_timeleft(int *time_left)
+static int orion_wdt_get_timeleft(int *time_left)
 {
         spin_lock(&wdt_lock);
         *time_left = readl(WDT_VAL) / wdt_tclk;
@@ -107,16 +107,16 @@ static int orion5x_wdt_get_timeleft(int *time_left)
         return 0;
 }
 
-static int orion5x_wdt_open(struct inode *inode, struct file *file)
+static int orion_wdt_open(struct inode *inode, struct file *file)
 {
         if (test_and_set_bit(WDT_IN_USE, &wdt_status))
                 return -EBUSY;
         clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
-        orion5x_wdt_enable();
+        orion_wdt_enable();
         return nonseekable_open(inode, file);
 }
 
-static ssize_t orion5x_wdt_write(struct file *file, const char *data,
+static ssize_t orion_wdt_write(struct file *file, const char *data,
                                         size_t len, loff_t *ppos)
 {
         if (len) {
@@ -133,18 +133,18 @@ static ssize_t orion5x_wdt_write(struct file *file, const char *data,
                                         set_bit(WDT_OK_TO_CLOSE, &wdt_status);
                         }
                 }
-                orion5x_wdt_ping();
+                orion_wdt_ping();
         }
         return len;
 }
 
-static int orion5x_wdt_settimeout(int new_time)
+static int orion_wdt_settimeout(int new_time)
 {
         if ((new_time <= 0) || (new_time > wdt_max_duration))
                 return -EINVAL;
 
         /* Set new watchdog time to be used when
-         * orion5x_wdt_enable() or orion5x_wdt_ping() is called. */
+         * orion_wdt_enable() or orion_wdt_ping() is called. */
         heartbeat = new_time;
         return 0;
 }
@@ -152,10 +152,10 @@ static int orion5x_wdt_settimeout(int new_time)
 static const struct watchdog_info ident = {
         .options        = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT |
                           WDIOF_KEEPALIVEPING,
-        .identity       = "Orion5x Watchdog",
+        .identity       = "Orion Watchdog",
 };
 
-static long orion5x_wdt_ioctl(struct file *file, unsigned int cmd,
+static long orion_wdt_ioctl(struct file *file, unsigned int cmd,
                                 unsigned long arg)
 {
         int ret = -ENOTTY;
@@ -173,7 +173,7 @@ static long orion5x_wdt_ioctl(struct file *file, unsigned int cmd,
                 break;
 
         case WDIOC_KEEPALIVE:
-                orion5x_wdt_ping();
+                orion_wdt_ping();
                 ret = 0;
                 break;
 
@@ -182,11 +182,11 @@ static long orion5x_wdt_ioctl(struct file *file, unsigned int cmd,
                 if (ret)
                         break;
 
-                if (orion5x_wdt_settimeout(time)) {
+                if (orion_wdt_settimeout(time)) {
                         ret = -EINVAL;
                         break;
                 }
-                orion5x_wdt_ping();
+                orion_wdt_ping();
                 /* Fall through */
 
         case WDIOC_GETTIMEOUT:
@@ -194,7 +194,7 @@ static long orion5x_wdt_ioctl(struct file *file, unsigned int cmd,
                 break;
 
         case WDIOC_GETTIMELEFT:
-                if (orion5x_wdt_get_timeleft(&time)) {
+                if (orion_wdt_get_timeleft(&time)) {
                         ret = -EINVAL;
                         break;
                 }
@@ -204,10 +204,10 @@ static long orion5x_wdt_ioctl(struct file *file, unsigned int cmd,
         return ret;
 }
 
-static int orion5x_wdt_release(struct inode *inode, struct file *file)
+static int orion_wdt_release(struct inode *inode, struct file *file)
 {
         if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
-                orion5x_wdt_disable();
+                orion_wdt_disable();
         else
                 printk(KERN_CRIT "WATCHDOG: Device closed unexpectedly - "
                                         "timer will not stop\n");
@@ -218,98 +218,98 @@ static int orion5x_wdt_release(struct inode *inode, struct file *file)
 }
 
 
-static const struct file_operations orion5x_wdt_fops = {
+static const struct file_operations orion_wdt_fops = {
         .owner          = THIS_MODULE,
         .llseek         = no_llseek,
-        .write          = orion5x_wdt_write,
-        .unlocked_ioctl = orion5x_wdt_ioctl,
-        .open           = orion5x_wdt_open,
-        .release        = orion5x_wdt_release,
+        .write          = orion_wdt_write,
+        .unlocked_ioctl = orion_wdt_ioctl,
+        .open           = orion_wdt_open,
+        .release        = orion_wdt_release,
 };
 
-static struct miscdevice orion5x_wdt_miscdev = {
+static struct miscdevice orion_wdt_miscdev = {
         .minor          = WATCHDOG_MINOR,
         .name           = "watchdog",
-        .fops           = &orion5x_wdt_fops,
+        .fops           = &orion_wdt_fops,
 };
 
-static int __devinit orion5x_wdt_probe(struct platform_device *pdev)
+static int __devinit orion_wdt_probe(struct platform_device *pdev)
 {
-        struct orion5x_wdt_platform_data *pdata = pdev->dev.platform_data;
+        struct orion_wdt_platform_data *pdata = pdev->dev.platform_data;
         int ret;
 
         if (pdata) {
                 wdt_tclk = pdata->tclk;
         } else {
-                printk(KERN_ERR "Orion5x Watchdog misses platform data\n");
+                printk(KERN_ERR "Orion Watchdog misses platform data\n");
                 return -ENODEV;
         }
 
-        if (orion5x_wdt_miscdev.parent)
+        if (orion_wdt_miscdev.parent)
                 return -EBUSY;
-        orion5x_wdt_miscdev.parent = &pdev->dev;
+        orion_wdt_miscdev.parent = &pdev->dev;
 
         wdt_max_duration = WDT_MAX_CYCLE_COUNT / wdt_tclk;
-        if (orion5x_wdt_settimeout(heartbeat))
+        if (orion_wdt_settimeout(heartbeat))
                 heartbeat = wdt_max_duration;
 
-        ret = misc_register(&orion5x_wdt_miscdev);
+        ret = misc_register(&orion_wdt_miscdev);
         if (ret)
                 return ret;
 
-        printk(KERN_INFO "Orion5x Watchdog Timer: Initial timeout %d sec%s\n",
+        printk(KERN_INFO "Orion Watchdog Timer: Initial timeout %d sec%s\n",
                                 heartbeat, nowayout ? ", nowayout" : "");
         return 0;
 }
 
-static int __devexit orion5x_wdt_remove(struct platform_device *pdev)
+static int __devexit orion_wdt_remove(struct platform_device *pdev)
 {
         int ret;
 
         if (test_bit(WDT_IN_USE, &wdt_status)) {
-                orion5x_wdt_disable();
+                orion_wdt_disable();
                 clear_bit(WDT_IN_USE, &wdt_status);
         }
 
-        ret = misc_deregister(&orion5x_wdt_miscdev);
+        ret = misc_deregister(&orion_wdt_miscdev);
         if (!ret)
-                orion5x_wdt_miscdev.parent = NULL;
+                orion_wdt_miscdev.parent = NULL;
 
         return ret;
 }
 
-static void orion5x_wdt_shutdown(struct platform_device *pdev)
+static void orion_wdt_shutdown(struct platform_device *pdev)
 {
         if (test_bit(WDT_IN_USE, &wdt_status))
-                orion5x_wdt_disable();
+                orion_wdt_disable();
 }
 
-static struct platform_driver orion5x_wdt_driver = {
-        .probe          = orion5x_wdt_probe,
-        .remove         = __devexit_p(orion5x_wdt_remove),
-        .shutdown       = orion5x_wdt_shutdown,
+static struct platform_driver orion_wdt_driver = {
+        .probe          = orion_wdt_probe,
+        .remove         = __devexit_p(orion_wdt_remove),
+        .shutdown       = orion_wdt_shutdown,
         .driver         = {
                 .owner  = THIS_MODULE,
-                .name   = "orion5x_wdt",
+                .name   = "orion_wdt",
         },
 };
 
-static int __init orion5x_wdt_init(void)
+static int __init orion_wdt_init(void)
 {
         spin_lock_init(&wdt_lock);
-        return platform_driver_register(&orion5x_wdt_driver);
+        return platform_driver_register(&orion_wdt_driver);
 }
 
-static void __exit orion5x_wdt_exit(void)
+static void __exit orion_wdt_exit(void)
 {
-        platform_driver_unregister(&orion5x_wdt_driver);
+        platform_driver_unregister(&orion_wdt_driver);
 }
 
-module_init(orion5x_wdt_init);
-module_exit(orion5x_wdt_exit);
+module_init(orion_wdt_init);
+module_exit(orion_wdt_exit);
 
 MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>");
-MODULE_DESCRIPTION("Orion5x Processor Watchdog");
+MODULE_DESCRIPTION("Orion Processor Watchdog");
 
 module_param(heartbeat, int, 0);
 MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");