diff options
Diffstat (limited to 'drivers/spi/davinci_spi.c')
-rw-r--r-- | drivers/spi/davinci_spi.c | 36 |
1 files changed, 27 insertions, 9 deletions
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index d09b63cf58bf..e94c63813e9f 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c | |||
@@ -78,6 +78,16 @@ | |||
78 | #define SPIBUF_TXFULL_MASK BIT(29) | 78 | #define SPIBUF_TXFULL_MASK BIT(29) |
79 | #define SPIBUF_RXEMPTY_MASK BIT(31) | 79 | #define SPIBUF_RXEMPTY_MASK BIT(31) |
80 | 80 | ||
81 | /* SPIDELAY */ | ||
82 | #define SPIDELAY_C2TDELAY_SHIFT 24 | ||
83 | #define SPIDELAY_C2TDELAY_MASK (0xFF << SPIDELAY_C2TDELAY_SHIFT) | ||
84 | #define SPIDELAY_T2CDELAY_SHIFT 16 | ||
85 | #define SPIDELAY_T2CDELAY_MASK (0xFF << SPIDELAY_T2CDELAY_SHIFT) | ||
86 | #define SPIDELAY_T2EDELAY_SHIFT 8 | ||
87 | #define SPIDELAY_T2EDELAY_MASK (0xFF << SPIDELAY_T2EDELAY_SHIFT) | ||
88 | #define SPIDELAY_C2EDELAY_SHIFT 0 | ||
89 | #define SPIDELAY_C2EDELAY_MASK 0xFF | ||
90 | |||
81 | /* Error Masks */ | 91 | /* Error Masks */ |
82 | #define SPIFLG_DLEN_ERR_MASK BIT(0) | 92 | #define SPIFLG_DLEN_ERR_MASK BIT(0) |
83 | #define SPIFLG_TIMEOUT_MASK BIT(1) | 93 | #define SPIFLG_TIMEOUT_MASK BIT(1) |
@@ -95,9 +105,6 @@ | |||
95 | #define SPIINT_TX_INTR BIT(9) | 105 | #define SPIINT_TX_INTR BIT(9) |
96 | #define SPIINT_DMA_REQ_EN BIT(16) | 106 | #define SPIINT_DMA_REQ_EN BIT(16) |
97 | 107 | ||
98 | #define SPI_T2CDELAY_SHIFT 16 | ||
99 | #define SPI_C2TDELAY_SHIFT 24 | ||
100 | |||
101 | /* SPI Controller registers */ | 108 | /* SPI Controller registers */ |
102 | #define SPIGCR0 0x00 | 109 | #define SPIGCR0 0x00 |
103 | #define SPIGCR1 0x04 | 110 | #define SPIGCR1 0x04 |
@@ -363,6 +370,8 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, | |||
363 | 370 | ||
364 | if (davinci_spi->version == SPI_VERSION_2) { | 371 | if (davinci_spi->version == SPI_VERSION_2) { |
365 | 372 | ||
373 | u32 delay = 0; | ||
374 | |||
366 | spifmt |= ((spicfg->wdelay << SPIFMT_WDELAY_SHIFT) | 375 | spifmt |= ((spicfg->wdelay << SPIFMT_WDELAY_SHIFT) |
367 | & SPIFMT_WDELAY_MASK); | 376 | & SPIFMT_WDELAY_MASK); |
368 | 377 | ||
@@ -372,15 +381,24 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, | |||
372 | if (spicfg->parity_enable) | 381 | if (spicfg->parity_enable) |
373 | spifmt |= SPIFMT_PARITYENA_MASK; | 382 | spifmt |= SPIFMT_PARITYENA_MASK; |
374 | 383 | ||
375 | if (spicfg->timer_disable) | 384 | if (spicfg->timer_disable) { |
376 | spifmt |= SPIFMT_DISTIMER_MASK; | 385 | spifmt |= SPIFMT_DISTIMER_MASK; |
377 | else | 386 | } else { |
378 | iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | | 387 | delay |= (spicfg->c2tdelay << SPIDELAY_C2TDELAY_SHIFT) |
379 | (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), | 388 | & SPIDELAY_C2TDELAY_MASK; |
380 | davinci_spi->base + SPIDELAY); | 389 | delay |= (spicfg->t2cdelay << SPIDELAY_T2CDELAY_SHIFT) |
390 | & SPIDELAY_T2CDELAY_MASK; | ||
391 | } | ||
381 | 392 | ||
382 | if (spi->mode & SPI_READY) | 393 | if (spi->mode & SPI_READY) { |
383 | spifmt |= SPIFMT_WAITENA_MASK; | 394 | spifmt |= SPIFMT_WAITENA_MASK; |
395 | delay |= (spicfg->t2edelay << SPIDELAY_T2EDELAY_SHIFT) | ||
396 | & SPIDELAY_T2EDELAY_MASK; | ||
397 | delay |= (spicfg->c2edelay << SPIDELAY_C2EDELAY_SHIFT) | ||
398 | & SPIDELAY_C2EDELAY_MASK; | ||
399 | } | ||
400 | |||
401 | iowrite32(delay, davinci_spi->base + SPIDELAY); | ||
384 | } | 402 | } |
385 | 403 | ||
386 | iowrite32(spifmt, davinci_spi->base + SPIFMT0); | 404 | iowrite32(spifmt, davinci_spi->base + SPIFMT0); |