aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/rt2x00/rt61pci.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c60
1 files changed, 34 insertions, 26 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 432e75f960b7..86c75b9c3f25 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -1809,7 +1809,8 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1809 1809
1810 if (skbdesc->desc_len > TXINFO_SIZE) { 1810 if (skbdesc->desc_len > TXINFO_SIZE) {
1811 rt2x00_desc_read(txd, 11, &word); 1811 rt2x00_desc_read(txd, 11, &word);
1812 rt2x00_set_field32(&word, TXD_W11_BUFFER_LENGTH0, skb->len); 1812 rt2x00_set_field32(&word, TXD_W11_BUFFER_LENGTH0,
1813 txdesc->length);
1813 rt2x00_desc_write(txd, 11, word); 1814 rt2x00_desc_write(txd, 11, word);
1814 } 1815 }
1815 1816
@@ -1832,7 +1833,7 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1832 rt2x00_set_field32(&word, TXD_W0_KEY_TABLE, 1833 rt2x00_set_field32(&word, TXD_W0_KEY_TABLE,
1833 test_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags)); 1834 test_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags));
1834 rt2x00_set_field32(&word, TXD_W0_KEY_INDEX, txdesc->key_idx); 1835 rt2x00_set_field32(&word, TXD_W0_KEY_INDEX, txdesc->key_idx);
1835 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len); 1836 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1836 rt2x00_set_field32(&word, TXD_W0_BURST, 1837 rt2x00_set_field32(&word, TXD_W0_BURST,
1837 test_bit(ENTRY_TXD_BURST, &txdesc->flags)); 1838 test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1838 rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, txdesc->cipher); 1839 rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, txdesc->cipher);
@@ -1842,7 +1843,8 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1842/* 1843/*
1843 * TX data initialization 1844 * TX data initialization
1844 */ 1845 */
1845static void rt61pci_write_beacon(struct queue_entry *entry) 1846static void rt61pci_write_beacon(struct queue_entry *entry,
1847 struct txentry_desc *txdesc)
1846{ 1848{
1847 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 1849 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1848 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 1850 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
@@ -1869,6 +1871,19 @@ static void rt61pci_write_beacon(struct queue_entry *entry)
1869 entry->skb->data, entry->skb->len); 1871 entry->skb->data, entry->skb->len);
1870 1872
1871 /* 1873 /*
1874 * Enable beaconing again.
1875 *
1876 * For Wi-Fi faily generated beacons between participating
1877 * stations. Set TBTT phase adaptive adjustment step to 8us.
1878 */
1879 rt2x00pci_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1880
1881 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
1882 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
1883 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1884 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
1885
1886 /*
1872 * Clean up beacon skb. 1887 * Clean up beacon skb.
1873 */ 1888 */
1874 dev_kfree_skb_any(entry->skb); 1889 dev_kfree_skb_any(entry->skb);
@@ -1880,23 +1895,6 @@ static void rt61pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1880{ 1895{
1881 u32 reg; 1896 u32 reg;
1882 1897
1883 if (queue == QID_BEACON) {
1884 /*
1885 * For Wi-Fi faily generated beacons between participating
1886 * stations. Set TBTT phase adaptive adjustment step to 8us.
1887 */
1888 rt2x00pci_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1889
1890 rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
1891 if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1892 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
1893 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
1894 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1895 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
1896 }
1897 return;
1898 }
1899
1900 rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg); 1898 rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
1901 rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC0, (queue == QID_AC_BE)); 1899 rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC0, (queue == QID_AC_BE));
1902 rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC1, (queue == QID_AC_BK)); 1900 rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC1, (queue == QID_AC_BK));
@@ -1968,12 +1966,8 @@ static void rt61pci_fill_rxdone(struct queue_entry *entry,
1968 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) 1966 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1969 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; 1967 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1970 1968
1971 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) { 1969 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER_ALG);
1972 rxdesc->cipher = 1970 rxdesc->cipher_status = rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR);
1973 rt2x00_get_field32(word0, RXD_W0_CIPHER_ALG);
1974 rxdesc->cipher_status =
1975 rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR);
1976 }
1977 1971
1978 if (rxdesc->cipher != CIPHER_NONE) { 1972 if (rxdesc->cipher != CIPHER_NONE) {
1979 _rt2x00_desc_read(entry_priv->desc, 2, &rxdesc->iv[0]); 1973 _rt2x00_desc_read(entry_priv->desc, 2, &rxdesc->iv[0]);
@@ -2118,6 +2112,14 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev)
2118 } 2112 }
2119} 2113}
2120 2114
2115static void rt61pci_wakeup(struct rt2x00_dev *rt2x00dev)
2116{
2117 struct ieee80211_conf conf = { .flags = 0 };
2118 struct rt2x00lib_conf libconf = { .conf = &conf };
2119
2120 rt61pci_config(rt2x00dev, &libconf, IEEE80211_CONF_CHANGE_PS);
2121}
2122
2121static irqreturn_t rt61pci_interrupt(int irq, void *dev_instance) 2123static irqreturn_t rt61pci_interrupt(int irq, void *dev_instance)
2122{ 2124{
2123 struct rt2x00_dev *rt2x00dev = dev_instance; 2125 struct rt2x00_dev *rt2x00dev = dev_instance;
@@ -2165,6 +2167,12 @@ static irqreturn_t rt61pci_interrupt(int irq, void *dev_instance)
2165 rt2x00pci_register_write(rt2x00dev, 2167 rt2x00pci_register_write(rt2x00dev,
2166 M2H_CMD_DONE_CSR, 0xffffffff); 2168 M2H_CMD_DONE_CSR, 0xffffffff);
2167 2169
2170 /*
2171 * 4 - MCU Autowakeup interrupt.
2172 */
2173 if (rt2x00_get_field32(reg_mcu, MCU_INT_SOURCE_CSR_TWAKEUP))
2174 rt61pci_wakeup(rt2x00dev);
2175
2168 return IRQ_HANDLED; 2176 return IRQ_HANDLED;
2169} 2177}
2170 2178