diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath5k')
-rw-r--r-- | drivers/net/wireless/ath/ath5k/Kconfig | 11 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/ahb.c | 7 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/ath5k.h | 38 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/attach.c | 4 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/base.c | 114 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/base.h | 3 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/caps.c | 48 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/debug.c | 20 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/debug.h | 10 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/eeprom.c | 24 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/eeprom.h | 28 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/mac80211-ops.c | 26 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/pci.c | 9 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/phy.c | 142 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/qcu.c | 46 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/reg.h | 21 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath5k/trace.h | 107 |
17 files changed, 358 insertions, 300 deletions
diff --git a/drivers/net/wireless/ath/ath5k/Kconfig b/drivers/net/wireless/ath/ath5k/Kconfig index e0793319389d..e18a9aa7b6ca 100644 --- a/drivers/net/wireless/ath/ath5k/Kconfig +++ b/drivers/net/wireless/ath/ath5k/Kconfig | |||
@@ -40,6 +40,17 @@ config ATH5K_DEBUG | |||
40 | 40 | ||
41 | modprobe ath5k debug=0x00000400 | 41 | modprobe ath5k debug=0x00000400 |
42 | 42 | ||
43 | config ATH5K_TRACER | ||
44 | bool "Atheros 5xxx tracer" | ||
45 | depends on ATH5K | ||
46 | depends on EVENT_TRACING | ||
47 | ---help--- | ||
48 | Say Y here to enable tracepoints for the ath5k driver | ||
49 | using the kernel tracing infrastructure. Select this | ||
50 | option if you are interested in debugging the driver. | ||
51 | |||
52 | If unsure, say N. | ||
53 | |||
43 | config ATH5K_AHB | 54 | config ATH5K_AHB |
44 | bool "Atheros 5xxx AHB bus support" | 55 | bool "Atheros 5xxx AHB bus support" |
45 | depends on (ATHEROS_AR231X && !PCI) | 56 | depends on (ATHEROS_AR231X && !PCI) |
diff --git a/drivers/net/wireless/ath/ath5k/ahb.c b/drivers/net/wireless/ath/ath5k/ahb.c index 707cde149248..ae84b86c3bf2 100644 --- a/drivers/net/wireless/ath/ath5k/ahb.c +++ b/drivers/net/wireless/ath/ath5k/ahb.c | |||
@@ -31,7 +31,8 @@ static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz) | |||
31 | *csz = L1_CACHE_BYTES >> 2; | 31 | *csz = L1_CACHE_BYTES >> 2; |
32 | } | 32 | } |
33 | 33 | ||
34 | bool ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data) | 34 | static bool |
35 | ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data) | ||
35 | { | 36 | { |
36 | struct ath5k_softc *sc = common->priv; | 37 | struct ath5k_softc *sc = common->priv; |
37 | struct platform_device *pdev = to_platform_device(sc->dev); | 38 | struct platform_device *pdev = to_platform_device(sc->dev); |
@@ -46,10 +47,10 @@ bool ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data) | |||
46 | 47 | ||
47 | eeprom += off; | 48 | eeprom += off; |
48 | if (eeprom > eeprom_end) | 49 | if (eeprom > eeprom_end) |
49 | return -EINVAL; | 50 | return false; |
50 | 51 | ||
51 | *data = *eeprom; | 52 | *data = *eeprom; |
52 | return 0; | 53 | return true; |
53 | } | 54 | } |
54 | 55 | ||
55 | int ath5k_hw_read_srev(struct ath5k_hw *ah) | 56 | int ath5k_hw_read_srev(struct ath5k_hw *ah) |
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h index 407e39c2b10b..70abb61e9eff 100644 --- a/drivers/net/wireless/ath/ath5k/ath5k.h +++ b/drivers/net/wireless/ath/ath5k/ath5k.h | |||
@@ -210,14 +210,9 @@ | |||
210 | /* Initial values */ | 210 | /* Initial values */ |
211 | #define AR5K_INIT_CYCRSSI_THR1 2 | 211 | #define AR5K_INIT_CYCRSSI_THR1 2 |
212 | 212 | ||
213 | /* Tx retry limits */ | 213 | /* Tx retry limit defaults from standard */ |
214 | #define AR5K_INIT_SH_RETRY 10 | 214 | #define AR5K_INIT_RETRY_SHORT 7 |
215 | #define AR5K_INIT_LG_RETRY AR5K_INIT_SH_RETRY | 215 | #define AR5K_INIT_RETRY_LONG 4 |
216 | /* For station mode */ | ||
217 | #define AR5K_INIT_SSH_RETRY 32 | ||
218 | #define AR5K_INIT_SLG_RETRY AR5K_INIT_SSH_RETRY | ||
219 | #define AR5K_INIT_TX_RETRY 10 | ||
220 | |||
221 | 216 | ||
222 | /* Slot time */ | 217 | /* Slot time */ |
223 | #define AR5K_INIT_SLOT_TIME_TURBO 6 | 218 | #define AR5K_INIT_SLOT_TIME_TURBO 6 |
@@ -1057,7 +1052,9 @@ struct ath5k_hw { | |||
1057 | #define ah_modes ah_capabilities.cap_mode | 1052 | #define ah_modes ah_capabilities.cap_mode |
1058 | #define ah_ee_version ah_capabilities.cap_eeprom.ee_version | 1053 | #define ah_ee_version ah_capabilities.cap_eeprom.ee_version |
1059 | 1054 | ||
1060 | u32 ah_limit_tx_retries; | 1055 | u8 ah_retry_long; |
1056 | u8 ah_retry_short; | ||
1057 | |||
1061 | u8 ah_coverage_class; | 1058 | u8 ah_coverage_class; |
1062 | bool ah_ack_bitrate_high; | 1059 | bool ah_ack_bitrate_high; |
1063 | u8 ah_bwmode; | 1060 | u8 ah_bwmode; |
@@ -1067,7 +1064,6 @@ struct ath5k_hw { | |||
1067 | u8 ah_ant_mode; | 1064 | u8 ah_ant_mode; |
1068 | u8 ah_tx_ant; | 1065 | u8 ah_tx_ant; |
1069 | u8 ah_def_ant; | 1066 | u8 ah_def_ant; |
1070 | bool ah_software_retry; | ||
1071 | 1067 | ||
1072 | struct ath5k_capabilities ah_capabilities; | 1068 | struct ath5k_capabilities ah_capabilities; |
1073 | 1069 | ||
@@ -1162,6 +1158,26 @@ void ath5k_hw_deinit(struct ath5k_hw *ah); | |||
1162 | int ath5k_sysfs_register(struct ath5k_softc *sc); | 1158 | int ath5k_sysfs_register(struct ath5k_softc *sc); |
1163 | void ath5k_sysfs_unregister(struct ath5k_softc *sc); | 1159 | void ath5k_sysfs_unregister(struct ath5k_softc *sc); |
1164 | 1160 | ||
1161 | /* base.c */ | ||
1162 | struct ath5k_buf; | ||
1163 | struct ath5k_txq; | ||
1164 | |||
1165 | void set_beacon_filter(struct ieee80211_hw *hw, bool enable); | ||
1166 | bool ath_any_vif_assoc(struct ath5k_softc *sc); | ||
1167 | int ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb, | ||
1168 | struct ath5k_txq *txq); | ||
1169 | int ath5k_init_hw(struct ath5k_softc *sc); | ||
1170 | int ath5k_stop_hw(struct ath5k_softc *sc); | ||
1171 | void ath5k_mode_setup(struct ath5k_softc *sc, struct ieee80211_vif *vif); | ||
1172 | void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, | ||
1173 | struct ieee80211_vif *vif); | ||
1174 | int ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan); | ||
1175 | void ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf); | ||
1176 | int ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif); | ||
1177 | void ath5k_beacon_config(struct ath5k_softc *sc); | ||
1178 | void ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf); | ||
1179 | void ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf); | ||
1180 | |||
1165 | /*Chip id helper functions */ | 1181 | /*Chip id helper functions */ |
1166 | const char *ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val); | 1182 | const char *ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val); |
1167 | int ath5k_hw_read_srev(struct ath5k_hw *ah); | 1183 | int ath5k_hw_read_srev(struct ath5k_hw *ah); |
@@ -1250,6 +1266,8 @@ int ath5k_hw_set_tx_queueprops(struct ath5k_hw *ah, int queue, | |||
1250 | int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, | 1266 | int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, |
1251 | enum ath5k_tx_queue queue_type, | 1267 | enum ath5k_tx_queue queue_type, |
1252 | struct ath5k_txq_info *queue_info); | 1268 | struct ath5k_txq_info *queue_info); |
1269 | void ath5k_hw_set_tx_retry_limits(struct ath5k_hw *ah, | ||
1270 | unsigned int queue); | ||
1253 | u32 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue); | 1271 | u32 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue); |
1254 | void ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue); | 1272 | void ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue); |
1255 | int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue); | 1273 | int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue); |
diff --git a/drivers/net/wireless/ath/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c index cdac5cff0177..c71fdbb4c439 100644 --- a/drivers/net/wireless/ath/ath5k/attach.c +++ b/drivers/net/wireless/ath/ath5k/attach.c | |||
@@ -118,8 +118,8 @@ int ath5k_hw_init(struct ath5k_softc *sc) | |||
118 | ah->ah_bwmode = AR5K_BWMODE_DEFAULT; | 118 | ah->ah_bwmode = AR5K_BWMODE_DEFAULT; |
119 | ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER; | 119 | ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER; |
120 | ah->ah_imr = 0; | 120 | ah->ah_imr = 0; |
121 | ah->ah_limit_tx_retries = AR5K_INIT_TX_RETRY; | 121 | ah->ah_retry_short = AR5K_INIT_RETRY_SHORT; |
122 | ah->ah_software_retry = false; | 122 | ah->ah_retry_long = AR5K_INIT_RETRY_LONG; |
123 | ah->ah_ant_mode = AR5K_ANTMODE_DEFAULT; | 123 | ah->ah_ant_mode = AR5K_ANTMODE_DEFAULT; |
124 | ah->ah_noise_floor = -95; /* until first NF calibration is run */ | 124 | ah->ah_noise_floor = -95; /* until first NF calibration is run */ |
125 | sc->ani_state.ani_mode = ATH5K_ANI_MODE_AUTO; | 125 | sc->ani_state.ani_mode = ATH5K_ANI_MODE_AUTO; |
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c index 09ae4ef0fd51..dbc45e085434 100644 --- a/drivers/net/wireless/ath/ath5k/base.c +++ b/drivers/net/wireless/ath/ath5k/base.c | |||
@@ -61,6 +61,9 @@ | |||
61 | #include "debug.h" | 61 | #include "debug.h" |
62 | #include "ani.h" | 62 | #include "ani.h" |
63 | 63 | ||
64 | #define CREATE_TRACE_POINTS | ||
65 | #include "trace.h" | ||
66 | |||
64 | int ath5k_modparam_nohwcrypt; | 67 | int ath5k_modparam_nohwcrypt; |
65 | module_param_named(nohwcrypt, ath5k_modparam_nohwcrypt, bool, S_IRUGO); | 68 | module_param_named(nohwcrypt, ath5k_modparam_nohwcrypt, bool, S_IRUGO); |
66 | MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); | 69 | MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); |
@@ -242,73 +245,68 @@ static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *re | |||
242 | \********************/ | 245 | \********************/ |
243 | 246 | ||
244 | /* | 247 | /* |
245 | * Convert IEEE channel number to MHz frequency. | ||
246 | */ | ||
247 | static inline short | ||
248 | ath5k_ieee2mhz(short chan) | ||
249 | { | ||
250 | if (chan <= 14 || chan >= 27) | ||
251 | return ieee80211chan2mhz(chan); | ||
252 | else | ||
253 | return 2212 + chan * 20; | ||
254 | } | ||
255 | |||
256 | /* | ||
257 | * Returns true for the channel numbers used without all_channels modparam. | 248 | * Returns true for the channel numbers used without all_channels modparam. |
258 | */ | 249 | */ |
259 | static bool ath5k_is_standard_channel(short chan) | 250 | static bool ath5k_is_standard_channel(short chan, enum ieee80211_band band) |
260 | { | 251 | { |
261 | return ((chan <= 14) || | 252 | if (band == IEEE80211_BAND_2GHZ && chan <= 14) |
262 | /* UNII 1,2 */ | 253 | return true; |
263 | ((chan & 3) == 0 && chan >= 36 && chan <= 64) || | 254 | |
255 | return /* UNII 1,2 */ | ||
256 | (((chan & 3) == 0 && chan >= 36 && chan <= 64) || | ||
264 | /* midband */ | 257 | /* midband */ |
265 | ((chan & 3) == 0 && chan >= 100 && chan <= 140) || | 258 | ((chan & 3) == 0 && chan >= 100 && chan <= 140) || |
266 | /* UNII-3 */ | 259 | /* UNII-3 */ |
267 | ((chan & 3) == 1 && chan >= 149 && chan <= 165)); | 260 | ((chan & 3) == 1 && chan >= 149 && chan <= 165) || |
261 | /* 802.11j 5.030-5.080 GHz (20MHz) */ | ||
262 | (chan == 8 || chan == 12 || chan == 16) || | ||
263 | /* 802.11j 4.9GHz (20MHz) */ | ||
264 | (chan == 184 || chan == 188 || chan == 192 || chan == 196)); | ||
268 | } | 265 | } |
269 | 266 | ||
270 | static unsigned int | 267 | static unsigned int |
271 | ath5k_copy_channels(struct ath5k_hw *ah, | 268 | ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels, |
272 | struct ieee80211_channel *channels, | 269 | unsigned int mode, unsigned int max) |
273 | unsigned int mode, | ||
274 | unsigned int max) | ||
275 | { | 270 | { |
276 | unsigned int i, count, size, chfreq, freq, ch; | 271 | unsigned int count, size, chfreq, freq, ch; |
277 | 272 | enum ieee80211_band band; | |
278 | if (!test_bit(mode, ah->ah_modes)) | ||
279 | return 0; | ||
280 | 273 | ||
281 | switch (mode) { | 274 | switch (mode) { |
282 | case AR5K_MODE_11A: | 275 | case AR5K_MODE_11A: |
283 | /* 1..220, but 2GHz frequencies are filtered by check_channel */ | 276 | /* 1..220, but 2GHz frequencies are filtered by check_channel */ |
284 | size = 220 ; | 277 | size = 220; |
285 | chfreq = CHANNEL_5GHZ; | 278 | chfreq = CHANNEL_5GHZ; |
279 | band = IEEE80211_BAND_5GHZ; | ||
286 | break; | 280 | break; |
287 | case AR5K_MODE_11B: | 281 | case AR5K_MODE_11B: |
288 | case AR5K_MODE_11G: | 282 | case AR5K_MODE_11G: |
289 | size = 26; | 283 | size = 26; |
290 | chfreq = CHANNEL_2GHZ; | 284 | chfreq = CHANNEL_2GHZ; |
285 | band = IEEE80211_BAND_2GHZ; | ||
291 | break; | 286 | break; |
292 | default: | 287 | default: |
293 | ATH5K_WARN(ah->ah_sc, "bad mode, not copying channels\n"); | 288 | ATH5K_WARN(ah->ah_sc, "bad mode, not copying channels\n"); |
294 | return 0; | 289 | return 0; |
295 | } | 290 | } |
296 | 291 | ||
297 | for (i = 0, count = 0; i < size && max > 0; i++) { | 292 | count = 0; |
298 | ch = i + 1 ; | 293 | for (ch = 1; ch <= size && count < max; ch++) { |
299 | freq = ath5k_ieee2mhz(ch); | 294 | freq = ieee80211_channel_to_frequency(ch, band); |
295 | |||
296 | if (freq == 0) /* mapping failed - not a standard channel */ | ||
297 | continue; | ||
300 | 298 | ||
301 | /* Check if channel is supported by the chipset */ | 299 | /* Check if channel is supported by the chipset */ |
302 | if (!ath5k_channel_ok(ah, freq, chfreq)) | 300 | if (!ath5k_channel_ok(ah, freq, chfreq)) |
303 | continue; | 301 | continue; |
304 | 302 | ||
305 | if (!modparam_all_channels && !ath5k_is_standard_channel(ch)) | 303 | if (!modparam_all_channels && |
304 | !ath5k_is_standard_channel(ch, band)) | ||
306 | continue; | 305 | continue; |
307 | 306 | ||
308 | /* Write channel info and increment counter */ | 307 | /* Write channel info and increment counter */ |
309 | channels[count].center_freq = freq; | 308 | channels[count].center_freq = freq; |
310 | channels[count].band = (chfreq == CHANNEL_2GHZ) ? | 309 | channels[count].band = band; |
311 | IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ; | ||
312 | switch (mode) { | 310 | switch (mode) { |
313 | case AR5K_MODE_11A: | 311 | case AR5K_MODE_11A: |
314 | case AR5K_MODE_11G: | 312 | case AR5K_MODE_11G: |
@@ -319,7 +317,6 @@ ath5k_copy_channels(struct ath5k_hw *ah, | |||
319 | } | 317 | } |
320 | 318 | ||
321 | count++; | 319 | count++; |
322 | max--; | ||
323 | } | 320 | } |
324 | 321 | ||
325 | return count; | 322 | return count; |
@@ -364,7 +361,7 @@ ath5k_setup_bands(struct ieee80211_hw *hw) | |||
364 | sband->n_bitrates = 12; | 361 | sband->n_bitrates = 12; |
365 | 362 | ||
366 | sband->channels = sc->channels; | 363 | sband->channels = sc->channels; |
367 | sband->n_channels = ath5k_copy_channels(ah, sband->channels, | 364 | sband->n_channels = ath5k_setup_channels(ah, sband->channels, |
368 | AR5K_MODE_11G, max_c); | 365 | AR5K_MODE_11G, max_c); |
369 | 366 | ||
370 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband; | 367 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband; |
@@ -390,7 +387,7 @@ ath5k_setup_bands(struct ieee80211_hw *hw) | |||
390 | } | 387 | } |
391 | 388 | ||
392 | sband->channels = sc->channels; | 389 | sband->channels = sc->channels; |
393 | sband->n_channels = ath5k_copy_channels(ah, sband->channels, | 390 | sband->n_channels = ath5k_setup_channels(ah, sband->channels, |
394 | AR5K_MODE_11B, max_c); | 391 | AR5K_MODE_11B, max_c); |
395 | 392 | ||
396 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband; | 393 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband; |
@@ -410,7 +407,7 @@ ath5k_setup_bands(struct ieee80211_hw *hw) | |||
410 | sband->n_bitrates = 8; | 407 | sband->n_bitrates = 8; |
411 | 408 | ||
412 | sband->channels = &sc->channels[count_c]; | 409 | sband->channels = &sc->channels[count_c]; |
413 | sband->n_channels = ath5k_copy_channels(ah, sband->channels, | 410 | sband->n_channels = ath5k_setup_channels(ah, sband->channels, |
414 | AR5K_MODE_11A, max_c); | 411 | AR5K_MODE_11A, max_c); |
415 | 412 | ||
416 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband; | 413 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband; |
@@ -445,18 +442,6 @@ ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan) | |||
445 | return ath5k_reset(sc, chan, true); | 442 | return ath5k_reset(sc, chan, true); |
446 | } | 443 | } |
447 | 444 | ||
448 | static void | ||
449 | ath5k_setcurmode(struct ath5k_softc *sc, unsigned int mode) | ||
450 | { | ||
451 | sc->curmode = mode; | ||
452 | |||
453 | if (mode == AR5K_MODE_11A) { | ||
454 | sc->curband = &sc->sbands[IEEE80211_BAND_5GHZ]; | ||
455 | } else { | ||
456 | sc->curband = &sc->sbands[IEEE80211_BAND_2GHZ]; | ||
457 | } | ||
458 | } | ||
459 | |||
460 | struct ath_vif_iter_data { | 445 | struct ath_vif_iter_data { |
461 | const u8 *hw_macaddr; | 446 | const u8 *hw_macaddr; |
462 | u8 mask[ETH_ALEN]; | 447 | u8 mask[ETH_ALEN]; |
@@ -569,7 +554,7 @@ ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix) | |||
569 | "hw_rix out of bounds: %x\n", hw_rix)) | 554 | "hw_rix out of bounds: %x\n", hw_rix)) |
570 | return 0; | 555 | return 0; |
571 | 556 | ||
572 | rix = sc->rate_idx[sc->curband->band][hw_rix]; | 557 | rix = sc->rate_idx[sc->curchan->band][hw_rix]; |
573 | if (WARN(rix < 0, "invalid hw_rix: %x\n", hw_rix)) | 558 | if (WARN(rix < 0, "invalid hw_rix: %x\n", hw_rix)) |
574 | rix = 0; | 559 | rix = 0; |
575 | 560 | ||
@@ -1379,7 +1364,7 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb, | |||
1379 | rxs->flag |= RX_FLAG_TSFT; | 1364 | rxs->flag |= RX_FLAG_TSFT; |
1380 | 1365 | ||
1381 | rxs->freq = sc->curchan->center_freq; | 1366 | rxs->freq = sc->curchan->center_freq; |
1382 | rxs->band = sc->curband->band; | 1367 | rxs->band = sc->curchan->band; |
1383 | 1368 | ||
1384 | rxs->signal = sc->ah->ah_noise_floor + rs->rs_rssi; | 1369 | rxs->signal = sc->ah->ah_noise_floor + rs->rs_rssi; |
1385 | 1370 | ||
@@ -1394,10 +1379,10 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb, | |||
1394 | rxs->flag |= ath5k_rx_decrypted(sc, skb, rs); | 1379 | rxs->flag |= ath5k_rx_decrypted(sc, skb, rs); |
1395 | 1380 | ||
1396 | if (rxs->rate_idx >= 0 && rs->rs_rate == | 1381 | if (rxs->rate_idx >= 0 && rs->rs_rate == |
1397 | sc->curband->bitrates[rxs->rate_idx].hw_value_short) | 1382 | sc->sbands[sc->curchan->band].bitrates[rxs->rate_idx].hw_value_short) |
1398 | rxs->flag |= RX_FLAG_SHORTPRE; | 1383 | rxs->flag |= RX_FLAG_SHORTPRE; |
1399 | 1384 | ||
1400 | ath5k_debug_dump_skb(sc, skb, "RX ", 0); | 1385 | trace_ath5k_rx(sc, skb); |
1401 | 1386 | ||
1402 | ath5k_update_beacon_rssi(sc, skb, rs->rs_rssi); | 1387 | ath5k_update_beacon_rssi(sc, skb, rs->rs_rssi); |
1403 | 1388 | ||
@@ -1542,7 +1527,7 @@ ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
1542 | unsigned long flags; | 1527 | unsigned long flags; |
1543 | int padsize; | 1528 | int padsize; |
1544 | 1529 | ||
1545 | ath5k_debug_dump_skb(sc, skb, "TX ", 1); | 1530 | trace_ath5k_tx(sc, skb, txq); |
1546 | 1531 | ||
1547 | /* | 1532 | /* |
1548 | * The hardware expects the header padded to 4 byte boundaries. | 1533 | * The hardware expects the header padded to 4 byte boundaries. |
@@ -1591,7 +1576,7 @@ drop_packet: | |||
1591 | 1576 | ||
1592 | static void | 1577 | static void |
1593 | ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb, | 1578 | ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb, |
1594 | struct ath5k_tx_status *ts) | 1579 | struct ath5k_txq *txq, struct ath5k_tx_status *ts) |
1595 | { | 1580 | { |
1596 | struct ieee80211_tx_info *info; | 1581 | struct ieee80211_tx_info *info; |
1597 | int i; | 1582 | int i; |
@@ -1643,6 +1628,7 @@ ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb, | |||
1643 | else | 1628 | else |
1644 | sc->stats.antenna_tx[0]++; /* invalid */ | 1629 | sc->stats.antenna_tx[0]++; /* invalid */ |
1645 | 1630 | ||
1631 | trace_ath5k_tx_complete(sc, skb, txq, ts); | ||
1646 | ieee80211_tx_status(sc->hw, skb); | 1632 | ieee80211_tx_status(sc->hw, skb); |
1647 | } | 1633 | } |
1648 | 1634 | ||
@@ -1679,7 +1665,7 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq) | |||
1679 | 1665 | ||
1680 | dma_unmap_single(sc->dev, bf->skbaddr, skb->len, | 1666 | dma_unmap_single(sc->dev, bf->skbaddr, skb->len, |
1681 | DMA_TO_DEVICE); | 1667 | DMA_TO_DEVICE); |
1682 | ath5k_tx_frame_completed(sc, skb, &ts); | 1668 | ath5k_tx_frame_completed(sc, skb, txq, &ts); |
1683 | } | 1669 | } |
1684 | 1670 | ||
1685 | /* | 1671 | /* |
@@ -1821,8 +1807,6 @@ ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif) | |||
1821 | goto out; | 1807 | goto out; |
1822 | } | 1808 | } |
1823 | 1809 | ||
1824 | ath5k_debug_dump_skb(sc, skb, "BC ", 1); | ||
1825 | |||
1826 | ath5k_txbuf_free_skb(sc, avf->bbuf); | 1810 | ath5k_txbuf_free_skb(sc, avf->bbuf); |
1827 | avf->bbuf->skb = skb; | 1811 | avf->bbuf->skb = skb; |
1828 | ret = ath5k_beacon_setup(sc, avf->bbuf); | 1812 | ret = ath5k_beacon_setup(sc, avf->bbuf); |
@@ -1917,6 +1901,8 @@ ath5k_beacon_send(struct ath5k_softc *sc) | |||
1917 | sc->opmode == NL80211_IFTYPE_MESH_POINT) | 1901 | sc->opmode == NL80211_IFTYPE_MESH_POINT) |
1918 | ath5k_beacon_update(sc->hw, vif); | 1902 | ath5k_beacon_update(sc->hw, vif); |
1919 | 1903 | ||
1904 | trace_ath5k_tx(sc, bf->skb, &sc->txqs[sc->bhalq]); | ||
1905 | |||
1920 | ath5k_hw_set_txdp(ah, sc->bhalq, bf->daddr); | 1906 | ath5k_hw_set_txdp(ah, sc->bhalq, bf->daddr); |
1921 | ath5k_hw_start_tx_dma(ah, sc->bhalq); | 1907 | ath5k_hw_start_tx_dma(ah, sc->bhalq); |
1922 | ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n", | 1908 | ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n", |
@@ -2417,7 +2403,8 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops) | |||
2417 | /* set up multi-rate retry capabilities */ | 2403 | /* set up multi-rate retry capabilities */ |
2418 | if (sc->ah->ah_version == AR5K_AR5212) { | 2404 | if (sc->ah->ah_version == AR5K_AR5212) { |
2419 | hw->max_rates = 4; | 2405 | hw->max_rates = 4; |
2420 | hw->max_rate_tries = 11; | 2406 | hw->max_rate_tries = max(AR5K_INIT_RETRY_SHORT, |
2407 | AR5K_INIT_RETRY_LONG); | ||
2421 | } | 2408 | } |
2422 | 2409 | ||
2423 | hw->vif_data_size = sizeof(struct ath5k_vif); | 2410 | hw->vif_data_size = sizeof(struct ath5k_vif); |
@@ -2554,7 +2541,6 @@ ath5k_init_hw(struct ath5k_softc *sc) | |||
2554 | * and then setup of the interrupt mask. | 2541 | * and then setup of the interrupt mask. |
2555 | */ | 2542 | */ |
2556 | sc->curchan = sc->hw->conf.channel; | 2543 | sc->curchan = sc->hw->conf.channel; |
2557 | sc->curband = &sc->sbands[sc->curchan->band]; | ||
2558 | sc->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL | | 2544 | sc->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL | |
2559 | AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL | | 2545 | AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL | |
2560 | AR5K_INT_FATAL | AR5K_INT_GLOBAL | AR5K_INT_MIB; | 2546 | AR5K_INT_FATAL | AR5K_INT_GLOBAL | AR5K_INT_MIB; |
@@ -2681,10 +2667,8 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan, | |||
2681 | * so we should also free any remaining | 2667 | * so we should also free any remaining |
2682 | * tx buffers */ | 2668 | * tx buffers */ |
2683 | ath5k_drain_tx_buffs(sc); | 2669 | ath5k_drain_tx_buffs(sc); |
2684 | if (chan) { | 2670 | if (chan) |
2685 | sc->curchan = chan; | 2671 | sc->curchan = chan; |
2686 | sc->curband = &sc->sbands[chan->band]; | ||
2687 | } | ||
2688 | ret = ath5k_hw_reset(ah, sc->opmode, sc->curchan, chan != NULL, | 2672 | ret = ath5k_hw_reset(ah, sc->opmode, sc->curchan, chan != NULL, |
2689 | skip_pcu); | 2673 | skip_pcu); |
2690 | if (ret) { | 2674 | if (ret) { |
@@ -2782,12 +2766,6 @@ ath5k_init(struct ieee80211_hw *hw) | |||
2782 | goto err; | 2766 | goto err; |
2783 | } | 2767 | } |
2784 | 2768 | ||
2785 | /* NB: setup here so ath5k_rate_update is happy */ | ||
2786 | if (test_bit(AR5K_MODE_11A, ah->ah_modes)) | ||
2787 | ath5k_setcurmode(sc, AR5K_MODE_11A); | ||
2788 | else | ||
2789 | ath5k_setcurmode(sc, AR5K_MODE_11B); | ||
2790 | |||
2791 | /* | 2769 | /* |
2792 | * Allocate tx+rx descriptors and populate the lists. | 2770 | * Allocate tx+rx descriptors and populate the lists. |
2793 | */ | 2771 | */ |
diff --git a/drivers/net/wireless/ath/ath5k/base.h b/drivers/net/wireless/ath/ath5k/base.h index 6d511476e4d2..8f919dca95f1 100644 --- a/drivers/net/wireless/ath/ath5k/base.h +++ b/drivers/net/wireless/ath/ath5k/base.h | |||
@@ -183,8 +183,6 @@ struct ath5k_softc { | |||
183 | enum nl80211_iftype opmode; | 183 | enum nl80211_iftype opmode; |
184 | struct ath5k_hw *ah; /* Atheros HW */ | 184 | struct ath5k_hw *ah; /* Atheros HW */ |
185 | 185 | ||
186 | struct ieee80211_supported_band *curband; | ||
187 | |||
188 | #ifdef CONFIG_ATH5K_DEBUG | 186 | #ifdef CONFIG_ATH5K_DEBUG |
189 | struct ath5k_dbg_info debug; /* debug info */ | 187 | struct ath5k_dbg_info debug; /* debug info */ |
190 | #endif /* CONFIG_ATH5K_DEBUG */ | 188 | #endif /* CONFIG_ATH5K_DEBUG */ |
@@ -202,7 +200,6 @@ struct ath5k_softc { | |||
202 | #define ATH_STAT_STARTED 4 /* opened & irqs enabled */ | 200 | #define ATH_STAT_STARTED 4 /* opened & irqs enabled */ |
203 | 201 | ||
204 | unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */ | 202 | unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */ |
205 | unsigned int curmode; /* current phy mode */ | ||
206 | struct ieee80211_channel *curchan; /* current h/w channel */ | 203 | struct ieee80211_channel *curchan; /* current h/w channel */ |
207 | 204 | ||
208 | u16 nvifs; | 205 | u16 nvifs; |
diff --git a/drivers/net/wireless/ath/ath5k/caps.c b/drivers/net/wireless/ath/ath5k/caps.c index 31cad80e9b01..f77e8a703c5c 100644 --- a/drivers/net/wireless/ath/ath5k/caps.c +++ b/drivers/net/wireless/ath/ath5k/caps.c | |||
@@ -32,23 +32,24 @@ | |||
32 | */ | 32 | */ |
33 | int ath5k_hw_set_capabilities(struct ath5k_hw *ah) | 33 | int ath5k_hw_set_capabilities(struct ath5k_hw *ah) |
34 | { | 34 | { |
35 | struct ath5k_capabilities *caps = &ah->ah_capabilities; | ||
35 | u16 ee_header; | 36 | u16 ee_header; |
36 | 37 | ||
37 | /* Capabilities stored in the EEPROM */ | 38 | /* Capabilities stored in the EEPROM */ |
38 | ee_header = ah->ah_capabilities.cap_eeprom.ee_header; | 39 | ee_header = caps->cap_eeprom.ee_header; |
39 | 40 | ||
40 | if (ah->ah_version == AR5K_AR5210) { | 41 | if (ah->ah_version == AR5K_AR5210) { |
41 | /* | 42 | /* |
42 | * Set radio capabilities | 43 | * Set radio capabilities |
43 | * (The AR5110 only supports the middle 5GHz band) | 44 | * (The AR5110 only supports the middle 5GHz band) |
44 | */ | 45 | */ |
45 | ah->ah_capabilities.cap_range.range_5ghz_min = 5120; | 46 | caps->cap_range.range_5ghz_min = 5120; |
46 | ah->ah_capabilities.cap_range.range_5ghz_max = 5430; | 47 | caps->cap_range.range_5ghz_max = 5430; |
47 | ah->ah_capabilities.cap_range.range_2ghz_min = 0; | 48 | caps->cap_range.range_2ghz_min = 0; |
48 | ah->ah_capabilities.cap_range.range_2ghz_max = 0; | 49 | caps->cap_range.range_2ghz_max = 0; |
49 | 50 | ||
50 | /* Set supported modes */ | 51 | /* Set supported modes */ |
51 | __set_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode); | 52 | __set_bit(AR5K_MODE_11A, caps->cap_mode); |
52 | } else { | 53 | } else { |
53 | /* | 54 | /* |
54 | * XXX The tranceiver supports frequencies from 4920 to 6100GHz | 55 | * XXX The tranceiver supports frequencies from 4920 to 6100GHz |
@@ -56,9 +57,8 @@ int ath5k_hw_set_capabilities(struct ath5k_hw *ah) | |||
56 | * XXX current ieee80211 implementation because the IEEE | 57 | * XXX current ieee80211 implementation because the IEEE |
57 | * XXX channel mapping does not support negative channel | 58 | * XXX channel mapping does not support negative channel |
58 | * XXX numbers (2312MHz is channel -19). Of course, this | 59 | * XXX numbers (2312MHz is channel -19). Of course, this |
59 | * XXX doesn't matter because these channels are out of range | 60 | * XXX doesn't matter because these channels are out of the |
60 | * XXX but some regulation domains like MKK (Japan) will | 61 | * XXX legal range. |
61 | * XXX support frequencies somewhere around 4.8GHz. | ||
62 | */ | 62 | */ |
63 | 63 | ||
64 | /* | 64 | /* |
@@ -66,13 +66,14 @@ int ath5k_hw_set_capabilities(struct ath5k_hw *ah) | |||
66 | */ | 66 | */ |
67 | 67 | ||
68 | if (AR5K_EEPROM_HDR_11A(ee_header)) { | 68 | if (AR5K_EEPROM_HDR_11A(ee_header)) { |
69 | /* 4920 */ | 69 | if (ath_is_49ghz_allowed(caps->cap_eeprom.ee_regdomain)) |
70 | ah->ah_capabilities.cap_range.range_5ghz_min = 5005; | 70 | caps->cap_range.range_5ghz_min = 4920; |
71 | ah->ah_capabilities.cap_range.range_5ghz_max = 6100; | 71 | else |
72 | caps->cap_range.range_5ghz_min = 5005; | ||
73 | caps->cap_range.range_5ghz_max = 6100; | ||
72 | 74 | ||
73 | /* Set supported modes */ | 75 | /* Set supported modes */ |
74 | __set_bit(AR5K_MODE_11A, | 76 | __set_bit(AR5K_MODE_11A, caps->cap_mode); |
75 | ah->ah_capabilities.cap_mode); | ||
76 | } | 77 | } |
77 | 78 | ||
78 | /* Enable 802.11b if a 2GHz capable radio (2111/5112) is | 79 | /* Enable 802.11b if a 2GHz capable radio (2111/5112) is |
@@ -81,32 +82,29 @@ int ath5k_hw_set_capabilities(struct ath5k_hw *ah) | |||
81 | (AR5K_EEPROM_HDR_11G(ee_header) && | 82 | (AR5K_EEPROM_HDR_11G(ee_header) && |
82 | ah->ah_version != AR5K_AR5211)) { | 83 | ah->ah_version != AR5K_AR5211)) { |
83 | /* 2312 */ | 84 | /* 2312 */ |
84 | ah->ah_capabilities.cap_range.range_2ghz_min = 2412; | 85 | caps->cap_range.range_2ghz_min = 2412; |
85 | ah->ah_capabilities.cap_range.range_2ghz_max = 2732; | 86 | caps->cap_range.range_2ghz_max = 2732; |
86 | 87 | ||
87 | if (AR5K_EEPROM_HDR_11B(ee_header)) | 88 | if (AR5K_EEPROM_HDR_11B(ee_header)) |
88 | __set_bit(AR5K_MODE_11B, | 89 | __set_bit(AR5K_MODE_11B, caps->cap_mode); |
89 | ah->ah_capabilities.cap_mode); | ||
90 | 90 | ||
91 | if (AR5K_EEPROM_HDR_11G(ee_header) && | 91 | if (AR5K_EEPROM_HDR_11G(ee_header) && |
92 | ah->ah_version != AR5K_AR5211) | 92 | ah->ah_version != AR5K_AR5211) |
93 | __set_bit(AR5K_MODE_11G, | 93 | __set_bit(AR5K_MODE_11G, caps->cap_mode); |
94 | ah->ah_capabilities.cap_mode); | ||
95 | } | 94 | } |
96 | } | 95 | } |
97 | 96 | ||
98 | /* Set number of supported TX queues */ | 97 | /* Set number of supported TX queues */ |
99 | if (ah->ah_version == AR5K_AR5210) | 98 | if (ah->ah_version == AR5K_AR5210) |
100 | ah->ah_capabilities.cap_queues.q_tx_num = | 99 | caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES_NOQCU; |
101 | AR5K_NUM_TX_QUEUES_NOQCU; | ||
102 | else | 100 | else |
103 | ah->ah_capabilities.cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES; | 101 | caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES; |
104 | 102 | ||
105 | /* newer hardware has PHY error counters */ | 103 | /* newer hardware has PHY error counters */ |
106 | if (ah->ah_mac_srev >= AR5K_SREV_AR5213A) | 104 | if (ah->ah_mac_srev >= AR5K_SREV_AR5213A) |
107 | ah->ah_capabilities.cap_has_phyerr_counters = true; | 105 | caps->cap_has_phyerr_counters = true; |
108 | else | 106 | else |
109 | ah->ah_capabilities.cap_has_phyerr_counters = false; | 107 | caps->cap_has_phyerr_counters = false; |
110 | 108 | ||
111 | return 0; | 109 | return 0; |
112 | } | 110 | } |
diff --git a/drivers/net/wireless/ath/ath5k/debug.c b/drivers/net/wireless/ath/ath5k/debug.c index d2f84d76bb07..0230f30e9e9a 100644 --- a/drivers/net/wireless/ath/ath5k/debug.c +++ b/drivers/net/wireless/ath/ath5k/debug.c | |||
@@ -308,8 +308,6 @@ static const struct { | |||
308 | { ATH5K_DEBUG_CALIBRATE, "calib", "periodic calibration" }, | 308 | { ATH5K_DEBUG_CALIBRATE, "calib", "periodic calibration" }, |
309 | { ATH5K_DEBUG_TXPOWER, "txpower", "transmit power setting" }, | 309 | { ATH5K_DEBUG_TXPOWER, "txpower", "transmit power setting" }, |
310 | { ATH5K_DEBUG_LED, "led", "LED management" }, | 310 | { ATH5K_DEBUG_LED, "led", "LED management" }, |
311 | { ATH5K_DEBUG_DUMP_RX, "dumprx", "print received skb content" }, | ||
312 | { ATH5K_DEBUG_DUMP_TX, "dumptx", "print transmit skb content" }, | ||
313 | { ATH5K_DEBUG_DUMPBANDS, "dumpbands", "dump bands" }, | 311 | { ATH5K_DEBUG_DUMPBANDS, "dumpbands", "dump bands" }, |
314 | { ATH5K_DEBUG_DMA, "dma", "dma start/stop" }, | 312 | { ATH5K_DEBUG_DMA, "dma", "dma start/stop" }, |
315 | { ATH5K_DEBUG_ANI, "ani", "adaptive noise immunity" }, | 313 | { ATH5K_DEBUG_ANI, "ani", "adaptive noise immunity" }, |
@@ -1036,24 +1034,6 @@ ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah) | |||
1036 | } | 1034 | } |
1037 | 1035 | ||
1038 | void | 1036 | void |
1039 | ath5k_debug_dump_skb(struct ath5k_softc *sc, | ||
1040 | struct sk_buff *skb, const char *prefix, int tx) | ||
1041 | { | ||
1042 | char buf[16]; | ||
1043 | |||
1044 | if (likely(!((tx && (sc->debug.level & ATH5K_DEBUG_DUMP_TX)) || | ||
1045 | (!tx && (sc->debug.level & ATH5K_DEBUG_DUMP_RX))))) | ||
1046 | return; | ||
1047 | |||
1048 | snprintf(buf, sizeof(buf), "%s %s", wiphy_name(sc->hw->wiphy), prefix); | ||
1049 | |||
1050 | print_hex_dump_bytes(buf, DUMP_PREFIX_NONE, skb->data, | ||
1051 | min(200U, skb->len)); | ||
1052 | |||
1053 | printk(KERN_DEBUG "\n"); | ||
1054 | } | ||
1055 | |||
1056 | void | ||
1057 | ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf) | 1037 | ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf) |
1058 | { | 1038 | { |
1059 | struct ath5k_desc *ds = bf->desc; | 1039 | struct ath5k_desc *ds = bf->desc; |
diff --git a/drivers/net/wireless/ath/ath5k/debug.h b/drivers/net/wireless/ath/ath5k/debug.h index 3e34428d5126..b0355aef68d3 100644 --- a/drivers/net/wireless/ath/ath5k/debug.h +++ b/drivers/net/wireless/ath/ath5k/debug.h | |||
@@ -116,8 +116,6 @@ enum ath5k_debug_level { | |||
116 | ATH5K_DEBUG_CALIBRATE = 0x00000020, | 116 | ATH5K_DEBUG_CALIBRATE = 0x00000020, |
117 | ATH5K_DEBUG_TXPOWER = 0x00000040, | 117 | ATH5K_DEBUG_TXPOWER = 0x00000040, |
118 | ATH5K_DEBUG_LED = 0x00000080, | 118 | ATH5K_DEBUG_LED = 0x00000080, |
119 | ATH5K_DEBUG_DUMP_RX = 0x00000100, | ||
120 | ATH5K_DEBUG_DUMP_TX = 0x00000200, | ||
121 | ATH5K_DEBUG_DUMPBANDS = 0x00000400, | 119 | ATH5K_DEBUG_DUMPBANDS = 0x00000400, |
122 | ATH5K_DEBUG_DMA = 0x00000800, | 120 | ATH5K_DEBUG_DMA = 0x00000800, |
123 | ATH5K_DEBUG_ANI = 0x00002000, | 121 | ATH5K_DEBUG_ANI = 0x00002000, |
@@ -152,10 +150,6 @@ void | |||
152 | ath5k_debug_dump_bands(struct ath5k_softc *sc); | 150 | ath5k_debug_dump_bands(struct ath5k_softc *sc); |
153 | 151 | ||
154 | void | 152 | void |
155 | ath5k_debug_dump_skb(struct ath5k_softc *sc, | ||
156 | struct sk_buff *skb, const char *prefix, int tx); | ||
157 | |||
158 | void | ||
159 | ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf); | 153 | ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf); |
160 | 154 | ||
161 | #else /* no debugging */ | 155 | #else /* no debugging */ |
@@ -182,10 +176,6 @@ static inline void | |||
182 | ath5k_debug_dump_bands(struct ath5k_softc *sc) {} | 176 | ath5k_debug_dump_bands(struct ath5k_softc *sc) {} |
183 | 177 | ||
184 | static inline void | 178 | static inline void |
185 | ath5k_debug_dump_skb(struct ath5k_softc *sc, | ||
186 | struct sk_buff *skb, const char *prefix, int tx) {} | ||
187 | |||
188 | static inline void | ||
189 | ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf) {} | 179 | ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf) {} |
190 | 180 | ||
191 | #endif /* ifdef CONFIG_ATH5K_DEBUG */ | 181 | #endif /* ifdef CONFIG_ATH5K_DEBUG */ |
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c index 80e625608bac..b6561f785c6e 100644 --- a/drivers/net/wireless/ath/ath5k/eeprom.c +++ b/drivers/net/wireless/ath/ath5k/eeprom.c | |||
@@ -72,7 +72,6 @@ static int | |||
72 | ath5k_eeprom_init_header(struct ath5k_hw *ah) | 72 | ath5k_eeprom_init_header(struct ath5k_hw *ah) |
73 | { | 73 | { |
74 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 74 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
75 | int ret; | ||
76 | u16 val; | 75 | u16 val; |
77 | u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX; | 76 | u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX; |
78 | 77 | ||
@@ -192,7 +191,7 @@ static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset, | |||
192 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 191 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
193 | u32 o = *offset; | 192 | u32 o = *offset; |
194 | u16 val; | 193 | u16 val; |
195 | int ret, i = 0; | 194 | int i = 0; |
196 | 195 | ||
197 | AR5K_EEPROM_READ(o++, val); | 196 | AR5K_EEPROM_READ(o++, val); |
198 | ee->ee_switch_settling[mode] = (val >> 8) & 0x7f; | 197 | ee->ee_switch_settling[mode] = (val >> 8) & 0x7f; |
@@ -252,7 +251,6 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset, | |||
252 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 251 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
253 | u32 o = *offset; | 252 | u32 o = *offset; |
254 | u16 val; | 253 | u16 val; |
255 | int ret; | ||
256 | 254 | ||
257 | ee->ee_n_piers[mode] = 0; | 255 | ee->ee_n_piers[mode] = 0; |
258 | AR5K_EEPROM_READ(o++, val); | 256 | AR5K_EEPROM_READ(o++, val); |
@@ -515,7 +513,6 @@ ath5k_eeprom_read_freq_list(struct ath5k_hw *ah, int *offset, int max, | |||
515 | int o = *offset; | 513 | int o = *offset; |
516 | int i = 0; | 514 | int i = 0; |
517 | u8 freq1, freq2; | 515 | u8 freq1, freq2; |
518 | int ret; | ||
519 | u16 val; | 516 | u16 val; |
520 | 517 | ||
521 | ee->ee_n_piers[mode] = 0; | 518 | ee->ee_n_piers[mode] = 0; |
@@ -551,7 +548,7 @@ ath5k_eeprom_init_11a_pcal_freq(struct ath5k_hw *ah, int offset) | |||
551 | { | 548 | { |
552 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 549 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
553 | struct ath5k_chan_pcal_info *pcal = ee->ee_pwr_cal_a; | 550 | struct ath5k_chan_pcal_info *pcal = ee->ee_pwr_cal_a; |
554 | int i, ret; | 551 | int i; |
555 | u16 val; | 552 | u16 val; |
556 | u8 mask; | 553 | u8 mask; |
557 | 554 | ||
@@ -970,7 +967,6 @@ ath5k_eeprom_read_pcal_info_5112(struct ath5k_hw *ah, int mode) | |||
970 | u32 offset; | 967 | u32 offset; |
971 | u8 i, c; | 968 | u8 i, c; |
972 | u16 val; | 969 | u16 val; |
973 | int ret; | ||
974 | u8 pd_gains = 0; | 970 | u8 pd_gains = 0; |
975 | 971 | ||
976 | /* Count how many curves we have and | 972 | /* Count how many curves we have and |
@@ -1228,7 +1224,7 @@ ath5k_eeprom_read_pcal_info_2413(struct ath5k_hw *ah, int mode) | |||
1228 | struct ath5k_chan_pcal_info *chinfo; | 1224 | struct ath5k_chan_pcal_info *chinfo; |
1229 | u8 *pdgain_idx = ee->ee_pdc_to_idx[mode]; | 1225 | u8 *pdgain_idx = ee->ee_pdc_to_idx[mode]; |
1230 | u32 offset; | 1226 | u32 offset; |
1231 | int idx, i, ret; | 1227 | int idx, i; |
1232 | u16 val; | 1228 | u16 val; |
1233 | u8 pd_gains = 0; | 1229 | u8 pd_gains = 0; |
1234 | 1230 | ||
@@ -1419,7 +1415,7 @@ ath5k_eeprom_read_target_rate_pwr_info(struct ath5k_hw *ah, unsigned int mode) | |||
1419 | u8 *rate_target_pwr_num; | 1415 | u8 *rate_target_pwr_num; |
1420 | u32 offset; | 1416 | u32 offset; |
1421 | u16 val; | 1417 | u16 val; |
1422 | int ret, i; | 1418 | int i; |
1423 | 1419 | ||
1424 | offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1); | 1420 | offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1); |
1425 | rate_target_pwr_num = &ee->ee_rate_target_pwr_num[mode]; | 1421 | rate_target_pwr_num = &ee->ee_rate_target_pwr_num[mode]; |
@@ -1593,7 +1589,7 @@ ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah) | |||
1593 | struct ath5k_edge_power *rep; | 1589 | struct ath5k_edge_power *rep; |
1594 | unsigned int fmask, pmask; | 1590 | unsigned int fmask, pmask; |
1595 | unsigned int ctl_mode; | 1591 | unsigned int ctl_mode; |
1596 | int ret, i, j; | 1592 | int i, j; |
1597 | u32 offset; | 1593 | u32 offset; |
1598 | u16 val; | 1594 | u16 val; |
1599 | 1595 | ||
@@ -1733,16 +1729,12 @@ int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) | |||
1733 | u8 mac_d[ETH_ALEN] = {}; | 1729 | u8 mac_d[ETH_ALEN] = {}; |
1734 | u32 total, offset; | 1730 | u32 total, offset; |
1735 | u16 data; | 1731 | u16 data; |
1736 | int octet, ret; | 1732 | int octet; |
1737 | 1733 | ||
1738 | ret = ath5k_hw_nvram_read(ah, 0x20, &data); | 1734 | AR5K_EEPROM_READ(0x20, data); |
1739 | if (ret) | ||
1740 | return ret; | ||
1741 | 1735 | ||
1742 | for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) { | 1736 | for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) { |
1743 | ret = ath5k_hw_nvram_read(ah, offset, &data); | 1737 | AR5K_EEPROM_READ(offset, data); |
1744 | if (ret) | ||
1745 | return ret; | ||
1746 | 1738 | ||
1747 | total += data; | 1739 | total += data; |
1748 | mac_d[octet + 1] = data & 0xff; | 1740 | mac_d[octet + 1] = data & 0xff; |
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.h b/drivers/net/wireless/ath/ath5k/eeprom.h index 7c09e150dbdc..6511c27d938e 100644 --- a/drivers/net/wireless/ath/ath5k/eeprom.h +++ b/drivers/net/wireless/ath/ath5k/eeprom.h | |||
@@ -241,9 +241,8 @@ enum ath5k_eeprom_freq_bands{ | |||
241 | #define AR5K_SPUR_SYMBOL_WIDTH_TURBO_100Hz 6250 | 241 | #define AR5K_SPUR_SYMBOL_WIDTH_TURBO_100Hz 6250 |
242 | 242 | ||
243 | #define AR5K_EEPROM_READ(_o, _v) do { \ | 243 | #define AR5K_EEPROM_READ(_o, _v) do { \ |
244 | ret = ath5k_hw_nvram_read(ah, (_o), &(_v)); \ | 244 | if (!ath5k_hw_nvram_read(ah, (_o), &(_v))) \ |
245 | if (ret) \ | 245 | return -EIO; \ |
246 | return ret; \ | ||
247 | } while (0) | 246 | } while (0) |
248 | 247 | ||
249 | #define AR5K_EEPROM_READ_HDR(_o, _v) \ | 248 | #define AR5K_EEPROM_READ_HDR(_o, _v) \ |
@@ -269,29 +268,6 @@ enum ath5k_ctl_mode { | |||
269 | AR5K_CTL_MODE_M = 15, | 268 | AR5K_CTL_MODE_M = 15, |
270 | }; | 269 | }; |
271 | 270 | ||
272 | /* Default CTL ids for the 3 main reg domains. | ||
273 | * Atheros only uses these by default but vendors | ||
274 | * can have up to 32 different CTLs for different | ||
275 | * scenarios. Note that theese values are ORed with | ||
276 | * the mode id (above) so we can have up to 24 CTL | ||
277 | * datasets out of these 3 main regdomains. That leaves | ||
278 | * 8 ids that can be used by vendors and since 0x20 is | ||
279 | * missing from HAL sources i guess this is the set of | ||
280 | * custom CTLs vendors can use. */ | ||
281 | #define AR5K_CTL_FCC 0x10 | ||
282 | #define AR5K_CTL_CUSTOM 0x20 | ||
283 | #define AR5K_CTL_ETSI 0x30 | ||
284 | #define AR5K_CTL_MKK 0x40 | ||
285 | |||
286 | /* Indicates a CTL with only mode set and | ||
287 | * no reg domain mapping, such CTLs are used | ||
288 | * for world roaming domains or simply when | ||
289 | * a reg domain is not set */ | ||
290 | #define AR5K_CTL_NO_REGDOMAIN 0xf0 | ||
291 | |||
292 | /* Indicates an empty (invalid) CTL */ | ||
293 | #define AR5K_CTL_NO_CTL 0xff | ||
294 | |||
295 | /* Per channel calibration data, used for power table setup */ | 271 | /* Per channel calibration data, used for power table setup */ |
296 | struct ath5k_chan_pcal_info_rf5111 { | 272 | struct ath5k_chan_pcal_info_rf5111 { |
297 | /* Power levels in half dbm units | 273 | /* Power levels in half dbm units |
diff --git a/drivers/net/wireless/ath/ath5k/mac80211-ops.c b/drivers/net/wireless/ath/ath5k/mac80211-ops.c index d76d68c99f72..a60a726a140c 100644 --- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c +++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c | |||
@@ -48,23 +48,6 @@ | |||
48 | 48 | ||
49 | extern int ath5k_modparam_nohwcrypt; | 49 | extern int ath5k_modparam_nohwcrypt; |
50 | 50 | ||
51 | /* functions used from base.c */ | ||
52 | void set_beacon_filter(struct ieee80211_hw *hw, bool enable); | ||
53 | bool ath_any_vif_assoc(struct ath5k_softc *sc); | ||
54 | int ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb, | ||
55 | struct ath5k_txq *txq); | ||
56 | int ath5k_init_hw(struct ath5k_softc *sc); | ||
57 | int ath5k_stop_hw(struct ath5k_softc *sc); | ||
58 | void ath5k_mode_setup(struct ath5k_softc *sc, struct ieee80211_vif *vif); | ||
59 | void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, | ||
60 | struct ieee80211_vif *vif); | ||
61 | int ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan); | ||
62 | void ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf); | ||
63 | int ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif); | ||
64 | void ath5k_beacon_config(struct ath5k_softc *sc); | ||
65 | void ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf); | ||
66 | void ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf); | ||
67 | |||
68 | /********************\ | 51 | /********************\ |
69 | * Mac80211 functions * | 52 | * Mac80211 functions * |
70 | \********************/ | 53 | \********************/ |
@@ -226,6 +209,7 @@ ath5k_config(struct ieee80211_hw *hw, u32 changed) | |||
226 | struct ath5k_hw *ah = sc->ah; | 209 | struct ath5k_hw *ah = sc->ah; |
227 | struct ieee80211_conf *conf = &hw->conf; | 210 | struct ieee80211_conf *conf = &hw->conf; |
228 | int ret = 0; | 211 | int ret = 0; |
212 | int i; | ||
229 | 213 | ||
230 | mutex_lock(&sc->lock); | 214 | mutex_lock(&sc->lock); |
231 | 215 | ||
@@ -243,6 +227,14 @@ ath5k_config(struct ieee80211_hw *hw, u32 changed) | |||
243 | ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2)); | 227 | ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2)); |
244 | } | 228 | } |
245 | 229 | ||
230 | if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) { | ||
231 | ah->ah_retry_long = conf->long_frame_max_tx_count; | ||
232 | ah->ah_retry_short = conf->short_frame_max_tx_count; | ||
233 | |||
234 | for (i = 0; i < ah->ah_capabilities.cap_queues.q_tx_num; i++) | ||
235 | ath5k_hw_set_tx_retry_limits(ah, i); | ||
236 | } | ||
237 | |||
246 | /* TODO: | 238 | /* TODO: |
247 | * 1) Move this on config_interface and handle each case | 239 | * 1) Move this on config_interface and handle each case |
248 | * separately eg. when we have only one STA vif, use | 240 | * separately eg. when we have only one STA vif, use |
diff --git a/drivers/net/wireless/ath/ath5k/pci.c b/drivers/net/wireless/ath/ath5k/pci.c index 7f8c5b0e9d2a..66598a0d1df0 100644 --- a/drivers/net/wireless/ath/ath5k/pci.c +++ b/drivers/net/wireless/ath/ath5k/pci.c | |||
@@ -69,7 +69,8 @@ static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz) | |||
69 | /* | 69 | /* |
70 | * Read from eeprom | 70 | * Read from eeprom |
71 | */ | 71 | */ |
72 | bool ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data) | 72 | static bool |
73 | ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data) | ||
73 | { | 74 | { |
74 | struct ath5k_hw *ah = (struct ath5k_hw *) common->ah; | 75 | struct ath5k_hw *ah = (struct ath5k_hw *) common->ah; |
75 | u32 status, timeout; | 76 | u32 status, timeout; |
@@ -90,15 +91,15 @@ bool ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data) | |||
90 | status = ath5k_hw_reg_read(ah, AR5K_EEPROM_STATUS); | 91 | status = ath5k_hw_reg_read(ah, AR5K_EEPROM_STATUS); |
91 | if (status & AR5K_EEPROM_STAT_RDDONE) { | 92 | if (status & AR5K_EEPROM_STAT_RDDONE) { |
92 | if (status & AR5K_EEPROM_STAT_RDERR) | 93 | if (status & AR5K_EEPROM_STAT_RDERR) |
93 | return -EIO; | 94 | return false; |
94 | *data = (u16)(ath5k_hw_reg_read(ah, AR5K_EEPROM_DATA) & | 95 | *data = (u16)(ath5k_hw_reg_read(ah, AR5K_EEPROM_DATA) & |
95 | 0xffff); | 96 | 0xffff); |
96 | return 0; | 97 | return true; |
97 | } | 98 | } |
98 | udelay(15); | 99 | udelay(15); |
99 | } | 100 | } |
100 | 101 | ||
101 | return -ETIMEDOUT; | 102 | return false; |
102 | } | 103 | } |
103 | 104 | ||
104 | int ath5k_hw_read_srev(struct ath5k_hw *ah) | 105 | int ath5k_hw_read_srev(struct ath5k_hw *ah) |
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c index c44111fc98b7..62ce2f4e8605 100644 --- a/drivers/net/wireless/ath/ath5k/phy.c +++ b/drivers/net/wireless/ath/ath5k/phy.c | |||
@@ -282,6 +282,34 @@ int ath5k_hw_phy_disable(struct ath5k_hw *ah) | |||
282 | return 0; | 282 | return 0; |
283 | } | 283 | } |
284 | 284 | ||
285 | /* | ||
286 | * Wait for synth to settle | ||
287 | */ | ||
288 | static void ath5k_hw_wait_for_synth(struct ath5k_hw *ah, | ||
289 | struct ieee80211_channel *channel) | ||
290 | { | ||
291 | /* | ||
292 | * On 5211+ read activation -> rx delay | ||
293 | * and use it (100ns steps). | ||
294 | */ | ||
295 | if (ah->ah_version != AR5K_AR5210) { | ||
296 | u32 delay; | ||
297 | delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) & | ||
298 | AR5K_PHY_RX_DELAY_M; | ||
299 | delay = (channel->hw_value & CHANNEL_CCK) ? | ||
300 | ((delay << 2) / 22) : (delay / 10); | ||
301 | if (ah->ah_bwmode == AR5K_BWMODE_10MHZ) | ||
302 | delay = delay << 1; | ||
303 | if (ah->ah_bwmode == AR5K_BWMODE_5MHZ) | ||
304 | delay = delay << 2; | ||
305 | /* XXX: /2 on turbo ? Let's be safe | ||
306 | * for now */ | ||
307 | udelay(100 + delay); | ||
308 | } else { | ||
309 | mdelay(1); | ||
310 | } | ||
311 | } | ||
312 | |||
285 | 313 | ||
286 | /**********************\ | 314 | /**********************\ |
287 | * RF Gain optimization * | 315 | * RF Gain optimization * |
@@ -3238,6 +3266,13 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
3238 | /* Failed */ | 3266 | /* Failed */ |
3239 | if (i >= 100) | 3267 | if (i >= 100) |
3240 | return -EIO; | 3268 | return -EIO; |
3269 | |||
3270 | /* Set channel and wait for synth */ | ||
3271 | ret = ath5k_hw_channel(ah, channel); | ||
3272 | if (ret) | ||
3273 | return ret; | ||
3274 | |||
3275 | ath5k_hw_wait_for_synth(ah, channel); | ||
3241 | } | 3276 | } |
3242 | 3277 | ||
3243 | /* | 3278 | /* |
@@ -3252,13 +3287,53 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
3252 | if (ret) | 3287 | if (ret) |
3253 | return ret; | 3288 | return ret; |
3254 | 3289 | ||
3290 | /* Write OFDM timings on 5212*/ | ||
3291 | if (ah->ah_version == AR5K_AR5212 && | ||
3292 | channel->hw_value & CHANNEL_OFDM) { | ||
3293 | |||
3294 | ret = ath5k_hw_write_ofdm_timings(ah, channel); | ||
3295 | if (ret) | ||
3296 | return ret; | ||
3297 | |||
3298 | /* Spur info is available only from EEPROM versions | ||
3299 | * greater than 5.3, but the EEPROM routines will use | ||
3300 | * static values for older versions */ | ||
3301 | if (ah->ah_mac_srev >= AR5K_SREV_AR5424) | ||
3302 | ath5k_hw_set_spur_mitigation_filter(ah, | ||
3303 | channel); | ||
3304 | } | ||
3305 | |||
3306 | /* If we used fast channel switching | ||
3307 | * we are done, release RF bus and | ||
3308 | * fire up NF calibration. | ||
3309 | * | ||
3310 | * Note: Only NF calibration due to | ||
3311 | * channel change, not AGC calibration | ||
3312 | * since AGC is still running ! | ||
3313 | */ | ||
3314 | if (fast) { | ||
3315 | /* | ||
3316 | * Release RF Bus grant | ||
3317 | */ | ||
3318 | AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_RFBUS_REQ, | ||
3319 | AR5K_PHY_RFBUS_REQ_REQUEST); | ||
3320 | |||
3321 | /* | ||
3322 | * Start NF calibration | ||
3323 | */ | ||
3324 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, | ||
3325 | AR5K_PHY_AGCCTL_NF); | ||
3326 | |||
3327 | return ret; | ||
3328 | } | ||
3329 | |||
3255 | /* | 3330 | /* |
3256 | * For 5210 we do all initialization using | 3331 | * For 5210 we do all initialization using |
3257 | * initvals, so we don't have to modify | 3332 | * initvals, so we don't have to modify |
3258 | * any settings (5210 also only supports | 3333 | * any settings (5210 also only supports |
3259 | * a/aturbo modes) | 3334 | * a/aturbo modes) |
3260 | */ | 3335 | */ |
3261 | if ((ah->ah_version != AR5K_AR5210) && !fast) { | 3336 | if (ah->ah_version != AR5K_AR5210) { |
3262 | 3337 | ||
3263 | /* | 3338 | /* |
3264 | * Write initial RF gain settings | 3339 | * Write initial RF gain settings |
@@ -3277,22 +3352,6 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
3277 | if (ret) | 3352 | if (ret) |
3278 | return ret; | 3353 | return ret; |
3279 | 3354 | ||
3280 | /* Write OFDM timings on 5212*/ | ||
3281 | if (ah->ah_version == AR5K_AR5212 && | ||
3282 | channel->hw_value & CHANNEL_OFDM) { | ||
3283 | |||
3284 | ret = ath5k_hw_write_ofdm_timings(ah, channel); | ||
3285 | if (ret) | ||
3286 | return ret; | ||
3287 | |||
3288 | /* Spur info is available only from EEPROM versions | ||
3289 | * greater than 5.3, but the EEPROM routines will use | ||
3290 | * static values for older versions */ | ||
3291 | if (ah->ah_mac_srev >= AR5K_SREV_AR5424) | ||
3292 | ath5k_hw_set_spur_mitigation_filter(ah, | ||
3293 | channel); | ||
3294 | } | ||
3295 | |||
3296 | /*Enable/disable 802.11b mode on 5111 | 3355 | /*Enable/disable 802.11b mode on 5111 |
3297 | (enable 2111 frequency converter + CCK)*/ | 3356 | (enable 2111 frequency converter + CCK)*/ |
3298 | if (ah->ah_radio == AR5K_RF5111) { | 3357 | if (ah->ah_radio == AR5K_RF5111) { |
@@ -3323,47 +3382,20 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
3323 | */ | 3382 | */ |
3324 | ath5k_hw_reg_write(ah, AR5K_PHY_ACT_ENABLE, AR5K_PHY_ACT); | 3383 | ath5k_hw_reg_write(ah, AR5K_PHY_ACT_ENABLE, AR5K_PHY_ACT); |
3325 | 3384 | ||
3385 | ath5k_hw_wait_for_synth(ah, channel); | ||
3386 | |||
3326 | /* | 3387 | /* |
3327 | * On 5211+ read activation -> rx delay | 3388 | * Perform ADC test to see if baseband is ready |
3328 | * and use it. | 3389 | * Set tx hold and check adc test register |
3329 | */ | 3390 | */ |
3330 | if (ah->ah_version != AR5K_AR5210) { | 3391 | phy_tst1 = ath5k_hw_reg_read(ah, AR5K_PHY_TST1); |
3331 | u32 delay; | 3392 | ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1); |
3332 | delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) & | 3393 | for (i = 0; i <= 20; i++) { |
3333 | AR5K_PHY_RX_DELAY_M; | 3394 | if (!(ath5k_hw_reg_read(ah, AR5K_PHY_ADC_TEST) & 0x10)) |
3334 | delay = (channel->hw_value & CHANNEL_CCK) ? | 3395 | break; |
3335 | ((delay << 2) / 22) : (delay / 10); | 3396 | udelay(200); |
3336 | if (ah->ah_bwmode == AR5K_BWMODE_10MHZ) | ||
3337 | delay = delay << 1; | ||
3338 | if (ah->ah_bwmode == AR5K_BWMODE_5MHZ) | ||
3339 | delay = delay << 2; | ||
3340 | /* XXX: /2 on turbo ? Let's be safe | ||
3341 | * for now */ | ||
3342 | udelay(100 + delay); | ||
3343 | } else { | ||
3344 | mdelay(1); | ||
3345 | } | ||
3346 | |||
3347 | if (fast) | ||
3348 | /* | ||
3349 | * Release RF Bus grant | ||
3350 | */ | ||
3351 | AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_RFBUS_REQ, | ||
3352 | AR5K_PHY_RFBUS_REQ_REQUEST); | ||
3353 | else { | ||
3354 | /* | ||
3355 | * Perform ADC test to see if baseband is ready | ||
3356 | * Set tx hold and check adc test register | ||
3357 | */ | ||
3358 | phy_tst1 = ath5k_hw_reg_read(ah, AR5K_PHY_TST1); | ||
3359 | ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1); | ||
3360 | for (i = 0; i <= 20; i++) { | ||
3361 | if (!(ath5k_hw_reg_read(ah, AR5K_PHY_ADC_TEST) & 0x10)) | ||
3362 | break; | ||
3363 | udelay(200); | ||
3364 | } | ||
3365 | ath5k_hw_reg_write(ah, phy_tst1, AR5K_PHY_TST1); | ||
3366 | } | 3397 | } |
3398 | ath5k_hw_reg_write(ah, phy_tst1, AR5K_PHY_TST1); | ||
3367 | 3399 | ||
3368 | /* | 3400 | /* |
3369 | * Start automatic gain control calibration | 3401 | * Start automatic gain control calibration |
diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c index 2c9c9e793d4e..3343fb9e4940 100644 --- a/drivers/net/wireless/ath/ath5k/qcu.c +++ b/drivers/net/wireless/ath/ath5k/qcu.c | |||
@@ -228,24 +228,9 @@ int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type, | |||
228 | /* | 228 | /* |
229 | * Set tx retry limits on DCU | 229 | * Set tx retry limits on DCU |
230 | */ | 230 | */ |
231 | static void ath5k_hw_set_tx_retry_limits(struct ath5k_hw *ah, | 231 | void ath5k_hw_set_tx_retry_limits(struct ath5k_hw *ah, |
232 | unsigned int queue) | 232 | unsigned int queue) |
233 | { | 233 | { |
234 | u32 retry_lg, retry_sh; | ||
235 | |||
236 | /* | ||
237 | * Calculate and set retry limits | ||
238 | */ | ||
239 | if (ah->ah_software_retry) { | ||
240 | /* XXX Need to test this */ | ||
241 | retry_lg = ah->ah_limit_tx_retries; | ||
242 | retry_sh = retry_lg = retry_lg > AR5K_DCU_RETRY_LMT_SH_RETRY ? | ||
243 | AR5K_DCU_RETRY_LMT_SH_RETRY : retry_lg; | ||
244 | } else { | ||
245 | retry_lg = AR5K_INIT_LG_RETRY; | ||
246 | retry_sh = AR5K_INIT_SH_RETRY; | ||
247 | } | ||
248 | |||
249 | /* Single data queue on AR5210 */ | 234 | /* Single data queue on AR5210 */ |
250 | if (ah->ah_version == AR5K_AR5210) { | 235 | if (ah->ah_version == AR5K_AR5210) { |
251 | struct ath5k_txq_info *tq = &ah->ah_txq[queue]; | 236 | struct ath5k_txq_info *tq = &ah->ah_txq[queue]; |
@@ -255,25 +240,26 @@ static void ath5k_hw_set_tx_retry_limits(struct ath5k_hw *ah, | |||
255 | 240 | ||
256 | ath5k_hw_reg_write(ah, | 241 | ath5k_hw_reg_write(ah, |
257 | (tq->tqi_cw_min << AR5K_NODCU_RETRY_LMT_CW_MIN_S) | 242 | (tq->tqi_cw_min << AR5K_NODCU_RETRY_LMT_CW_MIN_S) |
258 | | AR5K_REG_SM(AR5K_INIT_SLG_RETRY, | 243 | | AR5K_REG_SM(ah->ah_retry_long, |
259 | AR5K_NODCU_RETRY_LMT_SLG_RETRY) | 244 | AR5K_NODCU_RETRY_LMT_SLG_RETRY) |
260 | | AR5K_REG_SM(AR5K_INIT_SSH_RETRY, | 245 | | AR5K_REG_SM(ah->ah_retry_short, |
261 | AR5K_NODCU_RETRY_LMT_SSH_RETRY) | 246 | AR5K_NODCU_RETRY_LMT_SSH_RETRY) |
262 | | AR5K_REG_SM(retry_lg, AR5K_NODCU_RETRY_LMT_LG_RETRY) | 247 | | AR5K_REG_SM(ah->ah_retry_long, |
263 | | AR5K_REG_SM(retry_sh, AR5K_NODCU_RETRY_LMT_SH_RETRY), | 248 | AR5K_NODCU_RETRY_LMT_LG_RETRY) |
249 | | AR5K_REG_SM(ah->ah_retry_short, | ||
250 | AR5K_NODCU_RETRY_LMT_SH_RETRY), | ||
264 | AR5K_NODCU_RETRY_LMT); | 251 | AR5K_NODCU_RETRY_LMT); |
265 | /* DCU on AR5211+ */ | 252 | /* DCU on AR5211+ */ |
266 | } else { | 253 | } else { |
267 | ath5k_hw_reg_write(ah, | 254 | ath5k_hw_reg_write(ah, |
268 | AR5K_REG_SM(AR5K_INIT_SLG_RETRY, | 255 | AR5K_REG_SM(ah->ah_retry_long, |
269 | AR5K_DCU_RETRY_LMT_SLG_RETRY) | | 256 | AR5K_DCU_RETRY_LMT_RTS) |
270 | AR5K_REG_SM(AR5K_INIT_SSH_RETRY, | 257 | | AR5K_REG_SM(ah->ah_retry_long, |
271 | AR5K_DCU_RETRY_LMT_SSH_RETRY) | | 258 | AR5K_DCU_RETRY_LMT_STA_RTS) |
272 | AR5K_REG_SM(retry_lg, AR5K_DCU_RETRY_LMT_LG_RETRY) | | 259 | | AR5K_REG_SM(max(ah->ah_retry_long, ah->ah_retry_short), |
273 | AR5K_REG_SM(retry_sh, AR5K_DCU_RETRY_LMT_SH_RETRY), | 260 | AR5K_DCU_RETRY_LMT_STA_DATA), |
274 | AR5K_QUEUE_DFS_RETRY_LIMIT(queue)); | 261 | AR5K_QUEUE_DFS_RETRY_LIMIT(queue)); |
275 | } | 262 | } |
276 | return; | ||
277 | } | 263 | } |
278 | 264 | ||
279 | /** | 265 | /** |
diff --git a/drivers/net/wireless/ath/ath5k/reg.h b/drivers/net/wireless/ath/ath5k/reg.h index 7ad05d401ab5..e1c9abd8c879 100644 --- a/drivers/net/wireless/ath/ath5k/reg.h +++ b/drivers/net/wireless/ath/ath5k/reg.h | |||
@@ -686,16 +686,15 @@ | |||
686 | 686 | ||
687 | /* | 687 | /* |
688 | * DCU retry limit registers | 688 | * DCU retry limit registers |
689 | * all these fields don't allow zero values | ||
689 | */ | 690 | */ |
690 | #define AR5K_DCU_RETRY_LMT_BASE 0x1080 /* Register Address -Queue0 DCU_RETRY_LMT */ | 691 | #define AR5K_DCU_RETRY_LMT_BASE 0x1080 /* Register Address -Queue0 DCU_RETRY_LMT */ |
691 | #define AR5K_DCU_RETRY_LMT_SH_RETRY 0x0000000f /* Short retry limit mask */ | 692 | #define AR5K_DCU_RETRY_LMT_RTS 0x0000000f /* RTS failure limit. Transmission fails if no CTS is received for this number of times */ |
692 | #define AR5K_DCU_RETRY_LMT_SH_RETRY_S 0 | 693 | #define AR5K_DCU_RETRY_LMT_RTS_S 0 |
693 | #define AR5K_DCU_RETRY_LMT_LG_RETRY 0x000000f0 /* Long retry limit mask */ | 694 | #define AR5K_DCU_RETRY_LMT_STA_RTS 0x00003f00 /* STA RTS failure limit. If exceeded CW reset */ |
694 | #define AR5K_DCU_RETRY_LMT_LG_RETRY_S 4 | 695 | #define AR5K_DCU_RETRY_LMT_STA_RTS_S 8 |
695 | #define AR5K_DCU_RETRY_LMT_SSH_RETRY 0x00003f00 /* Station short retry limit mask (?) */ | 696 | #define AR5K_DCU_RETRY_LMT_STA_DATA 0x000fc000 /* STA data failure limit. If exceeded CW reset. */ |
696 | #define AR5K_DCU_RETRY_LMT_SSH_RETRY_S 8 | 697 | #define AR5K_DCU_RETRY_LMT_STA_DATA_S 14 |
697 | #define AR5K_DCU_RETRY_LMT_SLG_RETRY 0x000fc000 /* Station long retry limit mask (?) */ | ||
698 | #define AR5K_DCU_RETRY_LMT_SLG_RETRY_S 14 | ||
699 | #define AR5K_QUEUE_DFS_RETRY_LIMIT(_q) AR5K_QUEUE_REG(AR5K_DCU_RETRY_LMT_BASE, _q) | 698 | #define AR5K_QUEUE_DFS_RETRY_LIMIT(_q) AR5K_QUEUE_REG(AR5K_DCU_RETRY_LMT_BASE, _q) |
700 | 699 | ||
701 | /* | 700 | /* |
@@ -1064,7 +1063,7 @@ | |||
1064 | /* | 1063 | /* |
1065 | * EEPROM command register | 1064 | * EEPROM command register |
1066 | */ | 1065 | */ |
1067 | #define AR5K_EEPROM_CMD 0x6008 /* Register Addres */ | 1066 | #define AR5K_EEPROM_CMD 0x6008 /* Register Address */ |
1068 | #define AR5K_EEPROM_CMD_READ 0x00000001 /* EEPROM read */ | 1067 | #define AR5K_EEPROM_CMD_READ 0x00000001 /* EEPROM read */ |
1069 | #define AR5K_EEPROM_CMD_WRITE 0x00000002 /* EEPROM write */ | 1068 | #define AR5K_EEPROM_CMD_WRITE 0x00000002 /* EEPROM write */ |
1070 | #define AR5K_EEPROM_CMD_RESET 0x00000004 /* EEPROM reset */ | 1069 | #define AR5K_EEPROM_CMD_RESET 0x00000004 /* EEPROM reset */ |
@@ -1084,7 +1083,7 @@ | |||
1084 | /* | 1083 | /* |
1085 | * EEPROM config register | 1084 | * EEPROM config register |
1086 | */ | 1085 | */ |
1087 | #define AR5K_EEPROM_CFG 0x6010 /* Register Addres */ | 1086 | #define AR5K_EEPROM_CFG 0x6010 /* Register Address */ |
1088 | #define AR5K_EEPROM_CFG_SIZE 0x00000003 /* Size determination override */ | 1087 | #define AR5K_EEPROM_CFG_SIZE 0x00000003 /* Size determination override */ |
1089 | #define AR5K_EEPROM_CFG_SIZE_AUTO 0 | 1088 | #define AR5K_EEPROM_CFG_SIZE_AUTO 0 |
1090 | #define AR5K_EEPROM_CFG_SIZE_4KBIT 1 | 1089 | #define AR5K_EEPROM_CFG_SIZE_4KBIT 1 |
@@ -1126,7 +1125,7 @@ | |||
1126 | * Second station id register (Upper 16 bits of MAC address + PCU settings) | 1125 | * Second station id register (Upper 16 bits of MAC address + PCU settings) |
1127 | */ | 1126 | */ |
1128 | #define AR5K_STA_ID1 0x8004 /* Register Address */ | 1127 | #define AR5K_STA_ID1 0x8004 /* Register Address */ |
1129 | #define AR5K_STA_ID1_ADDR_U16 0x0000ffff /* Upper 16 bits of MAC addres */ | 1128 | #define AR5K_STA_ID1_ADDR_U16 0x0000ffff /* Upper 16 bits of MAC address */ |
1130 | #define AR5K_STA_ID1_AP 0x00010000 /* Set AP mode */ | 1129 | #define AR5K_STA_ID1_AP 0x00010000 /* Set AP mode */ |
1131 | #define AR5K_STA_ID1_ADHOC 0x00020000 /* Set Ad-Hoc mode */ | 1130 | #define AR5K_STA_ID1_ADHOC 0x00020000 /* Set Ad-Hoc mode */ |
1132 | #define AR5K_STA_ID1_PWR_SV 0x00040000 /* Power save reporting */ | 1131 | #define AR5K_STA_ID1_PWR_SV 0x00040000 /* Power save reporting */ |
diff --git a/drivers/net/wireless/ath/ath5k/trace.h b/drivers/net/wireless/ath/ath5k/trace.h new file mode 100644 index 000000000000..2de68adb6240 --- /dev/null +++ b/drivers/net/wireless/ath/ath5k/trace.h | |||
@@ -0,0 +1,107 @@ | |||
1 | #if !defined(__TRACE_ATH5K_H) || defined(TRACE_HEADER_MULTI_READ) | ||
2 | #define __TRACE_ATH5K_H | ||
3 | |||
4 | #include <linux/tracepoint.h> | ||
5 | #include "base.h" | ||
6 | |||
7 | #ifndef CONFIG_ATH5K_TRACER | ||
8 | #undef TRACE_EVENT | ||
9 | #define TRACE_EVENT(name, proto, ...) \ | ||
10 | static inline void trace_ ## name(proto) {} | ||
11 | #endif | ||
12 | |||
13 | struct sk_buff; | ||
14 | |||
15 | #define PRIV_ENTRY __field(struct ath5k_softc *, priv) | ||
16 | #define PRIV_ASSIGN __entry->priv = priv | ||
17 | |||
18 | #undef TRACE_SYSTEM | ||
19 | #define TRACE_SYSTEM ath5k | ||
20 | |||
21 | TRACE_EVENT(ath5k_rx, | ||
22 | TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb), | ||
23 | TP_ARGS(priv, skb), | ||
24 | TP_STRUCT__entry( | ||
25 | PRIV_ENTRY | ||
26 | __field(unsigned long, skbaddr) | ||
27 | __dynamic_array(u8, frame, skb->len) | ||
28 | ), | ||
29 | TP_fast_assign( | ||
30 | PRIV_ASSIGN; | ||
31 | __entry->skbaddr = (unsigned long) skb; | ||
32 | memcpy(__get_dynamic_array(frame), skb->data, skb->len); | ||
33 | ), | ||
34 | TP_printk( | ||
35 | "[%p] RX skb=%lx", __entry->priv, __entry->skbaddr | ||
36 | ) | ||
37 | ); | ||
38 | |||
39 | TRACE_EVENT(ath5k_tx, | ||
40 | TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb, | ||
41 | struct ath5k_txq *q), | ||
42 | |||
43 | TP_ARGS(priv, skb, q), | ||
44 | |||
45 | TP_STRUCT__entry( | ||
46 | PRIV_ENTRY | ||
47 | __field(unsigned long, skbaddr) | ||
48 | __field(u8, qnum) | ||
49 | __dynamic_array(u8, frame, skb->len) | ||
50 | ), | ||
51 | |||
52 | TP_fast_assign( | ||
53 | PRIV_ASSIGN; | ||
54 | __entry->skbaddr = (unsigned long) skb; | ||
55 | __entry->qnum = (u8) q->qnum; | ||
56 | memcpy(__get_dynamic_array(frame), skb->data, skb->len); | ||
57 | ), | ||
58 | |||
59 | TP_printk( | ||
60 | "[%p] TX skb=%lx q=%d", __entry->priv, __entry->skbaddr, | ||
61 | __entry->qnum | ||
62 | ) | ||
63 | ); | ||
64 | |||
65 | TRACE_EVENT(ath5k_tx_complete, | ||
66 | TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb, | ||
67 | struct ath5k_txq *q, struct ath5k_tx_status *ts), | ||
68 | |||
69 | TP_ARGS(priv, skb, q, ts), | ||
70 | |||
71 | TP_STRUCT__entry( | ||
72 | PRIV_ENTRY | ||
73 | __field(unsigned long, skbaddr) | ||
74 | __field(u8, qnum) | ||
75 | __field(u8, ts_status) | ||
76 | __field(s8, ts_rssi) | ||
77 | __field(u8, ts_antenna) | ||
78 | ), | ||
79 | |||
80 | TP_fast_assign( | ||
81 | PRIV_ASSIGN; | ||
82 | __entry->skbaddr = (unsigned long) skb; | ||
83 | __entry->qnum = (u8) q->qnum; | ||
84 | __entry->ts_status = ts->ts_status; | ||
85 | __entry->ts_rssi = ts->ts_rssi; | ||
86 | __entry->ts_antenna = ts->ts_antenna; | ||
87 | ), | ||
88 | |||
89 | TP_printk( | ||
90 | "[%p] TX end skb=%lx q=%d stat=%x rssi=%d ant=%x", | ||
91 | __entry->priv, __entry->skbaddr, __entry->qnum, | ||
92 | __entry->ts_status, __entry->ts_rssi, __entry->ts_antenna | ||
93 | ) | ||
94 | ); | ||
95 | |||
96 | #endif /* __TRACE_ATH5K_H */ | ||
97 | |||
98 | #ifdef CONFIG_ATH5K_TRACER | ||
99 | |||
100 | #undef TRACE_INCLUDE_PATH | ||
101 | #define TRACE_INCLUDE_PATH ../../drivers/net/wireless/ath/ath5k | ||
102 | #undef TRACE_INCLUDE_FILE | ||
103 | #define TRACE_INCLUDE_FILE trace | ||
104 | |||
105 | #include <trace/define_trace.h> | ||
106 | |||
107 | #endif | ||