aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/ath/ath5k/reg.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/reg.h')
-rw-r--r--drivers/net/wireless/ath/ath5k/reg.h21
1 files changed, 10 insertions, 11 deletions
diff --git a/drivers/net/wireless/ath/ath5k/reg.h b/drivers/net/wireless/ath/ath5k/reg.h
index 7ad05d401ab5..e1c9abd8c879 100644
--- a/drivers/net/wireless/ath/ath5k/reg.h
+++ b/drivers/net/wireless/ath/ath5k/reg.h
@@ -686,16 +686,15 @@
686 686
687/* 687/*
688 * DCU retry limit registers 688 * DCU retry limit registers
689 * all these fields don't allow zero values
689 */ 690 */
690#define AR5K_DCU_RETRY_LMT_BASE 0x1080 /* Register Address -Queue0 DCU_RETRY_LMT */ 691#define AR5K_DCU_RETRY_LMT_BASE 0x1080 /* Register Address -Queue0 DCU_RETRY_LMT */
691#define AR5K_DCU_RETRY_LMT_SH_RETRY 0x0000000f /* Short retry limit mask */ 692#define AR5K_DCU_RETRY_LMT_RTS 0x0000000f /* RTS failure limit. Transmission fails if no CTS is received for this number of times */
692#define AR5K_DCU_RETRY_LMT_SH_RETRY_S 0 693#define AR5K_DCU_RETRY_LMT_RTS_S 0
693#define AR5K_DCU_RETRY_LMT_LG_RETRY 0x000000f0 /* Long retry limit mask */ 694#define AR5K_DCU_RETRY_LMT_STA_RTS 0x00003f00 /* STA RTS failure limit. If exceeded CW reset */
694#define AR5K_DCU_RETRY_LMT_LG_RETRY_S 4 695#define AR5K_DCU_RETRY_LMT_STA_RTS_S 8
695#define AR5K_DCU_RETRY_LMT_SSH_RETRY 0x00003f00 /* Station short retry limit mask (?) */ 696#define AR5K_DCU_RETRY_LMT_STA_DATA 0x000fc000 /* STA data failure limit. If exceeded CW reset. */
696#define AR5K_DCU_RETRY_LMT_SSH_RETRY_S 8 697#define AR5K_DCU_RETRY_LMT_STA_DATA_S 14
697#define AR5K_DCU_RETRY_LMT_SLG_RETRY 0x000fc000 /* Station long retry limit mask (?) */
698#define AR5K_DCU_RETRY_LMT_SLG_RETRY_S 14
699#define AR5K_QUEUE_DFS_RETRY_LIMIT(_q) AR5K_QUEUE_REG(AR5K_DCU_RETRY_LMT_BASE, _q) 698#define AR5K_QUEUE_DFS_RETRY_LIMIT(_q) AR5K_QUEUE_REG(AR5K_DCU_RETRY_LMT_BASE, _q)
700 699
701/* 700/*
@@ -1064,7 +1063,7 @@
1064/* 1063/*
1065 * EEPROM command register 1064 * EEPROM command register
1066 */ 1065 */
1067#define AR5K_EEPROM_CMD 0x6008 /* Register Addres */ 1066#define AR5K_EEPROM_CMD 0x6008 /* Register Address */
1068#define AR5K_EEPROM_CMD_READ 0x00000001 /* EEPROM read */ 1067#define AR5K_EEPROM_CMD_READ 0x00000001 /* EEPROM read */
1069#define AR5K_EEPROM_CMD_WRITE 0x00000002 /* EEPROM write */ 1068#define AR5K_EEPROM_CMD_WRITE 0x00000002 /* EEPROM write */
1070#define AR5K_EEPROM_CMD_RESET 0x00000004 /* EEPROM reset */ 1069#define AR5K_EEPROM_CMD_RESET 0x00000004 /* EEPROM reset */
@@ -1084,7 +1083,7 @@
1084/* 1083/*
1085 * EEPROM config register 1084 * EEPROM config register
1086 */ 1085 */
1087#define AR5K_EEPROM_CFG 0x6010 /* Register Addres */ 1086#define AR5K_EEPROM_CFG 0x6010 /* Register Address */
1088#define AR5K_EEPROM_CFG_SIZE 0x00000003 /* Size determination override */ 1087#define AR5K_EEPROM_CFG_SIZE 0x00000003 /* Size determination override */
1089#define AR5K_EEPROM_CFG_SIZE_AUTO 0 1088#define AR5K_EEPROM_CFG_SIZE_AUTO 0
1090#define AR5K_EEPROM_CFG_SIZE_4KBIT 1 1089#define AR5K_EEPROM_CFG_SIZE_4KBIT 1
@@ -1126,7 +1125,7 @@
1126 * Second station id register (Upper 16 bits of MAC address + PCU settings) 1125 * Second station id register (Upper 16 bits of MAC address + PCU settings)
1127 */ 1126 */
1128#define AR5K_STA_ID1 0x8004 /* Register Address */ 1127#define AR5K_STA_ID1 0x8004 /* Register Address */
1129#define AR5K_STA_ID1_ADDR_U16 0x0000ffff /* Upper 16 bits of MAC addres */ 1128#define AR5K_STA_ID1_ADDR_U16 0x0000ffff /* Upper 16 bits of MAC address */
1130#define AR5K_STA_ID1_AP 0x00010000 /* Set AP mode */ 1129#define AR5K_STA_ID1_AP 0x00010000 /* Set AP mode */
1131#define AR5K_STA_ID1_ADHOC 0x00020000 /* Set Ad-Hoc mode */ 1130#define AR5K_STA_ID1_ADHOC 0x00020000 /* Set Ad-Hoc mode */
1132#define AR5K_STA_ID1_PWR_SV 0x00040000 /* Power save reporting */ 1131#define AR5K_STA_ID1_PWR_SV 0x00040000 /* Power save reporting */