1 files changed, 116 insertions, 61 deletions

diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index fedd258cc4ea..d0a912fbad3b 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -37,6 +37,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 #include <linux/regulator/consumer.h>
+#include <linux/pinctrl/consumer.h>
 #include <linux/pm_runtime.h>
 #include <mach/hardware.h>
 #include <plat/mmc.h>
@@ -62,6 +63,7 @@
 
 #define VS18                    (1 << 26)
 #define VS30                    (1 << 25)
+#define HSS                     (1 << 21)
 #define SDVS18                  (0x5 << 9)
 #define SDVS30                  (0x6 << 9)
 #define SDVS33                  (0x7 << 9)
@@ -78,28 +80,17 @@
 #define CLKD_SHIFT              6
 #define DTO_MASK                0x000F0000
 #define DTO_SHIFT               16
-#define INT_EN_MASK             0x307F0033
-#define BWR_ENABLE              (1 << 4)
-#define BRR_ENABLE              (1 << 5)
-#define DTO_ENABLE              (1 << 20)
 #define INIT_STREAM             (1 << 1)
 #define DP_SELECT               (1 << 21)
 #define DDIR                    (1 << 4)
-#define DMA_EN                  0x1
+#define DMAE                    0x1
 #define MSBS                    (1 << 5)
 #define BCE                     (1 << 1)
 #define FOUR_BIT                (1 << 1)
+#define HSPE                    (1 << 2)
 #define DDR                     (1 << 19)
 #define DW8                     (1 << 5)
-#define CC                      0x1
-#define TC                      0x02
 #define OD                      0x1
-#define ERR                     (1 << 15)
-#define CMD_TIMEOUT             (1 << 16)
-#define DATA_TIMEOUT            (1 << 20)
-#define CMD_CRC                 (1 << 17)
-#define DATA_CRC                (1 << 21)
-#define CARD_ERR                (1 << 28)
 #define STAT_CLEAR              0xFFFFFFFF
 #define INIT_STREAM_CMD         0x00000000
 #define DUAL_VOLT_OCR_BIT       7
@@ -108,6 +99,26 @@
 #define SOFTRESET               (1 << 1)
 #define RESETDONE               (1 << 0)
 
+/* Interrupt masks for IE and ISE register */
+#define CC_EN                   (1 << 0)
+#define TC_EN                   (1 << 1)
+#define BWR_EN                  (1 << 4)
+#define BRR_EN                  (1 << 5)
+#define ERR_EN                  (1 << 15)
+#define CTO_EN                  (1 << 16)
+#define CCRC_EN                 (1 << 17)
+#define CEB_EN                  (1 << 18)
+#define CIE_EN                  (1 << 19)
+#define DTO_EN                  (1 << 20)
+#define DCRC_EN                 (1 << 21)
+#define DEB_EN                  (1 << 22)
+#define CERR_EN                 (1 << 28)
+#define BADA_EN                 (1 << 29)
+
+#define INT_EN_MASK             (BADA_EN | CERR_EN | DEB_EN | DCRC_EN |\
+                DTO_EN | CIE_EN | CEB_EN | CCRC_EN | CTO_EN | \
+                BRR_EN | BWR_EN | TC_EN | CC_EN)
+
 #define MMC_AUTOSUSPEND_DELAY   100
 #define MMC_TIMEOUT_MS          20
 #define OMAP_MMC_MIN_CLOCK      400000
@@ -302,7 +313,7 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
 
         reg = regulator_get(host->dev, "vmmc");
         if (IS_ERR(reg)) {
-                dev_dbg(host->dev, "vmmc regulator missing\n");
+                dev_err(host->dev, "vmmc regulator missing\n");
                 return PTR_ERR(reg);
         } else {
                 mmc_slot(host).set_power = omap_hsmmc_set_power;
@@ -455,13 +466,13 @@ static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host,
         unsigned int irq_mask;
 
         if (host->use_dma)
-                irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE);
+                irq_mask = INT_EN_MASK & ~(BRR_EN | BWR_EN);
         else
                 irq_mask = INT_EN_MASK;
 
         /* Disable timeout for erases */
         if (cmd->opcode == MMC_ERASE)
-                irq_mask &= ~DTO_ENABLE;
+                irq_mask &= ~DTO_EN;
 
         OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
         OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
@@ -494,6 +505,7 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
         struct mmc_ios *ios = &host->mmc->ios;
         unsigned long regval;
         unsigned long timeout;
+        unsigned long clkdiv;
 
         dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock);
 
@@ -501,7 +513,8 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
 
         regval = OMAP_HSMMC_READ(host->base, SYSCTL);
         regval = regval & ~(CLKD_MASK | DTO_MASK);
-        regval = regval | (calc_divisor(host, ios) << 6) | (DTO << 16);
+        clkdiv = calc_divisor(host, ios);
+        regval = regval | (clkdiv << 6) | (DTO << 16);
         OMAP_HSMMC_WRITE(host->base, SYSCTL, regval);
         OMAP_HSMMC_WRITE(host->base, SYSCTL,
                 OMAP_HSMMC_READ(host->base, SYSCTL) | ICE);
@@ -512,6 +525,27 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
                 && time_before(jiffies, timeout))
                 cpu_relax();
 
+        /*
+         * Enable High-Speed Support
+         * Pre-Requisites
+         *      - Controller should support High-Speed-Enable Bit
+         *      - Controller should not be using DDR Mode
+         *      - Controller should advertise that it supports High Speed
+         *        in capabilities register
+         *      - MMC/SD clock coming out of controller > 25MHz
+         */
+        if ((mmc_slot(host).features & HSMMC_HAS_HSPE_SUPPORT) &&
+            (ios->timing != MMC_TIMING_UHS_DDR50) &&
+            ((OMAP_HSMMC_READ(host->base, CAPA) & HSS) == HSS)) {
+                regval = OMAP_HSMMC_READ(host->base, HCTL);
+                if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000)
+                        regval |= HSPE;
+                else
+                        regval &= ~HSPE;
+
+                OMAP_HSMMC_WRITE(host->base, HCTL, regval);
+        }
+
         omap_hsmmc_start_clock(host);
 }
 
@@ -676,8 +710,8 @@ static void send_init_stream(struct omap_hsmmc_host *host)
         OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD);
 
         timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
-        while ((reg != CC) && time_before(jiffies, timeout))
-                reg = OMAP_HSMMC_READ(host->base, STAT) & CC;
+        while ((reg != CC_EN) && time_before(jiffies, timeout))
+                reg = OMAP_HSMMC_READ(host->base, STAT) & CC_EN;
 
         OMAP_HSMMC_WRITE(host->base, CON,
                 OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM);
@@ -768,7 +802,7 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd,
         }
 
         if (host->use_dma)
-                cmdreg |= DMA_EN;
+                cmdreg |= DMAE;
 
         host->req_in_progress = 1;
 
@@ -968,16 +1002,20 @@ static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host,
                         __func__);
 }
 
-static void hsmmc_command_incomplete(struct omap_hsmmc_host *host, int err)
+static void hsmmc_command_incomplete(struct omap_hsmmc_host *host,
+                                        int err, int end_cmd)
 {
-        omap_hsmmc_reset_controller_fsm(host, SRC);
-        host->cmd->error = err;
+        if (end_cmd) {
+                omap_hsmmc_reset_controller_fsm(host, SRC);
+                if (host->cmd)
+                        host->cmd->error = err;
+        }
 
         if (host->data) {
                 omap_hsmmc_reset_controller_fsm(host, SRD);
                 omap_hsmmc_dma_cleanup(host, err);
-        }
-
+        } else if (host->mrq && host->mrq->cmd)
+                host->mrq->cmd->error = err;
 }
 
 static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status)
@@ -988,23 +1026,25 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status)
         data = host->data;
         dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status);
 
-        if (status & ERR) {
+        if (status & ERR_EN) {
                 omap_hsmmc_dbg_report_irq(host, status);
-                if (status & (CMD_TIMEOUT | DATA_TIMEOUT))
-                        hsmmc_command_incomplete(host, -ETIMEDOUT);
-                else if (status & (CMD_CRC | DATA_CRC))
-                        hsmmc_command_incomplete(host, -EILSEQ);
 
-                end_cmd = 1;
+                if (status & (CTO_EN | CCRC_EN))
+                        end_cmd = 1;
+                if (status & (CTO_EN | DTO_EN))
+                        hsmmc_command_incomplete(host, -ETIMEDOUT, end_cmd);
+                else if (status & (CCRC_EN | DCRC_EN))
+                        hsmmc_command_incomplete(host, -EILSEQ, end_cmd);
+
                 if (host->data || host->response_busy) {
-                        end_trans = 1;
+                        end_trans = !end_cmd;
                         host->response_busy = 0;
                 }
         }
 
-        if (end_cmd || ((status & CC) && host->cmd))
+        if (end_cmd || ((status & CC_EN) && host->cmd))
                 omap_hsmmc_cmd_done(host, host->cmd);
-        if ((end_trans || (status & TC)) && host->mrq)
+        if ((end_trans || (status & TC_EN)) && host->mrq)
                 omap_hsmmc_xfer_done(host, data);
 }
 
@@ -1101,7 +1141,7 @@ static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd)
 
         return 0;
 err:
-        dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n");
+        dev_err(mmc_dev(host->mmc), "Unable to switch operating voltage\n");
         return ret;
 }
 
@@ -1360,7 +1400,7 @@ omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req)
         if (host->use_dma) {
                 ret = omap_hsmmc_start_dma_transfer(host, req);
                 if (ret != 0) {
-                        dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n");
+                        dev_err(mmc_dev(host->mmc), "MMC start dma failure\n");
                         return ret;
                 }
         }
@@ -1678,7 +1718,7 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
 {
         struct omap_mmc_platform_data *pdata;
         struct device_node *np = dev->of_node;
-        u32 bus_width;
+        u32 bus_width, max_freq;
 
         pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
         if (!pdata)
@@ -1705,6 +1745,12 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
         if (of_find_property(np, "ti,needs-special-reset", NULL))
                 pdata->slots[0].features |= HSMMC_HAS_UPDATED_RESET;
 
+        if (!of_property_read_u32(np, "max-frequency", &max_freq))
+                pdata->max_freq = max_freq;
+
+        if (of_find_property(np, "ti,needs-special-hs-handling", NULL))
+                pdata->slots[0].features |= HSMMC_HAS_HSPE_SUPPORT;
+
         return pdata;
 }
 #else
@@ -1725,6 +1771,7 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
         const struct of_device_id *match;
         dma_cap_mask_t mask;
         unsigned tx_req, rx_req;
+        struct pinctrl *pinctrl;
 
         match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev);
         if (match) {
@@ -1821,7 +1868,6 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
          * MMC can still work without debounce clock.
          */
         if (IS_ERR(host->dbclk)) {
-                dev_warn(mmc_dev(host->mmc), "Failed to get debounce clk\n");
                 host->dbclk = NULL;
         } else if (clk_prepare_enable(host->dbclk) != 0) {
                 dev_warn(mmc_dev(host->mmc), "Failed to enable debounce clk\n");
@@ -1889,13 +1935,13 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
         ret = request_irq(host->irq, omap_hsmmc_irq, 0,
                         mmc_hostname(mmc), host);
         if (ret) {
-                dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n");
+                dev_err(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n");
                 goto err_irq;
         }
 
         if (pdata->init != NULL) {
                 if (pdata->init(&pdev->dev) != 0) {
-                        dev_dbg(mmc_dev(host->mmc),
+                        dev_err(mmc_dev(host->mmc),
                                 "Unable to configure MMC IRQs\n");
                         goto err_irq_cd_init;
                 }
@@ -1918,7 +1964,7 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
                                            IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
                                            mmc_hostname(mmc), host);
                 if (ret) {
-                        dev_dbg(mmc_dev(host->mmc),
+                        dev_err(mmc_dev(host->mmc),
                                 "Unable to grab MMC CD IRQ\n");
                         goto err_irq_cd;
                 }
@@ -1928,6 +1974,11 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
 
         omap_hsmmc_disable_irq(host);
 
+        pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+        if (IS_ERR(pinctrl))
+                dev_warn(&pdev->dev,
+                        "pins are not configured from the driver\n");
+
         omap_hsmmc_protect_card(host);
 
         mmc_add_host(mmc);
@@ -2027,6 +2078,25 @@ static int __devexit omap_hsmmc_remove(struct platform_device *pdev)
 }
 
 #ifdef CONFIG_PM
+static int omap_hsmmc_prepare(struct device *dev)
+{
+        struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+
+        if (host->pdata->suspend)
+                return host->pdata->suspend(dev, host->slot_id);
+
+        return 0;
+}
+
+static void omap_hsmmc_complete(struct device *dev)
+{
+        struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+
+        if (host->pdata->resume)
+                host->pdata->resume(dev, host->slot_id);
+
+}
+
 static int omap_hsmmc_suspend(struct device *dev)
 {
         int ret = 0;
@@ -2040,23 +2110,10 @@ static int omap_hsmmc_suspend(struct device *dev)
 
         pm_runtime_get_sync(host->dev);
         host->suspended = 1;
-        if (host->pdata->suspend) {
-                ret = host->pdata->suspend(dev, host->slot_id);
-                if (ret) {
-                        dev_dbg(dev, "Unable to handle MMC board"
-                                        " level suspend\n");
-                        host->suspended = 0;
-                        return ret;
-                }
-        }
         ret = mmc_suspend_host(host->mmc);
 
         if (ret) {
                 host->suspended = 0;
-                if (host->pdata->resume) {
-                        if (host->pdata->resume(dev, host->slot_id))
-                                dev_dbg(dev, "Unmask interrupt failed\n");
-                }
                 goto err;
         }
 
@@ -2093,12 +2150,6 @@ static int omap_hsmmc_resume(struct device *dev)
         if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER))
                 omap_hsmmc_conf_bus_power(host);
 
-        if (host->pdata->resume) {
-                ret = host->pdata->resume(dev, host->slot_id);
-                if (ret)
-                        dev_dbg(dev, "Unmask interrupt failed\n");
-        }
-
         omap_hsmmc_protect_card(host);
 
         /* Notify the core to resume the host */
@@ -2114,8 +2165,10 @@ static int omap_hsmmc_resume(struct device *dev)
 }
 
 #else
+#define omap_hsmmc_prepare      NULL
+#define omap_hsmmc_complete     NULL
 #define omap_hsmmc_suspend      NULL
-#define omap_hsmmc_resume               NULL
+#define omap_hsmmc_resume       NULL
 #endif
 
 static int omap_hsmmc_runtime_suspend(struct device *dev)
@@ -2143,6 +2196,8 @@ static int omap_hsmmc_runtime_resume(struct device *dev)
 static struct dev_pm_ops omap_hsmmc_dev_pm_ops = {
         .suspend        = omap_hsmmc_suspend,
         .resume         = omap_hsmmc_resume,
+        .prepare        = omap_hsmmc_prepare,
+        .complete       = omap_hsmmc_complete,
         .runtime_suspend = omap_hsmmc_runtime_suspend,
         .runtime_resume = omap_hsmmc_runtime_resume,
 };