diff options
Diffstat (limited to 'drivers/mfd')
-rw-r--r-- | drivers/mfd/wm8350-core.c | 770 | ||||
-rw-r--r-- | drivers/mfd/wm8350-i2c.c | 2 |
2 files changed, 767 insertions, 5 deletions
diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c index 071834ba6954..e74829f298b9 100644 --- a/drivers/mfd/wm8350-core.c +++ b/drivers/mfd/wm8350-core.c | |||
@@ -15,15 +15,20 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/module.h> | 16 | #include <linux/module.h> |
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/bug.h> | ||
18 | #include <linux/device.h> | 19 | #include <linux/device.h> |
19 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
20 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/workqueue.h> | ||
21 | 23 | ||
22 | #include <linux/mfd/wm8350/core.h> | 24 | #include <linux/mfd/wm8350/core.h> |
23 | #include <linux/mfd/wm8350/audio.h> | 25 | #include <linux/mfd/wm8350/audio.h> |
26 | #include <linux/mfd/wm8350/comparator.h> | ||
24 | #include <linux/mfd/wm8350/gpio.h> | 27 | #include <linux/mfd/wm8350/gpio.h> |
25 | #include <linux/mfd/wm8350/pmic.h> | 28 | #include <linux/mfd/wm8350/pmic.h> |
29 | #include <linux/mfd/wm8350/rtc.h> | ||
26 | #include <linux/mfd/wm8350/supply.h> | 30 | #include <linux/mfd/wm8350/supply.h> |
31 | #include <linux/mfd/wm8350/wdt.h> | ||
27 | 32 | ||
28 | #define WM8350_UNLOCK_KEY 0x0013 | 33 | #define WM8350_UNLOCK_KEY 0x0013 |
29 | #define WM8350_LOCK_KEY 0x0000 | 34 | #define WM8350_LOCK_KEY 0x0000 |
@@ -321,6 +326,743 @@ int wm8350_reg_unlock(struct wm8350 *wm8350) | |||
321 | } | 326 | } |
322 | EXPORT_SYMBOL_GPL(wm8350_reg_unlock); | 327 | EXPORT_SYMBOL_GPL(wm8350_reg_unlock); |
323 | 328 | ||
329 | static void wm8350_irq_call_handler(struct wm8350 *wm8350, int irq) | ||
330 | { | ||
331 | mutex_lock(&wm8350->irq_mutex); | ||
332 | |||
333 | if (wm8350->irq[irq].handler) | ||
334 | wm8350->irq[irq].handler(wm8350, irq, wm8350->irq[irq].data); | ||
335 | else { | ||
336 | dev_err(wm8350->dev, "irq %d nobody cared. now masked.\n", | ||
337 | irq); | ||
338 | wm8350_mask_irq(wm8350, irq); | ||
339 | } | ||
340 | |||
341 | mutex_unlock(&wm8350->irq_mutex); | ||
342 | } | ||
343 | |||
344 | /* | ||
345 | * wm8350_irq_worker actually handles the interrupts. Since all | ||
346 | * interrupts are clear on read the IRQ line will be reasserted and | ||
347 | * the physical IRQ will be handled again if another interrupt is | ||
348 | * asserted while we run - in the normal course of events this is a | ||
349 | * rare occurrence so we save I2C/SPI reads. | ||
350 | */ | ||
351 | static void wm8350_irq_worker(struct work_struct *work) | ||
352 | { | ||
353 | struct wm8350 *wm8350 = container_of(work, struct wm8350, irq_work); | ||
354 | u16 level_one, status1, status2, comp; | ||
355 | |||
356 | /* TODO: Use block reads to improve performance? */ | ||
357 | level_one = wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS) | ||
358 | & ~wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK); | ||
359 | status1 = wm8350_reg_read(wm8350, WM8350_INT_STATUS_1) | ||
360 | & ~wm8350_reg_read(wm8350, WM8350_INT_STATUS_1_MASK); | ||
361 | status2 = wm8350_reg_read(wm8350, WM8350_INT_STATUS_2) | ||
362 | & ~wm8350_reg_read(wm8350, WM8350_INT_STATUS_2_MASK); | ||
363 | comp = wm8350_reg_read(wm8350, WM8350_COMPARATOR_INT_STATUS) | ||
364 | & ~wm8350_reg_read(wm8350, WM8350_COMPARATOR_INT_STATUS_MASK); | ||
365 | |||
366 | /* over current */ | ||
367 | if (level_one & WM8350_OC_INT) { | ||
368 | u16 oc; | ||
369 | |||
370 | oc = wm8350_reg_read(wm8350, WM8350_OVER_CURRENT_INT_STATUS); | ||
371 | oc &= ~wm8350_reg_read(wm8350, | ||
372 | WM8350_OVER_CURRENT_INT_STATUS_MASK); | ||
373 | |||
374 | if (oc & WM8350_OC_LS_EINT) /* limit switch */ | ||
375 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_OC_LS); | ||
376 | } | ||
377 | |||
378 | /* under voltage */ | ||
379 | if (level_one & WM8350_UV_INT) { | ||
380 | u16 uv; | ||
381 | |||
382 | uv = wm8350_reg_read(wm8350, WM8350_UNDER_VOLTAGE_INT_STATUS); | ||
383 | uv &= ~wm8350_reg_read(wm8350, | ||
384 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK); | ||
385 | |||
386 | if (uv & WM8350_UV_DC1_EINT) | ||
387 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC1); | ||
388 | if (uv & WM8350_UV_DC2_EINT) | ||
389 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC2); | ||
390 | if (uv & WM8350_UV_DC3_EINT) | ||
391 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC3); | ||
392 | if (uv & WM8350_UV_DC4_EINT) | ||
393 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC4); | ||
394 | if (uv & WM8350_UV_DC5_EINT) | ||
395 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC5); | ||
396 | if (uv & WM8350_UV_DC6_EINT) | ||
397 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC6); | ||
398 | if (uv & WM8350_UV_LDO1_EINT) | ||
399 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO1); | ||
400 | if (uv & WM8350_UV_LDO2_EINT) | ||
401 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO2); | ||
402 | if (uv & WM8350_UV_LDO3_EINT) | ||
403 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO3); | ||
404 | if (uv & WM8350_UV_LDO4_EINT) | ||
405 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO4); | ||
406 | } | ||
407 | |||
408 | /* charger, RTC */ | ||
409 | if (status1) { | ||
410 | if (status1 & WM8350_CHG_BAT_HOT_EINT) | ||
411 | wm8350_irq_call_handler(wm8350, | ||
412 | WM8350_IRQ_CHG_BAT_HOT); | ||
413 | if (status1 & WM8350_CHG_BAT_COLD_EINT) | ||
414 | wm8350_irq_call_handler(wm8350, | ||
415 | WM8350_IRQ_CHG_BAT_COLD); | ||
416 | if (status1 & WM8350_CHG_BAT_FAIL_EINT) | ||
417 | wm8350_irq_call_handler(wm8350, | ||
418 | WM8350_IRQ_CHG_BAT_FAIL); | ||
419 | if (status1 & WM8350_CHG_TO_EINT) | ||
420 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_TO); | ||
421 | if (status1 & WM8350_CHG_END_EINT) | ||
422 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_END); | ||
423 | if (status1 & WM8350_CHG_START_EINT) | ||
424 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_START); | ||
425 | if (status1 & WM8350_CHG_FAST_RDY_EINT) | ||
426 | wm8350_irq_call_handler(wm8350, | ||
427 | WM8350_IRQ_CHG_FAST_RDY); | ||
428 | if (status1 & WM8350_CHG_VBATT_LT_3P9_EINT) | ||
429 | wm8350_irq_call_handler(wm8350, | ||
430 | WM8350_IRQ_CHG_VBATT_LT_3P9); | ||
431 | if (status1 & WM8350_CHG_VBATT_LT_3P1_EINT) | ||
432 | wm8350_irq_call_handler(wm8350, | ||
433 | WM8350_IRQ_CHG_VBATT_LT_3P1); | ||
434 | if (status1 & WM8350_CHG_VBATT_LT_2P85_EINT) | ||
435 | wm8350_irq_call_handler(wm8350, | ||
436 | WM8350_IRQ_CHG_VBATT_LT_2P85); | ||
437 | if (status1 & WM8350_RTC_ALM_EINT) | ||
438 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_ALM); | ||
439 | if (status1 & WM8350_RTC_SEC_EINT) | ||
440 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_SEC); | ||
441 | if (status1 & WM8350_RTC_PER_EINT) | ||
442 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_PER); | ||
443 | } | ||
444 | |||
445 | /* current sink, system, aux adc */ | ||
446 | if (status2) { | ||
447 | if (status2 & WM8350_CS1_EINT) | ||
448 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_CS1); | ||
449 | if (status2 & WM8350_CS2_EINT) | ||
450 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_CS2); | ||
451 | |||
452 | if (status2 & WM8350_SYS_HYST_COMP_FAIL_EINT) | ||
453 | wm8350_irq_call_handler(wm8350, | ||
454 | WM8350_IRQ_SYS_HYST_COMP_FAIL); | ||
455 | if (status2 & WM8350_SYS_CHIP_GT115_EINT) | ||
456 | wm8350_irq_call_handler(wm8350, | ||
457 | WM8350_IRQ_SYS_CHIP_GT115); | ||
458 | if (status2 & WM8350_SYS_CHIP_GT140_EINT) | ||
459 | wm8350_irq_call_handler(wm8350, | ||
460 | WM8350_IRQ_SYS_CHIP_GT140); | ||
461 | if (status2 & WM8350_SYS_WDOG_TO_EINT) | ||
462 | wm8350_irq_call_handler(wm8350, | ||
463 | WM8350_IRQ_SYS_WDOG_TO); | ||
464 | |||
465 | if (status2 & WM8350_AUXADC_DATARDY_EINT) | ||
466 | wm8350_irq_call_handler(wm8350, | ||
467 | WM8350_IRQ_AUXADC_DATARDY); | ||
468 | if (status2 & WM8350_AUXADC_DCOMP4_EINT) | ||
469 | wm8350_irq_call_handler(wm8350, | ||
470 | WM8350_IRQ_AUXADC_DCOMP4); | ||
471 | if (status2 & WM8350_AUXADC_DCOMP3_EINT) | ||
472 | wm8350_irq_call_handler(wm8350, | ||
473 | WM8350_IRQ_AUXADC_DCOMP3); | ||
474 | if (status2 & WM8350_AUXADC_DCOMP2_EINT) | ||
475 | wm8350_irq_call_handler(wm8350, | ||
476 | WM8350_IRQ_AUXADC_DCOMP2); | ||
477 | if (status2 & WM8350_AUXADC_DCOMP1_EINT) | ||
478 | wm8350_irq_call_handler(wm8350, | ||
479 | WM8350_IRQ_AUXADC_DCOMP1); | ||
480 | |||
481 | if (status2 & WM8350_USB_LIMIT_EINT) | ||
482 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_USB_LIMIT); | ||
483 | } | ||
484 | |||
485 | /* wake, codec, ext */ | ||
486 | if (comp) { | ||
487 | if (comp & WM8350_WKUP_OFF_STATE_EINT) | ||
488 | wm8350_irq_call_handler(wm8350, | ||
489 | WM8350_IRQ_WKUP_OFF_STATE); | ||
490 | if (comp & WM8350_WKUP_HIB_STATE_EINT) | ||
491 | wm8350_irq_call_handler(wm8350, | ||
492 | WM8350_IRQ_WKUP_HIB_STATE); | ||
493 | if (comp & WM8350_WKUP_CONV_FAULT_EINT) | ||
494 | wm8350_irq_call_handler(wm8350, | ||
495 | WM8350_IRQ_WKUP_CONV_FAULT); | ||
496 | if (comp & WM8350_WKUP_WDOG_RST_EINT) | ||
497 | wm8350_irq_call_handler(wm8350, | ||
498 | WM8350_IRQ_WKUP_WDOG_RST); | ||
499 | if (comp & WM8350_WKUP_GP_PWR_ON_EINT) | ||
500 | wm8350_irq_call_handler(wm8350, | ||
501 | WM8350_IRQ_WKUP_GP_PWR_ON); | ||
502 | if (comp & WM8350_WKUP_ONKEY_EINT) | ||
503 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_WKUP_ONKEY); | ||
504 | if (comp & WM8350_WKUP_GP_WAKEUP_EINT) | ||
505 | wm8350_irq_call_handler(wm8350, | ||
506 | WM8350_IRQ_WKUP_GP_WAKEUP); | ||
507 | |||
508 | if (comp & WM8350_CODEC_JCK_DET_L_EINT) | ||
509 | wm8350_irq_call_handler(wm8350, | ||
510 | WM8350_IRQ_CODEC_JCK_DET_L); | ||
511 | if (comp & WM8350_CODEC_JCK_DET_R_EINT) | ||
512 | wm8350_irq_call_handler(wm8350, | ||
513 | WM8350_IRQ_CODEC_JCK_DET_R); | ||
514 | if (comp & WM8350_CODEC_MICSCD_EINT) | ||
515 | wm8350_irq_call_handler(wm8350, | ||
516 | WM8350_IRQ_CODEC_MICSCD); | ||
517 | if (comp & WM8350_CODEC_MICD_EINT) | ||
518 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_CODEC_MICD); | ||
519 | |||
520 | if (comp & WM8350_EXT_USB_FB_EINT) | ||
521 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_EXT_USB_FB); | ||
522 | if (comp & WM8350_EXT_WALL_FB_EINT) | ||
523 | wm8350_irq_call_handler(wm8350, | ||
524 | WM8350_IRQ_EXT_WALL_FB); | ||
525 | if (comp & WM8350_EXT_BAT_FB_EINT) | ||
526 | wm8350_irq_call_handler(wm8350, WM8350_IRQ_EXT_BAT_FB); | ||
527 | } | ||
528 | |||
529 | if (level_one & WM8350_GP_INT) { | ||
530 | int i; | ||
531 | u16 gpio; | ||
532 | |||
533 | gpio = wm8350_reg_read(wm8350, WM8350_GPIO_INT_STATUS); | ||
534 | gpio &= ~wm8350_reg_read(wm8350, | ||
535 | WM8350_GPIO_INT_STATUS_MASK); | ||
536 | |||
537 | for (i = 0; i < 12; i++) { | ||
538 | if (gpio & (1 << i)) | ||
539 | wm8350_irq_call_handler(wm8350, | ||
540 | WM8350_IRQ_GPIO(i)); | ||
541 | } | ||
542 | } | ||
543 | |||
544 | enable_irq(wm8350->chip_irq); | ||
545 | } | ||
546 | |||
547 | static irqreturn_t wm8350_irq(int irq, void *data) | ||
548 | { | ||
549 | struct wm8350 *wm8350 = data; | ||
550 | |||
551 | disable_irq_nosync(irq); | ||
552 | schedule_work(&wm8350->irq_work); | ||
553 | |||
554 | return IRQ_HANDLED; | ||
555 | } | ||
556 | |||
557 | int wm8350_register_irq(struct wm8350 *wm8350, int irq, | ||
558 | void (*handler) (struct wm8350 *, int, void *), | ||
559 | void *data) | ||
560 | { | ||
561 | if (irq < 0 || irq > WM8350_NUM_IRQ || !handler) | ||
562 | return -EINVAL; | ||
563 | |||
564 | if (wm8350->irq[irq].handler) | ||
565 | return -EBUSY; | ||
566 | |||
567 | mutex_lock(&wm8350->irq_mutex); | ||
568 | wm8350->irq[irq].handler = handler; | ||
569 | wm8350->irq[irq].data = data; | ||
570 | mutex_unlock(&wm8350->irq_mutex); | ||
571 | |||
572 | return 0; | ||
573 | } | ||
574 | EXPORT_SYMBOL_GPL(wm8350_register_irq); | ||
575 | |||
576 | int wm8350_free_irq(struct wm8350 *wm8350, int irq) | ||
577 | { | ||
578 | if (irq < 0 || irq > WM8350_NUM_IRQ) | ||
579 | return -EINVAL; | ||
580 | |||
581 | mutex_lock(&wm8350->irq_mutex); | ||
582 | wm8350->irq[irq].handler = NULL; | ||
583 | mutex_unlock(&wm8350->irq_mutex); | ||
584 | return 0; | ||
585 | } | ||
586 | EXPORT_SYMBOL_GPL(wm8350_free_irq); | ||
587 | |||
588 | int wm8350_mask_irq(struct wm8350 *wm8350, int irq) | ||
589 | { | ||
590 | switch (irq) { | ||
591 | case WM8350_IRQ_CHG_BAT_HOT: | ||
592 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
593 | WM8350_IM_CHG_BAT_HOT_EINT); | ||
594 | case WM8350_IRQ_CHG_BAT_COLD: | ||
595 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
596 | WM8350_IM_CHG_BAT_COLD_EINT); | ||
597 | case WM8350_IRQ_CHG_BAT_FAIL: | ||
598 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
599 | WM8350_IM_CHG_BAT_FAIL_EINT); | ||
600 | case WM8350_IRQ_CHG_TO: | ||
601 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
602 | WM8350_IM_CHG_TO_EINT); | ||
603 | case WM8350_IRQ_CHG_END: | ||
604 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
605 | WM8350_IM_CHG_END_EINT); | ||
606 | case WM8350_IRQ_CHG_START: | ||
607 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
608 | WM8350_IM_CHG_START_EINT); | ||
609 | case WM8350_IRQ_CHG_FAST_RDY: | ||
610 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
611 | WM8350_IM_CHG_FAST_RDY_EINT); | ||
612 | case WM8350_IRQ_RTC_PER: | ||
613 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
614 | WM8350_IM_RTC_PER_EINT); | ||
615 | case WM8350_IRQ_RTC_SEC: | ||
616 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
617 | WM8350_IM_RTC_SEC_EINT); | ||
618 | case WM8350_IRQ_RTC_ALM: | ||
619 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
620 | WM8350_IM_RTC_ALM_EINT); | ||
621 | case WM8350_IRQ_CHG_VBATT_LT_3P9: | ||
622 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
623 | WM8350_IM_CHG_VBATT_LT_3P9_EINT); | ||
624 | case WM8350_IRQ_CHG_VBATT_LT_3P1: | ||
625 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
626 | WM8350_IM_CHG_VBATT_LT_3P1_EINT); | ||
627 | case WM8350_IRQ_CHG_VBATT_LT_2P85: | ||
628 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
629 | WM8350_IM_CHG_VBATT_LT_2P85_EINT); | ||
630 | case WM8350_IRQ_CS1: | ||
631 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
632 | WM8350_IM_CS1_EINT); | ||
633 | case WM8350_IRQ_CS2: | ||
634 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
635 | WM8350_IM_CS2_EINT); | ||
636 | case WM8350_IRQ_USB_LIMIT: | ||
637 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
638 | WM8350_IM_USB_LIMIT_EINT); | ||
639 | case WM8350_IRQ_AUXADC_DATARDY: | ||
640 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
641 | WM8350_IM_AUXADC_DATARDY_EINT); | ||
642 | case WM8350_IRQ_AUXADC_DCOMP4: | ||
643 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
644 | WM8350_IM_AUXADC_DCOMP4_EINT); | ||
645 | case WM8350_IRQ_AUXADC_DCOMP3: | ||
646 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
647 | WM8350_IM_AUXADC_DCOMP3_EINT); | ||
648 | case WM8350_IRQ_AUXADC_DCOMP2: | ||
649 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
650 | WM8350_IM_AUXADC_DCOMP2_EINT); | ||
651 | case WM8350_IRQ_AUXADC_DCOMP1: | ||
652 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
653 | WM8350_IM_AUXADC_DCOMP1_EINT); | ||
654 | case WM8350_IRQ_SYS_HYST_COMP_FAIL: | ||
655 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
656 | WM8350_IM_SYS_HYST_COMP_FAIL_EINT); | ||
657 | case WM8350_IRQ_SYS_CHIP_GT115: | ||
658 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
659 | WM8350_IM_SYS_CHIP_GT115_EINT); | ||
660 | case WM8350_IRQ_SYS_CHIP_GT140: | ||
661 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
662 | WM8350_IM_SYS_CHIP_GT140_EINT); | ||
663 | case WM8350_IRQ_SYS_WDOG_TO: | ||
664 | return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
665 | WM8350_IM_SYS_WDOG_TO_EINT); | ||
666 | case WM8350_IRQ_UV_LDO4: | ||
667 | return wm8350_set_bits(wm8350, | ||
668 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
669 | WM8350_IM_UV_LDO4_EINT); | ||
670 | case WM8350_IRQ_UV_LDO3: | ||
671 | return wm8350_set_bits(wm8350, | ||
672 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
673 | WM8350_IM_UV_LDO3_EINT); | ||
674 | case WM8350_IRQ_UV_LDO2: | ||
675 | return wm8350_set_bits(wm8350, | ||
676 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
677 | WM8350_IM_UV_LDO2_EINT); | ||
678 | case WM8350_IRQ_UV_LDO1: | ||
679 | return wm8350_set_bits(wm8350, | ||
680 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
681 | WM8350_IM_UV_LDO1_EINT); | ||
682 | case WM8350_IRQ_UV_DC6: | ||
683 | return wm8350_set_bits(wm8350, | ||
684 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
685 | WM8350_IM_UV_DC6_EINT); | ||
686 | case WM8350_IRQ_UV_DC5: | ||
687 | return wm8350_set_bits(wm8350, | ||
688 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
689 | WM8350_IM_UV_DC5_EINT); | ||
690 | case WM8350_IRQ_UV_DC4: | ||
691 | return wm8350_set_bits(wm8350, | ||
692 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
693 | WM8350_IM_UV_DC4_EINT); | ||
694 | case WM8350_IRQ_UV_DC3: | ||
695 | return wm8350_set_bits(wm8350, | ||
696 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
697 | WM8350_IM_UV_DC3_EINT); | ||
698 | case WM8350_IRQ_UV_DC2: | ||
699 | return wm8350_set_bits(wm8350, | ||
700 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
701 | WM8350_IM_UV_DC2_EINT); | ||
702 | case WM8350_IRQ_UV_DC1: | ||
703 | return wm8350_set_bits(wm8350, | ||
704 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
705 | WM8350_IM_UV_DC1_EINT); | ||
706 | case WM8350_IRQ_OC_LS: | ||
707 | return wm8350_set_bits(wm8350, | ||
708 | WM8350_OVER_CURRENT_INT_STATUS_MASK, | ||
709 | WM8350_IM_OC_LS_EINT); | ||
710 | case WM8350_IRQ_EXT_USB_FB: | ||
711 | return wm8350_set_bits(wm8350, | ||
712 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
713 | WM8350_IM_EXT_USB_FB_EINT); | ||
714 | case WM8350_IRQ_EXT_WALL_FB: | ||
715 | return wm8350_set_bits(wm8350, | ||
716 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
717 | WM8350_IM_EXT_WALL_FB_EINT); | ||
718 | case WM8350_IRQ_EXT_BAT_FB: | ||
719 | return wm8350_set_bits(wm8350, | ||
720 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
721 | WM8350_IM_EXT_BAT_FB_EINT); | ||
722 | case WM8350_IRQ_CODEC_JCK_DET_L: | ||
723 | return wm8350_set_bits(wm8350, | ||
724 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
725 | WM8350_IM_CODEC_JCK_DET_L_EINT); | ||
726 | case WM8350_IRQ_CODEC_JCK_DET_R: | ||
727 | return wm8350_set_bits(wm8350, | ||
728 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
729 | WM8350_IM_CODEC_JCK_DET_R_EINT); | ||
730 | case WM8350_IRQ_CODEC_MICSCD: | ||
731 | return wm8350_set_bits(wm8350, | ||
732 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
733 | WM8350_IM_CODEC_MICSCD_EINT); | ||
734 | case WM8350_IRQ_CODEC_MICD: | ||
735 | return wm8350_set_bits(wm8350, | ||
736 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
737 | WM8350_IM_CODEC_MICD_EINT); | ||
738 | case WM8350_IRQ_WKUP_OFF_STATE: | ||
739 | return wm8350_set_bits(wm8350, | ||
740 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
741 | WM8350_IM_WKUP_OFF_STATE_EINT); | ||
742 | case WM8350_IRQ_WKUP_HIB_STATE: | ||
743 | return wm8350_set_bits(wm8350, | ||
744 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
745 | WM8350_IM_WKUP_HIB_STATE_EINT); | ||
746 | case WM8350_IRQ_WKUP_CONV_FAULT: | ||
747 | return wm8350_set_bits(wm8350, | ||
748 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
749 | WM8350_IM_WKUP_CONV_FAULT_EINT); | ||
750 | case WM8350_IRQ_WKUP_WDOG_RST: | ||
751 | return wm8350_set_bits(wm8350, | ||
752 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
753 | WM8350_IM_WKUP_OFF_STATE_EINT); | ||
754 | case WM8350_IRQ_WKUP_GP_PWR_ON: | ||
755 | return wm8350_set_bits(wm8350, | ||
756 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
757 | WM8350_IM_WKUP_GP_PWR_ON_EINT); | ||
758 | case WM8350_IRQ_WKUP_ONKEY: | ||
759 | return wm8350_set_bits(wm8350, | ||
760 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
761 | WM8350_IM_WKUP_ONKEY_EINT); | ||
762 | case WM8350_IRQ_WKUP_GP_WAKEUP: | ||
763 | return wm8350_set_bits(wm8350, | ||
764 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
765 | WM8350_IM_WKUP_GP_WAKEUP_EINT); | ||
766 | case WM8350_IRQ_GPIO(0): | ||
767 | return wm8350_set_bits(wm8350, | ||
768 | WM8350_GPIO_INT_STATUS_MASK, | ||
769 | WM8350_IM_GP0_EINT); | ||
770 | case WM8350_IRQ_GPIO(1): | ||
771 | return wm8350_set_bits(wm8350, | ||
772 | WM8350_GPIO_INT_STATUS_MASK, | ||
773 | WM8350_IM_GP1_EINT); | ||
774 | case WM8350_IRQ_GPIO(2): | ||
775 | return wm8350_set_bits(wm8350, | ||
776 | WM8350_GPIO_INT_STATUS_MASK, | ||
777 | WM8350_IM_GP2_EINT); | ||
778 | case WM8350_IRQ_GPIO(3): | ||
779 | return wm8350_set_bits(wm8350, | ||
780 | WM8350_GPIO_INT_STATUS_MASK, | ||
781 | WM8350_IM_GP3_EINT); | ||
782 | case WM8350_IRQ_GPIO(4): | ||
783 | return wm8350_set_bits(wm8350, | ||
784 | WM8350_GPIO_INT_STATUS_MASK, | ||
785 | WM8350_IM_GP4_EINT); | ||
786 | case WM8350_IRQ_GPIO(5): | ||
787 | return wm8350_set_bits(wm8350, | ||
788 | WM8350_GPIO_INT_STATUS_MASK, | ||
789 | WM8350_IM_GP5_EINT); | ||
790 | case WM8350_IRQ_GPIO(6): | ||
791 | return wm8350_set_bits(wm8350, | ||
792 | WM8350_GPIO_INT_STATUS_MASK, | ||
793 | WM8350_IM_GP6_EINT); | ||
794 | case WM8350_IRQ_GPIO(7): | ||
795 | return wm8350_set_bits(wm8350, | ||
796 | WM8350_GPIO_INT_STATUS_MASK, | ||
797 | WM8350_IM_GP7_EINT); | ||
798 | case WM8350_IRQ_GPIO(8): | ||
799 | return wm8350_set_bits(wm8350, | ||
800 | WM8350_GPIO_INT_STATUS_MASK, | ||
801 | WM8350_IM_GP8_EINT); | ||
802 | case WM8350_IRQ_GPIO(9): | ||
803 | return wm8350_set_bits(wm8350, | ||
804 | WM8350_GPIO_INT_STATUS_MASK, | ||
805 | WM8350_IM_GP9_EINT); | ||
806 | case WM8350_IRQ_GPIO(10): | ||
807 | return wm8350_set_bits(wm8350, | ||
808 | WM8350_GPIO_INT_STATUS_MASK, | ||
809 | WM8350_IM_GP10_EINT); | ||
810 | case WM8350_IRQ_GPIO(11): | ||
811 | return wm8350_set_bits(wm8350, | ||
812 | WM8350_GPIO_INT_STATUS_MASK, | ||
813 | WM8350_IM_GP11_EINT); | ||
814 | case WM8350_IRQ_GPIO(12): | ||
815 | return wm8350_set_bits(wm8350, | ||
816 | WM8350_GPIO_INT_STATUS_MASK, | ||
817 | WM8350_IM_GP12_EINT); | ||
818 | default: | ||
819 | dev_warn(wm8350->dev, "Attempting to mask unknown IRQ %d\n", | ||
820 | irq); | ||
821 | return -EINVAL; | ||
822 | } | ||
823 | return 0; | ||
824 | } | ||
825 | EXPORT_SYMBOL_GPL(wm8350_mask_irq); | ||
826 | |||
827 | int wm8350_unmask_irq(struct wm8350 *wm8350, int irq) | ||
828 | { | ||
829 | switch (irq) { | ||
830 | case WM8350_IRQ_CHG_BAT_HOT: | ||
831 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
832 | WM8350_IM_CHG_BAT_HOT_EINT); | ||
833 | case WM8350_IRQ_CHG_BAT_COLD: | ||
834 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
835 | WM8350_IM_CHG_BAT_COLD_EINT); | ||
836 | case WM8350_IRQ_CHG_BAT_FAIL: | ||
837 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
838 | WM8350_IM_CHG_BAT_FAIL_EINT); | ||
839 | case WM8350_IRQ_CHG_TO: | ||
840 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
841 | WM8350_IM_CHG_TO_EINT); | ||
842 | case WM8350_IRQ_CHG_END: | ||
843 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
844 | WM8350_IM_CHG_END_EINT); | ||
845 | case WM8350_IRQ_CHG_START: | ||
846 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
847 | WM8350_IM_CHG_START_EINT); | ||
848 | case WM8350_IRQ_CHG_FAST_RDY: | ||
849 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
850 | WM8350_IM_CHG_FAST_RDY_EINT); | ||
851 | case WM8350_IRQ_RTC_PER: | ||
852 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
853 | WM8350_IM_RTC_PER_EINT); | ||
854 | case WM8350_IRQ_RTC_SEC: | ||
855 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
856 | WM8350_IM_RTC_SEC_EINT); | ||
857 | case WM8350_IRQ_RTC_ALM: | ||
858 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
859 | WM8350_IM_RTC_ALM_EINT); | ||
860 | case WM8350_IRQ_CHG_VBATT_LT_3P9: | ||
861 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
862 | WM8350_IM_CHG_VBATT_LT_3P9_EINT); | ||
863 | case WM8350_IRQ_CHG_VBATT_LT_3P1: | ||
864 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
865 | WM8350_IM_CHG_VBATT_LT_3P1_EINT); | ||
866 | case WM8350_IRQ_CHG_VBATT_LT_2P85: | ||
867 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK, | ||
868 | WM8350_IM_CHG_VBATT_LT_2P85_EINT); | ||
869 | case WM8350_IRQ_CS1: | ||
870 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
871 | WM8350_IM_CS1_EINT); | ||
872 | case WM8350_IRQ_CS2: | ||
873 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
874 | WM8350_IM_CS2_EINT); | ||
875 | case WM8350_IRQ_USB_LIMIT: | ||
876 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
877 | WM8350_IM_USB_LIMIT_EINT); | ||
878 | case WM8350_IRQ_AUXADC_DATARDY: | ||
879 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
880 | WM8350_IM_AUXADC_DATARDY_EINT); | ||
881 | case WM8350_IRQ_AUXADC_DCOMP4: | ||
882 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
883 | WM8350_IM_AUXADC_DCOMP4_EINT); | ||
884 | case WM8350_IRQ_AUXADC_DCOMP3: | ||
885 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
886 | WM8350_IM_AUXADC_DCOMP3_EINT); | ||
887 | case WM8350_IRQ_AUXADC_DCOMP2: | ||
888 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
889 | WM8350_IM_AUXADC_DCOMP2_EINT); | ||
890 | case WM8350_IRQ_AUXADC_DCOMP1: | ||
891 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
892 | WM8350_IM_AUXADC_DCOMP1_EINT); | ||
893 | case WM8350_IRQ_SYS_HYST_COMP_FAIL: | ||
894 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
895 | WM8350_IM_SYS_HYST_COMP_FAIL_EINT); | ||
896 | case WM8350_IRQ_SYS_CHIP_GT115: | ||
897 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
898 | WM8350_IM_SYS_CHIP_GT115_EINT); | ||
899 | case WM8350_IRQ_SYS_CHIP_GT140: | ||
900 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
901 | WM8350_IM_SYS_CHIP_GT140_EINT); | ||
902 | case WM8350_IRQ_SYS_WDOG_TO: | ||
903 | return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK, | ||
904 | WM8350_IM_SYS_WDOG_TO_EINT); | ||
905 | case WM8350_IRQ_UV_LDO4: | ||
906 | return wm8350_clear_bits(wm8350, | ||
907 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
908 | WM8350_IM_UV_LDO4_EINT); | ||
909 | case WM8350_IRQ_UV_LDO3: | ||
910 | return wm8350_clear_bits(wm8350, | ||
911 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
912 | WM8350_IM_UV_LDO3_EINT); | ||
913 | case WM8350_IRQ_UV_LDO2: | ||
914 | return wm8350_clear_bits(wm8350, | ||
915 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
916 | WM8350_IM_UV_LDO2_EINT); | ||
917 | case WM8350_IRQ_UV_LDO1: | ||
918 | return wm8350_clear_bits(wm8350, | ||
919 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
920 | WM8350_IM_UV_LDO1_EINT); | ||
921 | case WM8350_IRQ_UV_DC6: | ||
922 | return wm8350_clear_bits(wm8350, | ||
923 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
924 | WM8350_IM_UV_DC6_EINT); | ||
925 | case WM8350_IRQ_UV_DC5: | ||
926 | return wm8350_clear_bits(wm8350, | ||
927 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
928 | WM8350_IM_UV_DC5_EINT); | ||
929 | case WM8350_IRQ_UV_DC4: | ||
930 | return wm8350_clear_bits(wm8350, | ||
931 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
932 | WM8350_IM_UV_DC4_EINT); | ||
933 | case WM8350_IRQ_UV_DC3: | ||
934 | return wm8350_clear_bits(wm8350, | ||
935 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
936 | WM8350_IM_UV_DC3_EINT); | ||
937 | case WM8350_IRQ_UV_DC2: | ||
938 | return wm8350_clear_bits(wm8350, | ||
939 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
940 | WM8350_IM_UV_DC2_EINT); | ||
941 | case WM8350_IRQ_UV_DC1: | ||
942 | return wm8350_clear_bits(wm8350, | ||
943 | WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, | ||
944 | WM8350_IM_UV_DC1_EINT); | ||
945 | case WM8350_IRQ_OC_LS: | ||
946 | return wm8350_clear_bits(wm8350, | ||
947 | WM8350_OVER_CURRENT_INT_STATUS_MASK, | ||
948 | WM8350_IM_OC_LS_EINT); | ||
949 | case WM8350_IRQ_EXT_USB_FB: | ||
950 | return wm8350_clear_bits(wm8350, | ||
951 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
952 | WM8350_IM_EXT_USB_FB_EINT); | ||
953 | case WM8350_IRQ_EXT_WALL_FB: | ||
954 | return wm8350_clear_bits(wm8350, | ||
955 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
956 | WM8350_IM_EXT_WALL_FB_EINT); | ||
957 | case WM8350_IRQ_EXT_BAT_FB: | ||
958 | return wm8350_clear_bits(wm8350, | ||
959 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
960 | WM8350_IM_EXT_BAT_FB_EINT); | ||
961 | case WM8350_IRQ_CODEC_JCK_DET_L: | ||
962 | return wm8350_clear_bits(wm8350, | ||
963 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
964 | WM8350_IM_CODEC_JCK_DET_L_EINT); | ||
965 | case WM8350_IRQ_CODEC_JCK_DET_R: | ||
966 | return wm8350_clear_bits(wm8350, | ||
967 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
968 | WM8350_IM_CODEC_JCK_DET_R_EINT); | ||
969 | case WM8350_IRQ_CODEC_MICSCD: | ||
970 | return wm8350_clear_bits(wm8350, | ||
971 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
972 | WM8350_IM_CODEC_MICSCD_EINT); | ||
973 | case WM8350_IRQ_CODEC_MICD: | ||
974 | return wm8350_clear_bits(wm8350, | ||
975 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
976 | WM8350_IM_CODEC_MICD_EINT); | ||
977 | case WM8350_IRQ_WKUP_OFF_STATE: | ||
978 | return wm8350_clear_bits(wm8350, | ||
979 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
980 | WM8350_IM_WKUP_OFF_STATE_EINT); | ||
981 | case WM8350_IRQ_WKUP_HIB_STATE: | ||
982 | return wm8350_clear_bits(wm8350, | ||
983 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
984 | WM8350_IM_WKUP_HIB_STATE_EINT); | ||
985 | case WM8350_IRQ_WKUP_CONV_FAULT: | ||
986 | return wm8350_clear_bits(wm8350, | ||
987 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
988 | WM8350_IM_WKUP_CONV_FAULT_EINT); | ||
989 | case WM8350_IRQ_WKUP_WDOG_RST: | ||
990 | return wm8350_clear_bits(wm8350, | ||
991 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
992 | WM8350_IM_WKUP_OFF_STATE_EINT); | ||
993 | case WM8350_IRQ_WKUP_GP_PWR_ON: | ||
994 | return wm8350_clear_bits(wm8350, | ||
995 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
996 | WM8350_IM_WKUP_GP_PWR_ON_EINT); | ||
997 | case WM8350_IRQ_WKUP_ONKEY: | ||
998 | return wm8350_clear_bits(wm8350, | ||
999 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
1000 | WM8350_IM_WKUP_ONKEY_EINT); | ||
1001 | case WM8350_IRQ_WKUP_GP_WAKEUP: | ||
1002 | return wm8350_clear_bits(wm8350, | ||
1003 | WM8350_COMPARATOR_INT_STATUS_MASK, | ||
1004 | WM8350_IM_WKUP_GP_WAKEUP_EINT); | ||
1005 | case WM8350_IRQ_GPIO(0): | ||
1006 | return wm8350_clear_bits(wm8350, | ||
1007 | WM8350_GPIO_INT_STATUS_MASK, | ||
1008 | WM8350_IM_GP0_EINT); | ||
1009 | case WM8350_IRQ_GPIO(1): | ||
1010 | return wm8350_clear_bits(wm8350, | ||
1011 | WM8350_GPIO_INT_STATUS_MASK, | ||
1012 | WM8350_IM_GP1_EINT); | ||
1013 | case WM8350_IRQ_GPIO(2): | ||
1014 | return wm8350_clear_bits(wm8350, | ||
1015 | WM8350_GPIO_INT_STATUS_MASK, | ||
1016 | WM8350_IM_GP2_EINT); | ||
1017 | case WM8350_IRQ_GPIO(3): | ||
1018 | return wm8350_clear_bits(wm8350, | ||
1019 | WM8350_GPIO_INT_STATUS_MASK, | ||
1020 | WM8350_IM_GP3_EINT); | ||
1021 | case WM8350_IRQ_GPIO(4): | ||
1022 | return wm8350_clear_bits(wm8350, | ||
1023 | WM8350_GPIO_INT_STATUS_MASK, | ||
1024 | WM8350_IM_GP4_EINT); | ||
1025 | case WM8350_IRQ_GPIO(5): | ||
1026 | return wm8350_clear_bits(wm8350, | ||
1027 | WM8350_GPIO_INT_STATUS_MASK, | ||
1028 | WM8350_IM_GP5_EINT); | ||
1029 | case WM8350_IRQ_GPIO(6): | ||
1030 | return wm8350_clear_bits(wm8350, | ||
1031 | WM8350_GPIO_INT_STATUS_MASK, | ||
1032 | WM8350_IM_GP6_EINT); | ||
1033 | case WM8350_IRQ_GPIO(7): | ||
1034 | return wm8350_clear_bits(wm8350, | ||
1035 | WM8350_GPIO_INT_STATUS_MASK, | ||
1036 | WM8350_IM_GP7_EINT); | ||
1037 | case WM8350_IRQ_GPIO(8): | ||
1038 | return wm8350_clear_bits(wm8350, | ||
1039 | WM8350_GPIO_INT_STATUS_MASK, | ||
1040 | WM8350_IM_GP8_EINT); | ||
1041 | case WM8350_IRQ_GPIO(9): | ||
1042 | return wm8350_clear_bits(wm8350, | ||
1043 | WM8350_GPIO_INT_STATUS_MASK, | ||
1044 | WM8350_IM_GP9_EINT); | ||
1045 | case WM8350_IRQ_GPIO(10): | ||
1046 | return wm8350_clear_bits(wm8350, | ||
1047 | WM8350_GPIO_INT_STATUS_MASK, | ||
1048 | WM8350_IM_GP10_EINT); | ||
1049 | case WM8350_IRQ_GPIO(11): | ||
1050 | return wm8350_clear_bits(wm8350, | ||
1051 | WM8350_GPIO_INT_STATUS_MASK, | ||
1052 | WM8350_IM_GP11_EINT); | ||
1053 | case WM8350_IRQ_GPIO(12): | ||
1054 | return wm8350_clear_bits(wm8350, | ||
1055 | WM8350_GPIO_INT_STATUS_MASK, | ||
1056 | WM8350_IM_GP12_EINT); | ||
1057 | default: | ||
1058 | dev_warn(wm8350->dev, "Attempting to unmask unknown IRQ %d\n", | ||
1059 | irq); | ||
1060 | return -EINVAL; | ||
1061 | } | ||
1062 | return 0; | ||
1063 | } | ||
1064 | EXPORT_SYMBOL_GPL(wm8350_unmask_irq); | ||
1065 | |||
324 | /* | 1066 | /* |
325 | * Cache is always host endian. | 1067 | * Cache is always host endian. |
326 | */ | 1068 | */ |
@@ -388,11 +1130,12 @@ out: | |||
388 | } | 1130 | } |
389 | EXPORT_SYMBOL_GPL(wm8350_create_cache); | 1131 | EXPORT_SYMBOL_GPL(wm8350_create_cache); |
390 | 1132 | ||
391 | int wm8350_device_init(struct wm8350 *wm8350, | 1133 | int wm8350_device_init(struct wm8350 *wm8350, int irq, |
392 | struct wm8350_platform_data *pdata) | 1134 | struct wm8350_platform_data *pdata) |
393 | { | 1135 | { |
394 | int ret = -EINVAL; | 1136 | int ret = -EINVAL; |
395 | u16 id1, id2, mask, mode; | 1137 | u16 id1, id2, mask, mode; |
1138 | int i; | ||
396 | 1139 | ||
397 | /* get WM8350 revision and config mode */ | 1140 | /* get WM8350 revision and config mode */ |
398 | wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1); | 1141 | wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1); |
@@ -401,9 +1144,7 @@ int wm8350_device_init(struct wm8350 *wm8350, | |||
401 | id1 = be16_to_cpu(id1); | 1144 | id1 = be16_to_cpu(id1); |
402 | id2 = be16_to_cpu(id2); | 1145 | id2 = be16_to_cpu(id2); |
403 | 1146 | ||
404 | if (id1 == 0x0) | 1147 | if (id1 == 0x6143) { |
405 | dev_info(wm8350->dev, "Found Rev C device\n"); | ||
406 | else if (id1 == 0x6143) { | ||
407 | switch ((id2 & WM8350_CHIP_REV_MASK) >> 12) { | 1148 | switch ((id2 & WM8350_CHIP_REV_MASK) >> 12) { |
408 | case WM8350_REV_E: | 1149 | case WM8350_REV_E: |
409 | dev_info(wm8350->dev, "Found Rev E device\n"); | 1150 | dev_info(wm8350->dev, "Found Rev E device\n"); |
@@ -449,6 +1190,24 @@ int wm8350_device_init(struct wm8350 *wm8350, | |||
449 | } | 1190 | } |
450 | } | 1191 | } |
451 | 1192 | ||
1193 | mutex_init(&wm8350->irq_mutex); | ||
1194 | INIT_WORK(&wm8350->irq_work, wm8350_irq_worker); | ||
1195 | if (irq != NO_IRQ) { | ||
1196 | ret = request_irq(irq, wm8350_irq, 0, | ||
1197 | "wm8350", wm8350); | ||
1198 | if (ret != 0) { | ||
1199 | dev_err(wm8350->dev, "Failed to request IRQ: %d\n", | ||
1200 | ret); | ||
1201 | goto err; | ||
1202 | } | ||
1203 | } else { | ||
1204 | dev_err(wm8350->dev, "No IRQ configured\n"); | ||
1205 | goto err; | ||
1206 | } | ||
1207 | wm8350->chip_irq = irq; | ||
1208 | |||
1209 | wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0); | ||
1210 | |||
452 | return 0; | 1211 | return 0; |
453 | 1212 | ||
454 | err: | 1213 | err: |
@@ -459,8 +1218,11 @@ EXPORT_SYMBOL_GPL(wm8350_device_init); | |||
459 | 1218 | ||
460 | void wm8350_device_exit(struct wm8350 *wm8350) | 1219 | void wm8350_device_exit(struct wm8350 *wm8350) |
461 | { | 1220 | { |
1221 | free_irq(wm8350->chip_irq, wm8350); | ||
1222 | flush_work(&wm8350->irq_work); | ||
462 | kfree(wm8350->reg_cache); | 1223 | kfree(wm8350->reg_cache); |
463 | } | 1224 | } |
464 | EXPORT_SYMBOL_GPL(wm8350_device_exit); | 1225 | EXPORT_SYMBOL_GPL(wm8350_device_exit); |
465 | 1226 | ||
1227 | MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver"); | ||
466 | MODULE_LICENSE("GPL"); | 1228 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/mfd/wm8350-i2c.c b/drivers/mfd/wm8350-i2c.c index 245b790961aa..8dfe21bb3bd1 100644 --- a/drivers/mfd/wm8350-i2c.c +++ b/drivers/mfd/wm8350-i2c.c | |||
@@ -65,7 +65,7 @@ static int wm8350_i2c_probe(struct i2c_client *i2c, | |||
65 | wm8350->read_dev = wm8350_i2c_read_device; | 65 | wm8350->read_dev = wm8350_i2c_read_device; |
66 | wm8350->write_dev = wm8350_i2c_write_device; | 66 | wm8350->write_dev = wm8350_i2c_write_device; |
67 | 67 | ||
68 | ret = wm8350_device_init(wm8350, i2c->dev.platform_data); | 68 | ret = wm8350_device_init(wm8350, i2c->irq, i2c->dev.platform_data); |
69 | if (ret < 0) | 69 | if (ret < 0) |
70 | goto err; | 70 | goto err; |
71 | 71 | ||