diff options
Diffstat (limited to 'drivers/media')
-rw-r--r-- | drivers/media/dvb/frontends/stv090x.c | 1169 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/stv090x_priv.h | 33 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/stv090x_reg.h | 72 |
3 files changed, 766 insertions, 508 deletions
diff --git a/drivers/media/dvb/frontends/stv090x.c b/drivers/media/dvb/frontends/stv090x.c index fc87dfa96597..96ef745a2e4e 100644 --- a/drivers/media/dvb/frontends/stv090x.c +++ b/drivers/media/dvb/frontends/stv090x.c | |||
@@ -503,25 +503,6 @@ static struct stv090x_reg stv0903_cut20_val[] = { | |||
503 | { STV090x_GAINLLR_NF17, 0x21 } | 503 | { STV090x_GAINLLR_NF17, 0x21 } |
504 | }; | 504 | }; |
505 | 505 | ||
506 | /* Cut 1.x Long Frame Tracking CR loop */ | ||
507 | static struct stv090x_long_frame_crloop stv090x_s2_crl[] = { | ||
508 | /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */ | ||
509 | { STV090x_QPSK_12, 0x1c, 0x0d, 0x1b, 0x2c, 0x3a, 0x1c, 0x2a, 0x3b, 0x2a, 0x1b }, | ||
510 | { STV090x_QPSK_35, 0x2c, 0x0d, 0x2b, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b, 0x2a, 0x0b }, | ||
511 | { STV090x_QPSK_23, 0x2c, 0x0d, 0x2b, 0x2c, 0x0b, 0x0c, 0x3a, 0x1b, 0x2a, 0x3a }, | ||
512 | { STV090x_QPSK_34, 0x3c, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a }, | ||
513 | { STV090x_QPSK_45, 0x3c, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a }, | ||
514 | { STV090x_QPSK_56, 0x0d, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a }, | ||
515 | { STV090x_QPSK_89, 0x0d, 0x0d, 0x3b, 0x1c, 0x1b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a }, | ||
516 | { STV090x_QPSK_910, 0x1d, 0x0d, 0x3b, 0x1c, 0x1b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a }, | ||
517 | { STV090x_8PSK_35, 0x29, 0x3b, 0x09, 0x2b, 0x38, 0x0b, 0x18, 0x1a, 0x08, 0x0a }, | ||
518 | { STV090x_8PSK_23, 0x0a, 0x3b, 0x29, 0x2b, 0x19, 0x0b, 0x38, 0x1a, 0x18, 0x0a }, | ||
519 | { STV090x_8PSK_34, 0x3a, 0x3b, 0x2a, 0x2b, 0x39, 0x0b, 0x19, 0x1a, 0x38, 0x0a }, | ||
520 | { STV090x_8PSK_56, 0x1b, 0x3b, 0x0b, 0x2b, 0x1a, 0x0b, 0x39, 0x1a, 0x19, 0x0a }, | ||
521 | { STV090x_8PSK_89, 0x3b, 0x3b, 0x0b, 0x2b, 0x2a, 0x0b, 0x39, 0x1a, 0x29, 0x39 }, | ||
522 | { STV090x_8PSK_910, 0x3b, 0x3b, 0x0b, 0x2b, 0x2a, 0x0b, 0x39, 0x1a, 0x29, 0x39 } | ||
523 | }; | ||
524 | |||
525 | /* Cut 2.0 Long Frame Tracking CR loop */ | 506 | /* Cut 2.0 Long Frame Tracking CR loop */ |
526 | static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = { | 507 | static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = { |
527 | /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */ | 508 | /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */ |
@@ -541,6 +522,24 @@ static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = { | |||
541 | { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d } | 522 | { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d } |
542 | }; | 523 | }; |
543 | 524 | ||
525 | /* Cut 3.0 Long Frame Tracking CR loop */ | ||
526 | static struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = { | ||
527 | /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */ | ||
528 | { STV090x_QPSK_12, 0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b }, | ||
529 | { STV090x_QPSK_35, 0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b }, | ||
530 | { STV090x_QPSK_23, 0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b }, | ||
531 | { STV090x_QPSK_34, 0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b }, | ||
532 | { STV090x_QPSK_45, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b }, | ||
533 | { STV090x_QPSK_56, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b }, | ||
534 | { STV090x_QPSK_89, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b }, | ||
535 | { STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b }, | ||
536 | { STV090x_8PSK_35, 0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 }, | ||
537 | { STV090x_8PSK_23, 0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a }, | ||
538 | { STV090x_8PSK_34, 0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a }, | ||
539 | { STV090x_8PSK_56, 0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b }, | ||
540 | { STV090x_8PSK_89, 0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b }, | ||
541 | { STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b } | ||
542 | }; | ||
544 | 543 | ||
545 | /* Cut 2.0 Long Frame Tracking CR Loop */ | 544 | /* Cut 2.0 Long Frame Tracking CR Loop */ |
546 | static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = { | 545 | static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = { |
@@ -558,6 +557,21 @@ static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = { | |||
558 | { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c } | 557 | { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c } |
559 | }; | 558 | }; |
560 | 559 | ||
560 | /* Cut 3.0 Long Frame Tracking CR Loop */ | ||
561 | static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut30[] = { | ||
562 | /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */ | ||
563 | { STV090x_16APSK_23, 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a }, | ||
564 | { STV090x_16APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a }, | ||
565 | { STV090x_16APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a }, | ||
566 | { STV090x_16APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a }, | ||
567 | { STV090x_16APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a }, | ||
568 | { STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a }, | ||
569 | { STV090x_32APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }, | ||
570 | { STV090x_32APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }, | ||
571 | { STV090x_32APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }, | ||
572 | { STV090x_32APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }, | ||
573 | { STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a } | ||
574 | }; | ||
561 | 575 | ||
562 | static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = { | 576 | static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = { |
563 | /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */ | 577 | /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */ |
@@ -566,16 +580,30 @@ static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = { | |||
566 | { STV090x_QPSK_25, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e } | 580 | { STV090x_QPSK_25, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e } |
567 | }; | 581 | }; |
568 | 582 | ||
583 | static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut30[] = { | ||
584 | /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */ | ||
585 | { STV090x_QPSK_14, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b }, | ||
586 | { STV090x_QPSK_13, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b }, | ||
587 | { STV090x_QPSK_25, 0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b } | ||
588 | }; | ||
569 | 589 | ||
570 | /* Cut 1.2 & 2.0 Short Frame Tracking CR Loop */ | 590 | /* Cut 2.0 Short Frame Tracking CR Loop */ |
571 | static struct stv090x_short_frame_crloop stv090x_s2_short_crl[] = { | 591 | static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = { |
572 | /* MODCOD 2M_cut1.2 2M_cut2.0 5M_cut1.2 5M_cut2.0 10M_cut1.2 10M_cut2.0 20M_cut1.2 20M_cut2.0 30M_cut1.2 30M_cut2.0 */ | 592 | /* MODCOD 2M 5M 10M 20M 30M */ |
573 | { STV090x_QPSK, 0x3c, 0x2f, 0x2b, 0x2e, 0x0b, 0x0e, 0x3a, 0x0e, 0x2a, 0x3d }, | 593 | { STV090x_QPSK, 0x2f, 0x2e, 0x0e, 0x0e, 0x3d }, |
574 | { STV090x_8PSK, 0x0b, 0x3e, 0x2a, 0x0e, 0x0a, 0x2d, 0x19, 0x0d, 0x09, 0x3c }, | 594 | { STV090x_8PSK, 0x3e, 0x0e, 0x2d, 0x0d, 0x3c }, |
575 | { STV090x_16APSK, 0x1b, 0x1e, 0x1b, 0x1e, 0x1b, 0x1e, 0x3a, 0x3d, 0x2a, 0x2d }, | 595 | { STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }, |
576 | { STV090x_32APSK, 0x1b, 0x1e, 0x1b, 0x1e, 0x1b, 0x1e, 0x3a, 0x3d, 0x2a, 0x2d } | 596 | { STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d } |
577 | }; | 597 | }; |
578 | 598 | ||
599 | /* Cut 3.0 Short Frame Tracking CR Loop */ | ||
600 | static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = { | ||
601 | /* MODCOD 2M 5M 10M 20M 30M */ | ||
602 | { STV090x_QPSK, 0x2C, 0x2B, 0x0B, 0x0B, 0x3A }, | ||
603 | { STV090x_8PSK, 0x3B, 0x0B, 0x2A, 0x0A, 0x39 }, | ||
604 | { STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }, | ||
605 | { STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A } | ||
606 | }; | ||
579 | 607 | ||
580 | static inline s32 comp2(s32 __x, s32 __width) | 608 | static inline s32 comp2(s32 __x, s32 __width) |
581 | { | 609 | { |
@@ -987,74 +1015,83 @@ err: | |||
987 | 1015 | ||
988 | static int stv090x_activate_modcod(struct stv090x_state *state) | 1016 | static int stv090x_activate_modcod(struct stv090x_state *state) |
989 | { | 1017 | { |
990 | u32 matype, modcod, f_mod, index; | 1018 | if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0) |
1019 | goto err; | ||
1020 | if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0) | ||
1021 | goto err; | ||
1022 | if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0) | ||
1023 | goto err; | ||
1024 | if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0) | ||
1025 | goto err; | ||
1026 | if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0) | ||
1027 | goto err; | ||
1028 | if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0) | ||
1029 | goto err; | ||
1030 | if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0) | ||
1031 | goto err; | ||
1032 | if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0) | ||
1033 | goto err; | ||
1034 | if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0) | ||
1035 | goto err; | ||
1036 | if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0) | ||
1037 | goto err; | ||
1038 | if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0) | ||
1039 | goto err; | ||
1040 | if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0) | ||
1041 | goto err; | ||
1042 | if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0) | ||
1043 | goto err; | ||
1044 | if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0) | ||
1045 | goto err; | ||
1046 | if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0) | ||
1047 | goto err; | ||
1048 | if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0) | ||
1049 | goto err; | ||
991 | 1050 | ||
992 | if (state->dev_ver <= 0x11) { | 1051 | return 0; |
993 | msleep(5); | 1052 | err: |
994 | modcod = STV090x_READ_DEMOD(state, PLHMODCOD); | 1053 | dprintk(FE_ERROR, 1, "I/O error"); |
995 | matype = modcod & 0x03; | 1054 | return -1; |
996 | modcod = (modcod & 0x7f) >> 2; | 1055 | } |
997 | index = STV090x_ADDR_OFFST(state, MODCODLSTF) - (modcod / 2); | 1056 | |
1057 | static int stv090x_activate_modcod_single(struct stv090x_state *state) | ||
1058 | { | ||
1059 | |||
1060 | if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0) | ||
1061 | goto err; | ||
1062 | if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0) | ||
1063 | goto err; | ||
1064 | if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0) | ||
1065 | goto err; | ||
1066 | if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0) | ||
1067 | goto err; | ||
1068 | if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0) | ||
1069 | goto err; | ||
1070 | if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0) | ||
1071 | goto err; | ||
1072 | if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0) | ||
1073 | goto err; | ||
1074 | if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0) | ||
1075 | goto err; | ||
1076 | if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0) | ||
1077 | goto err; | ||
1078 | if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0) | ||
1079 | goto err; | ||
1080 | if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0) | ||
1081 | goto err; | ||
1082 | if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0) | ||
1083 | goto err; | ||
1084 | if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0) | ||
1085 | goto err; | ||
1086 | if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0) | ||
1087 | goto err; | ||
1088 | if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0) | ||
1089 | goto err; | ||
1090 | if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0) | ||
1091 | goto err; | ||
998 | 1092 | ||
999 | switch (matype) { | ||
1000 | default: | ||
1001 | case 0: | ||
1002 | f_mod = 14; | ||
1003 | break; | ||
1004 | case 1: | ||
1005 | f_mod = 13; | ||
1006 | break; | ||
1007 | case 2: | ||
1008 | f_mod = 11; | ||
1009 | break; | ||
1010 | case 3: | ||
1011 | f_mod = 7; | ||
1012 | break; | ||
1013 | } | ||
1014 | if (matype <= 1) { | ||
1015 | if (modcod % 2) { | ||
1016 | if (stv090x_write_reg(state, index, 0xf0 | f_mod) < 0) | ||
1017 | goto err; | ||
1018 | } else { | ||
1019 | if (stv090x_write_reg(state, index, (f_mod << 4) | 0x0f) < 0) | ||
1020 | goto err; | ||
1021 | } | ||
1022 | } | ||
1023 | } else if (state->dev_ver >= 0x12) { | ||
1024 | if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0) | ||
1025 | goto err; | ||
1026 | if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0) | ||
1027 | goto err; | ||
1028 | if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0) | ||
1029 | goto err; | ||
1030 | if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0) | ||
1031 | goto err; | ||
1032 | if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0) | ||
1033 | goto err; | ||
1034 | if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0) | ||
1035 | goto err; | ||
1036 | if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0) | ||
1037 | goto err; | ||
1038 | if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0) | ||
1039 | goto err; | ||
1040 | if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0) | ||
1041 | goto err; | ||
1042 | if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0) | ||
1043 | goto err; | ||
1044 | if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0) | ||
1045 | goto err; | ||
1046 | if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0) | ||
1047 | goto err; | ||
1048 | if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0) | ||
1049 | goto err; | ||
1050 | if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0) | ||
1051 | goto err; | ||
1052 | if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0) | ||
1053 | goto err; | ||
1054 | if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0) | ||
1055 | goto err; | ||
1056 | } | ||
1057 | return 0; | 1093 | return 0; |
1094 | |||
1058 | err: | 1095 | err: |
1059 | dprintk(FE_ERROR, 1, "I/O error"); | 1096 | dprintk(FE_ERROR, 1, "I/O error"); |
1060 | return -1; | 1097 | return -1; |
@@ -1094,6 +1131,40 @@ err: | |||
1094 | return -1; | 1131 | return -1; |
1095 | } | 1132 | } |
1096 | 1133 | ||
1134 | static int stv090x_dvbs_track_crl(struct stv090x_state *state) | ||
1135 | { | ||
1136 | if (state->dev_ver >= 0x30) { | ||
1137 | /* Set ACLC BCLC optimised value vs SR */ | ||
1138 | if (state->srate >= 15000000) { | ||
1139 | if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0) | ||
1140 | goto err; | ||
1141 | if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0) | ||
1142 | goto err; | ||
1143 | } else if ((state->srate >= 7000000) && (15000000 > state->srate)) { | ||
1144 | if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0) | ||
1145 | goto err; | ||
1146 | if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0) | ||
1147 | goto err; | ||
1148 | } else if (state->srate < 7000000) { | ||
1149 | if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0) | ||
1150 | goto err; | ||
1151 | if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0) | ||
1152 | goto err; | ||
1153 | } | ||
1154 | |||
1155 | } else { | ||
1156 | /* Cut 2.0 */ | ||
1157 | if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) | ||
1158 | goto err; | ||
1159 | if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0) | ||
1160 | goto err; | ||
1161 | } | ||
1162 | return 0; | ||
1163 | err: | ||
1164 | dprintk(FE_ERROR, 1, "I/O error"); | ||
1165 | return -1; | ||
1166 | } | ||
1167 | |||
1097 | static int stv090x_delivery_search(struct stv090x_state *state) | 1168 | static int stv090x_delivery_search(struct stv090x_state *state) |
1098 | { | 1169 | { |
1099 | u32 reg; | 1170 | u32 reg; |
@@ -1107,19 +1178,22 @@ static int stv090x_delivery_search(struct stv090x_state *state) | |||
1107 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) | 1178 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) |
1108 | goto err; | 1179 | goto err; |
1109 | 1180 | ||
1110 | /* Activate Viterbi decoder in legacy search, do not use FRESVIT1, might impact VITERBI2 */ | 1181 | /* Activate Viterbi decoder in legacy search, |
1182 | * do not use FRESVIT1, might impact VITERBI2 | ||
1183 | */ | ||
1111 | if (stv090x_vitclk_ctl(state, 0) < 0) | 1184 | if (stv090x_vitclk_ctl(state, 0) < 0) |
1112 | goto err; | 1185 | goto err; |
1113 | 1186 | ||
1114 | if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) | 1187 | if (stv090x_dvbs_track_crl(state) < 0) |
1115 | goto err; | ||
1116 | if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0) | ||
1117 | goto err; | 1188 | goto err; |
1189 | |||
1118 | if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */ | 1190 | if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */ |
1119 | goto err; | 1191 | goto err; |
1120 | 1192 | ||
1121 | stv090x_set_vit_thacq(state); | 1193 | if (stv090x_set_vit_thacq(state) < 0) |
1122 | stv090x_set_viterbi(state); | 1194 | goto err; |
1195 | if (stv090x_set_viterbi(state) < 0) | ||
1196 | goto err; | ||
1123 | break; | 1197 | break; |
1124 | 1198 | ||
1125 | case STV090x_SEARCH_DVBS2: | 1199 | case STV090x_SEARCH_DVBS2: |
@@ -1140,24 +1214,36 @@ static int stv090x_delivery_search(struct stv090x_state *state) | |||
1140 | goto err; | 1214 | goto err; |
1141 | if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0) | 1215 | if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0) |
1142 | goto err; | 1216 | goto err; |
1143 | if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0) | 1217 | |
1144 | goto err; | 1218 | if (state->dev_ver <= 0x20) { |
1219 | /* enable S2 carrier loop */ | ||
1220 | if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0) | ||
1221 | goto err; | ||
1222 | } else { | ||
1223 | /* > Cut 3: Stop carrier 3 */ | ||
1224 | if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0) | ||
1225 | goto err; | ||
1226 | } | ||
1145 | 1227 | ||
1146 | if (state->demod_mode != STV090x_SINGLE) { | 1228 | if (state->demod_mode != STV090x_SINGLE) { |
1147 | if (state->dev_ver <= 0x11) /* 900 in dual TS mode */ | 1229 | /* Cut 2: enable link during search */ |
1148 | stv090x_stop_modcod(state); | 1230 | if (stv090x_activate_modcod(state) < 0) |
1149 | else | 1231 | goto err; |
1150 | stv090x_activate_modcod(state); | 1232 | } else { |
1233 | /* Single demodulator | ||
1234 | * Authorize SHORT and LONG frames, | ||
1235 | * QPSK, 8PSK, 16APSK and 32APSK | ||
1236 | */ | ||
1237 | if (stv090x_activate_modcod_single(state) < 0) | ||
1238 | goto err; | ||
1151 | } | 1239 | } |
1240 | |||
1152 | break; | 1241 | break; |
1153 | 1242 | ||
1154 | case STV090x_SEARCH_AUTO: | 1243 | case STV090x_SEARCH_AUTO: |
1155 | default: | 1244 | default: |
1245 | /* enable DVB-S2 and DVB-S2 in Auto MODE */ | ||
1156 | reg = STV090x_READ_DEMOD(state, DMDCFGMD); | 1246 | reg = STV090x_READ_DEMOD(state, DMDCFGMD); |
1157 | STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0); | ||
1158 | STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0); | ||
1159 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) | ||
1160 | goto err; | ||
1161 | STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1); | 1247 | STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1); |
1162 | STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1); | 1248 | STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1); |
1163 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) | 1249 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) |
@@ -1166,21 +1252,46 @@ static int stv090x_delivery_search(struct stv090x_state *state) | |||
1166 | if (stv090x_vitclk_ctl(state, 0) < 0) | 1252 | if (stv090x_vitclk_ctl(state, 0) < 0) |
1167 | goto err; | 1253 | goto err; |
1168 | 1254 | ||
1169 | if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) | 1255 | if (stv090x_dvbs_track_crl(state) < 0) |
1170 | goto err; | ||
1171 | if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0) | ||
1172 | goto err; | ||
1173 | if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0) | ||
1174 | goto err; | 1256 | goto err; |
1175 | 1257 | ||
1258 | if (state->dev_ver <= 0x20) { | ||
1259 | /* enable S2 carrier loop */ | ||
1260 | if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0) | ||
1261 | goto err; | ||
1262 | } else { | ||
1263 | /* > Cut 3: Stop carrier 3 */ | ||
1264 | if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0) | ||
1265 | goto err; | ||
1266 | } | ||
1267 | |||
1176 | if (state->demod_mode != STV090x_SINGLE) { | 1268 | if (state->demod_mode != STV090x_SINGLE) { |
1177 | if (state->dev_ver <= 0x11) /* 900 in dual TS mode */ | 1269 | /* Cut 2: enable link during search */ |
1178 | stv090x_stop_modcod(state); | 1270 | if (stv090x_activate_modcod(state) < 0) |
1179 | else | 1271 | goto err; |
1180 | stv090x_activate_modcod(state); | 1272 | } else { |
1273 | /* Single demodulator | ||
1274 | * Authorize SHORT and LONG frames, | ||
1275 | * QPSK, 8PSK, 16APSK and 32APSK | ||
1276 | */ | ||
1277 | if (stv090x_activate_modcod_single(state) < 0) | ||
1278 | goto err; | ||
1181 | } | 1279 | } |
1182 | stv090x_set_vit_thacq(state); | 1280 | |
1183 | stv090x_set_viterbi(state); | 1281 | if (state->srate >= 2000000) { |
1282 | /* Srate >= 2MSPS, Viterbi threshold to acquire */ | ||
1283 | if (stv090x_set_vit_thacq(state) < 0) | ||
1284 | goto err; | ||
1285 | } else { | ||
1286 | /* Srate < 2MSPS, Reset Viterbi thresholdto track | ||
1287 | * and then re-acquire | ||
1288 | */ | ||
1289 | if (stv090x_set_vit_thtracq(state) < 0) | ||
1290 | goto err; | ||
1291 | } | ||
1292 | |||
1293 | if (stv090x_set_viterbi(state) < 0) | ||
1294 | goto err; | ||
1184 | break; | 1295 | break; |
1185 | } | 1296 | } |
1186 | return 0; | 1297 | return 0; |
@@ -1191,45 +1302,87 @@ err: | |||
1191 | 1302 | ||
1192 | static int stv090x_start_search(struct stv090x_state *state) | 1303 | static int stv090x_start_search(struct stv090x_state *state) |
1193 | { | 1304 | { |
1194 | u32 reg; | 1305 | u32 reg, freq_abs; |
1306 | s16 freq; | ||
1195 | 1307 | ||
1308 | /* Reset demodulator */ | ||
1196 | reg = STV090x_READ_DEMOD(state, DMDISTATE); | 1309 | reg = STV090x_READ_DEMOD(state, DMDISTATE); |
1197 | STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); | 1310 | STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); |
1198 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0) | 1311 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0) |
1199 | goto err; | 1312 | goto err; |
1200 | 1313 | ||
1201 | if (state->dev_ver == 0x10) { | 1314 | if (state->dev_ver <= 0x20) { |
1202 | if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0xaa) < 0) | 1315 | if (state->srate <= 5000000) { |
1203 | goto err; | 1316 | if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0) |
1204 | } | 1317 | goto err; |
1205 | if (state->dev_ver < 0x20) { | 1318 | if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0) |
1206 | if (STV090x_WRITE_DEMOD(state, CARHDR, 0x55) < 0) | 1319 | goto err; |
1207 | goto err; | 1320 | if (STV090x_WRITE_DEMOD(state, CFRUP1, 0xff) < 0) |
1208 | } | 1321 | goto err; |
1209 | if (state->srate <= 5000000) { | 1322 | if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0) |
1210 | if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0) | 1323 | goto err; |
1211 | goto err; | 1324 | if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0) |
1212 | if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0) | 1325 | goto err; |
1213 | goto err; | 1326 | |
1214 | if (STV090x_WRITE_DEMOD(state, CFRUP1, 0xff) < 0) | 1327 | /*enlarge the timing bandwith for Low SR*/ |
1215 | goto err; | 1328 | if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) |
1216 | if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0) | 1329 | goto err; |
1330 | } else { | ||
1331 | /* If the symbol rate is >5 Msps | ||
1332 | Set The carrier search up and low to auto mode */ | ||
1333 | if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0) | ||
1334 | goto err; | ||
1335 | /*reduce the timing bandwith for high SR*/ | ||
1336 | if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0) | ||
1337 | goto err; | ||
1338 | } | ||
1339 | } else { | ||
1340 | /* >= Cut 3 */ | ||
1341 | if (state->srate <= 5000000) { | ||
1342 | /* enlarge the timing bandwith for Low SR */ | ||
1343 | STV090x_WRITE_DEMOD(state, RTCS2, 0x68); | ||
1344 | } else { | ||
1345 | /* reduce timing bandwith for high SR */ | ||
1346 | STV090x_WRITE_DEMOD(state, RTCS2, 0x44); | ||
1347 | } | ||
1348 | |||
1349 | /* Set CFR min and max to manual mode */ | ||
1350 | STV090x_WRITE_DEMOD(state, CARCFG, 0x46); | ||
1351 | |||
1352 | if (state->algo == STV090x_WARM_SEARCH) { | ||
1353 | /* WARM Start | ||
1354 | * CFR min = -1MHz, | ||
1355 | * CFR max = +1MHz | ||
1356 | */ | ||
1357 | freq_abs = 1000 << 16; | ||
1358 | freq_abs /= (state->mclk / 1000); | ||
1359 | freq = (s16) freq_abs; | ||
1360 | } else { | ||
1361 | /* COLD Start | ||
1362 | * CFR min =- (SearchRange / 2 + 600KHz) | ||
1363 | * CFR max = +(SearchRange / 2 + 600KHz) | ||
1364 | * (600KHz for the tuner step size) | ||
1365 | */ | ||
1366 | freq_abs = (state->search_range / 2000) + 600; | ||
1367 | freq_abs = freq_abs << 16; | ||
1368 | freq_abs /= (state->mclk / 1000); | ||
1369 | freq = (s16) freq_abs; | ||
1370 | } | ||
1371 | |||
1372 | if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0) | ||
1217 | goto err; | 1373 | goto err; |
1218 | if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0) | 1374 | if (STV090x_WRITE_DEMOD(state, CFRUP1, LSB(freq)) < 0) |
1219 | goto err; | 1375 | goto err; |
1220 | 1376 | ||
1221 | /*enlarge the timing bandwith for Low SR*/ | 1377 | freq *= -1; |
1222 | if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) | 1378 | |
1223 | goto err; | 1379 | if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0) |
1224 | } else { | ||
1225 | /* If the symbol rate is >5 Msps | ||
1226 | Set The carrier search up and low to auto mode */ | ||
1227 | if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0) | ||
1228 | goto err; | 1380 | goto err; |
1229 | /*reduce the timing bandwith for high SR*/ | 1381 | if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0) |
1230 | if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0) | ||
1231 | goto err; | 1382 | goto err; |
1383 | |||
1232 | } | 1384 | } |
1385 | |||
1233 | if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0) | 1386 | if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0) |
1234 | goto err; | 1387 | goto err; |
1235 | if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0) | 1388 | if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0) |
@@ -1269,7 +1422,22 @@ static int stv090x_start_search(struct stv090x_state *state) | |||
1269 | if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0) | 1422 | if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0) |
1270 | goto err; | 1423 | goto err; |
1271 | 1424 | ||
1272 | if (state->dev_ver >= 0x20) { /*Frequency offset detector setting*/ | 1425 | if (state->dev_ver >= 0x20) { |
1426 | /*Frequency offset detector setting*/ | ||
1427 | if (state->srate < 2000000) { | ||
1428 | if (state->dev_ver <= 0x20) { | ||
1429 | /* Cut 2 */ | ||
1430 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0) | ||
1431 | goto err; | ||
1432 | } else { | ||
1433 | /* Cut 2 */ | ||
1434 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0) | ||
1435 | goto err; | ||
1436 | } | ||
1437 | if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0) | ||
1438 | goto err; | ||
1439 | } | ||
1440 | |||
1273 | if (state->srate < 10000000) { | 1441 | if (state->srate < 10000000) { |
1274 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0) | 1442 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0) |
1275 | goto err; | 1443 | goto err; |
@@ -1288,14 +1456,18 @@ static int stv090x_start_search(struct stv090x_state *state) | |||
1288 | } | 1456 | } |
1289 | 1457 | ||
1290 | switch (state->algo) { | 1458 | switch (state->algo) { |
1291 | case STV090x_WARM_SEARCH:/*The symbol rate and the exact carrier Frequency are known */ | 1459 | case STV090x_WARM_SEARCH: |
1460 | /* The symbol rate and the exact | ||
1461 | * carrier Frequency are known | ||
1462 | */ | ||
1292 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) | 1463 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) |
1293 | goto err; | 1464 | goto err; |
1294 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) | 1465 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) |
1295 | goto err; | 1466 | goto err; |
1296 | break; | 1467 | break; |
1297 | 1468 | ||
1298 | case STV090x_COLD_SEARCH:/*The symbol rate is known*/ | 1469 | case STV090x_COLD_SEARCH: |
1470 | /* The symbol rate is known */ | ||
1299 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) | 1471 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) |
1300 | goto err; | 1472 | goto err; |
1301 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) | 1473 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) |
@@ -1334,7 +1506,8 @@ static int stv090x_get_agc2_min_level(struct stv090x_state *state) | |||
1334 | goto err; | 1506 | goto err; |
1335 | if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */ | 1507 | if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */ |
1336 | goto err; | 1508 | goto err; |
1337 | stv090x_set_srate(state, 1000000); | 1509 | if (stv090x_set_srate(state, 1000000) < 0) |
1510 | goto err; | ||
1338 | 1511 | ||
1339 | steps = -1 + state->search_range / 1000000; | 1512 | steps = -1 + state->search_range / 1000000; |
1340 | steps /= 2; | 1513 | steps /= 2; |
@@ -1441,15 +1614,16 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state) | |||
1441 | if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0) | 1614 | if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0) |
1442 | goto err; | 1615 | goto err; |
1443 | 1616 | ||
1444 | if (state->dev_ver >= 0x20) { | 1617 | if (state->dev_ver >= 0x30) { |
1445 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0) | 1618 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0) |
1446 | goto err; | 1619 | goto err; |
1447 | if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0) | 1620 | if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0) |
1448 | goto err; | 1621 | goto err; |
1449 | } else { | 1622 | |
1450 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0) | 1623 | } else if (state->dev_ver >= 0x20) { |
1624 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0) | ||
1451 | goto err; | 1625 | goto err; |
1452 | if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x73) < 0) | 1626 | if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0) |
1453 | goto err; | 1627 | goto err; |
1454 | } | 1628 | } |
1455 | 1629 | ||
@@ -1503,27 +1677,39 @@ static u32 stv090x_srate_srch_coarse(struct stv090x_state *state) | |||
1503 | freq -= cur_step * car_step; | 1677 | freq -= cur_step * car_step; |
1504 | 1678 | ||
1505 | /* Setup tuner */ | 1679 | /* Setup tuner */ |
1506 | stv090x_i2c_gate_ctrl(fe, 1); | 1680 | if (stv090x_i2c_gate_ctrl(fe, 1) < 0) |
1681 | goto err; | ||
1507 | 1682 | ||
1508 | if (state->config->tuner_set_frequency) | 1683 | if (state->config->tuner_set_frequency) { |
1509 | state->config->tuner_set_frequency(fe, state->frequency); | 1684 | if (state->config->tuner_set_frequency(fe, state->frequency) < 0) |
1685 | goto err; | ||
1686 | } | ||
1510 | 1687 | ||
1511 | if (state->config->tuner_set_bandwidth) | 1688 | if (state->config->tuner_set_bandwidth) { |
1512 | state->config->tuner_set_bandwidth(fe, state->tuner_bw); | 1689 | if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0) |
1690 | goto err; | ||
1691 | } | ||
1692 | |||
1693 | if (stv090x_i2c_gate_ctrl(fe, 0) < 0) | ||
1694 | goto err; | ||
1513 | 1695 | ||
1514 | stv090x_i2c_gate_ctrl(fe, 0); | ||
1515 | msleep(50); | 1696 | msleep(50); |
1516 | stv090x_i2c_gate_ctrl(fe, 1); | ||
1517 | 1697 | ||
1518 | if (state->config->tuner_get_status) | 1698 | if (stv090x_i2c_gate_ctrl(fe, 1) < 0) |
1519 | state->config->tuner_get_status(fe, ®); | 1699 | goto err; |
1700 | |||
1701 | if (state->config->tuner_get_status) { | ||
1702 | if (state->config->tuner_get_status(fe, ®) < 0) | ||
1703 | goto err; | ||
1704 | } | ||
1520 | 1705 | ||
1521 | if (reg) | 1706 | if (reg) |
1522 | dprintk(FE_DEBUG, 1, "Tuner phase locked"); | 1707 | dprintk(FE_DEBUG, 1, "Tuner phase locked"); |
1523 | else | 1708 | else |
1524 | dprintk(FE_DEBUG, 1, "Tuner unlocked"); | 1709 | dprintk(FE_DEBUG, 1, "Tuner unlocked"); |
1525 | 1710 | ||
1526 | stv090x_i2c_gate_ctrl(fe, 0); | 1711 | if (stv090x_i2c_gate_ctrl(fe, 0) < 0) |
1712 | goto err; | ||
1527 | 1713 | ||
1528 | } | 1714 | } |
1529 | } | 1715 | } |
@@ -1565,11 +1751,11 @@ static u32 stv090x_srate_srch_fine(struct stv090x_state *state) | |||
1565 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) | 1751 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) |
1566 | goto err; | 1752 | goto err; |
1567 | 1753 | ||
1568 | if (state->dev_ver >= 0x20) { | 1754 | if (state->dev_ver >= 0x30) { |
1569 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0) | 1755 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0) |
1570 | goto err; | 1756 | goto err; |
1571 | } else { | 1757 | } else if (state->dev_ver >= 0x20) { |
1572 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0) | 1758 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0) |
1573 | goto err; | 1759 | goto err; |
1574 | } | 1760 | } |
1575 | 1761 | ||
@@ -1674,32 +1860,27 @@ static int stv090x_blind_search(struct stv090x_state *state) | |||
1674 | u8 k_ref, k_max, k_min; | 1860 | u8 k_ref, k_max, k_min; |
1675 | int coarse_fail, lock; | 1861 | int coarse_fail, lock; |
1676 | 1862 | ||
1677 | if (state->dev_ver < 0x20) { | 1863 | k_max = 120; |
1678 | k_max = 233; | 1864 | k_min = 30; |
1679 | k_min = 143; | ||
1680 | } else { | ||
1681 | k_max = 120; | ||
1682 | k_min = 30; | ||
1683 | } | ||
1684 | 1865 | ||
1685 | agc2 = stv090x_get_agc2_min_level(state); | 1866 | agc2 = stv090x_get_agc2_min_level(state); |
1686 | 1867 | ||
1687 | if (agc2 > STV090x_SEARCH_AGC2_TH) { | 1868 | if (agc2 > STV090x_SEARCH_AGC2_TH(state->dev_ver)) { |
1688 | lock = 0; | 1869 | lock = 0; |
1689 | } else { | 1870 | } else { |
1690 | if (state->dev_ver == 0x10) { | 1871 | |
1691 | if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0xaa) < 0) | 1872 | if (state->dev_ver <= 0x20) { |
1873 | if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0) | ||
1692 | goto err; | 1874 | goto err; |
1693 | } | 1875 | } else { |
1694 | if (state->dev_ver < 0x20) { | 1876 | /* > Cut 3 */ |
1695 | if (STV090x_WRITE_DEMOD(state, CARHDR, 0x55) < 0) | 1877 | if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0) |
1696 | goto err; | 1878 | goto err; |
1697 | } | 1879 | } |
1698 | 1880 | ||
1699 | if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0) | ||
1700 | goto err; | ||
1701 | if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0) | 1881 | if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0) |
1702 | goto err; | 1882 | goto err; |
1883 | |||
1703 | if (state->dev_ver >= 0x20) { | 1884 | if (state->dev_ver >= 0x20) { |
1704 | if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0) | 1885 | if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0) |
1705 | goto err; | 1886 | goto err; |
@@ -1756,7 +1937,7 @@ err: | |||
1756 | static int stv090x_chk_tmg(struct stv090x_state *state) | 1937 | static int stv090x_chk_tmg(struct stv090x_state *state) |
1757 | { | 1938 | { |
1758 | u32 reg; | 1939 | u32 reg; |
1759 | s32 tmg_cpt, i; | 1940 | s32 tmg_cpt = 0, i; |
1760 | u8 freq, tmg_thh, tmg_thl; | 1941 | u8 freq, tmg_thh, tmg_thl; |
1761 | int tmg_lock; | 1942 | int tmg_lock; |
1762 | 1943 | ||
@@ -1877,29 +2058,39 @@ static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd) | |||
1877 | freq -= cur_step * car_step; | 2058 | freq -= cur_step * car_step; |
1878 | 2059 | ||
1879 | /* Setup tuner */ | 2060 | /* Setup tuner */ |
1880 | stv090x_i2c_gate_ctrl(fe, 1); | 2061 | if (stv090x_i2c_gate_ctrl(fe, 1) < 0) |
2062 | goto err; | ||
1881 | 2063 | ||
1882 | if (state->config->tuner_set_frequency) | 2064 | if (state->config->tuner_set_frequency) { |
1883 | state->config->tuner_set_frequency(fe, state->frequency); | 2065 | if (state->config->tuner_set_frequency(fe, state->frequency) < 0) |
2066 | goto err; | ||
2067 | } | ||
1884 | 2068 | ||
1885 | if (state->config->tuner_set_bandwidth) | 2069 | if (state->config->tuner_set_bandwidth) { |
1886 | state->config->tuner_set_bandwidth(fe, state->tuner_bw); | 2070 | if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0) |
2071 | goto err; | ||
2072 | } | ||
1887 | 2073 | ||
1888 | stv090x_i2c_gate_ctrl(fe, 0); | 2074 | if (stv090x_i2c_gate_ctrl(fe, 0) < 0) |
2075 | goto err; | ||
1889 | 2076 | ||
1890 | msleep(50); | 2077 | msleep(50); |
1891 | 2078 | ||
1892 | stv090x_i2c_gate_ctrl(fe, 1); | 2079 | if (stv090x_i2c_gate_ctrl(fe, 1) < 0) |
2080 | goto err; | ||
1893 | 2081 | ||
1894 | if (state->config->tuner_get_status) | 2082 | if (state->config->tuner_get_status) { |
1895 | state->config->tuner_get_status(fe, ®); | 2083 | if (state->config->tuner_get_status(fe, ®) < 0) |
2084 | goto err; | ||
2085 | } | ||
1896 | 2086 | ||
1897 | if (reg) | 2087 | if (reg) |
1898 | dprintk(FE_DEBUG, 1, "Tuner phase locked"); | 2088 | dprintk(FE_DEBUG, 1, "Tuner phase locked"); |
1899 | else | 2089 | else |
1900 | dprintk(FE_DEBUG, 1, "Tuner unlocked"); | 2090 | dprintk(FE_DEBUG, 1, "Tuner unlocked"); |
1901 | 2091 | ||
1902 | stv090x_i2c_gate_ctrl(fe, 0); | 2092 | if (stv090x_i2c_gate_ctrl(fe, 0) < 0) |
2093 | goto err; | ||
1903 | 2094 | ||
1904 | STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c); | 2095 | STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c); |
1905 | if (state->delsys == STV090x_DVBS2) { | 2096 | if (state->delsys == STV090x_DVBS2) { |
@@ -2031,7 +2222,7 @@ static int stv090x_chk_signal(struct stv090x_state *state) | |||
2031 | static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max) | 2222 | static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max) |
2032 | { | 2223 | { |
2033 | int no_signal, lock = 0; | 2224 | int no_signal, lock = 0; |
2034 | s32 cpt_step, offst_freq, car_max; | 2225 | s32 cpt_step = 0, offst_freq, car_max; |
2035 | u32 reg; | 2226 | u32 reg; |
2036 | 2227 | ||
2037 | car_max = state->search_range / 1000; | 2228 | car_max = state->search_range / 1000; |
@@ -2046,7 +2237,6 @@ static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 tim | |||
2046 | else | 2237 | else |
2047 | offst_freq = -car_max + inc; | 2238 | offst_freq = -car_max + inc; |
2048 | 2239 | ||
2049 | cpt_step = 0; | ||
2050 | do { | 2240 | do { |
2051 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0) | 2241 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0) |
2052 | goto err; | 2242 | goto err; |
@@ -2062,16 +2252,6 @@ static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 tim | |||
2062 | if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0) | 2252 | if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0) |
2063 | goto err; | 2253 | goto err; |
2064 | 2254 | ||
2065 | if (state->dev_ver == 0x12) { | ||
2066 | reg = STV090x_READ_DEMOD(state, TSCFGH); | ||
2067 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x1); | ||
2068 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | ||
2069 | goto err; | ||
2070 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x0); | ||
2071 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | ||
2072 | goto err; | ||
2073 | } | ||
2074 | |||
2075 | if (zigzag) { | 2255 | if (zigzag) { |
2076 | if (offst_freq >= 0) | 2256 | if (offst_freq >= 0) |
2077 | offst_freq = -offst_freq - 2 * inc; | 2257 | offst_freq = -offst_freq - 2 * inc; |
@@ -2111,7 +2291,8 @@ static int stv090x_sw_algo(struct stv090x_state *state) | |||
2111 | s32 dvbs2_fly_wheel; | 2291 | s32 dvbs2_fly_wheel; |
2112 | s32 inc, timeout_step, trials, steps_max; | 2292 | s32 inc, timeout_step, trials, steps_max; |
2113 | 2293 | ||
2114 | stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max); /* get params */ | 2294 | /* get params */ |
2295 | stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max); | ||
2115 | 2296 | ||
2116 | switch (state->search_mode) { | 2297 | switch (state->search_mode) { |
2117 | case STV090x_SEARCH_DVBS1: | 2298 | case STV090x_SEARCH_DVBS1: |
@@ -2120,10 +2301,8 @@ static int stv090x_sw_algo(struct stv090x_state *state) | |||
2120 | if (state->dev_ver >= 0x20) { | 2301 | if (state->dev_ver >= 0x20) { |
2121 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0) | 2302 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0) |
2122 | goto err; | 2303 | goto err; |
2123 | } else { | ||
2124 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0) | ||
2125 | goto err; | ||
2126 | } | 2304 | } |
2305 | |||
2127 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0) | 2306 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0) |
2128 | goto err; | 2307 | goto err; |
2129 | zigzag = 0; | 2308 | zigzag = 0; |
@@ -2133,10 +2312,8 @@ static int stv090x_sw_algo(struct stv090x_state *state) | |||
2133 | if (state->dev_ver >= 0x20) { | 2312 | if (state->dev_ver >= 0x20) { |
2134 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0) | 2313 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0) |
2135 | goto err; | 2314 | goto err; |
2136 | } else { | ||
2137 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0) | ||
2138 | goto err; | ||
2139 | } | 2315 | } |
2316 | |||
2140 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0) | 2317 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0) |
2141 | goto err; | 2318 | goto err; |
2142 | zigzag = 1; | 2319 | zigzag = 1; |
@@ -2150,12 +2327,8 @@ static int stv090x_sw_algo(struct stv090x_state *state) | |||
2150 | goto err; | 2327 | goto err; |
2151 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0) | 2328 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0) |
2152 | goto err; | 2329 | goto err; |
2153 | } else { | ||
2154 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0) | ||
2155 | goto err; | ||
2156 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0) | ||
2157 | goto err; | ||
2158 | } | 2330 | } |
2331 | |||
2159 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0) | 2332 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0) |
2160 | goto err; | 2333 | goto err; |
2161 | zigzag = 0; | 2334 | zigzag = 0; |
@@ -2176,11 +2349,6 @@ static int stv090x_sw_algo(struct stv090x_state *state) | |||
2176 | goto err; | 2349 | goto err; |
2177 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0) | 2350 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0) |
2178 | goto err; | 2351 | goto err; |
2179 | } else { | ||
2180 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0) | ||
2181 | goto err; | ||
2182 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x88) < 0) | ||
2183 | goto err; | ||
2184 | } | 2352 | } |
2185 | 2353 | ||
2186 | reg = STV090x_READ_DEMOD(state, DMDSTATE); | 2354 | reg = STV090x_READ_DEMOD(state, DMDSTATE); |
@@ -2201,10 +2369,8 @@ static int stv090x_sw_algo(struct stv090x_state *state) | |||
2201 | if (state->dev_ver >= 0x20) { | 2369 | if (state->dev_ver >= 0x20) { |
2202 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0) | 2370 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0) |
2203 | goto err; | 2371 | goto err; |
2204 | } else { | ||
2205 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0) | ||
2206 | goto err; | ||
2207 | } | 2372 | } |
2373 | |||
2208 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0) | 2374 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0) |
2209 | goto err; | 2375 | goto err; |
2210 | } | 2376 | } |
@@ -2325,16 +2491,23 @@ static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *st | |||
2325 | } | 2491 | } |
2326 | state->delsys = stv090x_get_std(state); | 2492 | state->delsys = stv090x_get_std(state); |
2327 | 2493 | ||
2328 | stv090x_i2c_gate_ctrl(fe, 1); | 2494 | if (stv090x_i2c_gate_ctrl(fe, 1) < 0) |
2495 | goto err; | ||
2329 | 2496 | ||
2330 | if (state->config->tuner_get_frequency) | 2497 | if (state->config->tuner_get_frequency) { |
2331 | state->config->tuner_get_frequency(fe, &state->frequency); | 2498 | if (state->config->tuner_get_frequency(fe, &state->frequency) < 0) |
2499 | goto err; | ||
2500 | } | ||
2332 | 2501 | ||
2333 | stv090x_i2c_gate_ctrl(fe, 0); | 2502 | if (stv090x_i2c_gate_ctrl(fe, 0) < 0) |
2503 | goto err; | ||
2334 | 2504 | ||
2335 | offst_freq = stv090x_get_car_freq(state, state->mclk) / 1000; | 2505 | offst_freq = stv090x_get_car_freq(state, state->mclk) / 1000; |
2336 | state->frequency += offst_freq; | 2506 | state->frequency += offst_freq; |
2337 | stv090x_get_viterbi(state); | 2507 | |
2508 | if (stv090x_get_viterbi(state) < 0) | ||
2509 | goto err; | ||
2510 | |||
2338 | reg = STV090x_READ_DEMOD(state, DMDMODCOD); | 2511 | reg = STV090x_READ_DEMOD(state, DMDMODCOD); |
2339 | state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD); | 2512 | state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD); |
2340 | state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01; | 2513 | state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01; |
@@ -2346,12 +2519,16 @@ static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *st | |||
2346 | 2519 | ||
2347 | if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) { | 2520 | if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) { |
2348 | 2521 | ||
2349 | stv090x_i2c_gate_ctrl(fe, 1); | 2522 | if (stv090x_i2c_gate_ctrl(fe, 1) < 0) |
2523 | goto err; | ||
2350 | 2524 | ||
2351 | if (state->config->tuner_get_frequency) | 2525 | if (state->config->tuner_get_frequency) { |
2352 | state->config->tuner_get_frequency(fe, &state->frequency); | 2526 | if (state->config->tuner_get_frequency(fe, &state->frequency) < 0) |
2527 | goto err; | ||
2528 | } | ||
2353 | 2529 | ||
2354 | stv090x_i2c_gate_ctrl(fe, 0); | 2530 | if (stv090x_i2c_gate_ctrl(fe, 0) < 0) |
2531 | goto err; | ||
2355 | 2532 | ||
2356 | if (abs(offst_freq) <= ((state->search_range / 2000) + 500)) | 2533 | if (abs(offst_freq) <= ((state->search_range / 2000) + 500)) |
2357 | return STV090x_RANGEOK; | 2534 | return STV090x_RANGEOK; |
@@ -2367,6 +2544,9 @@ static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *st | |||
2367 | } | 2544 | } |
2368 | 2545 | ||
2369 | return STV090x_OUTOFRANGE; | 2546 | return STV090x_OUTOFRANGE; |
2547 | err: | ||
2548 | dprintk(FE_ERROR, 1, "I/O error"); | ||
2549 | return -1; | ||
2370 | } | 2550 | } |
2371 | 2551 | ||
2372 | static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate) | 2552 | static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate) |
@@ -2391,19 +2571,22 @@ static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_mod | |||
2391 | { | 2571 | { |
2392 | u8 aclc = 0x29; | 2572 | u8 aclc = 0x29; |
2393 | s32 i; | 2573 | s32 i; |
2394 | struct stv090x_long_frame_crloop *car_loop; | 2574 | struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low; |
2395 | |||
2396 | if (state->dev_ver <= 0x12) | ||
2397 | car_loop = stv090x_s2_crl; | ||
2398 | else if (state->dev_ver == 0x20) | ||
2399 | car_loop = stv090x_s2_crl_cut20; | ||
2400 | else | ||
2401 | car_loop = stv090x_s2_crl; | ||
2402 | 2575 | ||
2576 | if (state->dev_ver == 0x20) { | ||
2577 | car_loop = stv090x_s2_crl_cut20; | ||
2578 | car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut20; | ||
2579 | car_loop_apsk_low = stv090x_s2_apsk_crl_cut20; | ||
2580 | } else { | ||
2581 | /* >= Cut 3 */ | ||
2582 | car_loop = stv090x_s2_crl_cut30; | ||
2583 | car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut30; | ||
2584 | car_loop_apsk_low = stv090x_s2_apsk_crl_cut30; | ||
2585 | } | ||
2403 | 2586 | ||
2404 | if (modcod < STV090x_QPSK_12) { | 2587 | if (modcod < STV090x_QPSK_12) { |
2405 | i = 0; | 2588 | i = 0; |
2406 | while ((i < 3) && (modcod != stv090x_s2_lowqpsk_crl_cut20[i].modcod)) | 2589 | while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod)) |
2407 | i++; | 2590 | i++; |
2408 | 2591 | ||
2409 | if (i >= 3) | 2592 | if (i >= 3) |
@@ -2416,7 +2599,7 @@ static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_mod | |||
2416 | 2599 | ||
2417 | if (i >= 14) { | 2600 | if (i >= 14) { |
2418 | i = 0; | 2601 | i = 0; |
2419 | while ((i < 11) && (modcod != stv090x_s2_lowqpsk_crl_cut20[i].modcod)) | 2602 | while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod)) |
2420 | i++; | 2603 | i++; |
2421 | 2604 | ||
2422 | if (i >= 11) | 2605 | if (i >= 11) |
@@ -2427,26 +2610,26 @@ static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_mod | |||
2427 | if (modcod <= STV090x_QPSK_25) { | 2610 | if (modcod <= STV090x_QPSK_25) { |
2428 | if (pilots) { | 2611 | if (pilots) { |
2429 | if (state->srate <= 3000000) | 2612 | if (state->srate <= 3000000) |
2430 | aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_2; | 2613 | aclc = car_loop_qpsk_low[i].crl_pilots_on_2; |
2431 | else if (state->srate <= 7000000) | 2614 | else if (state->srate <= 7000000) |
2432 | aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_5; | 2615 | aclc = car_loop_qpsk_low[i].crl_pilots_on_5; |
2433 | else if (state->srate <= 15000000) | 2616 | else if (state->srate <= 15000000) |
2434 | aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_10; | 2617 | aclc = car_loop_qpsk_low[i].crl_pilots_on_10; |
2435 | else if (state->srate <= 25000000) | 2618 | else if (state->srate <= 25000000) |
2436 | aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_20; | 2619 | aclc = car_loop_qpsk_low[i].crl_pilots_on_20; |
2437 | else | 2620 | else |
2438 | aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_30; | 2621 | aclc = car_loop_qpsk_low[i].crl_pilots_on_30; |
2439 | } else { | 2622 | } else { |
2440 | if (state->srate <= 3000000) | 2623 | if (state->srate <= 3000000) |
2441 | aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_2; | 2624 | aclc = car_loop_qpsk_low[i].crl_pilots_off_2; |
2442 | else if (state->srate <= 7000000) | 2625 | else if (state->srate <= 7000000) |
2443 | aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_5; | 2626 | aclc = car_loop_qpsk_low[i].crl_pilots_off_5; |
2444 | else if (state->srate <= 15000000) | 2627 | else if (state->srate <= 15000000) |
2445 | aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_10; | 2628 | aclc = car_loop_qpsk_low[i].crl_pilots_off_10; |
2446 | else if (state->srate <= 25000000) | 2629 | else if (state->srate <= 25000000) |
2447 | aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_20; | 2630 | aclc = car_loop_qpsk_low[i].crl_pilots_off_20; |
2448 | else | 2631 | else |
2449 | aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_30; | 2632 | aclc = car_loop_qpsk_low[i].crl_pilots_off_30; |
2450 | } | 2633 | } |
2451 | 2634 | ||
2452 | } else if (modcod <= STV090x_8PSK_910) { | 2635 | } else if (modcod <= STV090x_8PSK_910) { |
@@ -2475,15 +2658,15 @@ static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_mod | |||
2475 | } | 2658 | } |
2476 | } else { /* 16APSK and 32APSK */ | 2659 | } else { /* 16APSK and 32APSK */ |
2477 | if (state->srate <= 3000000) | 2660 | if (state->srate <= 3000000) |
2478 | aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_2; | 2661 | aclc = car_loop_apsk_low[i].crl_pilots_on_2; |
2479 | else if (state->srate <= 7000000) | 2662 | else if (state->srate <= 7000000) |
2480 | aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_5; | 2663 | aclc = car_loop_apsk_low[i].crl_pilots_on_5; |
2481 | else if (state->srate <= 15000000) | 2664 | else if (state->srate <= 15000000) |
2482 | aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_10; | 2665 | aclc = car_loop_apsk_low[i].crl_pilots_on_10; |
2483 | else if (state->srate <= 25000000) | 2666 | else if (state->srate <= 25000000) |
2484 | aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_20; | 2667 | aclc = car_loop_apsk_low[i].crl_pilots_on_20; |
2485 | else | 2668 | else |
2486 | aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_30; | 2669 | aclc = car_loop_apsk_low[i].crl_pilots_on_30; |
2487 | } | 2670 | } |
2488 | 2671 | ||
2489 | return aclc; | 2672 | return aclc; |
@@ -2491,6 +2674,7 @@ static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_mod | |||
2491 | 2674 | ||
2492 | static u8 stv090x_optimize_carloop_short(struct stv090x_state *state) | 2675 | static u8 stv090x_optimize_carloop_short(struct stv090x_state *state) |
2493 | { | 2676 | { |
2677 | struct stv090x_short_frame_crloop *short_crl; | ||
2494 | s32 index = 0; | 2678 | s32 index = 0; |
2495 | u8 aclc = 0x0b; | 2679 | u8 aclc = 0x0b; |
2496 | 2680 | ||
@@ -2510,34 +2694,21 @@ static u8 stv090x_optimize_carloop_short(struct stv090x_state *state) | |||
2510 | break; | 2694 | break; |
2511 | } | 2695 | } |
2512 | 2696 | ||
2513 | switch (state->dev_ver) { | 2697 | if (state->dev_ver >= 0x30) |
2514 | case 0x20: | 2698 | short_crl = stv090x_s2_short_crl_cut20; |
2515 | if (state->srate <= 3000000) | 2699 | else if (state->dev_ver >= 0x20) |
2516 | aclc = stv090x_s2_short_crl[index].crl_cut20_2; | 2700 | short_crl = stv090x_s2_short_crl_cut30; |
2517 | else if (state->srate <= 7000000) | 2701 | |
2518 | aclc = stv090x_s2_short_crl[index].crl_cut20_5; | 2702 | if (state->srate <= 3000000) |
2519 | else if (state->srate <= 15000000) | 2703 | aclc = short_crl[index].crl_2; |
2520 | aclc = stv090x_s2_short_crl[index].crl_cut20_10; | 2704 | else if (state->srate <= 7000000) |
2521 | else if (state->srate <= 25000000) | 2705 | aclc = short_crl[index].crl_5; |
2522 | aclc = stv090x_s2_short_crl[index].crl_cut20_20; | 2706 | else if (state->srate <= 15000000) |
2523 | else | 2707 | aclc = short_crl[index].crl_10; |
2524 | aclc = stv090x_s2_short_crl[index].crl_cut20_30; | 2708 | else if (state->srate <= 25000000) |
2525 | break; | 2709 | aclc = short_crl[index].crl_20; |
2526 | 2710 | else | |
2527 | case 0x12: | 2711 | aclc = short_crl[index].crl_30; |
2528 | default: | ||
2529 | if (state->srate <= 3000000) | ||
2530 | aclc = stv090x_s2_short_crl[index].crl_cut12_2; | ||
2531 | else if (state->srate <= 7000000) | ||
2532 | aclc = stv090x_s2_short_crl[index].crl_cut12_5; | ||
2533 | else if (state->srate <= 15000000) | ||
2534 | aclc = stv090x_s2_short_crl[index].crl_cut12_10; | ||
2535 | else if (state->srate <= 25000000) | ||
2536 | aclc = stv090x_s2_short_crl[index].crl_cut12_20; | ||
2537 | else | ||
2538 | aclc = stv090x_s2_short_crl[index].crl_cut12_30; | ||
2539 | break; | ||
2540 | } | ||
2541 | 2712 | ||
2542 | return aclc; | 2713 | return aclc; |
2543 | } | 2714 | } |
@@ -2567,9 +2738,27 @@ static int stv090x_optimize_track(struct stv090x_state *state) | |||
2567 | } | 2738 | } |
2568 | reg = STV090x_READ_DEMOD(state, DEMOD); | 2739 | reg = STV090x_READ_DEMOD(state, DEMOD); |
2569 | STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff); | 2740 | STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff); |
2570 | STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x01); | 2741 | STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01); |
2571 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) | 2742 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) |
2572 | goto err; | 2743 | goto err; |
2744 | |||
2745 | if (state->dev_ver >= 0x30) { | ||
2746 | if (stv090x_get_viterbi(state) < 0) | ||
2747 | goto err; | ||
2748 | |||
2749 | if (state->fec == STV090x_PR12) { | ||
2750 | if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0) | ||
2751 | goto err; | ||
2752 | if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0) | ||
2753 | goto err; | ||
2754 | } else { | ||
2755 | if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0) | ||
2756 | goto err; | ||
2757 | if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0) | ||
2758 | goto err; | ||
2759 | } | ||
2760 | } | ||
2761 | |||
2573 | if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0) | 2762 | if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0) |
2574 | goto err; | 2763 | goto err; |
2575 | break; | 2764 | break; |
@@ -2633,10 +2822,7 @@ static int stv090x_optimize_track(struct stv090x_state *state) | |||
2633 | goto err; | 2822 | goto err; |
2634 | } | 2823 | } |
2635 | } | 2824 | } |
2636 | if (state->dev_ver <= 0x11) { | 2825 | |
2637 | if (state->demod_mode != STV090x_SINGLE) | ||
2638 | stv090x_activate_modcod(state); /* link to LDPC after demod LOCK */ | ||
2639 | } | ||
2640 | STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */ | 2826 | STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */ |
2641 | break; | 2827 | break; |
2642 | 2828 | ||
@@ -2662,11 +2848,11 @@ static int stv090x_optimize_track(struct stv090x_state *state) | |||
2662 | STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); | 2848 | STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); |
2663 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) | 2849 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) |
2664 | goto err; | 2850 | goto err; |
2665 | if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0) | 2851 | if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) |
2852 | goto err; | ||
2853 | |||
2854 | if (stv090x_set_srate(state, srate) < 0) | ||
2666 | goto err; | 2855 | goto err; |
2667 | stv090x_set_srate(state, srate); | ||
2668 | stv090x_set_max_srate(state, state->mclk, srate); | ||
2669 | stv090x_set_min_srate(state, state->mclk, srate); | ||
2670 | blind_tune = 1; | 2856 | blind_tune = 1; |
2671 | } | 2857 | } |
2672 | 2858 | ||
@@ -2682,20 +2868,18 @@ static int stv090x_optimize_track(struct stv090x_state *state) | |||
2682 | } | 2868 | } |
2683 | } | 2869 | } |
2684 | 2870 | ||
2685 | if (state->dev_ver < 0x20) { | ||
2686 | if (STV090x_WRITE_DEMOD(state, CARHDR, 0x08) < 0) | ||
2687 | goto err; | ||
2688 | } | ||
2689 | if (state->dev_ver == 0x10) { | ||
2690 | if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0x0a) < 0) | ||
2691 | goto err; | ||
2692 | } | ||
2693 | |||
2694 | if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0) | 2871 | if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0) |
2695 | goto err; | 2872 | goto err; |
2696 | 2873 | ||
2697 | if ((state->dev_ver >= 0x20) || (blind_tune == 1) || (state->srate < 10000000)) { | 2874 | /* AUTO tracking MODE */ |
2875 | if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0) | ||
2876 | goto err; | ||
2877 | /* AUTO tracking MODE */ | ||
2878 | if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0) | ||
2879 | goto err; | ||
2698 | 2880 | ||
2881 | if ((state->dev_ver >= 0x20) || (blind_tune == 1) || (state->srate < 10000000)) { | ||
2882 | /* update initial carrier freq with the found freq offset */ | ||
2699 | if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0) | 2883 | if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0) |
2700 | goto err; | 2884 | goto err; |
2701 | if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0) | 2885 | if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0) |
@@ -2706,12 +2890,16 @@ static int stv090x_optimize_track(struct stv090x_state *state) | |||
2706 | 2890 | ||
2707 | if (state->algo != STV090x_WARM_SEARCH) { | 2891 | if (state->algo != STV090x_WARM_SEARCH) { |
2708 | 2892 | ||
2709 | stv090x_i2c_gate_ctrl(fe, 1); | 2893 | if (stv090x_i2c_gate_ctrl(fe, 1) < 0) |
2894 | goto err; | ||
2710 | 2895 | ||
2711 | if (state->config->tuner_set_bandwidth) | 2896 | if (state->config->tuner_set_bandwidth) { |
2712 | state->config->tuner_set_bandwidth(fe, state->tuner_bw); | 2897 | if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0) |
2898 | goto err; | ||
2899 | } | ||
2713 | 2900 | ||
2714 | stv090x_i2c_gate_ctrl(fe, 0); | 2901 | if (stv090x_i2c_gate_ctrl(fe, 0) < 0) |
2902 | goto err; | ||
2715 | 2903 | ||
2716 | } | 2904 | } |
2717 | } | 2905 | } |
@@ -2754,6 +2942,7 @@ static int stv090x_optimize_track(struct stv090x_state *state) | |||
2754 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0) | 2942 | if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0) |
2755 | goto err; | 2943 | goto err; |
2756 | } | 2944 | } |
2945 | |||
2757 | if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS)) | 2946 | if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS)) |
2758 | stv090x_set_vit_thtracq(state); | 2947 | stv090x_set_vit_thtracq(state); |
2759 | 2948 | ||
@@ -2823,22 +3012,18 @@ static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 ti | |||
2823 | 3012 | ||
2824 | static int stv090x_set_s2rolloff(struct stv090x_state *state) | 3013 | static int stv090x_set_s2rolloff(struct stv090x_state *state) |
2825 | { | 3014 | { |
2826 | s32 rolloff; | ||
2827 | u32 reg; | 3015 | u32 reg; |
2828 | 3016 | ||
2829 | if (state->dev_ver == 0x10) { | 3017 | if (state->dev_ver <= 0x20) { |
3018 | /* rolloff to auto mode if DVBS2 */ | ||
2830 | reg = STV090x_READ_DEMOD(state, DEMOD); | 3019 | reg = STV090x_READ_DEMOD(state, DEMOD); |
2831 | STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x01); | 3020 | STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00); |
2832 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) | ||
2833 | goto err; | ||
2834 | rolloff = STV090x_READ_DEMOD(state, MATSTR1) & 0x03; | ||
2835 | reg = STV090x_READ_DEMOD(state, DEMOD); | ||
2836 | STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, reg); | ||
2837 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) | 3021 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) |
2838 | goto err; | 3022 | goto err; |
2839 | } else { | 3023 | } else { |
3024 | /* DVB-S2 rolloff to auto mode if DVBS2 */ | ||
2840 | reg = STV090x_READ_DEMOD(state, DEMOD); | 3025 | reg = STV090x_READ_DEMOD(state, DEMOD); |
2841 | STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x00); | 3026 | STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00); |
2842 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) | 3027 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) |
2843 | goto err; | 3028 | goto err; |
2844 | } | 3029 | } |
@@ -2848,84 +3033,13 @@ err: | |||
2848 | return -1; | 3033 | return -1; |
2849 | } | 3034 | } |
2850 | 3035 | ||
2851 | static enum stv090x_signal_state stv090x_acq_fixs1(struct stv090x_state *state) | ||
2852 | { | ||
2853 | s32 srate, f_1, f_2; | ||
2854 | enum stv090x_signal_state signal_state = STV090x_NODATA; | ||
2855 | u32 reg; | ||
2856 | int lock; | ||
2857 | |||
2858 | reg = STV090x_READ_DEMOD(state, DMDSTATE); | ||
2859 | if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) { /* DVB-S mode */ | ||
2860 | srate = stv090x_get_srate(state, state->mclk); | ||
2861 | srate += stv090x_get_tmgoffst(state, state->srate); | ||
2862 | |||
2863 | if (state->algo == STV090x_BLIND_SEARCH) | ||
2864 | stv090x_set_srate(state, state->srate); | ||
2865 | |||
2866 | stv090x_get_lock_tmg(state); | ||
2867 | |||
2868 | f_1 = STV090x_READ_DEMOD(state, CFR2); | ||
2869 | f_2 = STV090x_READ_DEMOD(state, CFR1); | ||
2870 | |||
2871 | reg = STV090x_READ_DEMOD(state, DMDCFGMD); | ||
2872 | STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0); | ||
2873 | if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0) | ||
2874 | goto err; | ||
2875 | |||
2876 | reg = STV090x_READ_DEMOD(state, DEMOD); | ||
2877 | STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, STV090x_IQ_SWAP); | ||
2878 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) | ||
2879 | goto err; | ||
2880 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0) /* stop demod */ | ||
2881 | goto err; | ||
2882 | if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0) | ||
2883 | goto err; | ||
2884 | if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_2) < 0) | ||
2885 | goto err; | ||
2886 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* warm start trigger */ | ||
2887 | goto err; | ||
2888 | |||
2889 | if (stv090x_get_lock(state, state->DemodTimeout, state->FecTimeout)) { | ||
2890 | lock = 1; | ||
2891 | stv090x_get_sig_params(state); | ||
2892 | stv090x_optimize_track(state); | ||
2893 | } else { | ||
2894 | reg = STV090x_READ_DEMOD(state, DEMOD); | ||
2895 | STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, STV090x_IQ_NORMAL); | ||
2896 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) | ||
2897 | goto err; | ||
2898 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0) | ||
2899 | goto err; | ||
2900 | if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0) | ||
2901 | goto err; | ||
2902 | if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_2) < 0) | ||
2903 | goto err; | ||
2904 | if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* warm start trigger */ | ||
2905 | goto err; | ||
2906 | if (stv090x_get_lock(state, state->DemodTimeout, state->FecTimeout)) { | ||
2907 | lock = 1; | ||
2908 | signal_state = stv090x_get_sig_params(state); | ||
2909 | stv090x_optimize_track(state); | ||
2910 | } | ||
2911 | } | ||
2912 | } else { | ||
2913 | lock = 0; | ||
2914 | } | ||
2915 | |||
2916 | return signal_state; | ||
2917 | |||
2918 | err: | ||
2919 | dprintk(FE_ERROR, 1, "I/O error"); | ||
2920 | return -1; | ||
2921 | } | ||
2922 | 3036 | ||
2923 | static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state) | 3037 | static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state) |
2924 | { | 3038 | { |
2925 | struct dvb_frontend *fe = &state->frontend; | 3039 | struct dvb_frontend *fe = &state->frontend; |
2926 | enum stv090x_signal_state signal_state = STV090x_NOCARRIER; | 3040 | enum stv090x_signal_state signal_state = STV090x_NOCARRIER; |
2927 | u32 reg; | 3041 | u32 reg; |
2928 | s32 timeout_dmd = 500, timeout_fec = 50; | 3042 | s32 timeout_dmd = 500, timeout_fec = 50, agc1_power, power_iq = 0, i; |
2929 | int lock = 0, low_sr = 0, no_signal = 0; | 3043 | int lock = 0, low_sr = 0, no_signal = 0; |
2930 | 3044 | ||
2931 | reg = STV090x_READ_DEMOD(state, TSCFGH); | 3045 | reg = STV090x_READ_DEMOD(state, TSCFGH); |
@@ -2939,18 +3053,18 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state) | |||
2939 | if (state->dev_ver >= 0x20) { | 3053 | if (state->dev_ver >= 0x20) { |
2940 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0) /* cut 2.0 */ | 3054 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0) /* cut 2.0 */ |
2941 | goto err; | 3055 | goto err; |
2942 | } else { | ||
2943 | if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x88) < 0) /* cut 1.x */ | ||
2944 | goto err; | ||
2945 | } | 3056 | } |
2946 | 3057 | ||
2947 | stv090x_get_lock_tmg(state); | 3058 | stv090x_get_lock_tmg(state); |
2948 | 3059 | ||
2949 | if (state->algo == STV090x_BLIND_SEARCH) { | 3060 | if (state->algo == STV090x_BLIND_SEARCH) { |
2950 | state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */ | 3061 | state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */ |
2951 | if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x00) < 0) /* wider srate scan */ | 3062 | if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */ |
3063 | goto err; | ||
3064 | if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0) | ||
3065 | goto err; | ||
3066 | if (stv090x_set_srate(state, 1000000) < 0) /* inital srate = 1Msps */ | ||
2952 | goto err; | 3067 | goto err; |
2953 | stv090x_set_srate(state, 1000000); /* inital srate = 1Msps */ | ||
2954 | } else { | 3068 | } else { |
2955 | /* known srate */ | 3069 | /* known srate */ |
2956 | if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0) | 3070 | if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0) |
@@ -2958,14 +3072,19 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state) | |||
2958 | if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0) | 3072 | if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0) |
2959 | goto err; | 3073 | goto err; |
2960 | 3074 | ||
2961 | if (state->srate >= 10000000) { | 3075 | if (state->srate < 2000000) { |
2962 | if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0) /* High SR */ | 3076 | /* SR < 2MSPS */ |
3077 | if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0) | ||
2963 | goto err; | 3078 | goto err; |
2964 | } else { | 3079 | } else { |
2965 | if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0) /* Low SR */ | 3080 | /* SR >= 2Msps */ |
3081 | if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0) | ||
2966 | goto err; | 3082 | goto err; |
2967 | } | 3083 | } |
2968 | 3084 | ||
3085 | if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0) | ||
3086 | goto err; | ||
3087 | |||
2969 | if (state->dev_ver >= 0x20) { | 3088 | if (state->dev_ver >= 0x20) { |
2970 | if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0) | 3089 | if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0) |
2971 | goto err; | 3090 | goto err; |
@@ -2973,16 +3092,21 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state) | |||
2973 | state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10; | 3092 | state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10; |
2974 | else if (state->algo == STV090x_WARM_SEARCH) | 3093 | else if (state->algo == STV090x_WARM_SEARCH) |
2975 | state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000; | 3094 | state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000; |
2976 | } else { | ||
2977 | if (STV090x_WRITE_DEMOD(state, KREFTMG, 0xc1) < 0) | ||
2978 | goto err; | ||
2979 | state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10; | ||
2980 | } | 3095 | } |
2981 | if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0) /* narrow srate scan */ | 3096 | |
3097 | /* if cold start or warm (Symbolrate is known) | ||
3098 | * use a Narrow symbol rate scan range | ||
3099 | */ | ||
3100 | if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */ | ||
3101 | goto err; | ||
3102 | |||
3103 | if (stv090x_set_srate(state, state->srate) < 0) | ||
3104 | goto err; | ||
3105 | |||
3106 | if (stv090x_set_max_srate(state, state->mclk, state->srate) < 0) | ||
3107 | goto err; | ||
3108 | if (stv090x_set_min_srate(state, state->mclk, state->srate) < 0) | ||
2982 | goto err; | 3109 | goto err; |
2983 | stv090x_set_srate(state, state->srate); | ||
2984 | stv090x_set_max_srate(state, state->mclk, state->srate); | ||
2985 | stv090x_set_min_srate(state, state->mclk, state->srate); | ||
2986 | 3110 | ||
2987 | if (state->srate >= 10000000) | 3111 | if (state->srate >= 10000000) |
2988 | low_sr = 0; | 3112 | low_sr = 0; |
@@ -2991,60 +3115,97 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state) | |||
2991 | } | 3115 | } |
2992 | 3116 | ||
2993 | /* Setup tuner */ | 3117 | /* Setup tuner */ |
2994 | stv090x_i2c_gate_ctrl(fe, 1); | 3118 | if (stv090x_i2c_gate_ctrl(fe, 1) < 0) |
3119 | goto err; | ||
2995 | 3120 | ||
2996 | if (state->config->tuner_set_bbgain) | 3121 | if (state->config->tuner_set_bbgain) { |
2997 | state->config->tuner_set_bbgain(fe, 10); /* 10dB */ | 3122 | if (state->config->tuner_set_bbgain(fe, 10) < 0) /* 10dB */ |
3123 | goto err; | ||
3124 | } | ||
2998 | 3125 | ||
2999 | if (state->config->tuner_set_frequency) | 3126 | if (state->config->tuner_set_frequency) { |
3000 | state->config->tuner_set_frequency(fe, state->frequency); | 3127 | if (state->config->tuner_set_frequency(fe, state->frequency) < 0) |
3128 | goto err; | ||
3129 | } | ||
3001 | 3130 | ||
3002 | if (state->config->tuner_set_bandwidth) | 3131 | if (state->config->tuner_set_bandwidth) { |
3003 | state->config->tuner_set_bandwidth(fe, state->tuner_bw); | 3132 | if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0) |
3133 | goto err; | ||
3134 | } | ||
3004 | 3135 | ||
3005 | stv090x_i2c_gate_ctrl(fe, 0); | 3136 | if (stv090x_i2c_gate_ctrl(fe, 0) < 0) |
3137 | goto err; | ||
3006 | 3138 | ||
3007 | msleep(50); | 3139 | msleep(50); |
3008 | 3140 | ||
3009 | stv090x_i2c_gate_ctrl(fe, 1); | 3141 | if (stv090x_i2c_gate_ctrl(fe, 1) < 0) |
3142 | goto err; | ||
3010 | 3143 | ||
3011 | if (state->config->tuner_get_status) | 3144 | if (state->config->tuner_get_status) { |
3012 | state->config->tuner_get_status(fe, ®); | 3145 | if (state->config->tuner_get_status(fe, ®) < 0) |
3146 | goto err; | ||
3147 | } | ||
3013 | 3148 | ||
3014 | if (reg) | 3149 | if (reg) |
3015 | dprintk(FE_DEBUG, 1, "Tuner phase locked"); | 3150 | dprintk(FE_DEBUG, 1, "Tuner phase locked"); |
3016 | else | 3151 | else |
3017 | dprintk(FE_DEBUG, 1, "Tuner unlocked"); | 3152 | dprintk(FE_DEBUG, 1, "Tuner unlocked"); |
3018 | 3153 | ||
3019 | stv090x_i2c_gate_ctrl(fe, 0); | 3154 | if (stv090x_i2c_gate_ctrl(fe, 0) < 0) |
3020 | |||
3021 | reg = STV090x_READ_DEMOD(state, DEMOD); | ||
3022 | STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion); | ||
3023 | STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 1); | ||
3024 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) | ||
3025 | goto err; | 3155 | goto err; |
3026 | stv090x_delivery_search(state); | ||
3027 | if (state->algo != STV090x_BLIND_SEARCH) | ||
3028 | stv090x_start_search(state); | ||
3029 | 3156 | ||
3030 | if (state->dev_ver == 0x12) { | 3157 | msleep(10); |
3031 | reg = STV090x_READ_DEMOD(state, TSCFGH); | 3158 | agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1), |
3032 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */ | 3159 | STV090x_READ_DEMOD(state, AGCIQIN0)); |
3033 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | 3160 | |
3034 | goto err; | 3161 | if (agc1_power == 0) { |
3035 | msleep(3); | 3162 | /* If AGC1 integrator value is 0 |
3036 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */ | 3163 | * then read POWERI, POWERQ |
3037 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | 3164 | */ |
3165 | for (i = 0; i < 5; i++) { | ||
3166 | power_iq += (STV090x_READ_DEMOD(state, POWERI) + | ||
3167 | STV090x_READ_DEMOD(state, POWERQ)) >> 1; | ||
3168 | } | ||
3169 | power_iq /= 5; | ||
3170 | } | ||
3171 | |||
3172 | if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) { | ||
3173 | dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq); | ||
3174 | lock = 0; | ||
3175 | |||
3176 | } else { | ||
3177 | reg = STV090x_READ_DEMOD(state, DEMOD); | ||
3178 | STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion); | ||
3179 | |||
3180 | if (state->dev_ver <= 0x20) { | ||
3181 | /* rolloff to auto mode if DVBS2 */ | ||
3182 | STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1); | ||
3183 | } else { | ||
3184 | /* DVB-S2 rolloff to auto mode if DVBS2 */ | ||
3185 | STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1); | ||
3186 | } | ||
3187 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) | ||
3038 | goto err; | 3188 | goto err; |
3039 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */ | 3189 | |
3040 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | 3190 | if (stv090x_delivery_search(state) < 0) |
3041 | goto err; | 3191 | goto err; |
3192 | |||
3193 | if (state->algo != STV090x_BLIND_SEARCH) { | ||
3194 | if (stv090x_start_search(state) < 0) | ||
3195 | goto err; | ||
3196 | } | ||
3042 | } | 3197 | } |
3043 | 3198 | ||
3199 | /* need to check for AGC1 state */ | ||
3200 | |||
3201 | |||
3202 | |||
3044 | if (state->algo == STV090x_BLIND_SEARCH) | 3203 | if (state->algo == STV090x_BLIND_SEARCH) |
3045 | lock = stv090x_blind_search(state); | 3204 | lock = stv090x_blind_search(state); |
3205 | |||
3046 | else if (state->algo == STV090x_COLD_SEARCH) | 3206 | else if (state->algo == STV090x_COLD_SEARCH) |
3047 | lock = stv090x_get_coldlock(state, timeout_dmd); | 3207 | lock = stv090x_get_coldlock(state, timeout_dmd); |
3208 | |||
3048 | else if (state->algo == STV090x_WARM_SEARCH) | 3209 | else if (state->algo == STV090x_WARM_SEARCH) |
3049 | lock = stv090x_get_dmdlock(state, timeout_dmd); | 3210 | lock = stv090x_get_dmdlock(state, timeout_dmd); |
3050 | 3211 | ||
@@ -3060,32 +3221,18 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state) | |||
3060 | 3221 | ||
3061 | if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */ | 3222 | if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */ |
3062 | stv090x_optimize_track(state); | 3223 | stv090x_optimize_track(state); |
3063 | if (state->dev_ver <= 0x11) { /*workaround for dual DVBS1 cut 1.1 and 1.0 only*/ | 3224 | |
3064 | if (stv090x_get_std(state) == STV090x_DVBS1) { | 3225 | if (state->dev_ver >= 0x20) { |
3065 | msleep(20); | 3226 | /* >= Cut 2.0 :release TS reset after |
3066 | reg = STV090x_READ_DEMOD(state, TSCFGH); | 3227 | * demod lock and optimized Tracking |
3067 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */ | 3228 | */ |
3068 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | ||
3069 | goto err; | ||
3070 | } else { | ||
3071 | reg = STV090x_READ_DEMOD(state, TSCFGH); | ||
3072 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */ | ||
3073 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | ||
3074 | goto err; | ||
3075 | msleep(3); | ||
3076 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */ | ||
3077 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | ||
3078 | goto err; | ||
3079 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */ | ||
3080 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | ||
3081 | goto err; | ||
3082 | } | ||
3083 | } else if (state->dev_ver == 0x20) { /*cut 2.0 :release TS reset after demod lock and TrackingOptimization*/ | ||
3084 | reg = STV090x_READ_DEMOD(state, TSCFGH); | 3229 | reg = STV090x_READ_DEMOD(state, TSCFGH); |
3085 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */ | 3230 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */ |
3086 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | 3231 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) |
3087 | goto err; | 3232 | goto err; |
3233 | |||
3088 | msleep(3); | 3234 | msleep(3); |
3235 | |||
3089 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */ | 3236 | STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */ |
3090 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) | 3237 | if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0) |
3091 | goto err; | 3238 | goto err; |
@@ -3099,18 +3246,27 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state) | |||
3099 | lock = 1; | 3246 | lock = 1; |
3100 | if (state->delsys == STV090x_DVBS2) { | 3247 | if (state->delsys == STV090x_DVBS2) { |
3101 | stv090x_set_s2rolloff(state); | 3248 | stv090x_set_s2rolloff(state); |
3102 | if (STV090x_WRITE_DEMOD(state, PDELCTRL2, 0x40) < 0) | 3249 | |
3250 | reg = STV090x_READ_DEMOD(state, PDELCTRL2); | ||
3251 | STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1); | ||
3252 | if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0) | ||
3103 | goto err; | 3253 | goto err; |
3104 | if (STV090x_WRITE_DEMOD(state, PDELCTRL2, 0x00) < 0) /* RESET counter */ | 3254 | /* Reset DVBS2 packet delinator error counter */ |
3255 | reg = STV090x_READ_DEMOD(state, PDELCTRL2); | ||
3256 | STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0); | ||
3257 | if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0) | ||
3105 | goto err; | 3258 | goto err; |
3259 | |||
3106 | if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */ | 3260 | if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */ |
3107 | goto err; | 3261 | goto err; |
3108 | } else { | 3262 | } else { |
3109 | if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0) | 3263 | if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0) |
3110 | goto err; | 3264 | goto err; |
3111 | } | 3265 | } |
3266 | /* Reset the Total packet counter */ | ||
3112 | if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0) | 3267 | if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0) |
3113 | goto err; | 3268 | goto err; |
3269 | /* Reset the packet Error counter2 */ | ||
3114 | if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0) | 3270 | if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0) |
3115 | goto err; | 3271 | goto err; |
3116 | } else { | 3272 | } else { |
@@ -3119,13 +3275,6 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state) | |||
3119 | no_signal = stv090x_chk_signal(state); | 3275 | no_signal = stv090x_chk_signal(state); |
3120 | } | 3276 | } |
3121 | } | 3277 | } |
3122 | if ((signal_state == STV090x_NODATA) && (!no_signal)) { | ||
3123 | if (state->dev_ver <= 0x11) { | ||
3124 | reg = STV090x_READ_DEMOD(state, DMDSTATE); | ||
3125 | if (((STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD)) == STV090x_DVBS1) && (state->inversion == INVERSION_AUTO)) | ||
3126 | signal_state = stv090x_acq_fixs1(state); | ||
3127 | } | ||
3128 | } | ||
3129 | return signal_state; | 3278 | return signal_state; |
3130 | 3279 | ||
3131 | err: | 3280 | err: |
@@ -3578,17 +3727,18 @@ static void stv090x_release(struct dvb_frontend *fe) | |||
3578 | 3727 | ||
3579 | static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode) | 3728 | static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode) |
3580 | { | 3729 | { |
3581 | u32 reg; | 3730 | u32 reg = 0; |
3582 | 3731 | ||
3583 | switch (ldpc_mode) { | 3732 | switch (ldpc_mode) { |
3584 | case STV090x_DUAL: | 3733 | case STV090x_DUAL: |
3585 | default: | 3734 | default: |
3586 | reg = stv090x_read_reg(state, STV090x_GENCFG); | ||
3587 | if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) { | 3735 | if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) { |
3588 | /* follow LDPC default state */ | 3736 | /* set LDPC to dual mode */ |
3589 | if (stv090x_write_reg(state, STV090x_GENCFG, reg) < 0) | 3737 | if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0) |
3590 | goto err; | 3738 | goto err; |
3739 | |||
3591 | state->demod_mode = STV090x_DUAL; | 3740 | state->demod_mode = STV090x_DUAL; |
3741 | |||
3592 | reg = stv090x_read_reg(state, STV090x_TSTRES0); | 3742 | reg = stv090x_read_reg(state, STV090x_TSTRES0); |
3593 | STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1); | 3743 | STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1); |
3594 | if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) | 3744 | if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) |
@@ -3596,10 +3746,50 @@ static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc | |||
3596 | STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0); | 3746 | STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0); |
3597 | if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) | 3747 | if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) |
3598 | goto err; | 3748 | goto err; |
3749 | |||
3750 | if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0) | ||
3751 | goto err; | ||
3752 | if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0) | ||
3753 | goto err; | ||
3754 | if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0) | ||
3755 | goto err; | ||
3756 | if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0) | ||
3757 | goto err; | ||
3758 | if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0) | ||
3759 | goto err; | ||
3760 | if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0) | ||
3761 | goto err; | ||
3762 | if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0) | ||
3763 | goto err; | ||
3764 | |||
3765 | if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0) | ||
3766 | goto err; | ||
3767 | if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0) | ||
3768 | goto err; | ||
3769 | if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0) | ||
3770 | goto err; | ||
3771 | if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0) | ||
3772 | goto err; | ||
3773 | if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0) | ||
3774 | goto err; | ||
3775 | if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0) | ||
3776 | goto err; | ||
3777 | if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0) | ||
3778 | goto err; | ||
3779 | |||
3780 | if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0) | ||
3781 | goto err; | ||
3782 | if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0) | ||
3783 | goto err; | ||
3599 | } | 3784 | } |
3600 | break; | 3785 | break; |
3601 | 3786 | ||
3602 | case STV090x_SINGLE: | 3787 | case STV090x_SINGLE: |
3788 | if (stv090x_stop_modcod(state) < 0) | ||
3789 | goto err; | ||
3790 | if (stv090x_activate_modcod_single(state) < 0) | ||
3791 | goto err; | ||
3792 | |||
3603 | if (state->demod == STV090x_DEMODULATOR_1) { | 3793 | if (state->demod == STV090x_DEMODULATOR_1) { |
3604 | if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */ | 3794 | if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */ |
3605 | goto err; | 3795 | goto err; |
@@ -3885,7 +4075,8 @@ static int stv090x_init(struct dvb_frontend *fe) | |||
3885 | goto err; | 4075 | goto err; |
3886 | } | 4076 | } |
3887 | 4077 | ||
3888 | stv090x_ldpc_mode(state, state->demod_mode); | 4078 | if (stv090x_ldpc_mode(state, state->demod_mode) < 0) |
4079 | goto err; | ||
3889 | 4080 | ||
3890 | reg = STV090x_READ_DEMOD(state, TNRCFG2); | 4081 | reg = STV090x_READ_DEMOD(state, TNRCFG2); |
3891 | STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion); | 4082 | STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion); |
@@ -3896,16 +4087,24 @@ static int stv090x_init(struct dvb_frontend *fe) | |||
3896 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) | 4087 | if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0) |
3897 | goto err; | 4088 | goto err; |
3898 | 4089 | ||
3899 | stv090x_i2c_gate_ctrl(fe, 1); | 4090 | if (stv090x_i2c_gate_ctrl(fe, 1) < 0) |
4091 | goto err; | ||
3900 | 4092 | ||
3901 | if (config->tuner_set_mode) | 4093 | if (config->tuner_set_mode) { |
3902 | config->tuner_set_mode(fe, TUNER_WAKE); | 4094 | if (config->tuner_set_mode(fe, TUNER_WAKE) < 0) |
3903 | if (config->tuner_init) | 4095 | goto err; |
3904 | config->tuner_init(fe); | 4096 | } |
3905 | 4097 | ||
3906 | stv090x_i2c_gate_ctrl(fe, 0); | 4098 | if (config->tuner_init) { |
4099 | if (config->tuner_init(fe) < 0) | ||
4100 | goto err; | ||
4101 | } | ||
4102 | |||
4103 | if (stv090x_i2c_gate_ctrl(fe, 0) < 0) | ||
4104 | goto err; | ||
3907 | 4105 | ||
3908 | stv090x_set_tspath(state); | 4106 | if (stv090x_set_tspath(state) < 0) |
4107 | goto err; | ||
3909 | 4108 | ||
3910 | return 0; | 4109 | return 0; |
3911 | err: | 4110 | err: |
@@ -3978,6 +4177,16 @@ static int stv090x_setup(struct dvb_frontend *fe) | |||
3978 | if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0) | 4177 | if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0) |
3979 | goto err; | 4178 | goto err; |
3980 | } | 4179 | } |
4180 | |||
4181 | } else if (state->dev_ver < 0x20) { | ||
4182 | dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!", | ||
4183 | state->dev_ver); | ||
4184 | |||
4185 | goto err; | ||
4186 | } else if (state->dev_ver > 0x30) { | ||
4187 | /* we shouldn't bail out from here */ | ||
4188 | dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!", | ||
4189 | state->dev_ver); | ||
3981 | } | 4190 | } |
3982 | 4191 | ||
3983 | if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0) | 4192 | if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0) |
diff --git a/drivers/media/dvb/frontends/stv090x_priv.h b/drivers/media/dvb/frontends/stv090x_priv.h index 9d536226e9f3..5a4a01740d88 100644 --- a/drivers/media/dvb/frontends/stv090x_priv.h +++ b/drivers/media/dvb/frontends/stv090x_priv.h | |||
@@ -77,7 +77,18 @@ | |||
77 | 77 | ||
78 | #define MAKEWORD16(__a, __b) (((__a) << 8) | (__b)) | 78 | #define MAKEWORD16(__a, __b) (((__a) << 8) | (__b)) |
79 | 79 | ||
80 | #define STV090x_SEARCH_AGC2_TH 700 | 80 | #define MSB(__x) ((__x >> 8) & 0xff) |
81 | #define LSB(__x) (__x & 0xff) | ||
82 | |||
83 | |||
84 | #define STV090x_IQPOWER_THRESHOLD 30 | ||
85 | #define STV090x_SEARCH_AGC2_TH_CUT20 700 | ||
86 | #define STV090x_SEARCH_AGC2_TH_CUT30 1200 | ||
87 | |||
88 | #define STV090x_SEARCH_AGC2_TH(__ver) \ | ||
89 | ((__ver <= 0x20) ? \ | ||
90 | STV090x_SEARCH_AGC2_TH_CUT20 : \ | ||
91 | STV090x_SEARCH_AGC2_TH_CUT30) | ||
81 | 92 | ||
82 | enum stv090x_signal_state { | 93 | enum stv090x_signal_state { |
83 | STV090x_NOCARRIER, | 94 | STV090x_NOCARRIER, |
@@ -201,24 +212,8 @@ struct stv090x_long_frame_crloop { | |||
201 | struct stv090x_short_frame_crloop { | 212 | struct stv090x_short_frame_crloop { |
202 | enum stv090x_modulation modulation; | 213 | enum stv090x_modulation modulation; |
203 | 214 | ||
204 | u8 crl_cut12_2; /* Cut 1.2, SR <= 3M */ | 215 | u8 crl_2; /* SR < 3M */ |
205 | u8 crl_cut20_2; /* Cut 2.0, SR < 3M */ | 216 | u8 crl_5; /* 3 < SR <= 7M */ |
206 | u8 crl_cut12_5; /* Cut 1.2, 3 < SR <= 7M */ | ||
207 | u8 crl_cut20_5; /* Cut 2.0, 3 < SR <= 7M */ | ||
208 | u8 crl_cut12_10; /* Cut 1.2, 7 < SR <= 15M */ | ||
209 | u8 crl_cut20_10; /* Cut 2.0, 7 < SR <= 15M */ | ||
210 | u8 crl_cut12_20; /* Cut 1.2, 10 < SR <= 25M */ | ||
211 | u8 crl_cut20_20; /* Cut 2.0, 10 < SR <= 25M */ | ||
212 | u8 crl_cut12_30; /* Cut 1.2, 25 < SR <= 45M */ | ||
213 | u8 crl_cut20_30; /* Cut 2.0, 10 < SR <= 45M */ | ||
214 | }; | ||
215 | |||
216 | |||
217 | struct stv090x_short_frame_vsmod_crloop { | ||
218 | enum stv090x_modulation modulation; | ||
219 | |||
220 | u8 crl_2; /* < 3M */ | ||
221 | u8 crl_5; /* 3 < SR <= 7M */ | ||
222 | u8 crl_10; /* 7 < SR <= 15M */ | 217 | u8 crl_10; /* 7 < SR <= 15M */ |
223 | u8 crl_20; /* 10 < SR <= 25M */ | 218 | u8 crl_20; /* 10 < SR <= 25M */ |
224 | u8 crl_30; /* 10 < SR <= 45M */ | 219 | u8 crl_30; /* 10 < SR <= 45M */ |
diff --git a/drivers/media/dvb/frontends/stv090x_reg.h b/drivers/media/dvb/frontends/stv090x_reg.h index 55737074eafe..57b6abbbd32d 100644 --- a/drivers/media/dvb/frontends/stv090x_reg.h +++ b/drivers/media/dvb/frontends/stv090x_reg.h | |||
@@ -793,10 +793,16 @@ | |||
793 | #define STV090x_Px_DEMOD(__x) (0xF410 - (__x - 1) * 0x200) | 793 | #define STV090x_Px_DEMOD(__x) (0xF410 - (__x - 1) * 0x200) |
794 | #define STV090x_P1_DEMOD STV090x_Px_DEMOD(1) | 794 | #define STV090x_P1_DEMOD STV090x_Px_DEMOD(1) |
795 | #define STV090x_P2_DEMOD STV090x_Px_DEMOD(2) | 795 | #define STV090x_P2_DEMOD STV090x_Px_DEMOD(2) |
796 | #define STV090x_OFFST_Px_MANUAL_S2ROLLOFF_FIELD 7 | ||
797 | #define STV090x_WIDTH_Px_MANUAL_S2ROLLOFF_FIELD 1 | ||
798 | #define STV090x_OFFST_Px_DEMOD_STOP_FIELD 6 | ||
799 | #define STV090x_WIDTH_Px_DEMOD_STOP_FIELD 1 | ||
796 | #define STV090x_OFFST_Px_SPECINV_CONTROL_FIELD 4 | 800 | #define STV090x_OFFST_Px_SPECINV_CONTROL_FIELD 4 |
797 | #define STV090x_WIDTH_Px_SPECINV_CONTROL_FIELD 2 | 801 | #define STV090x_WIDTH_Px_SPECINV_CONTROL_FIELD 2 |
798 | #define STV090x_OFFST_Px_MANUAL_ROLLOFF_FIELD 2 | 802 | #define STV090x_OFFST_Px_FORCE_ENASAMP_FIELD 3 |
799 | #define STV090x_WIDTH_Px_MANUAL_ROLLOFF_FIELD 1 | 803 | #define STV090x_WIDTH_Px_FORCE_ENASAMP_FIELD 1 |
804 | #define STV090x_OFFST_Px_MANUAL_SXROLLOFF_FIELD 2 | ||
805 | #define STV090x_WIDTH_Px_MANUAL_SXROLLOFF_FIELD 1 | ||
800 | #define STV090x_OFFST_Px_ROLLOFF_CONTROL_FIELD 0 | 806 | #define STV090x_OFFST_Px_ROLLOFF_CONTROL_FIELD 0 |
801 | #define STV090x_WIDTH_Px_ROLLOFF_CONTROL_FIELD 2 | 807 | #define STV090x_WIDTH_Px_ROLLOFF_CONTROL_FIELD 2 |
802 | 808 | ||
@@ -1566,6 +1572,42 @@ | |||
1566 | #define STV090x_OFFST_Px_DIS_QP_1_4_FIELD 4 | 1572 | #define STV090x_OFFST_Px_DIS_QP_1_4_FIELD 4 |
1567 | #define STV090x_WIDTH_Px_DIS_QP_1_4_FIELD 4 | 1573 | #define STV090x_WIDTH_Px_DIS_QP_1_4_FIELD 4 |
1568 | 1574 | ||
1575 | #define STV090x_Px_GAUSSR0(__x) (0xf4c0 - (__x - 1) * 0x200) | ||
1576 | #define STV090x_P1_GAUSSR0 STV090x_Px_GAUSSR0(1) | ||
1577 | #define STV090x_P2_GAUSSR0 STV090x_Px_GAUSSR0(2) | ||
1578 | #define STV090x_OFFST_Px_EN_CCIMODE_FIELD 7 | ||
1579 | #define STV090x_WIDTH_Px_EN_CCIMODE_FIELD 1 | ||
1580 | #define STV090x_OFFST_Px_R0_GAUSSIEN_FIELD 0 | ||
1581 | #define STV090x_WIDTH_Px_R0_GAUSSIEN_FIELD 7 | ||
1582 | |||
1583 | #define STV090x_Px_CCIR0(__x) (0xf4c1 - (__x - 1) * 0x200) | ||
1584 | #define STV090x_P1_CCIR0 STV090x_Px_CCIR0(1) | ||
1585 | #define STV090x_P2_CCIR0 STV090x_Px_CCIR0(2) | ||
1586 | #define STV090x_OFFST_Px_CCIDETECT_PLH_FIELD 7 | ||
1587 | #define STV090x_WIDTH_Px_CCIDETECT_PLH_FIELD 1 | ||
1588 | #define STV090x_OFFST_Px_R0_CCI_FIELD 0 | ||
1589 | #define STV090x_WIDTH_Px_R0_CCI_FIELD 7 | ||
1590 | |||
1591 | #define STV090x_Px_CCIQUANT(__x) (0xf4c2 - (__x - 1) * 0x200) | ||
1592 | #define STV090x_P1_CCIQUANT STV090x_Px_CCIQUANT(1) | ||
1593 | #define STV090x_P2_CCIQUANT STV090x_Px_CCIQUANT(2) | ||
1594 | #define STV090x_OFFST_Px_CCI_BETA_FIELD 5 | ||
1595 | #define STV090x_WIDTH_Px_CCI_BETA_FIELD 3 | ||
1596 | #define STV090x_OFFST_Px_CCI_QUANT_FIELD 0 | ||
1597 | #define STV090x_WIDTH_Px_CCI_QUANT_FIELD 5 | ||
1598 | |||
1599 | #define STV090x_Px_CCITHRESH(__x) (0xf4c3 - (__x - 1) * 0x200) | ||
1600 | #define STV090x_P1_CCITHRESH STV090x_Px_CCITHRESH(1) | ||
1601 | #define STV090x_P2_CCITHRESH STV090x_Px_CCITHRESH(2) | ||
1602 | #define STV090x_OFFST_Px_CCI_THRESHOLD_FIELD 0 | ||
1603 | #define STV090x_WIDTH_Px_CCI_THRESHOLD_FIELD 8 | ||
1604 | |||
1605 | #define STV090x_Px_CCIACC(__x) (0xf4c4 - (__x - 1) * 0x200) | ||
1606 | #define STV090x_P1_CCIACC STV090x_Px_CCIACC(1) | ||
1607 | #define STV090x_P2_CCIACC STV090x_Px_CCIACC(1) | ||
1608 | #define STV090x_OFFST_Px_CCI_VALUE_FIELD 0 | ||
1609 | #define STV090x_WIDTH_Px_CCI_VALUE_FIELD 8 | ||
1610 | |||
1569 | #define STV090x_Px_DMDRESCFG(__x) (0xF4C6 - (__x - 1) * 0x200) | 1611 | #define STV090x_Px_DMDRESCFG(__x) (0xF4C6 - (__x - 1) * 0x200) |
1570 | #define STV090x_P1_DMDRESCFG STV090x_Px_DMDRESCFG(1) | 1612 | #define STV090x_P1_DMDRESCFG STV090x_Px_DMDRESCFG(1) |
1571 | #define STV090x_P2_DMDRESCFG STV090x_Px_DMDRESCFG(2) | 1613 | #define STV090x_P2_DMDRESCFG STV090x_Px_DMDRESCFG(2) |
@@ -1847,16 +1889,28 @@ | |||
1847 | #define STV090x_Px_PDELCTRL2(__x) (0xf551 - (__x - 1) * 0x200) | 1889 | #define STV090x_Px_PDELCTRL2(__x) (0xf551 - (__x - 1) * 0x200) |
1848 | #define STV090x_P1_PDELCTRL2 STV090x_Px_PDELCTRL2(1) | 1890 | #define STV090x_P1_PDELCTRL2 STV090x_Px_PDELCTRL2(1) |
1849 | #define STV090x_P2_PDELCTRL2 STV090x_Px_PDELCTRL2(2) | 1891 | #define STV090x_P2_PDELCTRL2 STV090x_Px_PDELCTRL2(2) |
1892 | #define STV090x_OFFST_Px_FORCE_CONTINUOUS 7 | ||
1893 | #define STV090x_WIDTH_Px_FORCE_CONTINUOUS 1 | ||
1894 | #define STV090x_OFFST_Px_RESET_UPKO_COUNT 6 | ||
1895 | #define STV090x_WIDTH_Px_RESET_UPKO_COUNT 1 | ||
1896 | #define STV090x_OFFST_Px_USER_PKTDELIN_NB 5 | ||
1897 | #define STV090x_WIDTH_Px_USER_PKTDELIN_NB 1 | ||
1898 | #define STV090x_OFFST_Px_FORCE_LOCKED 4 | ||
1899 | #define STV090x_WIDTH_Px_FORCE_LOCKED 1 | ||
1900 | #define STV090x_OFFST_Px_DATA_UNBBSCRAM 3 | ||
1901 | #define STV090x_WIDTH_Px_DATA_UNBBSCRAM 1 | ||
1902 | #define STV090x_OFFST_Px_FORCE_LONGPACKET 2 | ||
1903 | #define STV090x_WIDTH_Px_FORCE_LONGPACKET 1 | ||
1850 | #define STV090x_OFFST_Px_FRAME_MODE_FIELD 1 | 1904 | #define STV090x_OFFST_Px_FRAME_MODE_FIELD 1 |
1851 | #define STV090x_WIDTH_Px_FRAME_MODE_FIELD 1 | 1905 | #define STV090x_WIDTH_Px_FRAME_MODE_FIELD 1 |
1852 | 1906 | ||
1853 | #define STV090x_Px_HYSTTHRESH(__x) (0xf554 - (__x - 1) * 0x200) | 1907 | #define STV090x_Px_HYSTTHRESH(__x) (0xf554 - (__x - 1) * 0x200) |
1854 | #define STV090x_P1_HYSTTHRESH STV090x_Px_HYSTTHRESH(1) | 1908 | #define STV090x_P1_HYSTTHRESH STV090x_Px_HYSTTHRESH(1) |
1855 | #define STV090x_P2_HYSTTHRESH STV090x_Px_HYSTTHRESH(2) | 1909 | #define STV090x_P2_HYSTTHRESH STV090x_Px_HYSTTHRESH(2) |
1856 | #define STV090x_OFFST_Px_UNLCK_THRESH_FIELD 4 | 1910 | #define STV090x_OFFST_Px_UNLCK_THRESH_FIELD 4 |
1857 | #define STV090x_WIDTH_Px_UNLCK_THRESH_FIELD 4 | 1911 | #define STV090x_WIDTH_Px_UNLCK_THRESH_FIELD 4 |
1858 | #define STV090x_OFFST_Px_DELIN_LCK_THRESH_FIELD 0 | 1912 | #define STV090x_OFFST_Px_DELIN_LCK_THRESH_FIELD 0 |
1859 | #define STV090x_WIDTH_Px_DELIN_LCK_THRESH_FIELD 4 | 1913 | #define STV090x_WIDTH_Px_DELIN_LCK_THRESH_FIELD 4 |
1860 | 1914 | ||
1861 | #define STV090x_Px_ISIENTRY(__x) (0xf55e - (__x - 1) * 0x200) | 1915 | #define STV090x_Px_ISIENTRY(__x) (0xf55e - (__x - 1) * 0x200) |
1862 | #define STV090x_P1_ISIENTRY STV090x_Px_ISIENTRY(1) | 1916 | #define STV090x_P1_ISIENTRY STV090x_Px_ISIENTRY(1) |