diff options
Diffstat (limited to 'drivers/media/dvb/frontends/drxd_hard.c')
-rw-r--r-- | drivers/media/dvb/frontends/drxd_hard.c | 62 |
1 files changed, 23 insertions, 39 deletions
diff --git a/drivers/media/dvb/frontends/drxd_hard.c b/drivers/media/dvb/frontends/drxd_hard.c index 88e46f4cdbb2..7bf39cda83c5 100644 --- a/drivers/media/dvb/frontends/drxd_hard.c +++ b/drivers/media/dvb/frontends/drxd_hard.c | |||
@@ -120,7 +120,7 @@ enum EIFFilter { | |||
120 | struct drxd_state { | 120 | struct drxd_state { |
121 | struct dvb_frontend frontend; | 121 | struct dvb_frontend frontend; |
122 | struct dvb_frontend_ops ops; | 122 | struct dvb_frontend_ops ops; |
123 | struct dvb_frontend_parameters param; | 123 | struct dtv_frontend_properties props; |
124 | 124 | ||
125 | const struct firmware *fw; | 125 | const struct firmware *fw; |
126 | struct device *dev; | 126 | struct device *dev; |
@@ -914,14 +914,13 @@ static int load_firmware(struct drxd_state *state, const char *fw_name) | |||
914 | return -EIO; | 914 | return -EIO; |
915 | } | 915 | } |
916 | 916 | ||
917 | state->microcode = kmalloc(fw->size, GFP_KERNEL); | 917 | state->microcode = kmemdup(fw->data, fw->size, GFP_KERNEL); |
918 | if (state->microcode == NULL) { | 918 | if (state->microcode == NULL) { |
919 | release_firmware(fw); | 919 | release_firmware(fw); |
920 | printk(KERN_ERR "drxd: firmware load failure: no memory\n"); | 920 | printk(KERN_ERR "drxd: firmware load failure: no memory\n"); |
921 | return -ENOMEM; | 921 | return -ENOMEM; |
922 | } | 922 | } |
923 | 923 | ||
924 | memcpy(state->microcode, fw->data, fw->size); | ||
925 | state->microcode_length = fw->size; | 924 | state->microcode_length = fw->size; |
926 | release_firmware(fw); | 925 | release_firmware(fw); |
927 | return 0; | 926 | return 0; |
@@ -1622,14 +1621,14 @@ static int CorrectSysClockDeviation(struct drxd_state *state) | |||
1622 | break; | 1621 | break; |
1623 | } | 1622 | } |
1624 | 1623 | ||
1625 | switch (state->param.u.ofdm.bandwidth) { | 1624 | switch (state->props.bandwidth_hz) { |
1626 | case BANDWIDTH_8_MHZ: | 1625 | case 8000000: |
1627 | bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ; | 1626 | bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ; |
1628 | break; | 1627 | break; |
1629 | case BANDWIDTH_7_MHZ: | 1628 | case 7000000: |
1630 | bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ; | 1629 | bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ; |
1631 | break; | 1630 | break; |
1632 | case BANDWIDTH_6_MHZ: | 1631 | case 6000000: |
1633 | bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ; | 1632 | bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ; |
1634 | break; | 1633 | break; |
1635 | default: | 1634 | default: |
@@ -1804,7 +1803,7 @@ static int StartDiversity(struct drxd_state *state) | |||
1804 | status = WriteTable(state, state->m_StartDiversityEnd); | 1803 | status = WriteTable(state, state->m_StartDiversityEnd); |
1805 | if (status < 0) | 1804 | if (status < 0) |
1806 | break; | 1805 | break; |
1807 | if (state->param.u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | 1806 | if (state->props.bandwidth_hz == 8000000) { |
1808 | status = WriteTable(state, state->m_DiversityDelay8MHZ); | 1807 | status = WriteTable(state, state->m_DiversityDelay8MHZ); |
1809 | if (status < 0) | 1808 | if (status < 0) |
1810 | break; | 1809 | break; |
@@ -1906,7 +1905,7 @@ static int SetCfgNoiseCalibration(struct drxd_state *state, | |||
1906 | 1905 | ||
1907 | static int DRX_Start(struct drxd_state *state, s32 off) | 1906 | static int DRX_Start(struct drxd_state *state, s32 off) |
1908 | { | 1907 | { |
1909 | struct dvb_ofdm_parameters *p = &state->param.u.ofdm; | 1908 | struct dtv_frontend_properties *p = &state->props; |
1910 | int status; | 1909 | int status; |
1911 | 1910 | ||
1912 | u16 transmissionParams = 0; | 1911 | u16 transmissionParams = 0; |
@@ -1971,7 +1970,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) | |||
1971 | if (status < 0) | 1970 | if (status < 0) |
1972 | break; | 1971 | break; |
1973 | 1972 | ||
1974 | mirrorFreqSpect = (state->param.inversion == INVERSION_ON); | 1973 | mirrorFreqSpect = (state->props.inversion == INVERSION_ON); |
1975 | 1974 | ||
1976 | switch (p->transmission_mode) { | 1975 | switch (p->transmission_mode) { |
1977 | default: /* Not set, detect it automatically */ | 1976 | default: /* Not set, detect it automatically */ |
@@ -2021,7 +2020,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) | |||
2021 | break; | 2020 | break; |
2022 | } | 2021 | } |
2023 | 2022 | ||
2024 | switch (p->hierarchy_information) { | 2023 | switch (p->hierarchy) { |
2025 | case HIERARCHY_1: | 2024 | case HIERARCHY_1: |
2026 | transmissionParams |= SC_RA_RAM_OP_PARAM_HIER_A1; | 2025 | transmissionParams |= SC_RA_RAM_OP_PARAM_HIER_A1; |
2027 | if (state->type_A) { | 2026 | if (state->type_A) { |
@@ -2147,7 +2146,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) | |||
2147 | if (status < 0) | 2146 | if (status < 0) |
2148 | break; | 2147 | break; |
2149 | 2148 | ||
2150 | switch (p->constellation) { | 2149 | switch (p->modulation) { |
2151 | default: | 2150 | default: |
2152 | operationMode |= SC_RA_RAM_OP_AUTO_CONST__M; | 2151 | operationMode |= SC_RA_RAM_OP_AUTO_CONST__M; |
2153 | /* fall through , try first guess | 2152 | /* fall through , try first guess |
@@ -2331,9 +2330,11 @@ static int DRX_Start(struct drxd_state *state, s32 off) | |||
2331 | by SC for fix for some 8K,1/8 guard but is restored by | 2330 | by SC for fix for some 8K,1/8 guard but is restored by |
2332 | InitEC and ResetEC | 2331 | InitEC and ResetEC |
2333 | functions */ | 2332 | functions */ |
2334 | switch (p->bandwidth) { | 2333 | switch (p->bandwidth_hz) { |
2335 | case BANDWIDTH_AUTO: | 2334 | case 0: |
2336 | case BANDWIDTH_8_MHZ: | 2335 | p->bandwidth_hz = 8000000; |
2336 | /* fall through */ | ||
2337 | case 8000000: | ||
2337 | /* (64/7)*(8/8)*1000000 */ | 2338 | /* (64/7)*(8/8)*1000000 */ |
2338 | bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ; | 2339 | bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ; |
2339 | 2340 | ||
@@ -2341,14 +2342,14 @@ static int DRX_Start(struct drxd_state *state, s32 off) | |||
2341 | status = Write16(state, | 2342 | status = Write16(state, |
2342 | FE_AG_REG_IND_DEL__A, 50, 0x0000); | 2343 | FE_AG_REG_IND_DEL__A, 50, 0x0000); |
2343 | break; | 2344 | break; |
2344 | case BANDWIDTH_7_MHZ: | 2345 | case 7000000: |
2345 | /* (64/7)*(7/8)*1000000 */ | 2346 | /* (64/7)*(7/8)*1000000 */ |
2346 | bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ; | 2347 | bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ; |
2347 | bandwidthParam = 0x4807; /*binary:0100 1000 0000 0111 */ | 2348 | bandwidthParam = 0x4807; /*binary:0100 1000 0000 0111 */ |
2348 | status = Write16(state, | 2349 | status = Write16(state, |
2349 | FE_AG_REG_IND_DEL__A, 59, 0x0000); | 2350 | FE_AG_REG_IND_DEL__A, 59, 0x0000); |
2350 | break; | 2351 | break; |
2351 | case BANDWIDTH_6_MHZ: | 2352 | case 6000000: |
2352 | /* (64/7)*(6/8)*1000000 */ | 2353 | /* (64/7)*(6/8)*1000000 */ |
2353 | bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ; | 2354 | bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ; |
2354 | bandwidthParam = 0x0F07; /*binary: 0000 1111 0000 0111 */ | 2355 | bandwidthParam = 0x0F07; /*binary: 0000 1111 0000 0111 */ |
@@ -2887,41 +2888,26 @@ static int drxd_sleep(struct dvb_frontend *fe) | |||
2887 | return 0; | 2888 | return 0; |
2888 | } | 2889 | } |
2889 | 2890 | ||
2890 | static int drxd_get_frontend(struct dvb_frontend *fe, | ||
2891 | struct dvb_frontend_parameters *param) | ||
2892 | { | ||
2893 | return 0; | ||
2894 | } | ||
2895 | |||
2896 | static int drxd_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) | 2891 | static int drxd_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) |
2897 | { | 2892 | { |
2898 | return drxd_config_i2c(fe, enable); | 2893 | return drxd_config_i2c(fe, enable); |
2899 | } | 2894 | } |
2900 | 2895 | ||
2901 | static int drxd_set_frontend(struct dvb_frontend *fe, | 2896 | static int drxd_set_frontend(struct dvb_frontend *fe) |
2902 | struct dvb_frontend_parameters *param) | ||
2903 | { | 2897 | { |
2898 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; | ||
2904 | struct drxd_state *state = fe->demodulator_priv; | 2899 | struct drxd_state *state = fe->demodulator_priv; |
2905 | s32 off = 0; | 2900 | s32 off = 0; |
2906 | 2901 | ||
2907 | state->param = *param; | 2902 | state->props = *p; |
2908 | DRX_Stop(state); | 2903 | DRX_Stop(state); |
2909 | 2904 | ||
2910 | if (fe->ops.tuner_ops.set_params) { | 2905 | if (fe->ops.tuner_ops.set_params) { |
2911 | fe->ops.tuner_ops.set_params(fe, param); | 2906 | fe->ops.tuner_ops.set_params(fe); |
2912 | if (fe->ops.i2c_gate_ctrl) | 2907 | if (fe->ops.i2c_gate_ctrl) |
2913 | fe->ops.i2c_gate_ctrl(fe, 0); | 2908 | fe->ops.i2c_gate_ctrl(fe, 0); |
2914 | } | 2909 | } |
2915 | 2910 | ||
2916 | /* FIXME: move PLL drivers */ | ||
2917 | if (state->config.pll_set && | ||
2918 | state->config.pll_set(state->priv, param, | ||
2919 | state->config.pll_address, | ||
2920 | state->config.demoda_address, &off) < 0) { | ||
2921 | printk(KERN_ERR "Error in pll_set\n"); | ||
2922 | return -1; | ||
2923 | } | ||
2924 | |||
2925 | msleep(200); | 2911 | msleep(200); |
2926 | 2912 | ||
2927 | return DRX_Start(state, off); | 2913 | return DRX_Start(state, off); |
@@ -2935,10 +2921,9 @@ static void drxd_release(struct dvb_frontend *fe) | |||
2935 | } | 2921 | } |
2936 | 2922 | ||
2937 | static struct dvb_frontend_ops drxd_ops = { | 2923 | static struct dvb_frontend_ops drxd_ops = { |
2938 | 2924 | .delsys = { SYS_DVBT}, | |
2939 | .info = { | 2925 | .info = { |
2940 | .name = "Micronas DRXD DVB-T", | 2926 | .name = "Micronas DRXD DVB-T", |
2941 | .type = FE_OFDM, | ||
2942 | .frequency_min = 47125000, | 2927 | .frequency_min = 47125000, |
2943 | .frequency_max = 855250000, | 2928 | .frequency_max = 855250000, |
2944 | .frequency_stepsize = 166667, | 2929 | .frequency_stepsize = 166667, |
@@ -2958,7 +2943,6 @@ static struct dvb_frontend_ops drxd_ops = { | |||
2958 | .i2c_gate_ctrl = drxd_i2c_gate_ctrl, | 2943 | .i2c_gate_ctrl = drxd_i2c_gate_ctrl, |
2959 | 2944 | ||
2960 | .set_frontend = drxd_set_frontend, | 2945 | .set_frontend = drxd_set_frontend, |
2961 | .get_frontend = drxd_get_frontend, | ||
2962 | .get_tune_settings = drxd_get_tune_settings, | 2946 | .get_tune_settings = drxd_get_tune_settings, |
2963 | 2947 | ||
2964 | .read_status = drxd_read_status, | 2948 | .read_status = drxd_read_status, |