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path: root/drivers/gpu/drm/radeon/si.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
-rw-r--r--drivers/gpu/drm/radeon/si.c30
1 files changed, 10 insertions, 20 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 27bda986fc2b..549732e56ca9 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -2217,8 +2217,6 @@ bool si_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
2217 u32 srbm_status; 2217 u32 srbm_status;
2218 u32 grbm_status, grbm_status2; 2218 u32 grbm_status, grbm_status2;
2219 u32 grbm_status_se0, grbm_status_se1; 2219 u32 grbm_status_se0, grbm_status_se1;
2220 struct r100_gpu_lockup *lockup = &rdev->config.si.lockup;
2221 int r;
2222 2220
2223 srbm_status = RREG32(SRBM_STATUS); 2221 srbm_status = RREG32(SRBM_STATUS);
2224 grbm_status = RREG32(GRBM_STATUS); 2222 grbm_status = RREG32(GRBM_STATUS);
@@ -2226,20 +2224,12 @@ bool si_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
2226 grbm_status_se0 = RREG32(GRBM_STATUS_SE0); 2224 grbm_status_se0 = RREG32(GRBM_STATUS_SE0);
2227 grbm_status_se1 = RREG32(GRBM_STATUS_SE1); 2225 grbm_status_se1 = RREG32(GRBM_STATUS_SE1);
2228 if (!(grbm_status & GUI_ACTIVE)) { 2226 if (!(grbm_status & GUI_ACTIVE)) {
2229 r100_gpu_lockup_update(lockup, ring); 2227 radeon_ring_lockup_update(ring);
2230 return false; 2228 return false;
2231 } 2229 }
2232 /* force CP activities */ 2230 /* force CP activities */
2233 r = radeon_ring_lock(rdev, ring, 2); 2231 radeon_ring_force_activity(rdev, ring);
2234 if (!r) { 2232 return radeon_ring_test_lockup(rdev, ring);
2235 /* PACKET2 NOP */
2236 radeon_ring_write(ring, 0x80000000);
2237 radeon_ring_write(ring, 0x80000000);
2238 radeon_ring_unlock_commit(rdev, ring);
2239 }
2240 /* XXX deal with CP0,1,2 */
2241 ring->rptr = RREG32(ring->rptr_reg);
2242 return r100_gpu_cp_is_lockup(rdev, lockup, ring);
2243} 2233}
2244 2234
2245static int si_gpu_soft_reset(struct radeon_device *rdev) 2235static int si_gpu_soft_reset(struct radeon_device *rdev)
@@ -2275,6 +2265,7 @@ static int si_gpu_soft_reset(struct radeon_device *rdev)
2275 SOFT_RESET_GDS | 2265 SOFT_RESET_GDS |
2276 SOFT_RESET_PA | 2266 SOFT_RESET_PA |
2277 SOFT_RESET_SC | 2267 SOFT_RESET_SC |
2268 SOFT_RESET_BCI |
2278 SOFT_RESET_SPI | 2269 SOFT_RESET_SPI |
2279 SOFT_RESET_SX | 2270 SOFT_RESET_SX |
2280 SOFT_RESET_TC | 2271 SOFT_RESET_TC |
@@ -2985,7 +2976,8 @@ int si_rlc_init(struct radeon_device *rdev)
2985 /* save restore block */ 2976 /* save restore block */
2986 if (rdev->rlc.save_restore_obj == NULL) { 2977 if (rdev->rlc.save_restore_obj == NULL) {
2987 r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true, 2978 r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true,
2988 RADEON_GEM_DOMAIN_VRAM, &rdev->rlc.save_restore_obj); 2979 RADEON_GEM_DOMAIN_VRAM, NULL,
2980 &rdev->rlc.save_restore_obj);
2989 if (r) { 2981 if (r) {
2990 dev_warn(rdev->dev, "(%d) create RLC sr bo failed\n", r); 2982 dev_warn(rdev->dev, "(%d) create RLC sr bo failed\n", r);
2991 return r; 2983 return r;
@@ -3009,7 +3001,8 @@ int si_rlc_init(struct radeon_device *rdev)
3009 /* clear state block */ 3001 /* clear state block */
3010 if (rdev->rlc.clear_state_obj == NULL) { 3002 if (rdev->rlc.clear_state_obj == NULL) {
3011 r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true, 3003 r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true,
3012 RADEON_GEM_DOMAIN_VRAM, &rdev->rlc.clear_state_obj); 3004 RADEON_GEM_DOMAIN_VRAM, NULL,
3005 &rdev->rlc.clear_state_obj);
3013 if (r) { 3006 if (r) {
3014 dev_warn(rdev->dev, "(%d) create RLC c bo failed\n", r); 3007 dev_warn(rdev->dev, "(%d) create RLC c bo failed\n", r);
3015 si_rlc_fini(rdev); 3008 si_rlc_fini(rdev);
@@ -3216,6 +3209,8 @@ static int si_irq_init(struct radeon_device *rdev)
3216 /* force the active interrupt state to all disabled */ 3209 /* force the active interrupt state to all disabled */
3217 si_disable_interrupt_state(rdev); 3210 si_disable_interrupt_state(rdev);
3218 3211
3212 pci_set_master(rdev->pdev);
3213
3219 /* enable irqs */ 3214 /* enable irqs */
3220 si_enable_interrupts(rdev); 3215 si_enable_interrupts(rdev);
3221 3216
@@ -3994,10 +3989,6 @@ int si_init(struct radeon_device *rdev)
3994 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; 3989 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
3995 int r; 3990 int r;
3996 3991
3997 /* This don't do much */
3998 r = radeon_gem_init(rdev);
3999 if (r)
4000 return r;
4001 /* Read BIOS */ 3992 /* Read BIOS */
4002 if (!radeon_get_bios(rdev)) { 3993 if (!radeon_get_bios(rdev)) {
4003 if (ASIC_IS_AVIVO(rdev)) 3994 if (ASIC_IS_AVIVO(rdev))
@@ -4117,7 +4108,6 @@ void si_fini(struct radeon_device *rdev)
4117 si_pcie_gart_fini(rdev); 4108 si_pcie_gart_fini(rdev);
4118 r600_vram_scratch_fini(rdev); 4109 r600_vram_scratch_fini(rdev);
4119 radeon_gem_fini(rdev); 4110 radeon_gem_fini(rdev);
4120 radeon_semaphore_driver_fini(rdev);
4121 radeon_fence_driver_fini(rdev); 4111 radeon_fence_driver_fini(rdev);
4122 radeon_bo_fini(rdev); 4112 radeon_bo_fini(rdev);
4123 radeon_atombios_fini(rdev); 4113 radeon_atombios_fini(rdev);