diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_display.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 68 |
1 files changed, 45 insertions, 23 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 91d72b70abc9..7e17a362b54b 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -234,7 +234,7 @@ static const char *encoder_names[34] = { | |||
234 | "INTERNAL_UNIPHY2", | 234 | "INTERNAL_UNIPHY2", |
235 | }; | 235 | }; |
236 | 236 | ||
237 | static const char *connector_names[13] = { | 237 | static const char *connector_names[15] = { |
238 | "Unknown", | 238 | "Unknown", |
239 | "VGA", | 239 | "VGA", |
240 | "DVI-I", | 240 | "DVI-I", |
@@ -248,6 +248,8 @@ static const char *connector_names[13] = { | |||
248 | "DisplayPort", | 248 | "DisplayPort", |
249 | "HDMI-A", | 249 | "HDMI-A", |
250 | "HDMI-B", | 250 | "HDMI-B", |
251 | "TV", | ||
252 | "eDP", | ||
251 | }; | 253 | }; |
252 | 254 | ||
253 | static const char *hpd_names[7] = { | 255 | static const char *hpd_names[7] = { |
@@ -276,7 +278,7 @@ static void radeon_print_display_setup(struct drm_device *dev) | |||
276 | DRM_INFO(" %s\n", connector_names[connector->connector_type]); | 278 | DRM_INFO(" %s\n", connector_names[connector->connector_type]); |
277 | if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) | 279 | if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) |
278 | DRM_INFO(" %s\n", hpd_names[radeon_connector->hpd.hpd]); | 280 | DRM_INFO(" %s\n", hpd_names[radeon_connector->hpd.hpd]); |
279 | if (radeon_connector->ddc_bus) | 281 | if (radeon_connector->ddc_bus) { |
280 | DRM_INFO(" DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", | 282 | DRM_INFO(" DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", |
281 | radeon_connector->ddc_bus->rec.mask_clk_reg, | 283 | radeon_connector->ddc_bus->rec.mask_clk_reg, |
282 | radeon_connector->ddc_bus->rec.mask_data_reg, | 284 | radeon_connector->ddc_bus->rec.mask_data_reg, |
@@ -286,6 +288,15 @@ static void radeon_print_display_setup(struct drm_device *dev) | |||
286 | radeon_connector->ddc_bus->rec.en_data_reg, | 288 | radeon_connector->ddc_bus->rec.en_data_reg, |
287 | radeon_connector->ddc_bus->rec.y_clk_reg, | 289 | radeon_connector->ddc_bus->rec.y_clk_reg, |
288 | radeon_connector->ddc_bus->rec.y_data_reg); | 290 | radeon_connector->ddc_bus->rec.y_data_reg); |
291 | } else { | ||
292 | if (connector->connector_type == DRM_MODE_CONNECTOR_VGA || | ||
293 | connector->connector_type == DRM_MODE_CONNECTOR_DVII || | ||
294 | connector->connector_type == DRM_MODE_CONNECTOR_DVID || | ||
295 | connector->connector_type == DRM_MODE_CONNECTOR_DVIA || | ||
296 | connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || | ||
297 | connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) | ||
298 | DRM_INFO(" DDC: no ddc bus - possible BIOS bug - please report to xorg-driver-ati@lists.x.org\n"); | ||
299 | } | ||
289 | DRM_INFO(" Encoders:\n"); | 300 | DRM_INFO(" Encoders:\n"); |
290 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | 301 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
291 | radeon_encoder = to_radeon_encoder(encoder); | 302 | radeon_encoder = to_radeon_encoder(encoder); |
@@ -329,8 +340,11 @@ static bool radeon_setup_enc_conn(struct drm_device *dev) | |||
329 | ret = radeon_get_atom_connector_info_from_object_table(dev); | 340 | ret = radeon_get_atom_connector_info_from_object_table(dev); |
330 | else | 341 | else |
331 | ret = radeon_get_atom_connector_info_from_supported_devices_table(dev); | 342 | ret = radeon_get_atom_connector_info_from_supported_devices_table(dev); |
332 | } else | 343 | } else { |
333 | ret = radeon_get_legacy_connector_info_from_bios(dev); | 344 | ret = radeon_get_legacy_connector_info_from_bios(dev); |
345 | if (ret == false) | ||
346 | ret = radeon_get_legacy_connector_info_from_table(dev); | ||
347 | } | ||
334 | } else { | 348 | } else { |
335 | if (!ASIC_IS_AVIVO(rdev)) | 349 | if (!ASIC_IS_AVIVO(rdev)) |
336 | ret = radeon_get_legacy_connector_info_from_table(dev); | 350 | ret = radeon_get_legacy_connector_info_from_table(dev); |
@@ -349,9 +363,11 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) | |||
349 | { | 363 | { |
350 | int ret = 0; | 364 | int ret = 0; |
351 | 365 | ||
352 | if (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) { | 366 | if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || |
367 | (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) { | ||
353 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; | 368 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; |
354 | if (dig->dp_i2c_bus) | 369 | if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT || |
370 | dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus) | ||
355 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter); | 371 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter); |
356 | } | 372 | } |
357 | if (!radeon_connector->ddc_bus) | 373 | if (!radeon_connector->ddc_bus) |
@@ -404,11 +420,12 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
404 | uint32_t *fb_div_p, | 420 | uint32_t *fb_div_p, |
405 | uint32_t *frac_fb_div_p, | 421 | uint32_t *frac_fb_div_p, |
406 | uint32_t *ref_div_p, | 422 | uint32_t *ref_div_p, |
407 | uint32_t *post_div_p, | 423 | uint32_t *post_div_p) |
408 | int flags) | ||
409 | { | 424 | { |
410 | uint32_t min_ref_div = pll->min_ref_div; | 425 | uint32_t min_ref_div = pll->min_ref_div; |
411 | uint32_t max_ref_div = pll->max_ref_div; | 426 | uint32_t max_ref_div = pll->max_ref_div; |
427 | uint32_t min_post_div = pll->min_post_div; | ||
428 | uint32_t max_post_div = pll->max_post_div; | ||
412 | uint32_t min_fractional_feed_div = 0; | 429 | uint32_t min_fractional_feed_div = 0; |
413 | uint32_t max_fractional_feed_div = 0; | 430 | uint32_t max_fractional_feed_div = 0; |
414 | uint32_t best_vco = pll->best_vco; | 431 | uint32_t best_vco = pll->best_vco; |
@@ -424,7 +441,7 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
424 | DRM_DEBUG("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); | 441 | DRM_DEBUG("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); |
425 | freq = freq * 1000; | 442 | freq = freq * 1000; |
426 | 443 | ||
427 | if (flags & RADEON_PLL_USE_REF_DIV) | 444 | if (pll->flags & RADEON_PLL_USE_REF_DIV) |
428 | min_ref_div = max_ref_div = pll->reference_div; | 445 | min_ref_div = max_ref_div = pll->reference_div; |
429 | else { | 446 | else { |
430 | while (min_ref_div < max_ref_div-1) { | 447 | while (min_ref_div < max_ref_div-1) { |
@@ -439,19 +456,22 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
439 | } | 456 | } |
440 | } | 457 | } |
441 | 458 | ||
442 | if (flags & RADEON_PLL_USE_FRAC_FB_DIV) { | 459 | if (pll->flags & RADEON_PLL_USE_POST_DIV) |
460 | min_post_div = max_post_div = pll->post_div; | ||
461 | |||
462 | if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) { | ||
443 | min_fractional_feed_div = pll->min_frac_feedback_div; | 463 | min_fractional_feed_div = pll->min_frac_feedback_div; |
444 | max_fractional_feed_div = pll->max_frac_feedback_div; | 464 | max_fractional_feed_div = pll->max_frac_feedback_div; |
445 | } | 465 | } |
446 | 466 | ||
447 | for (post_div = pll->min_post_div; post_div <= pll->max_post_div; ++post_div) { | 467 | for (post_div = min_post_div; post_div <= max_post_div; ++post_div) { |
448 | uint32_t ref_div; | 468 | uint32_t ref_div; |
449 | 469 | ||
450 | if ((flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) | 470 | if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) |
451 | continue; | 471 | continue; |
452 | 472 | ||
453 | /* legacy radeons only have a few post_divs */ | 473 | /* legacy radeons only have a few post_divs */ |
454 | if (flags & RADEON_PLL_LEGACY) { | 474 | if (pll->flags & RADEON_PLL_LEGACY) { |
455 | if ((post_div == 5) || | 475 | if ((post_div == 5) || |
456 | (post_div == 7) || | 476 | (post_div == 7) || |
457 | (post_div == 9) || | 477 | (post_div == 9) || |
@@ -498,7 +518,7 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
498 | tmp += (uint64_t)pll->reference_freq * 1000 * frac_feedback_div; | 518 | tmp += (uint64_t)pll->reference_freq * 1000 * frac_feedback_div; |
499 | current_freq = radeon_div(tmp, ref_div * post_div); | 519 | current_freq = radeon_div(tmp, ref_div * post_div); |
500 | 520 | ||
501 | if (flags & RADEON_PLL_PREFER_CLOSEST_LOWER) { | 521 | if (pll->flags & RADEON_PLL_PREFER_CLOSEST_LOWER) { |
502 | error = freq - current_freq; | 522 | error = freq - current_freq; |
503 | error = error < 0 ? 0xffffffff : error; | 523 | error = error < 0 ? 0xffffffff : error; |
504 | } else | 524 | } else |
@@ -525,12 +545,12 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
525 | best_freq = current_freq; | 545 | best_freq = current_freq; |
526 | best_error = error; | 546 | best_error = error; |
527 | best_vco_diff = vco_diff; | 547 | best_vco_diff = vco_diff; |
528 | } else if (((flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) || | 548 | } else if (((pll->flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) || |
529 | ((flags & RADEON_PLL_PREFER_HIGH_REF_DIV) && (ref_div > best_ref_div)) || | 549 | ((pll->flags & RADEON_PLL_PREFER_HIGH_REF_DIV) && (ref_div > best_ref_div)) || |
530 | ((flags & RADEON_PLL_PREFER_LOW_FB_DIV) && (feedback_div < best_feedback_div)) || | 550 | ((pll->flags & RADEON_PLL_PREFER_LOW_FB_DIV) && (feedback_div < best_feedback_div)) || |
531 | ((flags & RADEON_PLL_PREFER_HIGH_FB_DIV) && (feedback_div > best_feedback_div)) || | 551 | ((pll->flags & RADEON_PLL_PREFER_HIGH_FB_DIV) && (feedback_div > best_feedback_div)) || |
532 | ((flags & RADEON_PLL_PREFER_LOW_POST_DIV) && (post_div < best_post_div)) || | 552 | ((pll->flags & RADEON_PLL_PREFER_LOW_POST_DIV) && (post_div < best_post_div)) || |
533 | ((flags & RADEON_PLL_PREFER_HIGH_POST_DIV) && (post_div > best_post_div))) { | 553 | ((pll->flags & RADEON_PLL_PREFER_HIGH_POST_DIV) && (post_div > best_post_div))) { |
534 | best_post_div = post_div; | 554 | best_post_div = post_div; |
535 | best_ref_div = ref_div; | 555 | best_ref_div = ref_div; |
536 | best_feedback_div = feedback_div; | 556 | best_feedback_div = feedback_div; |
@@ -566,8 +586,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, | |||
566 | uint32_t *fb_div_p, | 586 | uint32_t *fb_div_p, |
567 | uint32_t *frac_fb_div_p, | 587 | uint32_t *frac_fb_div_p, |
568 | uint32_t *ref_div_p, | 588 | uint32_t *ref_div_p, |
569 | uint32_t *post_div_p, | 589 | uint32_t *post_div_p) |
570 | int flags) | ||
571 | { | 590 | { |
572 | fixed20_12 m, n, frac_n, p, f_vco, f_pclk, best_freq; | 591 | fixed20_12 m, n, frac_n, p, f_vco, f_pclk, best_freq; |
573 | fixed20_12 pll_out_max, pll_out_min; | 592 | fixed20_12 pll_out_max, pll_out_min; |
@@ -661,7 +680,6 @@ static void radeon_user_framebuffer_destroy(struct drm_framebuffer *fb) | |||
661 | radeonfb_remove(dev, fb); | 680 | radeonfb_remove(dev, fb); |
662 | 681 | ||
663 | if (radeon_fb->obj) { | 682 | if (radeon_fb->obj) { |
664 | radeon_gem_object_unpin(radeon_fb->obj); | ||
665 | mutex_lock(&dev->struct_mutex); | 683 | mutex_lock(&dev->struct_mutex); |
666 | drm_gem_object_unreference(radeon_fb->obj); | 684 | drm_gem_object_unreference(radeon_fb->obj); |
667 | mutex_unlock(&dev->struct_mutex); | 685 | mutex_unlock(&dev->struct_mutex); |
@@ -709,7 +727,11 @@ radeon_user_framebuffer_create(struct drm_device *dev, | |||
709 | struct drm_gem_object *obj; | 727 | struct drm_gem_object *obj; |
710 | 728 | ||
711 | obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handle); | 729 | obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handle); |
712 | 730 | if (obj == NULL) { | |
731 | dev_err(&dev->pdev->dev, "No GEM object associated to handle 0x%08X, " | ||
732 | "can't create framebuffer\n", mode_cmd->handle); | ||
733 | return NULL; | ||
734 | } | ||
713 | return radeon_framebuffer_create(dev, mode_cmd, obj); | 735 | return radeon_framebuffer_create(dev, mode_cmd, obj); |
714 | } | 736 | } |
715 | 737 | ||