1 files changed, 9 insertions, 8 deletions

diff --git a/drivers/gpu/drm/nouveau/nv50_fifo.c b/drivers/gpu/drm/nouveau/nv50_fifo.c
index b7282284f080..204a79ff10f4 100644
--- a/drivers/gpu/drm/nouveau/nv50_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv50_fifo.c
@@ -272,7 +272,7 @@ nv50_fifo_create_context(struct nouveau_channel *chan)
                         return ret;
                 ramfc = chan->ramfc->gpuobj;
 
-                ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 4096, 256,
+                ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 4096, 1024,
                                              0, &chan->cache);
                 if (ret)
                         return ret;
@@ -317,17 +317,20 @@ void
 nv50_fifo_destroy_context(struct nouveau_channel *chan)
 {
         struct drm_device *dev = chan->dev;
+        struct nouveau_gpuobj_ref *ramfc = chan->ramfc;
 
         NV_DEBUG(dev, "ch%d\n", chan->id);
 
-        nouveau_gpuobj_ref_del(dev, &chan->ramfc);
-        nouveau_gpuobj_ref_del(dev, &chan->cache);
-
+        /* This will ensure the channel is seen as disabled. */
+        chan->ramfc = NULL;
         nv50_fifo_channel_disable(dev, chan->id, false);
 
         /* Dummy channel, also used on ch 127 */
         if (chan->id == 0)
                 nv50_fifo_channel_disable(dev, 127, false);
+
+        nouveau_gpuobj_ref_del(dev, &ramfc);
+        nouveau_gpuobj_ref_del(dev, &chan->cache);
 }
 
 int
@@ -384,8 +387,8 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
                 nv_wr32(dev, NV40_PFIFO_CACHE1_DATA(ptr),
                         nv_ro32(dev, cache, (ptr * 2) + 1));
         }
-        nv_wr32(dev, 0x3210, cnt << 2);
-        nv_wr32(dev, 0x3270, 0);
+        nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, cnt << 2);
+        nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
 
         /* guessing that all the 0x34xx regs aren't on NV50 */
         if (!IS_G80) {
@@ -398,8 +401,6 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
 
         dev_priv->engine.instmem.finish_access(dev);
 
-        nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
-        nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
         nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, chan->id | (1<<16));
         return 0;
 }