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path: root/drivers/gpu/drm/i915/intel_ringbuffer.h
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.h')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.h23
1 files changed, 12 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index bc0365b8fa4d..55d3da26bae7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -2,7 +2,7 @@
2#define _INTEL_RINGBUFFER_H_ 2#define _INTEL_RINGBUFFER_H_
3 3
4struct intel_hw_status_page { 4struct intel_hw_status_page {
5 u32 __iomem *page_addr; 5 u32 *page_addr;
6 unsigned int gfx_addr; 6 unsigned int gfx_addr;
7 struct drm_i915_gem_object *obj; 7 struct drm_i915_gem_object *obj;
8}; 8};
@@ -56,12 +56,9 @@ struct intel_ring_buffer {
56 */ 56 */
57 u32 last_retired_head; 57 u32 last_retired_head;
58 58
59 spinlock_t irq_lock; 59 u32 irq_refcount; /* protected by dev_priv->irq_lock */
60 u32 irq_refcount; 60 u32 irq_enable_mask; /* bitmask to enable ring interrupt */
61 u32 irq_mask;
62 u32 irq_seqno; /* last seq seem at irq time */
63 u32 trace_irq_seqno; 61 u32 trace_irq_seqno;
64 u32 waiting_seqno;
65 u32 sync_seqno[I915_NUM_RINGS-1]; 62 u32 sync_seqno[I915_NUM_RINGS-1];
66 bool __must_check (*irq_get)(struct intel_ring_buffer *ring); 63 bool __must_check (*irq_get)(struct intel_ring_buffer *ring);
67 void (*irq_put)(struct intel_ring_buffer *ring); 64 void (*irq_put)(struct intel_ring_buffer *ring);
@@ -118,11 +115,16 @@ struct intel_ring_buffer {
118 u32 outstanding_lazy_request; 115 u32 outstanding_lazy_request;
119 116
120 wait_queue_head_t irq_queue; 117 wait_queue_head_t irq_queue;
121 drm_local_map_t map;
122 118
123 void *private; 119 void *private;
124}; 120};
125 121
122static inline bool
123intel_ring_initialized(struct intel_ring_buffer *ring)
124{
125 return ring->obj != NULL;
126}
127
126static inline unsigned 128static inline unsigned
127intel_ring_flag(struct intel_ring_buffer *ring) 129intel_ring_flag(struct intel_ring_buffer *ring)
128{ 130{
@@ -152,7 +154,9 @@ static inline u32
152intel_read_status_page(struct intel_ring_buffer *ring, 154intel_read_status_page(struct intel_ring_buffer *ring,
153 int reg) 155 int reg)
154{ 156{
155 return ioread32(ring->status_page.page_addr + reg); 157 /* Ensure that the compiler doesn't optimize away the load. */
158 barrier();
159 return ring->status_page.page_addr[reg];
156} 160}
157 161
158/** 162/**
@@ -170,10 +174,7 @@ intel_read_status_page(struct intel_ring_buffer *ring,
170 * 174 *
171 * The area from dword 0x20 to 0x3ff is available for driver usage. 175 * The area from dword 0x20 to 0x3ff is available for driver usage.
172 */ 176 */
173#define READ_HWSP(dev_priv, reg) intel_read_status_page(LP_RING(dev_priv), reg)
174#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)
175#define I915_GEM_HWS_INDEX 0x20 177#define I915_GEM_HWS_INDEX 0x20
176#define I915_BREADCRUMB_INDEX 0x21
177 178
178void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring); 179void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring);
179 180