diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 91 |
1 files changed, 62 insertions, 29 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 41b4caf3d1d8..6490d8b3867f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -4204,6 +4204,62 @@ void intel_crtc_load_lut(struct drm_crtc *crtc) | |||
4204 | } | 4204 | } |
4205 | } | 4205 | } |
4206 | 4206 | ||
4207 | static void i845_update_cursor(struct drm_crtc *crtc, u32 base) | ||
4208 | { | ||
4209 | struct drm_device *dev = crtc->dev; | ||
4210 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
4211 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
4212 | bool visible = base != 0; | ||
4213 | u32 cntl; | ||
4214 | |||
4215 | if (intel_crtc->cursor_visible == visible) | ||
4216 | return; | ||
4217 | |||
4218 | cntl = I915_READ(CURACNTR); | ||
4219 | if (visible) { | ||
4220 | /* On these chipsets we can only modify the base whilst | ||
4221 | * the cursor is disabled. | ||
4222 | */ | ||
4223 | I915_WRITE(CURABASE, base); | ||
4224 | |||
4225 | cntl &= ~(CURSOR_FORMAT_MASK); | ||
4226 | /* XXX width must be 64, stride 256 => 0x00 << 28 */ | ||
4227 | cntl |= CURSOR_ENABLE | | ||
4228 | CURSOR_GAMMA_ENABLE | | ||
4229 | CURSOR_FORMAT_ARGB; | ||
4230 | } else | ||
4231 | cntl &= ~(CURSOR_ENABLE | CURSOR_GAMMA_ENABLE); | ||
4232 | I915_WRITE(CURACNTR, cntl); | ||
4233 | |||
4234 | intel_crtc->cursor_visible = visible; | ||
4235 | } | ||
4236 | |||
4237 | static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) | ||
4238 | { | ||
4239 | struct drm_device *dev = crtc->dev; | ||
4240 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
4241 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
4242 | int pipe = intel_crtc->pipe; | ||
4243 | bool visible = base != 0; | ||
4244 | |||
4245 | if (intel_crtc->cursor_visible != visible) { | ||
4246 | uint32_t cntl = I915_READ(pipe == 0 ? CURACNTR : CURBCNTR); | ||
4247 | if (base) { | ||
4248 | cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); | ||
4249 | cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; | ||
4250 | cntl |= pipe << 28; /* Connect to correct pipe */ | ||
4251 | } else { | ||
4252 | cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE); | ||
4253 | cntl |= CURSOR_MODE_DISABLE; | ||
4254 | } | ||
4255 | I915_WRITE(pipe == 0 ? CURACNTR : CURBCNTR, cntl); | ||
4256 | |||
4257 | intel_crtc->cursor_visible = visible; | ||
4258 | } | ||
4259 | /* and commit changes on next vblank */ | ||
4260 | I915_WRITE(pipe == 0 ? CURABASE : CURBBASE, base); | ||
4261 | } | ||
4262 | |||
4207 | /* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */ | 4263 | /* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */ |
4208 | static void intel_crtc_update_cursor(struct drm_crtc *crtc) | 4264 | static void intel_crtc_update_cursor(struct drm_crtc *crtc) |
4209 | { | 4265 | { |
@@ -4213,7 +4269,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc) | |||
4213 | int pipe = intel_crtc->pipe; | 4269 | int pipe = intel_crtc->pipe; |
4214 | int x = intel_crtc->cursor_x; | 4270 | int x = intel_crtc->cursor_x; |
4215 | int y = intel_crtc->cursor_y; | 4271 | int y = intel_crtc->cursor_y; |
4216 | uint32_t base, pos; | 4272 | u32 base, pos; |
4217 | bool visible; | 4273 | bool visible; |
4218 | 4274 | ||
4219 | pos = 0; | 4275 | pos = 0; |
@@ -4247,37 +4303,14 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc) | |||
4247 | pos |= y << CURSOR_Y_SHIFT; | 4303 | pos |= y << CURSOR_Y_SHIFT; |
4248 | 4304 | ||
4249 | visible = base != 0; | 4305 | visible = base != 0; |
4250 | if (!visible && !intel_crtc->cursor_visble) | 4306 | if (!visible && !intel_crtc->cursor_visible) |
4251 | return; | 4307 | return; |
4252 | 4308 | ||
4253 | I915_WRITE(pipe == 0 ? CURAPOS : CURBPOS, pos); | 4309 | I915_WRITE(pipe == 0 ? CURAPOS : CURBPOS, pos); |
4254 | if (intel_crtc->cursor_visble != visible) { | 4310 | if (IS_845G(dev) || IS_I865G(dev)) |
4255 | uint32_t cntl = I915_READ(pipe == 0 ? CURACNTR : CURBCNTR); | 4311 | i845_update_cursor(crtc, base); |
4256 | if (base) { | 4312 | else |
4257 | /* Hooray for CUR*CNTR differences */ | 4313 | i9xx_update_cursor(crtc, base); |
4258 | if (IS_MOBILE(dev) || IS_I9XX(dev)) { | ||
4259 | cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); | ||
4260 | cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; | ||
4261 | cntl |= pipe << 28; /* Connect to correct pipe */ | ||
4262 | } else { | ||
4263 | cntl &= ~(CURSOR_FORMAT_MASK); | ||
4264 | cntl |= CURSOR_ENABLE; | ||
4265 | cntl |= CURSOR_FORMAT_ARGB | CURSOR_GAMMA_ENABLE; | ||
4266 | } | ||
4267 | } else { | ||
4268 | if (IS_MOBILE(dev) || IS_I9XX(dev)) { | ||
4269 | cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE); | ||
4270 | cntl |= CURSOR_MODE_DISABLE; | ||
4271 | } else { | ||
4272 | cntl &= ~(CURSOR_ENABLE | CURSOR_GAMMA_ENABLE); | ||
4273 | } | ||
4274 | } | ||
4275 | I915_WRITE(pipe == 0 ? CURACNTR : CURBCNTR, cntl); | ||
4276 | |||
4277 | intel_crtc->cursor_visble = visible; | ||
4278 | } | ||
4279 | /* and commit changes on next vblank */ | ||
4280 | I915_WRITE(pipe == 0 ? CURABASE : CURBBASE, base); | ||
4281 | 4314 | ||
4282 | if (visible) | 4315 | if (visible) |
4283 | intel_mark_busy(dev, to_intel_framebuffer(crtc->fb)->obj); | 4316 | intel_mark_busy(dev, to_intel_framebuffer(crtc->fb)->obj); |