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-rw-r--r--arch/arm/Kconfig10
-rw-r--r--arch/arm/boot/dts/versatile-ab.dts2
-rw-r--r--arch/arm/boot/dts/versatile-pb.dts2
-rw-r--r--arch/arm/common/it8152.c7
-rw-r--r--arch/arm/common/via82c505.c11
-rw-r--r--arch/arm/include/asm/hardware/it8152.h2
-rw-r--r--arch/arm/include/asm/mach/pci.h17
-rw-r--r--arch/arm/include/asm/thread_info.h7
-rw-r--r--arch/arm/include/asm/tls.h4
-rw-r--r--arch/arm/kernel/bios32.c37
-rw-r--r--arch/arm/kernel/irq.c6
-rw-r--r--arch/arm/kernel/ptrace.c24
-rw-r--r--arch/arm/kernel/signal.c55
-rw-r--r--arch/arm/kernel/smp.c32
-rw-r--r--arch/arm/kernel/sys_arm.c2
-rw-r--r--arch/arm/mach-cns3xxx/pcie.c12
-rw-r--r--arch/arm/mach-dove/pcie.c24
-rw-r--r--arch/arm/mach-footbridge/cats-pci.c9
-rw-r--r--arch/arm/mach-footbridge/dc21285.c7
-rw-r--r--arch/arm/mach-footbridge/ebsa285-pci.c3
-rw-r--r--arch/arm/mach-footbridge/netwinder-pci.c3
-rw-r--r--arch/arm/mach-footbridge/personal-pci.c2
-rw-r--r--arch/arm/mach-integrator/impd1.c22
-rw-r--r--arch/arm/mach-integrator/include/mach/entry-macro.S39
-rw-r--r--arch/arm/mach-integrator/include/mach/irqs.h63
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c10
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c33
-rw-r--r--arch/arm/mach-integrator/pci.c19
-rw-r--r--arch/arm/mach-integrator/pci_v3.c8
-rw-r--r--arch/arm/mach-iop13xx/iq81340mc.c1
-rw-r--r--arch/arm/mach-iop13xx/iq81340sc.c1
-rw-r--r--arch/arm/mach-iop32x/em7210.c3
-rw-r--r--arch/arm/mach-iop32x/glantank.c3
-rw-r--r--arch/arm/mach-iop32x/iq31244.c6
-rw-r--r--arch/arm/mach-iop32x/iq80321.c3
-rw-r--r--arch/arm/mach-iop32x/n2100.c3
-rw-r--r--arch/arm/mach-iop33x/iq80331.c3
-rw-r--r--arch/arm/mach-iop33x/iq80332.c3
-rw-r--r--arch/arm/mach-ixp2000/enp2611.c9
-rw-r--r--arch/arm/mach-ixp2000/include/mach/platform.h2
-rw-r--r--arch/arm/mach-ixp2000/ixdp2400.c2
-rw-r--r--arch/arm/mach-ixp2000/ixdp2800.c2
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x01.c2
-rw-r--r--arch/arm/mach-ixp2000/pci.c8
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/platform.h2
-rw-r--r--arch/arm/mach-ixp23xx/ixdp2351.c2
-rw-r--r--arch/arm/mach-ixp23xx/pci.c6
-rw-r--r--arch/arm/mach-ixp23xx/roadrunner.c2
-rw-r--r--arch/arm/mach-ixp4xx/avila-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c6
-rw-r--r--arch/arm/mach-ixp4xx/coyote-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/dsmg600-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/fsg-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/gateway7001-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c3
-rw-r--r--arch/arm/mach-ixp4xx/gtwx5715-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/platform.h2
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/ixdpg425-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/miccpt-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/vulcan-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/wg302v2-pci.c3
-rw-r--r--arch/arm/mach-kirkwood/pcie.c16
-rw-r--r--arch/arm/mach-ks8695/pci.c9
-rw-r--r--arch/arm/mach-mv78xx0/pcie.c24
-rw-r--r--arch/arm/mach-mxs/devices-mx23.h12
-rw-r--r--arch/arm/mach-mxs/devices-mx28.h12
-rw-r--r--arch/arm/mach-mxs/devices.c16
-rw-r--r--arch/arm/mach-mxs/devices/Makefile1
-rw-r--r--arch/arm/mach-mxs/devices/amba-duart.c40
-rw-r--r--arch/arm/mach-mxs/include/mach/devices-common.h5
-rw-r--r--arch/arm/mach-orion5x/db88f5281-setup.c1
-rw-r--r--arch/arm/mach-orion5x/dns323-setup.c1
-rw-r--r--arch/arm/mach-orion5x/kurobox_pro-setup.c1
-rw-r--r--arch/arm/mach-orion5x/mss2-setup.c1
-rw-r--r--arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c1
-rw-r--r--arch/arm/mach-orion5x/rd88f5181l-ge-setup.c1
-rw-r--r--arch/arm/mach-orion5x/rd88f5182-setup.c1
-rw-r--r--arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c1
-rw-r--r--arch/arm/mach-orion5x/terastation_pro2-setup.c1
-rw-r--r--arch/arm/mach-orion5x/ts209-setup.c1
-rw-r--r--arch/arm/mach-orion5x/ts409-setup.c1
-rw-r--r--arch/arm/mach-orion5x/wnr854t-setup.c1
-rw-r--r--arch/arm/mach-orion5x/wrt350n-v2-setup.c1
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.c3
-rw-r--r--arch/arm/mach-sa1100/pci-nanoengine.c8
-rw-r--r--arch/arm/mach-shark/pci.c3
-rw-r--r--arch/arm/mach-tegra/pcie.c1
-rw-r--r--arch/arm/mach-ux500/devices-common.c33
-rw-r--r--arch/arm/mach-ux500/devices-common.h23
-rw-r--r--arch/arm/mach-ux500/devices-db8500.h2
-rw-r--r--arch/arm/mach-versatile/core.c18
-rw-r--r--arch/arm/mach-versatile/pci.c13
-rw-r--r--arch/arm/mm/abort-ev6.S17
-rw-r--r--arch/arm/mm/cache-l2x0.c25
-rw-r--r--arch/arm/mm/fault.c4
-rw-r--r--arch/arm/mm/init.c4
-rw-r--r--arch/arm/mm/mmu.c7
-rw-r--r--arch/arm/plat-iop/pci.c8
-rw-r--r--arch/arm/plat-omap/dma.c14
-rw-r--r--arch/arm/plat-versatile/Kconfig6
-rw-r--r--arch/arm/plat-versatile/fpga-irq.c116
-rw-r--r--arch/arm/plat-versatile/include/plat/fpga-irq.h11
-rw-r--r--arch/arm/tools/mach-types505
-rw-r--r--arch/arm/vfp/vfpmodule.c99
-rw-r--r--arch/powerpc/include/asm/irq.h4
-rw-r--r--arch/powerpc/kernel/irq.c6
-rw-r--r--arch/powerpc/kernel/machine_kexec.c7
-rw-r--r--arch/powerpc/platforms/cell/axon_msi.c8
-rw-r--r--arch/powerpc/platforms/cell/beat_interrupt.c2
-rw-r--r--arch/powerpc/platforms/powermac/pic.c6
-rw-r--r--arch/powerpc/platforms/pseries/Kconfig4
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.c3
-rw-r--r--arch/powerpc/sysdev/mpc8xx_pic.c61
-rw-r--r--arch/powerpc/sysdev/xics/xics-common.c7
117 files changed, 821 insertions, 940 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4faabbade2e9..ed244933b256 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -280,6 +280,7 @@ config ARCH_INTEGRATOR
280 select NEED_MACH_IO_H 280 select NEED_MACH_IO_H
281 select NEED_MACH_MEMORY_H 281 select NEED_MACH_MEMORY_H
282 select SPARSE_IRQ 282 select SPARSE_IRQ
283 select MULTI_IRQ_HANDLER
283 help 284 help
284 Support for ARM's Integrator platform. 285 Support for ARM's Integrator platform.
285 286
@@ -1186,6 +1187,15 @@ if !MMU
1186source "arch/arm/Kconfig-nommu" 1187source "arch/arm/Kconfig-nommu"
1187endif 1188endif
1188 1189
1190config ARM_ERRATA_326103
1191 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1192 depends on CPU_V6
1193 help
1194 Executing a SWP instruction to read-only memory does not set bit 11
1195 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1196 treat the access as a read, preventing a COW from occurring and
1197 causing the faulting task to livelock.
1198
1189config ARM_ERRATA_411920 1199config ARM_ERRATA_411920
1190 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1200 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1191 depends on CPU_V6 || CPU_V6K 1201 depends on CPU_V6 || CPU_V6K
diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts
index 0b32925f2147..e2fe3195c0d1 100644
--- a/arch/arm/boot/dts/versatile-ab.dts
+++ b/arch/arm/boot/dts/versatile-ab.dts
@@ -173,7 +173,7 @@
173 mmc@5000 { 173 mmc@5000 {
174 compatible = "arm,primecell"; 174 compatible = "arm,primecell";
175 reg = < 0x5000 0x1000>; 175 reg = < 0x5000 0x1000>;
176 interrupts = <22>; 176 interrupts = <22 34>;
177 }; 177 };
178 kmi@6000 { 178 kmi@6000 {
179 compatible = "arm,pl050", "arm,primecell"; 179 compatible = "arm,pl050", "arm,primecell";
diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts
index 166461073b78..7e8175269064 100644
--- a/arch/arm/boot/dts/versatile-pb.dts
+++ b/arch/arm/boot/dts/versatile-pb.dts
@@ -41,7 +41,7 @@
41 mmc@b000 { 41 mmc@b000 {
42 compatible = "arm,primecell"; 42 compatible = "arm,primecell";
43 reg = <0xb000 0x1000>; 43 reg = <0xb000 0x1000>;
44 interrupts = <23>; 44 interrupts = <23 34>;
45 }; 45 };
46 }; 46 };
47 }; 47 };
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index dcb13494ca0d..c4110d1b1f2d 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -222,7 +222,7 @@ static int it8152_pci_write_config(struct pci_bus *bus,
222 return PCIBIOS_SUCCESSFUL; 222 return PCIBIOS_SUCCESSFUL;
223} 223}
224 224
225static struct pci_ops it8152_ops = { 225struct pci_ops it8152_ops = {
226 .read = it8152_pci_read_config, 226 .read = it8152_pci_read_config,
227 .write = it8152_pci_write_config, 227 .write = it8152_pci_write_config,
228}; 228};
@@ -346,9 +346,4 @@ void pcibios_set_master(struct pci_dev *dev)
346} 346}
347 347
348 348
349struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys)
350{
351 return pci_scan_root_bus(NULL, nr, &it8152_ops, sys, &sys->resources);
352}
353
354EXPORT_SYMBOL(dma_set_coherent_mask); 349EXPORT_SYMBOL(dma_set_coherent_mask);
diff --git a/arch/arm/common/via82c505.c b/arch/arm/common/via82c505.c
index 1171a5010aea..6cb362e56d29 100644
--- a/arch/arm/common/via82c505.c
+++ b/arch/arm/common/via82c505.c
@@ -51,7 +51,7 @@ via82c505_write_config(struct pci_bus *bus, unsigned int devfn, int where,
51 return PCIBIOS_SUCCESSFUL; 51 return PCIBIOS_SUCCESSFUL;
52} 52}
53 53
54static struct pci_ops via82c505_ops = { 54struct pci_ops via82c505_ops = {
55 .read = via82c505_read_config, 55 .read = via82c505_read_config,
56 .write = via82c505_write_config, 56 .write = via82c505_write_config,
57}; 57};
@@ -81,12 +81,3 @@ int __init via82c505_setup(int nr, struct pci_sys_data *sys)
81{ 81{
82 return (nr == 0); 82 return (nr == 0);
83} 83}
84
85struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata)
86{
87 if (nr == 0)
88 return pci_scan_root_bus(NULL, 0, &via82c505_ops, sysdata,
89 &sysdata->resources);
90
91 return NULL;
92}
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index 73f84fa4f366..d36a73d7c0e8 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -110,6 +110,6 @@ extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc);
110extern void it8152_init_irq(void); 110extern void it8152_init_irq(void);
111extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); 111extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
112extern int it8152_pci_setup(int nr, struct pci_sys_data *sys); 112extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
113extern struct pci_bus *it8152_pci_scan_bus(int nr, struct pci_sys_data *sys); 113extern struct pci_ops it8152_ops;
114 114
115#endif /* __ASM_HARDWARE_IT8152_H */ 115#endif /* __ASM_HARDWARE_IT8152_H */
diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index d943b7d20f11..26c511fddf8f 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -12,13 +12,14 @@
12#define __ASM_MACH_PCI_H 12#define __ASM_MACH_PCI_H
13 13
14struct pci_sys_data; 14struct pci_sys_data;
15struct pci_ops;
15struct pci_bus; 16struct pci_bus;
16 17
17struct hw_pci { 18struct hw_pci {
18#ifdef CONFIG_PCI_DOMAINS 19#ifdef CONFIG_PCI_DOMAINS
19 int domain; 20 int domain;
20#endif 21#endif
21 struct list_head buses; 22 struct pci_ops *ops;
22 int nr_controllers; 23 int nr_controllers;
23 int (*setup)(int nr, struct pci_sys_data *); 24 int (*setup)(int nr, struct pci_sys_data *);
24 struct pci_bus *(*scan)(int nr, struct pci_sys_data *); 25 struct pci_bus *(*scan)(int nr, struct pci_sys_data *);
@@ -45,16 +46,10 @@ struct pci_sys_data {
45 u8 (*swizzle)(struct pci_dev *, u8 *); 46 u8 (*swizzle)(struct pci_dev *, u8 *);
46 /* IRQ mapping */ 47 /* IRQ mapping */
47 int (*map_irq)(const struct pci_dev *, u8, u8); 48 int (*map_irq)(const struct pci_dev *, u8, u8);
48 struct hw_pci *hw;
49 void *private_data; /* platform controller private data */ 49 void *private_data; /* platform controller private data */
50}; 50};
51 51
52/* 52/*
53 * This is the standard PCI-PCI bridge swizzling algorithm.
54 */
55#define pci_std_swizzle pci_common_swizzle
56
57/*
58 * Call this with your hw_pci struct to initialise the PCI system. 53 * Call this with your hw_pci struct to initialise the PCI system.
59 */ 54 */
60void pci_common_init(struct hw_pci *); 55void pci_common_init(struct hw_pci *);
@@ -62,22 +57,22 @@ void pci_common_init(struct hw_pci *);
62/* 57/*
63 * PCI controllers 58 * PCI controllers
64 */ 59 */
60extern struct pci_ops iop3xx_ops;
65extern int iop3xx_pci_setup(int nr, struct pci_sys_data *); 61extern int iop3xx_pci_setup(int nr, struct pci_sys_data *);
66extern struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *);
67extern void iop3xx_pci_preinit(void); 62extern void iop3xx_pci_preinit(void);
68extern void iop3xx_pci_preinit_cond(void); 63extern void iop3xx_pci_preinit_cond(void);
69 64
65extern struct pci_ops dc21285_ops;
70extern int dc21285_setup(int nr, struct pci_sys_data *); 66extern int dc21285_setup(int nr, struct pci_sys_data *);
71extern struct pci_bus *dc21285_scan_bus(int nr, struct pci_sys_data *);
72extern void dc21285_preinit(void); 67extern void dc21285_preinit(void);
73extern void dc21285_postinit(void); 68extern void dc21285_postinit(void);
74 69
70extern struct pci_ops via82c505_ops;
75extern int via82c505_setup(int nr, struct pci_sys_data *); 71extern int via82c505_setup(int nr, struct pci_sys_data *);
76extern struct pci_bus *via82c505_scan_bus(int nr, struct pci_sys_data *);
77extern void via82c505_init(void *sysdata); 72extern void via82c505_init(void *sysdata);
78 73
74extern struct pci_ops pci_v3_ops;
79extern int pci_v3_setup(int nr, struct pci_sys_data *); 75extern int pci_v3_setup(int nr, struct pci_sys_data *);
80extern struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *);
81extern void pci_v3_preinit(void); 76extern void pci_v3_preinit(void);
82extern void pci_v3_postinit(void); 77extern void pci_v3_postinit(void);
83 78
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index 9e13e33ec746..68388eb4946b 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -118,6 +118,13 @@ extern void iwmmxt_task_switch(struct thread_info *);
118extern void vfp_sync_hwstate(struct thread_info *); 118extern void vfp_sync_hwstate(struct thread_info *);
119extern void vfp_flush_hwstate(struct thread_info *); 119extern void vfp_flush_hwstate(struct thread_info *);
120 120
121struct user_vfp;
122struct user_vfp_exc;
123
124extern int vfp_preserve_user_clear_hwstate(struct user_vfp __user *,
125 struct user_vfp_exc __user *);
126extern int vfp_restore_user_hwstate(struct user_vfp __user *,
127 struct user_vfp_exc __user *);
121#endif 128#endif
122 129
123/* 130/*
diff --git a/arch/arm/include/asm/tls.h b/arch/arm/include/asm/tls.h
index 60843eb0f61c..73409e6c0251 100644
--- a/arch/arm/include/asm/tls.h
+++ b/arch/arm/include/asm/tls.h
@@ -7,6 +7,8 @@
7 7
8 .macro set_tls_v6k, tp, tmp1, tmp2 8 .macro set_tls_v6k, tp, tmp1, tmp2
9 mcr p15, 0, \tp, c13, c0, 3 @ set TLS register 9 mcr p15, 0, \tp, c13, c0, 3 @ set TLS register
10 mov \tmp1, #0
11 mcr p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
10 .endm 12 .endm
11 13
12 .macro set_tls_v6, tp, tmp1, tmp2 14 .macro set_tls_v6, tp, tmp1, tmp2
@@ -15,6 +17,8 @@
15 mov \tmp2, #0xffff0fff 17 mov \tmp2, #0xffff0fff
16 tst \tmp1, #HWCAP_TLS @ hardware TLS available? 18 tst \tmp1, #HWCAP_TLS @ hardware TLS available?
17 mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register 19 mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register
20 movne \tmp1, #0
21 mcrne p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
18 streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0 22 streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0
19 .endm 23 .endm
20 24
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index ede5f7741c42..25552508c3fd 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -374,16 +374,29 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
374#endif 374#endif
375 375
376/* 376/*
377 * Swizzle the device pin each time we cross a bridge. 377 * Swizzle the device pin each time we cross a bridge. If a platform does
378 * This might update pin and returns the slot number. 378 * not provide a swizzle function, we perform the standard PCI swizzling.
379 *
380 * The default swizzling walks up the bus tree one level at a time, applying
381 * the standard swizzle function at each step, stopping when it finds the PCI
382 * root bus. This will return the slot number of the bridge device on the
383 * root bus and the interrupt pin on that device which should correspond
384 * with the downstream device interrupt.
385 *
386 * Platforms may override this, in which case the slot and pin returned
387 * depend entirely on the platform code. However, please note that the
388 * PCI standard swizzle is implemented on plug-in cards and Cardbus based
389 * PCI extenders, so it can not be ignored.
379 */ 390 */
380static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin) 391static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin)
381{ 392{
382 struct pci_sys_data *sys = dev->sysdata; 393 struct pci_sys_data *sys = dev->sysdata;
383 int slot = 0, oldpin = *pin; 394 int slot, oldpin = *pin;
384 395
385 if (sys->swizzle) 396 if (sys->swizzle)
386 slot = sys->swizzle(dev, pin); 397 slot = sys->swizzle(dev, pin);
398 else
399 slot = pci_common_swizzle(dev, pin);
387 400
388 if (debug_pci) 401 if (debug_pci)
389 printk("PCI: %s swizzling pin %d => pin %d slot %d\n", 402 printk("PCI: %s swizzling pin %d => pin %d slot %d\n",
@@ -410,7 +423,7 @@ static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
410 return irq; 423 return irq;
411} 424}
412 425
413static void __init pcibios_init_hw(struct hw_pci *hw) 426static void __init pcibios_init_hw(struct hw_pci *hw, struct list_head *head)
414{ 427{
415 struct pci_sys_data *sys = NULL; 428 struct pci_sys_data *sys = NULL;
416 int ret; 429 int ret;
@@ -424,7 +437,6 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
424#ifdef CONFIG_PCI_DOMAINS 437#ifdef CONFIG_PCI_DOMAINS
425 sys->domain = hw->domain; 438 sys->domain = hw->domain;
426#endif 439#endif
427 sys->hw = hw;
428 sys->busnr = busnr; 440 sys->busnr = busnr;
429 sys->swizzle = hw->swizzle; 441 sys->swizzle = hw->swizzle;
430 sys->map_irq = hw->map_irq; 442 sys->map_irq = hw->map_irq;
@@ -440,14 +452,18 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
440 &iomem_resource, sys->mem_offset); 452 &iomem_resource, sys->mem_offset);
441 } 453 }
442 454
443 sys->bus = hw->scan(nr, sys); 455 if (hw->scan)
456 sys->bus = hw->scan(nr, sys);
457 else
458 sys->bus = pci_scan_root_bus(NULL, sys->busnr,
459 hw->ops, sys, &sys->resources);
444 460
445 if (!sys->bus) 461 if (!sys->bus)
446 panic("PCI: unable to scan bus!"); 462 panic("PCI: unable to scan bus!");
447 463
448 busnr = sys->bus->subordinate + 1; 464 busnr = sys->bus->subordinate + 1;
449 465
450 list_add(&sys->node, &hw->buses); 466 list_add(&sys->node, head);
451 } else { 467 } else {
452 kfree(sys); 468 kfree(sys);
453 if (ret < 0) 469 if (ret < 0)
@@ -459,19 +475,18 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
459void __init pci_common_init(struct hw_pci *hw) 475void __init pci_common_init(struct hw_pci *hw)
460{ 476{
461 struct pci_sys_data *sys; 477 struct pci_sys_data *sys;
462 478 LIST_HEAD(head);
463 INIT_LIST_HEAD(&hw->buses);
464 479
465 pci_add_flags(PCI_REASSIGN_ALL_RSRC); 480 pci_add_flags(PCI_REASSIGN_ALL_RSRC);
466 if (hw->preinit) 481 if (hw->preinit)
467 hw->preinit(); 482 hw->preinit();
468 pcibios_init_hw(hw); 483 pcibios_init_hw(hw, &head);
469 if (hw->postinit) 484 if (hw->postinit)
470 hw->postinit(); 485 hw->postinit();
471 486
472 pci_fixup_irqs(pcibios_swizzle, pcibios_map_irq); 487 pci_fixup_irqs(pcibios_swizzle, pcibios_map_irq);
473 488
474 list_for_each_entry(sys, &hw->buses, node) { 489 list_for_each_entry(sys, &head, node) {
475 struct pci_bus *bus = sys->bus; 490 struct pci_bus *bus = sys->bus;
476 491
477 if (!pci_has_flag(PCI_PROBE_ONLY)) { 492 if (!pci_has_flag(PCI_PROBE_ONLY)) {
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 71ccdbfed662..8349d4e97e2b 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -155,10 +155,10 @@ static bool migrate_one_irq(struct irq_desc *desc)
155 } 155 }
156 156
157 c = irq_data_get_irq_chip(d); 157 c = irq_data_get_irq_chip(d);
158 if (c->irq_set_affinity) 158 if (!c->irq_set_affinity)
159 c->irq_set_affinity(d, affinity, true);
160 else
161 pr_debug("IRQ%u: unable to set affinity\n", d->irq); 159 pr_debug("IRQ%u: unable to set affinity\n", d->irq);
160 else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret)
161 cpumask_copy(d->affinity, affinity);
162 162
163 return ret; 163 return ret;
164} 164}
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 80abafb9bf33..9650c143afc1 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -906,27 +906,14 @@ long arch_ptrace(struct task_struct *child, long request,
906 return ret; 906 return ret;
907} 907}
908 908
909#ifdef __ARMEB__
910#define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB
911#else
912#define AUDIT_ARCH_NR AUDIT_ARCH_ARM
913#endif
914
915asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) 909asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
916{ 910{
917 unsigned long ip; 911 unsigned long ip;
918 912
919 /* 913 if (why)
920 * Save IP. IP is used to denote syscall entry/exit:
921 * IP = 0 -> entry, = 1 -> exit
922 */
923 ip = regs->ARM_ip;
924 regs->ARM_ip = why;
925
926 if (!ip)
927 audit_syscall_exit(regs); 914 audit_syscall_exit(regs);
928 else 915 else
929 audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0, 916 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0,
930 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); 917 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
931 918
932 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 919 if (!test_thread_flag(TIF_SYSCALL_TRACE))
@@ -936,6 +923,13 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
936 923
937 current_thread_info()->syscall = scno; 924 current_thread_info()->syscall = scno;
938 925
926 /*
927 * IP is used to denote syscall entry/exit:
928 * IP = 0 -> entry, =1 -> exit
929 */
930 ip = regs->ARM_ip;
931 regs->ARM_ip = why;
932
939 /* the 0x80 provides a way for the tracing parent to distinguish 933 /* the 0x80 provides a way for the tracing parent to distinguish
940 between a syscall stop and SIGTRAP delivery */ 934 between a syscall stop and SIGTRAP delivery */
941 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) 935 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 7cb532fc8aa4..d68d1b694680 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -180,44 +180,23 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame)
180 180
181static int preserve_vfp_context(struct vfp_sigframe __user *frame) 181static int preserve_vfp_context(struct vfp_sigframe __user *frame)
182{ 182{
183 struct thread_info *thread = current_thread_info();
184 struct vfp_hard_struct *h = &thread->vfpstate.hard;
185 const unsigned long magic = VFP_MAGIC; 183 const unsigned long magic = VFP_MAGIC;
186 const unsigned long size = VFP_STORAGE_SIZE; 184 const unsigned long size = VFP_STORAGE_SIZE;
187 int err = 0; 185 int err = 0;
188 186
189 vfp_sync_hwstate(thread);
190 __put_user_error(magic, &frame->magic, err); 187 __put_user_error(magic, &frame->magic, err);
191 __put_user_error(size, &frame->size, err); 188 __put_user_error(size, &frame->size, err);
192 189
193 /* 190 if (err)
194 * Copy the floating point registers. There can be unused 191 return -EFAULT;
195 * registers see asm/hwcap.h for details.
196 */
197 err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs,
198 sizeof(h->fpregs));
199 /*
200 * Copy the status and control register.
201 */
202 __put_user_error(h->fpscr, &frame->ufp.fpscr, err);
203
204 /*
205 * Copy the exception registers.
206 */
207 __put_user_error(h->fpexc, &frame->ufp_exc.fpexc, err);
208 __put_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
209 __put_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
210 192
211 return err ? -EFAULT : 0; 193 return vfp_preserve_user_clear_hwstate(&frame->ufp, &frame->ufp_exc);
212} 194}
213 195
214static int restore_vfp_context(struct vfp_sigframe __user *frame) 196static int restore_vfp_context(struct vfp_sigframe __user *frame)
215{ 197{
216 struct thread_info *thread = current_thread_info();
217 struct vfp_hard_struct *h = &thread->vfpstate.hard;
218 unsigned long magic; 198 unsigned long magic;
219 unsigned long size; 199 unsigned long size;
220 unsigned long fpexc;
221 int err = 0; 200 int err = 0;
222 201
223 __get_user_error(magic, &frame->magic, err); 202 __get_user_error(magic, &frame->magic, err);
@@ -228,33 +207,7 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame)
228 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) 207 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
229 return -EINVAL; 208 return -EINVAL;
230 209
231 vfp_flush_hwstate(thread); 210 return vfp_restore_user_hwstate(&frame->ufp, &frame->ufp_exc);
232
233 /*
234 * Copy the floating point registers. There can be unused
235 * registers see asm/hwcap.h for details.
236 */
237 err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs,
238 sizeof(h->fpregs));
239 /*
240 * Copy the status and control register.
241 */
242 __get_user_error(h->fpscr, &frame->ufp.fpscr, err);
243
244 /*
245 * Sanitise and restore the exception registers.
246 */
247 __get_user_error(fpexc, &frame->ufp_exc.fpexc, err);
248 /* Ensure the VFP is enabled. */
249 fpexc |= FPEXC_EN;
250 /* Ensure FPINST2 is invalid and the exception flag is cleared. */
251 fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
252 h->fpexc = fpexc;
253
254 __get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
255 __get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
256
257 return err ? -EFAULT : 0;
258} 211}
259 212
260#endif 213#endif
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 11c4148b8abb..cf58558ef4b9 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -251,8 +251,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
251 struct mm_struct *mm = &init_mm; 251 struct mm_struct *mm = &init_mm;
252 unsigned int cpu = smp_processor_id(); 252 unsigned int cpu = smp_processor_id();
253 253
254 printk("CPU%u: Booted secondary processor\n", cpu);
255
256 /* 254 /*
257 * All kernel threads share the same mm context; grab a 255 * All kernel threads share the same mm context; grab a
258 * reference and switch to it. 256 * reference and switch to it.
@@ -264,6 +262,8 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
264 enter_lazy_tlb(mm, current); 262 enter_lazy_tlb(mm, current);
265 local_flush_tlb_all(); 263 local_flush_tlb_all();
266 264
265 printk("CPU%u: Booted secondary processor\n", cpu);
266
267 cpu_init(); 267 cpu_init();
268 preempt_disable(); 268 preempt_disable();
269 trace_hardirqs_off(); 269 trace_hardirqs_off();
@@ -513,10 +513,6 @@ static void ipi_cpu_stop(unsigned int cpu)
513 local_fiq_disable(); 513 local_fiq_disable();
514 local_irq_disable(); 514 local_irq_disable();
515 515
516#ifdef CONFIG_HOTPLUG_CPU
517 platform_cpu_kill(cpu);
518#endif
519
520 while (1) 516 while (1)
521 cpu_relax(); 517 cpu_relax();
522} 518}
@@ -579,17 +575,25 @@ void smp_send_reschedule(int cpu)
579 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); 575 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
580} 576}
581 577
578#ifdef CONFIG_HOTPLUG_CPU
579static void smp_kill_cpus(cpumask_t *mask)
580{
581 unsigned int cpu;
582 for_each_cpu(cpu, mask)
583 platform_cpu_kill(cpu);
584}
585#else
586static void smp_kill_cpus(cpumask_t *mask) { }
587#endif
588
582void smp_send_stop(void) 589void smp_send_stop(void)
583{ 590{
584 unsigned long timeout; 591 unsigned long timeout;
592 struct cpumask mask;
585 593
586 if (num_online_cpus() > 1) { 594 cpumask_copy(&mask, cpu_online_mask);
587 struct cpumask mask; 595 cpumask_clear_cpu(smp_processor_id(), &mask);
588 cpumask_copy(&mask, cpu_online_mask); 596 smp_cross_call(&mask, IPI_CPU_STOP);
589 cpumask_clear_cpu(smp_processor_id(), &mask);
590
591 smp_cross_call(&mask, IPI_CPU_STOP);
592 }
593 597
594 /* Wait up to one second for other CPUs to stop */ 598 /* Wait up to one second for other CPUs to stop */
595 timeout = USEC_PER_SEC; 599 timeout = USEC_PER_SEC;
@@ -598,6 +602,8 @@ void smp_send_stop(void)
598 602
599 if (num_online_cpus() > 1) 603 if (num_online_cpus() > 1)
600 pr_warning("SMP: failed to stop secondary CPUs\n"); 604 pr_warning("SMP: failed to stop secondary CPUs\n");
605
606 smp_kill_cpus(&mask);
601} 607}
602 608
603/* 609/*
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c
index d2b177905cdb..76cbb055dd05 100644
--- a/arch/arm/kernel/sys_arm.c
+++ b/arch/arm/kernel/sys_arm.c
@@ -115,7 +115,7 @@ int kernel_execve(const char *filename,
115 "Ir" (THREAD_START_SP - sizeof(regs)), 115 "Ir" (THREAD_START_SP - sizeof(regs)),
116 "r" (&regs), 116 "r" (&regs),
117 "Ir" (sizeof(regs)) 117 "Ir" (sizeof(regs))
118 : "r0", "r1", "r2", "r3", "ip", "lr", "memory"); 118 : "r0", "r1", "r2", "r3", "r8", "r9", "ip", "lr", "memory");
119 119
120 out: 120 out:
121 return ret; 121 return ret;
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 79d001f831e0..311328314163 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -166,12 +166,6 @@ static struct pci_ops cns3xxx_pcie_ops = {
166 .write = cns3xxx_pci_write_config, 166 .write = cns3xxx_pci_write_config,
167}; 167};
168 168
169static struct pci_bus *cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys)
170{
171 return pci_scan_root_bus(NULL, sys->busnr, &cns3xxx_pcie_ops, sys,
172 &sys->resources);
173}
174
175static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 169static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
176{ 170{
177 struct cns3xxx_pcie *cnspci = pdev_to_cnspci(dev); 171 struct cns3xxx_pcie *cnspci = pdev_to_cnspci(dev);
@@ -221,10 +215,9 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = {
221 .irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, }, 215 .irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, },
222 .hw_pci = { 216 .hw_pci = {
223 .domain = 0, 217 .domain = 0,
224 .swizzle = pci_std_swizzle,
225 .nr_controllers = 1, 218 .nr_controllers = 1,
219 .ops = &cns3xxx_pcie_ops,
226 .setup = cns3xxx_pci_setup, 220 .setup = cns3xxx_pci_setup,
227 .scan = cns3xxx_pci_scan_bus,
228 .map_irq = cns3xxx_pcie_map_irq, 221 .map_irq = cns3xxx_pcie_map_irq,
229 }, 222 },
230 }, 223 },
@@ -264,10 +257,9 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = {
264 .irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, }, 257 .irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, },
265 .hw_pci = { 258 .hw_pci = {
266 .domain = 1, 259 .domain = 1,
267 .swizzle = pci_std_swizzle,
268 .nr_controllers = 1, 260 .nr_controllers = 1,
261 .ops = &cns3xxx_pcie_ops,
269 .setup = cns3xxx_pci_setup, 262 .setup = cns3xxx_pci_setup,
270 .scan = cns3xxx_pci_scan_bus,
271 .map_irq = cns3xxx_pcie_map_irq, 263 .map_irq = cns3xxx_pcie_map_irq,
272 }, 264 },
273 }, 265 },
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 48a032005ea3..47921b0cdc65 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -43,6 +43,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
43 return 0; 43 return 0;
44 44
45 pp = &pcie_port[nr]; 45 pp = &pcie_port[nr];
46 sys->private_data = pp;
46 pp->root_bus_nr = sys->busnr; 47 pp->root_bus_nr = sys->busnr;
47 48
48 /* 49 /*
@@ -93,19 +94,6 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
93 return 1; 94 return 1;
94} 95}
95 96
96static struct pcie_port *bus_to_port(int bus)
97{
98 int i;
99
100 for (i = num_pcie_ports - 1; i >= 0; i--) {
101 int rbus = pcie_port[i].root_bus_nr;
102 if (rbus != -1 && rbus <= bus)
103 break;
104 }
105
106 return i >= 0 ? pcie_port + i : NULL;
107}
108
109static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) 97static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)
110{ 98{
111 /* 99 /*
@@ -121,7 +109,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)
121static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, 109static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
122 int size, u32 *val) 110 int size, u32 *val)
123{ 111{
124 struct pcie_port *pp = bus_to_port(bus->number); 112 struct pci_sys_data *sys = bus->sysdata;
113 struct pcie_port *pp = sys->private_data;
125 unsigned long flags; 114 unsigned long flags;
126 int ret; 115 int ret;
127 116
@@ -140,7 +129,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
140static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, 129static int pcie_wr_conf(struct pci_bus *bus, u32 devfn,
141 int where, int size, u32 val) 130 int where, int size, u32 val)
142{ 131{
143 struct pcie_port *pp = bus_to_port(bus->number); 132 struct pci_sys_data *sys = bus->sysdata;
133 struct pcie_port *pp = sys->private_data;
144 unsigned long flags; 134 unsigned long flags;
145 int ret; 135 int ret;
146 136
@@ -194,14 +184,14 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
194 184
195static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 185static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
196{ 186{
197 struct pcie_port *pp = bus_to_port(dev->bus->number); 187 struct pci_sys_data *sys = dev->sysdata;
188 struct pcie_port *pp = sys->private_data;
198 189
199 return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0; 190 return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;
200} 191}
201 192
202static struct hw_pci dove_pci __initdata = { 193static struct hw_pci dove_pci __initdata = {
203 .nr_controllers = 2, 194 .nr_controllers = 2,
204 .swizzle = pci_std_swizzle,
205 .setup = dove_pcie_setup, 195 .setup = dove_pcie_setup,
206 .scan = dove_pcie_scan_bus, 196 .scan = dove_pcie_scan_bus,
207 .map_irq = dove_pcie_map_irq, 197 .map_irq = dove_pcie_map_irq,
diff --git a/arch/arm/mach-footbridge/cats-pci.c b/arch/arm/mach-footbridge/cats-pci.c
index 32321f66dec4..5cec2567c9c5 100644
--- a/arch/arm/mach-footbridge/cats-pci.c
+++ b/arch/arm/mach-footbridge/cats-pci.c
@@ -16,6 +16,11 @@
16/* cats host-specific stuff */ 16/* cats host-specific stuff */
17static int irqmap_cats[] __initdata = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 }; 17static int irqmap_cats[] __initdata = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 };
18 18
19static u8 cats_no_swizzle(struct pci_dev *dev, u8 *pin)
20{
21 return 0;
22}
23
19static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 24static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
20{ 25{
21 if (dev->irq >= 255) 26 if (dev->irq >= 255)
@@ -39,11 +44,11 @@ static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
39 * cards being used (ie, pci-pci bridge based cards)? 44 * cards being used (ie, pci-pci bridge based cards)?
40 */ 45 */
41static struct hw_pci cats_pci __initdata = { 46static struct hw_pci cats_pci __initdata = {
42 .swizzle = NULL, 47 .swizzle = cats_no_swizzle,
43 .map_irq = cats_map_irq, 48 .map_irq = cats_map_irq,
44 .nr_controllers = 1, 49 .nr_controllers = 1,
50 .ops = &dc21285_ops,
45 .setup = dc21285_setup, 51 .setup = dc21285_setup,
46 .scan = dc21285_scan_bus,
47 .preinit = dc21285_preinit, 52 .preinit = dc21285_preinit,
48 .postinit = dc21285_postinit, 53 .postinit = dc21285_postinit,
49}; 54};
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index e17e11de4f5e..9d62e3381024 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -129,7 +129,7 @@ dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where,
129 return PCIBIOS_SUCCESSFUL; 129 return PCIBIOS_SUCCESSFUL;
130} 130}
131 131
132static struct pci_ops dc21285_ops = { 132struct pci_ops dc21285_ops = {
133 .read = dc21285_read_config, 133 .read = dc21285_read_config,
134 .write = dc21285_write_config, 134 .write = dc21285_write_config,
135}; 135};
@@ -284,11 +284,6 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
284 return 1; 284 return 1;
285} 285}
286 286
287struct pci_bus * __init dc21285_scan_bus(int nr, struct pci_sys_data *sys)
288{
289 return pci_scan_root_bus(NULL, 0, &dc21285_ops, sys, &sys->resources);
290}
291
292#define dc21285_request_irq(_a, _b, _c, _d, _e) \ 287#define dc21285_request_irq(_a, _b, _c, _d, _e) \
293 WARN_ON(request_irq(_a, _b, _c, _d, _e) < 0) 288 WARN_ON(request_irq(_a, _b, _c, _d, _e) < 0)
294 289
diff --git a/arch/arm/mach-footbridge/ebsa285-pci.c b/arch/arm/mach-footbridge/ebsa285-pci.c
index 511c673ffa9d..fd12d8a36dc5 100644
--- a/arch/arm/mach-footbridge/ebsa285-pci.c
+++ b/arch/arm/mach-footbridge/ebsa285-pci.c
@@ -29,11 +29,10 @@ static int __init ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
29} 29}
30 30
31static struct hw_pci ebsa285_pci __initdata = { 31static struct hw_pci ebsa285_pci __initdata = {
32 .swizzle = pci_std_swizzle,
33 .map_irq = ebsa285_map_irq, 32 .map_irq = ebsa285_map_irq,
34 .nr_controllers = 1, 33 .nr_controllers = 1,
34 .ops = &dc21285_ops,
35 .setup = dc21285_setup, 35 .setup = dc21285_setup,
36 .scan = dc21285_scan_bus,
37 .preinit = dc21285_preinit, 36 .preinit = dc21285_preinit,
38 .postinit = dc21285_postinit, 37 .postinit = dc21285_postinit,
39}; 38};
diff --git a/arch/arm/mach-footbridge/netwinder-pci.c b/arch/arm/mach-footbridge/netwinder-pci.c
index 62187610e17e..0fba5134e4fe 100644
--- a/arch/arm/mach-footbridge/netwinder-pci.c
+++ b/arch/arm/mach-footbridge/netwinder-pci.c
@@ -43,11 +43,10 @@ static int __init netwinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
43} 43}
44 44
45static struct hw_pci netwinder_pci __initdata = { 45static struct hw_pci netwinder_pci __initdata = {
46 .swizzle = pci_std_swizzle,
47 .map_irq = netwinder_map_irq, 46 .map_irq = netwinder_map_irq,
48 .nr_controllers = 1, 47 .nr_controllers = 1,
48 .ops = &dc21285_ops,
49 .setup = dc21285_setup, 49 .setup = dc21285_setup,
50 .scan = dc21285_scan_bus,
51 .preinit = dc21285_preinit, 50 .preinit = dc21285_preinit,
52 .postinit = dc21285_postinit, 51 .postinit = dc21285_postinit,
53}; 52};
diff --git a/arch/arm/mach-footbridge/personal-pci.c b/arch/arm/mach-footbridge/personal-pci.c
index aeb651d914a6..5c9ee54613b2 100644
--- a/arch/arm/mach-footbridge/personal-pci.c
+++ b/arch/arm/mach-footbridge/personal-pci.c
@@ -41,8 +41,8 @@ static int __init personal_server_map_irq(const struct pci_dev *dev, u8 slot,
41static struct hw_pci personal_server_pci __initdata = { 41static struct hw_pci personal_server_pci __initdata = {
42 .map_irq = personal_server_map_irq, 42 .map_irq = personal_server_map_irq,
43 .nr_controllers = 1, 43 .nr_controllers = 1,
44 .ops = &dc21285_ops,
44 .setup = dc21285_setup, 45 .setup = dc21285_setup,
45 .scan = dc21285_scan_bus,
46 .preinit = dc21285_preinit, 46 .preinit = dc21285_preinit,
47 .postinit = dc21285_postinit, 47 .postinit = dc21285_postinit,
48}; 48};
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 3e538da6cb1f..e428f3ab15c7 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -398,24 +398,16 @@ static int impd1_probe(struct lm_device *dev)
398 struct impd1_device *idev = impd1_devs + i; 398 struct impd1_device *idev = impd1_devs + i;
399 struct amba_device *d; 399 struct amba_device *d;
400 unsigned long pc_base; 400 unsigned long pc_base;
401 char devname[32];
401 402
402 pc_base = dev->resource.start + idev->offset; 403 pc_base = dev->resource.start + idev->offset;
403 404 snprintf(devname, 32, "lm%x:%5.5lx", dev->id, idev->offset >> 12);
404 d = amba_device_alloc(NULL, pc_base, SZ_4K); 405 d = amba_ahb_device_add(&dev->dev, devname, pc_base, SZ_4K,
405 if (!d) 406 dev->irq, dev->irq,
407 idev->platform_data, idev->id);
408 if (IS_ERR(d)) {
409 dev_err(&dev->dev, "unable to register device: %ld\n", PTR_ERR(d));
406 continue; 410 continue;
407
408 dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12);
409 d->dev.parent = &dev->dev;
410 d->irq[0] = dev->irq;
411 d->irq[1] = dev->irq;
412 d->periphid = idev->id;
413 d->dev.platform_data = idev->platform_data;
414
415 ret = amba_device_add(d, &dev->resource);
416 if (ret) {
417 dev_err(&d->dev, "unable to register device: %d\n", ret);
418 amba_device_put(d);
419 } 411 }
420 } 412 }
421 413
diff --git a/arch/arm/mach-integrator/include/mach/entry-macro.S b/arch/arm/mach-integrator/include/mach/entry-macro.S
deleted file mode 100644
index 5cc7b85ad9df..000000000000
--- a/arch/arm/mach-integrator/include/mach/entry-macro.S
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * arch/arm/mach-integrator/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for Integrator platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#include <mach/hardware.h>
11#include <mach/platform.h>
12#include <mach/irqs.h>
13
14 .macro get_irqnr_preamble, base, tmp
15 .endm
16
17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
18/* FIXME: should not be using soo many LDRs here */
19 ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE)
20 mov \irqnr, #IRQ_PIC_START
21 ldr \irqstat, [\base, #IRQ_STATUS] @ get masked status
22 ldr \base, =IO_ADDRESS(INTEGRATOR_HDR_BASE)
23 teq \irqstat, #0
24 ldreq \irqstat, [\base, #(INTEGRATOR_HDR_IC_OFFSET+IRQ_STATUS)]
25 moveq \irqnr, #IRQ_CIC_START
26
271001: tst \irqstat, #15
28 bne 1002f
29 add \irqnr, \irqnr, #4
30 movs \irqstat, \irqstat, lsr #4
31 bne 1001b
321002: tst \irqstat, #1
33 bne 1003f
34 add \irqnr, \irqnr, #1
35 movs \irqstat, \irqstat, lsr #1
36 bne 1002b
371003: /* EQ will be set if no irqs pending */
38 .endm
39
diff --git a/arch/arm/mach-integrator/include/mach/irqs.h b/arch/arm/mach-integrator/include/mach/irqs.h
index a19a1a2fcf6b..7371018455d2 100644
--- a/arch/arm/mach-integrator/include/mach/irqs.h
+++ b/arch/arm/mach-integrator/include/mach/irqs.h
@@ -22,37 +22,37 @@
22/* 22/*
23 * Interrupt numbers 23 * Interrupt numbers
24 */ 24 */
25#define IRQ_PIC_START 0 25#define IRQ_PIC_START 1
26#define IRQ_SOFTINT 0 26#define IRQ_SOFTINT 1
27#define IRQ_UARTINT0 1 27#define IRQ_UARTINT0 2
28#define IRQ_UARTINT1 2 28#define IRQ_UARTINT1 3
29#define IRQ_KMIINT0 3 29#define IRQ_KMIINT0 4
30#define IRQ_KMIINT1 4 30#define IRQ_KMIINT1 5
31#define IRQ_TIMERINT0 5 31#define IRQ_TIMERINT0 6
32#define IRQ_TIMERINT1 6 32#define IRQ_TIMERINT1 7
33#define IRQ_TIMERINT2 7 33#define IRQ_TIMERINT2 8
34#define IRQ_RTCINT 8 34#define IRQ_RTCINT 9
35#define IRQ_AP_EXPINT0 9 35#define IRQ_AP_EXPINT0 10
36#define IRQ_AP_EXPINT1 10 36#define IRQ_AP_EXPINT1 11
37#define IRQ_AP_EXPINT2 11 37#define IRQ_AP_EXPINT2 12
38#define IRQ_AP_EXPINT3 12 38#define IRQ_AP_EXPINT3 13
39#define IRQ_AP_PCIINT0 13 39#define IRQ_AP_PCIINT0 14
40#define IRQ_AP_PCIINT1 14 40#define IRQ_AP_PCIINT1 15
41#define IRQ_AP_PCIINT2 15 41#define IRQ_AP_PCIINT2 16
42#define IRQ_AP_PCIINT3 16 42#define IRQ_AP_PCIINT3 17
43#define IRQ_AP_V3INT 17 43#define IRQ_AP_V3INT 18
44#define IRQ_AP_CPINT0 18 44#define IRQ_AP_CPINT0 19
45#define IRQ_AP_CPINT1 19 45#define IRQ_AP_CPINT1 20
46#define IRQ_AP_LBUSTIMEOUT 20 46#define IRQ_AP_LBUSTIMEOUT 21
47#define IRQ_AP_APCINT 21 47#define IRQ_AP_APCINT 22
48#define IRQ_CP_CLCDCINT 22 48#define IRQ_CP_CLCDCINT 23
49#define IRQ_CP_MMCIINT0 23 49#define IRQ_CP_MMCIINT0 24
50#define IRQ_CP_MMCIINT1 24 50#define IRQ_CP_MMCIINT1 25
51#define IRQ_CP_AACIINT 25 51#define IRQ_CP_AACIINT 26
52#define IRQ_CP_CPPLDINT 26 52#define IRQ_CP_CPPLDINT 27
53#define IRQ_CP_ETHINT 27 53#define IRQ_CP_ETHINT 28
54#define IRQ_CP_TSPENINT 28 54#define IRQ_CP_TSPENINT 29
55#define IRQ_PIC_END 31 55#define IRQ_PIC_END 29
56 56
57#define IRQ_CIC_START 32 57#define IRQ_CIC_START 32
58#define IRQ_CM_SOFTINT 32 58#define IRQ_CM_SOFTINT 32
@@ -80,4 +80,3 @@
80 80
81#define NR_IRQS_INTEGRATOR_AP 34 81#define NR_IRQS_INTEGRATOR_AP 34
82#define NR_IRQS_INTEGRATOR_CP 47 82#define NR_IRQS_INTEGRATOR_CP 47
83
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 871f148ffd72..c857501c5783 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -162,12 +162,6 @@ static void __init ap_map_io(void)
162 162
163#define INTEGRATOR_SC_VALID_INT 0x003fffff 163#define INTEGRATOR_SC_VALID_INT 0x003fffff
164 164
165static struct fpga_irq_data sc_irq_data = {
166 .base = VA_IC_BASE,
167 .irq_start = 0,
168 .chip.name = "SC",
169};
170
171static void __init ap_init_irq(void) 165static void __init ap_init_irq(void)
172{ 166{
173 /* Disable all interrupts initially. */ 167 /* Disable all interrupts initially. */
@@ -178,7 +172,8 @@ static void __init ap_init_irq(void)
178 writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR); 172 writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
179 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR); 173 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
180 174
181 fpga_irq_init(-1, INTEGRATOR_SC_VALID_INT, &sc_irq_data); 175 fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,
176 -1, INTEGRATOR_SC_VALID_INT, NULL);
182} 177}
183 178
184#ifdef CONFIG_PM 179#ifdef CONFIG_PM
@@ -478,6 +473,7 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
478 .nr_irqs = NR_IRQS_INTEGRATOR_AP, 473 .nr_irqs = NR_IRQS_INTEGRATOR_AP,
479 .init_early = integrator_init_early, 474 .init_early = integrator_init_early,
480 .init_irq = ap_init_irq, 475 .init_irq = ap_init_irq,
476 .handle_irq = fpga_handle_irq,
481 .timer = &ap_timer, 477 .timer = &ap_timer,
482 .init_machine = ap_init, 478 .init_machine = ap_init,
483 .restart = integrator_restart, 479 .restart = integrator_restart,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 48a115a91d9d..a56c53608939 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -143,30 +143,14 @@ static void __init intcp_map_io(void)
143 iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc)); 143 iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));
144} 144}
145 145
146static struct fpga_irq_data cic_irq_data = {
147 .base = INTCP_VA_CIC_BASE,
148 .irq_start = IRQ_CIC_START,
149 .chip.name = "CIC",
150};
151
152static struct fpga_irq_data pic_irq_data = {
153 .base = INTCP_VA_PIC_BASE,
154 .irq_start = IRQ_PIC_START,
155 .chip.name = "PIC",
156};
157
158static struct fpga_irq_data sic_irq_data = {
159 .base = INTCP_VA_SIC_BASE,
160 .irq_start = IRQ_SIC_START,
161 .chip.name = "SIC",
162};
163
164static void __init intcp_init_irq(void) 146static void __init intcp_init_irq(void)
165{ 147{
166 u32 pic_mask, sic_mask; 148 u32 pic_mask, cic_mask, sic_mask;
167 149
150 /* These masks are for the HW IRQ registers */
168 pic_mask = ~((~0u) << (11 - IRQ_PIC_START)); 151 pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
169 pic_mask |= (~((~0u) << (29 - 22))) << 22; 152 pic_mask |= (~((~0u) << (29 - 22))) << 22;
153 cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
170 sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START)); 154 sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
171 155
172 /* 156 /*
@@ -179,12 +163,14 @@ static void __init intcp_init_irq(void)
179 writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR); 163 writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
180 writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR); 164 writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
181 165
182 fpga_irq_init(-1, pic_mask, &pic_irq_data); 166 fpga_irq_init(INTCP_VA_PIC_BASE, "PIC", IRQ_PIC_START,
167 -1, pic_mask, NULL);
183 168
184 fpga_irq_init(-1, ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START)), 169 fpga_irq_init(INTCP_VA_CIC_BASE, "CIC", IRQ_CIC_START,
185 &cic_irq_data); 170 -1, cic_mask, NULL);
186 171
187 fpga_irq_init(IRQ_CP_CPPLDINT, sic_mask, &sic_irq_data); 172 fpga_irq_init(INTCP_VA_SIC_BASE, "SIC", IRQ_SIC_START,
173 IRQ_CP_CPPLDINT, sic_mask, NULL);
188} 174}
189 175
190/* 176/*
@@ -467,6 +453,7 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
467 .nr_irqs = NR_IRQS_INTEGRATOR_CP, 453 .nr_irqs = NR_IRQS_INTEGRATOR_CP,
468 .init_early = intcp_init_early, 454 .init_early = intcp_init_early,
469 .init_irq = intcp_init_irq, 455 .init_irq = intcp_init_irq,
456 .handle_irq = fpga_handle_irq,
470 .timer = &cp_timer, 457 .timer = &cp_timer,
471 .init_machine = intcp_init, 458 .init_machine = intcp_init,
472 .restart = integrator_restart, 459 .restart = integrator_restart,
diff --git a/arch/arm/mach-integrator/pci.c b/arch/arm/mach-integrator/pci.c
index f1ca9c122861..6c1667e728f5 100644
--- a/arch/arm/mach-integrator/pci.c
+++ b/arch/arm/mach-integrator/pci.c
@@ -70,21 +70,10 @@
70 */ 70 */
71static u8 __init integrator_swizzle(struct pci_dev *dev, u8 *pinp) 71static u8 __init integrator_swizzle(struct pci_dev *dev, u8 *pinp)
72{ 72{
73 int pin = *pinp; 73 if (*pinp == 0)
74 *pinp = 1;
74 75
75 if (pin == 0) 76 return pci_common_swizzle(dev, pinp);
76 pin = 1;
77
78 while (dev->bus->self) {
79 pin = pci_swizzle_interrupt_pin(dev, pin);
80 /*
81 * move up the chain of bridges, swizzling as we go.
82 */
83 dev = dev->bus->self;
84 }
85 *pinp = pin;
86
87 return PCI_SLOT(dev->devfn);
88} 77}
89 78
90static int irq_tab[4] __initdata = { 79static int irq_tab[4] __initdata = {
@@ -109,7 +98,7 @@ static struct hw_pci integrator_pci __initdata = {
109 .map_irq = integrator_map_irq, 98 .map_irq = integrator_map_irq,
110 .setup = pci_v3_setup, 99 .setup = pci_v3_setup,
111 .nr_controllers = 1, 100 .nr_controllers = 1,
112 .scan = pci_v3_scan_bus, 101 .ops = &pci_v3_ops,
113 .preinit = pci_v3_preinit, 102 .preinit = pci_v3_preinit,
114 .postinit = pci_v3_postinit, 103 .postinit = pci_v3_postinit,
115}; 104};
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 67e6f9a9d1a0..b866880e82ac 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -340,7 +340,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where,
340 return PCIBIOS_SUCCESSFUL; 340 return PCIBIOS_SUCCESSFUL;
341} 341}
342 342
343static struct pci_ops pci_v3_ops = { 343struct pci_ops pci_v3_ops = {
344 .read = v3_read_config, 344 .read = v3_read_config,
345 .write = v3_write_config, 345 .write = v3_write_config,
346}; 346};
@@ -488,12 +488,6 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
488 return ret; 488 return ret;
489} 489}
490 490
491struct pci_bus * __init pci_v3_scan_bus(int nr, struct pci_sys_data *sys)
492{
493 return pci_scan_root_bus(NULL, sys->busnr, &pci_v3_ops, sys,
494 &sys->resources);
495}
496
497/* 491/*
498 * V3_LB_BASE? - local bus address 492 * V3_LB_BASE? - local bus address
499 * V3_LB_MAP? - pci bus address 493 * V3_LB_MAP? - pci bus address
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 5c96b73e6964..e3f3e7daa79e 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -54,7 +54,6 @@ iq81340mc_pcix_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin)
54} 54}
55 55
56static struct hw_pci iq81340mc_pci __initdata = { 56static struct hw_pci iq81340mc_pci __initdata = {
57 .swizzle = pci_std_swizzle,
58 .nr_controllers = 0, 57 .nr_controllers = 0,
59 .setup = iop13xx_pci_setup, 58 .setup = iop13xx_pci_setup,
60 .map_irq = iq81340mc_pcix_map_irq, 59 .map_irq = iq81340mc_pcix_map_irq,
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index aa4dd750135a..060cddde2fd4 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -56,7 +56,6 @@ iq81340sc_atux_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
56} 56}
57 57
58static struct hw_pci iq81340sc_pci __initdata = { 58static struct hw_pci iq81340sc_pci __initdata = {
59 .swizzle = pci_std_swizzle,
60 .nr_controllers = 0, 59 .nr_controllers = 0,
61 .setup = iop13xx_pci_setup, 60 .setup = iop13xx_pci_setup,
62 .scan = iop13xx_scan_bus, 61 .scan = iop13xx_scan_bus,
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 24069e03fdc1..9f369f09c29d 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -103,11 +103,10 @@ em7210_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
103} 103}
104 104
105static struct hw_pci em7210_pci __initdata = { 105static struct hw_pci em7210_pci __initdata = {
106 .swizzle = pci_std_swizzle,
107 .nr_controllers = 1, 106 .nr_controllers = 1,
107 .ops = &iop3xx_ops,
108 .setup = iop3xx_pci_setup, 108 .setup = iop3xx_pci_setup,
109 .preinit = iop3xx_pci_preinit, 109 .preinit = iop3xx_pci_preinit,
110 .scan = iop3xx_pci_scan_bus,
111 .map_irq = em7210_pci_map_irq, 110 .map_irq = em7210_pci_map_irq,
112}; 111};
113 112
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index 204e1d1cd766..c15a100ba779 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -96,11 +96,10 @@ glantank_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
96} 96}
97 97
98static struct hw_pci glantank_pci __initdata = { 98static struct hw_pci glantank_pci __initdata = {
99 .swizzle = pci_std_swizzle,
100 .nr_controllers = 1, 99 .nr_controllers = 1,
100 .ops = &iop3xx_ops,
101 .setup = iop3xx_pci_setup, 101 .setup = iop3xx_pci_setup,
102 .preinit = iop3xx_pci_preinit, 102 .preinit = iop3xx_pci_preinit,
103 .scan = iop3xx_pci_scan_bus,
104 .map_irq = glantank_pci_map_irq, 103 .map_irq = glantank_pci_map_irq,
105}; 104};
106 105
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index 3eb642af1cdc..ddd1c7ecfe57 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -130,11 +130,10 @@ ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
130} 130}
131 131
132static struct hw_pci ep80219_pci __initdata = { 132static struct hw_pci ep80219_pci __initdata = {
133 .swizzle = pci_std_swizzle,
134 .nr_controllers = 1, 133 .nr_controllers = 1,
134 .ops = &iop3xx_ops,
135 .setup = iop3xx_pci_setup, 135 .setup = iop3xx_pci_setup,
136 .preinit = iop3xx_pci_preinit, 136 .preinit = iop3xx_pci_preinit,
137 .scan = iop3xx_pci_scan_bus,
138 .map_irq = ep80219_pci_map_irq, 137 .map_irq = ep80219_pci_map_irq,
139}; 138};
140 139
@@ -166,11 +165,10 @@ iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
166} 165}
167 166
168static struct hw_pci iq31244_pci __initdata = { 167static struct hw_pci iq31244_pci __initdata = {
169 .swizzle = pci_std_swizzle,
170 .nr_controllers = 1, 168 .nr_controllers = 1,
169 .ops = &iop3xx_ops,
171 .setup = iop3xx_pci_setup, 170 .setup = iop3xx_pci_setup,
172 .preinit = iop3xx_pci_preinit, 171 .preinit = iop3xx_pci_preinit,
173 .scan = iop3xx_pci_scan_bus,
174 .map_irq = iq31244_pci_map_irq, 172 .map_irq = iq31244_pci_map_irq,
175}; 173};
176 174
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 2ec724b58a2c..bf155e6a3b45 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -101,11 +101,10 @@ iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
101} 101}
102 102
103static struct hw_pci iq80321_pci __initdata = { 103static struct hw_pci iq80321_pci __initdata = {
104 .swizzle = pci_std_swizzle,
105 .nr_controllers = 1, 104 .nr_controllers = 1,
105 .ops = &iop3xx_ops,
106 .setup = iop3xx_pci_setup, 106 .setup = iop3xx_pci_setup,
107 .preinit = iop3xx_pci_preinit_cond, 107 .preinit = iop3xx_pci_preinit_cond,
108 .scan = iop3xx_pci_scan_bus,
109 .map_irq = iq80321_pci_map_irq, 108 .map_irq = iq80321_pci_map_irq,
110}; 109};
111 110
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 6b6d55912444..5a7ae91e8849 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -114,11 +114,10 @@ n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
114} 114}
115 115
116static struct hw_pci n2100_pci __initdata = { 116static struct hw_pci n2100_pci __initdata = {
117 .swizzle = pci_std_swizzle,
118 .nr_controllers = 1, 117 .nr_controllers = 1,
118 .ops = &iop3xx_ops,
119 .setup = iop3xx_pci_setup, 119 .setup = iop3xx_pci_setup,
120 .preinit = iop3xx_pci_preinit, 120 .preinit = iop3xx_pci_preinit,
121 .scan = iop3xx_pci_scan_bus,
122 .map_irq = n2100_pci_map_irq, 121 .map_irq = n2100_pci_map_irq,
123}; 122};
124 123
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index abce934f3816..e74a7debe793 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -84,11 +84,10 @@ iq80331_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
84} 84}
85 85
86static struct hw_pci iq80331_pci __initdata = { 86static struct hw_pci iq80331_pci __initdata = {
87 .swizzle = pci_std_swizzle,
88 .nr_controllers = 1, 87 .nr_controllers = 1,
88 .ops = &iop3xx_ops,
89 .setup = iop3xx_pci_setup, 89 .setup = iop3xx_pci_setup,
90 .preinit = iop3xx_pci_preinit_cond, 90 .preinit = iop3xx_pci_preinit_cond,
91 .scan = iop3xx_pci_scan_bus,
92 .map_irq = iq80331_pci_map_irq, 91 .map_irq = iq80331_pci_map_irq,
93}; 92};
94 93
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 7513559e25bb..e2f5beece6e8 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -84,11 +84,10 @@ iq80332_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
84} 84}
85 85
86static struct hw_pci iq80332_pci __initdata = { 86static struct hw_pci iq80332_pci __initdata = {
87 .swizzle = pci_std_swizzle,
88 .nr_controllers = 1, 87 .nr_controllers = 1,
88 .ops = &iop3xx_ops,
89 .setup = iop3xx_pci_setup, 89 .setup = iop3xx_pci_setup,
90 .preinit = iop3xx_pci_preinit_cond, 90 .preinit = iop3xx_pci_preinit_cond,
91 .scan = iop3xx_pci_scan_bus,
92 .map_irq = iq80332_pci_map_irq, 91 .map_irq = iq80332_pci_map_irq,
93}; 92};
94 93
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index 4867f408617c..73df2f688813 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -141,13 +141,6 @@ static struct pci_ops enp2611_pci_ops = {
141 .write = enp2611_pci_write_config 141 .write = enp2611_pci_write_config
142}; 142};
143 143
144static struct pci_bus * __init enp2611_pci_scan_bus(int nr,
145 struct pci_sys_data *sys)
146{
147 return pci_scan_root_bus(NULL, sys->busnr, &enp2611_pci_ops, sys,
148 &sys->resources);
149}
150
151static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot, 144static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot,
152 u8 pin) 145 u8 pin)
153{ 146{
@@ -180,9 +173,9 @@ static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot,
180 173
181struct hw_pci enp2611_pci __initdata = { 174struct hw_pci enp2611_pci __initdata = {
182 .nr_controllers = 1, 175 .nr_controllers = 1,
176 .ops = &enp2611_pci_ops,
183 .setup = enp2611_pci_setup, 177 .setup = enp2611_pci_setup,
184 .preinit = enp2611_pci_preinit, 178 .preinit = enp2611_pci_preinit,
185 .scan = enp2611_pci_scan_bus,
186 .map_irq = enp2611_pci_map_irq, 179 .map_irq = enp2611_pci_map_irq,
187}; 180};
188 181
diff --git a/arch/arm/mach-ixp2000/include/mach/platform.h b/arch/arm/mach-ixp2000/include/mach/platform.h
index bb0f8dcf9ee1..6b500c0858be 100644
--- a/arch/arm/mach-ixp2000/include/mach/platform.h
+++ b/arch/arm/mach-ixp2000/include/mach/platform.h
@@ -127,10 +127,10 @@ unsigned long ixp2000_gettimeoffset(void);
127 127
128struct pci_sys_data; 128struct pci_sys_data;
129 129
130extern struct pci_ops ixp2000_pci_ops;
130u32 *ixp2000_pci_config_addr(unsigned int bus, unsigned int devfn, int where); 131u32 *ixp2000_pci_config_addr(unsigned int bus, unsigned int devfn, int where);
131void ixp2000_pci_preinit(void); 132void ixp2000_pci_preinit(void);
132int ixp2000_pci_setup(int, struct pci_sys_data*); 133int ixp2000_pci_setup(int, struct pci_sys_data*);
133struct pci_bus* ixp2000_pci_scan_bus(int, struct pci_sys_data*);
134int ixp2000_pci_read_config(struct pci_bus*, unsigned int, int, int, u32 *); 134int ixp2000_pci_read_config(struct pci_bus*, unsigned int, int, int, u32 *);
135int ixp2000_pci_write_config(struct pci_bus*, unsigned int, int, int, u32); 135int ixp2000_pci_write_config(struct pci_bus*, unsigned int, int, int, u32);
136 136
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index 915ad49e3b8f..4ec44801d303 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -146,10 +146,10 @@ static void ixdp2400_pci_postinit(void)
146 146
147static struct hw_pci ixdp2400_pci __initdata = { 147static struct hw_pci ixdp2400_pci __initdata = {
148 .nr_controllers = 1, 148 .nr_controllers = 1,
149 .ops = &ixp2000_pci_ops,
149 .setup = ixdp2400_pci_setup, 150 .setup = ixdp2400_pci_setup,
150 .preinit = ixdp2400_pci_preinit, 151 .preinit = ixdp2400_pci_preinit,
151 .postinit = ixdp2400_pci_postinit, 152 .postinit = ixdp2400_pci_postinit,
152 .scan = ixp2000_pci_scan_bus,
153 .map_irq = ixdp2400_pci_map_irq, 153 .map_irq = ixdp2400_pci_map_irq,
154}; 154};
155 155
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index a9f1819ea049..44378c31d177 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -246,10 +246,10 @@ static void __init ixdp2800_pci_postinit(void)
246 246
247struct __initdata hw_pci ixdp2800_pci __initdata = { 247struct __initdata hw_pci ixdp2800_pci __initdata = {
248 .nr_controllers = 1, 248 .nr_controllers = 1,
249 .ops = &ixp2000_pci_ops,
249 .setup = ixdp2800_pci_setup, 250 .setup = ixdp2800_pci_setup,
250 .preinit = ixdp2800_pci_preinit, 251 .preinit = ixdp2800_pci_preinit,
251 .postinit = ixdp2800_pci_postinit, 252 .postinit = ixdp2800_pci_postinit,
252 .scan = ixp2000_pci_scan_bus,
253 .map_irq = ixdp2800_pci_map_irq, 253 .map_irq = ixdp2800_pci_map_irq,
254}; 254};
255 255
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 5196c39cdba4..af8b801d7d59 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -327,9 +327,9 @@ static int ixdp2x01_pci_setup(int nr, struct pci_sys_data *sys)
327 327
328struct hw_pci ixdp2x01_pci __initdata = { 328struct hw_pci ixdp2x01_pci __initdata = {
329 .nr_controllers = 1, 329 .nr_controllers = 1,
330 .ops = &ixp2000_pci_ops,
330 .setup = ixdp2x01_pci_setup, 331 .setup = ixdp2x01_pci_setup,
331 .preinit = ixdp2x01_pci_preinit, 332 .preinit = ixdp2x01_pci_preinit,
332 .scan = ixp2000_pci_scan_bus,
333 .map_irq = ixdp2x01_pci_map_irq, 333 .map_irq = ixdp2x01_pci_map_irq,
334}; 334};
335 335
diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index 9c02de932fac..d706838db023 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -124,17 +124,11 @@ int ixp2000_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where,
124} 124}
125 125
126 126
127static struct pci_ops ixp2000_pci_ops = { 127struct pci_ops ixp2000_pci_ops = {
128 .read = ixp2000_pci_read_config, 128 .read = ixp2000_pci_read_config,
129 .write = ixp2000_pci_write_config 129 .write = ixp2000_pci_write_config
130}; 130};
131 131
132struct pci_bus *ixp2000_pci_scan_bus(int nr, struct pci_sys_data *sysdata)
133{
134 return pci_scan_root_bus(NULL, sysdata->busnr, &ixp2000_pci_ops,
135 sysdata, &sysdata->resources);
136}
137
138 132
139int ixp2000_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 133int ixp2000_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
140{ 134{
diff --git a/arch/arm/mach-ixp23xx/include/mach/platform.h b/arch/arm/mach-ixp23xx/include/mach/platform.h
index 50de558e722e..798d8b42ab4a 100644
--- a/arch/arm/mach-ixp23xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp23xx/include/mach/platform.h
@@ -37,7 +37,7 @@ void ixp23xx_sys_init(void);
37void ixp23xx_restart(char, const char *); 37void ixp23xx_restart(char, const char *);
38int ixp23xx_pci_setup(int, struct pci_sys_data *); 38int ixp23xx_pci_setup(int, struct pci_sys_data *);
39void ixp23xx_pci_preinit(void); 39void ixp23xx_pci_preinit(void);
40struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*); 40extern struct pci_ops ixp23xx_pci_ops;
41void ixp23xx_pci_slave_init(void); 41void ixp23xx_pci_slave_init(void);
42 42
43extern struct sys_timer ixp23xx_timer; 43extern struct sys_timer ixp23xx_timer;
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index b0e07db5ceaf..8b48e32a8a62 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -251,9 +251,9 @@ static int __init ixdp2351_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
251 251
252struct hw_pci ixdp2351_pci __initdata = { 252struct hw_pci ixdp2351_pci __initdata = {
253 .nr_controllers = 1, 253 .nr_controllers = 1,
254 .ops = &ixp23xx_pci_ops,
254 .preinit = ixp23xx_pci_preinit, 255 .preinit = ixp23xx_pci_preinit,
255 .setup = ixp23xx_pci_setup, 256 .setup = ixp23xx_pci_setup,
256 .scan = ixp23xx_pci_scan_bus,
257 .map_irq = ixdp2351_map_irq, 257 .map_irq = ixdp2351_map_irq,
258}; 258};
259 259
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c
index 911f5a58e006..9211506ef556 100644
--- a/arch/arm/mach-ixp23xx/pci.c
+++ b/arch/arm/mach-ixp23xx/pci.c
@@ -140,12 +140,6 @@ struct pci_ops ixp23xx_pci_ops = {
140 .write = ixp23xx_pci_write_config, 140 .write = ixp23xx_pci_write_config,
141}; 141};
142 142
143struct pci_bus *ixp23xx_pci_scan_bus(int nr, struct pci_sys_data *sysdata)
144{
145 return pci_scan_root_bus(NULL, sysdata->busnr, &ixp23xx_pci_ops,
146 sysdata, &sysdata->resources);
147}
148
149int ixp23xx_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 143int ixp23xx_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
150{ 144{
151 volatile unsigned long temp; 145 volatile unsigned long temp;
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index eaaa3fa9fd05..8c0e5de3c609 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -118,9 +118,9 @@ static void __init roadrunner_pci_preinit(void)
118 118
119static struct hw_pci roadrunner_pci __initdata = { 119static struct hw_pci roadrunner_pci __initdata = {
120 .nr_controllers = 1, 120 .nr_controllers = 1,
121 .ops = &ixp23xx_pci_ops,
121 .preinit = roadrunner_pci_preinit, 122 .preinit = roadrunner_pci_preinit,
122 .setup = ixp23xx_pci_setup, 123 .setup = ixp23xx_pci_setup,
123 .scan = ixp23xx_pci_scan_bus,
124 .map_irq = roadrunner_map_irq, 124 .map_irq = roadrunner_map_irq,
125}; 125};
126 126
diff --git a/arch/arm/mach-ixp4xx/avila-pci.c b/arch/arm/mach-ixp4xx/avila-pci.c
index 8fea0a3c5246..548c7d43ade6 100644
--- a/arch/arm/mach-ixp4xx/avila-pci.c
+++ b/arch/arm/mach-ixp4xx/avila-pci.c
@@ -65,10 +65,9 @@ static int __init avila_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
65 65
66struct hw_pci avila_pci __initdata = { 66struct hw_pci avila_pci __initdata = {
67 .nr_controllers = 1, 67 .nr_controllers = 1,
68 .ops = &ixp4xx_ops,
68 .preinit = avila_pci_preinit, 69 .preinit = avila_pci_preinit,
69 .swizzle = pci_std_swizzle,
70 .setup = ixp4xx_setup, 70 .setup = ixp4xx_setup,
71 .scan = ixp4xx_scan_bus,
72 .map_irq = avila_map_irq, 71 .map_irq = avila_map_irq,
73}; 72};
74 73
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index d5719eb42591..1694f01ce2b6 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -480,12 +480,6 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
480 return 1; 480 return 1;
481} 481}
482 482
483struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)
484{
485 return pci_scan_root_bus(NULL, sys->busnr, &ixp4xx_ops, sys,
486 &sys->resources);
487}
488
489int dma_set_coherent_mask(struct device *dev, u64 mask) 483int dma_set_coherent_mask(struct device *dev, u64 mask)
490{ 484{
491 if (mask >= SZ_64M - 1) 485 if (mask >= SZ_64M - 1)
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index 71f5c9c60fc3..5d14ce2aee6d 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -48,10 +48,9 @@ static int __init coyote_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
48 48
49struct hw_pci coyote_pci __initdata = { 49struct hw_pci coyote_pci __initdata = {
50 .nr_controllers = 1, 50 .nr_controllers = 1,
51 .ops = &ixp4xx_ops,
51 .preinit = coyote_pci_preinit, 52 .preinit = coyote_pci_preinit,
52 .swizzle = pci_std_swizzle,
53 .setup = ixp4xx_setup, 53 .setup = ixp4xx_setup,
54 .scan = ixp4xx_scan_bus,
55 .map_irq = coyote_map_irq, 54 .map_irq = coyote_map_irq,
56}; 55};
57 56
diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c
index 0532510b5e8c..8dca76937723 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-pci.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c
@@ -62,10 +62,9 @@ static int __init dsmg600_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
62 62
63struct hw_pci __initdata dsmg600_pci = { 63struct hw_pci __initdata dsmg600_pci = {
64 .nr_controllers = 1, 64 .nr_controllers = 1,
65 .ops = &ixp4xx_ops,
65 .preinit = dsmg600_pci_preinit, 66 .preinit = dsmg600_pci_preinit,
66 .swizzle = pci_std_swizzle,
67 .setup = ixp4xx_setup, 67 .setup = ixp4xx_setup,
68 .scan = ixp4xx_scan_bus,
69 .map_irq = dsmg600_map_irq, 68 .map_irq = dsmg600_map_irq,
70}; 69};
71 70
diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c
index d2ac803328f7..fd4a8625b4ae 100644
--- a/arch/arm/mach-ixp4xx/fsg-pci.c
+++ b/arch/arm/mach-ixp4xx/fsg-pci.c
@@ -59,10 +59,9 @@ static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
59 59
60struct hw_pci fsg_pci __initdata = { 60struct hw_pci fsg_pci __initdata = {
61 .nr_controllers = 1, 61 .nr_controllers = 1,
62 .ops = &ixp4xx_ops,
62 .preinit = fsg_pci_preinit, 63 .preinit = fsg_pci_preinit,
63 .swizzle = pci_std_swizzle,
64 .setup = ixp4xx_setup, 64 .setup = ixp4xx_setup,
65 .scan = ixp4xx_scan_bus,
66 .map_irq = fsg_map_irq, 65 .map_irq = fsg_map_irq,
67}; 66};
68 67
diff --git a/arch/arm/mach-ixp4xx/gateway7001-pci.c b/arch/arm/mach-ixp4xx/gateway7001-pci.c
index 76581fb467c4..d9d6cc089707 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-pci.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-pci.c
@@ -47,10 +47,9 @@ static int __init gateway7001_map_irq(const struct pci_dev *dev, u8 slot,
47 47
48struct hw_pci gateway7001_pci __initdata = { 48struct hw_pci gateway7001_pci __initdata = {
49 .nr_controllers = 1, 49 .nr_controllers = 1,
50 .ops = &ixp4xx_ops,
50 .preinit = gateway7001_pci_preinit, 51 .preinit = gateway7001_pci_preinit,
51 .swizzle = pci_std_swizzle,
52 .setup = ixp4xx_setup, 52 .setup = ixp4xx_setup,
53 .scan = ixp4xx_scan_bus,
54 .map_irq = gateway7001_map_irq, 53 .map_irq = gateway7001_map_irq,
55}; 54};
56 55
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index 46bb924962ee..b800a031207c 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -473,11 +473,10 @@ static int __init gmlr_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
473 473
474static struct hw_pci gmlr_hw_pci __initdata = { 474static struct hw_pci gmlr_hw_pci __initdata = {
475 .nr_controllers = 1, 475 .nr_controllers = 1,
476 .ops = &ixp4xx_ops,
476 .preinit = gmlr_pci_preinit, 477 .preinit = gmlr_pci_preinit,
477 .postinit = gmlr_pci_postinit, 478 .postinit = gmlr_pci_postinit,
478 .swizzle = pci_std_swizzle,
479 .setup = ixp4xx_setup, 479 .setup = ixp4xx_setup,
480 .scan = ixp4xx_scan_bus,
481 .map_irq = gmlr_map_irq, 480 .map_irq = gmlr_map_irq,
482}; 481};
483 482
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
index d68fc068c38d..551d114c9e14 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
@@ -67,10 +67,9 @@ static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
67 67
68struct hw_pci gtwx5715_pci __initdata = { 68struct hw_pci gtwx5715_pci __initdata = {
69 .nr_controllers = 1, 69 .nr_controllers = 1,
70 .ops = &ixp4xx_ops,
70 .preinit = gtwx5715_pci_preinit, 71 .preinit = gtwx5715_pci_preinit,
71 .swizzle = pci_std_swizzle,
72 .setup = ixp4xx_setup, 72 .setup = ixp4xx_setup,
73 .scan = ixp4xx_scan_bus,
74 .map_irq = gtwx5715_map_irq, 73 .map_irq = gtwx5715_map_irq,
75}; 74};
76 75
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index b66bedc64de1..5bce94aacca9 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -130,7 +130,7 @@ extern void ixp4xx_restart(char, const char *);
130extern void ixp4xx_pci_preinit(void); 130extern void ixp4xx_pci_preinit(void);
131struct pci_sys_data; 131struct pci_sys_data;
132extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); 132extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
133extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); 133extern struct pci_ops ixp4xx_ops;
134 134
135/* 135/*
136 * GPIO-functions 136 * GPIO-functions
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index fffd8c5e40bf..318424dd3c50 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -60,10 +60,9 @@ static int __init ixdp425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
60 60
61struct hw_pci ixdp425_pci __initdata = { 61struct hw_pci ixdp425_pci __initdata = {
62 .nr_controllers = 1, 62 .nr_controllers = 1,
63 .ops = &ixp4xx_ops,
63 .preinit = ixdp425_pci_preinit, 64 .preinit = ixdp425_pci_preinit,
64 .swizzle = pci_std_swizzle,
65 .setup = ixp4xx_setup, 65 .setup = ixp4xx_setup,
66 .scan = ixp4xx_scan_bus,
67 .map_irq = ixdp425_map_irq, 66 .map_irq = ixdp425_map_irq,
68}; 67};
69 68
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index 34efe75015ec..1f8717ba13dc 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -42,10 +42,9 @@ static int __init ixdpg425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
42 42
43struct hw_pci ixdpg425_pci __initdata = { 43struct hw_pci ixdpg425_pci __initdata = {
44 .nr_controllers = 1, 44 .nr_controllers = 1,
45 .ops = &ixp4xx_ops,
45 .preinit = ixdpg425_pci_preinit, 46 .preinit = ixdpg425_pci_preinit,
46 .swizzle = pci_std_swizzle,
47 .setup = ixp4xx_setup, 47 .setup = ixp4xx_setup,
48 .scan = ixp4xx_scan_bus,
49 .map_irq = ixdpg425_map_irq, 48 .map_irq = ixdpg425_map_irq,
50}; 49};
51 50
diff --git a/arch/arm/mach-ixp4xx/miccpt-pci.c b/arch/arm/mach-ixp4xx/miccpt-pci.c
index ca0bae7fca90..d114ccd2017c 100644
--- a/arch/arm/mach-ixp4xx/miccpt-pci.c
+++ b/arch/arm/mach-ixp4xx/miccpt-pci.c
@@ -61,10 +61,9 @@ static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
61 61
62struct hw_pci miccpt_pci __initdata = { 62struct hw_pci miccpt_pci __initdata = {
63 .nr_controllers = 1, 63 .nr_controllers = 1,
64 .ops = &ixp4xx_ops,
64 .preinit = miccpt_pci_preinit, 65 .preinit = miccpt_pci_preinit,
65 .swizzle = pci_std_swizzle,
66 .setup = ixp4xx_setup, 66 .setup = ixp4xx_setup,
67 .scan = ixp4xx_scan_bus,
68 .map_irq = miccpt_map_irq, 67 .map_irq = miccpt_map_irq,
69}; 68};
70 69
diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c
index 5434ccf553eb..8f0eba0a6800 100644
--- a/arch/arm/mach-ixp4xx/nas100d-pci.c
+++ b/arch/arm/mach-ixp4xx/nas100d-pci.c
@@ -58,10 +58,9 @@ static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
58 58
59struct hw_pci __initdata nas100d_pci = { 59struct hw_pci __initdata nas100d_pci = {
60 .nr_controllers = 1, 60 .nr_controllers = 1,
61 .ops = &ixp4xx_ops,
61 .preinit = nas100d_pci_preinit, 62 .preinit = nas100d_pci_preinit,
62 .swizzle = pci_std_swizzle,
63 .setup = ixp4xx_setup, 63 .setup = ixp4xx_setup,
64 .scan = ixp4xx_scan_bus,
65 .map_irq = nas100d_map_irq, 64 .map_irq = nas100d_map_irq,
66}; 65};
67 66
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
index b57160535e47..032defe111aa 100644
--- a/arch/arm/mach-ixp4xx/nslu2-pci.c
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -54,10 +54,9 @@ static int __init nslu2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
54 54
55struct hw_pci __initdata nslu2_pci = { 55struct hw_pci __initdata nslu2_pci = {
56 .nr_controllers = 1, 56 .nr_controllers = 1,
57 .ops = &ixp4xx_ops,
57 .preinit = nslu2_pci_preinit, 58 .preinit = nslu2_pci_preinit,
58 .swizzle = pci_std_swizzle,
59 .setup = ixp4xx_setup, 59 .setup = ixp4xx_setup,
60 .scan = ixp4xx_scan_bus,
61 .map_irq = nslu2_map_irq, 60 .map_irq = nslu2_map_irq,
62}; 61};
63 62
diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c
index 0bc3f34c282f..a4220fa5e0c3 100644
--- a/arch/arm/mach-ixp4xx/vulcan-pci.c
+++ b/arch/arm/mach-ixp4xx/vulcan-pci.c
@@ -56,10 +56,9 @@ static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
56 56
57struct hw_pci vulcan_pci __initdata = { 57struct hw_pci vulcan_pci __initdata = {
58 .nr_controllers = 1, 58 .nr_controllers = 1,
59 .ops = &ixp4xx_ops,
59 .preinit = vulcan_pci_preinit, 60 .preinit = vulcan_pci_preinit,
60 .swizzle = pci_std_swizzle,
61 .setup = ixp4xx_setup, 61 .setup = ixp4xx_setup,
62 .scan = ixp4xx_scan_bus,
63 .map_irq = vulcan_map_irq, 62 .map_irq = vulcan_map_irq,
64}; 63};
65 64
diff --git a/arch/arm/mach-ixp4xx/wg302v2-pci.c b/arch/arm/mach-ixp4xx/wg302v2-pci.c
index f27dfcfe811b..c92e5b82af36 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-pci.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-pci.c
@@ -46,10 +46,9 @@ static int __init wg302v2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
46 46
47struct hw_pci wg302v2_pci __initdata = { 47struct hw_pci wg302v2_pci __initdata = {
48 .nr_controllers = 1, 48 .nr_controllers = 1,
49 .ops = &ixp4xx_ops,
49 .preinit = wg302v2_pci_preinit, 50 .preinit = wg302v2_pci_preinit,
50 .swizzle = pci_std_swizzle,
51 .setup = ixp4xx_setup, 51 .setup = ixp4xx_setup,
52 .scan = ixp4xx_scan_bus,
53 .map_irq = wg302v2_map_irq, 52 .map_irq = wg302v2_map_irq,
54}; 53};
55 54
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index f56a0118c1bb..de373176ee67 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -44,12 +44,6 @@ struct pcie_port {
44static int pcie_port_map[2]; 44static int pcie_port_map[2];
45static int num_pcie_ports; 45static int num_pcie_ports;
46 46
47static inline struct pcie_port *bus_to_port(struct pci_bus *bus)
48{
49 struct pci_sys_data *sys = bus->sysdata;
50 return sys->private_data;
51}
52
53static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) 47static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)
54{ 48{
55 /* 49 /*
@@ -79,7 +73,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)
79static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, 73static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
80 int size, u32 *val) 74 int size, u32 *val)
81{ 75{
82 struct pcie_port *pp = bus_to_port(bus); 76 struct pci_sys_data *sys = bus->sysdata;
77 struct pcie_port *pp = sys->private_data;
83 unsigned long flags; 78 unsigned long flags;
84 int ret; 79 int ret;
85 80
@@ -98,7 +93,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
98static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, 93static int pcie_wr_conf(struct pci_bus *bus, u32 devfn,
99 int where, int size, u32 val) 94 int where, int size, u32 val)
100{ 95{
101 struct pcie_port *pp = bus_to_port(bus); 96 struct pci_sys_data *sys = bus->sysdata;
97 struct pcie_port *pp = sys->private_data;
102 unsigned long flags; 98 unsigned long flags;
103 int ret; 99 int ret;
104 100
@@ -248,13 +244,13 @@ kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys)
248static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot, 244static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot,
249 u8 pin) 245 u8 pin)
250{ 246{
251 struct pcie_port *pp = bus_to_port(dev->bus); 247 struct pci_sys_data *sys = dev->sysdata;
248 struct pcie_port *pp = sys->private_data;
252 249
253 return pp->irq; 250 return pp->irq;
254} 251}
255 252
256static struct hw_pci kirkwood_pci __initdata = { 253static struct hw_pci kirkwood_pci __initdata = {
257 .swizzle = pci_std_swizzle,
258 .setup = kirkwood_pcie_setup, 254 .setup = kirkwood_pcie_setup,
259 .scan = kirkwood_pcie_scan_bus, 255 .scan = kirkwood_pcie_scan_bus,
260 .map_irq = kirkwood_pcie_map_irq, 256 .map_irq = kirkwood_pcie_map_irq,
diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c
index acc701435817..bb18193b4bac 100644
--- a/arch/arm/mach-ks8695/pci.c
+++ b/arch/arm/mach-ks8695/pci.c
@@ -141,12 +141,6 @@ static struct pci_ops ks8695_pci_ops = {
141 .write = ks8695_pci_writeconfig, 141 .write = ks8695_pci_writeconfig,
142}; 142};
143 143
144static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
145{
146 return pci_scan_root_bus(NULL, sys->busnr, &ks8695_pci_ops, sys,
147 &sys->resources);
148}
149
150static struct resource pci_mem = { 144static struct resource pci_mem = {
151 .name = "PCI Memory space", 145 .name = "PCI Memory space",
152 .start = KS8695_PCIMEM_PA, 146 .start = KS8695_PCIMEM_PA,
@@ -302,11 +296,10 @@ static void ks8695_show_pciregs(void)
302 296
303static struct hw_pci ks8695_pci __initdata = { 297static struct hw_pci ks8695_pci __initdata = {
304 .nr_controllers = 1, 298 .nr_controllers = 1,
299 .ops = &ks8695_pci_ops,
305 .preinit = ks8695_pci_preinit, 300 .preinit = ks8695_pci_preinit,
306 .setup = ks8695_pci_setup, 301 .setup = ks8695_pci_setup,
307 .scan = ks8695_pci_scan_bus,
308 .postinit = NULL, 302 .postinit = NULL,
309 .swizzle = pci_std_swizzle,
310 .map_irq = NULL, 303 .map_irq = NULL,
311}; 304};
312 305
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index df3e38055a24..2e56e86b6d68 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -147,6 +147,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
147 return 0; 147 return 0;
148 148
149 pp = &pcie_port[nr]; 149 pp = &pcie_port[nr];
150 sys->private_data = pp;
150 pp->root_bus_nr = sys->busnr; 151 pp->root_bus_nr = sys->busnr;
151 152
152 /* 153 /*
@@ -161,19 +162,6 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
161 return 1; 162 return 1;
162} 163}
163 164
164static struct pcie_port *bus_to_port(int bus)
165{
166 int i;
167
168 for (i = num_pcie_ports - 1; i >= 0; i--) {
169 int rbus = pcie_port[i].root_bus_nr;
170 if (rbus != -1 && rbus <= bus)
171 break;
172 }
173
174 return i >= 0 ? pcie_port + i : NULL;
175}
176
177static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) 165static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)
178{ 166{
179 /* 167 /*
@@ -189,7 +177,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)
189static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, 177static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
190 int size, u32 *val) 178 int size, u32 *val)
191{ 179{
192 struct pcie_port *pp = bus_to_port(bus->number); 180 struct pci_sys_data *sys = bus->sysdata;
181 struct pcie_port *pp = sys->private_data;
193 unsigned long flags; 182 unsigned long flags;
194 int ret; 183 int ret;
195 184
@@ -208,7 +197,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
208static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, 197static int pcie_wr_conf(struct pci_bus *bus, u32 devfn,
209 int where, int size, u32 val) 198 int where, int size, u32 val)
210{ 199{
211 struct pcie_port *pp = bus_to_port(bus->number); 200 struct pci_sys_data *sys = bus->sysdata;
201 struct pcie_port *pp = sys->private_data;
212 unsigned long flags; 202 unsigned long flags;
213 int ret; 203 int ret;
214 204
@@ -263,7 +253,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys)
263static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot, 253static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot,
264 u8 pin) 254 u8 pin)
265{ 255{
266 struct pcie_port *pp = bus_to_port(dev->bus->number); 256 struct pci_sys_data *sys = dev->bus->sysdata;
257 struct pcie_port *pp = sys->private_data;
267 258
268 return IRQ_MV78XX0_PCIE_00 + (pp->maj << 2) + pp->min; 259 return IRQ_MV78XX0_PCIE_00 + (pp->maj << 2) + pp->min;
269} 260}
@@ -271,7 +262,6 @@ static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot,
271static struct hw_pci mv78xx0_pci __initdata = { 262static struct hw_pci mv78xx0_pci __initdata = {
272 .nr_controllers = 8, 263 .nr_controllers = 8,
273 .preinit = mv78xx0_pcie_preinit, 264 .preinit = mv78xx0_pcie_preinit,
274 .swizzle = pci_std_swizzle,
275 .setup = mv78xx0_pcie_setup, 265 .setup = mv78xx0_pcie_setup,
276 .scan = mv78xx0_pcie_scan_bus, 266 .scan = mv78xx0_pcie_scan_bus,
277 .map_irq = mv78xx0_pcie_map_irq, 267 .map_irq = mv78xx0_pcie_map_irq,
diff --git a/arch/arm/mach-mxs/devices-mx23.h b/arch/arm/mach-mxs/devices-mx23.h
index 4d1329d59287..9acdd6387047 100644
--- a/arch/arm/mach-mxs/devices-mx23.h
+++ b/arch/arm/mach-mxs/devices-mx23.h
@@ -11,10 +11,16 @@
11#include <mach/mx23.h> 11#include <mach/mx23.h>
12#include <mach/devices-common.h> 12#include <mach/devices-common.h>
13#include <mach/mxsfb.h> 13#include <mach/mxsfb.h>
14#include <linux/amba/bus.h>
14 15
15extern const struct amba_device mx23_duart_device __initconst; 16static inline int mx23_add_duart(void)
16#define mx23_add_duart() \ 17{
17 mxs_add_duart(&mx23_duart_device) 18 struct amba_device *d;
19
20 d = amba_ahb_device_add(NULL, "duart", MX23_DUART_BASE_ADDR, SZ_8K,
21 MX23_INT_DUART, 0, 0, 0);
22 return IS_ERR(d) ? PTR_ERR(d) : 0;
23}
18 24
19extern const struct mxs_auart_data mx23_auart_data[] __initconst; 25extern const struct mxs_auart_data mx23_auart_data[] __initconst;
20#define mx23_add_auart(id) mxs_add_auart(&mx23_auart_data[id]) 26#define mx23_add_auart(id) mxs_add_auart(&mx23_auart_data[id])
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h
index 9dbeae130842..84b2960df117 100644
--- a/arch/arm/mach-mxs/devices-mx28.h
+++ b/arch/arm/mach-mxs/devices-mx28.h
@@ -11,10 +11,16 @@
11#include <mach/mx28.h> 11#include <mach/mx28.h>
12#include <mach/devices-common.h> 12#include <mach/devices-common.h>
13#include <mach/mxsfb.h> 13#include <mach/mxsfb.h>
14#include <linux/amba/bus.h>
14 15
15extern const struct amba_device mx28_duart_device __initconst; 16static inline int mx28_add_duart(void)
16#define mx28_add_duart() \ 17{
17 mxs_add_duart(&mx28_duart_device) 18 struct amba_device *d;
19
20 d = amba_ahb_device_add(NULL, "duart", MX28_DUART_BASE_ADDR, SZ_8K,
21 MX28_INT_DUART, 0, 0, 0);
22 return IS_ERR(d) ? PTR_ERR(d) : 0;
23}
18 24
19extern const struct mxs_auart_data mx28_auart_data[] __initconst; 25extern const struct mxs_auart_data mx28_auart_data[] __initconst;
20#define mx28_add_auart(id) mxs_add_auart(&mx28_auart_data[id]) 26#define mx28_add_auart(id) mxs_add_auart(&mx28_auart_data[id])
diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c
index 01faffec3064..cf50b5a66dda 100644
--- a/arch/arm/mach-mxs/devices.c
+++ b/arch/arm/mach-mxs/devices.c
@@ -75,22 +75,6 @@ err:
75 return pdev; 75 return pdev;
76} 76}
77 77
78int __init mxs_add_amba_device(const struct amba_device *dev)
79{
80 struct amba_device *adev = amba_device_alloc(dev->dev.init_name,
81 dev->res.start, resource_size(&dev->res));
82
83 if (!adev) {
84 pr_err("%s: failed to allocate memory", __func__);
85 return -ENOMEM;
86 }
87
88 adev->irq[0] = dev->irq[0];
89 adev->irq[1] = dev->irq[1];
90
91 return amba_device_add(adev, &iomem_resource);
92}
93
94struct device mxs_apbh_bus = { 78struct device mxs_apbh_bus = {
95 .init_name = "mxs_apbh", 79 .init_name = "mxs_apbh",
96 .parent = &platform_bus, 80 .parent = &platform_bus,
diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile
index c8f5c9541a30..5f72d9787444 100644
--- a/arch/arm/mach-mxs/devices/Makefile
+++ b/arch/arm/mach-mxs/devices/Makefile
@@ -1,4 +1,3 @@
1obj-$(CONFIG_MXS_HAVE_AMBA_DUART) += amba-duart.o
2obj-$(CONFIG_MXS_HAVE_PLATFORM_AUART) += platform-auart.o 1obj-$(CONFIG_MXS_HAVE_PLATFORM_AUART) += platform-auart.o
3obj-y += platform-dma.o 2obj-y += platform-dma.o
4obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o 3obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o
diff --git a/arch/arm/mach-mxs/devices/amba-duart.c b/arch/arm/mach-mxs/devices/amba-duart.c
deleted file mode 100644
index a5479f766046..000000000000
--- a/arch/arm/mach-mxs/devices/amba-duart.c
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * Copyright (C) 2009-2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License version 2 as published by the
9 * Free Software Foundation.
10 */
11#include <asm/irq.h>
12#include <mach/mx23.h>
13#include <mach/mx28.h>
14#include <mach/devices-common.h>
15
16#define MXS_AMBA_DUART_DEVICE(name, soc) \
17const struct amba_device name##_device __initconst = { \
18 .dev = { \
19 .init_name = "duart", \
20 }, \
21 .res = { \
22 .start = soc ## _DUART_BASE_ADDR, \
23 .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \
24 .flags = IORESOURCE_MEM, \
25 }, \
26 .irq = {soc ## _INT_DUART}, \
27}
28
29#ifdef CONFIG_SOC_IMX23
30MXS_AMBA_DUART_DEVICE(mx23_duart, MX23);
31#endif
32
33#ifdef CONFIG_SOC_IMX28
34MXS_AMBA_DUART_DEVICE(mx28_duart, MX28);
35#endif
36
37int __init mxs_add_duart(const struct amba_device *dev)
38{
39 return mxs_add_amba_device(dev);
40}
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
index f2e383955d88..21e45a70d344 100644
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -27,11 +27,6 @@ static inline struct platform_device *mxs_add_platform_device(
27 name, id, res, num_resources, data, size_data, 0); 27 name, id, res, num_resources, data, size_data, 0);
28} 28}
29 29
30int __init mxs_add_amba_device(const struct amba_device *dev);
31
32/* duart */
33int __init mxs_add_duart(const struct amba_device *dev);
34
35/* auart */ 30/* auart */
36struct mxs_auart_data { 31struct mxs_auart_data {
37 int id; 32 int id;
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index e52108c9aaea..49a3fd630313 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -265,7 +265,6 @@ static int __init db88f5281_pci_map_irq(const struct pci_dev *dev, u8 slot,
265static struct hw_pci db88f5281_pci __initdata = { 265static struct hw_pci db88f5281_pci __initdata = {
266 .nr_controllers = 2, 266 .nr_controllers = 2,
267 .preinit = db88f5281_pci_preinit, 267 .preinit = db88f5281_pci_preinit,
268 .swizzle = pci_std_swizzle,
269 .setup = orion5x_pci_sys_setup, 268 .setup = orion5x_pci_sys_setup,
270 .scan = orion5x_pci_sys_scan_bus, 269 .scan = orion5x_pci_sys_scan_bus,
271 .map_irq = db88f5281_pci_map_irq, 270 .map_irq = db88f5281_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index c3ed15b8ea25..8c06ccac44c2 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -86,7 +86,6 @@ static int __init dns323_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
86 86
87static struct hw_pci dns323_pci __initdata = { 87static struct hw_pci dns323_pci __initdata = {
88 .nr_controllers = 2, 88 .nr_controllers = 2,
89 .swizzle = pci_std_swizzle,
90 .setup = orion5x_pci_sys_setup, 89 .setup = orion5x_pci_sys_setup,
91 .scan = orion5x_pci_sys_scan_bus, 90 .scan = orion5x_pci_sys_scan_bus,
92 .map_irq = dns323_pci_map_irq, 91 .map_irq = dns323_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index 47587b832842..1e458efafb9a 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -138,7 +138,6 @@ static int __init kurobox_pro_pci_map_irq(const struct pci_dev *dev, u8 slot,
138 138
139static struct hw_pci kurobox_pro_pci __initdata = { 139static struct hw_pci kurobox_pro_pci __initdata = {
140 .nr_controllers = 2, 140 .nr_controllers = 2,
141 .swizzle = pci_std_swizzle,
142 .setup = orion5x_pci_sys_setup, 141 .setup = orion5x_pci_sys_setup,
143 .scan = orion5x_pci_sys_scan_bus, 142 .scan = orion5x_pci_sys_scan_bus,
144 .map_irq = kurobox_pro_pci_map_irq, 143 .map_irq = kurobox_pro_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 65faaa34de61..1c16d045333e 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -89,7 +89,6 @@ static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
89 89
90static struct hw_pci mss2_pci __initdata = { 90static struct hw_pci mss2_pci __initdata = {
91 .nr_controllers = 2, 91 .nr_controllers = 2,
92 .swizzle = pci_std_swizzle,
93 .setup = orion5x_pci_sys_setup, 92 .setup = orion5x_pci_sys_setup,
94 .scan = orion5x_pci_sys_scan_bus, 93 .scan = orion5x_pci_sys_scan_bus,
95 .map_irq = mss2_pci_map_irq, 94 .map_irq = mss2_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index 292038fc59fd..78a6a11d8216 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -149,7 +149,6 @@ rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
149 149
150static struct hw_pci rd88f5181l_fxo_pci __initdata = { 150static struct hw_pci rd88f5181l_fxo_pci __initdata = {
151 .nr_controllers = 2, 151 .nr_controllers = 2,
152 .swizzle = pci_std_swizzle,
153 .setup = orion5x_pci_sys_setup, 152 .setup = orion5x_pci_sys_setup,
154 .scan = orion5x_pci_sys_scan_bus, 153 .scan = orion5x_pci_sys_scan_bus,
155 .map_irq = rd88f5181l_fxo_pci_map_irq, 154 .map_irq = rd88f5181l_fxo_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index c44eabaabc16..2f5dc54cd4cd 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -161,7 +161,6 @@ rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
161 161
162static struct hw_pci rd88f5181l_ge_pci __initdata = { 162static struct hw_pci rd88f5181l_ge_pci __initdata = {
163 .nr_controllers = 2, 163 .nr_controllers = 2,
164 .swizzle = pci_std_swizzle,
165 .setup = orion5x_pci_sys_setup, 164 .setup = orion5x_pci_sys_setup,
166 .scan = orion5x_pci_sys_scan_bus, 165 .scan = orion5x_pci_sys_scan_bus,
167 .map_irq = rd88f5181l_ge_pci_map_irq, 166 .map_irq = rd88f5181l_ge_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index e3ce61711478..399130fac0b6 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -200,7 +200,6 @@ static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,
200static struct hw_pci rd88f5182_pci __initdata = { 200static struct hw_pci rd88f5182_pci __initdata = {
201 .nr_controllers = 2, 201 .nr_controllers = 2,
202 .preinit = rd88f5182_pci_preinit, 202 .preinit = rd88f5182_pci_preinit,
203 .swizzle = pci_std_swizzle,
204 .setup = orion5x_pci_sys_setup, 203 .setup = orion5x_pci_sys_setup,
205 .scan = orion5x_pci_sys_scan_bus, 204 .scan = orion5x_pci_sys_scan_bus,
206 .map_irq = rd88f5182_pci_map_irq, 205 .map_irq = rd88f5182_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index 2c5fab00d205..e91bf0ba4e8e 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -102,7 +102,6 @@ static void __init rd88f6183ap_ge_init(void)
102 102
103static struct hw_pci rd88f6183ap_ge_pci __initdata = { 103static struct hw_pci rd88f6183ap_ge_pci __initdata = {
104 .nr_controllers = 2, 104 .nr_controllers = 2,
105 .swizzle = pci_std_swizzle,
106 .setup = orion5x_pci_sys_setup, 105 .setup = orion5x_pci_sys_setup,
107 .scan = orion5x_pci_sys_scan_bus, 106 .scan = orion5x_pci_sys_scan_bus,
108 .map_irq = orion5x_pci_map_irq, 107 .map_irq = orion5x_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 632a861ef82b..90e571dc4deb 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -122,7 +122,6 @@ static int __init tsp2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
122static struct hw_pci tsp2_pci __initdata = { 122static struct hw_pci tsp2_pci __initdata = {
123 .nr_controllers = 2, 123 .nr_controllers = 2,
124 .preinit = tsp2_pci_preinit, 124 .preinit = tsp2_pci_preinit,
125 .swizzle = pci_std_swizzle,
126 .setup = orion5x_pci_sys_setup, 125 .setup = orion5x_pci_sys_setup,
127 .scan = orion5x_pci_sys_scan_bus, 126 .scan = orion5x_pci_sys_scan_bus,
128 .map_irq = tsp2_pci_map_irq, 127 .map_irq = tsp2_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 5d6408745582..b184f680e0db 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -170,7 +170,6 @@ static int __init qnap_ts209_pci_map_irq(const struct pci_dev *dev, u8 slot,
170static struct hw_pci qnap_ts209_pci __initdata = { 170static struct hw_pci qnap_ts209_pci __initdata = {
171 .nr_controllers = 2, 171 .nr_controllers = 2,
172 .preinit = qnap_ts209_pci_preinit, 172 .preinit = qnap_ts209_pci_preinit,
173 .swizzle = pci_std_swizzle,
174 .setup = orion5x_pci_sys_setup, 173 .setup = orion5x_pci_sys_setup,
175 .scan = orion5x_pci_sys_scan_bus, 174 .scan = orion5x_pci_sys_scan_bus,
176 .map_irq = qnap_ts209_pci_map_irq, 175 .map_irq = qnap_ts209_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 4e6ff759cd32..a5c2e64c4ece 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -140,7 +140,6 @@ static int __init qnap_ts409_pci_map_irq(const struct pci_dev *dev, u8 slot,
140 140
141static struct hw_pci qnap_ts409_pci __initdata = { 141static struct hw_pci qnap_ts409_pci __initdata = {
142 .nr_controllers = 2, 142 .nr_controllers = 2,
143 .swizzle = pci_std_swizzle,
144 .setup = orion5x_pci_sys_setup, 143 .setup = orion5x_pci_sys_setup,
145 .scan = orion5x_pci_sys_scan_bus, 144 .scan = orion5x_pci_sys_scan_bus,
146 .map_irq = qnap_ts409_pci_map_irq, 145 .map_irq = qnap_ts409_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index 078c03f7cd52..754c12b6abf0 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -155,7 +155,6 @@ static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,
155 155
156static struct hw_pci wnr854t_pci __initdata = { 156static struct hw_pci wnr854t_pci __initdata = {
157 .nr_controllers = 2, 157 .nr_controllers = 2,
158 .swizzle = pci_std_swizzle,
159 .setup = orion5x_pci_sys_setup, 158 .setup = orion5x_pci_sys_setup,
160 .scan = orion5x_pci_sys_scan_bus, 159 .scan = orion5x_pci_sys_scan_bus,
161 .map_irq = wnr854t_pci_map_irq, 160 .map_irq = wnr854t_pci_map_irq,
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index 46a9778171ce..45c21251eb1e 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -243,7 +243,6 @@ static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot,
243 243
244static struct hw_pci wrt350n_v2_pci __initdata = { 244static struct hw_pci wrt350n_v2_pci __initdata = {
245 .nr_controllers = 2, 245 .nr_controllers = 2,
246 .swizzle = pci_std_swizzle,
247 .setup = orion5x_pci_sys_setup, 246 .setup = orion5x_pci_sys_setup,
248 .scan = orion5x_pci_sys_scan_bus, 247 .scan = orion5x_pci_sys_scan_bus,
249 .map_irq = wrt350n_v2_pci_map_irq, 248 .map_irq = wrt350n_v2_pci_map_irq,
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index ebd9259f5ac9..d8f816c24a2f 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -181,11 +181,10 @@ static void cmx2xx_pci_preinit(void)
181} 181}
182 182
183static struct hw_pci cmx2xx_pci __initdata = { 183static struct hw_pci cmx2xx_pci __initdata = {
184 .swizzle = pci_std_swizzle,
185 .map_irq = cmx2xx_pci_map_irq, 184 .map_irq = cmx2xx_pci_map_irq,
186 .nr_controllers = 1, 185 .nr_controllers = 1,
186 .ops = &it8152_ops,
187 .setup = it8152_pci_setup, 187 .setup = it8152_pci_setup,
188 .scan = it8152_pci_scan_bus,
189 .preinit = cmx2xx_pci_preinit, 188 .preinit = cmx2xx_pci_preinit,
190}; 189};
191 190
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
index b49108b890a8..ff02e2da99f2 100644
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ b/arch/arm/mach-sa1100/pci-nanoengine.c
@@ -129,12 +129,6 @@ static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,
129 return NANOENGINE_IRQ_GPIO_PCI; 129 return NANOENGINE_IRQ_GPIO_PCI;
130} 130}
131 131
132struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys)
133{
134 return pci_scan_root_bus(NULL, sys->busnr, &pci_nano_ops, sys,
135 &sys->resources);
136}
137
138static struct resource pci_io_ports = 132static struct resource pci_io_ports =
139 DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO"); 133 DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO");
140 134
@@ -274,7 +268,7 @@ int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)
274static struct hw_pci nanoengine_pci __initdata = { 268static struct hw_pci nanoengine_pci __initdata = {
275 .map_irq = pci_nanoengine_map_irq, 269 .map_irq = pci_nanoengine_map_irq,
276 .nr_controllers = 1, 270 .nr_controllers = 1,
277 .scan = pci_nanoengine_scan_bus, 271 .ops = &pci_nano_ops,
278 .setup = pci_nanoengine_setup, 272 .setup = pci_nanoengine_setup,
279}; 273};
280 274
diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c
index 7cb79a092f31..9089407d5326 100644
--- a/arch/arm/mach-shark/pci.c
+++ b/arch/arm/mach-shark/pci.c
@@ -29,10 +29,9 @@ extern void __init via82c505_preinit(void);
29 29
30static struct hw_pci shark_pci __initdata = { 30static struct hw_pci shark_pci __initdata = {
31 .setup = via82c505_setup, 31 .setup = via82c505_setup,
32 .swizzle = pci_std_swizzle,
33 .map_irq = shark_map_irq, 32 .map_irq = shark_map_irq,
34 .nr_controllers = 1, 33 .nr_controllers = 1,
35 .scan = via82c505_scan_bus, 34 .ops = &via82c505_ops,
36 .preinit = via82c505_preinit, 35 .preinit = via82c505_preinit,
37}; 36};
38 37
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 54a816ff3847..0e09137506ec 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -475,7 +475,6 @@ static struct hw_pci tegra_pcie_hw __initdata = {
475 .nr_controllers = 2, 475 .nr_controllers = 2,
476 .setup = tegra_pcie_setup, 476 .setup = tegra_pcie_setup,
477 .scan = tegra_pcie_scan_bus, 477 .scan = tegra_pcie_scan_bus,
478 .swizzle = pci_std_swizzle,
479 .map_irq = tegra_pcie_map_irq, 478 .map_irq = tegra_pcie_map_irq,
480}; 479};
481 480
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c
index c5312a4b49f5..dfdd4a54668d 100644
--- a/arch/arm/mach-ux500/devices-common.c
+++ b/arch/arm/mach-ux500/devices-common.c
@@ -11,7 +11,6 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <linux/slab.h> 12#include <linux/slab.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/amba/bus.h>
15 14
16#include <plat/gpio-nomadik.h> 15#include <plat/gpio-nomadik.h>
17 16
@@ -19,38 +18,6 @@
19 18
20#include "devices-common.h" 19#include "devices-common.h"
21 20
22struct amba_device *
23dbx500_add_amba_device(struct device *parent, const char *name,
24 resource_size_t base, int irq, void *pdata,
25 unsigned int periphid)
26{
27 struct amba_device *dev;
28 int ret;
29
30 dev = amba_device_alloc(name, base, SZ_4K);
31 if (!dev)
32 return ERR_PTR(-ENOMEM);
33
34 dev->dma_mask = DMA_BIT_MASK(32);
35 dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
36
37 dev->irq[0] = irq;
38
39 dev->periphid = periphid;
40
41 dev->dev.platform_data = pdata;
42
43 dev->dev.parent = parent;
44
45 ret = amba_device_add(dev, &iomem_resource);
46 if (ret) {
47 amba_device_put(dev);
48 return ERR_PTR(ret);
49 }
50
51 return dev;
52}
53
54static struct platform_device * 21static struct platform_device *
55dbx500_add_gpio(struct device *parent, int id, resource_size_t addr, int irq, 22dbx500_add_gpio(struct device *parent, int id, resource_size_t addr, int irq,
56 struct nmk_gpio_platform_data *pdata) 23 struct nmk_gpio_platform_data *pdata)
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h
index 39c74ec82add..f75bcb2ab13b 100644
--- a/arch/arm/mach-ux500/devices-common.h
+++ b/arch/arm/mach-ux500/devices-common.h
@@ -11,13 +11,9 @@
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h> 12#include <linux/dma-mapping.h>
13#include <linux/sys_soc.h> 13#include <linux/sys_soc.h>
14#include <linux/amba/bus.h>
14#include <plat/i2c.h> 15#include <plat/i2c.h>
15 16
16extern struct amba_device *
17dbx500_add_amba_device(struct device *parent, const char *name,
18 resource_size_t base, int irq, void *pdata,
19 unsigned int periphid);
20
21struct spi_master_cntlr; 17struct spi_master_cntlr;
22 18
23static inline struct amba_device * 19static inline struct amba_device *
@@ -25,8 +21,8 @@ dbx500_add_msp_spi(struct device *parent, const char *name,
25 resource_size_t base, int irq, 21 resource_size_t base, int irq,
26 struct spi_master_cntlr *pdata) 22 struct spi_master_cntlr *pdata)
27{ 23{
28 return dbx500_add_amba_device(parent, name, base, irq, 24 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,
29 pdata, 0); 25 pdata, 0);
30} 26}
31 27
32static inline struct amba_device * 28static inline struct amba_device *
@@ -34,8 +30,8 @@ dbx500_add_spi(struct device *parent, const char *name, resource_size_t base,
34 int irq, struct spi_master_cntlr *pdata, 30 int irq, struct spi_master_cntlr *pdata,
35 u32 periphid) 31 u32 periphid)
36{ 32{
37 return dbx500_add_amba_device(parent, name, base, irq, 33 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,
38 pdata, periphid); 34 pdata, periphid);
39} 35}
40 36
41struct mmci_platform_data; 37struct mmci_platform_data;
@@ -44,8 +40,8 @@ static inline struct amba_device *
44dbx500_add_sdi(struct device *parent, const char *name, resource_size_t base, 40dbx500_add_sdi(struct device *parent, const char *name, resource_size_t base,
45 int irq, struct mmci_platform_data *pdata, u32 periphid) 41 int irq, struct mmci_platform_data *pdata, u32 periphid)
46{ 42{
47 return dbx500_add_amba_device(parent, name, base, irq, 43 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,
48 pdata, periphid); 44 pdata, periphid);
49} 45}
50 46
51struct amba_pl011_data; 47struct amba_pl011_data;
@@ -54,7 +50,7 @@ static inline struct amba_device *
54dbx500_add_uart(struct device *parent, const char *name, resource_size_t base, 50dbx500_add_uart(struct device *parent, const char *name, resource_size_t base,
55 int irq, struct amba_pl011_data *pdata) 51 int irq, struct amba_pl011_data *pdata)
56{ 52{
57 return dbx500_add_amba_device(parent, name, base, irq, pdata, 0); 53 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);
58} 54}
59 55
60struct nmk_i2c_controller; 56struct nmk_i2c_controller;
@@ -85,7 +81,8 @@ dbx500_add_i2c(struct device *parent, int id, resource_size_t base, int irq,
85static inline struct amba_device * 81static inline struct amba_device *
86dbx500_add_rtc(struct device *parent, resource_size_t base, int irq) 82dbx500_add_rtc(struct device *parent, resource_size_t base, int irq)
87{ 83{
88 return dbx500_add_amba_device(parent, "rtc-pl031", base, irq, NULL, 0); 84 return amba_apb_device_add(parent, "rtc-pl031", base, SZ_4K, irq,
85 0, NULL, 0);
89} 86}
90 87
91struct nmk_gpio_platform_data; 88struct nmk_gpio_platform_data;
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h
index 9fd93e9da529..6fc7eb24d9a0 100644
--- a/arch/arm/mach-ux500/devices-db8500.h
+++ b/arch/arm/mach-ux500/devices-db8500.h
@@ -31,7 +31,7 @@ static inline struct amba_device *
31db8500_add_ssp(struct device *parent, const char *name, resource_size_t base, 31db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
32 int irq, struct pl022_ssp_controller *pdata) 32 int irq, struct pl022_ssp_controller *pdata)
33{ 33{
34 return dbx500_add_amba_device(parent, name, base, irq, pdata, 0); 34 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);
35} 35}
36 36
37 37
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 6bbd74e950ab..cf4687ee2a7b 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -66,12 +66,6 @@
66#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) 66#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE)
67#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) 67#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE)
68 68
69static struct fpga_irq_data sic_irq = {
70 .base = VA_SIC_BASE,
71 .irq_start = IRQ_SIC_START,
72 .chip.name = "SIC",
73};
74
75#if 1 69#if 1
76#define IRQ_MMCI0A IRQ_VICSOURCE22 70#define IRQ_MMCI0A IRQ_VICSOURCE22
77#define IRQ_AACI IRQ_VICSOURCE24 71#define IRQ_AACI IRQ_VICSOURCE24
@@ -105,8 +99,11 @@ void __init versatile_init_irq(void)
105 99
106 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); 100 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
107 101
108 fpga_irq_init(IRQ_VICSOURCE31, ~PIC_MASK, &sic_irq); 102 np = of_find_matching_node_by_address(NULL, sic_of_match,
109 irq_domain_generate_simple(sic_of_match, VERSATILE_SIC_BASE, IRQ_SIC_START); 103 VERSATILE_SIC_BASE);
104
105 fpga_irq_init(VA_SIC_BASE, "SIC", IRQ_SIC_START,
106 IRQ_VICSOURCE31, ~PIC_MASK, np);
110 107
111 /* 108 /*
112 * Interrupts on secondary controller from 0 to 8 are routed to 109 * Interrupts on secondary controller from 0 to 8 are routed to
@@ -666,17 +663,18 @@ static struct amba_device *amba_devs[] __initdata = {
666 * having a specific name. 663 * having a specific name.
667 */ 664 */
668struct of_dev_auxdata versatile_auxdata_lookup[] __initdata = { 665struct of_dev_auxdata versatile_auxdata_lookup[] __initdata = {
669 OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI0_BASE, "fpga:05", NULL), 666 OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI0_BASE, "fpga:05", &mmc0_plat_data),
670 OF_DEV_AUXDATA("arm,primecell", VERSATILE_KMI0_BASE, "fpga:06", NULL), 667 OF_DEV_AUXDATA("arm,primecell", VERSATILE_KMI0_BASE, "fpga:06", NULL),
671 OF_DEV_AUXDATA("arm,primecell", VERSATILE_KMI1_BASE, "fpga:07", NULL), 668 OF_DEV_AUXDATA("arm,primecell", VERSATILE_KMI1_BASE, "fpga:07", NULL),
672 OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART3_BASE, "fpga:09", NULL), 669 OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART3_BASE, "fpga:09", NULL),
670 /* FIXME: this is buggy, the platform data is needed for this MMC instance too */
673 OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI1_BASE, "fpga:0b", NULL), 671 OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI1_BASE, "fpga:0b", NULL),
674 672
675 OF_DEV_AUXDATA("arm,primecell", VERSATILE_CLCD_BASE, "dev:20", &clcd_plat_data), 673 OF_DEV_AUXDATA("arm,primecell", VERSATILE_CLCD_BASE, "dev:20", &clcd_plat_data),
676 OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART0_BASE, "dev:f1", NULL), 674 OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART0_BASE, "dev:f1", NULL),
677 OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART1_BASE, "dev:f2", NULL), 675 OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART1_BASE, "dev:f2", NULL),
678 OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART2_BASE, "dev:f3", NULL), 676 OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART2_BASE, "dev:f3", NULL),
679 OF_DEV_AUXDATA("arm,primecell", VERSATILE_SSP_BASE, "dev:f4", NULL), 677 OF_DEV_AUXDATA("arm,primecell", VERSATILE_SSP_BASE, "dev:f4", &ssp0_plat_data),
680 678
681#if 0 679#if 0
682 /* 680 /*
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index d2268be8c34c..15c6a00000ec 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -303,12 +303,6 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
303} 303}
304 304
305 305
306struct pci_bus * __init pci_versatile_scan_bus(int nr, struct pci_sys_data *sys)
307{
308 return pci_scan_root_bus(NULL, sys->busnr, &pci_versatile_ops, sys,
309 &sys->resources);
310}
311
312void __init pci_versatile_preinit(void) 306void __init pci_versatile_preinit(void)
313{ 307{
314 pcibios_min_io = 0x44000000; 308 pcibios_min_io = 0x44000000;
@@ -339,19 +333,16 @@ static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
339 * 26 1 29 333 * 26 1 29
340 * 27 1 30 334 * 27 1 30
341 */ 335 */
342 irq = 27 + ((slot + pin - 1) & 3); 336 irq = 27 + ((slot - 24 + pin - 1) & 3);
343
344 printk("PCI map irq: slot %d, pin %d, devslot %d, irq: %d\n",slot,pin,devslot,irq);
345 337
346 return irq; 338 return irq;
347} 339}
348 340
349static struct hw_pci versatile_pci __initdata = { 341static struct hw_pci versatile_pci __initdata = {
350 .swizzle = NULL,
351 .map_irq = versatile_map_irq, 342 .map_irq = versatile_map_irq,
352 .nr_controllers = 1, 343 .nr_controllers = 1,
344 .ops = &pci_versatile_ops,
353 .setup = pci_versatile_setup, 345 .setup = pci_versatile_setup,
354 .scan = pci_versatile_scan_bus,
355 .preinit = pci_versatile_preinit, 346 .preinit = pci_versatile_preinit,
356}; 347};
357 348
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index ff1f7cc11f87..80741992a9fc 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -26,18 +26,23 @@ ENTRY(v6_early_abort)
26 mrc p15, 0, r1, c5, c0, 0 @ get FSR 26 mrc p15, 0, r1, c5, c0, 0 @ get FSR
27 mrc p15, 0, r0, c6, c0, 0 @ get FAR 27 mrc p15, 0, r0, c6, c0, 0 @ get FAR
28/* 28/*
29 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103). 29 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR.
30 * The test below covers all the write situations, including Java bytecodes
31 */ 30 */
32 bic r1, r1, #1 << 11 @ clear bit 11 of FSR 31#ifdef CONFIG_ARM_ERRATA_326103
32 ldr ip, =0x4107b36
33 mrc p15, 0, r3, c0, c0, 0 @ get processor id
34 teq ip, r3, lsr #4 @ r0 ARM1136?
35 bne do_DataAbort
33 tst r5, #PSR_J_BIT @ Java? 36 tst r5, #PSR_J_BIT @ Java?
37 tsteq r5, #PSR_T_BIT @ Thumb?
34 bne do_DataAbort 38 bne do_DataAbort
35 do_thumb_abort fsr=r1, pc=r4, psr=r5, tmp=r3 39 bic r1, r1, #1 << 11 @ clear bit 11 of FSR
36 ldreq r3, [r4] @ read aborted ARM instruction 40 ldr r3, [r4] @ read aborted ARM instruction
37#ifdef CONFIG_CPU_ENDIAN_BE8 41#ifdef CONFIG_CPU_ENDIAN_BE8
38 reveq r3, r3 42 rev r3, r3
39#endif 43#endif
40 do_ldrd_abort tmp=ip, insn=r3 44 do_ldrd_abort tmp=ip, insn=r3
41 tst r3, #1 << 20 @ L = 0 -> write 45 tst r3, #1 << 20 @ L = 0 -> write
42 orreq r1, r1, #1 << 11 @ yes. 46 orreq r1, r1, #1 << 11 @ yes.
47#endif
43 b do_DataAbort 48 b do_DataAbort
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index a53fd2aaa2f4..2a8e380501e8 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -32,6 +32,7 @@ static void __iomem *l2x0_base;
32static DEFINE_RAW_SPINLOCK(l2x0_lock); 32static DEFINE_RAW_SPINLOCK(l2x0_lock);
33static u32 l2x0_way_mask; /* Bitmask of active ways */ 33static u32 l2x0_way_mask; /* Bitmask of active ways */
34static u32 l2x0_size; 34static u32 l2x0_size;
35static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;
35 36
36struct l2x0_regs l2x0_saved_regs; 37struct l2x0_regs l2x0_saved_regs;
37 38
@@ -61,12 +62,7 @@ static inline void cache_sync(void)
61{ 62{
62 void __iomem *base = l2x0_base; 63 void __iomem *base = l2x0_base;
63 64
64#ifdef CONFIG_PL310_ERRATA_753970 65 writel_relaxed(0, base + sync_reg_offset);
65 /* write to an unmmapped register */
66 writel_relaxed(0, base + L2X0_DUMMY_REG);
67#else
68 writel_relaxed(0, base + L2X0_CACHE_SYNC);
69#endif
70 cache_wait(base + L2X0_CACHE_SYNC, 1); 66 cache_wait(base + L2X0_CACHE_SYNC, 1);
71} 67}
72 68
@@ -85,10 +81,13 @@ static inline void l2x0_inv_line(unsigned long addr)
85} 81}
86 82
87#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915) 83#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)
84static inline void debug_writel(unsigned long val)
85{
86 if (outer_cache.set_debug)
87 outer_cache.set_debug(val);
88}
88 89
89#define debug_writel(val) outer_cache.set_debug(val) 90static void pl310_set_debug(unsigned long val)
90
91static void l2x0_set_debug(unsigned long val)
92{ 91{
93 writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL); 92 writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL);
94} 93}
@@ -98,7 +97,7 @@ static inline void debug_writel(unsigned long val)
98{ 97{
99} 98}
100 99
101#define l2x0_set_debug NULL 100#define pl310_set_debug NULL
102#endif 101#endif
103 102
104#ifdef CONFIG_PL310_ERRATA_588369 103#ifdef CONFIG_PL310_ERRATA_588369
@@ -331,6 +330,11 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
331 else 330 else
332 ways = 8; 331 ways = 8;
333 type = "L310"; 332 type = "L310";
333#ifdef CONFIG_PL310_ERRATA_753970
334 /* Unmapped register. */
335 sync_reg_offset = L2X0_DUMMY_REG;
336#endif
337 outer_cache.set_debug = pl310_set_debug;
334 break; 338 break;
335 case L2X0_CACHE_ID_PART_L210: 339 case L2X0_CACHE_ID_PART_L210:
336 ways = (aux >> 13) & 0xf; 340 ways = (aux >> 13) & 0xf;
@@ -379,7 +383,6 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
379 outer_cache.flush_all = l2x0_flush_all; 383 outer_cache.flush_all = l2x0_flush_all;
380 outer_cache.inv_all = l2x0_inv_all; 384 outer_cache.inv_all = l2x0_inv_all;
381 outer_cache.disable = l2x0_disable; 385 outer_cache.disable = l2x0_disable;
382 outer_cache.set_debug = l2x0_set_debug;
383 386
384 printk(KERN_INFO "%s cache controller enabled\n", type); 387 printk(KERN_INFO "%s cache controller enabled\n", type);
385 printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", 388 printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n",
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index f07467533365..5bb48356d217 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -247,7 +247,9 @@ good_area:
247 return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags); 247 return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
248 248
249check_stack: 249check_stack:
250 if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr)) 250 /* Don't allow expansion below FIRST_USER_ADDRESS */
251 if (vma->vm_flags & VM_GROWSDOWN &&
252 addr >= FIRST_USER_ADDRESS && !expand_stack(vma, addr))
251 goto good_area; 253 goto good_area;
252out: 254out:
253 return fault; 255 return fault;
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 595079fa9d1d..8f5813bbffb5 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -293,11 +293,11 @@ EXPORT_SYMBOL(pfn_valid);
293#endif 293#endif
294 294
295#ifndef CONFIG_SPARSEMEM 295#ifndef CONFIG_SPARSEMEM
296static void arm_memory_present(void) 296static void __init arm_memory_present(void)
297{ 297{
298} 298}
299#else 299#else
300static void arm_memory_present(void) 300static void __init arm_memory_present(void)
301{ 301{
302 struct memblock_region *reg; 302 struct memblock_region *reg;
303 303
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index b86f8933ff91..aa78de8bfdd3 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -489,7 +489,8 @@ static void __init build_mem_type_table(void)
489 */ 489 */
490 for (i = 0; i < ARRAY_SIZE(mem_types); i++) { 490 for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
491 mem_types[i].prot_pte |= PTE_EXT_AF; 491 mem_types[i].prot_pte |= PTE_EXT_AF;
492 mem_types[i].prot_sect |= PMD_SECT_AF; 492 if (mem_types[i].prot_sect)
493 mem_types[i].prot_sect |= PMD_SECT_AF;
493 } 494 }
494 kern_pgprot |= PTE_EXT_AF; 495 kern_pgprot |= PTE_EXT_AF;
495 vecs_pgprot |= PTE_EXT_AF; 496 vecs_pgprot |= PTE_EXT_AF;
@@ -618,8 +619,8 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr,
618 } 619 }
619} 620}
620 621
621static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 622static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
622 unsigned long phys, const struct mem_type *type) 623 unsigned long end, unsigned long phys, const struct mem_type *type)
623{ 624{
624 pud_t *pud = pud_offset(pgd, addr); 625 pud_t *pud = pud_offset(pgd, addr);
625 unsigned long next; 626 unsigned long next;
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index 0da42058a20f..8daae9b230ea 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -160,7 +160,7 @@ iop3xx_write_config(struct pci_bus *bus, unsigned int devfn, int where,
160 return PCIBIOS_SUCCESSFUL; 160 return PCIBIOS_SUCCESSFUL;
161} 161}
162 162
163static struct pci_ops iop3xx_ops = { 163struct pci_ops iop3xx_ops = {
164 .read = iop3xx_read_config, 164 .read = iop3xx_read_config,
165 .write = iop3xx_write_config, 165 .write = iop3xx_write_config,
166}; 166};
@@ -220,12 +220,6 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys)
220 return 1; 220 return 1;
221} 221}
222 222
223struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *sys)
224{
225 return pci_scan_root_bus(NULL, sys->busnr, &iop3xx_ops, sys,
226 &sys->resources);
227}
228
229void __init iop3xx_atu_setup(void) 223void __init iop3xx_atu_setup(void)
230{ 224{
231 /* BAR 0 ( Disabled ) */ 225 /* BAR 0 ( Disabled ) */
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index ecdb3da0dea9..c58d896cd5c3 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -916,6 +916,13 @@ void omap_start_dma(int lch)
916 l |= OMAP_DMA_CCR_BUFFERING_DISABLE; 916 l |= OMAP_DMA_CCR_BUFFERING_DISABLE;
917 l |= OMAP_DMA_CCR_EN; 917 l |= OMAP_DMA_CCR_EN;
918 918
919 /*
920 * As dma_write() uses IO accessors which are weakly ordered, there
921 * is no guarantee that data in coherent DMA memory will be visible
922 * to the DMA device. Add a memory barrier here to ensure that any
923 * such data is visible prior to enabling DMA.
924 */
925 mb();
919 p->dma_write(l, CCR, lch); 926 p->dma_write(l, CCR, lch);
920 927
921 dma_chan[lch].flags |= OMAP_DMA_ACTIVE; 928 dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
@@ -965,6 +972,13 @@ void omap_stop_dma(int lch)
965 p->dma_write(l, CCR, lch); 972 p->dma_write(l, CCR, lch);
966 } 973 }
967 974
975 /*
976 * Ensure that data transferred by DMA is visible to any access
977 * after DMA has been disabled. This is important for coherent
978 * DMA regions.
979 */
980 mb();
981
968 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 982 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
969 int next_lch, cur_lch = lch; 983 int next_lch, cur_lch = lch;
970 char dma_chan_link_map[dma_lch_count]; 984 char dma_chan_link_map[dma_lch_count];
diff --git a/arch/arm/plat-versatile/Kconfig b/arch/arm/plat-versatile/Kconfig
index 043f7b02a9e7..81ee7cc34457 100644
--- a/arch/arm/plat-versatile/Kconfig
+++ b/arch/arm/plat-versatile/Kconfig
@@ -5,6 +5,12 @@ config PLAT_VERSATILE_CLCD
5 5
6config PLAT_VERSATILE_FPGA_IRQ 6config PLAT_VERSATILE_FPGA_IRQ
7 bool 7 bool
8 select IRQ_DOMAIN
9
10config PLAT_VERSATILE_FPGA_IRQ_NR
11 int
12 default 4
13 depends on PLAT_VERSATILE_FPGA_IRQ
8 14
9config PLAT_VERSATILE_LEDS 15config PLAT_VERSATILE_LEDS
10 def_bool y if LEDS_CLASS 16 def_bool y if LEDS_CLASS
diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c
index f0cc8e19b094..6e70d03824a1 100644
--- a/arch/arm/plat-versatile/fpga-irq.c
+++ b/arch/arm/plat-versatile/fpga-irq.c
@@ -3,7 +3,10 @@
3 */ 3 */
4#include <linux/irq.h> 4#include <linux/irq.h>
5#include <linux/io.h> 5#include <linux/io.h>
6#include <linux/irqdomain.h>
7#include <linux/module.h>
6 8
9#include <asm/exception.h>
7#include <asm/mach/irq.h> 10#include <asm/mach/irq.h>
8#include <plat/fpga-irq.h> 11#include <plat/fpga-irq.h>
9 12
@@ -12,10 +15,32 @@
12#define IRQ_ENABLE_SET 0x08 15#define IRQ_ENABLE_SET 0x08
13#define IRQ_ENABLE_CLEAR 0x0c 16#define IRQ_ENABLE_CLEAR 0x0c
14 17
18/**
19 * struct fpga_irq_data - irq data container for the FPGA IRQ controller
20 * @base: memory offset in virtual memory
21 * @irq_start: first IRQ number handled by this instance
22 * @chip: chip container for this instance
23 * @domain: IRQ domain for this instance
24 * @valid: mask for valid IRQs on this controller
25 * @used_irqs: number of active IRQs on this controller
26 */
27struct fpga_irq_data {
28 void __iomem *base;
29 unsigned int irq_start;
30 struct irq_chip chip;
31 u32 valid;
32 struct irq_domain *domain;
33 u8 used_irqs;
34};
35
36/* we cannot allocate memory when the controllers are initially registered */
37static struct fpga_irq_data fpga_irq_devices[CONFIG_PLAT_VERSATILE_FPGA_IRQ_NR];
38static int fpga_irq_id;
39
15static void fpga_irq_mask(struct irq_data *d) 40static void fpga_irq_mask(struct irq_data *d)
16{ 41{
17 struct fpga_irq_data *f = irq_data_get_irq_chip_data(d); 42 struct fpga_irq_data *f = irq_data_get_irq_chip_data(d);
18 u32 mask = 1 << (d->irq - f->irq_start); 43 u32 mask = 1 << d->hwirq;
19 44
20 writel(mask, f->base + IRQ_ENABLE_CLEAR); 45 writel(mask, f->base + IRQ_ENABLE_CLEAR);
21} 46}
@@ -23,7 +48,7 @@ static void fpga_irq_mask(struct irq_data *d)
23static void fpga_irq_unmask(struct irq_data *d) 48static void fpga_irq_unmask(struct irq_data *d)
24{ 49{
25 struct fpga_irq_data *f = irq_data_get_irq_chip_data(d); 50 struct fpga_irq_data *f = irq_data_get_irq_chip_data(d);
26 u32 mask = 1 << (d->irq - f->irq_start); 51 u32 mask = 1 << d->hwirq;
27 52
28 writel(mask, f->base + IRQ_ENABLE_SET); 53 writel(mask, f->base + IRQ_ENABLE_SET);
29} 54}
@@ -41,32 +66,93 @@ static void fpga_irq_handle(unsigned int irq, struct irq_desc *desc)
41 do { 66 do {
42 irq = ffs(status) - 1; 67 irq = ffs(status) - 1;
43 status &= ~(1 << irq); 68 status &= ~(1 << irq);
44 69 generic_handle_irq(irq_find_mapping(f->domain, irq));
45 generic_handle_irq(irq + f->irq_start);
46 } while (status); 70 } while (status);
47} 71}
48 72
49void __init fpga_irq_init(int parent_irq, u32 valid, struct fpga_irq_data *f) 73/*
74 * Handle each interrupt in a single FPGA IRQ controller. Returns non-zero
75 * if we've handled at least one interrupt. This does a single read of the
76 * status register and handles all interrupts in order from LSB first.
77 */
78static int handle_one_fpga(struct fpga_irq_data *f, struct pt_regs *regs)
79{
80 int handled = 0;
81 int irq;
82 u32 status;
83
84 while ((status = readl(f->base + IRQ_STATUS))) {
85 irq = ffs(status) - 1;
86 handle_IRQ(irq_find_mapping(f->domain, irq), regs);
87 handled = 1;
88 }
89
90 return handled;
91}
92
93/*
94 * Keep iterating over all registered FPGA IRQ controllers until there are
95 * no pending interrupts.
96 */
97asmlinkage void __exception_irq_entry fpga_handle_irq(struct pt_regs *regs)
50{ 98{
51 unsigned int i; 99 int i, handled;
52 100
101 do {
102 for (i = 0, handled = 0; i < fpga_irq_id; ++i)
103 handled |= handle_one_fpga(&fpga_irq_devices[i], regs);
104 } while (handled);
105}
106
107static int fpga_irqdomain_map(struct irq_domain *d, unsigned int irq,
108 irq_hw_number_t hwirq)
109{
110 struct fpga_irq_data *f = d->host_data;
111
112 /* Skip invalid IRQs, only register handlers for the real ones */
113 if (!(f->valid & (1 << hwirq)))
114 return -ENOTSUPP;
115 irq_set_chip_data(irq, f);
116 irq_set_chip_and_handler(irq, &f->chip,
117 handle_level_irq);
118 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
119 f->used_irqs++;
120 return 0;
121}
122
123static struct irq_domain_ops fpga_irqdomain_ops = {
124 .map = fpga_irqdomain_map,
125 .xlate = irq_domain_xlate_onetwocell,
126};
127
128void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
129 int parent_irq, u32 valid, struct device_node *node)
130{
131 struct fpga_irq_data *f;
132
133 if (fpga_irq_id >= ARRAY_SIZE(fpga_irq_devices)) {
134 printk(KERN_ERR "%s: too few FPGA IRQ controllers, increase CONFIG_PLAT_VERSATILE_FPGA_IRQ_NR\n", __func__);
135 return;
136 }
137
138 f = &fpga_irq_devices[fpga_irq_id];
139 f->base = base;
140 f->irq_start = irq_start;
141 f->chip.name = name;
53 f->chip.irq_ack = fpga_irq_mask; 142 f->chip.irq_ack = fpga_irq_mask;
54 f->chip.irq_mask = fpga_irq_mask; 143 f->chip.irq_mask = fpga_irq_mask;
55 f->chip.irq_unmask = fpga_irq_unmask; 144 f->chip.irq_unmask = fpga_irq_unmask;
145 f->valid = valid;
56 146
57 if (parent_irq != -1) { 147 if (parent_irq != -1) {
58 irq_set_handler_data(parent_irq, f); 148 irq_set_handler_data(parent_irq, f);
59 irq_set_chained_handler(parent_irq, fpga_irq_handle); 149 irq_set_chained_handler(parent_irq, fpga_irq_handle);
60 } 150 }
61 151
62 for (i = 0; i < 32; i++) { 152 f->domain = irq_domain_add_legacy(node, fls(valid), f->irq_start, 0,
63 if (valid & (1 << i)) { 153 &fpga_irqdomain_ops, f);
64 unsigned int irq = f->irq_start + i; 154 pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs\n",
155 fpga_irq_id, name, base, f->used_irqs);
65 156
66 irq_set_chip_data(irq, f); 157 fpga_irq_id++;
67 irq_set_chip_and_handler(irq, &f->chip,
68 handle_level_irq);
69 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
70 }
71 }
72} 158}
diff --git a/arch/arm/plat-versatile/include/plat/fpga-irq.h b/arch/arm/plat-versatile/include/plat/fpga-irq.h
index 627fafd1e595..91bcfb67551d 100644
--- a/arch/arm/plat-versatile/include/plat/fpga-irq.h
+++ b/arch/arm/plat-versatile/include/plat/fpga-irq.h
@@ -1,12 +1,11 @@
1#ifndef PLAT_FPGA_IRQ_H 1#ifndef PLAT_FPGA_IRQ_H
2#define PLAT_FPGA_IRQ_H 2#define PLAT_FPGA_IRQ_H
3 3
4struct fpga_irq_data { 4struct device_node;
5 void __iomem *base; 5struct pt_regs;
6 unsigned int irq_start;
7 struct irq_chip chip;
8};
9 6
10void fpga_irq_init(int, u32, struct fpga_irq_data *); 7void fpga_handle_irq(struct pt_regs *regs);
8void fpga_irq_init(void __iomem *, const char *, int, int, u32,
9 struct device_node *node);
11 10
12#endif 11#endif
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index f9c9f33f8cbe..2997e56ce0dd 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -16,7 +16,7 @@
16# are merged into mainline or have been edited in the machine database 16# are merged into mainline or have been edited in the machine database
17# within the last 12 months. References to machine_is_NAME() do not count! 17# within the last 12 months. References to machine_is_NAME() do not count!
18# 18#
19# Last update: Tue Dec 6 11:07:38 2011 19# Last update: Thu Apr 26 08:44:23 2012
20# 20#
21# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 21# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
22# 22#
@@ -205,6 +205,7 @@ omap_fsample MACH_OMAP_FSAMPLE OMAP_FSAMPLE 970
205snapper_cl15 MACH_SNAPPER_CL15 SNAPPER_CL15 986 205snapper_cl15 MACH_SNAPPER_CL15 SNAPPER_CL15 986
206omap_palmz71 MACH_OMAP_PALMZ71 OMAP_PALMZ71 993 206omap_palmz71 MACH_OMAP_PALMZ71 OMAP_PALMZ71 993
207smdk2412 MACH_SMDK2412 SMDK2412 1009 207smdk2412 MACH_SMDK2412 SMDK2412 1009
208bkde303 MACH_BKDE303 BKDE303 1021
208smdk2413 MACH_SMDK2413 SMDK2413 1022 209smdk2413 MACH_SMDK2413 SMDK2413 1022
209aml_m5900 MACH_AML_M5900 AML_M5900 1024 210aml_m5900 MACH_AML_M5900 AML_M5900 1024
210balloon3 MACH_BALLOON3 BALLOON3 1029 211balloon3 MACH_BALLOON3 BALLOON3 1029
@@ -381,8 +382,6 @@ davinci_da850_evm MACH_DAVINCI_DA850_EVM DAVINCI_DA850_EVM 2157
381at91sam9g10ek MACH_AT91SAM9G10EK AT91SAM9G10EK 2159 382at91sam9g10ek MACH_AT91SAM9G10EK AT91SAM9G10EK 2159
382omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160 383omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160
383magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162 384magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162
384btmavb101 MACH_BTMAVB101 BTMAVB101 2172
385btmawb101 MACH_BTMAWB101 BTMAWB101 2173
386tx25 MACH_TX25 TX25 2177 385tx25 MACH_TX25 TX25 2177
387omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178 386omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178
388anw6410 MACH_ANW6410 ANW6410 2183 387anw6410 MACH_ANW6410 ANW6410 2183
@@ -397,7 +396,6 @@ net2big_v2 MACH_NET2BIG_V2 NET2BIG_V2 2204
397net5big_v2 MACH_NET5BIG_V2 NET5BIG_V2 2206 396net5big_v2 MACH_NET5BIG_V2 NET5BIG_V2 2206
398inetspace_v2 MACH_INETSPACE_V2 INETSPACE_V2 2208 397inetspace_v2 MACH_INETSPACE_V2 INETSPACE_V2 2208
399at91sam9g45ekes MACH_AT91SAM9G45EKES AT91SAM9G45EKES 2212 398at91sam9g45ekes MACH_AT91SAM9G45EKES AT91SAM9G45EKES 2212
400pc7302 MACH_PC7302 PC7302 2220
401spear600 MACH_SPEAR600 SPEAR600 2236 399spear600 MACH_SPEAR600 SPEAR600 2236
402spear300 MACH_SPEAR300 SPEAR300 2237 400spear300 MACH_SPEAR300 SPEAR300 2237
403lilly1131 MACH_LILLY1131 LILLY1131 2239 401lilly1131 MACH_LILLY1131 LILLY1131 2239
@@ -407,7 +405,6 @@ d2net MACH_D2NET D2NET 2282
407bigdisk MACH_BIGDISK BIGDISK 2283 405bigdisk MACH_BIGDISK BIGDISK 2283
408at91sam9g20ek_2mmc MACH_AT91SAM9G20EK_2MMC AT91SAM9G20EK_2MMC 2288 406at91sam9g20ek_2mmc MACH_AT91SAM9G20EK_2MMC AT91SAM9G20EK_2MMC 2288
409bcmring MACH_BCMRING BCMRING 2289 407bcmring MACH_BCMRING BCMRING 2289
410dp6xx MACH_DP6XX DP6XX 2302
411mahimahi MACH_MAHIMAHI MAHIMAHI 2304 408mahimahi MACH_MAHIMAHI MAHIMAHI 2304
412smdk6442 MACH_SMDK6442 SMDK6442 2324 409smdk6442 MACH_SMDK6442 SMDK6442 2324
413openrd_base MACH_OPENRD_BASE OPENRD_BASE 2325 410openrd_base MACH_OPENRD_BASE OPENRD_BASE 2325
@@ -444,8 +441,6 @@ mx28evk MACH_MX28EVK MX28EVK 2531
444smartq5 MACH_SMARTQ5 SMARTQ5 2534 441smartq5 MACH_SMARTQ5 SMARTQ5 2534
445davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548 442davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548
446mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 443mxt_td60 MACH_MXT_TD60 MXT_TD60 2550
447riot_bei2 MACH_RIOT_BEI2 RIOT_BEI2 2576
448riot_x37 MACH_RIOT_X37 RIOT_X37 2578
449pca101 MACH_PCA101 PCA101 2595 444pca101 MACH_PCA101 PCA101 2595
450capc7117 MACH_CAPC7117 CAPC7117 2612 445capc7117 MACH_CAPC7117 CAPC7117 2612
451icontrol MACH_ICONTROL ICONTROL 2624 446icontrol MACH_ICONTROL ICONTROL 2624
@@ -460,7 +455,6 @@ spear320 MACH_SPEAR320 SPEAR320 2661
460aquila MACH_AQUILA AQUILA 2676 455aquila MACH_AQUILA AQUILA 2676
461esata_sheevaplug MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 456esata_sheevaplug MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678
462msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679 457msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679
463ea2478devkit MACH_EA2478DEVKIT EA2478DEVKIT 2683
464terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697 458terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697
465msm7x25_surf MACH_MSM7X25_SURF MSM7X25_SURF 2703 459msm7x25_surf MACH_MSM7X25_SURF MSM7X25_SURF 2703
466msm7x25_ffa MACH_MSM7X25_FFA MSM7X25_FFA 2704 460msm7x25_ffa MACH_MSM7X25_FFA MSM7X25_FFA 2704
@@ -479,8 +473,6 @@ wbd222 MACH_WBD222 WBD222 2753
479msm8x60_surf MACH_MSM8X60_SURF MSM8X60_SURF 2755 473msm8x60_surf MACH_MSM8X60_SURF MSM8X60_SURF 2755
480msm8x60_sim MACH_MSM8X60_SIM MSM8X60_SIM 2756 474msm8x60_sim MACH_MSM8X60_SIM MSM8X60_SIM 2756
481tcc8000_sdk MACH_TCC8000_SDK TCC8000_SDK 2758 475tcc8000_sdk MACH_TCC8000_SDK TCC8000_SDK 2758
482nanos MACH_NANOS NANOS 2759
483stamp9g45 MACH_STAMP9G45 STAMP9G45 2761
484cns3420vb MACH_CNS3420VB CNS3420VB 2776 476cns3420vb MACH_CNS3420VB CNS3420VB 2776
485omap4_panda MACH_OMAP4_PANDA OMAP4_PANDA 2791 477omap4_panda MACH_OMAP4_PANDA OMAP4_PANDA 2791
486ti8168evm MACH_TI8168EVM TI8168EVM 2800 478ti8168evm MACH_TI8168EVM TI8168EVM 2800
@@ -490,12 +482,9 @@ eukrea_cpuimx35sd MACH_EUKREA_CPUIMX35SD EUKREA_CPUIMX35SD 2821
490eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822 482eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822
491eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823 483eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823
492smdkc210 MACH_SMDKC210 SMDKC210 2838 484smdkc210 MACH_SMDKC210 SMDKC210 2838
493pca102 MACH_PCA102 PCA102 2843 485pcaal1 MACH_PCAAL1 PCAAL1 2843
494t5325 MACH_T5325 T5325 2846 486t5325 MACH_T5325 T5325 2846
495income MACH_INCOME INCOME 2849 487income MACH_INCOME INCOME 2849
496vvbox_sdorig2 MACH_VVBOX_SDORIG2 VVBOX_SDORIG2 2857
497vvbox_sdlite2 MACH_VVBOX_SDLITE2 VVBOX_SDLITE2 2858
498vvbox_sdpro4 MACH_VVBOX_SDPRO4 VVBOX_SDPRO4 2859
499mx257sx MACH_MX257SX MX257SX 2861 488mx257sx MACH_MX257SX MX257SX 2861
500goni MACH_GONI GONI 2862 489goni MACH_GONI GONI 2862
501bv07 MACH_BV07 BV07 2882 490bv07 MACH_BV07 BV07 2882
@@ -504,6 +493,7 @@ devixp MACH_DEVIXP DEVIXP 2885
504miccpt MACH_MICCPT MICCPT 2886 493miccpt MACH_MICCPT MICCPT 2886
505mic256 MACH_MIC256 MIC256 2887 494mic256 MACH_MIC256 MIC256 2887
506u5500 MACH_U5500 U5500 2890 495u5500 MACH_U5500 U5500 2890
496pov15hd MACH_POV15HD POV15HD 2910
507linkstation_lschl MACH_LINKSTATION_LSCHL LINKSTATION_LSCHL 2913 497linkstation_lschl MACH_LINKSTATION_LSCHL LINKSTATION_LSCHL 2913
508smdkv310 MACH_SMDKV310 SMDKV310 2925 498smdkv310 MACH_SMDKV310 SMDKV310 2925
509wm8505_7in_netbook MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK 2928 499wm8505_7in_netbook MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK 2928
@@ -537,243 +527,24 @@ trimslice MACH_TRIMSLICE TRIMSLICE 3209
537mackerel MACH_MACKEREL MACKEREL 3211 527mackerel MACH_MACKEREL MACKEREL 3211
538kaen MACH_KAEN KAEN 3217 528kaen MACH_KAEN KAEN 3217
539nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220 529nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220
540dm6446_adbox MACH_DM6446_ADBOX DM6446_ADBOX 3226
541quad_salsa MACH_QUAD_SALSA QUAD_SALSA 3227
542abb_gma_1_1 MACH_ABB_GMA_1_1 ABB_GMA_1_1 3228
543svcid MACH_SVCID SVCID 3229
544msm8960_sim MACH_MSM8960_SIM MSM8960_SIM 3230 530msm8960_sim MACH_MSM8960_SIM MSM8960_SIM 3230
545msm8960_rumi3 MACH_MSM8960_RUMI3 MSM8960_RUMI3 3231 531msm8960_rumi3 MACH_MSM8960_RUMI3 MSM8960_RUMI3 3231
546icon_g MACH_ICON_G ICON_G 3232
547mb3 MACH_MB3 MB3 3233
548gsia18s MACH_GSIA18S GSIA18S 3234 532gsia18s MACH_GSIA18S GSIA18S 3234
549pivicc MACH_PIVICC PIVICC 3235
550pcm048 MACH_PCM048 PCM048 3236
551dds MACH_DDS DDS 3237
552chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238
553ts48xx MACH_TS48XX TS48XX 3239
554tonga2_tfttimer MACH_TONGA2_TFTTIMER TONGA2_TFTTIMER 3240
555whistler MACH_WHISTLER WHISTLER 3241
556asl_phoenix MACH_ASL_PHOENIX ASL_PHOENIX 3242
557at91sam9263otlite MACH_AT91SAM9263OTLITE AT91SAM9263OTLITE 3243
558ddplug MACH_DDPLUG DDPLUG 3244
559d2plug MACH_D2PLUG D2PLUG 3245
560kzm9d MACH_KZM9D KZM9D 3246
561verdi_lte MACH_VERDI_LTE VERDI_LTE 3247
562nanozoom MACH_NANOZOOM NANOZOOM 3248
563dm3730_som_lv MACH_DM3730_SOM_LV DM3730_SOM_LV 3249
564dm3730_torpedo MACH_DM3730_TORPEDO DM3730_TORPEDO 3250
565anchovy MACH_ANCHOVY ANCHOVY 3251
566re2rev20 MACH_RE2REV20 RE2REV20 3253
567re2rev21 MACH_RE2REV21 RE2REV21 3254
568cns21xx MACH_CNS21XX CNS21XX 3255
569rider MACH_RIDER RIDER 3257
570nsk330 MACH_NSK330 NSK330 3258
571cns2133evb MACH_CNS2133EVB CNS2133EVB 3259
572z3_816x_mod MACH_Z3_816X_MOD Z3_816X_MOD 3260
573z3_814x_mod MACH_Z3_814X_MOD Z3_814X_MOD 3261
574beect MACH_BEECT BEECT 3262
575dma_thunderbug MACH_DMA_THUNDERBUG DMA_THUNDERBUG 3263
576omn_at91sam9g20 MACH_OMN_AT91SAM9G20 OMN_AT91SAM9G20 3264
577mx25_e2s_uc MACH_MX25_E2S_UC MX25_E2S_UC 3265
578mione MACH_MIONE MIONE 3266
579top9000_tcu MACH_TOP9000_TCU TOP9000_TCU 3267
580top9000_bsl MACH_TOP9000_BSL TOP9000_BSL 3268
581kingdom MACH_KINGDOM KINGDOM 3269
582armadillo460 MACH_ARMADILLO460 ARMADILLO460 3270
583lq2 MACH_LQ2 LQ2 3271
584sweda_tms2 MACH_SWEDA_TMS2 SWEDA_TMS2 3272
585mx53_loco MACH_MX53_LOCO MX53_LOCO 3273 533mx53_loco MACH_MX53_LOCO MX53_LOCO 3273
586acer_a8 MACH_ACER_A8 ACER_A8 3275
587acer_gauguin MACH_ACER_GAUGUIN ACER_GAUGUIN 3276
588guppy MACH_GUPPY GUPPY 3277
589mx61_ard MACH_MX61_ARD MX61_ARD 3278
590tx53 MACH_TX53 TX53 3279 534tx53 MACH_TX53 TX53 3279
591omapl138_case_a3 MACH_OMAPL138_CASE_A3 OMAPL138_CASE_A3 3280
592uemd MACH_UEMD UEMD 3281
593ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282
594rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283
595encore MACH_ENCORE ENCORE 3284 535encore MACH_ENCORE ENCORE 3284
596hkdkc100 MACH_HKDKC100 HKDKC100 3285
597ts42xx MACH_TS42XX TS42XX 3286
598aebl MACH_AEBL AEBL 3287
599wario MACH_WARIO WARIO 3288 536wario MACH_WARIO WARIO 3288
600gfs_spm MACH_GFS_SPM GFS_SPM 3289
601cm_t3730 MACH_CM_T3730 CM_T3730 3290 537cm_t3730 MACH_CM_T3730 CM_T3730 3290
602isc3 MACH_ISC3 ISC3 3291
603rascal MACH_RASCAL RASCAL 3292
604hrefv60 MACH_HREFV60 HREFV60 3293 538hrefv60 MACH_HREFV60 HREFV60 3293
605tpt_2_0 MACH_TPT_2_0 TPT_2_0 3294
606splendor MACH_SPLENDOR SPLENDOR 3296
607msm8x60_qt MACH_MSM8X60_QT MSM8X60_QT 3298
608htc_hd_mini MACH_HTC_HD_MINI HTC_HD_MINI 3299
609athene MACH_ATHENE ATHENE 3300
610deep_r_ek_1 MACH_DEEP_R_EK_1 DEEP_R_EK_1 3301
611vivow_ct MACH_VIVOW_CT VIVOW_CT 3302
612nery_1000 MACH_NERY_1000 NERY_1000 3303
613rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304
614nmh MACH_NMH NMH 3305
615wn802t MACH_WN802T WN802T 3306
616dragonet MACH_DRAGONET DRAGONET 3307
617at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309
618bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310
619bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311
620koi MACH_KOI KOI 3312
621ts4800 MACH_TS4800 TS4800 3313
622tqma9263 MACH_TQMA9263 TQMA9263 3314
623holiday MACH_HOLIDAY HOLIDAY 3315
624pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317
625hwgw6410 MACH_HWGW6410 HWGW6410 3318
626shenzhou MACH_SHENZHOU SHENZHOU 3319
627cwme9210 MACH_CWME9210 CWME9210 3320
628cwme9210js MACH_CWME9210JS CWME9210JS 3321
629colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323
630w21 MACH_W21 W21 3324
631polysat1 MACH_POLYSAT1 POLYSAT1 3325
632dataway MACH_DATAWAY DATAWAY 3326
633cobral138 MACH_COBRAL138 COBRAL138 3327
634roverpcs8 MACH_ROVERPCS8 ROVERPCS8 3328
635marvelc MACH_MARVELC MARVELC 3329
636navefihid MACH_NAVEFIHID NAVEFIHID 3330
637dm365_cv100 MACH_DM365_CV100 DM365_CV100 3331
638able MACH_ABLE ABLE 3332
639legacy MACH_LEGACY LEGACY 3333
640icong MACH_ICONG ICONG 3334
641rover_g8 MACH_ROVER_G8 ROVER_G8 3335
642t5388p MACH_T5388P T5388P 3336
643dingo MACH_DINGO DINGO 3337
644goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338
645lanreadyfn511 MACH_LANREADYFN511 LANREADYFN511 3340
646omap3_baia MACH_OMAP3_BAIA OMAP3_BAIA 3341
647omap3smartdisplay MACH_OMAP3SMARTDISPLAY OMAP3SMARTDISPLAY 3342
648xilinx MACH_XILINX XILINX 3343
649a2f MACH_A2F A2F 3344
650sky25 MACH_SKY25 SKY25 3345
651ccmx53 MACH_CCMX53 CCMX53 3346
652ccmx53js MACH_CCMX53JS CCMX53JS 3347
653ccwmx53 MACH_CCWMX53 CCWMX53 3348
654ccwmx53js MACH_CCWMX53JS CCWMX53JS 3349
655frisms MACH_FRISMS FRISMS 3350
656msm7x27a_ffa MACH_MSM7X27A_FFA MSM7X27A_FFA 3351
657msm7x27a_surf MACH_MSM7X27A_SURF MSM7X27A_SURF 3352
658msm7x27a_rumi3 MACH_MSM7X27A_RUMI3 MSM7X27A_RUMI3 3353
659dimmsam9g20 MACH_DIMMSAM9G20 DIMMSAM9G20 3354
660dimm_imx28 MACH_DIMM_IMX28 DIMM_IMX28 3355
661amk_a4 MACH_AMK_A4 AMK_A4 3356
662gnet_sgme MACH_GNET_SGME GNET_SGME 3357
663shooter_u MACH_SHOOTER_U SHOOTER_U 3358
664vmx53 MACH_VMX53 VMX53 3359
665rhino MACH_RHINO RHINO 3360
666armlex4210 MACH_ARMLEX4210 ARMLEX4210 3361 539armlex4210 MACH_ARMLEX4210 ARMLEX4210 3361
667swarcoextmodem MACH_SWARCOEXTMODEM SWARCOEXTMODEM 3362
668snowball MACH_SNOWBALL SNOWBALL 3363 540snowball MACH_SNOWBALL SNOWBALL 3363
669pcm049 MACH_PCM049 PCM049 3364
670vigor MACH_VIGOR VIGOR 3365
671oslo_amundsen MACH_OSLO_AMUNDSEN OSLO_AMUNDSEN 3366
672gsl_diamond MACH_GSL_DIAMOND GSL_DIAMOND 3367
673cv2201 MACH_CV2201 CV2201 3368
674cv2202 MACH_CV2202 CV2202 3369
675cv2203 MACH_CV2203 CV2203 3370
676vit_ibox MACH_VIT_IBOX VIT_IBOX 3371
677dm6441_esp MACH_DM6441_ESP DM6441_ESP 3372
678at91sam9x5ek MACH_AT91SAM9X5EK AT91SAM9X5EK 3373
679libra MACH_LIBRA LIBRA 3374
680easycrrh MACH_EASYCRRH EASYCRRH 3375
681tripel MACH_TRIPEL TRIPEL 3376
682endian_mini MACH_ENDIAN_MINI ENDIAN_MINI 3377
683xilinx_ep107 MACH_XILINX_EP107 XILINX_EP107 3378 541xilinx_ep107 MACH_XILINX_EP107 XILINX_EP107 3378
684nuri MACH_NURI NURI 3379 542nuri MACH_NURI NURI 3379
685janus MACH_JANUS JANUS 3380
686ddnas MACH_DDNAS DDNAS 3381
687tag MACH_TAG TAG 3382
688tagw MACH_TAGW TAGW 3383
689nitrogen_vm_imx51 MACH_NITROGEN_VM_IMX51 NITROGEN_VM_IMX51 3384
690viprinet MACH_VIPRINET VIPRINET 3385
691bockw MACH_BOCKW BOCKW 3386
692eva2000 MACH_EVA2000 EVA2000 3387
693steelyard MACH_STEELYARD STEELYARD 3388
694nsslsboard MACH_NSSLSBOARD NSSLSBOARD 3392
695geneva_b5 MACH_GENEVA_B5 GENEVA_B5 3393
696spear1340 MACH_SPEAR1340 SPEAR1340 3394
697rexmas MACH_REXMAS REXMAS 3395
698msm8960_cdp MACH_MSM8960_CDP MSM8960_CDP 3396
699msm8960_fluid MACH_MSM8960_FLUID MSM8960_FLUID 3398
700msm8960_apq MACH_MSM8960_APQ MSM8960_APQ 3399
701helios_v2 MACH_HELIOS_V2 HELIOS_V2 3400
702mif10p MACH_MIF10P MIF10P 3401
703iam28 MACH_IAM28 IAM28 3402
704picasso MACH_PICASSO PICASSO 3403
705mr301a MACH_MR301A MR301A 3404
706notle MACH_NOTLE NOTLE 3405
707eelx2 MACH_EELX2 EELX2 3406
708moon MACH_MOON MOON 3407
709ruby MACH_RUBY RUBY 3408
710goldengate MACH_GOLDENGATE GOLDENGATE 3409
711ctbu_gen2 MACH_CTBU_GEN2 CTBU_GEN2 3410
712kmp_am17_01 MACH_KMP_AM17_01 KMP_AM17_01 3411
713wtplug MACH_WTPLUG WTPLUG 3412 543wtplug MACH_WTPLUG WTPLUG 3412
714mx27su2 MACH_MX27SU2 MX27SU2 3413
715nb31 MACH_NB31 NB31 3414
716hjsdu MACH_HJSDU HJSDU 3415
717td3_rev1 MACH_TD3_REV1 TD3_REV1 3416
718eag_ci4000 MACH_EAG_CI4000 EAG_CI4000 3417
719net5big_nand_v2 MACH_NET5BIG_NAND_V2 NET5BIG_NAND_V2 3418
720cpx2 MACH_CPX2 CPX2 3419
721net2big_nand_v2 MACH_NET2BIG_NAND_V2 NET2BIG_NAND_V2 3420
722ecuv5 MACH_ECUV5 ECUV5 3421
723hsgx6d MACH_HSGX6D HSGX6D 3422
724dawad7 MACH_DAWAD7 DAWAD7 3423
725sam9repeater MACH_SAM9REPEATER SAM9REPEATER 3424
726gt_i5700 MACH_GT_I5700 GT_I5700 3425
727ctera_plug_c2 MACH_CTERA_PLUG_C2 CTERA_PLUG_C2 3426
728marvelct MACH_MARVELCT MARVELCT 3427
729ag11005 MACH_AG11005 AG11005 3428
730vangogh MACH_VANGOGH VANGOGH 3430
731matrix505 MACH_MATRIX505 MATRIX505 3431
732oce_nigma MACH_OCE_NIGMA OCE_NIGMA 3432
733t55 MACH_T55 T55 3433
734bio3k MACH_BIO3K BIO3K 3434
735expressct MACH_EXPRESSCT EXPRESSCT 3435
736cardhu MACH_CARDHU CARDHU 3436
737aruba MACH_ARUBA ARUBA 3437
738bonaire MACH_BONAIRE BONAIRE 3438
739nuc700evb MACH_NUC700EVB NUC700EVB 3439
740nuc710evb MACH_NUC710EVB NUC710EVB 3440
741nuc740evb MACH_NUC740EVB NUC740EVB 3441
742nuc745evb MACH_NUC745EVB NUC745EVB 3442
743transcede MACH_TRANSCEDE TRANSCEDE 3443
744mora MACH_MORA MORA 3444
745nda_evm MACH_NDA_EVM NDA_EVM 3445
746timu MACH_TIMU TIMU 3446
747expressh MACH_EXPRESSH EXPRESSH 3447
748veridis_a300 MACH_VERIDIS_A300 VERIDIS_A300 3448 544veridis_a300 MACH_VERIDIS_A300 VERIDIS_A300 3448
749dm368_leopard MACH_DM368_LEOPARD DM368_LEOPARD 3449
750omap_mcop MACH_OMAP_MCOP OMAP_MCOP 3450
751tritip MACH_TRITIP TRITIP 3451
752sm1k MACH_SM1K SM1K 3452
753monch MACH_MONCH MONCH 3453
754curacao MACH_CURACAO CURACAO 3454
755origen MACH_ORIGEN ORIGEN 3455 545origen MACH_ORIGEN ORIGEN 3455
756epc10 MACH_EPC10 EPC10 3456
757sgh_i740 MACH_SGH_I740 SGH_I740 3457
758tuna MACH_TUNA TUNA 3458
759mx51_tulip MACH_MX51_TULIP MX51_TULIP 3459
760mx51_aster7 MACH_MX51_ASTER7 MX51_ASTER7 3460
761acro37xbrd MACH_ACRO37XBRD ACRO37XBRD 3461
762elke MACH_ELKE ELKE 3462
763sbc6000x MACH_SBC6000X SBC6000X 3463
764r1801e MACH_R1801E R1801E 3464
765h1600 MACH_H1600 H1600 3465
766mini210 MACH_MINI210 MINI210 3466
767mini8168 MACH_MINI8168 MINI8168 3467
768pc7308 MACH_PC7308 PC7308 3468
769kmm2m01 MACH_KMM2M01 KMM2M01 3470
770mx51erebus MACH_MX51EREBUS MX51EREBUS 3471
771wm8650refboard MACH_WM8650REFBOARD WM8650REFBOARD 3472 546wm8650refboard MACH_WM8650REFBOARD WM8650REFBOARD 3472
772tuxrail MACH_TUXRAIL TUXRAIL 3473
773arthur MACH_ARTHUR ARTHUR 3474
774doorboy MACH_DOORBOY DOORBOY 3475
775xarina MACH_XARINA XARINA 3476 547xarina MACH_XARINA XARINA 3476
776roverx7 MACH_ROVERX7 ROVERX7 3477
777sdvr MACH_SDVR SDVR 3478 548sdvr MACH_SDVR SDVR 3478
778acer_maya MACH_ACER_MAYA ACER_MAYA 3479 549acer_maya MACH_ACER_MAYA ACER_MAYA 3479
779pico MACH_PICO PICO 3480 550pico MACH_PICO PICO 3480
@@ -999,6 +770,7 @@ promwad_jade MACH_PROMWAD_JADE PROMWAD_JADE 3708
999amp MACH_AMP AMP 3709 770amp MACH_AMP AMP 3709
1000gnet_amp MACH_GNET_AMP GNET_AMP 3710 771gnet_amp MACH_GNET_AMP GNET_AMP 3710
1001toques MACH_TOQUES TOQUES 3711 772toques MACH_TOQUES TOQUES 3711
773apx4devkit MACH_APX4DEVKIT APX4DEVKIT 3712
1002dct_storm MACH_DCT_STORM DCT_STORM 3713 774dct_storm MACH_DCT_STORM DCT_STORM 3713
1003owl MACH_OWL OWL 3715 775owl MACH_OWL OWL 3715
1004cogent_csb1741 MACH_COGENT_CSB1741 COGENT_CSB1741 3716 776cogent_csb1741 MACH_COGENT_CSB1741 COGENT_CSB1741 3716
@@ -1063,7 +835,6 @@ shelter MACH_SHELTER SHELTER 3778
1063omap3_devkit8500 MACH_OMAP3_DEVKIT8500 OMAP3_DEVKIT8500 3779 835omap3_devkit8500 MACH_OMAP3_DEVKIT8500 OMAP3_DEVKIT8500 3779
1064edgetd MACH_EDGETD EDGETD 3780 836edgetd MACH_EDGETD EDGETD 3780
1065copperyard MACH_COPPERYARD COPPERYARD 3781 837copperyard MACH_COPPERYARD COPPERYARD 3781
1066edge MACH_EDGE EDGE 3782
1067edge_u MACH_EDGE_U EDGE_U 3783 838edge_u MACH_EDGE_U EDGE_U 3783
1068edge_td MACH_EDGE_TD EDGE_TD 3784 839edge_td MACH_EDGE_TD EDGE_TD 3784
1069wdss MACH_WDSS WDSS 3785 840wdss MACH_WDSS WDSS 3785
@@ -1169,3 +940,269 @@ elite_ulk MACH_ELITE_ULK ELITE_ULK 3888
1169pov2 MACH_POV2 POV2 3889 940pov2 MACH_POV2 POV2 3889
1170ipod_touch_2g MACH_IPOD_TOUCH_2G IPOD_TOUCH_2G 3890 941ipod_touch_2g MACH_IPOD_TOUCH_2G IPOD_TOUCH_2G 3890
1171da850_pqab MACH_DA850_PQAB DA850_PQAB 3891 942da850_pqab MACH_DA850_PQAB DA850_PQAB 3891
943fermi MACH_FERMI FERMI 3892
944ccardwmx28 MACH_CCARDWMX28 CCARDWMX28 3893
945ccardmx28 MACH_CCARDMX28 CCARDMX28 3894
946fs20_fcm2050 MACH_FS20_FCM2050 FS20_FCM2050 3895
947kinetis MACH_KINETIS KINETIS 3896
948kai MACH_KAI KAI 3897
949bcthb2 MACH_BCTHB2 BCTHB2 3898
950inels3_cu MACH_INELS3_CU INELS3_CU 3899
951da850_apollo MACH_DA850_APOLLO DA850_APOLLO 3901
952tracnas MACH_TRACNAS TRACNAS 3902
953mityarm335x MACH_MITYARM335X MITYARM335X 3903
954xcgz7x MACH_XCGZ7X XCGZ7X 3904
955cubox MACH_CUBOX CUBOX 3905
956terminator MACH_TERMINATOR TERMINATOR 3906
957eye03 MACH_EYE03 EYE03 3907
958kota3 MACH_KOTA3 KOTA3 3908
959pscpe MACH_PSCPE PSCPE 3910
960akt1100 MACH_AKT1100 AKT1100 3911
961pcaaxl2 MACH_PCAAXL2 PCAAXL2 3912
962primodd_ct MACH_PRIMODD_CT PRIMODD_CT 3913
963nsbc MACH_NSBC NSBC 3914
964meson2_skt MACH_MESON2_SKT MESON2_SKT 3915
965meson2_ref MACH_MESON2_REF MESON2_REF 3916
966ccardwmx28js MACH_CCARDWMX28JS CCARDWMX28JS 3917
967ccardmx28js MACH_CCARDMX28JS CCARDMX28JS 3918
968indico MACH_INDICO INDICO 3919
969msm8960dt MACH_MSM8960DT MSM8960DT 3920
970primods MACH_PRIMODS PRIMODS 3921
971beluga_m1388 MACH_BELUGA_M1388 BELUGA_M1388 3922
972primotd MACH_PRIMOTD PRIMOTD 3923
973varan_master MACH_VARAN_MASTER VARAN_MASTER 3924
974primodd MACH_PRIMODD PRIMODD 3925
975jetduo MACH_JETDUO JETDUO 3926
976mx53_umobo MACH_MX53_UMOBO MX53_UMOBO 3927
977trats MACH_TRATS TRATS 3928
978starcraft MACH_STARCRAFT STARCRAFT 3929
979qseven_tegra2 MACH_QSEVEN_TEGRA2 QSEVEN_TEGRA2 3930
980lichee_sun4i_devbd MACH_LICHEE_SUN4I_DEVBD LICHEE_SUN4I_DEVBD 3931
981movenow MACH_MOVENOW MOVENOW 3932
982golf_u MACH_GOLF_U GOLF_U 3933
983msm7627a_evb MACH_MSM7627A_EVB MSM7627A_EVB 3934
984rambo MACH_RAMBO RAMBO 3935
985golfu MACH_GOLFU GOLFU 3936
986mango310 MACH_MANGO310 MANGO310 3937
987dns343 MACH_DNS343 DNS343 3938
988var_som_om44 MACH_VAR_SOM_OM44 VAR_SOM_OM44 3939
989naon MACH_NAON NAON 3940
990vp4000 MACH_VP4000 VP4000 3941
991impcard MACH_IMPCARD IMPCARD 3942
992smoovcam MACH_SMOOVCAM SMOOVCAM 3943
993cobham3725 MACH_COBHAM3725 COBHAM3725 3944
994cobham3730 MACH_COBHAM3730 COBHAM3730 3945
995cobham3703 MACH_COBHAM3703 COBHAM3703 3946
996quetzal MACH_QUETZAL QUETZAL 3947
997apq8064_cdp MACH_APQ8064_CDP APQ8064_CDP 3948
998apq8064_mtp MACH_APQ8064_MTP APQ8064_MTP 3949
999apq8064_fluid MACH_APQ8064_FLUID APQ8064_FLUID 3950
1000apq8064_liquid MACH_APQ8064_LIQUID APQ8064_LIQUID 3951
1001mango210 MACH_MANGO210 MANGO210 3952
1002mango100 MACH_MANGO100 MANGO100 3953
1003mango24 MACH_MANGO24 MANGO24 3954
1004mango64 MACH_MANGO64 MANGO64 3955
1005nsa320 MACH_NSA320 NSA320 3956
1006elv_ccu2 MACH_ELV_CCU2 ELV_CCU2 3957
1007triton_x00 MACH_TRITON_X00 TRITON_X00 3958
1008triton_1500_2000 MACH_TRITON_1500_2000 TRITON_1500_2000 3959
1009pogoplugv4 MACH_POGOPLUGV4 POGOPLUGV4 3960
1010venus_cl MACH_VENUS_CL VENUS_CL 3961
1011vulcano_g20 MACH_VULCANO_G20 VULCANO_G20 3962
1012sgs_i9100 MACH_SGS_I9100 SGS_I9100 3963
1013stsv2 MACH_STSV2 STSV2 3964
1014csb1724 MACH_CSB1724 CSB1724 3965
1015omapl138_lcdk MACH_OMAPL138_LCDK OMAPL138_LCDK 3966
1016pvd_mx25 MACH_PVD_MX25 PVD_MX25 3968
1017meson6_skt MACH_MESON6_SKT MESON6_SKT 3969
1018meson6_ref MACH_MESON6_REF MESON6_REF 3970
1019pxm MACH_PXM PXM 3971
1020pogoplugv3 MACH_POGOPLUGV3 POGOPLUGV3 3973
1021mlp89626 MACH_MLP89626 MLP89626 3974
1022iomegahmndce MACH_IOMEGAHMNDCE IOMEGAHMNDCE 3975
1023pogoplugv3pci MACH_POGOPLUGV3PCI POGOPLUGV3PCI 3976
1024bntv250 MACH_BNTV250 BNTV250 3977
1025mx53_qseven MACH_MX53_QSEVEN MX53_QSEVEN 3978
1026gtl_it1100 MACH_GTL_IT1100 GTL_IT1100 3979
1027mx6q_sabresd MACH_MX6Q_SABRESD MX6Q_SABRESD 3980
1028mt4 MACH_MT4 MT4 3981
1029jumbo_d MACH_JUMBO_D JUMBO_D 3982
1030jumbo_i MACH_JUMBO_I JUMBO_I 3983
1031fs20_dmp MACH_FS20_DMP FS20_DMP 3984
1032dns320 MACH_DNS320 DNS320 3985
1033mx28bacos MACH_MX28BACOS MX28BACOS 3986
1034tl80 MACH_TL80 TL80 3987
1035polatis_nic_1001 MACH_POLATIS_NIC_1001 POLATIS_NIC_1001 3988
1036tely MACH_TELY TELY 3989
1037u8520 MACH_U8520 U8520 3990
1038manta MACH_MANTA MANTA 3991
1039mpq8064_cdp MACH_MPQ8064_CDP MPQ8064_CDP 3993
1040mpq8064_dtv MACH_MPQ8064_DTV MPQ8064_DTV 3995
1041dm368som MACH_DM368SOM DM368SOM 3996
1042gprisb2 MACH_GPRISB2 GPRISB2 3997
1043chammid MACH_CHAMMID CHAMMID 3998
1044seoul2 MACH_SEOUL2 SEOUL2 3999
1045omap4_nooktablet MACH_OMAP4_NOOKTABLET OMAP4_NOOKTABLET 4000
1046aalto MACH_AALTO AALTO 4001
1047metro MACH_METRO METRO 4002
1048cydm3730 MACH_CYDM3730 CYDM3730 4003
1049tqma53 MACH_TQMA53 TQMA53 4004
1050msm7627a_qrd3 MACH_MSM7627A_QRD3 MSM7627A_QRD3 4005
1051mx28_canby MACH_MX28_CANBY MX28_CANBY 4006
1052tiger MACH_TIGER TIGER 4007
1053pcats_9307_type_a MACH_PCATS_9307_TYPE_A PCATS_9307_TYPE_A 4008
1054pcats_9307_type_o MACH_PCATS_9307_TYPE_O PCATS_9307_TYPE_O 4009
1055pcats_9307_type_r MACH_PCATS_9307_TYPE_R PCATS_9307_TYPE_R 4010
1056streamplug MACH_STREAMPLUG STREAMPLUG 4011
1057icechicken_dev MACH_ICECHICKEN_DEV ICECHICKEN_DEV 4012
1058hedgehog MACH_HEDGEHOG HEDGEHOG 4013
1059yusend_obc MACH_YUSEND_OBC YUSEND_OBC 4014
1060imxninja MACH_IMXNINJA IMXNINJA 4015
1061omap4_jarod MACH_OMAP4_JAROD OMAP4_JAROD 4016
1062eco5_pk MACH_ECO5_PK ECO5_PK 4017
1063qj2440 MACH_QJ2440 QJ2440 4018
1064mx6q_mercury MACH_MX6Q_MERCURY MX6Q_MERCURY 4019
1065cm6810 MACH_CM6810 CM6810 4020
1066omap4_torpedo MACH_OMAP4_TORPEDO OMAP4_TORPEDO 4021
1067nsa310 MACH_NSA310 NSA310 4022
1068tmx536 MACH_TMX536 TMX536 4023
1069ktt20 MACH_KTT20 KTT20 4024
1070dragonix MACH_DRAGONIX DRAGONIX 4025
1071lungching MACH_LUNGCHING LUNGCHING 4026
1072bulogics MACH_BULOGICS BULOGICS 4027
1073mx535_sx MACH_MX535_SX MX535_SX 4028
1074ngui3250 MACH_NGUI3250 NGUI3250 4029
1075salutec_dac MACH_SALUTEC_DAC SALUTEC_DAC 4030
1076loco MACH_LOCO LOCO 4031
1077ctera_plug_usi MACH_CTERA_PLUG_USI CTERA_PLUG_USI 4032
1078scepter MACH_SCEPTER SCEPTER 4033
1079sga MACH_SGA SGA 4034
1080p_81_j5 MACH_P_81_J5 P_81_J5 4035
1081p_81_o4 MACH_P_81_O4 P_81_O4 4036
1082msm8625_surf MACH_MSM8625_SURF MSM8625_SURF 4037
1083carallon_shark MACH_CARALLON_SHARK CARALLON_SHARK 4038
1084ordog MACH_ORDOG ORDOG 4040
1085puente_io MACH_PUENTE_IO PUENTE_IO 4041
1086msm8625_evb MACH_MSM8625_EVB MSM8625_EVB 4042
1087ev_am1707 MACH_EV_AM1707 EV_AM1707 4043
1088ev_am1707e2 MACH_EV_AM1707E2 EV_AM1707E2 4044
1089ev_am3517e2 MACH_EV_AM3517E2 EV_AM3517E2 4045
1090calabria MACH_CALABRIA CALABRIA 4046
1091ev_imx287 MACH_EV_IMX287 EV_IMX287 4047
1092erau MACH_ERAU ERAU 4048
1093sichuan MACH_SICHUAN SICHUAN 4049
1094davinci_da850 MACH_DAVINCI_DA850 DAVINCI_DA850 4051
1095omap138_trunarc MACH_OMAP138_TRUNARC OMAP138_TRUNARC 4052
1096bcm4761 MACH_BCM4761 BCM4761 4053
1097picasso_e2 MACH_PICASSO_E2 PICASSO_E2 4054
1098picasso_mf MACH_PICASSO_MF PICASSO_MF 4055
1099miro MACH_MIRO MIRO 4056
1100at91sam9g20ewon3 MACH_AT91SAM9G20EWON3 AT91SAM9G20EWON3 4057
1101yoyo MACH_YOYO YOYO 4058
1102windjkl MACH_WINDJKL WINDJKL 4059
1103monarudo MACH_MONARUDO MONARUDO 4060
1104batan MACH_BATAN BATAN 4061
1105tadao MACH_TADAO TADAO 4062
1106baso MACH_BASO BASO 4063
1107mahon MACH_MAHON MAHON 4064
1108villec2 MACH_VILLEC2 VILLEC2 4065
1109asi1230 MACH_ASI1230 ASI1230 4066
1110alaska MACH_ALASKA ALASKA 4067
1111swarco_shdsl2 MACH_SWARCO_SHDSL2 SWARCO_SHDSL2 4068
1112oxrtu MACH_OXRTU OXRTU 4069
1113omap5_panda MACH_OMAP5_PANDA OMAP5_PANDA 4070
1114c8000 MACH_C8000 C8000 4072
1115bje_display3_5 MACH_BJE_DISPLAY3_5 BJE_DISPLAY3_5 4073
1116picomod7 MACH_PICOMOD7 PICOMOD7 4074
1117picocom5 MACH_PICOCOM5 PICOCOM5 4075
1118qblissa8 MACH_QBLISSA8 QBLISSA8 4076
1119armstonea8 MACH_ARMSTONEA8 ARMSTONEA8 4077
1120netdcu14 MACH_NETDCU14 NETDCU14 4078
1121at91sam9x5_epiphan MACH_AT91SAM9X5_EPIPHAN AT91SAM9X5_EPIPHAN 4079
1122p2u MACH_P2U P2U 4080
1123doris MACH_DORIS DORIS 4081
1124j49 MACH_J49 J49 4082
1125vdss2e MACH_VDSS2E VDSS2E 4083
1126vc300 MACH_VC300 VC300 4084
1127ns115_pad_test MACH_NS115_PAD_TEST NS115_PAD_TEST 4085
1128ns115_pad_ref MACH_NS115_PAD_REF NS115_PAD_REF 4086
1129ns115_phone_test MACH_NS115_PHONE_TEST NS115_PHONE_TEST 4087
1130ns115_phone_ref MACH_NS115_PHONE_REF NS115_PHONE_REF 4088
1131golfc MACH_GOLFC GOLFC 4089
1132xerox_olympus MACH_XEROX_OLYMPUS XEROX_OLYMPUS 4090
1133mx6sl_arm2 MACH_MX6SL_ARM2 MX6SL_ARM2 4091
1134csb1701_csb1726 MACH_CSB1701_CSB1726 CSB1701_CSB1726 4092
1135at91sam9xeek MACH_AT91SAM9XEEK AT91SAM9XEEK 4093
1136ebv210 MACH_EBV210 EBV210 4094
1137msm7627a_qrd7 MACH_MSM7627A_QRD7 MSM7627A_QRD7 4095
1138svthin MACH_SVTHIN SVTHIN 4096
1139duovero MACH_DUOVERO DUOVERO 4097
1140chupacabra MACH_CHUPACABRA CHUPACABRA 4098
1141scorpion MACH_SCORPION SCORPION 4099
1142davinci_he_hmi10 MACH_DAVINCI_HE_HMI10 DAVINCI_HE_HMI10 4100
1143topkick MACH_TOPKICK TOPKICK 4101
1144m3_auguestrush MACH_M3_AUGUESTRUSH M3_AUGUESTRUSH 4102
1145ipc335x MACH_IPC335X IPC335X 4103
1146sun4i MACH_SUN4I SUN4I 4104
1147imx233_olinuxino MACH_IMX233_OLINUXINO IMX233_OLINUXINO 4105
1148k2_wl MACH_K2_WL K2_WL 4106
1149k2_ul MACH_K2_UL K2_UL 4107
1150k2_cl MACH_K2_CL K2_CL 4108
1151minbari_w MACH_MINBARI_W MINBARI_W 4109
1152minbari_m MACH_MINBARI_M MINBARI_M 4110
1153k035 MACH_K035 K035 4111
1154ariel MACH_ARIEL ARIEL 4112
1155arielsaarc MACH_ARIELSAARC ARIELSAARC 4113
1156arieldkb MACH_ARIELDKB ARIELDKB 4114
1157armadillo810 MACH_ARMADILLO810 ARMADILLO810 4115
1158tam335x MACH_TAM335X TAM335X 4116
1159grouper MACH_GROUPER GROUPER 4117
1160mpcsa21_9g20 MACH_MPCSA21_9G20 MPCSA21_9G20 4118
1161m6u_cpu MACH_M6U_CPU M6U_CPU 4119
1162davinci_dp10 MACH_DAVINCI_DP10 DAVINCI_DP10 4120
1163ginkgo MACH_GINKGO GINKGO 4121
1164cgt_qmx6 MACH_CGT_QMX6 CGT_QMX6 4122
1165profpga MACH_PROFPGA PROFPGA 4123
1166acfx100oc MACH_ACFX100OC ACFX100OC 4124
1167acfx100nb MACH_ACFX100NB ACFX100NB 4125
1168capricorn MACH_CAPRICORN CAPRICORN 4126
1169pisces MACH_PISCES PISCES 4127
1170aries MACH_ARIES ARIES 4128
1171cancer MACH_CANCER CANCER 4129
1172leo MACH_LEO LEO 4130
1173virgo MACH_VIRGO VIRGO 4131
1174sagittarius MACH_SAGITTARIUS SAGITTARIUS 4132
1175devil MACH_DEVIL DEVIL 4133
1176ballantines MACH_BALLANTINES BALLANTINES 4134
1177omap3_procerusvpu MACH_OMAP3_PROCERUSVPU OMAP3_PROCERUSVPU 4135
1178my27 MACH_MY27 MY27 4136
1179sun6i MACH_SUN6I SUN6I 4137
1180sun5i MACH_SUN5I SUN5I 4138
1181mx512_mx MACH_MX512_MX MX512_MX 4139
1182kzm9g MACH_KZM9G KZM9G 4140
1183vdstbn MACH_VDSTBN VDSTBN 4141
1184cfa10036 MACH_CFA10036 CFA10036 4142
1185cfa10049 MACH_CFA10049 CFA10049 4143
1186pcm051 MACH_PCM051 PCM051 4144
1187vybrid_vf7xx MACH_VYBRID_VF7XX VYBRID_VF7XX 4145
1188vybrid_vf6xx MACH_VYBRID_VF6XX VYBRID_VF6XX 4146
1189vybrid_vf5xx MACH_VYBRID_VF5XX VYBRID_VF5XX 4147
1190vybrid_vf4xx MACH_VYBRID_VF4XX VYBRID_VF4XX 4148
1191aria_g25 MACH_ARIA_G25 ARIA_G25 4149
1192bcm21553 MACH_BCM21553 BCM21553 4150
1193smdk5410 MACH_SMDK5410 SMDK5410 4151
1194lpc18xx MACH_LPC18XX LPC18XX 4152
1195oratisparty MACH_ORATISPARTY ORATISPARTY 4153
1196qseven MACH_QSEVEN QSEVEN 4154
1197gmv_generic MACH_GMV_GENERIC GMV_GENERIC 4155
1198th_link_eth MACH_TH_LINK_ETH TH_LINK_ETH 4156
1199tn_muninn MACH_TN_MUNINN TN_MUNINN 4157
1200rampage MACH_RAMPAGE RAMPAGE 4158
1201visstrim_mv10 MACH_VISSTRIM_MV10 VISSTRIM_MV10 4159
1202mx28_wilma MACH_MX28_WILMA MX28_WILMA 4164
1203msm8625_ffa MACH_MSM8625_FFA MSM8625_FFA 4166
1204vpu101 MACH_VPU101 VPU101 4167
1205baileys MACH_BAILEYS BAILEYS 4169
1206familybox MACH_FAMILYBOX FAMILYBOX 4170
1207ensemble_mx35 MACH_ENSEMBLE_MX35 ENSEMBLE_MX35 4171
1208sc_sps_1 MACH_SC_SPS_1 SC_SPS_1 4172
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 858748eaa144..b0197b2c857d 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -11,12 +11,15 @@
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/cpu.h> 12#include <linux/cpu.h>
13#include <linux/cpu_pm.h> 13#include <linux/cpu_pm.h>
14#include <linux/hardirq.h>
14#include <linux/kernel.h> 15#include <linux/kernel.h>
15#include <linux/notifier.h> 16#include <linux/notifier.h>
16#include <linux/signal.h> 17#include <linux/signal.h>
17#include <linux/sched.h> 18#include <linux/sched.h>
18#include <linux/smp.h> 19#include <linux/smp.h>
19#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/uaccess.h>
22#include <linux/user.h>
20 23
21#include <asm/cp15.h> 24#include <asm/cp15.h>
22#include <asm/cputype.h> 25#include <asm/cputype.h>
@@ -430,7 +433,10 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
430 433
431static void vfp_enable(void *unused) 434static void vfp_enable(void *unused)
432{ 435{
433 u32 access = get_copro_access(); 436 u32 access;
437
438 BUG_ON(preemptible());
439 access = get_copro_access();
434 440
435 /* 441 /*
436 * Enable full access to VFP (cp10 and cp11) 442 * Enable full access to VFP (cp10 and cp11)
@@ -529,6 +535,93 @@ void vfp_flush_hwstate(struct thread_info *thread)
529} 535}
530 536
531/* 537/*
538 * Save the current VFP state into the provided structures and prepare
539 * for entry into a new function (signal handler).
540 */
541int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp,
542 struct user_vfp_exc __user *ufp_exc)
543{
544 struct thread_info *thread = current_thread_info();
545 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
546 int err = 0;
547
548 /* Ensure that the saved hwstate is up-to-date. */
549 vfp_sync_hwstate(thread);
550
551 /*
552 * Copy the floating point registers. There can be unused
553 * registers see asm/hwcap.h for details.
554 */
555 err |= __copy_to_user(&ufp->fpregs, &hwstate->fpregs,
556 sizeof(hwstate->fpregs));
557 /*
558 * Copy the status and control register.
559 */
560 __put_user_error(hwstate->fpscr, &ufp->fpscr, err);
561
562 /*
563 * Copy the exception registers.
564 */
565 __put_user_error(hwstate->fpexc, &ufp_exc->fpexc, err);
566 __put_user_error(hwstate->fpinst, &ufp_exc->fpinst, err);
567 __put_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err);
568
569 if (err)
570 return -EFAULT;
571
572 /* Ensure that VFP is disabled. */
573 vfp_flush_hwstate(thread);
574
575 /*
576 * As per the PCS, clear the length and stride bits for function
577 * entry.
578 */
579 hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
580 return 0;
581}
582
583/* Sanitise and restore the current VFP state from the provided structures. */
584int vfp_restore_user_hwstate(struct user_vfp __user *ufp,
585 struct user_vfp_exc __user *ufp_exc)
586{
587 struct thread_info *thread = current_thread_info();
588 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
589 unsigned long fpexc;
590 int err = 0;
591
592 /* Disable VFP to avoid corrupting the new thread state. */
593 vfp_flush_hwstate(thread);
594
595 /*
596 * Copy the floating point registers. There can be unused
597 * registers see asm/hwcap.h for details.
598 */
599 err |= __copy_from_user(&hwstate->fpregs, &ufp->fpregs,
600 sizeof(hwstate->fpregs));
601 /*
602 * Copy the status and control register.
603 */
604 __get_user_error(hwstate->fpscr, &ufp->fpscr, err);
605
606 /*
607 * Sanitise and restore the exception registers.
608 */
609 __get_user_error(fpexc, &ufp_exc->fpexc, err);
610
611 /* Ensure the VFP is enabled. */
612 fpexc |= FPEXC_EN;
613
614 /* Ensure FPINST2 is invalid and the exception flag is cleared. */
615 fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
616 hwstate->fpexc = fpexc;
617
618 __get_user_error(hwstate->fpinst, &ufp_exc->fpinst, err);
619 __get_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err);
620
621 return err ? -EFAULT : 0;
622}
623
624/*
532 * VFP hardware can lose all context when a CPU goes offline. 625 * VFP hardware can lose all context when a CPU goes offline.
533 * As we will be running in SMP mode with CPU hotplug, we will save the 626 * As we will be running in SMP mode with CPU hotplug, we will save the
534 * hardware state at every thread switch. We clear our held state when 627 * hardware state at every thread switch. We clear our held state when
@@ -558,7 +651,7 @@ static int __init vfp_init(void)
558 unsigned int cpu_arch = cpu_architecture(); 651 unsigned int cpu_arch = cpu_architecture();
559 652
560 if (cpu_arch >= CPU_ARCH_ARMv6) 653 if (cpu_arch >= CPU_ARCH_ARMv6)
561 vfp_enable(NULL); 654 on_each_cpu(vfp_enable, NULL, 1);
562 655
563 /* 656 /*
564 * First check that there is a VFP that we can use. 657 * First check that there is a VFP that we can use.
@@ -579,8 +672,6 @@ static int __init vfp_init(void)
579 } else { 672 } else {
580 hotcpu_notifier(vfp_hotplug, 0); 673 hotcpu_notifier(vfp_hotplug, 0);
581 674
582 smp_call_function(vfp_enable, NULL, 1);
583
584 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */ 675 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */
585 printk("implementor %02x architecture %d part %02x variant %x rev %x\n", 676 printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
586 (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, 677 (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index e648af92ced1..0e40843a1c6e 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -18,10 +18,6 @@
18#include <linux/atomic.h> 18#include <linux/atomic.h>
19 19
20 20
21/* Define a way to iterate across irqs. */
22#define for_each_irq(i) \
23 for ((i) = 0; (i) < NR_IRQS; ++(i))
24
25extern atomic_t ppc_n_lost_interrupts; 21extern atomic_t ppc_n_lost_interrupts;
26 22
27/* This number is used when no interrupt has been assigned */ 23/* This number is used when no interrupt has been assigned */
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 5ec1b2354ca6..43eb74fcedde 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -330,14 +330,10 @@ void migrate_irqs(void)
330 330
331 alloc_cpumask_var(&mask, GFP_KERNEL); 331 alloc_cpumask_var(&mask, GFP_KERNEL);
332 332
333 for_each_irq(irq) { 333 for_each_irq_desc(irq, desc) {
334 struct irq_data *data; 334 struct irq_data *data;
335 struct irq_chip *chip; 335 struct irq_chip *chip;
336 336
337 desc = irq_to_desc(irq);
338 if (!desc)
339 continue;
340
341 data = irq_desc_get_irq_data(desc); 337 data = irq_desc_get_irq_data(desc);
342 if (irqd_is_per_cpu(data)) 338 if (irqd_is_per_cpu(data))
343 continue; 339 continue;
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index c957b1202bdc..5df777794403 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -23,14 +23,11 @@
23 23
24void machine_kexec_mask_interrupts(void) { 24void machine_kexec_mask_interrupts(void) {
25 unsigned int i; 25 unsigned int i;
26 struct irq_desc *desc;
26 27
27 for_each_irq(i) { 28 for_each_irq_desc(i, desc) {
28 struct irq_desc *desc = irq_to_desc(i);
29 struct irq_chip *chip; 29 struct irq_chip *chip;
30 30
31 if (!desc)
32 continue;
33
34 chip = irq_desc_get_chip(desc); 31 chip = irq_desc_get_chip(desc);
35 if (!chip) 32 if (!chip)
36 continue; 33 continue;
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index d09f3e8e6867..85825b5401e5 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -114,7 +114,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
114 pr_devel("axon_msi: woff %x roff %x msi %x\n", 114 pr_devel("axon_msi: woff %x roff %x msi %x\n",
115 write_offset, msic->read_offset, msi); 115 write_offset, msic->read_offset, msi);
116 116
117 if (msi < NR_IRQS && irq_get_chip_data(msi) == msic) { 117 if (msi < nr_irqs && irq_get_chip_data(msi) == msic) {
118 generic_handle_irq(msi); 118 generic_handle_irq(msi);
119 msic->fifo_virt[idx] = cpu_to_le32(0xffffffff); 119 msic->fifo_virt[idx] = cpu_to_le32(0xffffffff);
120 } else { 120 } else {
@@ -276,9 +276,6 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
276 if (rc) 276 if (rc)
277 return rc; 277 return rc;
278 278
279 /* We rely on being able to stash a virq in a u16 */
280 BUILD_BUG_ON(NR_IRQS > 65536);
281
282 list_for_each_entry(entry, &dev->msi_list, list) { 279 list_for_each_entry(entry, &dev->msi_list, list) {
283 virq = irq_create_direct_mapping(msic->irq_domain); 280 virq = irq_create_direct_mapping(msic->irq_domain);
284 if (virq == NO_IRQ) { 281 if (virq == NO_IRQ) {
@@ -392,7 +389,8 @@ static int axon_msi_probe(struct platform_device *device)
392 } 389 }
393 memset(msic->fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES); 390 memset(msic->fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES);
394 391
395 msic->irq_domain = irq_domain_add_nomap(dn, 0, &msic_host_ops, msic); 392 /* We rely on being able to stash a virq in a u16, so limit irqs to < 65536 */
393 msic->irq_domain = irq_domain_add_nomap(dn, 65536, &msic_host_ops, msic);
396 if (!msic->irq_domain) { 394 if (!msic->irq_domain) {
397 printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %s\n", 395 printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %s\n",
398 dn->full_name); 396 dn->full_name);
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
index f9a48af335cb..8c6dc42ecf65 100644
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ b/arch/powerpc/platforms/cell/beat_interrupt.c
@@ -248,6 +248,6 @@ void beatic_deinit_IRQ(void)
248{ 248{
249 int i; 249 int i;
250 250
251 for (i = 1; i < NR_IRQS; i++) 251 for (i = 1; i < nr_irqs; i++)
252 beat_destruct_irq_plug(i); 252 beat_destruct_irq_plug(i);
253} 253}
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 66ad93de1d55..c4e630576ff2 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -57,9 +57,9 @@ static int max_real_irqs;
57 57
58static DEFINE_RAW_SPINLOCK(pmac_pic_lock); 58static DEFINE_RAW_SPINLOCK(pmac_pic_lock);
59 59
60#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 60/* The max irq number this driver deals with is 128; see max_irqs */
61static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; 61static DECLARE_BITMAP(ppc_lost_interrupts, 128);
62static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; 62static DECLARE_BITMAP(ppc_cached_irq_mask, 128);
63static int pmac_irq_cascade = -1; 63static int pmac_irq_cascade = -1;
64static struct irq_domain *pmac_pic_host; 64static struct irq_domain *pmac_pic_host;
65 65
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index aadbe4f6d537..178a5f300bc9 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -30,9 +30,9 @@ config PPC_SPLPAR
30 two or more partitions. 30 two or more partitions.
31 31
32config EEH 32config EEH
33 bool "PCI Extended Error Handling (EEH)" if EXPERT 33 bool
34 depends on PPC_PSERIES && PCI 34 depends on PPC_PSERIES && PCI
35 default y if !EXPERT 35 default y
36 36
37config PSERIES_MSI 37config PSERIES_MSI
38 bool 38 bool
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index d3be961e2ae7..10386b676d87 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -51,8 +51,7 @@
51static intctl_cpm2_t __iomem *cpm2_intctl; 51static intctl_cpm2_t __iomem *cpm2_intctl;
52 52
53static struct irq_domain *cpm2_pic_host; 53static struct irq_domain *cpm2_pic_host;
54#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 54static unsigned long ppc_cached_irq_mask[2]; /* 2 32-bit registers */
55static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
56 55
57static const u_char irq_to_siureg[] = { 56static const u_char irq_to_siureg[] = {
58 1, 1, 1, 1, 1, 1, 1, 1, 57 1, 1, 1, 1, 1, 1, 1, 1,
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index d5f5416be310..b724622c3a0b 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -18,69 +18,45 @@
18extern int cpm_get_irq(struct pt_regs *regs); 18extern int cpm_get_irq(struct pt_regs *regs);
19 19
20static struct irq_domain *mpc8xx_pic_host; 20static struct irq_domain *mpc8xx_pic_host;
21#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 21static unsigned long mpc8xx_cached_irq_mask;
22static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
23static sysconf8xx_t __iomem *siu_reg; 22static sysconf8xx_t __iomem *siu_reg;
24 23
25int cpm_get_irq(struct pt_regs *regs); 24static inline unsigned long mpc8xx_irqd_to_bit(struct irq_data *d)
25{
26 return 0x80000000 >> irqd_to_hwirq(d);
27}
26 28
27static void mpc8xx_unmask_irq(struct irq_data *d) 29static void mpc8xx_unmask_irq(struct irq_data *d)
28{ 30{
29 int bit, word; 31 mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
30 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); 32 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
31
32 bit = irq_nr & 0x1f;
33 word = irq_nr >> 5;
34
35 ppc_cached_irq_mask[word] |= (1 << (31-bit));
36 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
37} 33}
38 34
39static void mpc8xx_mask_irq(struct irq_data *d) 35static void mpc8xx_mask_irq(struct irq_data *d)
40{ 36{
41 int bit, word; 37 mpc8xx_cached_irq_mask &= ~mpc8xx_irqd_to_bit(d);
42 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); 38 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
43
44 bit = irq_nr & 0x1f;
45 word = irq_nr >> 5;
46
47 ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
48 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
49} 39}
50 40
51static void mpc8xx_ack(struct irq_data *d) 41static void mpc8xx_ack(struct irq_data *d)
52{ 42{
53 int bit; 43 out_be32(&siu_reg->sc_sipend, mpc8xx_irqd_to_bit(d));
54 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
55
56 bit = irq_nr & 0x1f;
57 out_be32(&siu_reg->sc_sipend, 1 << (31-bit));
58} 44}
59 45
60static void mpc8xx_end_irq(struct irq_data *d) 46static void mpc8xx_end_irq(struct irq_data *d)
61{ 47{
62 int bit, word; 48 mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
63 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); 49 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
64
65 bit = irq_nr & 0x1f;
66 word = irq_nr >> 5;
67
68 ppc_cached_irq_mask[word] |= (1 << (31-bit));
69 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
70} 50}
71 51
72static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) 52static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
73{ 53{
74 if (flow_type & IRQ_TYPE_EDGE_FALLING) { 54 /* only external IRQ senses are programmable */
75 irq_hw_number_t hw = (unsigned int)irqd_to_hwirq(d); 55 if ((flow_type & IRQ_TYPE_EDGE_FALLING) && !(irqd_to_hwirq(d) & 1)) {
76 unsigned int siel = in_be32(&siu_reg->sc_siel); 56 unsigned int siel = in_be32(&siu_reg->sc_siel);
77 57 siel |= mpc8xx_irqd_to_bit(d);
78 /* only external IRQ senses are programmable */ 58 out_be32(&siu_reg->sc_siel, siel);
79 if ((hw & 1) == 0) { 59 __irq_set_handler_locked(d->irq, handle_edge_irq);
80 siel |= (0x80000000 >> hw);
81 out_be32(&siu_reg->sc_siel, siel);
82 __irq_set_handler_locked(d->irq, handle_edge_irq);
83 }
84 } 60 }
85 return 0; 61 return 0;
86} 62}
@@ -132,6 +108,9 @@ static int mpc8xx_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
132 IRQ_TYPE_EDGE_FALLING, 108 IRQ_TYPE_EDGE_FALLING,
133 }; 109 };
134 110
111 if (intspec[0] > 0x1f)
112 return 0;
113
135 *out_hwirq = intspec[0]; 114 *out_hwirq = intspec[0];
136 if (intsize > 1 && intspec[1] < 4) 115 if (intsize > 1 && intspec[1] < 4)
137 *out_flags = map_pic_senses[intspec[1]]; 116 *out_flags = map_pic_senses[intspec[1]];
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index ea5e204e3450..cd1d18db92c6 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -188,6 +188,7 @@ void xics_migrate_irqs_away(void)
188{ 188{
189 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id(); 189 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
190 unsigned int irq, virq; 190 unsigned int irq, virq;
191 struct irq_desc *desc;
191 192
192 /* If we used to be the default server, move to the new "boot_cpuid" */ 193 /* If we used to be the default server, move to the new "boot_cpuid" */
193 if (hw_cpu == xics_default_server) 194 if (hw_cpu == xics_default_server)
@@ -202,8 +203,7 @@ void xics_migrate_irqs_away(void)
202 /* Allow IPIs again... */ 203 /* Allow IPIs again... */
203 icp_ops->set_priority(DEFAULT_PRIORITY); 204 icp_ops->set_priority(DEFAULT_PRIORITY);
204 205
205 for_each_irq(virq) { 206 for_each_irq_desc(virq, desc) {
206 struct irq_desc *desc;
207 struct irq_chip *chip; 207 struct irq_chip *chip;
208 long server; 208 long server;
209 unsigned long flags; 209 unsigned long flags;
@@ -212,9 +212,8 @@ void xics_migrate_irqs_away(void)
212 /* We can't set affinity on ISA interrupts */ 212 /* We can't set affinity on ISA interrupts */
213 if (virq < NUM_ISA_INTERRUPTS) 213 if (virq < NUM_ISA_INTERRUPTS)
214 continue; 214 continue;
215 desc = irq_to_desc(virq);
216 /* We only need to migrate enabled IRQS */ 215 /* We only need to migrate enabled IRQS */
217 if (!desc || !desc->action) 216 if (!desc->action)
218 continue; 217 continue;
219 if (desc->irq_data.domain != xics_host) 218 if (desc->irq_data.domain != xics_host)
220 continue; 219 continue;