180 files changed, 1145 insertions, 5244 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a48aecc17eac..92c9c79c140c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -324,7 +324,7 @@ config ARCH_AT91
         select CLKDEV_LOOKUP
         help
           This enables support for systems based on the Atmel AT91RM9200,
-          AT91SAM9 and AT91CAP9 processors.
+          AT91SAM9 processors.
 
 config ARCH_BCMRING
         bool "Broadcom BCMRING"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index e0d236d7ff73..b895a2a92da8 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -81,47 +81,14 @@ choice
         prompt "Kernel low-level debugging port"
         depends on DEBUG_LL
 
-        config DEBUG_LL_UART_NONE
-                bool "No low-level debugging UART"
-                help
-                  Say Y here if your platform doesn't provide a UART option
-                  below. This relies on your platform choosing the right UART
-                  definition internally in order for low-level debugging to
-                  work.
-
-        config DEBUG_ICEDCC
-                bool "Kernel low-level debugging via EmbeddedICE DCC channel"
-                help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the EmbeddedICE macrocell's DCC channel using
-                  co-processor 14. This is known to work on the ARM9 style ICE
-                  channel and on the XScale with the PEEDI.
-
-                  Note that the system will appear to hang during boot if there
-                  is nothing connected to read from the DCC.
-
         config AT91_DEBUG_LL_DBGU0
                 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
                 depends on HAVE_AT91_DBGU0
 
         config AT91_DEBUG_LL_DBGU1
-                bool "Kernel low-level debugging on 9263, 9g45 and cap9"
+                bool "Kernel low-level debugging on 9263 and 9g45"
                 depends on HAVE_AT91_DBGU1
 
-        config DEBUG_FOOTBRIDGE_COM1
-                bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
-                depends on FOOTBRIDGE
-                help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the 8250 at PCI COM1.
-
-        config DEBUG_DC21285_PORT
-                bool "Kernel low-level debugging messages via footbridge serial port"
-                depends on FOOTBRIDGE
-                help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the serial port in the DC21285 (Footbridge).
-
         config DEBUG_CLPS711X_UART1
                 bool "Kernel low-level debugging messages via UART1"
                 depends on ARCH_CLPS711X
@@ -136,6 +103,20 @@ choice
                   Say Y here if you want the debug print routines to direct
                   their output to the second serial port on these devices.
 
+        config DEBUG_DC21285_PORT
+                bool "Kernel low-level debugging messages via footbridge serial port"
+                depends on FOOTBRIDGE
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the serial port in the DC21285 (Footbridge).
+
+        config DEBUG_FOOTBRIDGE_COM1
+                bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
+                depends on FOOTBRIDGE
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the 8250 at PCI COM1.
+
         config DEBUG_HIGHBANK_UART
                 bool "Kernel low-level debugging messages via Highbank UART"
                 depends on ARCH_HIGHBANK
@@ -206,38 +187,42 @@ choice
                   Say Y here if you want kernel low-level debugging support
                   on i.MX6Q.
 
-        config DEBUG_S3C_UART0
-                depends on PLAT_SAMSUNG
-                bool "Use S3C UART 0 for low-level debug"
+        config DEBUG_MSM_UART1
+                bool "Kernel low-level debugging messages via MSM UART1"
+                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to UART 0. The port must have been initialised
-                  by the boot-loader before use.
-
-                  The uncompressor code port configuration is now handled
-                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+                  their output to the first serial port on MSM devices.
 
-        config DEBUG_S3C_UART1
-                depends on PLAT_SAMSUNG
-                bool "Use S3C UART 1 for low-level debug"
+        config DEBUG_MSM_UART2
+                bool "Kernel low-level debugging messages via MSM UART2"
+                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to UART 1. The port must have been initialised
-                  by the boot-loader before use.
+                  their output to the second serial port on MSM devices.
 
-                  The uncompressor code port configuration is now handled
-                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+        config DEBUG_MSM_UART3
+                bool "Kernel low-level debugging messages via MSM UART3"
+                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the third serial port on MSM devices.
 
-        config DEBUG_S3C_UART2
-                depends on PLAT_SAMSUNG
-                bool "Use S3C UART 2 for low-level debug"
+        config DEBUG_MSM8660_UART
+                bool "Kernel low-level debugging messages via MSM 8660 UART"
+                depends on ARCH_MSM8X60
+                select MSM_HAS_DEBUG_UART_HS
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to UART 2. The port must have been initialised
-                  by the boot-loader before use.
+                  their output to the serial port on MSM 8660 devices.
 
-                  The uncompressor code port configuration is now handled
-                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+        config DEBUG_MSM8960_UART
+                bool "Kernel low-level debugging messages via MSM 8960 UART"
+                depends on ARCH_MSM8960
+                select MSM_HAS_DEBUG_UART_HS
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the serial port on MSM 8960 devices.
 
         config DEBUG_REALVIEW_STD_PORT
                 bool "RealView Default UART"
@@ -255,42 +240,57 @@ choice
                   their output to the standard serial port on the RealView
                   PB1176 platform.
 
-        config DEBUG_MSM_UART1
-                bool "Kernel low-level debugging messages via MSM UART1"
-                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+        config DEBUG_S3C_UART0
+                depends on PLAT_SAMSUNG
+                bool "Use S3C UART 0 for low-level debug"
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to the first serial port on MSM devices.
+                  their output to UART 0. The port must have been initialised
+                  by the boot-loader before use.
 
-        config DEBUG_MSM_UART2
-                bool "Kernel low-level debugging messages via MSM UART2"
-                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                  The uncompressor code port configuration is now handled
+                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
+        config DEBUG_S3C_UART1
+                depends on PLAT_SAMSUNG
+                bool "Use S3C UART 1 for low-level debug"
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to the second serial port on MSM devices.
+                  their output to UART 1. The port must have been initialised
+                  by the boot-loader before use.
 
-        config DEBUG_MSM_UART3
-                bool "Kernel low-level debugging messages via MSM UART3"
-                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                  The uncompressor code port configuration is now handled
+                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
+        config DEBUG_S3C_UART2
+                depends on PLAT_SAMSUNG
+                bool "Use S3C UART 2 for low-level debug"
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to the third serial port on MSM devices.
+                  their output to UART 2. The port must have been initialised
+                  by the boot-loader before use.
 
-        config DEBUG_MSM8660_UART
-                bool "Kernel low-level debugging messages via MSM 8660 UART"
-                depends on ARCH_MSM8X60
-                select MSM_HAS_DEBUG_UART_HS
+                  The uncompressor code port configuration is now handled
+                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
+        config DEBUG_LL_UART_NONE
+                bool "No low-level debugging UART"
                 help
-                  Say Y here if you want the debug print routines to direct
-                  their output to the serial port on MSM 8660 devices.
+                  Say Y here if your platform doesn't provide a UART option
+                  below. This relies on your platform choosing the right UART
+                  definition internally in order for low-level debugging to
+                  work.
 
-        config DEBUG_MSM8960_UART
-                bool "Kernel low-level debugging messages via MSM 8960 UART"
-                depends on ARCH_MSM8960
-                select MSM_HAS_DEBUG_UART_HS
+        config DEBUG_ICEDCC
+                bool "Kernel low-level debugging via EmbeddedICE DCC channel"
                 help
                   Say Y here if you want the debug print routines to direct
-                  their output to the serial port on MSM 8960 devices.
+                  their output to the EmbeddedICE macrocell's DCC channel using
+                  co-processor 14. This is known to work on the ARM9 style ICE
+                  channel and on the XScale with the PEEDI.
+
+                  Note that the system will appear to hang during boot if there
+                  is nothing connected to read from the DCC.
 
 endchoice
 
diff --git a/arch/arm/configs/at91cap9_defconfig b/arch/arm/configs/at91cap9_defconfig
deleted file mode 100644
index 8826eb218e73..000000000000
--- a/arch/arm/configs/at91cap9_defconfig
+++ /dev/null
@@ -1,108 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91CAP9=y
-CONFIG_MACH_AT91CAP9ADK=y
-CONFIG_MTD_AT91_DATAFLASH_CARD=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_FB=y
-CONFIG_FB_ATMEL=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_USB_FILE_STORAGE=m
-CONFIG_MMC=y
-CONFIG_MMC_AT91=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index e4c96cc6ec0c..424aa458c487 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -110,6 +110,7 @@ extern void cpu_init(void);
 
 void soft_restart(unsigned long);
 extern void (*arm_pm_restart)(char str, const char *cmd);
+extern void (*arm_pm_idle)(void);
 
 #define UDBG_UNDEFINED  (1 << 0)
 #define UDBG_SYSCALL    (1 << 1)
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 971d65c253a9..008e7ce766a7 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void);
 
 static volatile int hlt_counter;
 
-#include <mach/system.h>
-
 void disable_hlt(void)
 {
         hlt_counter++;
@@ -181,13 +179,17 @@ void cpu_idle_wait(void)
 EXPORT_SYMBOL_GPL(cpu_idle_wait);
 
 /*
- * This is our default idle handler.  We need to disable
- * interrupts here to ensure we don't miss a wakeup call.
+ * This is our default idle handler.
  */
+
+void (*arm_pm_idle)(void);
+
 static void default_idle(void)
 {
-        if (!need_resched())
-                arch_idle();
+        if (arm_pm_idle)
+                arm_pm_idle();
+        else
+                cpu_do_idle();
         local_irq_enable();
 }
 
@@ -215,6 +217,10 @@ void cpu_idle(void)
                                 cpu_die();
 #endif
 
+                        /*
+                         * We need to disable interrupts here
+                         * to ensure we don't miss a wakeup call.
+                         */
                         local_irq_disable();
 #ifdef CONFIG_PL310_ERRATA_769419
                         wmb();
@@ -222,19 +228,18 @@ void cpu_idle(void)
                         if (hlt_counter) {
                                 local_irq_enable();
                                 cpu_relax();
-                        } else {
+                        } else if (!need_resched()) {
                                 stop_critical_timings();
                                 if (cpuidle_idle_call())
                                         pm_idle();
                                 start_critical_timings();
                                 /*
-                                 * This will eventually be removed - pm_idle
-                                 * functions should always return with IRQs
-                                 * enabled.
+                                 * pm_idle functions must always
+                                 * return with IRQs enabled.
                                  */
                                 WARN_ON(irqs_disabled());
+                        } else
                                 local_irq_enable();
-                        }
                 }
                 leds_event(led_idle_end);
                 rcu_idle_exit();
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 71feb00a1e99..0284e66c47f9 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -102,15 +102,6 @@ config ARCH_AT91SAM9G45
         select HAVE_AT91_DBGU1
         select AT91_SAM9G45_RESET
 
-config ARCH_AT91CAP9
-        bool "AT91CAP9"
-        select CPU_ARM926T
-        select GENERIC_CLOCKEVENTS
-        select HAVE_FB_ATMEL
-        select HAVE_NET_MACB
-        select HAVE_AT91_DBGU1
-        select AT91_SAM9G45_RESET
-
 config ARCH_AT91X40
         bool "AT91x40"
         select ARCH_USES_GETTIMEOFFSET
@@ -447,21 +438,6 @@ endif
 
 # ----------------------------------------------------------
 
-if ARCH_AT91CAP9
-
-comment "AT91CAP9 Board Type"
-
-config MACH_AT91CAP9ADK
-        bool "Atmel AT91CAP9A-DK Evaluation Kit"
-        select HAVE_AT91_DATAFLASH_CARD
-        help
-          Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit.
-          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138>
-
-endif
-
-# ----------------------------------------------------------
-
 if ARCH_AT91X40
 
 comment "AT91X40 Board Type"
@@ -544,7 +520,7 @@ config AT91_EARLY_DBGU0
         depends on HAVE_AT91_DBGU0
 
 config AT91_EARLY_DBGU1
-        bool "DBGU on 9263, 9g45 and cap9"
+        bool "DBGU on 9263 and 9g45"
         depends on HAVE_AT91_DBGU1
 
 config AT91_EARLY_USART0
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 705e1fbded39..aeb76f1690d9 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -20,7 +20,6 @@ obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_d
 obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9G45)  += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91X40)      += at91x40.o at91x40_time.o
 
 # AT91RM9200 board-specific support
@@ -81,9 +80,6 @@ obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
 # AT91SAM board with device-tree
 obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o
 
-# AT91CAP9 board-specific support
-obj-$(CONFIG_MACH_AT91CAP9ADK)  += board-cap9adk.o
-
 # AT91X40 board-specific support
 obj-$(CONFIG_MACH_AT91EB01)     += board-eb01.o
 
diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot
index 8ddafadfdc7d..2fd051eb2449 100644
--- a/arch/arm/mach-at91/Makefile.boot
+++ b/arch/arm/mach-at91/Makefile.boot
@@ -3,11 +3,7 @@
 #   PARAMS_PHYS must be within 4MB of ZRELADDR
 #   INITRD_PHYS must be in RAM
 
-ifeq ($(CONFIG_ARCH_AT91CAP9),y)
-   zreladdr-y   += 0x70008000
-params_phys-y   := 0x70000100
-initrd_phys-y   := 0x70410000
-else ifeq ($(CONFIG_ARCH_AT91SAM9G45),y)
+ifeq ($(CONFIG_ARCH_AT91SAM9G45),y)
    zreladdr-y   += 0x70008000
 params_phys-y   := 0x70000100
 initrd_phys-y   := 0x70410000
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
deleted file mode 100644
index a42edc25a87e..000000000000
--- a/arch/arm/mach-at91/at91cap9.c
+++ /dev/null
@@ -1,396 +0,0 @@
-/*
- * arch/arm/mach-at91/at91cap9.c
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#include <linux/module.h>
-
-#include <asm/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <mach/cpu.h>
-#include <mach/at91cap9.h>
-#include <mach/at91_pmc.h>
-
-#include "soc.h"
-#include "generic.h"
-#include "clock.h"
-#include "sam9_smc.h"
-
-/* --------------------------------------------------------------------
- *  Clocks
- * -------------------------------------------------------------------- */
-
-/*
- * The peripheral clocks.
- */
-static struct clk pioABCD_clk = {
-        .name           = "pioABCD_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_PIOABCD,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb0_clk = {
-        .name           = "mpb0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb1_clk = {
-        .name           = "mpb1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb2_clk = {
-        .name           = "mpb2_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb3_clk = {
-        .name           = "mpb3_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB3,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mpb4_clk = {
-        .name           = "mpb4_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MPB4,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart0_clk = {
-        .name           = "usart0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_US0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart1_clk = {
-        .name           = "usart1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_US1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart2_clk = {
-        .name           = "usart2_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_US2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc0_clk = {
-        .name           = "mci0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MCI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc1_clk = {
-        .name           = "mci1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_MCI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk can_clk = {
-        .name           = "can_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_CAN,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk twi_clk = {
-        .name           = "twi_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_TWI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi0_clk = {
-        .name           = "spi0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SPI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi1_clk = {
-        .name           = "spi1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SPI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc0_clk = {
-        .name           = "ssc0_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SSC0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc1_clk = {
-        .name           = "ssc1_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_SSC1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ac97_clk = {
-        .name           = "ac97_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_AC97C,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tcb_clk = {
-        .name           = "tcb_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_TCB,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pwm_clk = {
-        .name           = "pwm_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_PWMC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk macb_clk = {
-        .name           = "pclk",
-        .pmc_mask       = 1 << AT91CAP9_ID_EMAC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk aestdes_clk = {
-        .name           = "aestdes_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_AESTDES,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk adc_clk = {
-        .name           = "adc_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_ADC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk isi_clk = {
-        .name           = "isi_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_ISI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk lcdc_clk = {
-        .name           = "lcdc_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_LCDC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk dma_clk = {
-        .name           = "dma_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_DMA,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk udphs_clk = {
-        .name           = "udphs_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_UDPHS,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ohci_clk = {
-        .name           = "ohci_clk",
-        .pmc_mask       = 1 << AT91CAP9_ID_UHP,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-
-static struct clk *periph_clocks[] __initdata = {
-        &pioABCD_clk,
-        &mpb0_clk,
-        &mpb1_clk,
-        &mpb2_clk,
-        &mpb3_clk,
-        &mpb4_clk,
-        &usart0_clk,
-        &usart1_clk,
-        &usart2_clk,
-        &mmc0_clk,
-        &mmc1_clk,
-        &can_clk,
-        &twi_clk,
-        &spi0_clk,
-        &spi1_clk,
-        &ssc0_clk,
-        &ssc1_clk,
-        &ac97_clk,
-        &tcb_clk,
-        &pwm_clk,
-        &macb_clk,
-        &aestdes_clk,
-        &adc_clk,
-        &isi_clk,
-        &lcdc_clk,
-        &dma_clk,
-        &udphs_clk,
-        &ohci_clk,
-        // irq0 .. irq1
-};
-
-static struct clk_lookup periph_clocks_lookups[] = {
-        /* One additional fake clock for macb_hclk */
-        CLKDEV_CON_ID("hclk", &macb_clk),
-        CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
-        CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
-        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
-        /* fake hclk clock */
-        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
-        CLKDEV_CON_ID("pioA", &pioABCD_clk),
-        CLKDEV_CON_ID("pioB", &pioABCD_clk),
-        CLKDEV_CON_ID("pioC", &pioABCD_clk),
-        CLKDEV_CON_ID("pioD", &pioABCD_clk),
-};
-
-static struct clk_lookup usart_clocks_lookups[] = {
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
-};
-
-/*
- * The four programmable clocks.
- * You must configure pin multiplexing to bring these signals out.
- */
-static struct clk pck0 = {
-        .name           = "pck0",
-        .pmc_mask       = AT91_PMC_PCK0,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 0,
-};
-static struct clk pck1 = {
-        .name           = "pck1",
-        .pmc_mask       = AT91_PMC_PCK1,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 1,
-};
-static struct clk pck2 = {
-        .name           = "pck2",
-        .pmc_mask       = AT91_PMC_PCK2,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 2,
-};
-static struct clk pck3 = {
-        .name           = "pck3",
-        .pmc_mask       = AT91_PMC_PCK3,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 3,
-};
-
-static void __init at91cap9_register_clocks(void)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
-                clk_register(periph_clocks[i]);
-
-        clkdev_add_table(periph_clocks_lookups,
-                         ARRAY_SIZE(periph_clocks_lookups));
-        clkdev_add_table(usart_clocks_lookups,
-                         ARRAY_SIZE(usart_clocks_lookups));
-
-        clk_register(&pck0);
-        clk_register(&pck1);
-        clk_register(&pck2);
-        clk_register(&pck3);
-}
-
-static struct clk_lookup console_clock_lookup;
-
-void __init at91cap9_set_console_clock(int id)
-{
-        if (id >= ARRAY_SIZE(usart_clocks_lookups))
-                return;
-
-        console_clock_lookup.con_id = "usart";
-        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
-        clkdev_add(&console_clock_lookup);
-}
-
-/* --------------------------------------------------------------------
- *  GPIO
- * -------------------------------------------------------------------- */
-
-static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
-        {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOA,
-        }, {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOB,
-        }, {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOC,
-        }, {
-                .id             = AT91CAP9_ID_PIOABCD,
-                .regbase        = AT91CAP9_BASE_PIOD,
-        }
-};
-
-/* --------------------------------------------------------------------
- *  AT91CAP9 processor initialization
- * -------------------------------------------------------------------- */
-
-static void __init at91cap9_map_io(void)
-{
-        at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
-}
-
-static void __init at91cap9_ioremap_registers(void)
-{
-        at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
-        at91_ioremap_rstc(AT91CAP9_BASE_RSTC);
-        at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
-        at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
-}
-
-static void __init at91cap9_initialize(void)
-{
-        arm_pm_restart = at91sam9g45_restart;
-        at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
-
-        /* Register GPIO subsystem */
-        at91_gpio_init(at91cap9_gpio, 4);
-
-        /* Remember the silicon revision */
-        if (cpu_is_at91cap9_revB())
-                system_rev = 0xB;
-        else if (cpu_is_at91cap9_revC())
-                system_rev = 0xC;
-}
-
-/* --------------------------------------------------------------------
- *  Interrupt initialization
- * -------------------------------------------------------------------- */
-
-/*
- * The default interrupt priority levels (0 = lowest, 7 = highest).
- */
-static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
-        7,      /* Advanced Interrupt Controller (FIQ) */
-        7,      /* System Peripherals */
-        1,      /* Parallel IO Controller A, B, C and D */
-        0,      /* MP Block Peripheral 0 */
-        0,      /* MP Block Peripheral 1 */
-        0,      /* MP Block Peripheral 2 */
-        0,      /* MP Block Peripheral 3 */
-        0,      /* MP Block Peripheral 4 */
-        5,      /* USART 0 */
-        5,      /* USART 1 */
-        5,      /* USART 2 */
-        0,      /* Multimedia Card Interface 0 */
-        0,      /* Multimedia Card Interface 1 */
-        3,      /* CAN */
-        6,      /* Two-Wire Interface */
-        5,      /* Serial Peripheral Interface 0 */
-        5,      /* Serial Peripheral Interface 1 */
-        4,      /* Serial Synchronous Controller 0 */
-        4,      /* Serial Synchronous Controller 1 */
-        5,      /* AC97 Controller */
-        0,      /* Timer Counter 0, 1 and 2 */
-        0,      /* Pulse Width Modulation Controller */
-        3,      /* Ethernet */
-        0,      /* Advanced Encryption Standard, Triple DES*/
-        0,      /* Analog-to-Digital Converter */
-        0,      /* Image Sensor Interface */
-        3,      /* LCD Controller */
-        0,      /* DMA Controller */
-        2,      /* USB Device Port */
-        2,      /* USB Host port */
-        0,      /* Advanced Interrupt Controller (IRQ0) */
-        0,      /* Advanced Interrupt Controller (IRQ1) */
-};
-
-struct at91_init_soc __initdata at91cap9_soc = {
-        .map_io = at91cap9_map_io,
-        .default_irq_priority = at91cap9_default_irq_priority,
-        .ioremap_registers = at91cap9_ioremap_registers,
-        .register_clocks = at91cap9_register_clocks,
-        .init = at91cap9_initialize,
-};
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
deleted file mode 100644
index d298fb7cb210..000000000000
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ /dev/null
@@ -1,1273 +0,0 @@
-/*
- * arch/arm/mach-at91/at91cap9_devices.c
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-#include <linux/platform_device.h>
-#include <linux/i2c-gpio.h>
-
-#include <video/atmel_lcdc.h>
-
-#include <mach/board.h>
-#include <mach/cpu.h>
-#include <mach/at91cap9.h>
-#include <mach/at91cap9_matrix.h>
-#include <mach/at91sam9_smc.h>
-
-#include "generic.h"
-
-
-/* --------------------------------------------------------------------
- *  USB Host
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static u64 ohci_dmamask = DMA_BIT_MASK(32);
-static struct at91_usbh_data usbh_data;
-
-static struct resource usbh_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_UHP_BASE,
-                .end    = AT91CAP9_UHP_BASE + SZ_1M - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_UHP,
-                .end    = AT91CAP9_ID_UHP,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91_usbh_device = {
-        .name           = "at91_ohci",
-        .id             = -1,
-        .dev            = {
-                                .dma_mask               = &ohci_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &usbh_data,
-        },
-        .resource       = usbh_resources,
-        .num_resources  = ARRAY_SIZE(usbh_resources),
-};
-
-void __init at91_add_device_usbh(struct at91_usbh_data *data)
-{
-        int i;
-
-        if (!data)
-                return;
-
-        if (cpu_is_at91cap9_revB())
-                irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
-
-        /* Enable VBus control for UHP ports */
-        for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->vbus_pin[i]))
-                        at91_set_gpio_output(data->vbus_pin[i], 0);
-        }
-
-        /* Enable overcurrent notification */
-        for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
-                        at91_set_gpio_input(data->overcurrent_pin[i], 1);
-        }
-
-        usbh_data = *data;
-        platform_device_register(&at91_usbh_device);
-}
-#else
-void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  USB HS Device (Gadget)
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
-
-static struct resource usba_udc_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_UDPHS_FIFO,
-                .end    = AT91CAP9_UDPHS_FIFO + SZ_512K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_BASE_UDPHS,
-                .end    = AT91CAP9_BASE_UDPHS + SZ_1K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [2] = {
-                .start  = AT91CAP9_ID_UDPHS,
-                .end    = AT91CAP9_ID_UDPHS,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-#define EP(nam, idx, maxpkt, maxbk, dma, isoc)                  \
-        [idx] = {                                               \
-                .name           = nam,                          \
-                .index          = idx,                          \
-                .fifo_size      = maxpkt,                       \
-                .nr_banks       = maxbk,                        \
-                .can_dma        = dma,                          \
-                .can_isoc       = isoc,                         \
-        }
-
-static struct usba_ep_data usba_udc_ep[] = {
-        EP("ep0", 0,   64, 1, 0, 0),
-        EP("ep1", 1, 1024, 3, 1, 1),
-        EP("ep2", 2, 1024, 3, 1, 1),
-        EP("ep3", 3, 1024, 2, 1, 1),
-        EP("ep4", 4, 1024, 2, 1, 1),
-        EP("ep5", 5, 1024, 2, 1, 0),
-        EP("ep6", 6, 1024, 2, 1, 0),
-        EP("ep7", 7, 1024, 2, 0, 0),
-};
-
-#undef EP
-
-/*
- * pdata doesn't have room for any endpoints, so we need to
- * append room for the ones we need right after it.
- */
-static struct {
-        struct usba_platform_data pdata;
-        struct usba_ep_data ep[8];
-} usba_udc_data;
-
-static struct platform_device at91_usba_udc_device = {
-        .name           = "atmel_usba_udc",
-        .id             = -1,
-        .dev            = {
-                                .platform_data  = &usba_udc_data.pdata,
-        },
-        .resource       = usba_udc_resources,
-        .num_resources  = ARRAY_SIZE(usba_udc_resources),
-};
-
-void __init at91_add_device_usba(struct usba_platform_data *data)
-{
-        if (cpu_is_at91cap9_revB()) {
-                irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
-                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
-                                                  AT91_MATRIX_UDPHS_BYPASS_LOCK);
-        }
-        else
-                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
-
-        /*
-         * Invalid pins are 0 on AT91, but the usba driver is shared
-         * with AVR32, which use negative values instead. Once/if
-         * gpio_is_valid() is ported to AT91, revisit this code.
-         */
-        usba_udc_data.pdata.vbus_pin = -EINVAL;
-        usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
-        memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
-
-        if (data && gpio_is_valid(data->vbus_pin)) {
-                at91_set_gpio_input(data->vbus_pin, 0);
-                at91_set_deglitch(data->vbus_pin, 1);
-                usba_udc_data.pdata.vbus_pin = data->vbus_pin;
-        }
-
-        /* Pullup pin is handled internally by USB device peripheral */
-
-        platform_device_register(&at91_usba_udc_device);
-}
-#else
-void __init at91_add_device_usba(struct usba_platform_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  Ethernet
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
-static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct macb_platform_data eth_data;
-
-static struct resource eth_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_EMAC,
-                .end    = AT91CAP9_BASE_EMAC + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_EMAC,
-                .end    = AT91CAP9_ID_EMAC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_eth_device = {
-        .name           = "macb",
-        .id             = -1,
-        .dev            = {
-                                .dma_mask               = &eth_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &eth_data,
-        },
-        .resource       = eth_resources,
-        .num_resources  = ARRAY_SIZE(eth_resources),
-};
-
-void __init at91_add_device_eth(struct macb_platform_data *data)
-{
-        if (!data)
-                return;
-
-        if (gpio_is_valid(data->phy_irq_pin)) {
-                at91_set_gpio_input(data->phy_irq_pin, 0);
-                at91_set_deglitch(data->phy_irq_pin, 1);
-        }
-
-        /* Pins used for MII and RMII */
-        at91_set_A_periph(AT91_PIN_PB21, 0);    /* ETXCK_EREFCK */
-        at91_set_A_periph(AT91_PIN_PB22, 0);    /* ERXDV */
-        at91_set_A_periph(AT91_PIN_PB25, 0);    /* ERX0 */
-        at91_set_A_periph(AT91_PIN_PB26, 0);    /* ERX1 */
-        at91_set_A_periph(AT91_PIN_PB27, 0);    /* ERXER */
-        at91_set_A_periph(AT91_PIN_PB28, 0);    /* ETXEN */
-        at91_set_A_periph(AT91_PIN_PB23, 0);    /* ETX0 */
-        at91_set_A_periph(AT91_PIN_PB24, 0);    /* ETX1 */
-        at91_set_A_periph(AT91_PIN_PB30, 0);    /* EMDIO */
-        at91_set_A_periph(AT91_PIN_PB29, 0);    /* EMDC */
-
-        if (!data->is_rmii) {
-                at91_set_B_periph(AT91_PIN_PC25, 0);    /* ECRS */
-                at91_set_B_periph(AT91_PIN_PC26, 0);    /* ECOL */
-                at91_set_B_periph(AT91_PIN_PC22, 0);    /* ERX2 */
-                at91_set_B_periph(AT91_PIN_PC23, 0);    /* ERX3 */
-                at91_set_B_periph(AT91_PIN_PC27, 0);    /* ERXCK */
-                at91_set_B_periph(AT91_PIN_PC20, 0);    /* ETX2 */
-                at91_set_B_periph(AT91_PIN_PC21, 0);    /* ETX3 */
-                at91_set_B_periph(AT91_PIN_PC24, 0);    /* ETXER */
-        }
-
-        eth_data = *data;
-        platform_device_register(&at91cap9_eth_device);
-}
-#else
-void __init at91_add_device_eth(struct macb_platform_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  MMC / SD
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
-static u64 mmc_dmamask = DMA_BIT_MASK(32);
-static struct at91_mmc_data mmc0_data, mmc1_data;
-
-static struct resource mmc0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_MCI0,
-                .end    = AT91CAP9_BASE_MCI0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_MCI0,
-                .end    = AT91CAP9_ID_MCI0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_mmc0_device = {
-        .name           = "at91_mci",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &mmc0_data,
-        },
-        .resource       = mmc0_resources,
-        .num_resources  = ARRAY_SIZE(mmc0_resources),
-};
-
-static struct resource mmc1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_MCI1,
-                .end    = AT91CAP9_BASE_MCI1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_MCI1,
-                .end    = AT91CAP9_ID_MCI1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_mmc1_device = {
-        .name           = "at91_mci",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &mmc1_data,
-        },
-        .resource       = mmc1_resources,
-        .num_resources  = ARRAY_SIZE(mmc1_resources),
-};
-
-void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
-{
-        if (!data)
-                return;
-
-        /* input/irq */
-        if (gpio_is_valid(data->det_pin)) {
-                at91_set_gpio_input(data->det_pin, 1);
-                at91_set_deglitch(data->det_pin, 1);
-        }
-        if (gpio_is_valid(data->wp_pin))
-                at91_set_gpio_input(data->wp_pin, 1);
-        if (gpio_is_valid(data->vcc_pin))
-                at91_set_gpio_output(data->vcc_pin, 0);
-
-        if (mmc_id == 0) {              /* MCI0 */
-                /* CLK */
-                at91_set_A_periph(AT91_PIN_PA2, 0);
-
-                /* CMD */
-                at91_set_A_periph(AT91_PIN_PA1, 1);
-
-                /* DAT0, maybe DAT1..DAT3 */
-                at91_set_A_periph(AT91_PIN_PA0, 1);
-                if (data->wire4) {
-                        at91_set_A_periph(AT91_PIN_PA3, 1);
-                        at91_set_A_periph(AT91_PIN_PA4, 1);
-                        at91_set_A_periph(AT91_PIN_PA5, 1);
-                }
-
-                mmc0_data = *data;
-                platform_device_register(&at91cap9_mmc0_device);
-        } else {                        /* MCI1 */
-                /* CLK */
-                at91_set_A_periph(AT91_PIN_PA16, 0);
-
-                /* CMD */
-                at91_set_A_periph(AT91_PIN_PA17, 1);
-
-                /* DAT0, maybe DAT1..DAT3 */
-                at91_set_A_periph(AT91_PIN_PA18, 1);
-                if (data->wire4) {
-                        at91_set_A_periph(AT91_PIN_PA19, 1);
-                        at91_set_A_periph(AT91_PIN_PA20, 1);
-                        at91_set_A_periph(AT91_PIN_PA21, 1);
-                }
-
-                mmc1_data = *data;
-                platform_device_register(&at91cap9_mmc1_device);
-        }
-}
-#else
-void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  NAND / SmartMedia
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
-static struct atmel_nand_data nand_data;
-
-#define NAND_BASE       AT91_CHIPSELECT_3
-
-static struct resource nand_resources[] = {
-        [0] = {
-                .start  = NAND_BASE,
-                .end    = NAND_BASE + SZ_256M - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_BASE_ECC,
-                .end    = AT91CAP9_BASE_ECC + SZ_512 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device at91cap9_nand_device = {
-        .name           = "atmel_nand",
-        .id             = -1,
-        .dev            = {
-                                .platform_data  = &nand_data,
-        },
-        .resource       = nand_resources,
-        .num_resources  = ARRAY_SIZE(nand_resources),
-};
-
-void __init at91_add_device_nand(struct atmel_nand_data *data)
-{
-        unsigned long csa;
-
-        if (!data)
-                return;
-
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
-
-        /* enable pin */
-        if (gpio_is_valid(data->enable_pin))
-                at91_set_gpio_output(data->enable_pin, 1);
-
-        /* ready/busy pin */
-        if (gpio_is_valid(data->rdy_pin))
-                at91_set_gpio_input(data->rdy_pin, 1);
-
-        /* card detect pin */
-        if (gpio_is_valid(data->det_pin))
-                at91_set_gpio_input(data->det_pin, 1);
-
-        nand_data = *data;
-        platform_device_register(&at91cap9_nand_device);
-}
-#else
-void __init at91_add_device_nand(struct atmel_nand_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  TWI (i2c)
- * -------------------------------------------------------------------- */
-
-/*
- * Prefer the GPIO code since the TWI controller isn't robust
- * (gets overruns and underruns under load) and can only issue
- * repeated STARTs in one scenario (the driver doesn't yet handle them).
- */
-#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
-
-static struct i2c_gpio_platform_data pdata = {
-        .sda_pin                = AT91_PIN_PB4,
-        .sda_is_open_drain      = 1,
-        .scl_pin                = AT91_PIN_PB5,
-        .scl_is_open_drain      = 1,
-        .udelay                 = 2,            /* ~100 kHz */
-};
-
-static struct platform_device at91cap9_twi_device = {
-        .name                   = "i2c-gpio",
-        .id                     = -1,
-        .dev.platform_data      = &pdata,
-};
-
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
-{
-        at91_set_GPIO_periph(AT91_PIN_PB4, 1);          /* TWD (SDA) */
-        at91_set_multi_drive(AT91_PIN_PB4, 1);
-
-        at91_set_GPIO_periph(AT91_PIN_PB5, 1);          /* TWCK (SCL) */
-        at91_set_multi_drive(AT91_PIN_PB5, 1);
-
-        i2c_register_board_info(0, devices, nr_devices);
-        platform_device_register(&at91cap9_twi_device);
-}
-
-#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
-
-static struct resource twi_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_TWI,
-                .end    = AT91CAP9_BASE_TWI + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_TWI,
-                .end    = AT91CAP9_ID_TWI,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_twi_device = {
-        .name           = "at91_i2c",
-        .id             = -1,
-        .resource       = twi_resources,
-        .num_resources  = ARRAY_SIZE(twi_resources),
-};
-
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
-{
-        /* pins used for TWI interface */
-        at91_set_B_periph(AT91_PIN_PB4, 0);             /* TWD */
-        at91_set_multi_drive(AT91_PIN_PB4, 1);
-
-        at91_set_B_periph(AT91_PIN_PB5, 0);             /* TWCK */
-        at91_set_multi_drive(AT91_PIN_PB5, 1);
-
-        i2c_register_board_info(0, devices, nr_devices);
-        platform_device_register(&at91cap9_twi_device);
-}
-#else
-void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
-#endif
-
-/* --------------------------------------------------------------------
- *  SPI
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-
-static struct resource spi0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SPI0,
-                .end    = AT91CAP9_BASE_SPI0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SPI0,
-                .end    = AT91CAP9_ID_SPI0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_spi0_device = {
-        .name           = "atmel_spi",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = spi0_resources,
-        .num_resources  = ARRAY_SIZE(spi0_resources),
-};
-
-static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 };
-
-static struct resource spi1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SPI1,
-                .end    = AT91CAP9_BASE_SPI1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SPI1,
-                .end    = AT91CAP9_ID_SPI1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_spi1_device = {
-        .name           = "atmel_spi",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = spi1_resources,
-        .num_resources  = ARRAY_SIZE(spi1_resources),
-};
-
-static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
-
-void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
-{
-        int i;
-        unsigned long cs_pin;
-        short enable_spi0 = 0;
-        short enable_spi1 = 0;
-
-        /* Choose SPI chip-selects */
-        for (i = 0; i < nr_devices; i++) {
-                if (devices[i].controller_data)
-                        cs_pin = (unsigned long) devices[i].controller_data;
-                else if (devices[i].bus_num == 0)
-                        cs_pin = spi0_standard_cs[devices[i].chip_select];
-                else
-                        cs_pin = spi1_standard_cs[devices[i].chip_select];
-
-                if (devices[i].bus_num == 0)
-                        enable_spi0 = 1;
-                else
-                        enable_spi1 = 1;
-
-                /* enable chip-select pin */
-                at91_set_gpio_output(cs_pin, 1);
-
-                /* pass chip-select pin to driver */
-                devices[i].controller_data = (void *) cs_pin;
-        }
-
-        spi_register_board_info(devices, nr_devices);
-
-        /* Configure SPI bus(es) */
-        if (enable_spi0) {
-                at91_set_B_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
-                at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
-                at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
-
-                platform_device_register(&at91cap9_spi0_device);
-        }
-        if (enable_spi1) {
-                at91_set_A_periph(AT91_PIN_PB12, 0);    /* SPI1_MISO */
-                at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
-                at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
-
-                platform_device_register(&at91cap9_spi1_device);
-        }
-}
-#else
-void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  Timer/Counter block
- * -------------------------------------------------------------------- */
-
-#ifdef CONFIG_ATMEL_TCLIB
-
-static struct resource tcb_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_TCB0,
-                .end    = AT91CAP9_BASE_TCB0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_TCB,
-                .end    = AT91CAP9_ID_TCB,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_tcb_device = {
-        .name           = "atmel_tcb",
-        .id             = 0,
-        .resource       = tcb_resources,
-        .num_resources  = ARRAY_SIZE(tcb_resources),
-};
-
-static void __init at91_add_device_tc(void)
-{
-        platform_device_register(&at91cap9_tcb_device);
-}
-#else
-static void __init at91_add_device_tc(void) { }
-#endif
-
-
-/* --------------------------------------------------------------------
- *  RTT
- * -------------------------------------------------------------------- */
-
-static struct resource rtt_resources[] = {
-        {
-                .start  = AT91CAP9_BASE_RTT,
-                .end    = AT91CAP9_BASE_RTT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device at91cap9_rtt_device = {
-        .name           = "at91_rtt",
-        .id             = 0,
-        .resource       = rtt_resources,
-        .num_resources  = ARRAY_SIZE(rtt_resources),
-};
-
-static void __init at91_add_device_rtt(void)
-{
-        platform_device_register(&at91cap9_rtt_device);
-}
-
-
-/* --------------------------------------------------------------------
- *  Watchdog
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
-static struct resource wdt_resources[] = {
-        {
-                .start  = AT91CAP9_BASE_WDT,
-                .end    = AT91CAP9_BASE_WDT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device at91cap9_wdt_device = {
-        .name           = "at91_wdt",
-        .id             = -1,
-        .resource       = wdt_resources,
-        .num_resources  = ARRAY_SIZE(wdt_resources),
-};
-
-static void __init at91_add_device_watchdog(void)
-{
-        platform_device_register(&at91cap9_wdt_device);
-}
-#else
-static void __init at91_add_device_watchdog(void) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  PWM
- * --------------------------------------------------------------------*/
-
-#if defined(CONFIG_ATMEL_PWM)
-static u32 pwm_mask;
-
-static struct resource pwm_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_PWMC,
-                .end    = AT91CAP9_BASE_PWMC + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_PWMC,
-                .end    = AT91CAP9_ID_PWMC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_pwm0_device = {
-        .name   = "atmel_pwm",
-        .id     = -1,
-        .dev    = {
-                .platform_data          = &pwm_mask,
-        },
-        .resource       = pwm_resources,
-        .num_resources  = ARRAY_SIZE(pwm_resources),
-};
-
-void __init at91_add_device_pwm(u32 mask)
-{
-        if (mask & (1 << AT91_PWM0))
-                at91_set_A_periph(AT91_PIN_PB19, 1);    /* enable PWM0 */
-
-        if (mask & (1 << AT91_PWM1))
-                at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM1 */
-
-        if (mask & (1 << AT91_PWM2))
-                at91_set_B_periph(AT91_PIN_PC29, 1);    /* enable PWM2 */
-
-        if (mask & (1 << AT91_PWM3))
-                at91_set_B_periph(AT91_PIN_PA11, 1);    /* enable PWM3 */
-
-        pwm_mask = mask;
-
-        platform_device_register(&at91cap9_pwm0_device);
-}
-#else
-void __init at91_add_device_pwm(u32 mask) {}
-#endif
-
-
-
-/* --------------------------------------------------------------------
- *  AC97
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
-static u64 ac97_dmamask = DMA_BIT_MASK(32);
-static struct ac97c_platform_data ac97_data;
-
-static struct resource ac97_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_AC97C,
-                .end    = AT91CAP9_BASE_AC97C + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_AC97C,
-                .end    = AT91CAP9_ID_AC97C,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_ac97_device = {
-        .name           = "atmel_ac97c",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &ac97_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &ac97_data,
-        },
-        .resource       = ac97_resources,
-        .num_resources  = ARRAY_SIZE(ac97_resources),
-};
-
-void __init at91_add_device_ac97(struct ac97c_platform_data *data)
-{
-        if (!data)
-                return;
-
-        at91_set_A_periph(AT91_PIN_PA6, 0);     /* AC97FS */
-        at91_set_A_periph(AT91_PIN_PA7, 0);     /* AC97CK */
-        at91_set_A_periph(AT91_PIN_PA8, 0);     /* AC97TX */
-        at91_set_A_periph(AT91_PIN_PA9, 0);     /* AC97RX */
-
-        /* reset */
-        if (gpio_is_valid(data->reset_pin))
-                at91_set_gpio_output(data->reset_pin, 0);
-
-        ac97_data = *data;
-        platform_device_register(&at91cap9_ac97_device);
-}
-#else
-void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  LCD Controller
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-static u64 lcdc_dmamask = DMA_BIT_MASK(32);
-static struct atmel_lcdfb_info lcdc_data;
-
-static struct resource lcdc_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_LCDC_BASE,
-                .end    = AT91CAP9_LCDC_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_LCDC,
-                .end    = AT91CAP9_ID_LCDC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91_lcdc_device = {
-        .name           = "atmel_lcdfb",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &lcdc_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &lcdc_data,
-        },
-        .resource       = lcdc_resources,
-        .num_resources  = ARRAY_SIZE(lcdc_resources),
-};
-
-void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
-{
-        if (!data)
-                return;
-
-        if (cpu_is_at91cap9_revB())
-                irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
-
-        at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
-        at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
-        at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
-        at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
-        at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
-        at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
-        at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
-        at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
-        at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
-        at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
-        at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
-        at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
-        at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
-        at91_set_A_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
-        at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
-        at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
-        at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
-        at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
-        at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
-        at91_set_A_periph(AT91_PIN_PC25, 0);    /* LCDD21 */
-        at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
-        at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
-
-        lcdc_data = *data;
-        platform_device_register(&at91_lcdc_device);
-}
-#else
-void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  SSC -- Synchronous Serial Controller
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
-static u64 ssc0_dmamask = DMA_BIT_MASK(32);
-
-static struct resource ssc0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SSC0,
-                .end    = AT91CAP9_BASE_SSC0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SSC0,
-                .end    = AT91CAP9_ID_SSC0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_ssc0_device = {
-        .name   = "ssc",
-        .id     = 0,
-        .dev    = {
-                .dma_mask               = &ssc0_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = ssc0_resources,
-        .num_resources  = ARRAY_SIZE(ssc0_resources),
-};
-
-static inline void configure_ssc0_pins(unsigned pins)
-{
-        if (pins & ATMEL_SSC_TF)
-                at91_set_A_periph(AT91_PIN_PB0, 1);
-        if (pins & ATMEL_SSC_TK)
-                at91_set_A_periph(AT91_PIN_PB1, 1);
-        if (pins & ATMEL_SSC_TD)
-                at91_set_A_periph(AT91_PIN_PB2, 1);
-        if (pins & ATMEL_SSC_RD)
-                at91_set_A_periph(AT91_PIN_PB3, 1);
-        if (pins & ATMEL_SSC_RK)
-                at91_set_A_periph(AT91_PIN_PB4, 1);
-        if (pins & ATMEL_SSC_RF)
-                at91_set_A_periph(AT91_PIN_PB5, 1);
-}
-
-static u64 ssc1_dmamask = DMA_BIT_MASK(32);
-
-static struct resource ssc1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_SSC1,
-                .end    = AT91CAP9_BASE_SSC1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_SSC1,
-                .end    = AT91CAP9_ID_SSC1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91cap9_ssc1_device = {
-        .name   = "ssc",
-        .id     = 1,
-        .dev    = {
-                .dma_mask               = &ssc1_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-        .resource       = ssc1_resources,
-        .num_resources  = ARRAY_SIZE(ssc1_resources),
-};
-
-static inline void configure_ssc1_pins(unsigned pins)
-{
-        if (pins & ATMEL_SSC_TF)
-                at91_set_A_periph(AT91_PIN_PB6, 1);
-        if (pins & ATMEL_SSC_TK)
-                at91_set_A_periph(AT91_PIN_PB7, 1);
-        if (pins & ATMEL_SSC_TD)
-                at91_set_A_periph(AT91_PIN_PB8, 1);
-        if (pins & ATMEL_SSC_RD)
-                at91_set_A_periph(AT91_PIN_PB9, 1);
-        if (pins & ATMEL_SSC_RK)
-                at91_set_A_periph(AT91_PIN_PB10, 1);
-        if (pins & ATMEL_SSC_RF)
-                at91_set_A_periph(AT91_PIN_PB11, 1);
-}
-
-/*
- * SSC controllers are accessed through library code, instead of any
- * kind of all-singing/all-dancing driver.  For example one could be
- * used by a particular I2S audio codec's driver, while another one
- * on the same system might be used by a custom data capture driver.
- */
-void __init at91_add_device_ssc(unsigned id, unsigned pins)
-{
-        struct platform_device *pdev;
-
-        /*
-         * NOTE: caller is responsible for passing information matching
-         * "pins" to whatever will be using each particular controller.
-         */
-        switch (id) {
-        case AT91CAP9_ID_SSC0:
-                pdev = &at91cap9_ssc0_device;
-                configure_ssc0_pins(pins);
-                break;
-        case AT91CAP9_ID_SSC1:
-                pdev = &at91cap9_ssc1_device;
-                configure_ssc1_pins(pins);
-                break;
-        default:
-                return;
-        }
-
-        platform_device_register(pdev);
-}
-
-#else
-void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  UART
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_SERIAL_ATMEL)
-static struct resource dbgu_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_DBGU,
-                .end    = AT91CAP9_BASE_DBGU + SZ_512 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91_ID_SYS,
-                .end    = AT91_ID_SYS,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data dbgu_data = {
-        .use_dma_tx     = 0,
-        .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
-};
-
-static u64 dbgu_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_dbgu_device = {
-        .name           = "atmel_usart",
-        .id             = 0,
-        .dev            = {
-                                .dma_mask               = &dbgu_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &dbgu_data,
-        },
-        .resource       = dbgu_resources,
-        .num_resources  = ARRAY_SIZE(dbgu_resources),
-};
-
-static inline void configure_dbgu_pins(void)
-{
-        at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
-        at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
-}
-
-static struct resource uart0_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_US0,
-                .end    = AT91CAP9_BASE_US0 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_US0,
-                .end    = AT91CAP9_ID_US0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data uart0_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-
-static u64 uart0_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_uart0_device = {
-        .name           = "atmel_usart",
-        .id             = 1,
-        .dev            = {
-                                .dma_mask               = &uart0_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart0_data,
-        },
-        .resource       = uart0_resources,
-        .num_resources  = ARRAY_SIZE(uart0_resources),
-};
-
-static inline void configure_usart0_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PA22, 1);            /* TXD0 */
-        at91_set_A_periph(AT91_PIN_PA23, 0);            /* RXD0 */
-
-        if (pins & ATMEL_UART_RTS)
-                at91_set_A_periph(AT91_PIN_PA24, 0);    /* RTS0 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_A_periph(AT91_PIN_PA25, 0);    /* CTS0 */
-}
-
-static struct resource uart1_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_US1,
-                .end    = AT91CAP9_BASE_US1 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_US1,
-                .end    = AT91CAP9_ID_US1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data uart1_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-
-static u64 uart1_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_uart1_device = {
-        .name           = "atmel_usart",
-        .id             = 2,
-        .dev            = {
-                                .dma_mask               = &uart1_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart1_data,
-        },
-        .resource       = uart1_resources,
-        .num_resources  = ARRAY_SIZE(uart1_resources),
-};
-
-static inline void configure_usart1_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
-        at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
-
-        if (pins & ATMEL_UART_RTS)
-                at91_set_B_periph(AT91_PIN_PD7, 0);     /* RTS1 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_B_periph(AT91_PIN_PD8, 0);     /* CTS1 */
-}
-
-static struct resource uart2_resources[] = {
-        [0] = {
-                .start  = AT91CAP9_BASE_US2,
-                .end    = AT91CAP9_BASE_US2 + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = AT91CAP9_ID_US2,
-                .end    = AT91CAP9_ID_US2,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct atmel_uart_data uart2_data = {
-        .use_dma_tx     = 1,
-        .use_dma_rx     = 1,
-};
-
-static u64 uart2_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device at91cap9_uart2_device = {
-        .name           = "atmel_usart",
-        .id             = 3,
-        .dev            = {
-                                .dma_mask               = &uart2_dmamask,
-                                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                                .platform_data          = &uart2_data,
-        },
-        .resource       = uart2_resources,
-        .num_resources  = ARRAY_SIZE(uart2_resources),
-};
-
-static inline void configure_usart2_pins(unsigned pins)
-{
-        at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
-        at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
-
-        if (pins & ATMEL_UART_RTS)
-                at91_set_B_periph(AT91_PIN_PD5, 0);     /* RTS2 */
-        if (pins & ATMEL_UART_CTS)
-                at91_set_B_periph(AT91_PIN_PD6, 0);     /* CTS2 */
-}
-
-static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
-struct platform_device *atmel_default_console_device;   /* the serial console device */
-
-void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
-{
-        struct platform_device *pdev;
-        struct atmel_uart_data *pdata;
-
-        switch (id) {
-                case 0:         /* DBGU */
-                        pdev = &at91cap9_dbgu_device;
-                        configure_dbgu_pins();
-                        break;
-                case AT91CAP9_ID_US0:
-                        pdev = &at91cap9_uart0_device;
-                        configure_usart0_pins(pins);
-                        break;
-                case AT91CAP9_ID_US1:
-                        pdev = &at91cap9_uart1_device;
-                        configure_usart1_pins(pins);
-                        break;
-                case AT91CAP9_ID_US2:
-                        pdev = &at91cap9_uart2_device;
-                        configure_usart2_pins(pins);
-                        break;
-                default:
-                        return;
-        }
-        pdata = pdev->dev.platform_data;
-        pdata->num = portnr;            /* update to mapped ID */
-
-        if (portnr < ATMEL_MAX_UART)
-                at91_uarts[portnr] = pdev;
-}
-
-void __init at91_set_serial_console(unsigned portnr)
-{
-        if (portnr < ATMEL_MAX_UART) {
-                atmel_default_console_device = at91_uarts[portnr];
-                at91cap9_set_console_clock(at91_uarts[portnr]->id);
-        }
-}
-
-void __init at91_add_device_serial(void)
-{
-        int i;
-
-        for (i = 0; i < ATMEL_MAX_UART; i++) {
-                if (at91_uarts[i])
-                        platform_device_register(at91_uarts[i]);
-        }
-
-        if (!atmel_default_console_device)
-                printk(KERN_INFO "AT91: No default serial console defined.\n");
-}
-#else
-void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
-void __init at91_set_serial_console(unsigned portnr) {}
-void __init at91_add_device_serial(void) {}
-#endif
-
-
-/* -------------------------------------------------------------------- */
-/*
- * These devices are always present and don't need any board-specific
- * setup.
- */
-static int __init at91_add_standard_devices(void)
-{
-        at91_add_device_rtt();
-        at91_add_device_watchdog();
-        at91_add_device_tc();
-        return 0;
-}
-
-arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 99c3174e24a2..dd6e2de13420 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -289,6 +289,15 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
         }
 };
 
+static void at91rm9200_idle(void)
+{
+        /*
+         * Disable the processor clock.  The processor will be automatically
+         * re-enabled by an interrupt or by a reset.
+         */
+        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+}
+
 static void at91rm9200_restart(char mode, const char *cmd)
 {
         /*
@@ -314,6 +323,7 @@ static void __init at91rm9200_ioremap_registers(void)
 
 static void __init at91rm9200_initialize(void)
 {
+        arm_pm_idle = at91rm9200_idle;
         arm_pm_restart = at91rm9200_restart;
         at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
                         | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index d4036ba43612..9ac8c6fe3363 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -12,6 +12,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -328,8 +329,15 @@ static void __init at91sam9260_ioremap_registers(void)
         at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
 }
 
+static void at91sam9260_idle(void)
+{
+        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+        cpu_do_idle();
+}
+
 static void __init at91sam9260_initialize(void)
 {
+        arm_pm_idle = at91sam9260_idle;
         arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
                         | (1 << AT91SAM9260_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 023c2ff138df..ab76868f01f5 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -12,6 +12,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -286,8 +287,15 @@ static void __init at91sam9261_ioremap_registers(void)
         at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
 }
 
+static void at91sam9261_idle(void)
+{
+        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+        cpu_do_idle();
+}
+
 static void __init at91sam9261_initialize(void)
 {
+        arm_pm_idle = at91sam9261_idle;
         arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
                         | (1 << AT91SAM9261_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 75e876c258af..247ab633abcc 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -12,6 +12,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -307,8 +308,15 @@ static void __init at91sam9263_ioremap_registers(void)
         at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
 }
 
+static void at91sam9263_idle(void)
+{
+        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+        cpu_do_idle();
+}
+
 static void __init at91sam9263_initialize(void)
 {
+        arm_pm_idle = at91sam9263_idle;
         arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
 
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 1cb6a96b1c1e..5b12192e52ec 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -317,6 +317,12 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
         }
 };
 
+static void at91sam9g45_idle(void)
+{
+        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+        cpu_do_idle();
+}
+
 /* --------------------------------------------------------------------
  *  AT91SAM9G45 processor initialization
  * -------------------------------------------------------------------- */
@@ -337,6 +343,7 @@ static void __init at91sam9g45_ioremap_registers(void)
 
 static void __init at91sam9g45_initialize(void)
 {
+        arm_pm_idle = at91sam9g45_idle;
         arm_pm_restart = at91sam9g45_restart;
         at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
 
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index d2c91a841cb8..fd60e226a987 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -11,6 +11,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -291,8 +292,15 @@ static void __init at91sam9rl_ioremap_registers(void)
         at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
 }
 
+static void at91sam9rl_idle(void)
+{
+        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+        cpu_do_idle();
+}
+
 static void __init at91sam9rl_initialize(void)
 {
+        arm_pm_idle = at91sam9rl_idle;
         arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
 
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 56ba3bd035ae..0154b7f44ff1 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -13,6 +13,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/irq.h>
+#include <asm/proc-fns.h>
 #include <asm/mach/arch.h>
 #include <mach/at91x40.h>
 #include <mach/at91_st.h>
@@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk)
         return AT91X40_MASTER_CLOCK;
 }
 
+static void at91x40_idle(void)
+{
+        /*
+         * Disable the processor clock.  The processor will be automatically
+         * re-enabled by an interrupt or by a reset.
+         */
+        at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
+        cpu_do_idle();
+}
+
 void __init at91x40_initialize(unsigned long main_clock)
 {
+        arm_pm_idle = at91x40_idle;
         at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
                         | (1 << AT91X40_ID_IRQ2);
 }
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
deleted file mode 100644
index ac3de4f7c31d..000000000000
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ /dev/null
@@ -1,396 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/board-cap9adk.c
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2005 SAN People
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#include <linux/types.h>
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/ads7846.h>
-#include <linux/fb.h>
-#include <linux/mtd/physmap.h>
-
-#include <video/atmel_lcdc.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <mach/board.h>
-#include <mach/at91cap9_matrix.h>
-#include <mach/at91sam9_smc.h>
-#include <mach/system_rev.h>
-
-#include "sam9_smc.h"
-#include "generic.h"
-
-
-static void __init cap9adk_init_early(void)
-{
-        /* Initialize processor: 12 MHz crystal */
-        at91_initialize(12000000);
-
-        /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */
-        at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11);
-        /* ... POWER LED always on */
-        at91_set_gpio_output(AT91_PIN_PC29, 1);
-
-        /* Setup the serial ports and console */
-        at91_register_uart(0, 0, 0);            /* DBGU = ttyS0 */
-        at91_set_serial_console(0);
-}
-
-/*
- * USB Host port
- */
-static struct at91_usbh_data __initdata cap9adk_usbh_data = {
-        .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
-};
-
-/*
- * USB HS Device port
- */
-static struct usba_platform_data __initdata cap9adk_usba_udc_data = {
-        .vbus_pin       = AT91_PIN_PB31,
-};
-
-/*
- * ADS7846 Touchscreen
- */
-#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-static int ads7843_pendown_state(void)
-{
-        return !at91_get_gpio_value(AT91_PIN_PC4);      /* Touchscreen PENIRQ */
-}
-
-static struct ads7846_platform_data ads_info = {
-        .model                  = 7843,
-        .x_min                  = 150,
-        .x_max                  = 3830,
-        .y_min                  = 190,
-        .y_max                  = 3830,
-        .vref_delay_usecs       = 100,
-        .x_plate_ohms           = 450,
-        .y_plate_ohms           = 250,
-        .pressure_max           = 15000,
-        .debounce_max           = 1,
-        .debounce_rep           = 0,
-        .debounce_tol           = (~0),
-        .get_pendown_state      = ads7843_pendown_state,
-};
-
-static void __init cap9adk_add_device_ts(void)
-{
-        at91_set_gpio_input(AT91_PIN_PC4, 1);   /* Touchscreen PENIRQ */
-        at91_set_gpio_input(AT91_PIN_PC5, 1);   /* Touchscreen BUSY */
-}
-#else
-static void __init cap9adk_add_device_ts(void) {}
-#endif
-
-
-/*
- * SPI devices.
- */
-static struct spi_board_info cap9adk_spi_devices[] = {
-#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
-        {       /* DataFlash card */
-                .modalias       = "mtd_dataflash",
-                .chip_select    = 0,
-                .max_speed_hz   = 15 * 1000 * 1000,
-                .bus_num        = 0,
-        },
-#endif
-#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-        {
-                .modalias       = "ads7846",
-                .chip_select    = 3,            /* can be 2 or 3, depending on J2 jumper */
-                .max_speed_hz   = 125000 * 26,  /* (max sample rate @ 3V) * (cmd + data + overhead) */
-                .bus_num        = 0,
-                .platform_data  = &ads_info,
-                .irq            = AT91_PIN_PC4,
-        },
-#endif
-};
-
-
-/*
- * MCI (SD/MMC)
- */
-static struct at91_mmc_data __initdata cap9adk_mmc_data = {
-        .wire4          = 1,
-        .det_pin        = -EINVAL,
-        .wp_pin         = -EINVAL,
-        .vcc_pin        = -EINVAL,
-};
-
-
-/*
- * MACB Ethernet device
- */
-static struct macb_platform_data __initdata cap9adk_macb_data = {
-        .phy_irq_pin    = -EINVAL,
-        .is_rmii        = 1,
-};
-
-
-/*
- * NAND flash
- */
-static struct mtd_partition __initdata cap9adk_nand_partitions[] = {
-        {
-                .name   = "NAND partition",
-                .offset = 0,
-                .size   = MTDPART_SIZ_FULL,
-        },
-};
-
-static struct atmel_nand_data __initdata cap9adk_nand_data = {
-        .ale            = 21,
-        .cle            = 22,
-        .det_pin        = -EINVAL,
-        .rdy_pin        = -EINVAL,
-        .enable_pin     = AT91_PIN_PD15,
-        .parts          = cap9adk_nand_partitions,
-        .num_parts      = ARRAY_SIZE(cap9adk_nand_partitions),
-};
-
-static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
-        .ncs_read_setup         = 1,
-        .nrd_setup              = 2,
-        .ncs_write_setup        = 1,
-        .nwe_setup              = 2,
-
-        .ncs_read_pulse         = 6,
-        .nrd_pulse              = 4,
-        .ncs_write_pulse        = 6,
-        .nwe_pulse              = 4,
-
-        .read_cycle             = 8,
-        .write_cycle            = 8,
-
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
-        .tdf_cycles             = 1,
-};
-
-static void __init cap9adk_add_device_nand(void)
-{
-        unsigned long csa;
-
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
-
-        cap9adk_nand_data.bus_width_16 = board_have_nand_16bit();
-        /* setup bus-width (8 or 16) */
-        if (cap9adk_nand_data.bus_width_16)
-                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
-        else
-                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
-
-        /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &cap9adk_nand_smc_config);
-
-        at91_add_device_nand(&cap9adk_nand_data);
-}
-
-
-/*
- * NOR flash
- */
-static struct mtd_partition cap9adk_nor_partitions[] = {
-        {
-                .name           = "NOR partition",
-                .offset         = 0,
-                .size           = MTDPART_SIZ_FULL,
-        },
-};
-
-static struct physmap_flash_data cap9adk_nor_data = {
-        .width          = 2,
-        .parts          = cap9adk_nor_partitions,
-        .nr_parts       = ARRAY_SIZE(cap9adk_nor_partitions),
-};
-
-#define NOR_BASE        AT91_CHIPSELECT_0
-#define NOR_SIZE        SZ_8M
-
-static struct resource nor_flash_resources[] = {
-        {
-                .start  = NOR_BASE,
-                .end    = NOR_BASE + NOR_SIZE - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device cap9adk_nor_flash = {
-        .name           = "physmap-flash",
-        .id             = 0,
-        .dev            = {
-                                .platform_data  = &cap9adk_nor_data,
-        },
-        .resource       = nor_flash_resources,
-        .num_resources  = ARRAY_SIZE(nor_flash_resources),
-};
-
-static struct sam9_smc_config __initdata cap9adk_nor_smc_config = {
-        .ncs_read_setup         = 2,
-        .nrd_setup              = 4,
-        .ncs_write_setup        = 2,
-        .nwe_setup              = 4,
-
-        .ncs_read_pulse         = 10,
-        .nrd_pulse              = 8,
-        .ncs_write_pulse        = 10,
-        .nwe_pulse              = 8,
-
-        .read_cycle             = 16,
-        .write_cycle            = 16,
-
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
-        .tdf_cycles             = 1,
-};
-
-static __init void cap9adk_add_device_nor(void)
-{
-        unsigned long csa;
-
-        csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
-
-        /* configure chip-select 0 (NOR) */
-        sam9_smc_configure(0, 0, &cap9adk_nor_smc_config);
-
-        platform_device_register(&cap9adk_nor_flash);
-}
-
-
-/*
- * LCD Controller
- */
-#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-static struct fb_videomode at91_tft_vga_modes[] = {
-        {
-                .name           = "TX09D50VM1CCA @ 60",
-                .refresh        = 60,
-                .xres           = 240,          .yres           = 320,
-                .pixclock       = KHZ2PICOS(4965),
-
-                .left_margin    = 1,            .right_margin   = 33,
-                .upper_margin   = 1,            .lower_margin   = 0,
-                .hsync_len      = 5,            .vsync_len      = 1,
-
-                .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-                .vmode          = FB_VMODE_NONINTERLACED,
-        },
-};
-
-static struct fb_monspecs at91fb_default_monspecs = {
-        .manufacturer   = "HIT",
-        .monitor        = "TX09D70VM1CCA",
-
-        .modedb         = at91_tft_vga_modes,
-        .modedb_len     = ARRAY_SIZE(at91_tft_vga_modes),
-        .hfmin          = 15000,
-        .hfmax          = 64000,
-        .vfmin          = 50,
-        .vfmax          = 150,
-};
-
-#define AT91CAP9_DEFAULT_LCDCON2        (ATMEL_LCDC_MEMOR_LITTLE \
-                                        | ATMEL_LCDC_DISTYPE_TFT    \
-                                        | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
-
-static void at91_lcdc_power_control(int on)
-{
-        if (on)
-                at91_set_gpio_value(AT91_PIN_PC0, 0);   /* power up */
-        else
-                at91_set_gpio_value(AT91_PIN_PC0, 1);   /* power down */
-}
-
-/* Driver datas */
-static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data = {
-        .default_bpp                    = 16,
-        .default_dmacon                 = ATMEL_LCDC_DMAEN,
-        .default_lcdcon2                = AT91CAP9_DEFAULT_LCDCON2,
-        .default_monspecs               = &at91fb_default_monspecs,
-        .atmel_lcdfb_power_control      = at91_lcdc_power_control,
-        .guard_time                     = 1,
-};
-
-#else
-static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
-#endif
-
-
-/*
- * AC97
- */
-static struct ac97c_platform_data cap9adk_ac97_data = {
-        .reset_pin      = -EINVAL,
-};
-
-
-static void __init cap9adk_board_init(void)
-{
-        /* Serial */
-        at91_add_device_serial();
-        /* USB Host */
-        at91_add_device_usbh(&cap9adk_usbh_data);
-        /* USB HS */
-        at91_add_device_usba(&cap9adk_usba_udc_data);
-        /* SPI */
-        at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
-        /* Touchscreen */
-        cap9adk_add_device_ts();
-        /* MMC */
-        at91_add_device_mmc(1, &cap9adk_mmc_data);
-        /* Ethernet */
-        at91_add_device_eth(&cap9adk_macb_data);
-        /* NAND */
-        cap9adk_add_device_nand();
-        /* NOR Flash */
-        cap9adk_add_device_nor();
-        /* I2C */
-        at91_add_device_i2c(NULL, 0);
-        /* LCD Controller */
-        at91_add_device_lcdc(&cap9adk_lcdc_data);
-        /* AC97 */
-        at91_add_device_ac97(&cap9adk_ac97_data);
-}
-
-MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK")
-        /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */
-        .timer          = &at91sam926x_timer,
-        .map_io         = at91_map_io,
-        .init_early     = cap9adk_init_early,
-        .init_irq       = at91_init_irq_default,
-        .init_machine   = cap9adk_board_init,
-MACHINE_END
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 61873f3aa92d..aa04e22a9da6 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -47,8 +47,7 @@
 /*
  * Chips have some kind of clocks : group them by functionality
  */
-#define cpu_has_utmi()          (  cpu_is_at91cap9() \
-                                || cpu_is_at91sam9rl() \
+#define cpu_has_utmi()          (  cpu_is_at91sam9rl() \
                                 || cpu_is_at91sam9g45())
 
 #define cpu_has_800M_plla()     (  cpu_is_at91sam9g20() \
@@ -602,8 +601,6 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
                    cpu_is_at91sam9g10()) {
                 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
                 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
-        } else if (cpu_is_at91cap9()) {
-                uhpck.pmc_mask = AT91CAP9_PMC_UHP;
         }
         at91_sys_write(AT91_CKGR_PLLBR, 0);
 
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
index a851e6c98421..555d956b3a57 100644
--- a/arch/arm/mach-at91/cpuidle.c
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -39,20 +39,15 @@ static int at91_enter_idle(struct cpuidle_device *dev,
 {
         struct timeval before, after;
         int idle_time;
-        u32 saved_lpr;
 
         local_irq_disable();
         do_gettimeofday(&before);
         if (index == 0)
                 /* Wait for interrupt state */
                 cpu_do_idle();
-        else if (index == 1) {
-                asm("b 1f; .align 5; 1:");
-                asm("mcr p15, 0, r0, c7, c10, 4");      /* drain write buffer */
-                saved_lpr = sdram_selfrefresh_enable();
-                cpu_do_idle();
-                sdram_selfrefresh_disable(saved_lpr);
-        }
+        else if (index == 1)
+                at91_standby();
+
         do_gettimeofday(&after);
         local_irq_enable();
         idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 594133451c0c..7e8280e798c1 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -45,7 +45,6 @@ extern void __init at91sam9261_set_console_clock(int id);
 extern void __init at91sam9263_set_console_clock(int id);
 extern void __init at91sam9rl_set_console_clock(int id);
 extern void __init at91sam9g45_set_console_clock(int id);
-extern void __init at91cap9_set_console_clock(int id);
 #ifdef CONFIG_AT91_PMC_UNIT
 extern int __init at91_clock_init(unsigned long main_clock);
 #else
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index e46f93e34aab..dbdd6ae473d5 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -23,10 +23,8 @@
 #define         AT91_PMC_PCK            (1 <<  0)               /* Processor Clock */
 #define         AT91RM9200_PMC_UDP      (1 <<  1)               /* USB Devcice Port Clock [AT91RM9200 only] */
 #define         AT91RM9200_PMC_MCKUDP   (1 <<  2)               /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
-#define         AT91CAP9_PMC_DDR        (1 <<  2)               /* DDR Clock [CAP9 revC & some SAM9 only] */
 #define         AT91RM9200_PMC_UHP      (1 <<  4)               /* USB Host Port Clock [AT91RM9200 only] */
 #define         AT91SAM926x_PMC_UHP     (1 <<  6)               /* USB Host Port Clock [AT91SAM926x only] */
-#define         AT91CAP9_PMC_UHP        (1 <<  6)               /* USB Host Port Clock [AT91CAP9 only] */
 #define         AT91SAM926x_PMC_UDP     (1 <<  7)               /* USB Devcice Port Clock [AT91SAM926x only] */
 #define         AT91_PMC_PCK0           (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1           (1 <<  9)               /* Programmable Clock 1 */
@@ -40,7 +38,7 @@
 #define AT91_PMC_PCDR           (AT91_PMC + 0x14)       /* Peripheral Clock Disable Register */
 #define AT91_PMC_PCSR           (AT91_PMC + 0x18)       /* Peripheral Clock Status Register */
 
-#define AT91_CKGR_UCKR          (AT91_PMC + 0x1C)       /* UTMI Clock Register [some SAM9, CAP9] */
+#define AT91_CKGR_UCKR          (AT91_PMC + 0x1C)       /* UTMI Clock Register [some SAM9] */
 #define         AT91_PMC_UPLLEN         (1   << 16)             /* UTMI PLL Enable */
 #define         AT91_PMC_UPLLCOUNT      (0xf << 20)             /* UTMI PLL Start-up Time */
 #define         AT91_PMC_BIASEN         (1   << 24)             /* UTMI BIAS Enable */
@@ -48,7 +46,7 @@
 
 #define AT91_CKGR_MOR           (AT91_PMC + 0x20)       /* Main Oscillator Register [not on SAM9RL] */
 #define         AT91_PMC_MOSCEN         (1    << 0)             /* Main Oscillator Enable */
-#define         AT91_PMC_OSCBYPASS      (1    << 1)             /* Oscillator Bypass [SAM9x, CAP9] */
+#define         AT91_PMC_OSCBYPASS      (1    << 1)             /* Oscillator Bypass [SAM9x] */
 #define         AT91_PMC_OSCOUNT        (0xff << 8)             /* Main Oscillator Start-up Time */
 
 #define AT91_CKGR_MCFR          (AT91_PMC + 0x24)       /* Main Clock Frequency Register */
@@ -87,7 +85,7 @@
 #define                 AT91RM9200_PMC_MDIV_2           (1 << 8)
 #define                 AT91RM9200_PMC_MDIV_3           (2 << 8)
 #define                 AT91RM9200_PMC_MDIV_4           (3 << 8)
-#define                 AT91SAM9_PMC_MDIV_1             (0 << 8)        /* [SAM9,CAP9 only] */
+#define                 AT91SAM9_PMC_MDIV_1             (0 << 8)        /* [SAM9 only] */
 #define                 AT91SAM9_PMC_MDIV_2             (1 << 8)
 #define                 AT91SAM9_PMC_MDIV_4             (2 << 8)
 #define                 AT91SAM9_PMC_MDIV_6             (3 << 8)        /* [some SAM9 only] */
@@ -117,17 +115,15 @@
 #define         AT91_PMC_LOCKA          (1 <<  1)               /* PLLA Lock */
 #define         AT91_PMC_LOCKB          (1 <<  2)               /* PLLB Lock */
 #define         AT91_PMC_MCKRDY         (1 <<  3)               /* Master Clock */
-#define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9, AT91CAP9 only] */
-#define         AT91_PMC_OSCSEL         (1 <<  7)               /* Slow Clock Oscillator [AT91CAP9 revC only] */
+#define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9] */
 #define         AT91_PMC_PCK0RDY        (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
 #define         AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
 #define         AT91_PMC_PCK3RDY        (1 << 11)               /* Programmable Clock 3 */
 #define AT91_PMC_IMR            (AT91_PMC + 0x6c)       /* Interrupt Mask Register */
 
-#define AT91_PMC_PROT           (AT91_PMC + 0xe4)       /* Protect Register [AT91CAP9 revC only] */
+#define AT91_PMC_PROT           (AT91_PMC + 0xe4)       /* Write Protect Mode Register [some SAM9] */
 #define         AT91_PMC_PROTKEY        0x504d4301      /* Activation Code */
 
-#define AT91_PMC_VER            (AT91_PMC + 0xfc)       /* PMC Module Version [AT91CAP9 only] */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
deleted file mode 100644
index 61d952902f2b..000000000000
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91cap9.h
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2007 Atmel Corporation.
- *
- * Common definitions.
- * Based on AT91CAP9 datasheet revision B (Preliminary).
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91CAP9_H
-#define AT91CAP9_H
-
-/*
- * Peripheral identifiers/interrupts.
- */
-#define AT91CAP9_ID_PIOABCD     2       /* Parallel IO Controller A, B, C and D */
-#define AT91CAP9_ID_MPB0        3       /* MP Block Peripheral 0 */
-#define AT91CAP9_ID_MPB1        4       /* MP Block Peripheral 1 */
-#define AT91CAP9_ID_MPB2        5       /* MP Block Peripheral 2 */
-#define AT91CAP9_ID_MPB3        6       /* MP Block Peripheral 3 */
-#define AT91CAP9_ID_MPB4        7       /* MP Block Peripheral 4 */
-#define AT91CAP9_ID_US0         8       /* USART 0 */
-#define AT91CAP9_ID_US1         9       /* USART 1 */
-#define AT91CAP9_ID_US2         10      /* USART 2 */
-#define AT91CAP9_ID_MCI0        11      /* Multimedia Card Interface 0 */
-#define AT91CAP9_ID_MCI1        12      /* Multimedia Card Interface 1 */
-#define AT91CAP9_ID_CAN         13      /* CAN */
-#define AT91CAP9_ID_TWI         14      /* Two-Wire Interface */
-#define AT91CAP9_ID_SPI0        15      /* Serial Peripheral Interface 0 */
-#define AT91CAP9_ID_SPI1        16      /* Serial Peripheral Interface 0 */
-#define AT91CAP9_ID_SSC0        17      /* Serial Synchronous Controller 0 */
-#define AT91CAP9_ID_SSC1        18      /* Serial Synchronous Controller 1 */
-#define AT91CAP9_ID_AC97C       19      /* AC97 Controller */
-#define AT91CAP9_ID_TCB         20      /* Timer Counter 0, 1 and 2 */
-#define AT91CAP9_ID_PWMC        21      /* Pulse Width Modulation Controller */
-#define AT91CAP9_ID_EMAC        22      /* Ethernet */
-#define AT91CAP9_ID_AESTDES     23      /* Advanced Encryption Standard, Triple DES */
-#define AT91CAP9_ID_ADC         24      /* Analog-to-Digital Converter */
-#define AT91CAP9_ID_ISI         25      /* Image Sensor Interface */
-#define AT91CAP9_ID_LCDC        26      /* LCD Controller */
-#define AT91CAP9_ID_DMA         27      /* DMA Controller */
-#define AT91CAP9_ID_UDPHS       28      /* USB High Speed Device Port */
-#define AT91CAP9_ID_UHP         29      /* USB Host Port */
-#define AT91CAP9_ID_IRQ0        30      /* Advanced Interrupt Controller (IRQ0) */
-#define AT91CAP9_ID_IRQ1        31      /* Advanced Interrupt Controller (IRQ1) */
-
-/*
- * User Peripheral physical base addresses.
- */
-#define AT91CAP9_BASE_UDPHS             0xfff78000
-#define AT91CAP9_BASE_TCB0              0xfff7c000
-#define AT91CAP9_BASE_TC0               0xfff7c000
-#define AT91CAP9_BASE_TC1               0xfff7c040
-#define AT91CAP9_BASE_TC2               0xfff7c080
-#define AT91CAP9_BASE_MCI0              0xfff80000
-#define AT91CAP9_BASE_MCI1              0xfff84000
-#define AT91CAP9_BASE_TWI               0xfff88000
-#define AT91CAP9_BASE_US0               0xfff8c000
-#define AT91CAP9_BASE_US1               0xfff90000
-#define AT91CAP9_BASE_US2               0xfff94000
-#define AT91CAP9_BASE_SSC0              0xfff98000
-#define AT91CAP9_BASE_SSC1              0xfff9c000
-#define AT91CAP9_BASE_AC97C             0xfffa0000
-#define AT91CAP9_BASE_SPI0              0xfffa4000
-#define AT91CAP9_BASE_SPI1              0xfffa8000
-#define AT91CAP9_BASE_CAN               0xfffac000
-#define AT91CAP9_BASE_PWMC              0xfffb8000
-#define AT91CAP9_BASE_EMAC              0xfffbc000
-#define AT91CAP9_BASE_ADC               0xfffc0000
-#define AT91CAP9_BASE_ISI               0xfffc4000
-
-/*
- * System Peripherals (offset from AT91_BASE_SYS)
- */
-#define AT91_BCRAMC     (0xffffe400 - AT91_BASE_SYS)
-#define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
-#define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
-#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_GPBR       (cpu_is_at91cap9_revB() ?       \
-                        (0xfffffd50 - AT91_BASE_SYS) :  \
-                        (0xfffffd60 - AT91_BASE_SYS))
-
-#define AT91CAP9_BASE_ECC       0xffffe200
-#define AT91CAP9_BASE_DMA       0xffffec00
-#define AT91CAP9_BASE_SMC       0xffffe800
-#define AT91CAP9_BASE_DBGU      AT91_BASE_DBGU1
-#define AT91CAP9_BASE_PIOA      0xfffff200
-#define AT91CAP9_BASE_PIOB      0xfffff400
-#define AT91CAP9_BASE_PIOC      0xfffff600
-#define AT91CAP9_BASE_PIOD      0xfffff800
-#define AT91CAP9_BASE_RSTC      0xfffffd00
-#define AT91CAP9_BASE_SHDWC     0xfffffd10
-#define AT91CAP9_BASE_RTT       0xfffffd20
-#define AT91CAP9_BASE_PIT       0xfffffd30
-#define AT91CAP9_BASE_WDT       0xfffffd40
-
-#define AT91_USART0     AT91CAP9_BASE_US0
-#define AT91_USART1     AT91CAP9_BASE_US1
-#define AT91_USART2     AT91CAP9_BASE_US2
-
-
-/*
- * Internal Memory.
- */
-#define AT91CAP9_SRAM_BASE      0x00100000      /* Internal SRAM base address */
-#define AT91CAP9_SRAM_SIZE      (32 * SZ_1K)    /* Internal SRAM size (32Kb) */
-
-#define AT91CAP9_ROM_BASE       0x00400000      /* Internal ROM base address */
-#define AT91CAP9_ROM_SIZE       (32 * SZ_1K)    /* Internal ROM size (32Kb) */
-
-#define AT91CAP9_LCDC_BASE      0x00500000      /* LCD Controller */
-#define AT91CAP9_UDPHS_FIFO     0x00600000      /* USB High Speed Device Port */
-#define AT91CAP9_UHP_BASE       0x00700000      /* USB Host controller */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9_matrix.h b/arch/arm/mach-at91/include/mach/at91cap9_matrix.h
deleted file mode 100644
index 4b9d4aff4b4f..000000000000
--- a/arch/arm/mach-at91/include/mach/at91cap9_matrix.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91cap9_matrix.h
- *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
- *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
- *  Copyright (C) 2006 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91CAP9 datasheet revision B (Preliminary).
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91CAP9_MATRIX_H
-#define AT91CAP9_MATRIX_H
-
-#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6       (AT91_MATRIX + 0x18)    /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7       (AT91_MATRIX + 0x1C)    /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8       (AT91_MATRIX + 0x20)    /* Master Configuration Register 8 */
-#define AT91_MATRIX_MCFG9       (AT91_MATRIX + 0x24)    /* Master Configuration Register 9 */
-#define AT91_MATRIX_MCFG10      (AT91_MATRIX + 0x28)    /* Master Configuration Register 10 */
-#define AT91_MATRIX_MCFG11      (AT91_MATRIX + 0x2C)    /* Master Configuration Register 11 */
-#define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
-#define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
-#define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
-#define                 AT91_MATRIX_ULBT_FOUR           (2 << 0)
-#define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
-#define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
-
-#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5       (AT91_MATRIX + 0x54)    /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6       (AT91_MATRIX + 0x58)    /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7       (AT91_MATRIX + 0x5C)    /* Slave Configuration Register 7 */
-#define AT91_MATRIX_SCFG8       (AT91_MATRIX + 0x60)    /* Slave Configuration Register 8 */
-#define AT91_MATRIX_SCFG9       (AT91_MATRIX + 0x64)    /* Slave Configuration Register 9 */
-#define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
-#define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
-#define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
-#define                 AT91_MATRIX_DEFMSTR_TYPE_LAST   (1 << 16)
-#define                 AT91_MATRIX_DEFMSTR_TYPE_FIXED  (2 << 16)
-#define         AT91_MATRIX_FIXED_DEFMSTR       (0xf  << 18)    /* Fixed Index of Default Master */
-#define         AT91_MATRIX_ARBT                (3    << 24)    /* Arbitration Type */
-#define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
-#define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-
-#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0       (AT91_MATRIX + 0x84)    /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1       (AT91_MATRIX + 0x8C)    /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2       (AT91_MATRIX + 0x94)    /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3       (AT91_MATRIX + 0x9C)    /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4       (AT91_MATRIX + 0xA4)    /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5       (AT91_MATRIX + 0xA8)    /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5       (AT91_MATRIX + 0xAC)    /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6       (AT91_MATRIX + 0xB0)    /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6       (AT91_MATRIX + 0xB4)    /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7       (AT91_MATRIX + 0xB8)    /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7       (AT91_MATRIX + 0xBC)    /* Priority Register B for Slave 7 */
-#define AT91_MATRIX_PRAS8       (AT91_MATRIX + 0xC0)    /* Priority Register A for Slave 8 */
-#define AT91_MATRIX_PRBS8       (AT91_MATRIX + 0xC4)    /* Priority Register B for Slave 8 */
-#define AT91_MATRIX_PRAS9       (AT91_MATRIX + 0xC8)    /* Priority Register A for Slave 9 */
-#define AT91_MATRIX_PRBS9       (AT91_MATRIX + 0xCC)    /* Priority Register B for Slave 9 */
-#define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
-#define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
-#define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
-#define         AT91_MATRIX_M3PR                (3 << 12)       /* Master 3 Priority */
-#define         AT91_MATRIX_M4PR                (3 << 16)       /* Master 4 Priority */
-#define         AT91_MATRIX_M5PR                (3 << 20)       /* Master 5 Priority */
-#define         AT91_MATRIX_M6PR                (3 << 24)       /* Master 6 Priority */
-#define         AT91_MATRIX_M7PR                (3 << 28)       /* Master 7 Priority */
-#define         AT91_MATRIX_M8PR                (3 << 0)        /* Master 8 Priority (in Register B) */
-#define         AT91_MATRIX_M9PR                (3 << 4)        /* Master 9 Priority (in Register B) */
-#define         AT91_MATRIX_M10PR               (3 << 8)        /* Master 10 Priority (in Register B) */
-#define         AT91_MATRIX_M11PR               (3 << 12)       /* Master 11 Priority (in Register B) */
-
-#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
-#define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define         AT91_MATRIX_RCB2                (1 << 2)
-#define         AT91_MATRIX_RCB3                (1 << 3)
-#define         AT91_MATRIX_RCB4                (1 << 4)
-#define         AT91_MATRIX_RCB5                (1 << 5)
-#define         AT91_MATRIX_RCB6                (1 << 6)
-#define         AT91_MATRIX_RCB7                (1 << 7)
-#define         AT91_MATRIX_RCB8                (1 << 8)
-#define         AT91_MATRIX_RCB9                (1 << 9)
-#define         AT91_MATRIX_RCB10               (1 << 10)
-#define         AT91_MATRIX_RCB11               (1 << 11)
-
-#define AT91_MPBS0_SFR          (AT91_MATRIX + 0x114)   /* MPBlock Slave 0 Special Function Register */
-#define AT91_MPBS1_SFR          (AT91_MATRIX + 0x11C)   /* MPBlock Slave 1 Special Function Register */
-
-#define AT91_MATRIX_UDPHS       (AT91_MATRIX + 0x118)   /* USBHS Special Function Register [AT91CAP9 only] */
-#define         AT91_MATRIX_SELECT_UDPHS        (0 << 31)       /* select High Speed UDP */
-#define         AT91_MATRIX_SELECT_UDP          (1 << 31)       /* select standard UDP */
-#define         AT91_MATRIX_UDPHS_BYPASS_LOCK   (1 << 30)       /* bypass lock bit */
-
-#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x120)   /* EBI Chip Select Assignment Register */
-#define         AT91_MATRIX_EBI_CS1A            (1 << 1)        /* Chip Select 1 Assignment */
-#define                 AT91_MATRIX_EBI_CS1A_SMC                (0 << 1)
-#define                 AT91_MATRIX_EBI_CS1A_BCRAMC             (1 << 1)
-#define         AT91_MATRIX_EBI_CS3A            (1 << 3)        /* Chip Select 3 Assignment */
-#define                 AT91_MATRIX_EBI_CS3A_SMC                (0 << 3)
-#define                 AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA     (1 << 3)
-#define         AT91_MATRIX_EBI_CS4A            (1 << 4)        /* Chip Select 4 Assignment */
-#define                 AT91_MATRIX_EBI_CS4A_SMC                (0 << 4)
-#define                 AT91_MATRIX_EBI_CS4A_SMC_CF1            (1 << 4)
-#define         AT91_MATRIX_EBI_CS5A            (1 << 5)        /* Chip Select 5 Assignment */
-#define                 AT91_MATRIX_EBI_CS5A_SMC                (0 << 5)
-#define                 AT91_MATRIX_EBI_CS5A_SMC_CF2            (1 << 5)
-#define         AT91_MATRIX_EBI_DBPUC           (1 << 8)        /* Data Bus Pull-up Configuration */
-#define         AT91_MATRIX_EBI_DQSPDC          (1 << 9)        /* Data Qualifier Strobe Pull-Down Configuration */
-#define         AT91_MATRIX_EBI_VDDIOMSEL       (1 << 16)       /* Memory voltage selection */
-#define                 AT91_MATRIX_EBI_VDDIOMSEL_1_8V          (0 << 16)
-#define                 AT91_MATRIX_EBI_VDDIOMSEL_3_3V          (1 << 16)
-
-#define AT91_MPBS2_SFR          (AT91_MATRIX + 0x12C)   /* MPBlock Slave 2 Special Function Register */
-#define AT91_MPBS3_SFR          (AT91_MATRIX + 0x130)   /* MPBlock Slave 3 Special Function Register */
-#define AT91_APB_SFR            (AT91_MATRIX + 0x134)   /* APB Bridge Special Function Register */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
index e2f8da8ce5bc..5d4a9f846584 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
@@ -59,7 +59,6 @@
 #define         AT91_DDRSDRC_TRP        (0xf << 16)             /* Row precharge delay */
 #define         AT91_DDRSDRC_TRRD       (0xf << 20)             /* Active BankA to BankB */
 #define         AT91_DDRSDRC_TWTR       (0x7 << 24)             /* Internal Write to Read delay */
-#define         AT91CAP9_DDRSDRC_TWTR   (1   << 24)             /* Internal Write to Read delay */
 #define         AT91_DDRSDRC_RED_WRRD   (0x1 << 27)             /* Reduce Write to Read Delay [SAM9 Only] */
 #define         AT91_DDRSDRC_TMRD       (0xf << 28)             /* Load mode to active/refresh delay */
 
@@ -76,7 +75,6 @@
 #define         AT91_DDRSDRC_TRTP       (0x7  << 12)            /* Read to Precharge delay */
 
 #define AT91_DDRSDRC_LPR        0x1C    /* Low Power Register */
-#define AT91CAP9_DDRSDRC_LPR    0x18    /* Low Power Register */
 #define         AT91_DDRSDRC_LPCB       (3 << 0)                /* Low-power Configurations */
 #define                 AT91_DDRSDRC_LPCB_DISABLE               0
 #define                 AT91_DDRSDRC_LPCB_SELF_REFRESH          1
@@ -94,11 +92,9 @@
 #define         AT91_DDRSDRC_UPD_MR     (3 << 20)        /* Update load mode register and extended mode register */
 
 #define AT91_DDRSDRC_MDR        0x20    /* Memory Device Register */
-#define AT91CAP9_DDRSDRC_MDR    0x1C    /* Memory Device Register */
 #define         AT91_DDRSDRC_MD         (3 << 0)                /* Memory Device Type */
 #define                 AT91_DDRSDRC_MD_SDR             0
 #define                 AT91_DDRSDRC_MD_LOW_POWER_SDR   1
-#define                 AT91CAP9_DDRSDRC_MD_DDR         2
 #define                 AT91_DDRSDRC_MD_LOW_POWER_DDR   3
 #define                 AT91_DDRSDRC_MD_DDR2            6       /* [SAM9 Only] */
 #define         AT91_DDRSDRC_DBW        (1 << 4)                /* Data Bus Width */
@@ -106,16 +102,10 @@
 #define                 AT91_DDRSDRC_DBW_16BITS         (1 <<  4)
 
 #define AT91_DDRSDRC_DLL        0x24    /* DLL Information Register */
-#define AT91CAP9_DDRSDRC_DLL    0x20    /* DLL Information Register */
 #define         AT91_DDRSDRC_MDINC      (1 << 0)                /* Master Delay increment */
 #define         AT91_DDRSDRC_MDDEC      (1 << 1)                /* Master Delay decrement */
 #define         AT91_DDRSDRC_MDOVF      (1 << 2)                /* Master Delay Overflow */
-#define         AT91CAP9_DDRSDRC_SDCOVF (1 << 3)                /* Slave Delay Correction Overflow */
-#define         AT91CAP9_DDRSDRC_SDCUDF (1 << 4)                /* Slave Delay Correction Underflow */
-#define         AT91CAP9_DDRSDRC_SDERF  (1 << 5)                /* Slave Delay Correction error */
 #define         AT91_DDRSDRC_MDVAL      (0xff <<  8)            /* Master Delay value */
-#define         AT91CAP9_DDRSDRC_SDVAL  (0xff << 16)            /* Slave Delay value */
-#define         AT91CAP9_DDRSDRC_SDCVAL (0xff << 24)            /* Slave Delay Correction value */
 
 #define AT91_DDRSDRC_HS         0x2C    /* High Speed Register [SAM9 Only] */
 #define         AT91_DDRSDRC_DIS_ATCP_RD        (1 << 2)        /* Anticip read access is disabled */
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index f6ce936dba2b..0118c3338552 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -25,7 +25,6 @@
 #define ARCH_ID_AT91SAM9G45MRL  0x819b05a2      /* aka 9G45-ES2 & non ES lots */
 #define ARCH_ID_AT91SAM9G45ES   0x819b05a1      /* 9G45-ES (Engineering Sample) */
 #define ARCH_ID_AT91SAM9X5      0x819a05a0
-#define ARCH_ID_AT91CAP9        0x039A03A0
 
 #define ARCH_ID_AT91SAM9XE128   0x329973a0
 #define ARCH_ID_AT91SAM9XE256   0x329a93a0
@@ -51,10 +50,6 @@
 #define ARCH_FAMILY_AT91SAM9    0x01900000
 #define ARCH_FAMILY_AT91SAM9XE  0x02900000
 
-/* PMC revision */
-#define ARCH_REVISION_CAP9_B    0x399
-#define ARCH_REVISION_CAP9_C    0x601
-
 /* RM9200 type */
 #define ARCH_REVISON_9200_BGA   (0 << 0)
 #define ARCH_REVISON_9200_PQFP  (1 << 0)
@@ -63,9 +58,6 @@ enum at91_soc_type {
         /* 920T */
         AT91_SOC_RM9200,
 
-        /* CAP */
-        AT91_SOC_CAP9,
-
         /* SAM92xx */
         AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263,
 
@@ -86,9 +78,6 @@ enum at91_soc_subtype {
         /* RM9200 */
         AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP,
 
-        /* CAP9 */
-        AT91_SOC_CAP9_REV_B, AT91_SOC_CAP9_REV_C,
-
         /* SAM9260 */
         AT91_SOC_SAM9XE,
 
@@ -195,16 +184,6 @@ static inline int at91_soc_is_detected(void)
 #define cpu_is_at91sam9x25()    (0)
 #endif
 
-#ifdef CONFIG_ARCH_AT91CAP9
-#define cpu_is_at91cap9()       (at91_soc_initdata.type == AT91_SOC_CAP9)
-#define cpu_is_at91cap9_revB()  (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_B)
-#define cpu_is_at91cap9_revC()  (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_C)
-#else
-#define cpu_is_at91cap9()       (0)
-#define cpu_is_at91cap9_revB()  (0)
-#define cpu_is_at91cap9_revC()  (0)
-#endif
-
 /*
  * Since this is ARM, we will never run on any AVR32 CPU. But these
  * definitions may reduce clutter in common drivers.
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 2d0e4e998566..c213f28628c0 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -19,7 +19,7 @@
 /* DBGU base */
 /* rm9200, 9260/9g20, 9261/9g10, 9rl */
 #define AT91_BASE_DBGU0 0xfffff200
-/* 9263, 9g45, cap9 */
+/* 9263, 9g45 */
 #define AT91_BASE_DBGU1 0xffffee00
 
 #if defined(CONFIG_ARCH_AT91RM9200)
@@ -34,8 +34,6 @@
 #include <mach/at91sam9rl.h>
 #elif defined(CONFIG_ARCH_AT91SAM9G45)
 #include <mach/at91sam9g45.h>
-#elif defined(CONFIG_ARCH_AT91CAP9)
-#include <mach/at91cap9.h>
 #elif defined(CONFIG_ARCH_AT91X40)
 #include <mach/at91x40.h>
 #else
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
deleted file mode 100644
index cbd64f3bcecd..000000000000
--- a/arch/arm/mach-at91/include/mach/system.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/system.h
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <mach/hardware.h>
-#include <mach/at91_st.h>
-#include <mach/at91_dbgu.h>
-#include <mach/at91_pmc.h>
-
-static inline void arch_idle(void)
-{
-        /*
-         * Disable the processor clock.  The processor will be automatically
-         * re-enabled by an interrupt or by a reset.
-         */
-#ifdef AT91_PS
-        at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
-#else
-        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
-#endif
-#ifndef CONFIG_CPU_ARM920T
-        /*
-         * Set the processor (CP15) into 'Wait for Interrupt' mode.
-         * Post-RM9200 processors need this in conjunction with the above
-         * to save power when idle.
-         */
-        cpu_do_idle();
-#endif
-}
-
-#endif
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 1606379ac284..d554e6771b4e 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -150,11 +150,6 @@ static int at91_pm_verify_clocks(void)
                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
                         return 0;
                 }
-        } else if (cpu_is_at91cap9()) {
-                if ((scsr & AT91CAP9_PMC_UHP) != 0) {
-                        pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
-                        return 0;
-                }
         }
 
 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
@@ -203,7 +198,6 @@ extern u32 at91_slow_clock_sz;
 
 static int at91_pm_enter(suspend_state_t state)
 {
-        u32 saved_lpr;
         at91_gpio_suspend();
         at91_irq_suspend();
 
@@ -259,16 +253,7 @@ static int at91_pm_enter(suspend_state_t state)
                          * For ARM 926 based chips, this requirement is weaker
                          * as at91sam9 can access a RAM in self-refresh mode.
                          */
-                        asm volatile (  "mov r0, #0\n\t"
-                                        "b 1f\n\t"
-                                        ".align 5\n\t"
-                                        "1: mcr p15, 0, r0, c7, c10, 4\n\t"
-                                        : /* no output */
-                                        : /* no input */
-                                        : "r0");
-                        saved_lpr = sdram_selfrefresh_enable();
-                        wait_for_interrupt_enable();
-                        sdram_selfrefresh_disable(saved_lpr);
+                        at91_standby();
                         break;
 
                 case PM_SUSPEND_ON:
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 7eb40d24242f..bba9ce1aaaec 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -1,3 +1,16 @@
+/*
+ * AT91 Power Management
+ *
+ * Copyright (C) 2005 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __ARCH_ARM_MACH_AT91_PM
+#define __ARCH_ARM_MACH_AT91_PM
+
 #ifdef CONFIG_ARCH_AT91RM9200
 #include <mach/at91rm9200_mc.h>
 
@@ -11,36 +24,25 @@
  * still in self-refresh is "not recommended", but seems to work.
  */
 
-static inline u32 sdram_selfrefresh_enable(void)
-{
-        u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
-
-        at91_sys_write(AT91_SDRAMC_LPR, 0);
-        at91_sys_write(AT91_SDRAMC_SRR, 1);
-        return saved_lpr;
-}
-
-#define sdram_selfrefresh_disable(saved_lpr)    at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
-#define wait_for_interrupt_enable()             asm volatile ("mcr p15, 0, %0, c7, c0, 4" \
-                                                                : : "r" (0))
-
-#elif defined(CONFIG_ARCH_AT91CAP9)
-#include <mach/at91sam9_ddrsdr.h>
-
-
-static inline u32 sdram_selfrefresh_enable(void)
+static inline void at91rm9200_standby(void)
 {
-        u32 saved_lpr, lpr;
-
-        saved_lpr = at91_ramc_read(0, AT91CAP9_DDRSDRC_LPR);
-
-        lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
-        at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
-        return saved_lpr;
+        u32 lpr = at91_sys_read(AT91_SDRAMC_LPR);
+
+        asm volatile(
+                "b    1f\n\t"
+                ".align    5\n\t"
+                "1:  mcr    p15, 0, %0, c7, c10, 4\n\t"
+                "    str    %0, [%1, %2]\n\t"
+                "    str    %3, [%1, %4]\n\t"
+                "    mcr    p15, 0, %0, c7, c0, 4\n\t"
+                "    str    %5, [%1, %2]"
+                :
+                : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91_SDRAMC_LPR),
+                  "r" (1), "r" (AT91_SDRAMC_SRR),
+                  "r" (lpr));
 }
 
-#define sdram_selfrefresh_disable(saved_lpr)    at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, saved_lpr)
-#define wait_for_interrupt_enable()             cpu_do_idle()
+#define at91_standby at91rm9200_standby
 
 #elif defined(CONFIG_ARCH_AT91SAM9G45)
 #include <mach/at91sam9_ddrsdr.h>
@@ -48,14 +50,12 @@ static inline u32 sdram_selfrefresh_enable(void)
 /* We manage both DDRAM/SDRAM controllers, we need more than one value to
  * remember.
  */
-static u32 saved_lpr1;
-
-static inline u32 sdram_selfrefresh_enable(void)
+static inline void at91sam9g45_standby(void)
 {
-        /* Those tow values allow us to delay self-refresh activation
+        /* Those two values allow us to delay self-refresh activation
          * to the maximum. */
         u32 lpr0, lpr1;
-        u32 saved_lpr0;
+        u32 saved_lpr0, saved_lpr1;
 
         saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
         lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
@@ -69,15 +69,13 @@ static inline u32 sdram_selfrefresh_enable(void)
         at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
         at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
 
-        return saved_lpr0;
+        cpu_do_idle();
+
+        at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
+        at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
 }
 
-#define sdram_selfrefresh_disable(saved_lpr0)   \
-        do { \
-                at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \
-                at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \
-        } while (0)
-#define wait_for_interrupt_enable()             cpu_do_idle()
+#define at91_standby at91sam9g45_standby
 
 #else
 #include <mach/at91sam9_sdramc.h>
@@ -90,18 +88,23 @@ static inline u32 sdram_selfrefresh_enable(void)
 #warning Assuming EB1 SDRAM controller is *NOT* used
 #endif
 
-static inline u32 sdram_selfrefresh_enable(void)
+static inline void at91sam9_standby(void)
 {
         u32 saved_lpr, lpr;
 
         saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR);
 
         lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
-        at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
-        return saved_lpr;
+        at91_ramc_write(0, AT91_SDRAMC_LPR, lpr |
+                        AT91_SDRAMC_LPCB_SELF_REFRESH);
+
+        cpu_do_idle();
+
+        at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr);
 }
 
-#define sdram_selfrefresh_disable(saved_lpr)    at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr)
-#define wait_for_interrupt_enable()             cpu_do_idle()
+#define at91_standby at91sam9_standby
+
+#endif
 
 #endif
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 92dfb8461392..f8539a8bcd6c 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -18,8 +18,7 @@
 
 #if defined(CONFIG_ARCH_AT91RM9200)
 #include <mach/at91rm9200_mc.h>
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
 #include <mach/at91sam9_ddrsdr.h>
 #else
 #include <mach/at91sam9_sdramc.h>
@@ -130,8 +129,7 @@ ENTRY(at91_slow_clock)
         /* Put SDRAM in self-refresh mode */
         mov     r3, #1
         str     r3, [r2, #AT91_SDRAMC_SRR]
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
 
         /* prepare for DDRAM self-refresh mode */
         ldr     r3, [r2, #AT91_DDRSDRC_LPR]
@@ -263,8 +261,7 @@ ENTRY(at91_slow_clock)
 
 #ifdef CONFIG_ARCH_AT91RM9200
         /* Do nothing - self-refresh is automatically disabled. */
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
         /* Restore LPR on AT91 with DDRAM */
         ldr     r3, .saved_sam9_lpr
         str     r3, [r2, #AT91_DDRSDRC_LPR]
@@ -305,8 +302,7 @@ ENTRY(at91_slow_clock)
 #ifdef CONFIG_ARCH_AT91RM9200
 .at91_va_base_sdramc:
         .word AT91_VA_BASE_SYS
-#elif defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
 .at91_va_base_sdramc:
         .word AT91_VA_BASE_SYS + AT91_DDRSDRC0
 #else
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 69d3fc4c46f3..620c67e8f814 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -86,20 +86,6 @@ static void __init soc_detect(u32 dbgu_base)
         socid = cidr & ~AT91_CIDR_VERSION;
 
         switch (socid) {
-        case ARCH_ID_AT91CAP9: {
-#ifdef CONFIG_AT91_PMC_UNIT
-                u32 pmc_ver = at91_sys_read(AT91_PMC_VER);
-
-                if (pmc_ver == ARCH_REVISION_CAP9_B)
-                        at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_B;
-                else if (pmc_ver == ARCH_REVISION_CAP9_C)
-                        at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_C;
-#endif
-                at91_soc_initdata.type = AT91_SOC_CAP9;
-                at91_boot_soc = at91cap9_soc;
-                break;
-        }
-
         case ARCH_ID_AT91RM9200:
                 at91_soc_initdata.type = AT91_SOC_RM9200;
                 at91_boot_soc = at91rm9200_soc;
@@ -200,7 +186,6 @@ static void __init soc_detect(u32 dbgu_base)
 
 static const char *soc_name[] = {
         [AT91_SOC_RM9200]       = "at91rm9200",
-        [AT91_SOC_CAP9]         = "at91cap9",
         [AT91_SOC_SAM9260]      = "at91sam9260",
         [AT91_SOC_SAM9261]      = "at91sam9261",
         [AT91_SOC_SAM9263]      = "at91sam9263",
@@ -221,8 +206,6 @@ EXPORT_SYMBOL(at91_get_soc_type);
 static const char *soc_subtype_name[] = {
         [AT91_SOC_RM9200_BGA]   = "at91rm9200 BGA",
         [AT91_SOC_RM9200_PQFP]  = "at91rm9200 PQFP",
-        [AT91_SOC_CAP9_REV_B]   = "at91cap9 revB",
-        [AT91_SOC_CAP9_REV_C]   = "at91cap9 revC",
         [AT91_SOC_SAM9XE]       = "at91sam9xe",
         [AT91_SOC_SAM9G45ES]    = "at91sam9g45es",
         [AT91_SOC_SAM9M10]      = "at91sam9m10",
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 4588ae6f7acd..5db4aa45404a 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -13,7 +13,6 @@ struct at91_init_soc {
 };
 
 extern struct at91_init_soc at91_boot_soc;
-extern struct at91_init_soc at91cap9_soc;
 extern struct at91_init_soc at91rm9200_soc;
 extern struct at91_init_soc at91sam9260_soc;
 extern struct at91_init_soc at91sam9261_soc;
@@ -27,10 +26,6 @@ static inline int at91_soc_is_enabled(void)
         return at91_boot_soc.init != NULL;
 }
 
-#if !defined(CONFIG_ARCH_AT91CAP9)
-#define at91cap9_soc    at91_boot_soc
-#endif
-
 #if !defined(CONFIG_ARCH_AT91RM9200)
 #define at91rm9200_soc  at91_boot_soc
 #endif
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 6b67b7e8426c..22e4e0a28ad1 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -52,27 +52,8 @@
 #include <mach/csp/chipcHw_inline.h>
 #include <mach/csp/tmrHw_reg.h>
 
-#define AMBA_DEVICE(name, initname, base, plat, size)       \
-static struct amba_device name##_device = {     \
-   .dev = {                                     \
-      .coherent_dma_mask = ~0,                  \
-      .init_name = initname,                    \
-      .platform_data = plat                     \
-   },                                           \
-   .res = {                                     \
-      .start = MM_ADDR_IO_##base,               \
-                .end = MM_ADDR_IO_##base + (size) - 1,    \
-      .flags = IORESOURCE_MEM                   \
-   },                                           \
-   .dma_mask = ~0,                              \
-   .irq = {                                     \
-      IRQ_##base                                \
-   }                                            \
-}
-
-
-AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K);
-AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K);
+static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL);
+static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL);
 
 static struct clk pll1_clk = {
         .name = "PLL1",
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h
deleted file mode 100644
index cb78250db649..000000000000
--- a/arch/arm/mach-bcmring/include/mach/system.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index ab1711b9b4d6..8736c1acc166 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -225,3 +225,19 @@ void clps711x_restart(char mode, const char *cmd)
 {
         soft_restart(0);
 }
+
+static void clps711x_idle(void)
+{
+        clps_writel(1, HALT);
+        __asm__ __volatile__(
+        "mov    r0, r0\n\
+        mov     r0, r0");
+}
+
+static int __init clps711x_idle_init(void)
+{
+        arm_pm_idle = clps711x_idle;
+        return 0;
+}
+
+arch_initcall(clps711x_idle_init);
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h
deleted file mode 100644
index 23d6ef8c84da..000000000000
--- a/arch/arm/mach-clps711x/include/mach/system.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- *  arch/arm/mach-clps711x/include/mach/system.h
- *
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <asm/hardware/clps7111.h>
-
-static inline void arch_idle(void)
-{
-        clps_writel(1, HALT);
-        __asm__ __volatile__(
-        "mov    r0, r0\n\
-        mov     r0, r0");
-}
-
-#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
deleted file mode 100644
index 9e56b7dc133a..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * Copyright 2000 Deep Blue Solutions Ltd
- * Copyright 2003 ARM Limited
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-#include <asm/proc-fns.h>
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 275341f159fb..82ed753fb360 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -26,13 +26,14 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-#include <mach/dm355.h>
 #include <mach/i2c.h>
 #include <mach/serial.h>
 #include <mach/nand.h>
 #include <mach/mmc.h>
 #include <mach/usb.h>
 
+#include "davinci.h"
+
 /* NOTE:  this is geared for the standard config, with a socketed
  * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
  * swap chips, maybe with a different block size, partitioning may
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index e99db28181ae..d74a8b3445fb 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -23,13 +23,14 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-#include <mach/dm355.h>
 #include <mach/i2c.h>
 #include <mach/serial.h>
 #include <mach/nand.h>
 #include <mach/mmc.h>
 #include <mach/usb.h>
 
+#include "davinci.h"
+
 /* NOTE:  this is geared for the standard config, with a socketed
  * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
  * swap chips, maybe with a different block size, partitioning may
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 849311d3cb7c..5bce2b83bb4f 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -32,7 +32,6 @@
 #include <asm/mach/arch.h>
 
 #include <mach/mux.h>
-#include <mach/dm365.h>
 #include <mach/common.h>
 #include <mach/i2c.h>
 #include <mach/serial.h>
@@ -42,6 +41,8 @@
 
 #include <media/tvp514x.h>
 
+#include "davinci.h"
+
 static inline int have_imager(void)
 {
         /* REVISIT when it's supported, trigger via Kconfig */
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 1247ecdcf752..864f676eccac 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -30,7 +30,6 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-#include <mach/dm644x.h>
 #include <mach/common.h>
 #include <mach/i2c.h>
 #include <mach/serial.h>
@@ -40,6 +39,8 @@
 #include <mach/usb.h>
 #include <mach/aemif.h>
 
+#include "davinci.h"
+
 #define DM644X_EVM_PHY_ID               "davinci_mdio-0:01"
 #define LXT971_PHY_ID   (0x001378e2)
 #define LXT971_PHY_MASK (0xfffffff0)
@@ -189,7 +190,7 @@ static struct platform_device davinci_fb_device = {
         .num_resources = 0,
 };
 
-static struct tvp514x_platform_data tvp5146_pdata = {
+static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
         .clk_polarity = 0,
         .hs_polarity = 1,
         .vs_polarity = 1
@@ -197,7 +198,7 @@ static struct tvp514x_platform_data tvp5146_pdata = {
 
 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
 /* Inputs available at the TVP5146 */
-static struct v4l2_input tvp5146_inputs[] = {
+static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
         {
                 .index = 0,
                 .name = "Composite",
@@ -217,7 +218,7 @@ static struct v4l2_input tvp5146_inputs[] = {
  * ouput that goes to vpfe. There is a one to one correspondence
  * with tvp5146_inputs
  */
-static struct vpfe_route tvp5146_routes[] = {
+static struct vpfe_route dm644xevm_tvp5146_routes[] = {
         {
                 .input = INPUT_CVBS_VI2B,
                 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
@@ -228,13 +229,13 @@ static struct vpfe_route tvp5146_routes[] = {
         },
 };
 
-static struct vpfe_subdev_info vpfe_sub_devs[] = {
+static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
         {
                 .name = "tvp5146",
                 .grp_id = 0,
-                .num_inputs = ARRAY_SIZE(tvp5146_inputs),
-                .inputs = tvp5146_inputs,
-                .routes = tvp5146_routes,
+                .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
+                .inputs = dm644xevm_tvp5146_inputs,
+                .routes = dm644xevm_tvp5146_routes,
                 .can_route = 1,
                 .ccdc_if_params = {
                         .if_type = VPFE_BT656,
@@ -243,15 +244,15 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = {
                 },
                 .board_info = {
                         I2C_BOARD_INFO("tvp5146", 0x5d),
-                        .platform_data = &tvp5146_pdata,
+                        .platform_data = &dm644xevm_tvp5146_pdata,
                 },
         },
 };
 
-static struct vpfe_config vpfe_cfg = {
-        .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
+static struct vpfe_config dm644xevm_capture_cfg = {
+        .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
         .i2c_adapter_id = 1,
-        .sub_devs = vpfe_sub_devs,
+        .sub_devs = dm644xevm_vpfe_sub_devs,
         .card_name = "DM6446 EVM",
         .ccdc = "DM6446 CCDC",
 };
@@ -624,8 +625,6 @@ static struct davinci_uart_config uart_config __initdata = {
 static void __init
 davinci_evm_map_io(void)
 {
-        /* setup input configuration for VPFE input devices */
-        dm644x_set_vpfe_config(&vpfe_cfg);
         dm644x_init();
 }
 
@@ -697,6 +696,7 @@ static __init void davinci_evm_init(void)
         evm_init_i2c();
 
         davinci_setup_mmc(0, &dm6446evm_mmc_config);
+        dm644x_init_video(&dm644xevm_capture_cfg);
 
         davinci_serial_init(&uart_config);
         dm644x_init_asp(&dm644x_evm_snd_data);
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 872ac69fa049..d72ab948d630 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -36,7 +36,6 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-#include <mach/dm646x.h>
 #include <mach/common.h>
 #include <mach/serial.h>
 #include <mach/i2c.h>
@@ -45,6 +44,7 @@
 #include <mach/cdce949.h>
 #include <mach/aemif.h>
 
+#include "davinci.h"
 #include "clock.h"
 
 #define NAND_BLOCK_SIZE         SZ_128K
@@ -410,8 +410,6 @@ static struct davinci_i2c_platform_data i2c_pdata = {
         .bus_delay      = 0 /* usec */,
 };
 
-#define VIDCLKCTL_OFFSET        (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
-#define VSCLKDIS_OFFSET         (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
 #define VCH2CLK_MASK            (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
 #define VCH2CLK_SYSCLK8         (BIT(9))
 #define VCH2CLK_AUXCLK          (BIT(9) | BIT(8))
@@ -429,8 +427,6 @@ static struct davinci_i2c_platform_data i2c_pdata = {
 #define TVP5147_CH0             "tvp514x-0"
 #define TVP5147_CH1             "tvp514x-1"
 
-static void __iomem *vpif_vidclkctl_reg;
-static void __iomem *vpif_vsclkdis_reg;
 /* spin lock for updating above registers */
 static spinlock_t vpif_reg_lock;
 
@@ -441,14 +437,14 @@ static int set_vpif_clock(int mux_mode, int hd)
         int val = 0;
         int err = 0;
 
-        if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)
+        if (!cpld_client)
                 return -ENXIO;
 
         /* disable the clock */
         spin_lock_irqsave(&vpif_reg_lock, flags);
-        value = __raw_readl(vpif_vsclkdis_reg);
+        value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
         value |= (VIDCH3CLK | VIDCH2CLK);
-        __raw_writel(value, vpif_vsclkdis_reg);
+        __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 
         val = i2c_smbus_read_byte(cpld_client);
@@ -464,7 +460,7 @@ static int set_vpif_clock(int mux_mode, int hd)
         if (err)
                 return err;
 
-        value = __raw_readl(vpif_vidclkctl_reg);
+        value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
         value &= ~(VCH2CLK_MASK);
         value &= ~(VCH3CLK_MASK);
 
@@ -473,13 +469,13 @@ static int set_vpif_clock(int mux_mode, int hd)
         else
                 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
 
-        __raw_writel(value, vpif_vidclkctl_reg);
+        __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 
         spin_lock_irqsave(&vpif_reg_lock, flags);
-        value = __raw_readl(vpif_vsclkdis_reg);
+        value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
         /* enable the clock */
         value &= ~(VIDCH3CLK | VIDCH2CLK);
-        __raw_writel(value, vpif_vsclkdis_reg);
+        __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 
         return 0;
@@ -564,7 +560,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
         int val;
         u32 value;
 
-        if (!vpif_vidclkctl_reg || !cpld_client)
+        if (!cpld_client)
                 return -ENXIO;
 
         val = i2c_smbus_read_byte(cpld_client);
@@ -572,7 +568,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
                 return val;
 
         spin_lock_irqsave(&vpif_reg_lock, flags);
-        value = __raw_readl(vpif_vidclkctl_reg);
+        value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
         if (mux_mode) {
                 val &= VPIF_INPUT_TWO_CHANNEL;
                 value |= VIDCH1CLK;
@@ -580,7 +576,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
                 val |= VPIF_INPUT_ONE_CHANNEL;
                 value &= ~VIDCH1CLK;
         }
-        __raw_writel(value, vpif_vidclkctl_reg);
+        __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 
         err = i2c_smbus_write_byte(cpld_client, val);
@@ -674,12 +670,6 @@ static struct vpif_capture_config dm646x_vpif_capture_cfg = {
 
 static void __init evm_init_video(void)
 {
-        vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);
-        vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);
-        if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {
-                pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
-                return;
-        }
         spin_lock_init(&vpif_reg_lock);
 
         dm646x_setup_vpif(&dm646x_vpif_display_config,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 8d34f513d415..a772bb45570a 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -30,7 +30,6 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-#include <mach/dm644x.h>
 #include <mach/common.h>
 #include <mach/i2c.h>
 #include <mach/serial.h>
@@ -39,6 +38,8 @@
 #include <mach/mmc.h>
 #include <mach/usb.h>
 
+#include "davinci.h"
+
 #define NEUROS_OSD2_PHY_ID              "davinci_mdio-0:01"
 #define LXT971_PHY_ID                   0x001378e2
 #define LXT971_PHY_MASK                 0xfffffff0
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 31da3c5b2ba3..76e675096104 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -35,13 +35,14 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 
-#include <mach/dm644x.h>
 #include <mach/common.h>
 #include <mach/i2c.h>
 #include <mach/serial.h>
 #include <mach/mux.h>
 #include <mach/usb.h>
 
+#include "davinci.h"
+
 #define SFFSDR_PHY_ID           "davinci_mdio-0:01"
 static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
         /* U-Boot Environment: Block 0
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
new file mode 100644
index 000000000000..9d708034b57f
--- /dev/null
+++ b/arch/arm/mach-davinci/davinci.h
@@ -0,0 +1,96 @@
+/*
+ * This file contains the processor specific definitions
+ * of the TI DM644x, DM355, DM365, and DM646x.
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated
+ * Copyright (c) 2007 Deep Root Systems, LLC
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __DAVINCI_H
+#define __DAVINCI_H
+
+#include <linux/clk.h>
+#include <linux/videodev2.h>
+#include <linux/davinci_emac.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+
+#include <mach/asp.h>
+#include <mach/keyscan.h>
+#include <mach/hardware.h>
+
+#include <media/davinci/vpfe_capture.h>
+#include <media/davinci/vpif_types.h>
+
+#define DAVINCI_SYSTEM_MODULE_BASE      0x01c40000
+#define SYSMOD_VIDCLKCTL                0x38
+#define SYSMOD_VDD3P3VPWDN              0x48
+#define SYSMOD_VSCLKDIS                 0x6c
+#define SYSMOD_PUPDCTL1                 0x7c
+
+extern void __iomem *davinci_sysmod_base;
+#define DAVINCI_SYSMOD_VIRT(x)  (davinci_sysmod_base + (x))
+void davinci_map_sysmod(void);
+
+/* DM355 base addresses */
+#define DM355_ASYNC_EMIF_CONTROL_BASE   0x01e10000
+#define DM355_ASYNC_EMIF_DATA_CE0_BASE  0x02000000
+
+#define ASP1_TX_EVT_EN  1
+#define ASP1_RX_EVT_EN  2
+
+/* DM365 base addresses */
+#define DM365_ASYNC_EMIF_CONTROL_BASE   0x01d10000
+#define DM365_ASYNC_EMIF_DATA_CE0_BASE  0x02000000
+#define DM365_ASYNC_EMIF_DATA_CE1_BASE  0x04000000
+
+/* DM644x base addresses */
+#define DM644X_ASYNC_EMIF_CONTROL_BASE  0x01e00000
+#define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
+#define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
+#define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
+#define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
+
+/* DM646x base addresses */
+#define DM646X_ASYNC_EMIF_CONTROL_BASE  0x20008000
+#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
+
+/* DM355 function declarations */
+void __init dm355_init(void);
+void dm355_init_spi0(unsigned chipselect_mask,
+                struct spi_board_info *info, unsigned len);
+void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata);
+void dm355_set_vpfe_config(struct vpfe_config *cfg);
+
+/* DM365 function declarations */
+void __init dm365_init(void);
+void __init dm365_init_asp(struct snd_platform_data *pdata);
+void __init dm365_init_vc(struct snd_platform_data *pdata);
+void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
+void __init dm365_init_rtc(void);
+void dm365_init_spi0(unsigned chipselect_mask,
+                        struct spi_board_info *info, unsigned len);
+void dm365_set_vpfe_config(struct vpfe_config *cfg);
+
+/* DM644x function declarations */
+void __init dm644x_init(void);
+void __init dm644x_init_asp(struct snd_platform_data *pdata);
+int __init dm644x_init_video(struct vpfe_config *);
+
+/* DM646x function declarations */
+void __init dm646x_init(void);
+void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
+void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
+int __init dm646x_init_edma(struct edma_rsv_info *rsv);
+void dm646x_video_init(void);
+void dm646x_setup_vpif(struct vpif_display_config *,
+                       struct vpif_capture_config *);
+#endif /*__DAVINCI_H */
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 50c0156b4262..d2f9666284a7 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -23,6 +23,7 @@
 #include <mach/mmc.h>
 #include <mach/time.h>
 
+#include "davinci.h"
 #include "clock.h"
 
 #define DAVINCI_I2C_BASE             0x01C21000
@@ -33,8 +34,19 @@
 #define DM365_MMCSD0_BASE            0x01D11000
 #define DM365_MMCSD1_BASE            0x01D00000
 
-/* System control register offsets */
-#define DM64XX_VDD3P3V_PWDN     0x48
+void __iomem  *davinci_sysmod_base;
+
+void davinci_map_sysmod(void)
+{
+        davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
+                                              0x800);
+        /*
+         * Throw a bug since a lot of board initialization code depends
+         * on system module availability. ioremap() failing this early
+         * need careful looking into anyway.
+         */
+        BUG_ON(!davinci_sysmod_base);
+}
 
 static struct resource i2c_resources[] = {
         {
@@ -212,12 +224,12 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
                         davinci_cfg_reg(DM355_SD1_DATA2);
                         davinci_cfg_reg(DM355_SD1_DATA3);
                 } else if (cpu_is_davinci_dm365()) {
-                        void __iomem *pupdctl1 =
-                                IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
-
                         /* Configure pull down control */
-                        __raw_writel((__raw_readl(pupdctl1) & ~0xfc0),
-                                        pupdctl1);
+                        unsigned v;
+
+                        v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
+                        __raw_writel(v & ~0xfc0,
+                                        DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
 
                         mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
                         mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
@@ -246,11 +258,9 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
                         mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
                 } else if (cpu_is_davinci_dm644x()) {
                         /* REVISIT: should this be in board-init code? */
-                        void __iomem *base =
-                                IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
-
                         /* Power-on 3.3V IO cells */
-                        __raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
+                        __raw_writel(0,
+                                DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
                         /*Set up the pull regiter for MMC */
                         davinci_cfg_reg(DM644X_MSTK);
                 }
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 19667cfc5de0..fd3d09aa6cde 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -18,7 +18,6 @@
 
 #include <asm/mach/map.h>
 
-#include <mach/dm355.h>
 #include <mach/cputype.h>
 #include <mach/edma.h>
 #include <mach/psc.h>
@@ -31,6 +30,7 @@
 #include <mach/spi.h>
 #include <mach/gpio-davinci.h>
 
+#include "davinci.h"
 #include "clock.h"
 #include "mux.h"
 
@@ -871,6 +871,7 @@ void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata)
 void __init dm355_init(void)
 {
         davinci_common_init(&davinci_soc_info_dm355);
+        davinci_map_sysmod();
 }
 
 static int __init dm355_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index f15b435cc655..1a2e953082b3 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -21,7 +21,6 @@
 
 #include <asm/mach/map.h>
 
-#include <mach/dm365.h>
 #include <mach/cputype.h>
 #include <mach/edma.h>
 #include <mach/psc.h>
@@ -35,11 +34,28 @@
 #include <mach/spi.h>
 #include <mach/gpio-davinci.h>
 
+#include "davinci.h"
 #include "clock.h"
 #include "mux.h"
 
 #define DM365_REF_FREQ          24000000        /* 24 MHz on the DM365 EVM */
 
+/* Base of key scan register bank */
+#define DM365_KEYSCAN_BASE              0x01c69400
+
+#define DM365_RTC_BASE                  0x01c69000
+
+#define DAVINCI_DM365_VC_BASE           0x01d0c000
+#define DAVINCI_DMA_VC_TX               2
+#define DAVINCI_DMA_VC_RX               3
+
+#define DM365_EMAC_BASE                 0x01d07000
+#define DM365_EMAC_MDIO_BASE            (DM365_EMAC_BASE + 0x4000)
+#define DM365_EMAC_CNTRL_OFFSET         0x0000
+#define DM365_EMAC_CNTRL_MOD_OFFSET     0x3000
+#define DM365_EMAC_CNTRL_RAM_OFFSET     0x1000
+#define DM365_EMAC_CNTRL_RAM_SIZE       0x2000
+
 static struct pll_data pll1_data = {
         .num            = 1,
         .phys_base      = DAVINCI_PLL1_BASE,
@@ -1122,6 +1138,7 @@ void __init dm365_init_rtc(void)
 void __init dm365_init(void)
 {
         davinci_common_init(&davinci_soc_info_dm365);
+        davinci_map_sysmod();
 }
 
 static struct resource dm365_vpss_resources[] = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 43a48ee1917b..23e81cafba8d 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -15,7 +15,6 @@
 
 #include <asm/mach/map.h>
 
-#include <mach/dm644x.h>
 #include <mach/cputype.h>
 #include <mach/edma.h>
 #include <mach/irqs.h>
@@ -27,6 +26,7 @@
 #include <mach/asp.h>
 #include <mach/gpio-davinci.h>
 
+#include "davinci.h"
 #include "clock.h"
 #include "mux.h"
 
@@ -35,6 +35,13 @@
  */
 #define DM644X_REF_FREQ         27000000
 
+#define DM644X_EMAC_BASE                0x01c80000
+#define DM644X_EMAC_MDIO_BASE           (DM644X_EMAC_BASE + 0x4000)
+#define DM644X_EMAC_CNTRL_OFFSET        0x0000
+#define DM644X_EMAC_CNTRL_MOD_OFFSET    0x1000
+#define DM644X_EMAC_CNTRL_RAM_OFFSET    0x2000
+#define DM644X_EMAC_CNTRL_RAM_SIZE      0x2000
+
 static struct pll_data pll1_data = {
         .num       = 1,
         .phys_base = DAVINCI_PLL1_BASE,
@@ -587,13 +594,15 @@ static struct platform_device dm644x_asp_device = {
         .resource       = dm644x_asp_resources,
 };
 
+#define DM644X_VPSS_BASE        0x01c73400
+
 static struct resource dm644x_vpss_resources[] = {
         {
                 /* VPSS Base address */
                 .name           = "vpss",
-                .start          = 0x01c73400,
-                .end            = 0x01c73400 + 0xff,
-                .flags          = IORESOURCE_MEM,
+                .start          = DM644X_VPSS_BASE,
+                .end            = DM644X_VPSS_BASE + 0xff,
+                .flags          = IORESOURCE_MEM,
         },
 };
 
@@ -605,7 +614,7 @@ static struct platform_device dm644x_vpss_device = {
         .resource               = dm644x_vpss_resources,
 };
 
-static struct resource vpfe_resources[] = {
+static struct resource dm644x_vpfe_resources[] = {
         {
                 .start          = IRQ_VDINT0,
                 .end            = IRQ_VDINT0,
@@ -639,22 +648,17 @@ static struct platform_device dm644x_ccdc_dev = {
         },
 };
 
-static struct platform_device vpfe_capture_dev = {
+static struct platform_device dm644x_vpfe_dev = {
         .name           = CAPTURE_DRV_NAME,
         .id             = -1,
-        .num_resources  = ARRAY_SIZE(vpfe_resources),
-        .resource       = vpfe_resources,
+        .num_resources  = ARRAY_SIZE(dm644x_vpfe_resources),
+        .resource       = dm644x_vpfe_resources,
         .dev = {
                 .dma_mask               = &vpfe_capture_dma_mask,
                 .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
 };
 
-void dm644x_set_vpfe_config(struct vpfe_config *cfg)
-{
-        vpfe_capture_dev.dev.platform_data = cfg;
-}
-
 /*----------------------------------------------------------------------*/
 
 static struct map_desc dm644x_io_desc[] = {
@@ -779,16 +783,29 @@ void __init dm644x_init_asp(struct snd_platform_data *pdata)
 void __init dm644x_init(void)
 {
         davinci_common_init(&davinci_soc_info_dm644x);
+        davinci_map_sysmod();
 }
 
-static int __init dm644x_init_devices(void)
+int __init dm644x_init_video(struct vpfe_config *vpfe_cfg)
 {
-        if (!cpu_is_davinci_dm644x())
-                return 0;
+        dm644x_vpfe_dev.dev.platform_data = vpfe_cfg;
 
         /* Add ccdc clock aliases */
         clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL);
         clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL);
+
+        platform_device_register(&dm644x_vpss_device);
+        platform_device_register(&dm644x_ccdc_dev);
+        platform_device_register(&dm644x_vpfe_dev);
+
+        return 0;
+}
+
+static int __init dm644x_init_devices(void)
+{
+        if (!cpu_is_davinci_dm644x())
+                return 0;
+
         platform_device_register(&dm644x_edma_device);
 
         platform_device_register(&dm644x_mdio_device);
@@ -796,10 +813,6 @@ static int __init dm644x_init_devices(void)
         clk_add_alias(NULL, dev_name(&dm644x_mdio_device.dev),
                       NULL, &dm644x_emac_device.dev);
 
-        platform_device_register(&dm644x_vpss_device);
-        platform_device_register(&dm644x_ccdc_dev);
-        platform_device_register(&vpfe_capture_dev);
-
         return 0;
 }
 postcore_initcall(dm644x_init_devices);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 00f774394b16..9eb87c1d1edd 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -16,7 +16,6 @@
 
 #include <asm/mach/map.h>
 
-#include <mach/dm646x.h>
 #include <mach/cputype.h>
 #include <mach/edma.h>
 #include <mach/irqs.h>
@@ -28,12 +27,11 @@
 #include <mach/asp.h>
 #include <mach/gpio-davinci.h>
 
+#include "davinci.h"
 #include "clock.h"
 #include "mux.h"
 
 #define DAVINCI_VPIF_BASE       (0x01C12000)
-#define VDD3P3V_PWDN_OFFSET     (0x48)
-#define VSCLKDIS_OFFSET         (0x6C)
 
 #define VDD3P3V_VID_MASK        (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\
                                         BIT_MASK(0))
@@ -46,6 +44,13 @@
 #define DM646X_REF_FREQ         27000000
 #define DM646X_AUX_FREQ         24000000
 
+#define DM646X_EMAC_BASE                0x01c80000
+#define DM646X_EMAC_MDIO_BASE           (DM646X_EMAC_BASE + 0x4000)
+#define DM646X_EMAC_CNTRL_OFFSET        0x0000
+#define DM646X_EMAC_CNTRL_MOD_OFFSET    0x1000
+#define DM646X_EMAC_CNTRL_RAM_OFFSET    0x2000
+#define DM646X_EMAC_CNTRL_RAM_SIZE      0x2000
+
 static struct pll_data pll1_data = {
         .num       = 1,
         .phys_base = DAVINCI_PLL1_BASE,
@@ -873,15 +878,14 @@ void dm646x_setup_vpif(struct vpif_display_config *display_config,
                        struct vpif_capture_config *capture_config)
 {
         unsigned int value;
-        void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
 
-        value = __raw_readl(base + VSCLKDIS_OFFSET);
+        value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
         value &= ~VSCLKDIS_MASK;
-        __raw_writel(value, base + VSCLKDIS_OFFSET);
+        __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 
-        value = __raw_readl(base + VDD3P3V_PWDN_OFFSET);
+        value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
         value &= ~VDD3P3V_VID_MASK;
-        __raw_writel(value, base + VDD3P3V_PWDN_OFFSET);
+        __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
 
         davinci_cfg_reg(DM646X_STSOMUX_DISABLE);
         davinci_cfg_reg(DM646X_STSIMUX_DISABLE);
@@ -905,6 +909,7 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv)
 void __init dm646x_init(void)
 {
         davinci_common_init(&davinci_soc_info_dm646x);
+        davinci_map_sysmod();
 }
 
 static int __init dm646x_init_devices(void)
diff --git a/arch/arm/mach-davinci/include/mach/dm355.h b/arch/arm/mach-davinci/include/mach/dm355.h
deleted file mode 100644
index 36dff4a0ce3f..000000000000
--- a/arch/arm/mach-davinci/include/mach/dm355.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Chip specific defines for DM355 SoC
- *
- * Author: Kevin Hilman, Deep Root Systems, LLC
- *
- * 2007 (c) Deep Root Systems, LLC. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_DM355_H
-#define __ASM_ARCH_DM355_H
-
-#include <mach/hardware.h>
-#include <mach/asp.h>
-#include <media/davinci/vpfe_capture.h>
-
-#define DM355_ASYNC_EMIF_CONTROL_BASE   0x01E10000
-#define DM355_ASYNC_EMIF_DATA_CE0_BASE  0x02000000
-
-#define ASP1_TX_EVT_EN  1
-#define ASP1_RX_EVT_EN  2
-
-struct spi_board_info;
-
-void __init dm355_init(void);
-void dm355_init_spi0(unsigned chipselect_mask,
-                struct spi_board_info *info, unsigned len);
-void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata);
-void dm355_set_vpfe_config(struct vpfe_config *cfg);
-
-#endif /* __ASM_ARCH_DM355_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index 2563bf4e93a1..b9bf3d6a4423 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -1,52 +1 @@
-/*
- * Copyright (C) 2009 Texas Instruments Incorporated
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_DM365_H
-#define __ASM_ARCH_DM665_H
-
-#include <linux/platform_device.h>
-#include <linux/davinci_emac.h>
-#include <mach/hardware.h>
-#include <mach/asp.h>
-#include <mach/keyscan.h>
-#include <media/davinci/vpfe_capture.h>
-
-#define DM365_EMAC_BASE                 (0x01D07000)
-#define DM365_EMAC_MDIO_BASE            (DM365_EMAC_BASE + 0x4000)
-#define DM365_EMAC_CNTRL_OFFSET         (0x0000)
-#define DM365_EMAC_CNTRL_MOD_OFFSET     (0x3000)
-#define DM365_EMAC_CNTRL_RAM_OFFSET     (0x1000)
-#define DM365_EMAC_CNTRL_RAM_SIZE       (0x2000)
-
-/* Base of key scan register bank */
-#define DM365_KEYSCAN_BASE              (0x01C69400)
-
-#define DM365_RTC_BASE                  (0x01C69000)
-
-#define DAVINCI_DM365_VC_BASE           (0x01D0C000)
-#define DAVINCI_DMA_VC_TX               2
-#define DAVINCI_DMA_VC_RX               3
-
-#define DM365_ASYNC_EMIF_CONTROL_BASE   0x01D10000
-#define DM365_ASYNC_EMIF_DATA_CE0_BASE  0x02000000
-#define DM365_ASYNC_EMIF_DATA_CE1_BASE  0x04000000
-
-void __init dm365_init(void);
-void __init dm365_init_asp(struct snd_platform_data *pdata);
-void __init dm365_init_vc(struct snd_platform_data *pdata);
-void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
-void __init dm365_init_rtc(void);
-void dm365_init_spi0(unsigned chipselect_mask,
-                        struct spi_board_info *info, unsigned len);
-
-void dm365_set_vpfe_config(struct vpfe_config *cfg);
-#endif /* __ASM_ARCH_DM365_H */
+/* empty, remove once unused */
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
deleted file mode 100644
index 5a1b26d4e68b..000000000000
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * This file contains the processor specific definitions
- * of the TI DM644x.
- *
- * Copyright (C) 2008 Texas Instruments.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-#ifndef __ASM_ARCH_DM644X_H
-#define __ASM_ARCH_DM644X_H
-
-#include <linux/davinci_emac.h>
-#include <mach/hardware.h>
-#include <mach/asp.h>
-#include <media/davinci/vpfe_capture.h>
-
-#define DM644X_EMAC_BASE                (0x01C80000)
-#define DM644X_EMAC_MDIO_BASE           (DM644X_EMAC_BASE + 0x4000)
-#define DM644X_EMAC_CNTRL_OFFSET        (0x0000)
-#define DM644X_EMAC_CNTRL_MOD_OFFSET    (0x1000)
-#define DM644X_EMAC_CNTRL_RAM_OFFSET    (0x2000)
-#define DM644X_EMAC_CNTRL_RAM_SIZE      (0x2000)
-
-#define DM644X_ASYNC_EMIF_CONTROL_BASE  0x01E00000
-#define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
-#define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
-#define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
-#define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
-
-void __init dm644x_init(void);
-void __init dm644x_init_asp(struct snd_platform_data *pdata);
-void dm644x_set_vpfe_config(struct vpfe_config *cfg);
-
-#endif /* __ASM_ARCH_DM644X_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index a8ee6c9f0bb0..b9bf3d6a4423 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -1,41 +1 @@
-/*
- * Chip specific defines for DM646x SoC
- *
- * Author: Kevin Hilman, Deep Root Systems, LLC
- *
- * 2007 (c) Deep Root Systems, LLC. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_DM646X_H
-#define __ASM_ARCH_DM646X_H
-
-#include <mach/hardware.h>
-#include <mach/asp.h>
-#include <linux/i2c.h>
-#include <linux/videodev2.h>
-#include <linux/davinci_emac.h>
-#include <media/davinci/vpif_types.h>
-
-#define DM646X_EMAC_BASE                (0x01C80000)
-#define DM646X_EMAC_MDIO_BASE           (DM646X_EMAC_BASE + 0x4000)
-#define DM646X_EMAC_CNTRL_OFFSET        (0x0000)
-#define DM646X_EMAC_CNTRL_MOD_OFFSET    (0x1000)
-#define DM646X_EMAC_CNTRL_RAM_OFFSET    (0x2000)
-#define DM646X_EMAC_CNTRL_RAM_SIZE      (0x2000)
-
-#define DM646X_ASYNC_EMIF_CONTROL_BASE  0x20008000
-#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
-
-void __init dm646x_init(void);
-void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
-void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
-int __init dm646x_init_edma(struct edma_rsv_info *rsv);
-
-void dm646x_video_init(void);
-
-void dm646x_setup_vpif(struct vpif_display_config *,
-                       struct vpif_capture_config *);
-
-#endif /* __ASM_ARCH_DM646X_H */
+/* empty, remove once unused */
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index 414e0b93e741..0209b1fc22a1 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -19,8 +19,6 @@
  * and the chip/board init code should then explicitly include
  * <chipname>.h
  */
-#define DAVINCI_SYSTEM_MODULE_BASE        0x01C40000
-
 /*
  * I/O mapping
  */
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
deleted file mode 100644
index fcb7a015aba5..000000000000
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * DaVinci system defines
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <mach/common.h>
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h
deleted file mode 100644
index 3027954f6162..000000000000
--- a/arch/arm/mach-dove/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-dove/include/mach/system.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 294aad07f7a0..804c9122b7b3 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -271,8 +271,33 @@ static struct platform_device *ebsa110_devices[] = {
         &am79c961_device,
 };
 
+/*
+ * EBSA110 idling methodology:
+ *
+ * We can not execute the "wait for interrupt" instruction since that
+ * will stop our MCLK signal (which provides the clock for the glue
+ * logic, and therefore the timer interrupt).
+ *
+ * Instead, we spin, polling the IRQ_STAT register for the occurrence
+ * of any interrupt with core clock down to the memory clock.
+ */
+static void ebsa110_idle(void)
+{
+        const char *irq_stat = (char *)0xff000000;
+
+        /* disable clock switching */
+        asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
+
+        /* wait for an interrupt to occur */
+        while (!*irq_stat);
+
+        /* enable clock switching */
+        asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
+}
+
 static int __init ebsa110_init(void)
 {
+        arm_pm_idle = ebsa110_idle;
         return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices));
 }
 
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h
deleted file mode 100644
index 2e4af65edb6f..000000000000
--- a/arch/arm/mach-ebsa110/include/mach/system.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- *  arch/arm/mach-ebsa110/include/mach/system.h
- *
- *  Copyright (C) 1996-2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-/*
- * EBSA110 idling methodology:
- *
- * We can not execute the "wait for interrupt" instruction since that
- * will stop our MCLK signal (which provides the clock for the glue
- * logic, and therefore the timer interrupt).
- *
- * Instead, we spin, polling the IRQ_STAT register for the occurrence
- * of any interrupt with core clock down to the memory clock.
- */
-static inline void arch_idle(void)
-{
-        const char *irq_stat = (char *)0xff000000;
-
-        /* disable clock switching */
-        asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
-
-        /* wait for an interrupt to occur */
-        while (!*irq_stat);
-
-        /* enable clock switching */
-        asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
-}
-
-#endif
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 24203f9a6796..903edb02fe4f 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = {
         .set_mctrl      = ep93xx_uart_set_mctrl,
 };
 
-static struct amba_device uart1_device = {
-        .dev            = {
-                .init_name      = "apb:uart1",
-                .platform_data  = &ep93xx_uart_data,
-        },
-        .res            = {
-                .start  = EP93XX_UART1_PHYS_BASE,
-                .end    = EP93XX_UART1_PHYS_BASE + 0x0fff,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_EP93XX_UART1, NO_IRQ },
-        .periphid       = 0x00041010,
-};
-
-static struct amba_device uart2_device = {
-        .dev            = {
-                .init_name      = "apb:uart2",
-                .platform_data  = &ep93xx_uart_data,
-        },
-        .res            = {
-                .start  = EP93XX_UART2_PHYS_BASE,
-                .end    = EP93XX_UART2_PHYS_BASE + 0x0fff,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_EP93XX_UART2, NO_IRQ },
-        .periphid       = 0x00041010,
-};
+static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
+        { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
 
-static struct amba_device uart3_device = {
-        .dev            = {
-                .init_name      = "apb:uart3",
-                .platform_data  = &ep93xx_uart_data,
-        },
-        .res            = {
-                .start  = EP93XX_UART3_PHYS_BASE,
-                .end    = EP93XX_UART3_PHYS_BASE + 0x0fff,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_EP93XX_UART3, NO_IRQ },
-        .periphid       = 0x00041010,
-};
+static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
+        { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
 
+static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
+        { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
 
 static struct resource ep93xx_rtc_resource[] = {
         {
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
deleted file mode 100644
index b5bec7cb9b52..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/system.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/system.h
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index c59e18871006..031c1e5b3dfe 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -201,14 +201,6 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
         },
 };
 
-static void exynos_idle(void)
-{
-        if (!need_resched())
-                cpu_do_idle();
-
-        local_irq_enable();
-}
-
 void exynos4_restart(char mode, const char *cmd)
 {
         __raw_writel(0x1, S5P_SWRESET);
@@ -467,10 +459,6 @@ early_initcall(exynos4_l2x0_cache_init);
 int __init exynos_init(void)
 {
         printk(KERN_INFO "EXYNOS: Initializing architecture\n");
-
-        /* set idle function */
-        pm_idle = exynos_idle;
-
         return device_register(&exynos4_dev);
 }
 
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index b10fcd270f07..91370def4a70 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = {
         .peri_id = pdma0_peri,
 };
 
-struct amba_device exynos4_device_pdma0 = {
-        .dev = {
-                .init_name = "dma-pl330.0",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &exynos4_pdma0_pdata,
-        },
-        .res = {
-                .start = EXYNOS4_PA_PDMA0,
-                .end = EXYNOS4_PA_PDMA0 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA0, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0,
+        {IRQ_PDMA0}, &exynos4_pdma0_pdata);
 
 u8 pdma1_peri[] = {
         DMACH_PCM0_RX,
@@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = {
         .peri_id = pdma1_peri,
 };
 
-struct amba_device exynos4_device_pdma1 = {
-        .dev = {
-                .init_name = "dma-pl330.1",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &exynos4_pdma1_pdata,
-        },
-        .res = {
-                .start = EXYNOS4_PA_PDMA1,
-                .end = EXYNOS4_PA_PDMA1 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA1, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(exynos4_pdma1,  "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1,
+        {IRQ_PDMA1}, &exynos4_pdma1_pdata);
 
 static int __init exynos4_dma_init(void)
 {
@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void)
 
         dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
-        amba_device_register(&exynos4_device_pdma0, &iomem_resource);
+        amba_device_register(&exynos4_pdma0_device, &iomem_resource);
 
         dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
-        amba_device_register(&exynos4_device_pdma1, &iomem_resource);
+        amba_device_register(&exynos4_pdma1_device, &iomem_resource);
 
         return 0;
 }
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h
deleted file mode 100644
index 0063a6de3dc8..000000000000
--- a/arch/arm/mach-exynos/include/mach/system.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/system.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * EXYNOS4 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
deleted file mode 100644
index a174a5841bc2..000000000000
--- a/arch/arm/mach-footbridge/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- *  arch/arm/mach-footbridge/include/mach/system.h
- *
- *  Copyright (C) 1996-1999 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-gemini/Makefile b/arch/arm/mach-gemini/Makefile
index c5b24b95a76e..7355c0bbcb5e 100644
--- a/arch/arm/mach-gemini/Makefile
+++ b/arch/arm/mach-gemini/Makefile
@@ -4,7 +4,7 @@
 
 # Object file lists.
 
-obj-y                   := irq.o mm.o time.o devices.o gpio.o
+obj-y                   := irq.o mm.o time.o devices.o gpio.o idle.o
 
 # Board-specific support
 obj-$(CONFIG_MACH_NAS4220B)     += board-nas4220b.o
diff --git a/arch/arm/mach-gemini/idle.c b/arch/arm/mach-gemini/idle.c
new file mode 100644
index 000000000000..92bbd6bb600a
--- /dev/null
+++ b/arch/arm/mach-gemini/idle.c
@@ -0,0 +1,29 @@
+/*
+ * arch/arm/mach-gemini/idle.c
+ */
+
+#include <linux/init.h>
+#include <asm/system.h>
+#include <asm/proc-fns.h>
+
+static void gemini_idle(void)
+{
+        /*
+         * Because of broken hardware we have to enable interrupts or the CPU
+         * will never wakeup... Acctualy it is not very good to enable
+         * interrupts first since scheduler can miss a tick, but there is
+         * no other way around this. Platforms that needs it for power saving
+         * should call enable_hlt() in init code, since by default it is
+         * disabled.
+         */
+        local_irq_enable();
+        cpu_do_idle();
+}
+
+static int __init gemini_idle_init(void)
+{
+        arm_pm_idle = gemini_idle;
+        return 0;
+}
+
+arch_initcall(gemini_idle_init);
diff --git a/arch/arm/mach-gemini/include/mach/system.h b/arch/arm/mach-gemini/include/mach/system.h
index 4d9c1f872472..a33b5a1f8ab4 100644
--- a/arch/arm/mach-gemini/include/mach/system.h
+++ b/arch/arm/mach-gemini/include/mach/system.h
@@ -14,20 +14,6 @@
 #include <mach/hardware.h>
 #include <mach/global_reg.h>
 
-static inline void arch_idle(void)
-{
-        /*
-         * Because of broken hardware we have to enable interrupts or the CPU
-         * will never wakeup... Acctualy it is not very good to enable
-         * interrupts here since scheduler can miss a tick, but there is
-         * no other way around this. Platforms that needs it for power saving
-         * should call enable_hlt() in init code, since by default it is
-         * disabled.
-         */
-        local_irq_enable();
-        cpu_do_idle();
-}
-
 static inline void arch_reset(char mode, const char *cmd)
 {
         __raw_writel(RESET_GLOBAL | RESET_CPU1,
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
index 9485a8fdf851..ca70e5fcc7ac 100644
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -73,8 +73,8 @@ void __init gemini_init_irq(void)
         unsigned int i, mode = 0, level = 0;
 
         /*
-         * Disable arch_idle() by default since it is buggy
-         * For more info see arch/arm/mach-gemini/include/mach/system.h
+         * Disable the idle handler by default since it is buggy
+         * For more info see arch/arm/mach-gemini/idle.c
          */
         disable_hlt();
 
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index f8a2f6bb5483..e756d1ac00c2 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -247,3 +247,21 @@ void h720x_restart(char mode, const char *cmd)
 {
         CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
 }
+
+static void h720x__idle(void)
+{
+        CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
+        nop();
+        nop();
+        CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
+        nop();
+        nop();
+}
+
+static int __init h720x_idle_init(void)
+{
+        arm_pm_idle = h720x__idle;
+        return 0;
+}
+
+arch_initcall(h720x_idle_init);
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h
deleted file mode 100644
index 16ac46e239aa..000000000000
--- a/arch/arm/mach-h720x/include/mach/system.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-h720x/include/mach/system.h
- *
- * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- * arch/arm/mach-h720x/include/mach/system.h
- *
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-#include <mach/hardware.h>
-
-static void arch_idle(void)
-{
-        CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
-        nop();
-        nop();
-        CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
-        nop();
-        nop();
-}
-
-#endif
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h
deleted file mode 100644
index b1d8b5fbe373..000000000000
--- a/arch/arm/mach-highbank/include/mach/system.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright 2010-2011 Calxeda, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c
index 988a28178d4c..3a943cd4159f 100644
--- a/arch/arm/mach-imx/clock-imx31.c
+++ b/arch/arm/mach-imx/clock-imx31.c
@@ -32,7 +32,7 @@
 #include <mach/mx31.h>
 #include <mach/common.h>
 
-#include "crmregs-imx31.h"
+#include "crmregs-imx3.h"
 
 #define PRE_DIV_MIN_FREQ    10000000 /* Minimum Frequency after Predivider */
 
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index ac8238caecb9..1e279af656ad 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -27,23 +27,7 @@
 #include <mach/hardware.h>
 #include <mach/common.h>
 
-#define CCM_BASE        MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR)
-
-#define CCM_CCMR        0x00
-#define CCM_PDR0        0x04
-#define CCM_PDR1        0x08
-#define CCM_PDR2        0x0C
-#define CCM_PDR3        0x10
-#define CCM_PDR4        0x14
-#define CCM_RCSR        0x18
-#define CCM_MPCTL       0x1C
-#define CCM_PPCTL       0x20
-#define CCM_ACMR        0x24
-#define CCM_COSR        0x28
-#define CCM_CGR0        0x2C
-#define CCM_CGR1        0x30
-#define CCM_CGR2        0x34
-#define CCM_CGR3        0x38
+#include "crmregs-imx3.h"
 
 #ifdef HAVE_SET_RATE_SUPPORT
 static void calc_dividers(u32 div, u32 *pre, u32 *post, u32 maxpost)
@@ -111,14 +95,14 @@ static void calc_dividers_3_3(u32 div, u32 *pre, u32 *post)
 
 static unsigned long get_rate_mpll(void)
 {
-        ulong mpctl = __raw_readl(CCM_BASE + CCM_MPCTL);
+        ulong mpctl = __raw_readl(MX35_CCM_MPCTL);
 
         return mxc_decode_pll(mpctl, 24000000);
 }
 
 static unsigned long get_rate_ppll(void)
 {
-        ulong ppctl = __raw_readl(CCM_BASE + CCM_PPCTL);
+        ulong ppctl = __raw_readl(MX35_CCM_PPCTL);
 
         return mxc_decode_pll(ppctl, 24000000);
 }
@@ -148,7 +132,7 @@ static struct arm_ahb_div clk_consumer[] = {
 
 static unsigned long get_rate_arm(void)
 {
-        unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
+        unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);
         struct arm_ahb_div *aad;
         unsigned long fref = get_rate_mpll();
 
@@ -161,7 +145,7 @@ static unsigned long get_rate_arm(void)
 
 static unsigned long get_rate_ahb(struct clk *clk)
 {
-        unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
+        unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);
         struct arm_ahb_div *aad;
         unsigned long fref = get_rate_arm();
 
@@ -177,8 +161,8 @@ static unsigned long get_rate_ipg(struct clk *clk)
 
 static unsigned long get_rate_uart(struct clk *clk)
 {
-        unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3);
-        unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
+        unsigned long pdr3 = __raw_readl(MX35_CCM_PDR3);
+        unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);
         unsigned long div = ((pdr4 >> 10) & 0x3f) + 1;
 
         if (pdr3 & (1 << 14))
@@ -189,7 +173,7 @@ static unsigned long get_rate_uart(struct clk *clk)
 
 static unsigned long get_rate_sdhc(struct clk *clk)
 {
-        unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3);
+        unsigned long pdr3 = __raw_readl(MX35_CCM_PDR3);
         unsigned long div, rate;
 
         if (pdr3 & (1 << 6))
@@ -215,7 +199,7 @@ static unsigned long get_rate_sdhc(struct clk *clk)
 
 static unsigned long get_rate_mshc(struct clk *clk)
 {
-        unsigned long pdr1 = __raw_readl(CCM_BASE + CCM_PDR1);
+        unsigned long pdr1 = __raw_readl(MXC_CCM_PDR1);
         unsigned long div1, div2, rate;
 
         if (pdr1 & (1 << 7))
@@ -231,7 +215,7 @@ static unsigned long get_rate_mshc(struct clk *clk)
 
 static unsigned long get_rate_ssi(struct clk *clk)
 {
-        unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2);
+        unsigned long pdr2 = __raw_readl(MX35_CCM_PDR2);
         unsigned long div1, div2, rate;
 
         if (pdr2 & (1 << 6))
@@ -256,7 +240,7 @@ static unsigned long get_rate_ssi(struct clk *clk)
 
 static unsigned long get_rate_csi(struct clk *clk)
 {
-        unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2);
+        unsigned long pdr2 = __raw_readl(MX35_CCM_PDR2);
         unsigned long rate;
 
         if (pdr2 & (1 << 7))
@@ -269,7 +253,7 @@ static unsigned long get_rate_csi(struct clk *clk)
 
 static unsigned long get_rate_otg(struct clk *clk)
 {
-        unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
+        unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);
         unsigned long rate;
 
         if (pdr4 & (1 << 9))
@@ -282,8 +266,8 @@ static unsigned long get_rate_otg(struct clk *clk)
 
 static unsigned long get_rate_ipg_per(struct clk *clk)
 {
-        unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
-        unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
+        unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);
+        unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);
         unsigned long div;
 
         if (pdr0 & (1 << 26)) {
@@ -297,7 +281,7 @@ static unsigned long get_rate_ipg_per(struct clk *clk)
 
 static unsigned long get_rate_hsp(struct clk *clk)
 {
-        unsigned long hsp_podf = (__raw_readl(CCM_BASE + CCM_PDR0) >> 20) & 0x03;
+        unsigned long hsp_podf = (__raw_readl(MXC_CCM_PDR0) >> 20) & 0x03;
         unsigned long fref = get_rate_mpll();
 
         if (fref > 400 * 1000 * 1000) {
@@ -345,7 +329,7 @@ static void clk_cgr_disable(struct clk *clk)
 #define DEFINE_CLOCK(name, i, er, es, gr, sr)           \
         static struct clk name = {                      \
                 .id             = i,                    \
-                .enable_reg     = CCM_BASE + er,        \
+                .enable_reg     = er,                   \
                 .enable_shift   = es,                   \
                 .get_rate       = gr,                   \
                 .set_rate       = sr,                   \
@@ -353,59 +337,59 @@ static void clk_cgr_disable(struct clk *clk)
                 .disable        = clk_cgr_disable,      \
         }
 
-DEFINE_CLOCK(asrc_clk,   0, CCM_CGR0,  0, NULL, NULL);
-DEFINE_CLOCK(pata_clk,    0, CCM_CGR0,  2, get_rate_ipg, NULL);
-/* DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0,  4, NULL, NULL); */
-DEFINE_CLOCK(can1_clk,   0, CCM_CGR0,  6, get_rate_ipg, NULL);
-DEFINE_CLOCK(can2_clk,   1, CCM_CGR0,  8, get_rate_ipg, NULL);
-DEFINE_CLOCK(cspi1_clk,  0, CCM_CGR0, 10, get_rate_ipg, NULL);
-DEFINE_CLOCK(cspi2_clk,  1, CCM_CGR0, 12, get_rate_ipg, NULL);
-DEFINE_CLOCK(ect_clk,    0, CCM_CGR0, 14, get_rate_ipg, NULL);
-DEFINE_CLOCK(edio_clk,   0, CCM_CGR0, 16, NULL, NULL);
-DEFINE_CLOCK(emi_clk,    0, CCM_CGR0, 18, get_rate_ipg, NULL);
-DEFINE_CLOCK(epit1_clk,  0, CCM_CGR0, 20, get_rate_ipg, NULL);
-DEFINE_CLOCK(epit2_clk,  1, CCM_CGR0, 22, get_rate_ipg, NULL);
-DEFINE_CLOCK(esai_clk,   0, CCM_CGR0, 24, NULL, NULL);
-DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL);
-DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL);
-DEFINE_CLOCK(esdhc3_clk, 2, CCM_CGR0, 30, get_rate_sdhc, NULL);
-
-DEFINE_CLOCK(fec_clk,    0, CCM_CGR1,  0, get_rate_ipg, NULL);
-DEFINE_CLOCK(gpio1_clk,  0, CCM_CGR1,  2, NULL, NULL);
-DEFINE_CLOCK(gpio2_clk,  1, CCM_CGR1,  4, NULL, NULL);
-DEFINE_CLOCK(gpio3_clk,  2, CCM_CGR1,  6, NULL, NULL);
-DEFINE_CLOCK(gpt_clk,    0, CCM_CGR1,  8, get_rate_ipg, NULL);
-DEFINE_CLOCK(i2c1_clk,   0, CCM_CGR1, 10, get_rate_ipg_per, NULL);
-DEFINE_CLOCK(i2c2_clk,   1, CCM_CGR1, 12, get_rate_ipg_per, NULL);
-DEFINE_CLOCK(i2c3_clk,   2, CCM_CGR1, 14, get_rate_ipg_per, NULL);
-DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL);
-DEFINE_CLOCK(ipu_clk,    0, CCM_CGR1, 18, get_rate_hsp, NULL);
-DEFINE_CLOCK(kpp_clk,    0, CCM_CGR1, 20, get_rate_ipg, NULL);
-DEFINE_CLOCK(mlb_clk,    0, CCM_CGR1, 22, get_rate_ahb, NULL);
-DEFINE_CLOCK(mshc_clk,   0, CCM_CGR1, 24, get_rate_mshc, NULL);
-DEFINE_CLOCK(owire_clk,  0, CCM_CGR1, 26, get_rate_ipg_per, NULL);
-DEFINE_CLOCK(pwm_clk,    0, CCM_CGR1, 28, get_rate_ipg_per, NULL);
-DEFINE_CLOCK(rngc_clk,   0, CCM_CGR1, 30, get_rate_ipg, NULL);
-
-DEFINE_CLOCK(rtc_clk,    0, CCM_CGR2,  0, get_rate_ipg, NULL);
-DEFINE_CLOCK(rtic_clk,   0, CCM_CGR2,  2, get_rate_ahb, NULL);
-DEFINE_CLOCK(scc_clk,    0, CCM_CGR2,  4, get_rate_ipg, NULL);
-DEFINE_CLOCK(sdma_clk,   0, CCM_CGR2,  6, NULL, NULL);
-DEFINE_CLOCK(spba_clk,   0, CCM_CGR2,  8, get_rate_ipg, NULL);
-DEFINE_CLOCK(spdif_clk,  0, CCM_CGR2, 10, NULL, NULL);
-DEFINE_CLOCK(ssi1_clk,   0, CCM_CGR2, 12, get_rate_ssi, NULL);
-DEFINE_CLOCK(ssi2_clk,   1, CCM_CGR2, 14, get_rate_ssi, NULL);
-DEFINE_CLOCK(uart1_clk,  0, CCM_CGR2, 16, get_rate_uart, NULL);
-DEFINE_CLOCK(uart2_clk,  1, CCM_CGR2, 18, get_rate_uart, NULL);
-DEFINE_CLOCK(uart3_clk,  2, CCM_CGR2, 20, get_rate_uart, NULL);
-DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, get_rate_otg, NULL);
-DEFINE_CLOCK(wdog_clk,   0, CCM_CGR2, 24, NULL, NULL);
-DEFINE_CLOCK(max_clk,    0, CCM_CGR2, 26, NULL, NULL);
-DEFINE_CLOCK(audmux_clk, 0, CCM_CGR2, 30, NULL, NULL);
-
-DEFINE_CLOCK(csi_clk,    0, CCM_CGR3,  0, get_rate_csi, NULL);
-DEFINE_CLOCK(iim_clk,    0, CCM_CGR3,  2, NULL, NULL);
-DEFINE_CLOCK(gpu2d_clk,  0, CCM_CGR3,  4, NULL, NULL);
+DEFINE_CLOCK(asrc_clk,   0, MX35_CCM_CGR0,  0, NULL, NULL);
+DEFINE_CLOCK(pata_clk,    0, MX35_CCM_CGR0,  2, get_rate_ipg, NULL);
+/* DEFINE_CLOCK(audmux_clk, 0, MX35_CCM_CGR0,  4, NULL, NULL); */
+DEFINE_CLOCK(can1_clk,   0, MX35_CCM_CGR0,  6, get_rate_ipg, NULL);
+DEFINE_CLOCK(can2_clk,   1, MX35_CCM_CGR0,  8, get_rate_ipg, NULL);
+DEFINE_CLOCK(cspi1_clk,  0, MX35_CCM_CGR0, 10, get_rate_ipg, NULL);
+DEFINE_CLOCK(cspi2_clk,  1, MX35_CCM_CGR0, 12, get_rate_ipg, NULL);
+DEFINE_CLOCK(ect_clk,    0, MX35_CCM_CGR0, 14, get_rate_ipg, NULL);
+DEFINE_CLOCK(edio_clk,   0, MX35_CCM_CGR0, 16, NULL, NULL);
+DEFINE_CLOCK(emi_clk,    0, MX35_CCM_CGR0, 18, get_rate_ipg, NULL);
+DEFINE_CLOCK(epit1_clk,  0, MX35_CCM_CGR0, 20, get_rate_ipg, NULL);
+DEFINE_CLOCK(epit2_clk,  1, MX35_CCM_CGR0, 22, get_rate_ipg, NULL);
+DEFINE_CLOCK(esai_clk,   0, MX35_CCM_CGR0, 24, NULL, NULL);
+DEFINE_CLOCK(esdhc1_clk, 0, MX35_CCM_CGR0, 26, get_rate_sdhc, NULL);
+DEFINE_CLOCK(esdhc2_clk, 1, MX35_CCM_CGR0, 28, get_rate_sdhc, NULL);
+DEFINE_CLOCK(esdhc3_clk, 2, MX35_CCM_CGR0, 30, get_rate_sdhc, NULL);
+
+DEFINE_CLOCK(fec_clk,    0, MX35_CCM_CGR1,  0, get_rate_ipg, NULL);
+DEFINE_CLOCK(gpio1_clk,  0, MX35_CCM_CGR1,  2, NULL, NULL);
+DEFINE_CLOCK(gpio2_clk,  1, MX35_CCM_CGR1,  4, NULL, NULL);
+DEFINE_CLOCK(gpio3_clk,  2, MX35_CCM_CGR1,  6, NULL, NULL);
+DEFINE_CLOCK(gpt_clk,    0, MX35_CCM_CGR1,  8, get_rate_ipg, NULL);
+DEFINE_CLOCK(i2c1_clk,   0, MX35_CCM_CGR1, 10, get_rate_ipg_per, NULL);
+DEFINE_CLOCK(i2c2_clk,   1, MX35_CCM_CGR1, 12, get_rate_ipg_per, NULL);
+DEFINE_CLOCK(i2c3_clk,   2, MX35_CCM_CGR1, 14, get_rate_ipg_per, NULL);
+DEFINE_CLOCK(iomuxc_clk, 0, MX35_CCM_CGR1, 16, NULL, NULL);
+DEFINE_CLOCK(ipu_clk,    0, MX35_CCM_CGR1, 18, get_rate_hsp, NULL);
+DEFINE_CLOCK(kpp_clk,    0, MX35_CCM_CGR1, 20, get_rate_ipg, NULL);
+DEFINE_CLOCK(mlb_clk,    0, MX35_CCM_CGR1, 22, get_rate_ahb, NULL);
+DEFINE_CLOCK(mshc_clk,   0, MX35_CCM_CGR1, 24, get_rate_mshc, NULL);
+DEFINE_CLOCK(owire_clk,  0, MX35_CCM_CGR1, 26, get_rate_ipg_per, NULL);
+DEFINE_CLOCK(pwm_clk,    0, MX35_CCM_CGR1, 28, get_rate_ipg_per, NULL);
+DEFINE_CLOCK(rngc_clk,   0, MX35_CCM_CGR1, 30, get_rate_ipg, NULL);
+
+DEFINE_CLOCK(rtc_clk,    0, MX35_CCM_CGR2,  0, get_rate_ipg, NULL);
+DEFINE_CLOCK(rtic_clk,   0, MX35_CCM_CGR2,  2, get_rate_ahb, NULL);
+DEFINE_CLOCK(scc_clk,    0, MX35_CCM_CGR2,  4, get_rate_ipg, NULL);
+DEFINE_CLOCK(sdma_clk,   0, MX35_CCM_CGR2,  6, NULL, NULL);
+DEFINE_CLOCK(spba_clk,   0, MX35_CCM_CGR2,  8, get_rate_ipg, NULL);
+DEFINE_CLOCK(spdif_clk,  0, MX35_CCM_CGR2, 10, NULL, NULL);
+DEFINE_CLOCK(ssi1_clk,   0, MX35_CCM_CGR2, 12, get_rate_ssi, NULL);
+DEFINE_CLOCK(ssi2_clk,   1, MX35_CCM_CGR2, 14, get_rate_ssi, NULL);
+DEFINE_CLOCK(uart1_clk,  0, MX35_CCM_CGR2, 16, get_rate_uart, NULL);
+DEFINE_CLOCK(uart2_clk,  1, MX35_CCM_CGR2, 18, get_rate_uart, NULL);
+DEFINE_CLOCK(uart3_clk,  2, MX35_CCM_CGR2, 20, get_rate_uart, NULL);
+DEFINE_CLOCK(usbotg_clk, 0, MX35_CCM_CGR2, 22, get_rate_otg, NULL);
+DEFINE_CLOCK(wdog_clk,   0, MX35_CCM_CGR2, 24, NULL, NULL);
+DEFINE_CLOCK(max_clk,    0, MX35_CCM_CGR2, 26, NULL, NULL);
+DEFINE_CLOCK(audmux_clk, 0, MX35_CCM_CGR2, 30, NULL, NULL);
+
+DEFINE_CLOCK(csi_clk,    0, MX35_CCM_CGR3,  0, get_rate_csi, NULL);
+DEFINE_CLOCK(iim_clk,    0, MX35_CCM_CGR3,  2, NULL, NULL);
+DEFINE_CLOCK(gpu2d_clk,  0, MX35_CCM_CGR3,  4, NULL, NULL);
 
 DEFINE_CLOCK(usbahb_clk, 0, 0,         0, get_rate_ahb, NULL);
 
@@ -422,7 +406,7 @@ static unsigned long get_rate_nfc(struct clk *clk)
 {
         unsigned long div1;
 
-        div1 = (__raw_readl(CCM_BASE + CCM_PDR4) >> 28) + 1;
+        div1 = (__raw_readl(MX35_CCM_PDR4) >> 28) + 1;
 
         return get_rate_ahb(NULL) / div1;
 }
@@ -518,11 +502,11 @@ int __init mx35_clocks_init()
         /* Turn off all clocks except the ones we need to survive, namely:
          * EMI, GPIO1/2/3, GPT, IOMUX, MAX and eventually uart
          */
-        __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
+        __raw_writel((3 << 18), MX35_CCM_CGR0);
         __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
-                        CCM_BASE + CCM_CGR1);
-        __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
-        __raw_writel(0, CCM_BASE + CCM_CGR3);
+                        MX35_CCM_CGR1);
+        __raw_writel(cgr2, MX35_CCM_CGR2);
+        __raw_writel(0, MX35_CCM_CGR3);
 
         clk_enable(&iim_clk);
         imx_print_silicon_rev("i.MX35", mx35_revision());
@@ -533,7 +517,7 @@ int __init mx35_clocks_init()
          * extra clocks turned on, otherwise the MX35 boot ROM code will
          * hang after a watchdog reset.
          */
-        if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
+        if (!(__raw_readl(MX35_CCM_RCSR) & (3 << 10))) {
                 /* Additionally turn on UART1, SCC, and IIM clocks */
                 clk_enable(&iim_clk);
                 clk_enable(&uart1_clk);
diff --git a/arch/arm/mach-imx/crmregs-imx31.h b/arch/arm/mach-imx/crmregs-imx3.h
index 37a8a07beda3..d7691e2362c1 100644
--- a/arch/arm/mach-imx/crmregs-imx31.h
+++ b/arch/arm/mach-imx/crmregs-imx3.h
@@ -24,23 +24,36 @@
 #define CKIH_CLK_FREQ_27MHZ     27000000
 #define CKIL_CLK_FREQ           32768
 
-#define MXC_CCM_BASE            MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR)
+#define MXC_CCM_BASE            (cpu_is_mx31() ? \
+MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR) : MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR))
 
 /* Register addresses */
 #define MXC_CCM_CCMR            (MXC_CCM_BASE + 0x00)
 #define MXC_CCM_PDR0            (MXC_CCM_BASE + 0x04)
 #define MXC_CCM_PDR1            (MXC_CCM_BASE + 0x08)
+#define MX35_CCM_PDR2           (MXC_CCM_BASE + 0x0C)
 #define MXC_CCM_RCSR            (MXC_CCM_BASE + 0x0C)
+#define MX35_CCM_PDR3           (MXC_CCM_BASE + 0x10)
 #define MXC_CCM_MPCTL           (MXC_CCM_BASE + 0x10)
+#define MX35_CCM_PDR4           (MXC_CCM_BASE + 0x14)
 #define MXC_CCM_UPCTL           (MXC_CCM_BASE + 0x14)
+#define MX35_CCM_RCSR           (MXC_CCM_BASE + 0x18)
 #define MXC_CCM_SRPCTL          (MXC_CCM_BASE + 0x18)
+#define MX35_CCM_MPCTL          (MXC_CCM_BASE + 0x1C)
 #define MXC_CCM_COSR            (MXC_CCM_BASE + 0x1C)
+#define MX35_CCM_PPCTL          (MXC_CCM_BASE + 0x20)
 #define MXC_CCM_CGR0            (MXC_CCM_BASE + 0x20)
+#define MX35_CCM_ACMR           (MXC_CCM_BASE + 0x24)
 #define MXC_CCM_CGR1            (MXC_CCM_BASE + 0x24)
+#define MX35_CCM_COSR           (MXC_CCM_BASE + 0x28)
 #define MXC_CCM_CGR2            (MXC_CCM_BASE + 0x28)
+#define MX35_CCM_CGR0           (MXC_CCM_BASE + 0x2C)
 #define MXC_CCM_WIMR            (MXC_CCM_BASE + 0x2C)
+#define MX35_CCM_CGR1           (MXC_CCM_BASE + 0x30)
 #define MXC_CCM_LDC             (MXC_CCM_BASE + 0x30)
+#define MX35_CCM_CGR2           (MXC_CCM_BASE + 0x34)
 #define MXC_CCM_DCVR0           (MXC_CCM_BASE + 0x34)
+#define MX35_CCM_CGR3           (MXC_CCM_BASE + 0x38)
 #define MXC_CCM_DCVR1           (MXC_CCM_BASE + 0x38)
 #define MXC_CCM_DCVR2           (MXC_CCM_BASE + 0x3C)
 #define MXC_CCM_DCVR3           (MXC_CCM_BASE + 0x40)
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index e4f426a09899..27bc27e6ea41 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -51,7 +51,7 @@
 #include <mach/ulpi.h>
 
 #include "devices-imx31.h"
-#include "crmregs-imx31.h"
+#include "crmregs-imx3.h"
 
 static int armadillo5x0_pins[] = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 31807d2a8b7b..8404ee72555a 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -34,31 +34,29 @@ static void imx3_idle(void)
 {
         unsigned long reg = 0;
 
-        if (!need_resched())
-                __asm__ __volatile__(
-                        /* disable I and D cache */
-                        "mrc p15, 0, %0, c1, c0, 0\n"
-                        "bic %0, %0, #0x00001000\n"
-                        "bic %0, %0, #0x00000004\n"
-                        "mcr p15, 0, %0, c1, c0, 0\n"
-                        /* invalidate I cache */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c5, 0\n"
-                        /* clear and invalidate D cache */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c14, 0\n"
-                        /* WFI */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c0, 4\n"
-                        "nop\n" "nop\n" "nop\n" "nop\n"
-                        "nop\n" "nop\n" "nop\n"
-                        /* enable I and D cache */
-                        "mrc p15, 0, %0, c1, c0, 0\n"
-                        "orr %0, %0, #0x00001000\n"
-                        "orr %0, %0, #0x00000004\n"
-                        "mcr p15, 0, %0, c1, c0, 0\n"
-                        : "=r" (reg));
-        local_irq_enable();
+        __asm__ __volatile__(
+                /* disable I and D cache */
+                "mrc p15, 0, %0, c1, c0, 0\n"
+                "bic %0, %0, #0x00001000\n"
+                "bic %0, %0, #0x00000004\n"
+                "mcr p15, 0, %0, c1, c0, 0\n"
+                /* invalidate I cache */
+                "mov %0, #0\n"
+                "mcr p15, 0, %0, c7, c5, 0\n"
+                /* clear and invalidate D cache */
+                "mov %0, #0\n"
+                "mcr p15, 0, %0, c7, c14, 0\n"
+                /* WFI */
+                "mov %0, #0\n"
+                "mcr p15, 0, %0, c7, c0, 4\n"
+                "nop\n" "nop\n" "nop\n" "nop\n"
+                "nop\n" "nop\n" "nop\n"
+                /* enable I and D cache */
+                "mrc p15, 0, %0, c1, c0, 0\n"
+                "orr %0, %0, #0x00001000\n"
+                "orr %0, %0, #0x00000004\n"
+                "mcr p15, 0, %0, c1, c0, 0\n"
+                : "=r" (reg));
 }
 
 static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -134,8 +132,8 @@ void __init imx31_init_early(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX31);
         mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
-        pm_idle = imx3_idle;
         imx_ioremap = imx3_ioremap;
+        arm_pm_idle = imx3_idle;
 }
 
 void __init mx31_init_irq(void)
@@ -197,7 +195,7 @@ void __init imx35_init_early(void)
         mxc_set_cpu_type(MXC_CPU_MX35);
         mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
         mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
-        pm_idle = imx3_idle;
+        arm_pm_idle = imx3_idle;
         imx_ioremap = imx3_ioremap;
 }
 
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index bc17dfea3817..49549a72dc7d 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk;
 
 static void imx5_idle(void)
 {
-        if (!need_resched()) {
-                /* gpc clock is needed for SRPG */
-                if (gpc_dvfs_clk == NULL) {
-                        gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
-                        if (IS_ERR(gpc_dvfs_clk))
-                                goto err0;
-                }
-                clk_enable(gpc_dvfs_clk);
-                mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
-                if (tzic_enable_wake())
-                        goto err1;
-                cpu_do_idle();
-err1:
-                clk_disable(gpc_dvfs_clk);
+        /* gpc clock is needed for SRPG */
+        if (gpc_dvfs_clk == NULL) {
+                gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
+                if (IS_ERR(gpc_dvfs_clk))
+                        return;
         }
-err0:
-        local_irq_enable();
+        clk_enable(gpc_dvfs_clk);
+        mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+        if (tzic_enable_wake() != 0)
+                cpu_do_idle();
+        clk_disable(gpc_dvfs_clk);
 }
 
 /*
@@ -108,7 +102,7 @@ void __init imx51_init_early(void)
         mxc_set_cpu_type(MXC_CPU_MX51);
         mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
         mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
-        pm_idle = imx5_idle;
+        arm_pm_idle = imx5_idle;
 }
 
 void __init imx53_init_early(void)
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c
index e455d2f855bf..6fcffa7db978 100644
--- a/arch/arm/mach-imx/pm-imx27.c
+++ b/arch/arm/mach-imx/pm-imx27.c
@@ -10,7 +10,6 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/io.h>
-#include <mach/system.h>
 #include <mach/hardware.h>
 
 static int mx27_suspend_enter(suspend_state_t state)
@@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state)
                 cscr &= 0xFFFFFFFC;
                 __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
                 /* Executes WFI */
-                arch_idle();
+                cpu_do_idle();
                 break;
 
         default:
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 019f0ab08f66..15b87f26ac96 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -35,67 +35,23 @@
 
 static struct amba_pl010_data integrator_uart_data;
 
-static struct amba_device rtc_device = {
-        .dev            = {
-                .init_name = "mb:15",
-        },
-        .res            = {
-                .start  = INTEGRATOR_RTC_BASE,
-                .end    = INTEGRATOR_RTC_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_RTCINT, NO_IRQ },
-};
+#define INTEGRATOR_RTC_IRQ      { IRQ_RTCINT }
+#define INTEGRATOR_UART0_IRQ    { IRQ_UARTINT0 }
+#define INTEGRATOR_UART1_IRQ    { IRQ_UARTINT1 }
+#define KMI0_IRQ                { IRQ_KMIINT0 }
+#define KMI1_IRQ                { IRQ_KMIINT1 }
 
-static struct amba_device uart0_device = {
-        .dev            = {
-                .init_name = "mb:16",
-                .platform_data = &integrator_uart_data,
-        },
-        .res            = {
-                .start  = INTEGRATOR_UART0_BASE,
-                .end    = INTEGRATOR_UART0_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_UARTINT0, NO_IRQ },
-};
+static AMBA_APB_DEVICE(rtc, "mb:15", 0,
+        INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
 
-static struct amba_device uart1_device = {
-        .dev            = {
-                .init_name = "mb:17",
-                .platform_data = &integrator_uart_data,
-        },
-        .res            = {
-                .start  = INTEGRATOR_UART1_BASE,
-                .end    = INTEGRATOR_UART1_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_UARTINT1, NO_IRQ },
-};
+static AMBA_APB_DEVICE(uart0, "mb:16", 0,
+        INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data);
 
-static struct amba_device kmi0_device = {
-        .dev            = {
-                .init_name = "mb:18",
-        },
-        .res            = {
-                .start  = KMI0_BASE,
-                .end    = KMI0_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_KMIINT0, NO_IRQ },
-};
+static AMBA_APB_DEVICE(uart1, "mb:17", 0,
+        INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data);
 
-static struct amba_device kmi1_device = {
-        .dev            = {
-                .init_name = "mb:19",
-        },
-        .res            = {
-                .start  = KMI1_BASE,
-                .end    = KMI1_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_KMIINT1, NO_IRQ },
-};
+static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL);
+static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &rtc_device,
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 8cbb75a96bd4..3e538da6cb1f 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev)
 
                 pc_base = dev->resource.start + idev->offset;
 
-                d = kzalloc(sizeof(struct amba_device), GFP_KERNEL);
+                d = amba_device_alloc(NULL, pc_base, SZ_4K);
                 if (!d)
                         continue;
 
                 dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12);
                 d->dev.parent   = &dev->dev;
-                d->res.start    = dev->resource.start + idev->offset;
-                d->res.end      = d->res.start + SZ_4K - 1;
-                d->res.flags    = IORESOURCE_MEM;
                 d->irq[0]       = dev->irq;
                 d->irq[1]       = dev->irq;
                 d->periphid     = idev->id;
                 d->dev.platform_data = idev->platform_data;
 
-                ret = amba_device_register(d, &dev->resource);
+                ret = amba_device_add(d, &dev->resource);
                 if (ret) {
                         dev_err(&d->dev, "unable to register device: %d\n", ret);
-                        kfree(d);
+                        amba_device_put(d);
                 }
         }
 
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h
deleted file mode 100644
index 901514eba4a6..000000000000
--- a/arch/arm/mach-integrator/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-integrator/include/mach/system.h
- *
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index a8b6aa6003f3..be9ead4a3bcc 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = {
         .gpio_cd        = -1,
 };
 
-static struct amba_device mmc_device = {
-        .dev            = {
-                .init_name = "mb:1c",
-                .platform_data = &mmc_data,
-        },
-        .res            = {
-                .start  = INTEGRATOR_CP_MMC_BASE,
-                .end    = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 },
-        .periphid       = 0,
-};
+#define INTEGRATOR_CP_MMC_IRQS  { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
+#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT }
 
-static struct amba_device aaci_device = {
-        .dev            = {
-                .init_name = "mb:1d",
-        },
-        .res            = {
-                .start  = INTEGRATOR_CP_AACI_BASE,
-                .end    = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { IRQ_CP_AACIINT, NO_IRQ },
-        .periphid       = 0,
-};
+static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE,
+        INTEGRATOR_CP_MMC_IRQS, &mmc_data);
+
+static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE,
+        INTEGRATOR_CP_AACI_IRQS, NULL);
 
 
 /*
@@ -425,21 +407,8 @@ static struct clcd_board clcd_data = {
         .remove         = versatile_clcd_remove_dma,
 };
 
-static struct amba_device clcd_device = {
-        .dev            = {
-                .init_name = "mb:c0",
-                .coherent_dma_mask = ~0,
-                .platform_data = &clcd_data,
-        },
-        .res            = {
-                .start  = INTCP_PA_CLCD_BASE,
-                .end    = INTCP_PA_CLCD_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .dma_mask       = ~0,
-        .irq            = { IRQ_CP_CLCDCINT, NO_IRQ },
-        .periphid       = 0,
-};
+static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE,
+        { IRQ_CP_CLCDCINT }, &clcd_data);
 
 static struct amba_device *amba_devs[] __initdata = {
         &mmc_device,
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h
deleted file mode 100644
index 1f31ed3f8ae2..000000000000
--- a/arch/arm/mach-iop13xx/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop13xx/include/mach/system.h
- *
- *  Copyright (C) 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
deleted file mode 100644
index 4a88727bca98..000000000000
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop32x/include/mach/system.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
deleted file mode 100644
index 4f98e765397c..000000000000
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop33x/include/mach/system.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h
deleted file mode 100644
index a7fb08b2b8e7..000000000000
--- a/arch/arm/mach-ixp2000/include/mach/system.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * arch/arm/mach-ixp2000/include/mach/system.h
- *
- * Copyright (C) 2002 Intel Corp.
- * Copyricht (C) 2003-2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 0923bb905cc0..7c1495e4fe7a 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -441,6 +441,9 @@ static struct platform_device *ixp23xx_devices[] __initdata = {
 
 void __init ixp23xx_sys_init(void)
 {
+        /* by default, the idle code is disabled */
+        disable_hlt();
+
         *IXP23XX_EXP_UNIT_FUSE |= 0xf;
         platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
 }
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h
deleted file mode 100644
index 277dda7334b9..000000000000
--- a/arch/arm/mach-ixp23xx/include/mach/system.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-ixp23xx/include/mach/system.h
- *
- * Copyright (C) 2003 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-#if 0
-        if (!hlt_counter)
-                cpu_do_idle();
-#endif
-}
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 3841ab4146ba..a6329a0a8ec4 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -236,6 +236,12 @@ void __init ixp4xx_init_irq(void)
 {
         int i = 0;
 
+        /*
+         * ixp4xx does not implement the XScale PWRMODE register
+         * so it must not call cpu_do_idle().
+         */
+        disable_hlt();
+
         /* Route all sources to IRQ instead of FIQ */
         *IXP4XX_ICLR = 0x0;
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h
deleted file mode 100644
index 140a9bef4466..000000000000
--- a/arch/arm/mach-ixp4xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-ixp4xx/include/mach/system.h
- *
- * Copyright (C) 2002 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-static inline void arch_idle(void)
-{
-        /* ixp4xx does not implement the XScale PWRMODE register,
-         * so it must not call cpu_do_idle() here.
-         */
-#if 0
-        cpu_do_idle();
-#endif
-}
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h
deleted file mode 100644
index 5fddde002b5e..000000000000
--- a/arch/arm/mach-kirkwood/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/include/mach/system.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h
deleted file mode 100644
index 59fe992395bf..000000000000
--- a/arch/arm/mach-ks8695/include/mach/system.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-s3c2410/include/mach/system.h
- *
- * Copyright (C) 2006 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * KS8695 - System function defines and includes
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks,
-         */
-        cpu_do_idle();
-
-}
-
-#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h
deleted file mode 100644
index bf176c991520..000000000000
--- a/arch/arm/mach-lpc32xx/include/mach/system.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-lpc32xx/include/mach/system.h
- *
- * Author: Kevin Wells <kevin.wells@nxp.com>
- *
- * Copyright (C) 2010 NXP Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index bfee5b455105..5d51c102c255 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = {
         .remove         = lpc32xx_clcd_remove,
 };
 
-static struct amba_device lpc32xx_clcd_device = {
-        .dev                            = {
-                .coherent_dma_mask      = ~0,
-                .init_name              = "dev:clcd",
-                .platform_data          = &lpc32xx_clcd_data,
-        },
-        .res                            = {
-                .start                  = LPC32XX_LCD_BASE,
-                .end                    = (LPC32XX_LCD_BASE + SZ_4K - 1),
-                .flags                  = IORESOURCE_MEM,
-        },
-        .dma_mask                       = ~0,
-        .irq                            = {IRQ_LPC32XX_LCD, NO_IRQ},
-};
+static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0,
+        LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data);
 
 /*
  * AMBA SSP (SPI)
@@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = {
         .enable_dma             = 0,
 };
 
-static struct amba_device lpc32xx_ssp0_device = {
-        .dev                            = {
-                .coherent_dma_mask      = ~0,
-                .init_name              = "dev:ssp0",
-                .platform_data          = &lpc32xx_ssp0_data,
-        },
-        .res                            = {
-                .start                  = LPC32XX_SSP0_BASE,
-                .end                    = (LPC32XX_SSP0_BASE + SZ_4K - 1),
-                .flags                  = IORESOURCE_MEM,
-        },
-        .dma_mask                       = ~0,
-        .irq                            = {IRQ_LPC32XX_SSP0, NO_IRQ},
-};
+static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0,
+        LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data);
 
 /* AT25 driver registration */
 static int __init phy3250_spi_board_register(void)
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
deleted file mode 100644
index 1d001eab81e1..000000000000
--- a/arch/arm/mach-mmp/include/mach/system.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/system.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_MACH_SYSTEM_H
-#define __ASM_MACH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-#endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S
deleted file mode 100644
index 6a94f0527137..000000000000
--- a/arch/arm/mach-msm/idle.S
+++ /dev/null
@@ -1,36 +0,0 @@
-/* arch/arm/mach-msm/include/mach/idle.S
- *
- * Idle processing for MSM7K - work around bugs with SWFI.
- *
- * Copyright (c) 2007 QUALCOMM Incorporated.
- * Copyright (C) 2007 Google, Inc. 
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */ 
-                
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-
-ENTRY(arch_idle)
-#ifdef CONFIG_MSM7X00A_IDLE
-        mrc     p15, 0, r1, c1, c0, 0    /* read current CR    */
-        bic     r0, r1, #(1 << 2)        /* clear dcache bit   */
-        bic     r0, r0, #(1 << 12)       /* clear icache bit   */
-        mcr     p15, 0, r0, c1, c0, 0    /* disable d/i cache  */
-
-        mov     r0, #0                   /* prepare wfi value  */
-        mcr     p15, 0, r0, c7, c10, 0   /* flush the cache    */
-        mcr     p15, 0, r0, c7, c10, 4   /* memory barrier     */
-        mcr     p15, 0, r0, c7, c0, 4    /* wait for interrupt */
-
-        mcr     p15, 0, r1, c1, c0, 0    /* restore d/i cache  */
-#endif
-        mov     pc, lr
diff --git a/arch/arm/mach-msm/idle.c b/arch/arm/mach-msm/idle.c
new file mode 100644
index 000000000000..0c9e13c65743
--- /dev/null
+++ b/arch/arm/mach-msm/idle.c
@@ -0,0 +1,49 @@
+/* arch/arm/mach-msm/idle.c
+ *
+ * Idle processing for MSM7K - work around bugs with SWFI.
+ *
+ * Copyright (c) 2007 QUALCOMM Incorporated.
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/init.h>
+#include <asm/system.h>
+
+static void msm_idle(void)
+{
+#ifdef CONFIG_MSM7X00A_IDLE
+        asm volatile (
+
+        "mrc     p15, 0, r1, c1, c0, 0    /* read current CR    */ \n\t"
+        "bic     r0, r1, #(1 << 2)        /* clear dcache bit   */ \n\t"
+        "bic     r0, r0, #(1 << 12)       /* clear icache bit   */ \n\t"
+        "mcr     p15, 0, r0, c1, c0, 0    /* disable d/i cache  */ \n\t"
+
+        "mov     r0, #0                   /* prepare wfi value  */ \n\t"
+        "mcr     p15, 0, r0, c7, c10, 0   /* flush the cache    */ \n\t"
+        "mcr     p15, 0, r0, c7, c10, 4   /* memory barrier     */ \n\t"
+        "mcr     p15, 0, r0, c7, c0, 4    /* wait for interrupt */ \n\t"
+
+        "mcr     p15, 0, r1, c1, c0, 0    /* restore d/i cache  */ \n\t"
+
+        : : : "r0","r1" );
+#endif
+}
+
+static int __init msm_idle_init(void)
+{
+        arm_pm_idle = msm_idle;
+        return 0;
+}
+
+arch_initcall(msm_idle_init);
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h
index 311db2b35da0..f5fb2ec87ffe 100644
--- a/arch/arm/mach-msm/include/mach/system.h
+++ b/arch/arm/mach-msm/include/mach/system.h
@@ -12,7 +12,6 @@
  * GNU General Public License for more details.
  *
  */
-void arch_idle(void);
 
 /* low level hardware reset hook -- for example, hitting the
  * PSHOLD line on the PMIC to hard reset the system
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h
deleted file mode 100644
index 8c3a5387cec7..000000000000
--- a/arch/arm/mach-mv78xx0/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-mv78xx0/include/mach/system.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c
index fe3e847930c9..01faffec3064 100644
--- a/arch/arm/mach-mxs/devices.c
+++ b/arch/arm/mach-mxs/devices.c
@@ -77,16 +77,18 @@ err:
 
 int __init mxs_add_amba_device(const struct amba_device *dev)
 {
-        struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL);
+        struct amba_device *adev = amba_device_alloc(dev->dev.init_name,
+                dev->res.start, resource_size(&dev->res));
 
         if (!adev) {
                 pr_err("%s: failed to allocate memory", __func__);
                 return -ENOMEM;
         }
 
-        *adev = *dev;
+        adev->irq[0] = dev->irq[0];
+        adev->irq[1] = dev->irq[1];
 
-        return amba_device_register(adev, &iomem_resource);
+        return amba_device_add(adev, &iomem_resource);
 }
 
 struct device mxs_apbh_bus = {
diff --git a/arch/arm/mach-mxs/devices/amba-duart.c b/arch/arm/mach-mxs/devices/amba-duart.c
index a559db09b49c..a5479f766046 100644
--- a/arch/arm/mach-mxs/devices/amba-duart.c
+++ b/arch/arm/mach-mxs/devices/amba-duart.c
@@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = {		\
                 .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1,   \
                 .flags = IORESOURCE_MEM,                        \
         },                                                      \
-        .irq = {soc ## _INT_DUART, NO_IRQ},                     \
+        .irq = {soc ## _INT_DUART},                             \
 }
 
 #ifdef CONFIG_SOC_IMX23
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h
deleted file mode 100644
index e7ad1bb29423..000000000000
--- a/arch/arm/mach-mxs/include/mach/system.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *  Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MACH_MXS_SYSTEM_H__
-#define __MACH_MXS_SYSTEM_H__
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif /* __MACH_MXS_SYSTEM_H__ */
diff --git a/arch/arm/mach-mxs/pm.c b/arch/arm/mach-mxs/pm.c
index fb042da29bda..a9b4bbcdafb4 100644
--- a/arch/arm/mach-mxs/pm.c
+++ b/arch/arm/mach-mxs/pm.c
@@ -15,13 +15,12 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/io.h>
-#include <mach/system.h>
 
 static int mxs_suspend_enter(suspend_state_t state)
 {
         switch (state) {
         case PM_SUSPEND_MEM:
-                arch_idle();
+                cpu_do_idle();
                 break;
 
         default:
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c
index b9913234bbf6..2cdf6ef69bee 100644
--- a/arch/arm/mach-netx/fb.c
+++ b/arch/arm/mach-netx/fb.c
@@ -92,18 +92,7 @@ void clk_put(struct clk *clk)
 {
 }
 
-static struct amba_device fb_device = {
-        .dev            = {
-                .init_name = "fb",
-                .coherent_dma_mask = ~0,
-        },
-        .res            = {
-                .start  = 0x00104000,
-                .end    = 0x00104fff,
-                .flags  = IORESOURCE_MEM,
-        },
-        .irq            = { NETX_IRQ_LCD, NO_IRQ },
-};
+static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL);
 
 int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel)
 {
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h
deleted file mode 100644
index b38fa36d58c4..000000000000
--- a/arch/arm/mach-netx/include/mach/system.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-netx/include/mach/system.h
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
-
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 7c878bf00340..f6f74adbe8c4 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void)
 #endif
 }
 
-#define __MEM_4K_RESOURCE(x) \
-        .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
+static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE,
+        { IRQ_UART0 }, NULL);
 
-static struct amba_device uart0_device = {
-        .dev = { .init_name = "uart0" },
-        __MEM_4K_RESOURCE(NOMADIK_UART0_BASE),
-        .irq = {IRQ_UART0, NO_IRQ},
-};
-
-static struct amba_device uart1_device = {
-        .dev = { .init_name = "uart1" },
-        __MEM_4K_RESOURCE(NOMADIK_UART1_BASE),
-        .irq = {IRQ_UART1, NO_IRQ},
-};
+static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE,
+        { IRQ_UART1 }, NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &uart0_device,
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 65df7b4fdd3e..27f43a46985e 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = {
         GPIO_DEVICE(3),
 };
 
-static struct amba_device cpu8815_amba_rng = {
-        .dev = {
-                .init_name = "rng",
-        },
-        __MEM_4K_RESOURCE(NOMADIK_RNG_BASE),
-};
+static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL);
 
 static struct platform_device *platform_devs[] __initdata = {
         cpu8815_platform_gpio + 0,
@@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = {
 };
 
 static struct amba_device *amba_devs[] __initdata = {
-        &cpu8815_amba_rng
+        &cpu8815_amba_rng_device
 };
 
 static int __init cpu8815_init(void)
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h
deleted file mode 100644
index 25e198b8976c..000000000000
--- a/arch/arm/mach-nomadik/include/mach/system.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- *  mach-nomadik/include/mach/system.h
- *
- *  Copyright (C) 2008 STMicroelectronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h
deleted file mode 100644
index a6c1b3a16dfc..000000000000
--- a/arch/arm/mach-omap1/include/mach/system.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-omap1/include/mach/system.h
- */
-
-#include <plat/system.h>
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 89ea20ca0ccc..0c2c3669d594 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -42,9 +42,9 @@
 #include <linux/sysfs.h>
 #include <linux/module.h>
 #include <linux/io.h>
+#include <linux/atomic.h>
 
 #include <asm/irq.h>
-#include <linux/atomic.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 
@@ -108,13 +108,7 @@ void omap1_pm_idle(void)
         __u32 use_idlect1 = arm_idlect1_mask;
         int do_sleep = 0;
 
-        local_irq_disable();
         local_fiq_disable();
-        if (need_resched()) {
-                local_fiq_enable();
-                local_irq_enable();
-                return;
-        }
 
 #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER)
 #warning Enable 32kHz OS timer in order to allow sleep states in idle
@@ -157,14 +151,12 @@ void omap1_pm_idle(void)
                 omap_writel(saved_idlect1, ARM_IDLECT1);
 
                 local_fiq_enable();
-                local_irq_enable();
                 return;
         }
         omap_sram_suspend(omap_readl(ARM_IDLECT1),
                           omap_readl(ARM_IDLECT2));
 
         local_fiq_enable();
-        local_irq_enable();
 }
 
 /*
@@ -583,8 +575,6 @@ static void omap_pm_init_proc(void)
 
 #endif /* DEBUG && CONFIG_PROC_FS */
 
-static void (*saved_idle)(void) = NULL;
-
 /*
  *      omap_pm_prepare - Do preliminary suspend work.
  *
@@ -592,8 +582,7 @@ static void (*saved_idle)(void) = NULL;
 static int omap_pm_prepare(void)
 {
         /* We cannot sleep in idle until we have resumed */
-        saved_idle = pm_idle;
-        pm_idle = NULL;
+        disable_hlt();
 
         return 0;
 }
@@ -630,7 +619,7 @@ static int omap_pm_enter(suspend_state_t state)
 
 static void omap_pm_finish(void)
 {
-        pm_idle = saved_idle;
+        enable_hlt();
 }
 
 
@@ -687,7 +676,7 @@ static int __init omap_pm_init(void)
                 return -ENODEV;
         }
 
-        pm_idle = omap1_pm_idle;
+        arm_pm_idle = omap1_pm_idle;
 
         if (cpu_is_omap7xx())
                 setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq);
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
index 9c442e290ccb..ce91aad4cdad 100644
--- a/arch/arm/mach-omap2/emu.c
+++ b/arch/arm/mach-omap2/emu.c
@@ -30,29 +30,8 @@ MODULE_AUTHOR("Alexander Shishkin");
 #define ETB_BASE        (L4_EMU_34XX_PHYS + 0x1b000)
 #define DAPCTL          (L4_EMU_34XX_PHYS + 0x1d000)
 
-static struct amba_device omap3_etb_device = {
-        .dev            = {
-                .init_name = "etb",
-        },
-        .res            = {
-                .start  = ETB_BASE,
-                .end    = ETB_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .periphid       = 0x000bb907,
-};
-
-static struct amba_device omap3_etm_device = {
-        .dev            = {
-                .init_name = "etm",
-        },
-        .res            = {
-                .start  = ETM_BASE,
-                .end    = ETM_BASE + SZ_4K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        .periphid       = 0x102bb921,
-};
+static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL);
+static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL);
 
 static int __init emu_init(void)
 {
@@ -66,4 +45,3 @@ static int __init emu_init(void)
 }
 
 subsys_initcall(emu_init);
-
diff --git a/arch/arm/mach-omap2/include/mach/system.h b/arch/arm/mach-omap2/include/mach/system.h
deleted file mode 100644
index d488721ab90b..000000000000
--- a/arch/arm/mach-omap2/include/mach/system.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-omap2/include/mach/system.h
- */
-
-#include <plat/system.h>
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 23de98d03841..a4eb5c280435 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -226,7 +226,6 @@ static int omap2_can_sleep(void)
 
 static void omap2_pm_idle(void)
 {
-        local_irq_disable();
         local_fiq_disable();
 
         if (!omap2_can_sleep()) {
@@ -243,7 +242,6 @@ static void omap2_pm_idle(void)
 
 out:
         local_fiq_enable();
-        local_irq_enable();
 }
 
 #ifdef CONFIG_SUSPEND
@@ -462,7 +460,7 @@ static int __init omap2_pm_init(void)
         }
 
         suspend_set_ops(&omap_pm_ops);
-        pm_idle = omap2_pm_idle;
+        arm_pm_idle = omap2_pm_idle;
 
         return 0;
 }
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fc6987578920..b77df735fa6c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -418,10 +418,9 @@ void omap_sram_idle(void)
 
 static void omap3_pm_idle(void)
 {
-        local_irq_disable();
         local_fiq_disable();
 
-        if (omap_irq_pending() || need_resched())
+        if (omap_irq_pending())
                 goto out;
 
         trace_power_start(POWER_CSTATE, 1, smp_processor_id());
@@ -434,7 +433,6 @@ static void omap3_pm_idle(void)
 
 out:
         local_fiq_enable();
-        local_irq_enable();
 }
 
 #ifdef CONFIG_SUSPEND
@@ -848,7 +846,7 @@ static int __init omap3_pm_init(void)
         suspend_set_ops(&omap_pm_ops);
 #endif /* CONFIG_SUSPEND */
 
-        pm_idle = omap3_pm_idle;
+        arm_pm_idle = omap3_pm_idle;
         omap3_idle_init();
 
         /*
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index c264ef7219c1..c840689df24a 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -173,18 +173,16 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
  * omap_default_idle - OMAP4 default ilde routine.'
  *
  * Implements OMAP4 memory, IO ordering requirements which can't be addressed
- * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
+ * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
  * by secondary CPU with CONFIG_CPUIDLE.
  */
 static void omap_default_idle(void)
 {
-        local_irq_disable();
         local_fiq_disable();
 
         omap_do_wfi();
 
         local_fiq_enable();
-        local_irq_enable();
 }
 
 /**
@@ -255,8 +253,8 @@ static int __init omap4_pm_init(void)
         suspend_set_ops(&omap_pm_ops);
 #endif /* CONFIG_SUSPEND */
 
-        /* Overwrite the default arch_idle() */
-        pm_idle = omap_default_idle;
+        /* Overwrite the default cpu_do_idle() */
+        arm_pm_idle = omap_default_idle;
 
         omap4_idle_init();
 
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 860118ab43e2..873b51d494ea 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -24,7 +24,6 @@
 #include <linux/interrupt.h>
 #include <linux/slab.h>
 
-#include <mach/system.h>
 #include <plat/common.h>
 #include <plat/prcm.h>
 #include <plat/irqs.h>
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h
deleted file mode 100644
index 825a2650cefa..000000000000
--- a/arch/arm/mach-orion5x/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/system.h
- *
- * Tzachi Perelstein <tzachi@marvell.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h
deleted file mode 100644
index 1a5d8cb57df4..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/system.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching and wait for interrupt
-         * tricks.
-         */
-        cpu_do_idle();
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h
deleted file mode 100644
index 60cfe7188091..000000000000
--- a/arch/arm/mach-pnx4008/include/mach/system.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * arch/arm/mach-pnx4008/include/mach/system.h
- *
- * Copyright (C) 2003 Philips Semiconductors
- * Copyright (C) 2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h
deleted file mode 100644
index 2c7d2a9d0c92..000000000000
--- a/arch/arm/mach-prima2/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-prima2/include/mach/system.h
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef __MACH_SYSTEM_H__
-#define __MACH_SYSTEM_H__
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h
deleted file mode 100644
index c5afacd3cc0b..000000000000
--- a/arch/arm/mach-pxa/include/mach/system.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * arch/arm/mach-pxa/include/mach/system.h
- *
- * Author:      Nicolas Pitre
- * Created:     Jun 15, 2001
- * Copyright:   MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 735b57aaf2d6..f8f2c0ac4c01 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -28,21 +28,11 @@
 #include <asm/setup.h>
 #include <asm/leds.h>
 
-#define AMBA_DEVICE(name,busid,base,plat)                       \
-static struct amba_device name##_device = {                     \
-        .dev            = {                                     \
-                .coherent_dma_mask = ~0,                        \
-                .init_name = busid,                             \
-                .platform_data = plat,                          \
-        },                                                      \
-        .res            = {                                     \
-                .start  = REALVIEW_##base##_BASE,               \
-                .end    = (REALVIEW_##base##_BASE) + SZ_4K - 1, \
-                .flags  = IORESOURCE_MEM,                       \
-        },                                                      \
-        .dma_mask       = ~0,                                   \
-        .irq            = base##_IRQ,                           \
-}
+#define APB_DEVICE(name, busid, base, plat)                     \
+static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
+
+#define AHB_DEVICE(name, busid, base, plat)                     \
+static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
 
 struct machine_desc;
 
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
index 5c3c625e3e04..708f84156f2c 100644
--- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
@@ -40,6 +40,7 @@
 #define IRQ_DC1176_L2CC         (IRQ_DC1176_GIC_START + 13)
 #define IRQ_DC1176_RTC          (IRQ_DC1176_GIC_START + 14)
 #define IRQ_DC1176_CLCD         (IRQ_DC1176_GIC_START + 15)     /* CLCD controller */
+#define IRQ_DC1176_GPIO0        (IRQ_DC1176_GIC_START + 16)
 #define IRQ_DC1176_SSP          (IRQ_DC1176_GIC_START + 17)     /* SSP port */
 #define IRQ_DC1176_UART0        (IRQ_DC1176_GIC_START + 18)     /* UART 0 on development chip */
 #define IRQ_DC1176_UART1        (IRQ_DC1176_GIC_START + 19)     /* UART 1 on development chip */
@@ -73,7 +74,6 @@
 #define IRQ_PB1176_DMAC         (IRQ_PB1176_GIC_START + 24)     /* DMA controller */
 #define IRQ_PB1176_RTC          (IRQ_PB1176_GIC_START + 25)     /* Real Time Clock */
 
-#define IRQ_PB1176_GPIO0        -1
 #define IRQ_PB1176_SCTL         -1
 
 #define NR_GIC_PB1176           2
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
deleted file mode 100644
index 471b671159ce..000000000000
--- a/arch/arm/mach-realview/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-realview/include/mach/system.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 9578145f2df0..157e1bc6e83c 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = {
 /*
  * These devices are connected via the core APB bridge
  */
-#define GPIO2_IRQ       { IRQ_EB_GPIO2, NO_IRQ }
-#define GPIO3_IRQ       { IRQ_EB_GPIO3, NO_IRQ }
+#define GPIO2_IRQ       { IRQ_EB_GPIO2 }
+#define GPIO3_IRQ       { IRQ_EB_GPIO3 }
 
-#define AACI_IRQ        { IRQ_EB_AACI, NO_IRQ }
+#define AACI_IRQ        { IRQ_EB_AACI }
 #define MMCI0_IRQ       { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
-#define KMI0_IRQ        { IRQ_EB_KMI0, NO_IRQ }
-#define KMI1_IRQ        { IRQ_EB_KMI1, NO_IRQ }
+#define KMI0_IRQ        { IRQ_EB_KMI0 }
+#define KMI1_IRQ        { IRQ_EB_KMI1 }
 
 /*
  * These devices are connected directly to the multi-layer AHB switch
  */
-#define EB_SMC_IRQ      { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ        { NO_IRQ, NO_IRQ }
-#define EB_CLCD_IRQ     { IRQ_EB_CLCD, NO_IRQ }
-#define DMAC_IRQ        { IRQ_EB_DMA, NO_IRQ }
+#define EB_SMC_IRQ      { }
+#define MPMC_IRQ        { }
+#define EB_CLCD_IRQ     { IRQ_EB_CLCD }
+#define DMAC_IRQ        { IRQ_EB_DMA }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define SCTL_IRQ        { NO_IRQ, NO_IRQ }
-#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
-#define EB_GPIO0_IRQ    { IRQ_EB_GPIO0, NO_IRQ }
-#define GPIO1_IRQ       { IRQ_EB_GPIO1, NO_IRQ }
-#define EB_RTC_IRQ      { IRQ_EB_RTC, NO_IRQ }
+#define SCTL_IRQ        { }
+#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
+#define EB_GPIO0_IRQ    { IRQ_EB_GPIO0 }
+#define GPIO1_IRQ       { IRQ_EB_GPIO1 }
+#define EB_RTC_IRQ      { IRQ_EB_RTC }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
-#define SCI_IRQ         { IRQ_EB_SCI, NO_IRQ }
-#define EB_UART0_IRQ    { IRQ_EB_UART0, NO_IRQ }
-#define EB_UART1_IRQ    { IRQ_EB_UART1, NO_IRQ }
-#define EB_UART2_IRQ    { IRQ_EB_UART2, NO_IRQ }
-#define EB_UART3_IRQ    { IRQ_EB_UART3, NO_IRQ }
-#define EB_SSP_IRQ      { IRQ_EB_SSP, NO_IRQ }
+#define SCI_IRQ         { IRQ_EB_SCI }
+#define EB_UART0_IRQ    { IRQ_EB_UART0 }
+#define EB_UART1_IRQ    { IRQ_EB_UART1 }
+#define EB_UART2_IRQ    { IRQ_EB_UART2 }
+#define EB_UART3_IRQ    { IRQ_EB_UART3 }
+#define EB_SSP_IRQ      { IRQ_EB_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
-AMBA_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
-AMBA_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
-AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
+APB_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
+APB_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
+APB_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
+APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
-AMBA_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
-AMBA_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
-AMBA_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
-AMBA_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
-AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
-AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
-AMBA_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
-AMBA_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
-AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
-AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
-AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
-AMBA_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   &ssp0_plat_data);
+AHB_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
+AHB_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
+AHB_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
+AHB_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
+APB_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
+APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
+APB_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
+APB_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
+APB_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
+APB_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
+APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
+APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
+APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
+APB_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   &ssp0_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index e4abe94fb11a..b1d7cafa1a6d 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = {
 /*
  * RealView PB1176 AMBA devices
  */
-#define GPIO2_IRQ       { IRQ_PB1176_GPIO2, NO_IRQ }
-#define GPIO3_IRQ       { IRQ_PB1176_GPIO3, NO_IRQ }
-#define AACI_IRQ        { IRQ_PB1176_AACI, NO_IRQ }
+#define GPIO2_IRQ       { IRQ_PB1176_GPIO2 }
+#define GPIO3_IRQ       { IRQ_PB1176_GPIO3 }
+#define AACI_IRQ        { IRQ_PB1176_AACI }
 #define MMCI0_IRQ       { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
-#define KMI0_IRQ        { IRQ_PB1176_KMI0, NO_IRQ }
-#define KMI1_IRQ        { IRQ_PB1176_KMI1, NO_IRQ }
-#define PB1176_SMC_IRQ  { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ        { NO_IRQ, NO_IRQ }
-#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
-#define SCTL_IRQ        { NO_IRQ, NO_IRQ }
-#define PB1176_WATCHDOG_IRQ     { IRQ_DC1176_WATCHDOG, NO_IRQ }
-#define PB1176_GPIO0_IRQ        { IRQ_PB1176_GPIO0, NO_IRQ }
-#define GPIO1_IRQ       { IRQ_PB1176_GPIO1, NO_IRQ }
-#define PB1176_RTC_IRQ  { IRQ_DC1176_RTC, NO_IRQ }
-#define SCI_IRQ         { IRQ_PB1176_SCI, NO_IRQ }
-#define PB1176_UART0_IRQ        { IRQ_DC1176_UART0, NO_IRQ }
-#define PB1176_UART1_IRQ        { IRQ_DC1176_UART1, NO_IRQ }
-#define PB1176_UART2_IRQ        { IRQ_DC1176_UART2, NO_IRQ }
-#define PB1176_UART3_IRQ        { IRQ_DC1176_UART3, NO_IRQ }
-#define PB1176_UART4_IRQ        { IRQ_PB1176_UART4, NO_IRQ }
-#define PB1176_SSP_IRQ          { IRQ_DC1176_SSP, NO_IRQ }
+#define KMI0_IRQ        { IRQ_PB1176_KMI0 }
+#define KMI1_IRQ        { IRQ_PB1176_KMI1 }
+#define PB1176_SMC_IRQ  { }
+#define MPMC_IRQ        { }
+#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
+#define SCTL_IRQ        { }
+#define PB1176_WATCHDOG_IRQ     { IRQ_DC1176_WATCHDOG }
+#define PB1176_GPIO0_IRQ        { IRQ_DC1176_GPIO0 }
+#define GPIO1_IRQ       { IRQ_PB1176_GPIO1 }
+#define PB1176_RTC_IRQ  { IRQ_DC1176_RTC }
+#define SCI_IRQ         { IRQ_PB1176_SCI }
+#define PB1176_UART0_IRQ        { IRQ_DC1176_UART0 }
+#define PB1176_UART1_IRQ        { IRQ_DC1176_UART1 }
+#define PB1176_UART2_IRQ        { IRQ_DC1176_UART2 }
+#define PB1176_UART3_IRQ        { IRQ_DC1176_UART3 }
+#define PB1176_UART4_IRQ        { IRQ_PB1176_UART4 }
+#define PB1176_SSP_IRQ          { IRQ_DC1176_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart4,      "fpga:uart4",   PB1176_UART4,   NULL);
+APB_DEVICE(aaci,        "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,        "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,        "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,        "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart4,       "fpga:uart4",   PB1176_UART4,   NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:smc",      PB1176_SMC,     NULL);
-AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:wdog",     PB1176_WATCHDOG,        NULL);
-AMBA_DEVICE(gpio0,      "dev:gpio0",    PB1176_GPIO0,   &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:rtc",      PB1176_RTC,     NULL);
-AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:uart0",    PB1176_UART0,   NULL);
-AMBA_DEVICE(uart1,      "dev:uart1",    PB1176_UART1,   NULL);
-AMBA_DEVICE(uart2,      "dev:uart2",    PB1176_UART2,   NULL);
-AMBA_DEVICE(uart3,      "dev:uart3",    PB1176_UART3,   NULL);
-AMBA_DEVICE(ssp0,       "dev:ssp0",     PB1176_SSP,     &ssp0_plat_data);
-AMBA_DEVICE(clcd,       "dev:clcd",     PB1176_CLCD,    &clcd_plat_data);
+AHB_DEVICE(smc,         "dev:smc",      PB1176_SMC,     NULL);
+AHB_DEVICE(sctl,        "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,        "dev:wdog",     PB1176_WATCHDOG,        NULL);
+APB_DEVICE(gpio0,       "dev:gpio0",    PB1176_GPIO0,   &gpio0_plat_data);
+APB_DEVICE(gpio1,       "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,       "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,         "dev:rtc",      PB1176_RTC,     NULL);
+APB_DEVICE(sci0,        "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,       "dev:uart0",    PB1176_UART0,   NULL);
+APB_DEVICE(uart1,       "dev:uart1",    PB1176_UART1,   NULL);
+APB_DEVICE(uart2,       "dev:uart2",    PB1176_UART2,   NULL);
+APB_DEVICE(uart3,       "dev:uart3",    PB1176_UART3,   NULL);
+APB_DEVICE(ssp0,        "dev:ssp0",     PB1176_SSP,     &ssp0_plat_data);
+AHB_DEVICE(clcd,        "dev:clcd",     PB1176_CLCD,    &clcd_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
         &uart0_device,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 2147335f66f5..ae7fe54f6eb6 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PB11MPCore AMBA devices
  */
 
-#define GPIO2_IRQ               { IRQ_PB11MP_GPIO2, NO_IRQ }
-#define GPIO3_IRQ               { IRQ_PB11MP_GPIO3, NO_IRQ }
-#define AACI_IRQ                { IRQ_TC11MP_AACI, NO_IRQ }
+#define GPIO2_IRQ               { IRQ_PB11MP_GPIO2 }
+#define GPIO3_IRQ               { IRQ_PB11MP_GPIO3 }
+#define AACI_IRQ                { IRQ_TC11MP_AACI }
 #define MMCI0_IRQ               { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
-#define KMI0_IRQ                { IRQ_TC11MP_KMI0, NO_IRQ }
-#define KMI1_IRQ                { IRQ_TC11MP_KMI1, NO_IRQ }
-#define PB11MP_SMC_IRQ          { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ                { NO_IRQ, NO_IRQ }
-#define PB11MP_CLCD_IRQ         { IRQ_PB11MP_CLCD, NO_IRQ }
-#define DMAC_IRQ                { IRQ_PB11MP_DMAC, NO_IRQ }
-#define SCTL_IRQ                { NO_IRQ, NO_IRQ }
-#define PB11MP_WATCHDOG_IRQ     { IRQ_PB11MP_WATCHDOG, NO_IRQ }
-#define PB11MP_GPIO0_IRQ        { IRQ_PB11MP_GPIO0, NO_IRQ }
-#define GPIO1_IRQ               { IRQ_PB11MP_GPIO1, NO_IRQ }
-#define PB11MP_RTC_IRQ          { IRQ_TC11MP_RTC, NO_IRQ }
-#define SCI_IRQ                 { IRQ_PB11MP_SCI, NO_IRQ }
-#define PB11MP_UART0_IRQ        { IRQ_TC11MP_UART0, NO_IRQ }
-#define PB11MP_UART1_IRQ        { IRQ_TC11MP_UART1, NO_IRQ }
-#define PB11MP_UART2_IRQ        { IRQ_PB11MP_UART2, NO_IRQ }
-#define PB11MP_UART3_IRQ        { IRQ_PB11MP_UART3, NO_IRQ }
-#define PB11MP_SSP_IRQ          { IRQ_PB11MP_SSP, NO_IRQ }
+#define KMI0_IRQ                { IRQ_TC11MP_KMI0 }
+#define KMI1_IRQ                { IRQ_TC11MP_KMI1 }
+#define PB11MP_SMC_IRQ          { }
+#define MPMC_IRQ                { }
+#define PB11MP_CLCD_IRQ         { IRQ_PB11MP_CLCD }
+#define DMAC_IRQ                { IRQ_PB11MP_DMAC }
+#define SCTL_IRQ                { }
+#define PB11MP_WATCHDOG_IRQ     { IRQ_PB11MP_WATCHDOG }
+#define PB11MP_GPIO0_IRQ        { IRQ_PB11MP_GPIO0 }
+#define GPIO1_IRQ               { IRQ_PB11MP_GPIO1 }
+#define PB11MP_RTC_IRQ          { IRQ_TC11MP_RTC }
+#define SCI_IRQ                 { IRQ_PB11MP_SCI }
+#define PB11MP_UART0_IRQ        { IRQ_TC11MP_UART0 }
+#define PB11MP_UART1_IRQ        { IRQ_TC11MP_UART1 }
+#define PB11MP_UART2_IRQ        { IRQ_PB11MP_UART2 }
+#define PB11MP_UART3_IRQ        { IRQ_PB11MP_UART3 }
+#define PB11MP_SSP_IRQ          { IRQ_PB11MP_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart3,      "fpga:uart3",   PB11MP_UART3,   NULL);
+APB_DEVICE(aaci,        "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,        "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,        "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,        "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart3,       "fpga:uart3",   PB11MP_UART3,   NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:smc",      PB11MP_SMC,     NULL);
-AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:wdog",     PB11MP_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0,      "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:rtc",      PB11MP_RTC,     NULL);
-AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:uart0",    PB11MP_UART0,   NULL);
-AMBA_DEVICE(uart1,      "dev:uart1",    PB11MP_UART1,   NULL);
-AMBA_DEVICE(uart2,      "dev:uart2",    PB11MP_UART2,   NULL);
-AMBA_DEVICE(ssp0,       "dev:ssp0",     PB11MP_SSP,     &ssp0_plat_data);
+AHB_DEVICE(smc,         "dev:smc",      PB11MP_SMC,     NULL);
+AHB_DEVICE(sctl,        "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,        "dev:wdog",     PB11MP_WATCHDOG, NULL);
+APB_DEVICE(gpio0,       "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
+APB_DEVICE(gpio1,       "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,       "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,         "dev:rtc",      PB11MP_RTC,     NULL);
+APB_DEVICE(sci0,        "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,       "dev:uart0",    PB11MP_UART0,   NULL);
+APB_DEVICE(uart1,       "dev:uart1",    PB11MP_UART1,   NULL);
+APB_DEVICE(uart2,       "dev:uart2",    PB11MP_UART2,   NULL);
+APB_DEVICE(ssp0,        "dev:ssp0",     PB11MP_SSP,     &ssp0_plat_data);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,       "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
-AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
+AHB_DEVICE(clcd,        "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
+AHB_DEVICE(dmac,        "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 25b2e59296f8..59650174e6ed 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PBA8Core AMBA devices
  */
 
-#define GPIO2_IRQ               { IRQ_PBA8_GPIO2, NO_IRQ }
-#define GPIO3_IRQ               { IRQ_PBA8_GPIO3, NO_IRQ }
-#define AACI_IRQ                { IRQ_PBA8_AACI, NO_IRQ }
+#define GPIO2_IRQ               { IRQ_PBA8_GPIO2 }
+#define GPIO3_IRQ               { IRQ_PBA8_GPIO3 }
+#define AACI_IRQ                { IRQ_PBA8_AACI }
 #define MMCI0_IRQ               { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
-#define KMI0_IRQ                { IRQ_PBA8_KMI0, NO_IRQ }
-#define KMI1_IRQ                { IRQ_PBA8_KMI1, NO_IRQ }
-#define PBA8_SMC_IRQ            { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ                { NO_IRQ, NO_IRQ }
-#define PBA8_CLCD_IRQ           { IRQ_PBA8_CLCD, NO_IRQ }
-#define DMAC_IRQ                { IRQ_PBA8_DMAC, NO_IRQ }
-#define SCTL_IRQ                { NO_IRQ, NO_IRQ }
-#define PBA8_WATCHDOG_IRQ       { IRQ_PBA8_WATCHDOG, NO_IRQ }
-#define PBA8_GPIO0_IRQ          { IRQ_PBA8_GPIO0, NO_IRQ }
-#define GPIO1_IRQ               { IRQ_PBA8_GPIO1, NO_IRQ }
-#define PBA8_RTC_IRQ            { IRQ_PBA8_RTC, NO_IRQ }
-#define SCI_IRQ                 { IRQ_PBA8_SCI, NO_IRQ }
-#define PBA8_UART0_IRQ          { IRQ_PBA8_UART0, NO_IRQ }
-#define PBA8_UART1_IRQ          { IRQ_PBA8_UART1, NO_IRQ }
-#define PBA8_UART2_IRQ          { IRQ_PBA8_UART2, NO_IRQ }
-#define PBA8_UART3_IRQ          { IRQ_PBA8_UART3, NO_IRQ }
-#define PBA8_SSP_IRQ            { IRQ_PBA8_SSP, NO_IRQ }
+#define KMI0_IRQ                { IRQ_PBA8_KMI0 }
+#define KMI1_IRQ                { IRQ_PBA8_KMI1 }
+#define PBA8_SMC_IRQ            { }
+#define MPMC_IRQ                { }
+#define PBA8_CLCD_IRQ           { IRQ_PBA8_CLCD }
+#define DMAC_IRQ                { IRQ_PBA8_DMAC }
+#define SCTL_IRQ                { }
+#define PBA8_WATCHDOG_IRQ       { IRQ_PBA8_WATCHDOG }
+#define PBA8_GPIO0_IRQ          { IRQ_PBA8_GPIO0 }
+#define GPIO1_IRQ               { IRQ_PBA8_GPIO1 }
+#define PBA8_RTC_IRQ            { IRQ_PBA8_RTC }
+#define SCI_IRQ                 { IRQ_PBA8_SCI }
+#define PBA8_UART0_IRQ          { IRQ_PBA8_UART0 }
+#define PBA8_UART1_IRQ          { IRQ_PBA8_UART1 }
+#define PBA8_UART2_IRQ          { IRQ_PBA8_UART2 }
+#define PBA8_UART3_IRQ          { IRQ_PBA8_UART3 }
+#define PBA8_SSP_IRQ            { IRQ_PBA8_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart3,      "fpga:uart3",   PBA8_UART3,     NULL);
+APB_DEVICE(aaci,        "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,        "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,        "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,        "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart3,       "fpga:uart3",   PBA8_UART3,     NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:smc",      PBA8_SMC,       NULL);
-AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:wdog",     PBA8_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0,      "dev:gpio0",    PBA8_GPIO0,     &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:rtc",      PBA8_RTC,       NULL);
-AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:uart0",    PBA8_UART0,     NULL);
-AMBA_DEVICE(uart1,      "dev:uart1",    PBA8_UART1,     NULL);
-AMBA_DEVICE(uart2,      "dev:uart2",    PBA8_UART2,     NULL);
-AMBA_DEVICE(ssp0,       "dev:ssp0",     PBA8_SSP,       &ssp0_plat_data);
+AHB_DEVICE(smc,         "dev:smc",      PBA8_SMC,       NULL);
+AHB_DEVICE(sctl,        "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,        "dev:wdog",     PBA8_WATCHDOG, NULL);
+APB_DEVICE(gpio0,       "dev:gpio0",    PBA8_GPIO0,     &gpio0_plat_data);
+APB_DEVICE(gpio1,       "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,       "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,         "dev:rtc",      PBA8_RTC,       NULL);
+APB_DEVICE(sci0,        "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,       "dev:uart0",    PBA8_UART0,     NULL);
+APB_DEVICE(uart1,       "dev:uart1",    PBA8_UART1,     NULL);
+APB_DEVICE(uart2,       "dev:uart2",    PBA8_UART2,     NULL);
+APB_DEVICE(ssp0,        "dev:ssp0",     PBA8_SSP,       &ssp0_plat_data);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,       "issp:clcd",    PBA8_CLCD,      &clcd_plat_data);
-AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
+AHB_DEVICE(clcd,        "issp:clcd",    PBA8_CLCD,      &clcd_plat_data);
+AHB_DEVICE(dmac,        "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index ac715645b860..1cd9956f5875 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PBXCore AMBA devices
  */
 
-#define GPIO2_IRQ               { IRQ_PBX_GPIO2, NO_IRQ }
-#define GPIO3_IRQ               { IRQ_PBX_GPIO3, NO_IRQ }
-#define AACI_IRQ                { IRQ_PBX_AACI, NO_IRQ }
+#define GPIO2_IRQ               { IRQ_PBX_GPIO2 }
+#define GPIO3_IRQ               { IRQ_PBX_GPIO3 }
+#define AACI_IRQ                { IRQ_PBX_AACI }
 #define MMCI0_IRQ               { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
-#define KMI0_IRQ                { IRQ_PBX_KMI0, NO_IRQ }
-#define KMI1_IRQ                { IRQ_PBX_KMI1, NO_IRQ }
-#define PBX_SMC_IRQ             { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ                { NO_IRQ, NO_IRQ }
-#define PBX_CLCD_IRQ            { IRQ_PBX_CLCD, NO_IRQ }
-#define DMAC_IRQ                { IRQ_PBX_DMAC, NO_IRQ }
-#define SCTL_IRQ                { NO_IRQ, NO_IRQ }
-#define PBX_WATCHDOG_IRQ        { IRQ_PBX_WATCHDOG, NO_IRQ }
-#define PBX_GPIO0_IRQ           { IRQ_PBX_GPIO0, NO_IRQ }
-#define GPIO1_IRQ               { IRQ_PBX_GPIO1, NO_IRQ }
-#define PBX_RTC_IRQ             { IRQ_PBX_RTC, NO_IRQ }
-#define SCI_IRQ                 { IRQ_PBX_SCI, NO_IRQ }
-#define PBX_UART0_IRQ           { IRQ_PBX_UART0, NO_IRQ }
-#define PBX_UART1_IRQ           { IRQ_PBX_UART1, NO_IRQ }
-#define PBX_UART2_IRQ           { IRQ_PBX_UART2, NO_IRQ }
-#define PBX_UART3_IRQ           { IRQ_PBX_UART3, NO_IRQ }
-#define PBX_SSP_IRQ             { IRQ_PBX_SSP, NO_IRQ }
+#define KMI0_IRQ                { IRQ_PBX_KMI0 }
+#define KMI1_IRQ                { IRQ_PBX_KMI1 }
+#define PBX_SMC_IRQ             { }
+#define MPMC_IRQ                { }
+#define PBX_CLCD_IRQ            { IRQ_PBX_CLCD }
+#define DMAC_IRQ                { IRQ_PBX_DMAC }
+#define SCTL_IRQ                { }
+#define PBX_WATCHDOG_IRQ        { IRQ_PBX_WATCHDOG }
+#define PBX_GPIO0_IRQ           { IRQ_PBX_GPIO0 }
+#define GPIO1_IRQ               { IRQ_PBX_GPIO1 }
+#define PBX_RTC_IRQ             { IRQ_PBX_RTC }
+#define SCI_IRQ                 { IRQ_PBX_SCI }
+#define PBX_UART0_IRQ           { IRQ_PBX_UART0 }
+#define PBX_UART1_IRQ           { IRQ_PBX_UART1 }
+#define PBX_UART2_IRQ           { IRQ_PBX_UART2 }
+#define PBX_UART3_IRQ           { IRQ_PBX_UART3 }
+#define PBX_SSP_IRQ             { IRQ_PBX_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart3,      "fpga:uart3",   PBX_UART3,      NULL);
+APB_DEVICE(aaci,        "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,        "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,        "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,        "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart3,       "fpga:uart3",   PBX_UART3,      NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:smc",      PBX_SMC,        NULL);
-AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:wdog",     PBX_WATCHDOG,   NULL);
-AMBA_DEVICE(gpio0,      "dev:gpio0",    PBX_GPIO0,      &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:rtc",      PBX_RTC,        NULL);
-AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:uart0",    PBX_UART0,      NULL);
-AMBA_DEVICE(uart1,      "dev:uart1",    PBX_UART1,      NULL);
-AMBA_DEVICE(uart2,      "dev:uart2",    PBX_UART2,      NULL);
-AMBA_DEVICE(ssp0,       "dev:ssp0",     PBX_SSP,        &ssp0_plat_data);
+AHB_DEVICE(smc, "dev:smc",      PBX_SMC,        NULL);
+AHB_DEVICE(sctl,        "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,        "dev:wdog",     PBX_WATCHDOG,   NULL);
+APB_DEVICE(gpio0,       "dev:gpio0",    PBX_GPIO0,      &gpio0_plat_data);
+APB_DEVICE(gpio1,       "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,       "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,         "dev:rtc",      PBX_RTC,        NULL);
+APB_DEVICE(sci0,        "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,       "dev:uart0",    PBX_UART0,      NULL);
+APB_DEVICE(uart1,       "dev:uart1",    PBX_UART1,      NULL);
+APB_DEVICE(uart2,       "dev:uart2",    PBX_UART2,      NULL);
+APB_DEVICE(ssp0,        "dev:ssp0",     PBX_SSP,        &ssp0_plat_data);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,       "issp:clcd",    PBX_CLCD,       &clcd_plat_data);
-AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
+AHB_DEVICE(clcd,        "issp:clcd",    PBX_CLCD,       &clcd_plat_data);
+AHB_DEVICE(dmac,        "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h
deleted file mode 100644
index 359bab94b6af..000000000000
--- a/arch/arm/mach-rpc/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- *  arch/arm/mach-rpc/include/mach/system.h
- *
- *  Copyright (C) 1996-1999 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h
deleted file mode 100644
index 5e215c1a5c8f..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/system.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/system.h
- *
- * Copyright (c) 2003 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2410 - System function defines and includes
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/io.h>
-#include <mach/hardware.h>
-
-#include <mach/map.h>
-#include <mach/idle.h>
-
-#include <mach/regs-clock.h>
-
-void (*s3c24xx_idle)(void);
-
-void s3c24xx_default_idle(void)
-{
-        unsigned long tmp;
-        int i;
-
-        /* idle the system by using the idle mode which will wait for an
-         * interrupt to happen before restarting the system.
-         */
-
-        /* Warning: going into idle state upsets jtag scanning */
-
-        __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE,
-                     S3C2410_CLKCON);
-
-        /* the samsung port seems to do a loop and then unset idle.. */
-        for (i = 0; i < 50; i++) {
-                tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */
-        }
-
-        /* this bit is not cleared on re-start... */
-
-        __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
-                     S3C2410_CLKCON);
-}
-
-static void arch_idle(void)
-{
-        if (s3c24xx_idle != NULL)
-                (s3c24xx_idle)();
-        else
-                s3c24xx_default_idle();
-}
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index aff6e85a97c6..c6eac9871093 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -32,8 +32,6 @@
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 
-#include <mach/idle.h>
-
 #include <plat/cpu-freq.h>
 
 #include <mach/regs-clock.h>
@@ -164,7 +162,7 @@ void __init s3c2412_map_io(void)
 
         /* set our idle function */
 
-        s3c24xx_idle = s3c2412_idle;
+        arm_pm_idle = s3c2412_idle;
 
         /* register our io-tables */
 
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index 5287d2808d3e..08bb0355159d 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -44,7 +44,6 @@
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 
-#include <mach/idle.h>
 #include <mach/regs-s3c2443-clock.h>
 
 #include <plat/gpio-core.h>
@@ -88,8 +87,6 @@ int __init s3c2416_init(void)
 {
         printk(KERN_INFO "S3C2416: Initializing architecture\n");
 
-        /* s3c24xx_idle = s3c2416_idle; */
-
         /* change WDT IRQ number */
         s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
         s3c_device_wdt.resource[1].end   = IRQ_S3C2443_WDT;
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
deleted file mode 100644
index 353ed4389ae7..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* linux/arch/arm/mach-s3c6400/include/mach/system.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 - system implementation
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 52b89a376447..9143f8b19962 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -146,15 +146,12 @@ static void s5p64x0_idle(void)
 {
         unsigned long val;
 
-        if (!need_resched()) {
-                val = __raw_readl(S5P64X0_PWR_CFG);
-                val &= ~(0x3 << 5);
-                val |= (0x1 << 5);
-                __raw_writel(val, S5P64X0_PWR_CFG);
+        val = __raw_readl(S5P64X0_PWR_CFG);
+        val &= ~(0x3 << 5);
+        val |= (0x1 << 5);
+        __raw_writel(val, S5P64X0_PWR_CFG);
 
-                cpu_do_idle();
-        }
-        local_irq_enable();
+        cpu_do_idle();
 }
 
 /*
@@ -286,7 +283,7 @@ int __init s5p64x0_init(void)
         printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
 
         /* set idle function */
-        pm_idle = s5p64x0_idle;
+        arm_pm_idle = s5p64x0_idle;
 
         return device_register(&s5p64x0_dev);
 }
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c
index f820c0744405..f7f68ad77910 100644
--- a/arch/arm/mach-s5p64x0/dma.c
+++ b/arch/arm/mach-s5p64x0/dma.c
@@ -108,34 +108,22 @@ struct dma_pl330_platdata s5p6450_pdma_pdata = {
         .peri_id = s5p6450_pdma_peri,
 };
 
-struct amba_device s5p64x0_device_pdma = {
-        .dev = {
-                .init_name = "dma-pl330",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-        },
-        .res = {
-                .start = S5P64X0_PA_PDMA,
-                .end = S5P64X0_PA_PDMA + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_DMA0, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, S5P64X0_PA_PDMA,
+        {IRQ_DMA0}, NULL);
 
 static int __init s5p64x0_dma_init(void)
 {
         if (soc_is_s5p6450()) {
                 dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
                 dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
-                s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
+                s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata;
         } else {
                 dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
                 dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
-                s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
+                s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata;
         }
 
-        amba_device_register(&s5p64x0_device_pdma, &iomem_resource);
+        amba_device_register(&s5p64x0_pdma_device, &iomem_resource);
 
         return 0;
 }
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
deleted file mode 100644
index cf26e0954a2f..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/system.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/system.h
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * S5P64X0 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index c9095730a7f5..ff71e2d467c6 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -129,14 +129,6 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
         }
 };
 
-static void s5pc100_idle(void)
-{
-        if (!need_resched())
-                cpu_do_idle();
-
-        local_irq_enable();
-}
-
 /*
  * s5pc100_map_io
  *
@@ -210,10 +202,6 @@ core_initcall(s5pc100_core_init);
 int __init s5pc100_init(void)
 {
         printk(KERN_INFO "S5PC100: Initializing architecture\n");
-
-        /* set idle function */
-        pm_idle = s5pc100_idle;
-
         return device_register(&s5pc100_dev);
 }
 
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c
index c841f4d313f2..96b1ab3dcd48 100644
--- a/arch/arm/mach-s5pc100/dma.c
+++ b/arch/arm/mach-s5pc100/dma.c
@@ -73,21 +73,8 @@ struct dma_pl330_platdata s5pc100_pdma0_pdata = {
         .peri_id = pdma0_peri,
 };
 
-struct amba_device s5pc100_device_pdma0 = {
-        .dev = {
-                .init_name = "dma-pl330.0",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &s5pc100_pdma0_pdata,
-        },
-        .res = {
-                .start = S5PC100_PA_PDMA0,
-                .end = S5PC100_PA_PDMA0 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA0, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pc100_pdma0,  "dma-pl330.0", 0x00041330, S5PC100_PA_PDMA0,
+        {IRQ_PDMA0}, &s5pc100_pdma0_pdata);
 
 u8 pdma1_peri[] = {
         DMACH_UART0_RX,
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pc100_pdma1_pdata = {
         .peri_id = pdma1_peri,
 };
 
-struct amba_device s5pc100_device_pdma1 = {
-        .dev = {
-                .init_name = "dma-pl330.1",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &s5pc100_pdma1_pdata,
-        },
-        .res = {
-                .start = S5PC100_PA_PDMA1,
-                .end = S5PC100_PA_PDMA1 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA1, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, S5PC100_PA_PDMA1,
+        {IRQ_PDMA1}, &s5pc100_pdma1_pdata);
 
 static int __init s5pc100_dma_init(void)
 {
         dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask);
-        amba_device_register(&s5pc100_device_pdma0, &iomem_resource);
+        amba_device_register(&s5pc100_pdma0_device, &iomem_resource);
 
         dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask);
-        amba_device_register(&s5pc100_device_pdma1, &iomem_resource);
+        amba_device_register(&s5pc100_pdma1_device, &iomem_resource);
 
         return 0;
 }
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
deleted file mode 100644
index afc96c298518..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* linux/arch/arm/mach-s5pc100/include/mach/system.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *      Byungho Min <bhmin@samsung.com>
- *
- * S5PC100 - system implementation
- *
- * Based on mach-s3c6400/include/mach/system.h
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 9c1bcdcc12c3..4c9e9027df9a 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -142,14 +142,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
         }
 };
 
-static void s5pv210_idle(void)
-{
-        if (!need_resched())
-                cpu_do_idle();
-
-        local_irq_enable();
-}
-
 void s5pv210_restart(char mode, const char *cmd)
 {
         __raw_writel(0x1, S5P_SWRESET);
@@ -247,10 +239,6 @@ core_initcall(s5pv210_core_init);
 int __init s5pv210_init(void)
 {
         printk(KERN_INFO "S5PV210: Initializing architecture\n");
-
-        /* set idle function */
-        pm_idle = s5pv210_idle;
-
         return device_register(&s5pv210_dev);
 }
 
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
index a6113e0267f2..f6885d247d14 100644
--- a/arch/arm/mach-s5pv210/dma.c
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -71,21 +71,8 @@ struct dma_pl330_platdata s5pv210_pdma0_pdata = {
         .peri_id = pdma0_peri,
 };
 
-struct amba_device s5pv210_device_pdma0 = {
-        .dev = {
-                .init_name = "dma-pl330.0",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &s5pv210_pdma0_pdata,
-        },
-        .res = {
-                .start = S5PV210_PA_PDMA0,
-                .end = S5PV210_PA_PDMA0 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA0, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, S5PV210_PA_PDMA0,
+        {IRQ_PDMA0}, &s5pv210_pdma0_pdata);
 
 u8 pdma1_peri[] = {
         DMACH_UART0_RX,
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pv210_pdma1_pdata = {
         .peri_id = pdma1_peri,
 };
 
-struct amba_device s5pv210_device_pdma1 = {
-        .dev = {
-                .init_name = "dma-pl330.1",
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &s5pv210_pdma1_pdata,
-        },
-        .res = {
-                .start = S5PV210_PA_PDMA1,
-                .end = S5PV210_PA_PDMA1 + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_PDMA1, NO_IRQ},
-        .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, S5PV210_PA_PDMA1,
+        {IRQ_PDMA1}, &s5pv210_pdma1_pdata);
 
 static int __init s5pv210_dma_init(void)
 {
         dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask);
-        amba_device_register(&s5pv210_device_pdma0, &iomem_resource);
+        amba_device_register(&s5pv210_pdma0_device, &iomem_resource);
 
         dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask);
         dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask);
-        amba_device_register(&s5pv210_device_pdma1, &iomem_resource);
+        amba_device_register(&s5pv210_pdma1_device, &iomem_resource);
 
         return 0;
 }
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
deleted file mode 100644
index bf288ced860a..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/system.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* linux/arch/arm/mach-s5pv210/include/mach/system.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5PV210 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
deleted file mode 100644
index e17b208f76d4..000000000000
--- a/arch/arm/mach-sa1100/include/mach/system.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * arch/arm/mach-sa1100/include/mach/system.h
- *
- * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index a851c254ad6c..6a2a7f2c2557 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -149,10 +149,16 @@ static struct sys_timer shark_timer = {
         .init           = shark_timer_init,
 };
 
+static void shark_init_early(void)
+{
+        disable_hlt();
+}
+
 MACHINE_START(SHARK, "Shark")
         /* Maintainer: Alexander Schulz */
         .atag_offset    = 0x3000,
         .map_io         = shark_map_io,
+        .init_early     = shark_init_early,
         .init_irq       = shark_init_irq,
         .timer          = &shark_timer,
         .dma_zone_size  = SZ_4M,
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h
deleted file mode 100644
index 1b2f2c5050a8..000000000000
--- a/arch/arm/mach-shark/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-shark/include/mach/system.h
- *
- * by Alexander Schulz
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-}
-
-#endif
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h
index 956ac18ddbf9..3bbcb3fa0775 100644
--- a/arch/arm/mach-shmobile/include/mach/system.h
+++ b/arch/arm/mach-shmobile/include/mach/system.h
@@ -1,11 +1,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
 static inline void arch_reset(char mode, const char *cmd)
 {
         soft_restart(0);
diff --git a/arch/arm/mach-spear3xx/include/mach/system.h b/arch/arm/mach-spear3xx/include/mach/system.h
deleted file mode 100644
index 92cee6335c90..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/system.h
- *
- * SPEAr3xx Machine family specific architecture functions
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-#include <plat/system.h>
-
-#endif /* __MACH_SYSTEM_H */
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index a5e46b4ade20..9da50e281e98 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -430,18 +430,8 @@ static struct pl061_platform_data gpio1_plat_data = {
         .irq_base       = SPEAR300_GPIO1_INT_BASE,
 };
 
-struct amba_device spear300_gpio1_device = {
-        .dev = {
-                .init_name = "gpio1",
-                .platform_data = &gpio1_plat_data,
-        },
-        .res = {
-                .start = SPEAR300_GPIO_BASE,
-                .end = SPEAR300_GPIO_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ},
-};
+AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE,
+        {SPEAR300_VIRQ_GPIO1}, &gpio1_plat_data);
 
 /* spear300 routines */
 void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 10af45da86a0..b1733c37f209 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -28,31 +28,12 @@ static struct pl061_platform_data gpio_plat_data = {
         .irq_base       = SPEAR3XX_GPIO_INT_BASE,
 };
 
-struct amba_device spear3xx_gpio_device = {
-        .dev = {
-                .init_name = "gpio",
-                .platform_data = &gpio_plat_data,
-        },
-        .res = {
-                .start = SPEAR3XX_ICM3_GPIO_BASE,
-                .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ},
-};
+AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE,
+        {SPEAR3XX_IRQ_BASIC_GPIO}, &gpio_plat_data);
 
 /* uart device registration */
-struct amba_device spear3xx_uart_device = {
-        .dev = {
-                .init_name = "uart",
-        },
-        .res = {
-                .start = SPEAR3XX_ICM1_UART_BASE,
-                .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {SPEAR3XX_IRQ_UART, NO_IRQ},
-};
+AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE,
+        {SPEAR3XX_IRQ_UART}, NULL);
 
 /* Do spear3xx familiy common initialization part here */
 void __init spear3xx_init(void)
diff --git a/arch/arm/mach-spear6xx/include/mach/system.h b/arch/arm/mach-spear6xx/include/mach/system.h
deleted file mode 100644
index 0b1d2be81cfb..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/system.h
- *
- * SPEAr6xx Machine family specific architecture functions
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-#include <plat/system.h>
-
-#endif  /* __MACH_SYSTEM_H */
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index e0f6628c8b2c..b997b1b10ba0 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -34,7 +34,7 @@ struct amba_device uart_device[] = {
                         .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
                         .flags = IORESOURCE_MEM,
                 },
-                .irq = {IRQ_UART_0, NO_IRQ},
+                .irq = {IRQ_UART_0},
         }, {
                 .dev = {
                         .init_name = "uart1",
@@ -44,7 +44,7 @@ struct amba_device uart_device[] = {
                         .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
                         .flags = IORESOURCE_MEM,
                 },
-                .irq = {IRQ_UART_1, NO_IRQ},
+                .irq = {IRQ_UART_1},
         }
 };
 
@@ -73,7 +73,7 @@ struct amba_device gpio_device[] = {
                         .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
                         .flags = IORESOURCE_MEM,
                 },
-                .irq = {IRQ_LOCAL_GPIO, NO_IRQ},
+                .irq = {IRQ_LOCAL_GPIO},
         }, {
                 .dev = {
                         .init_name = "gpio1",
@@ -84,7 +84,7 @@ struct amba_device gpio_device[] = {
                         .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
                         .flags = IORESOURCE_MEM,
                 },
-                .irq = {IRQ_BASIC_GPIO, NO_IRQ},
+                .irq = {IRQ_BASIC_GPIO},
         }, {
                 .dev = {
                         .init_name = "gpio2",
@@ -95,7 +95,7 @@ struct amba_device gpio_device[] = {
                         .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
                         .flags = IORESOURCE_MEM,
                 },
-                .irq = {IRQ_APPL_GPIO, NO_IRQ},
+                .irq = {IRQ_APPL_GPIO},
         }
 };
 
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index a2eb90169aed..2db20da1d585 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -27,7 +27,6 @@
 #include <asm/hardware/gic.h>
 
 #include <mach/iomap.h>
-#include <mach/system.h>
 
 #include "board.h"
 #include "clock.h"
@@ -96,6 +95,8 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
 void __init tegra20_init_early(void)
 {
+        disable_hlt();  /* idle WFI usage needs to be confirmed */
+
         tegra_init_fuse();
         tegra2_init_clocks();
         tegra_clk_init_from_table(tegra20_clk_init_table);
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h
deleted file mode 100644
index a312988bf6f8..000000000000
--- a/arch/arm/mach-tegra/include/mach/system.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/system.h
- *
- * Copyright (C) 2010 Google, Inc.
- *
- * Author:
- *      Colin Cross <ccross@google.com>
- *      Erik Gilling <konkers@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_TEGRA_SYSTEM_H
-#define __MACH_TEGRA_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-}
-
-#endif
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b4c6926a700c..b9865605da09 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -94,19 +94,9 @@ static struct amba_pl011_data uart0_plat_data = {
 #endif
 };
 
-static struct amba_device uart0_device = {
-        .dev = {
-                .coherent_dma_mask = ~0,
-                .init_name = "uart0", /* Slow device at 0x3000 offset */
-                .platform_data = &uart0_plat_data,
-        },
-        .res = {
-                .start = U300_UART0_BASE,
-                .end   = U300_UART0_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = { IRQ_U300_UART0, NO_IRQ },
-};
+/* Slow device at 0x3000 offset */
+static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE,
+        { IRQ_U300_UART0 }, &uart0_plat_data);
 
 /* The U335 have an additional UART1 on the APP CPU */
 #ifdef CONFIG_MACH_U300_BS335
@@ -118,71 +108,28 @@ static struct amba_pl011_data uart1_plat_data = {
 #endif
 };
 
-static struct amba_device uart1_device = {
-        .dev = {
-                .coherent_dma_mask = ~0,
-                .init_name = "uart1", /* Fast device at 0x7000 offset */
-                .platform_data = &uart1_plat_data,
-        },
-        .res = {
-                .start = U300_UART1_BASE,
-                .end   = U300_UART1_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = { IRQ_U300_UART1, NO_IRQ },
-};
+/* Fast device at 0x7000 offset */
+static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE,
+        { IRQ_U300_UART1 }, &uart1_plat_data);
 #endif
 
-static struct amba_device pl172_device = {
-        .dev = {
-                .init_name = "pl172", /* AHB device at 0x4000 offset */
-                .platform_data = NULL,
-        },
-        .res = {
-                .start = U300_EMIF_CFG_BASE,
-                .end   = U300_EMIF_CFG_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-};
+/* AHB device at 0x4000 offset */
+static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL);
 
 
 /*
  * Everything within this next ifdef deals with external devices connected to
  * the APP SPI bus.
  */
-static struct amba_device pl022_device = {
-        .dev = {
-                .coherent_dma_mask = ~0,
-                .init_name = "pl022", /* Fast device at 0x6000 offset */
-        },
-        .res = {
-                .start = U300_SPI_BASE,
-                .end   = U300_SPI_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_U300_SPI, NO_IRQ },
-        /*
-         * This device has a DMA channel but the Linux driver does not use
-         * it currently.
-         */
-};
+/* Fast device at 0x6000 offset */
+static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE,
+        { IRQ_U300_SPI }, NULL);
 
-static struct amba_device mmcsd_device = {
-        .dev = {
-                .init_name = "mmci", /* Fast device at 0x1000 offset */
-                .platform_data = NULL, /* Added later */
-        },
-        .res = {
-                .start = U300_MMCSD_BASE,
-                .end   = U300_MMCSD_BASE + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 },
-        /*
-         * This device has a DMA channel but the Linux driver does not use
-         * it currently.
-         */
-};
+/* Fast device at 0x1000 offset */
+#define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }
+
+static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE,
+        U300_MMCSD_IRQS, NULL);
 
 /*
  * The order of device declaration may be important, since some devices
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h
deleted file mode 100644
index 574d46e38290..000000000000
--- a/arch/arm/mach-u300/include/mach/system.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/include/mach/system.h
- *
- *
- * Copyright (C) 2007-2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * System shutdown and reset functions.
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c
index c563e5418d80..898a64517b09 100644
--- a/arch/arm/mach-ux500/devices-common.c
+++ b/arch/arm/mach-ux500/devices-common.c
@@ -26,29 +26,22 @@ dbx500_add_amba_device(const char *name, resource_size_t base,
         struct amba_device *dev;
         int ret;
 
-        dev = kzalloc(sizeof *dev, GFP_KERNEL);
+        dev = amba_device_alloc(name, base, SZ_4K);
         if (!dev)
                 return ERR_PTR(-ENOMEM);
 
-        dev->dev.init_name = name;
-
-        dev->res.start = base;
-        dev->res.end = base + SZ_4K - 1;
-        dev->res.flags = IORESOURCE_MEM;
-
         dev->dma_mask = DMA_BIT_MASK(32);
         dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
 
         dev->irq[0] = irq;
-        dev->irq[1] = NO_IRQ;
 
         dev->periphid = periphid;
 
         dev->dev.platform_data = pdata;
 
-        ret = amba_device_register(dev, &iomem_resource);
+        ret = amba_device_add(dev, &iomem_resource);
         if (ret) {
-                kfree(dev);
+                amba_device_put(dev);
                 return ERR_PTR(ret);
         }
 
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h
deleted file mode 100644
index 258e5c919c24..000000000000
--- a/arch/arm/mach-ux500/include/mach/system.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (C) 2009 ST-Ericsson.
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 02b7b9303f3b..4f352e45be0a 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -582,58 +582,58 @@ static struct pl022_ssp_controller ssp0_plat_data = {
         .num_chipselect = 1,
 };
 
-#define AACI_IRQ        { IRQ_AACI, NO_IRQ }
+#define AACI_IRQ        { IRQ_AACI }
 #define MMCI0_IRQ       { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
-#define KMI0_IRQ        { IRQ_SIC_KMI0, NO_IRQ }
-#define KMI1_IRQ        { IRQ_SIC_KMI1, NO_IRQ }
+#define KMI0_IRQ        { IRQ_SIC_KMI0 }
+#define KMI1_IRQ        { IRQ_SIC_KMI1 }
 
 /*
  * These devices are connected directly to the multi-layer AHB switch
  */
-#define SMC_IRQ         { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ        { NO_IRQ, NO_IRQ }
-#define CLCD_IRQ        { IRQ_CLCDINT, NO_IRQ }
-#define DMAC_IRQ        { IRQ_DMAINT, NO_IRQ }
+#define SMC_IRQ         { }
+#define MPMC_IRQ        { }
+#define CLCD_IRQ        { IRQ_CLCDINT }
+#define DMAC_IRQ        { IRQ_DMAINT }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define SCTL_IRQ        { NO_IRQ, NO_IRQ }
-#define WATCHDOG_IRQ    { IRQ_WDOGINT, NO_IRQ }
-#define GPIO0_IRQ       { IRQ_GPIOINT0, NO_IRQ }
-#define GPIO1_IRQ       { IRQ_GPIOINT1, NO_IRQ }
-#define RTC_IRQ         { IRQ_RTCINT, NO_IRQ }
+#define SCTL_IRQ        { }
+#define WATCHDOG_IRQ    { IRQ_WDOGINT }
+#define GPIO0_IRQ       { IRQ_GPIOINT0 }
+#define GPIO1_IRQ       { IRQ_GPIOINT1 }
+#define RTC_IRQ         { IRQ_RTCINT }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
-#define SCI_IRQ         { IRQ_SCIINT, NO_IRQ }
-#define UART0_IRQ       { IRQ_UARTINT0, NO_IRQ }
-#define UART1_IRQ       { IRQ_UARTINT1, NO_IRQ }
-#define UART2_IRQ       { IRQ_UARTINT2, NO_IRQ }
-#define SSP_IRQ         { IRQ_SSPINT, NO_IRQ }
+#define SCI_IRQ         { IRQ_SCIINT }
+#define UART0_IRQ       { IRQ_UARTINT0 }
+#define UART1_IRQ       { IRQ_UARTINT1 }
+#define UART2_IRQ       { IRQ_UARTINT2 }
+#define SSP_IRQ         { IRQ_SSPINT }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,  "fpga:04", AACI,     NULL);
-AMBA_DEVICE(mmc0,  "fpga:05", MMCI0,    &mmc0_plat_data);
-AMBA_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
-AMBA_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
+APB_DEVICE(aaci,  "fpga:04", AACI,     NULL);
+APB_DEVICE(mmc0,  "fpga:05", MMCI0,    &mmc0_plat_data);
+APB_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
+APB_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,   "dev:00",  SMC,      NULL);
-AMBA_DEVICE(mpmc,  "dev:10",  MPMC,     NULL);
-AMBA_DEVICE(clcd,  "dev:20",  CLCD,     &clcd_plat_data);
-AMBA_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
-AMBA_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
-AMBA_DEVICE(wdog,  "dev:e1",  WATCHDOG, NULL);
-AMBA_DEVICE(gpio0, "dev:e4",  GPIO0,    &gpio0_plat_data);
-AMBA_DEVICE(gpio1, "dev:e5",  GPIO1,    &gpio1_plat_data);
-AMBA_DEVICE(rtc,   "dev:e8",  RTC,      NULL);
-AMBA_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
-AMBA_DEVICE(uart0, "dev:f1",  UART0,    NULL);
-AMBA_DEVICE(uart1, "dev:f2",  UART1,    NULL);
-AMBA_DEVICE(uart2, "dev:f3",  UART2,    NULL);
-AMBA_DEVICE(ssp0,  "dev:f4",  SSP,      &ssp0_plat_data);
+AHB_DEVICE(smc,   "dev:00",  SMC,      NULL);
+AHB_DEVICE(mpmc,  "dev:10",  MPMC,     NULL);
+AHB_DEVICE(clcd,  "dev:20",  CLCD,     &clcd_plat_data);
+AHB_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
+APB_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
+APB_DEVICE(wdog,  "dev:e1",  WATCHDOG, NULL);
+APB_DEVICE(gpio0, "dev:e4",  GPIO0,    &gpio0_plat_data);
+APB_DEVICE(gpio1, "dev:e5",  GPIO1,    &gpio1_plat_data);
+APB_DEVICE(rtc,   "dev:e8",  RTC,      NULL);
+APB_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
+APB_DEVICE(uart0, "dev:f1",  UART0,    NULL);
+APB_DEVICE(uart1, "dev:f2",  UART1,    NULL);
+APB_DEVICE(uart2, "dev:f3",  UART2,    NULL);
+APB_DEVICE(ssp0,  "dev:f4",  SSP,      &ssp0_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index 2ef2f555f315..683e60776a85 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -36,20 +36,10 @@ extern unsigned int mmc_status(struct device *dev);
 extern struct of_dev_auxdata versatile_auxdata_lookup[];
 #endif
 
-#define AMBA_DEVICE(name,busid,base,plat)                       \
-static struct amba_device name##_device = {                     \
-        .dev            = {                                     \
-                .coherent_dma_mask = ~0,                        \
-                .init_name = busid,                             \
-                .platform_data = plat,                          \
-        },                                                      \
-        .res            = {                                     \
-                .start  = VERSATILE_##base##_BASE,              \
-                .end    = (VERSATILE_##base##_BASE) + SZ_4K - 1,\
-                .flags  = IORESOURCE_MEM,                       \
-        },                                                      \
-        .dma_mask       = ~0,                                   \
-        .irq            = base##_IRQ,                           \
-}
+#define APB_DEVICE(name, busid, base, plat)     \
+static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat)
+
+#define AHB_DEVICE(name, busid, base, plat)     \
+static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat)
 
 #endif
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h
deleted file mode 100644
index f3fa347895f0..000000000000
--- a/arch/arm/mach-versatile/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-versatile/include/mach/system.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 9581c197500c..19738331bd3d 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = {
         .irq_base       = IRQ_GPIO3_START,
 };
 
-#define UART3_IRQ       { IRQ_SIC_UART3, NO_IRQ }
-#define SCI1_IRQ        { IRQ_SIC_SCI3, NO_IRQ }
+#define UART3_IRQ       { IRQ_SIC_UART3 }
+#define SCI1_IRQ        { IRQ_SIC_SCI3 }
 #define MMCI1_IRQ       { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define GPIO2_IRQ       { IRQ_GPIOINT2, NO_IRQ }
-#define GPIO3_IRQ       { IRQ_GPIOINT3, NO_IRQ }
+#define GPIO2_IRQ       { IRQ_GPIOINT2 }
+#define GPIO3_IRQ       { IRQ_GPIOINT3 }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
 
 /* FPGA Primecells */
-AMBA_DEVICE(uart3, "fpga:09", UART3,    NULL);
-AMBA_DEVICE(sci1,  "fpga:0a", SCI1,     NULL);
-AMBA_DEVICE(mmc1,  "fpga:0b", MMCI1,    &mmc1_plat_data);
+APB_DEVICE(uart3, "fpga:09", UART3,    NULL);
+APB_DEVICE(sci1,  "fpga:0a", SCI1,     NULL);
+APB_DEVICE(mmc1,  "fpga:0b", MMCI1,    &mmc1_plat_data);
 
 /* DevChip Primecells */
-AMBA_DEVICE(gpio2, "dev:e6",  GPIO2,    &gpio2_plat_data);
-AMBA_DEVICE(gpio3, "dev:e7",  GPIO3,    &gpio3_plat_data);
+APB_DEVICE(gpio2, "dev:e6",  GPIO2,    &gpio2_plat_data);
+APB_DEVICE(gpio3, "dev:e7",  GPIO3,    &gpio3_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
         &uart3_device,
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h
index f4397159c173..9f0f2827c711 100644
--- a/arch/arm/mach-vexpress/core.h
+++ b/arch/arm/mach-vexpress/core.h
@@ -1,19 +1,2 @@
 #define __MMIO_P2V(x)   (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000)
 #define MMIO_P2V(x)     ((void __iomem *)__MMIO_P2V(x))
-
-#define AMBA_DEVICE(name,busid,base,plat)       \
-struct amba_device name##_device = {            \
-        .dev            = {                     \
-                .coherent_dma_mask = ~0UL,      \
-                .init_name = busid,             \
-                .platform_data = plat,          \
-        },                                      \
-        .res            = {                     \
-                .start  = base,                 \
-                .end    = base + SZ_4K - 1,     \
-                .flags  = IORESOURCE_MEM,       \
-        },                                      \
-        .dma_mask       = ~0UL,                 \
-        .irq            = IRQ_##base,           \
-        /* .dma         = DMA_##base,*/         \
-}
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index b1e87c184e54..1b1d2e4892b9 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -109,10 +109,10 @@ static struct clcd_board ct_ca9x4_clcd_data = {
         .remove         = versatile_clcd_remove_dma,
 };
 
-static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
-static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL);
-static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL);
-static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL);
+static AMBA_AHB_DEVICE(clcd, "ct:clcd", 0, CT_CA9X4_CLCDC, IRQ_CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
+static AMBA_APB_DEVICE(dmc, "ct:dmc", 0, CT_CA9X4_DMC, IRQ_CT_CA9X4_DMC, NULL);
+static AMBA_APB_DEVICE(smc, "ct:smc", 0, CT_CA9X4_SMC, IRQ_CT_CA9X4_SMC, NULL);
+static AMBA_APB_DEVICE(gpio, "ct:gpio", 0, CT_CA9X4_GPIO, IRQ_CT_CA9X4_GPIO, NULL);
 
 static struct amba_device *ct_ca9x4_amba_devs[] __initdata = {
         &clcd_device,
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
index a34d3d4faae1..a40468f3b938 100644
--- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
+++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
@@ -35,7 +35,7 @@
  * Interrupts.  Those in {} are for AMBA devices
  */
 #define IRQ_CT_CA9X4_CLCDC      { 76 }
-#define IRQ_CT_CA9X4_DMC        { -1 }
+#define IRQ_CT_CA9X4_DMC        { 0 }
 #define IRQ_CT_CA9X4_SMC        { 77, 78 }
 #define IRQ_CT_CA9X4_TIMER0     80
 #define IRQ_CT_CA9X4_TIMER1     81
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
deleted file mode 100644
index f653a8e265bd..000000000000
--- a/arch/arm/mach-vexpress/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-vexpress/include/mach/system.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index b4a28ca0e50a..ad64f97a2003 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -266,16 +266,16 @@ static struct mmci_platform_data v2m_mmci_data = {
         .status         = v2m_mmci_status,
 };
 
-static AMBA_DEVICE(aaci,  "mb:aaci",  V2M_AACI, NULL);
-static AMBA_DEVICE(mmci,  "mb:mmci",  V2M_MMCI, &v2m_mmci_data);
-static AMBA_DEVICE(kmi0,  "mb:kmi0",  V2M_KMI0, NULL);
-static AMBA_DEVICE(kmi1,  "mb:kmi1",  V2M_KMI1, NULL);
-static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
-static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
-static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
-static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
-static AMBA_DEVICE(wdt,   "mb:wdt",   V2M_WDT, NULL);
-static AMBA_DEVICE(rtc,   "mb:rtc",   V2M_RTC, NULL);
+static AMBA_APB_DEVICE(aaci,  "mb:aaci",  0, V2M_AACI, IRQ_V2M_AACI, NULL);
+static AMBA_APB_DEVICE(mmci,  "mb:mmci",  0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data);
+static AMBA_APB_DEVICE(kmi0,  "mb:kmi0",  0, V2M_KMI0, IRQ_V2M_KMI0, NULL);
+static AMBA_APB_DEVICE(kmi1,  "mb:kmi1",  0, V2M_KMI1, IRQ_V2M_KMI1, NULL);
+static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL);
+static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL);
+static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL);
+static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL);
+static AMBA_APB_DEVICE(wdt,   "mb:wdt",   0, V2M_WDT, IRQ_V2M_WDT, NULL);
+static AMBA_APB_DEVICE(rtc,   "mb:rtc",   0, V2M_RTC, IRQ_V2M_RTC, NULL);
 
 static struct amba_device *v2m_amba_devs[] __initdata = {
         &aaci_device,
diff --git a/arch/arm/mach-vt8500/include/mach/system.h b/arch/arm/mach-vt8500/include/mach/system.h
index d6c757eaf26b..58fa8010ee61 100644
--- a/arch/arm/mach-vt8500/include/mach/system.h
+++ b/arch/arm/mach-vt8500/include/mach/system.h
@@ -7,11 +7,6 @@
 /* PM Software Reset request register */
 #define VT8500_PMSR_VIRT        0xf8130060
 
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
 static inline void arch_reset(char mode, const char *cmd)
 {
         writel(1, VT8500_PMSR_VIRT);
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index 78110befb7a9..db82568a998a 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -530,6 +530,7 @@ static struct platform_device *nuc900_public_dev[] __initdata = {
 
 void __init nuc900_board_init(struct platform_device **device, int size)
 {
+        disable_hlt();
         platform_add_devices(device, size);
         platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev));
         spi_register_board_info(nuc900_spi_board_info,
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
deleted file mode 100644
index 2aaeb9311619..000000000000
--- a/arch/arm/mach-w90x900/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-w90x900/include/mach/system.h
- *
- * Copyright (c) 2008 Nuvoton technology corporation
- * All rights reserved.
- *
- * Wan ZongShun <mcuos.com@gmail.com>
- *
- * Based on arch/arm/mach-s3c2410/include/mach/system.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-static void arch_idle(void)
-{
-}
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h
deleted file mode 100644
index 8e88e0b8d2ba..000000000000
--- a/arch/arm/mach-zynq/include/mach/system.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* arch/arm/mach-zynq/include/mach/system.h
- *
- *  Copyright (C) 2011 Xilinx
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MACH_SYSTEM_H__
-#define __MACH_SYSTEM_H__
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/plat-mxc/audmux-v1.c b/arch/arm/plat-mxc/audmux-v1.c
index 1180bef7664b..14a3c0486750 100644
--- a/arch/arm/plat-mxc/audmux-v1.c
+++ b/arch/arm/plat-mxc/audmux-v1.c
@@ -46,16 +46,13 @@ EXPORT_SYMBOL_GPL(mxc_audmux_v1_configure_port);
 
 static int mxc_audmux_v1_init(void)
 {
-#ifdef CONFIG_MACH_MX21
         if (cpu_is_mx21())
                 audmux_base = MX21_IO_ADDRESS(MX21_AUDMUX_BASE_ADDR);
         else
-#endif
-#ifdef CONFIG_MACH_MX27
+
         if (cpu_is_mx27())
                 audmux_base = MX27_IO_ADDRESS(MX27_AUDMUX_BASE_ADDR);
         else
-#endif
                 (void)0;
         
         return 0;
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index 55f15699a383..689f81f9593b 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -60,7 +60,7 @@ static int avic_irq_set_priority(unsigned char irq, unsigned char prio)
         unsigned int mask = 0x0F << irq % 8 * 4;
 
         if (irq >= AVIC_NUM_IRQS)
-                return -EINVAL;;
+                return -EINVAL;
 
         temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8));
         temp &= ~mask;
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
deleted file mode 100644
index 13ad0df2e860..000000000000
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *  Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_MXC_SYSTEM_H__
-#define __ASM_ARCH_MXC_SYSTEM_H__
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h
deleted file mode 100644
index 8e5ebd74b129..000000000000
--- a/arch/arm/plat-omap/include/plat/system.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copied from arch/arm/mach-sa1100/include/mach/system.h
- * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <asm/proc-fns.h>
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 21f1fda8b661..32a09931350c 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -32,6 +32,7 @@
 #include <linux/io.h>
 
 #include <mach/hardware.h>
+#include <mach/regs-clock.h>
 #include <asm/irq.h>
 #include <asm/cacheflush.h>
 
@@ -190,8 +191,34 @@ static unsigned long s3c24xx_read_idcode_v4(void)
         return __raw_readl(S3C2410_GSTATUS1);
 }
 
+static void s3c24xx_default_idle(void)
+{
+        unsigned long tmp;
+        int i;
+
+        /* idle the system by using the idle mode which will wait for an
+         * interrupt to happen before restarting the system.
+         */
+
+        /* Warning: going into idle state upsets jtag scanning */
+
+        __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE,
+                     S3C2410_CLKCON);
+
+        /* the samsung port seems to do a loop and then unset idle.. */
+        for (i = 0; i < 50; i++)
+                tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */
+
+        /* this bit is not cleared on re-start... */
+
+        __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
+                     S3C2410_CLKCON);
+}
+
 void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 {
+        arm_pm_idle = s3c24xx_default_idle;
+
         /* initialise the io descriptors we need for initialisation */
         iotable_init(mach_desc, size);
         iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
deleted file mode 100644
index 86c6f83b44cc..000000000000
--- a/arch/arm/plat-spear/include/plat/system.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * arch/arm/plat-spear/include/plat/system.h
- *
- * SPEAr platform specific architecture functions
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __PLAT_SYSTEM_H
-#define __PLAT_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-        /*
-         * This should do all the clock switching
-         * and wait for interrupt tricks
-         */
-        cpu_do_idle();
-}
-
-#endif /* __PLAT_SYSTEM_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/cpu.h b/arch/avr32/mach-at32ap/include/mach/cpu.h
index 8181293115e4..16a24b14146c 100644
--- a/arch/avr32/mach-at32ap/include/mach/cpu.h
+++ b/arch/avr32/mach-at32ap/include/mach/cpu.h
@@ -30,9 +30,6 @@
 #define cpu_is_at91sam9261()    (0)
 #define cpu_is_at91sam9263()    (0)
 #define cpu_is_at91sam9rl()     (0)
-#define cpu_is_at91cap9()       (0)
-#define cpu_is_at91cap9_revB()  (0)
-#define cpu_is_at91cap9_revC()  (0)
 #define cpu_is_at91sam9g10()    (0)
 #define cpu_is_at91sam9g20()    (0)
 #define cpu_is_at91sam9g45()    (0)