301 files changed, 2979 insertions, 3149 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index 26b0e2397a57..4b0669cbb3b0 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -178,4 +178,7 @@ config HAVE_ARCH_MUTEX_CPU_RELAX
 config HAVE_RCU_TABLE_FREE
        bool
+config ARCH_HAVE_NMI_SAFE_CMPXCHG
+        bool
 source "kernel/gcov/Kconfig"
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index ca2da8da6e9c..60cde53d266c 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -14,6 +14,7 @@ config ALPHA
        select AUTO_IRQ_AFFINITY if SMP
        select GENERIC_IRQ_SHOW
        select ARCH_WANT_OPTIONAL_GPIOLIB
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG
        help
          The Alpha is a 64-bit general-purpose processor designed and
          marketed by the Digital Equipment Corporation of blessed memory,
diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c
index 0e1439904cdb..8606d77e5163 100644
--- a/arch/alpha/kernel/sys_alcor.c
+++ b/arch/alpha/kernel/sys_alcor.c
@@ -183,7 +183,7 @@ alcor_init_irq(void)
 */
 static int __init
-alcor_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+alcor_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[7][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c
index c8c112d51584..1029619fb6c0 100644
--- a/arch/alpha/kernel/sys_cabriolet.c
+++ b/arch/alpha/kernel/sys_cabriolet.c
@@ -175,7 +175,7 @@ pc164_init_irq(void)
 */
 static inline int __init
-eb66p_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+eb66p_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[5][5] __initdata = {
                /*INT  INTA  INTB  INTC   INTD */
@@ -205,7 +205,7 @@ eb66p_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 */
 static inline int __init
-cabriolet_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+cabriolet_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[5][5] __initdata = {
                /*INT   INTA  INTB  INTC   INTD */
@@ -289,7 +289,7 @@ cia_cab_init_pci(void)
 */
 static inline int __init
-alphapc164_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+alphapc164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[7][5] __initdata = {
                /*INT   INTA  INTB   INTC   INTD */
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index f8856829c22a..bb7f0c7cb17a 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -382,7 +382,7 @@ isa_irq_fixup(struct pci_dev *dev, int irq)
 }
 static int __init
-dp264_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+dp264_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[6][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
@@ -404,7 +404,7 @@ dp264_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 }
 static int __init
-monet_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+monet_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[13][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
@@ -466,7 +466,7 @@ monet_swizzle(struct pci_dev *dev, u8 *pinp)
 }
 static int __init
-webbrick_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+webbrick_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[13][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
@@ -488,7 +488,7 @@ webbrick_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 }
 static int __init
-clipper_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+clipper_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[7][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c
index a7a23b40eec5..3c6c13cd8b19 100644
--- a/arch/alpha/kernel/sys_eb64p.c
+++ b/arch/alpha/kernel/sys_eb64p.c
@@ -169,7 +169,7 @@ eb64p_init_irq(void)
 */
 static int __init
-eb64p_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+eb64p_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[5][5] __initdata = {
                /*INT  INTA  INTB  INTC   INTD */
diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c
index a60cd5b2621e..35f480db7719 100644
--- a/arch/alpha/kernel/sys_eiger.c
+++ b/arch/alpha/kernel/sys_eiger.c
@@ -144,7 +144,7 @@ eiger_init_irq(void)
 }
 static int __init
-eiger_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+eiger_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        u8 irq_orig;
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
index 388b99d1779d..95cfc83ece8f 100644
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -318,7 +318,7 @@ marvel_init_irq(void)
 }
 static int 
-marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+marvel_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        struct pci_controller *hose = dev->sysdata;
        struct io7_port *io7_port = hose->sysdata;
diff --git a/arch/alpha/kernel/sys_miata.c b/arch/alpha/kernel/sys_miata.c
index 61ccd95579ec..258da684670b 100644
--- a/arch/alpha/kernel/sys_miata.c
+++ b/arch/alpha/kernel/sys_miata.c
@@ -151,7 +151,7 @@ miata_init_irq(void)
 */
 static int __init
-miata_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[18][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c
index 0e6e4697a025..c0fd7284dec3 100644
--- a/arch/alpha/kernel/sys_mikasa.c
+++ b/arch/alpha/kernel/sys_mikasa.c
@@ -146,7 +146,7 @@ mikasa_init_irq(void)
 */
 static int __init
-mikasa_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+mikasa_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[8][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
diff --git a/arch/alpha/kernel/sys_nautilus.c b/arch/alpha/kernel/sys_nautilus.c
index 99c0f46f6b9c..4112200307c7 100644
--- a/arch/alpha/kernel/sys_nautilus.c
+++ b/arch/alpha/kernel/sys_nautilus.c
@@ -65,7 +65,7 @@ nautilus_init_irq(void)
 }
 static int __init
-nautilus_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+nautilus_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        /* Preserve the IRQ set up by the console.  */
diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c
index a00ac7087167..21725283cdd7 100644
--- a/arch/alpha/kernel/sys_noritake.c
+++ b/arch/alpha/kernel/sys_noritake.c
@@ -194,7 +194,7 @@ noritake_init_irq(void)
 */
 static int __init
-noritake_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+noritake_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[15][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c
index 7f52161f3d88..a125d6bea7e1 100644
--- a/arch/alpha/kernel/sys_rawhide.c
+++ b/arch/alpha/kernel/sys_rawhide.c
@@ -223,7 +223,7 @@ rawhide_init_irq(void)
 */
 static int __init
-rawhide_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+rawhide_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[5][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
diff --git a/arch/alpha/kernel/sys_ruffian.c b/arch/alpha/kernel/sys_ruffian.c
index f33648e4e8cf..2581cbec6fc2 100644
--- a/arch/alpha/kernel/sys_ruffian.c
+++ b/arch/alpha/kernel/sys_ruffian.c
@@ -119,7 +119,7 @@ ruffian_kill_arch (int mode)
 */
 static int __init
-ruffian_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+ruffian_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[11][5] __initdata = {
              /*INT  INTA INTB INTC INTD */
diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c
index 216d94d9c0c1..b172b27555a7 100644
--- a/arch/alpha/kernel/sys_rx164.c
+++ b/arch/alpha/kernel/sys_rx164.c
@@ -144,7 +144,7 @@ rx164_init_irq(void)
 */
 static int __init
-rx164_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+rx164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
 #if 0
        static char irq_tab_pass1[6][5] __initdata = {
diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c
index da714e427c5f..98d1dbffe98f 100644
--- a/arch/alpha/kernel/sys_sable.c
+++ b/arch/alpha/kernel/sys_sable.c
@@ -194,7 +194,7 @@ sable_init_irq(void)
 */
 static int __init
-sable_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+sable_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[9][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
@@ -376,7 +376,7 @@ lynx_init_irq(void)
 */
 static int __init
-lynx_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+lynx_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[19][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
diff --git a/arch/alpha/kernel/sys_sio.c b/arch/alpha/kernel/sys_sio.c
index 85b4aea01ef8..47bec1e97d1c 100644
--- a/arch/alpha/kernel/sys_sio.c
+++ b/arch/alpha/kernel/sys_sio.c
@@ -146,7 +146,7 @@ sio_fixup_irq_levels(unsigned int level_bits)
 }
 static inline int __init
-noname_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+noname_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        /*
         * The Noname board has 5 PCI slots with each of the 4
@@ -185,7 +185,7 @@ noname_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 }
 static inline int __init
-p2k_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+p2k_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[][5] __initdata = {
                /*INT A   B   C   D */
diff --git a/arch/alpha/kernel/sys_sx164.c b/arch/alpha/kernel/sys_sx164.c
index 41d4ad4c7c44..73e1c317afcb 100644
--- a/arch/alpha/kernel/sys_sx164.c
+++ b/arch/alpha/kernel/sys_sx164.c
@@ -95,7 +95,7 @@ sx164_init_irq(void)
 */
 static int __init
-sx164_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+sx164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[5][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c
index a31f8cd9bd6b..2ae99ad6975e 100644
--- a/arch/alpha/kernel/sys_takara.c
+++ b/arch/alpha/kernel/sys_takara.c
@@ -157,7 +157,7 @@ takara_init_irq(void)
 */
 static int __init
-takara_map_irq_srm(struct pci_dev *dev, u8 slot, u8 pin)
+takara_map_irq_srm(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[15][5] __initdata = {
                { 16+3, 16+3, 16+3, 16+3, 16+3},   /* slot  6 == device 3 */
@@ -188,7 +188,7 @@ takara_map_irq_srm(struct pci_dev *dev, u8 slot, u8 pin)
 }
 static int __init
-takara_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+takara_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[15][5] __initdata = {
                { 16+3, 16+3, 16+3, 16+3, 16+3},   /* slot  6 == device 3 */
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index 6994407e242a..f47b30a2a117 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -305,7 +305,7 @@ titan_late_init(void)
 }
 static int __devinit
-titan_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+titan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        u8 intline;
        int irq;
diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c
index d92cdc715c65..17c85a65e7b0 100644
--- a/arch/alpha/kernel/sys_wildfire.c
+++ b/arch/alpha/kernel/sys_wildfire.c
@@ -290,7 +290,7 @@ wildfire_device_interrupt(unsigned long vector)
 */
 static int __init
-wildfire_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+wildfire_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static char irq_tab[8][5] __initdata = {
                /*INT    INTA   INTB   INTC   INTD */
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 14ad62e16dd1..a7934ba9e1df 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -144,7 +144,7 @@ void it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
 }
 /* mapping for on-chip devices */
-int __init it8152_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int __init it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        if ((dev->vendor == PCI_VENDOR_ID_ITE) &&
            (dev->device == PCI_DEVICE_ID_ITE_8152)) {
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index b2f95c72287c..b3fea38d55c6 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -105,7 +105,7 @@ struct pci_sys_data;
 extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc);
 extern void it8152_init_irq(void);
-extern int it8152_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
+extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
 extern struct pci_bus *it8152_pci_scan_bus(int nr, struct pci_sys_data *sys);
diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index 16330bd0657c..186efd4e05c9 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -25,7 +25,7 @@ struct hw_pci {
        void            (*preinit)(void);
        void            (*postinit)(void);
        u8              (*swizzle)(struct pci_dev *dev, u8 *pin);
-        int             (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin);
+        int             (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
 };
 /*
@@ -44,7 +44,7 @@ struct pci_sys_data {
                                        /* Bridge swizzling                     */
        u8              (*swizzle)(struct pci_dev *, u8 *);
                                        /* IRQ mapping                          */
-        int             (*map_irq)(struct pci_dev *, u8, u8);
+        int             (*map_irq)(const struct pci_dev *, u8, u8);
        struct hw_pci   *hw;
        void            *private_data;  /* platform controller private data     */
 };
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index e4ee050aad7d..d6df359408f0 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -476,7 +476,7 @@ static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin)
 /*
 * Map a slot/pin to an IRQ.
 */
-static int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        struct pci_sys_data *sys = dev->sysdata;
        int irq = -1;
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 5e1e54197227..1a347f481e5e 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -30,6 +30,7 @@
 #include <linux/uaccess.h>
 #include <linux/random.h>
 #include <linux/hw_breakpoint.h>
+#include <linux/cpuidle.h>
 #include <asm/cacheflush.h>
 #include <asm/leds.h>
@@ -196,7 +197,8 @@ void cpu_idle(void)
                                cpu_relax();
                        } else {
                                stop_critical_timings();
-                                pm_idle();
+                                if (cpuidle_idle_call())
+                                        pm_idle();
                                start_critical_timings();
                                /*
                                 * This will eventually be removed - pm_idle
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index a4ec080908b8..06fd25d70aec 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -172,7 +172,7 @@ static struct pci_bus *cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys)
        return pci_scan_bus(sys->busnr, &cns3xxx_pcie_ops, sys);
 }
-static int cns3xxx_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        struct cns3xxx_pcie *cnspci = pdev_to_cnspci(dev);
        int irq = cnspci->irqs[slot];
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index c2f1c4767f21..aa2b3a09a51d 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -193,7 +193,7 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
        return bus;
 }
-static int __init dove_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        struct pcie_port *pp = bus_to_port(dev->bus->number);
diff --git a/arch/arm/mach-footbridge/cats-pci.c b/arch/arm/mach-footbridge/cats-pci.c
index ae3e1c8c7583..32321f66dec4 100644
--- a/arch/arm/mach-footbridge/cats-pci.c
+++ b/arch/arm/mach-footbridge/cats-pci.c
@@ -16,7 +16,7 @@
 /* cats host-specific stuff */
 static int irqmap_cats[] __initdata = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 };
-static int __init cats_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        if (dev->irq >= 255)
                return -1;      /* not a valid interrupt. */
diff --git a/arch/arm/mach-footbridge/ebsa285-pci.c b/arch/arm/mach-footbridge/ebsa285-pci.c
index e5ab5bddbc8c..511c673ffa9d 100644
--- a/arch/arm/mach-footbridge/ebsa285-pci.c
+++ b/arch/arm/mach-footbridge/ebsa285-pci.c
@@ -15,7 +15,7 @@
 static int irqmap_ebsa285[] __initdata = { IRQ_IN3, IRQ_IN1, IRQ_IN0, IRQ_PCI };
-static int __init ebsa285_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        if (dev->vendor == PCI_VENDOR_ID_CONTAQ &&
            dev->device == PCI_DEVICE_ID_CONTAQ_82C693)
diff --git a/arch/arm/mach-footbridge/netwinder-pci.c b/arch/arm/mach-footbridge/netwinder-pci.c
index e263d6d54a0f..62187610e17e 100644
--- a/arch/arm/mach-footbridge/netwinder-pci.c
+++ b/arch/arm/mach-footbridge/netwinder-pci.c
@@ -17,7 +17,7 @@
 * We now use the slot ID instead of the device identifiers to select
 * which interrupt is routed where.
 */
-static int __init netwinder_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init netwinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        switch (slot) {
        case 0:  /* host bridge */
diff --git a/arch/arm/mach-footbridge/personal-pci.c b/arch/arm/mach-footbridge/personal-pci.c
index d5fca95afdad..aeb651d914a6 100644
--- a/arch/arm/mach-footbridge/personal-pci.c
+++ b/arch/arm/mach-footbridge/personal-pci.c
@@ -18,7 +18,8 @@ static int irqmap_personal_server[] __initdata = {
        IRQ_DOORBELLHOST, IRQ_DMA1, IRQ_DMA2, IRQ_PCI
 };
-static int __init personal_server_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init personal_server_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        unsigned char line;
diff --git a/arch/arm/mach-integrator/pci.c b/arch/arm/mach-integrator/pci.c
index 2fdb95433f0a..520b6bf81bb1 100644
--- a/arch/arm/mach-integrator/pci.c
+++ b/arch/arm/mach-integrator/pci.c
@@ -95,7 +95,7 @@ static int irq_tab[4] __initdata = {
 * map the specified device/slot/pin to an IRQ.  This works out such
 * that slot 9 pin 1 is INT0, pin 2 is INT1, and slot 10 pin 1 is INT1.
 */
-static int __init integrator_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init integrator_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int intnr = ((slot - 9) + (pin - 1)) & 3;
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 9b5a63f5d07d..23dfaffc586c 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -30,7 +30,7 @@
 extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */
 static int __init
-iq81340mc_pcix_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
+iq81340mc_pcix_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin)
 {
        switch (idsel) {
        case 1:
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 0690b1d7fd3e..251c40897dad 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -388,7 +388,7 @@ static int iop13xx_atue_pci_status(int clear)
 }
 static int
-iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
+iop13xx_pcie_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin)
 {
        WARN_ON(idsel != 0);
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 779f924af302..6cbffbfc2bba 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -81,7 +81,7 @@ void __init em7210_map_io(void)
 #define INTD    IRQ_IOP32X_XINT3
 static int __init
-em7210_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+em7210_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static int pci_irq_table[][4] = {
                /*
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index c6b6f9c5650d..ceef5d4dce1a 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -77,7 +77,7 @@ void __init glantank_map_io(void)
 #define INTD    IRQ_IOP32X_XINT3
 static int __init
-glantank_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+glantank_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static int pci_irq_table[][4] = {
                /*
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index fde962c057f0..3a62514dae7c 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -103,7 +103,7 @@ void __init iq31244_map_io(void)
 * EP80219/IQ31244 PCI.
 */
 static int __init
-ep80219_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
@@ -139,7 +139,7 @@ static struct hw_pci ep80219_pci __initdata = {
 };
 static int __init
-iq31244_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 3a95950e8737..35b7e6914d3b 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -71,7 +71,7 @@ void __init iq80321_map_io(void)
 * IQ80321 PCI.
 */
 static int __init
-iq80321_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 626aa375915d..1a374eab6007 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -78,7 +78,7 @@ void __init n2100_map_io(void)
 * N2100 PCI.
 */
 static int __init
-n2100_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index c565f8d1e3a4..637c0272d5e0 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -54,7 +54,7 @@ static struct sys_timer iq80331_timer = {
 * IQ80331 PCI.
 */
 static int __init
-iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+iq80331_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 36a9efb254c2..90a0436d7255 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -54,7 +54,7 @@ static struct sys_timer iq80332_timer = {
 * IQ80332 PCI.
 */
 static int __init
-iq80332_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+iq80332_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index 88663ab1d2ad..62c60ade5274 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -148,7 +148,8 @@ static struct pci_bus * __init enp2611_pci_scan_bus(int nr,
        return pci_scan_bus(sys->busnr, &enp2611_pci_ops, sys);
 }
-static int __init enp2611_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index dfffc1e817fa..5bad1a8419b7 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -78,7 +78,8 @@ int ixdp2400_pci_setup(int nr, struct pci_sys_data *sys)
        return 1;
 }
-static int __init ixdp2400_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init ixdp2400_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        if (ixdp2x00_master_npu()) {
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index cd4c9bcff2b5..3d3cef876467 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -161,7 +161,8 @@ static int __init ixdp2800_pci_setup(int nr, struct pci_sys_data *sys)
        return 1;
 }
-static int __init ixdp2800_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init ixdp2800_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        if (ixdp2x00_master_npu()) {
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 84835b209557..be2a254f1374 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -252,7 +252,8 @@ void __init ixdp2x01_pci_preinit(void)
 #define DEVPIN(dev, pin) ((pin) | ((dev) << 3))
-static int __init ixdp2x01_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init ixdp2x01_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        u8 bus = dev->bus->number;
        u32 devpin = DEVPIN(PCI_SLOT(dev->devfn), pin);
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index 8dcba17c81e7..ec028e35f401 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -168,7 +168,7 @@ void __init ixdp2351_init_irq(void)
 */
 #define DEVPIN(dev, pin) ((pin) | ((dev) << 3))
-static int __init ixdp2351_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init ixdp2351_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        u8 bus = dev->bus->number;
        u32 devpin = DEVPIN(PCI_SLOT(dev->devfn), pin);
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 8fe0c6273262..844551d2368b 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -56,7 +56,8 @@
 #define INTC_PIN        IXP23XX_GPIO_PIN_11
 #define INTD_PIN        IXP23XX_GPIO_PIN_12
-static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
+static int __init roadrunner_map_irq(const struct pci_dev *dev, u8 idsel,
+        u8 pin)
 {
        static int pci_card_slot_irq[] = {INTB, INTC, INTD, INTA};
        static int pmc_card_slot_irq[] = {INTA, INTB, INTC, INTD};
diff --git a/arch/arm/mach-ixp4xx/avila-pci.c b/arch/arm/mach-ixp4xx/avila-pci.c
index 162043ff29ff..8fea0a3c5246 100644
--- a/arch/arm/mach-ixp4xx/avila-pci.c
+++ b/arch/arm/mach-ixp4xx/avila-pci.c
@@ -46,7 +46,7 @@ void __init avila_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init avila_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init avila_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static int pci_irq_table[IRQ_LINES] = {
                IXP4XX_GPIO_IRQ(INTA),
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index 37fda7d6e83d..71f5c9c60fc3 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -37,7 +37,7 @@ void __init coyote_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init coyote_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init coyote_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        if (slot == SLOT0_DEVID)
                return IXP4XX_GPIO_IRQ(SLOT0_INTA);
diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c
index c7612010b3fc..0532510b5e8c 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-pci.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c
@@ -44,7 +44,7 @@ void __init dsmg600_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init dsmg600_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init dsmg600_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static int pci_irq_table[MAX_DEV][IRQ_LINES] = {
                { IXP4XX_GPIO_IRQ(INTE), -1, -1 },
diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c
index 44ccde9d4879..d2ac803328f7 100644
--- a/arch/arm/mach-ixp4xx/fsg-pci.c
+++ b/arch/arm/mach-ixp4xx/fsg-pci.c
@@ -38,7 +38,7 @@ void __init fsg_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static int pci_irq_table[IRQ_LINES] = {
                IXP4XX_GPIO_IRQ(INTC),
diff --git a/arch/arm/mach-ixp4xx/gateway7001-pci.c b/arch/arm/mach-ixp4xx/gateway7001-pci.c
index fc1124168874..76581fb467c4 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-pci.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-pci.c
@@ -35,7 +35,8 @@ void __init gateway7001_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init gateway7001_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init gateway7001_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        if (slot == 1)
                return IRQ_IXP4XX_GPIO11;
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index 5f00ad224fe0..7548d9a2efe2 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -462,7 +462,7 @@ static void __init gmlr_pci_postinit(void)
        }
 }
-static int __init gmlr_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init gmlr_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        switch(slot) {
        case SLOT_ETHA: return IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA);
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
index 38cc0725dbd8..d68fc068c38d 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
@@ -49,7 +49,7 @@ void __init gtwx5715_pci_preinit(void)
 }
-static int __init gtwx5715_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int rc = -1;
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index 58f400417eaf..fffd8c5e40bf 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -43,7 +43,7 @@ void __init ixdp425_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init ixdp425_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init ixdp425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static int pci_irq_table[IRQ_LINES] = {
                IXP4XX_GPIO_IRQ(INTA),
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index e64f6d041488..34efe75015ec 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -31,7 +31,7 @@ void __init ixdpg425_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init ixdpg425_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init ixdpg425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        if (slot == 12 || slot == 13)
                return IRQ_IXP4XX_GPIO7;
diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c
index 428d1202b799..5434ccf553eb 100644
--- a/arch/arm/mach-ixp4xx/nas100d-pci.c
+++ b/arch/arm/mach-ixp4xx/nas100d-pci.c
@@ -41,7 +41,7 @@ void __init nas100d_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init nas100d_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static int pci_irq_table[MAX_DEV][IRQ_LINES] = {
                { IXP4XX_GPIO_IRQ(INTA), -1, -1 },
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
index 2e85f76b950d..b57160535e47 100644
--- a/arch/arm/mach-ixp4xx/nslu2-pci.c
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -38,7 +38,7 @@ void __init nslu2_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init nslu2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init nslu2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        static int pci_irq_table[IRQ_LINES] = {
                IXP4XX_GPIO_IRQ(INTA),
diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c
index 03bdec5140a7..0bc3f34c282f 100644
--- a/arch/arm/mach-ixp4xx/vulcan-pci.c
+++ b/arch/arm/mach-ixp4xx/vulcan-pci.c
@@ -43,7 +43,7 @@ void __init vulcan_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init vulcan_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        if (slot == 1)
                return IXP4XX_GPIO_IRQ(INTA);
diff --git a/arch/arm/mach-ixp4xx/wg302v2-pci.c b/arch/arm/mach-ixp4xx/wg302v2-pci.c
index 17f3cf59a31b..f27dfcfe811b 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-pci.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-pci.c
@@ -35,7 +35,7 @@ void __init wg302v2_pci_preinit(void)
        ixp4xx_pci_preinit();
 }
-static int __init wg302v2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init wg302v2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        if (slot == 1)
                return IRQ_IXP4XX_GPIO8;
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index bfeb9c900cec..74b992d810ea 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -245,7 +245,8 @@ kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys)
        return bus;
 }
-static int __init kirkwood_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        struct pcie_port *pp = bus_to_port(dev->bus);
diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c
index ada92b6bed24..1338cb3e9827 100644
--- a/arch/arm/mach-ks8695/board-dsm320.c
+++ b/arch/arm/mach-ks8695/board-dsm320.c
@@ -34,7 +34,7 @@
 #include "generic.h"
 #ifdef CONFIG_PCI
-static int dsm320_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int dsm320_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        switch (slot) {
        case 0:
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
index c7ad09bd6ea2..e2e3cba8dcdb 100644
--- a/arch/arm/mach-ks8695/board-micrel.c
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -24,7 +24,7 @@
 #include "generic.h"
 #ifdef CONFIG_PCI
-static int micrel_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int micrel_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        return KS8695_IRQ_EXTERN0;
 }
diff --git a/arch/arm/mach-ks8695/include/mach/devices.h b/arch/arm/mach-ks8695/include/mach/devices.h
index 2744fecb429c..85a3c9aa7d13 100644
--- a/arch/arm/mach-ks8695/include/mach/devices.h
+++ b/arch/arm/mach-ks8695/include/mach/devices.h
@@ -30,7 +30,7 @@ extern void __init ks8695_init_leds(u8 cpu_led, u8 timer_led);
 struct ks8695_pci_cfg {
        short mode;
-        int (*map_irq)(struct pci_dev *, u8, u8);
+        int (*map_irq)(const struct pci_dev *, u8, u8);
 };
 extern __init void ks8695_init_pci(struct ks8695_pci_cfg *);
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 888e92502e15..ebde97f5d5f0 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -11,6 +11,7 @@ config ARCH_MSM7X00A
        select MSM_SMD
        select MSM_SMD_PKG3
        select CPU_V6
+        select GPIO_MSM_V1
        select MSM_PROC_COMM
        select HAS_MSM_DEBUG_UART_PHYS
@@ -22,6 +23,7 @@ config ARCH_MSM7X30
        select MSM_VIC
        select CPU_V7
        select MSM_GPIOMUX
+        select GPIO_MSM_V1
        select MSM_PROC_COMM
        select HAS_MSM_DEBUG_UART_PHYS
@@ -33,6 +35,7 @@ config ARCH_QSD8X50
        select MSM_VIC
        select CPU_V7
        select MSM_GPIOMUX
+        select GPIO_MSM_V1
        select MSM_PROC_COMM
        select HAS_MSM_DEBUG_UART_PHYS
@@ -44,6 +47,7 @@ config ARCH_MSM8X60
        select ARM_GIC
        select CPU_V7
        select MSM_V2_TLMM
+        select GPIO_MSM_V2
        select MSM_GPIOMUX
        select MSM_SCM if SMP
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index b70658c5ae00..4285dfd80b6f 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -29,11 +29,3 @@ obj-$(CONFIG_ARCH_MSM8960) += board-msm8960.o devices-msm8960.o
 obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o
 obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o gpiomux-v1.o gpiomux.o
 obj-$(CONFIG_ARCH_MSM8X60) += gpiomux-8x60.o gpiomux-v2.o gpiomux.o
-ifdef CONFIG_MSM_V2_TLMM
-ifndef CONFIG_ARCH_MSM8960
-# TODO: TLMM Mapping issues need to be resolved
-obj-y   += gpio-v2.o
-endif
-else
-obj-y   += gpio.o
-endif
diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c
deleted file mode 100644
index cc9c4fd7cccc..000000000000
--- a/arch/arm/mach-msm/gpio-v2.c
+++ /dev/null
@@ -1,433 +0,0 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- *
- */
-#define pr_fmt(fmt) "%s: " fmt, __func__
-#include <linux/bitmap.h>
-#include <linux/bitops.h>
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/spinlock.h>
-#include <asm/mach/irq.h>
-#include <mach/msm_iomap.h>
-#include "gpiomux.h"
-/* Bits of interest in the GPIO_IN_OUT register.
- */
-enum {
-        GPIO_IN  = 0,
-        GPIO_OUT = 1
-};
-/* Bits of interest in the GPIO_INTR_STATUS register.
- */
-enum {
-        INTR_STATUS = 0,
-};
-/* Bits of interest in the GPIO_CFG register.
- */
-enum {
-        GPIO_OE = 9,
-};
-/* Bits of interest in the GPIO_INTR_CFG register.
- * When a GPIO triggers, two separate decisions are made, controlled
- * by two separate flags.
- *
- * - First, INTR_RAW_STATUS_EN controls whether or not the GPIO_INTR_STATUS
- * register for that GPIO will be updated to reflect the triggering of that
- * gpio.  If this bit is 0, this register will not be updated.
- * - Second, INTR_ENABLE controls whether an interrupt is triggered.
- *
- * If INTR_ENABLE is set and INTR_RAW_STATUS_EN is NOT set, an interrupt
- * can be triggered but the status register will not reflect it.
- */
-enum {
-        INTR_ENABLE        = 0,
-        INTR_POL_CTL       = 1,
-        INTR_DECT_CTL      = 2,
-        INTR_RAW_STATUS_EN = 3,
-};
-/* Codes of interest in GPIO_INTR_CFG_SU.
- */
-enum {
-        TARGET_PROC_SCORPION = 4,
-        TARGET_PROC_NONE     = 7,
-};
-#define GPIO_INTR_CFG_SU(gpio)    (MSM_TLMM_BASE + 0x0400 + (0x04 * (gpio)))
-#define GPIO_CONFIG(gpio)         (MSM_TLMM_BASE + 0x1000 + (0x10 * (gpio)))
-#define GPIO_IN_OUT(gpio)         (MSM_TLMM_BASE + 0x1004 + (0x10 * (gpio)))
-#define GPIO_INTR_CFG(gpio)       (MSM_TLMM_BASE + 0x1008 + (0x10 * (gpio)))
-#define GPIO_INTR_STATUS(gpio)    (MSM_TLMM_BASE + 0x100c + (0x10 * (gpio)))
-/**
- * struct msm_gpio_dev: the MSM8660 SoC GPIO device structure
- *
- * @enabled_irqs: a bitmap used to optimize the summary-irq handler.  By
- * keeping track of which gpios are unmasked as irq sources, we avoid
- * having to do readl calls on hundreds of iomapped registers each time
- * the summary interrupt fires in order to locate the active interrupts.
- *
- * @wake_irqs: a bitmap for tracking which interrupt lines are enabled
- * as wakeup sources.  When the device is suspended, interrupts which are
- * not wakeup sources are disabled.
- *
- * @dual_edge_irqs: a bitmap used to track which irqs are configured
- * as dual-edge, as this is not supported by the hardware and requires
- * some special handling in the driver.
- */
-struct msm_gpio_dev {
-        struct gpio_chip gpio_chip;
-        DECLARE_BITMAP(enabled_irqs, NR_GPIO_IRQS);
-        DECLARE_BITMAP(wake_irqs, NR_GPIO_IRQS);
-        DECLARE_BITMAP(dual_edge_irqs, NR_GPIO_IRQS);
-};
-static DEFINE_SPINLOCK(tlmm_lock);
-static inline struct msm_gpio_dev *to_msm_gpio_dev(struct gpio_chip *chip)
-{
-        return container_of(chip, struct msm_gpio_dev, gpio_chip);
-}
-static inline void set_gpio_bits(unsigned n, void __iomem *reg)
-{
-        writel(readl(reg) | n, reg);
-}
-static inline void clear_gpio_bits(unsigned n, void __iomem *reg)
-{
-        writel(readl(reg) & ~n, reg);
-}
-static int msm_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
-        return readl(GPIO_IN_OUT(offset)) & BIT(GPIO_IN);
-}
-static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
-{
-        writel(val ? BIT(GPIO_OUT) : 0, GPIO_IN_OUT(offset));
-}
-static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-{
-        unsigned long irq_flags;
-        spin_lock_irqsave(&tlmm_lock, irq_flags);
-        clear_gpio_bits(BIT(GPIO_OE), GPIO_CONFIG(offset));
-        spin_unlock_irqrestore(&tlmm_lock, irq_flags);
-        return 0;
-}
-static int msm_gpio_direction_output(struct gpio_chip *chip,
-                                unsigned offset,
-                                int val)
-{
-        unsigned long irq_flags;
-        spin_lock_irqsave(&tlmm_lock, irq_flags);
-        msm_gpio_set(chip, offset, val);
-        set_gpio_bits(BIT(GPIO_OE), GPIO_CONFIG(offset));
-        spin_unlock_irqrestore(&tlmm_lock, irq_flags);
-        return 0;
-}
-static int msm_gpio_request(struct gpio_chip *chip, unsigned offset)
-{
-        return msm_gpiomux_get(chip->base + offset);
-}
-static void msm_gpio_free(struct gpio_chip *chip, unsigned offset)
-{
-        msm_gpiomux_put(chip->base + offset);
-}
-static int msm_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
-{
-        return MSM_GPIO_TO_INT(chip->base + offset);
-}
-static inline int msm_irq_to_gpio(struct gpio_chip *chip, unsigned irq)
-{
-        return irq - MSM_GPIO_TO_INT(chip->base);
-}
-static struct msm_gpio_dev msm_gpio = {
-        .gpio_chip = {
-                .base             = 0,
-                .ngpio            = NR_GPIO_IRQS,
-                .direction_input  = msm_gpio_direction_input,
-                .direction_output = msm_gpio_direction_output,
-                .get              = msm_gpio_get,
-                .set              = msm_gpio_set,
-                .to_irq           = msm_gpio_to_irq,
-                .request          = msm_gpio_request,
-                .free             = msm_gpio_free,
-        },
-};
-/* For dual-edge interrupts in software, since the hardware has no
- * such support:
- *
- * At appropriate moments, this function may be called to flip the polarity
- * settings of both-edge irq lines to try and catch the next edge.
- *
- * The attempt is considered successful if:
- * - the status bit goes high, indicating that an edge was caught, or
- * - the input value of the gpio doesn't change during the attempt.
- * If the value changes twice during the process, that would cause the first
- * test to fail but would force the second, as two opposite
- * transitions would cause a detection no matter the polarity setting.
- *
- * The do-loop tries to sledge-hammer closed the timing hole between
- * the initial value-read and the polarity-write - if the line value changes
- * during that window, an interrupt is lost, the new polarity setting is
- * incorrect, and the first success test will fail, causing a retry.
- *
- * Algorithm comes from Google's msmgpio driver, see mach-msm/gpio.c.
- */
-static void msm_gpio_update_dual_edge_pos(unsigned gpio)
-{
-        int loop_limit = 100;
-        unsigned val, val2, intstat;
-        do {
-                val = readl(GPIO_IN_OUT(gpio)) & BIT(GPIO_IN);
-                if (val)
-                        clear_gpio_bits(BIT(INTR_POL_CTL), GPIO_INTR_CFG(gpio));
-                else
-                        set_gpio_bits(BIT(INTR_POL_CTL), GPIO_INTR_CFG(gpio));
-                val2 = readl(GPIO_IN_OUT(gpio)) & BIT(GPIO_IN);
-                intstat = readl(GPIO_INTR_STATUS(gpio)) & BIT(INTR_STATUS);
-                if (intstat || val == val2)
-                        return;
-        } while (loop_limit-- > 0);
-        pr_err("dual-edge irq failed to stabilize, "
-               "interrupts dropped. %#08x != %#08x\n",
-               val, val2);
-}
-static void msm_gpio_irq_ack(struct irq_data *d)
-{
-        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
-        writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio));
-        if (test_bit(gpio, msm_gpio.dual_edge_irqs))
-                msm_gpio_update_dual_edge_pos(gpio);
-}
-static void msm_gpio_irq_mask(struct irq_data *d)
-{
-        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
-        unsigned long irq_flags;
-        spin_lock_irqsave(&tlmm_lock, irq_flags);
-        writel(TARGET_PROC_NONE, GPIO_INTR_CFG_SU(gpio));
-        clear_gpio_bits(INTR_RAW_STATUS_EN | INTR_ENABLE, GPIO_INTR_CFG(gpio));
-        __clear_bit(gpio, msm_gpio.enabled_irqs);
-        spin_unlock_irqrestore(&tlmm_lock, irq_flags);
-}
-static void msm_gpio_irq_unmask(struct irq_data *d)
-{
-        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
-        unsigned long irq_flags;
-        spin_lock_irqsave(&tlmm_lock, irq_flags);
-        __set_bit(gpio, msm_gpio.enabled_irqs);
-        set_gpio_bits(INTR_RAW_STATUS_EN | INTR_ENABLE, GPIO_INTR_CFG(gpio));
-        writel(TARGET_PROC_SCORPION, GPIO_INTR_CFG_SU(gpio));
-        spin_unlock_irqrestore(&tlmm_lock, irq_flags);
-}
-static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
-{
-        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
-        unsigned long irq_flags;
-        uint32_t bits;
-        spin_lock_irqsave(&tlmm_lock, irq_flags);
-        bits = readl(GPIO_INTR_CFG(gpio));
-        if (flow_type & IRQ_TYPE_EDGE_BOTH) {
-                bits |= BIT(INTR_DECT_CTL);
-                __irq_set_handler_locked(d->irq, handle_edge_irq);
-                if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
-                        __set_bit(gpio, msm_gpio.dual_edge_irqs);
-                else
-                        __clear_bit(gpio, msm_gpio.dual_edge_irqs);
-        } else {
-                bits &= ~BIT(INTR_DECT_CTL);
-                __irq_set_handler_locked(d->irq, handle_level_irq);
-                __clear_bit(gpio, msm_gpio.dual_edge_irqs);
-        }
-        if (flow_type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH))
-                bits |= BIT(INTR_POL_CTL);
-        else
-                bits &= ~BIT(INTR_POL_CTL);
-        writel(bits, GPIO_INTR_CFG(gpio));
-        if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
-                msm_gpio_update_dual_edge_pos(gpio);
-        spin_unlock_irqrestore(&tlmm_lock, irq_flags);
-        return 0;
-}
-/*
- * When the summary IRQ is raised, any number of GPIO lines may be high.
- * It is the job of the summary handler to find all those GPIO lines
- * which have been set as summary IRQ lines and which are triggered,
- * and to call their interrupt handlers.
- */
-static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
-{
-        unsigned long i;
-        struct irq_chip *chip = irq_desc_get_chip(desc);
-        chained_irq_enter(chip, desc);
-        for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS);
-             i < NR_GPIO_IRQS;
-             i = find_next_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS, i + 1)) {
-                if (readl(GPIO_INTR_STATUS(i)) & BIT(INTR_STATUS))
-                        generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip,
-                                                           i));
-        }
-        chained_irq_exit(chip, desc);
-}
-static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
-{
-        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
-        if (on) {
-                if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
-                        irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1);
-                set_bit(gpio, msm_gpio.wake_irqs);
-        } else {
-                clear_bit(gpio, msm_gpio.wake_irqs);
-                if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
-                        irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0);
-        }
-        return 0;
-}
-static struct irq_chip msm_gpio_irq_chip = {
-        .name           = "msmgpio",
-        .irq_mask       = msm_gpio_irq_mask,
-        .irq_unmask     = msm_gpio_irq_unmask,
-        .irq_ack        = msm_gpio_irq_ack,
-        .irq_set_type   = msm_gpio_irq_set_type,
-        .irq_set_wake   = msm_gpio_irq_set_wake,
-};
-static int __devinit msm_gpio_probe(struct platform_device *dev)
-{
-        int i, irq, ret;
-        bitmap_zero(msm_gpio.enabled_irqs, NR_GPIO_IRQS);
-        bitmap_zero(msm_gpio.wake_irqs, NR_GPIO_IRQS);
-        bitmap_zero(msm_gpio.dual_edge_irqs, NR_GPIO_IRQS);
-        msm_gpio.gpio_chip.label = dev->name;
-        ret = gpiochip_add(&msm_gpio.gpio_chip);
-        if (ret < 0)
-                return ret;
-        for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) {
-                irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i);
-                irq_set_chip_and_handler(irq, &msm_gpio_irq_chip,
-                                         handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
-        }
-        irq_set_chained_handler(TLMM_SCSS_SUMMARY_IRQ,
-                                msm_summary_irq_handler);
-        return 0;
-}
-static int __devexit msm_gpio_remove(struct platform_device *dev)
-{
-        int ret = gpiochip_remove(&msm_gpio.gpio_chip);
-        if (ret < 0)
-                return ret;
-        irq_set_handler(TLMM_SCSS_SUMMARY_IRQ, NULL);
-        return 0;
-}
-static struct platform_driver msm_gpio_driver = {
-        .probe = msm_gpio_probe,
-        .remove = __devexit_p(msm_gpio_remove),
-        .driver = {
-                .name = "msmgpio",
-                .owner = THIS_MODULE,
-        },
-};
-static struct platform_device msm_device_gpio = {
-        .name = "msmgpio",
-        .id   = -1,
-};
-static int __init msm_gpio_init(void)
-{
-        int rc;
-        rc = platform_driver_register(&msm_gpio_driver);
-        if (!rc) {
-                rc = platform_device_register(&msm_device_gpio);
-                if (rc)
-                        platform_driver_unregister(&msm_gpio_driver);
-        }
-        return rc;
-}
-static void __exit msm_gpio_exit(void)
-{
-        platform_device_unregister(&msm_device_gpio);
-        platform_driver_unregister(&msm_gpio_driver);
-}
-postcore_initcall(msm_gpio_init);
-module_exit(msm_gpio_exit);
-MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
-MODULE_DESCRIPTION("Driver for Qualcomm MSM TLMMv2 SoC GPIOs");
-MODULE_LICENSE("GPL v2");
-MODULE_ALIAS("platform:msmgpio");
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
deleted file mode 100644
index 5ea273b00da8..000000000000
--- a/arch/arm/mach-msm/gpio.c
+++ /dev/null
@@ -1,376 +0,0 @@
-/* linux/arch/arm/mach-msm/gpio.c
- *
- * Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#include <linux/bitops.h>
-#include <linux/gpio.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/module.h>
-#include "gpio_hw.h"
-#include "gpiomux.h"
-#define FIRST_GPIO_IRQ MSM_GPIO_TO_INT(0)
-#define MSM_GPIO_BANK(bank, first, last)                                \
-        {                                                               \
-                .regs = {                                               \
-                        .out =         MSM_GPIO_OUT_##bank,             \
-                        .in =          MSM_GPIO_IN_##bank,              \
-                        .int_status =  MSM_GPIO_INT_STATUS_##bank,      \
-                        .int_clear =   MSM_GPIO_INT_CLEAR_##bank,       \
-                        .int_en =      MSM_GPIO_INT_EN_##bank,          \
-                        .int_edge =    MSM_GPIO_INT_EDGE_##bank,        \
-                        .int_pos =     MSM_GPIO_INT_POS_##bank,         \
-                        .oe =          MSM_GPIO_OE_##bank,              \
-                },                                                      \
-                .chip = {                                               \
-                        .base = (first),                                \
-                        .ngpio = (last) - (first) + 1,                  \
-                        .get = msm_gpio_get,                            \
-                        .set = msm_gpio_set,                            \
-                        .direction_input = msm_gpio_direction_input,    \
-                        .direction_output = msm_gpio_direction_output,  \
-                        .to_irq = msm_gpio_to_irq,                      \
-                        .request = msm_gpio_request,                    \
-                        .free = msm_gpio_free,                          \
-                }                                                       \
-        }
-#define MSM_GPIO_BROKEN_INT_CLEAR 1
-struct msm_gpio_regs {
-        void __iomem *out;
-        void __iomem *in;
-        void __iomem *int_status;
-        void __iomem *int_clear;
-        void __iomem *int_en;
-        void __iomem *int_edge;
-        void __iomem *int_pos;
-        void __iomem *oe;
-};
-struct msm_gpio_chip {
-        spinlock_t              lock;
-        struct gpio_chip        chip;
-        struct msm_gpio_regs    regs;
-#if MSM_GPIO_BROKEN_INT_CLEAR
-        unsigned                int_status_copy;
-#endif
-        unsigned int            both_edge_detect;
-        unsigned int            int_enable[2]; /* 0: awake, 1: sleep */
-};
-static int msm_gpio_write(struct msm_gpio_chip *msm_chip,
-                          unsigned offset, unsigned on)
-{
-        unsigned mask = BIT(offset);
-        unsigned val;
-        val = readl(msm_chip->regs.out);
-        if (on)
-                writel(val | mask, msm_chip->regs.out);
-        else
-                writel(val & ~mask, msm_chip->regs.out);
-        return 0;
-}
-static void msm_gpio_update_both_edge_detect(struct msm_gpio_chip *msm_chip)
-{
-        int loop_limit = 100;
-        unsigned pol, val, val2, intstat;
-        do {
-                val = readl(msm_chip->regs.in);
-                pol = readl(msm_chip->regs.int_pos);
-                pol = (pol & ~msm_chip->both_edge_detect) |
-                      (~val & msm_chip->both_edge_detect);
-                writel(pol, msm_chip->regs.int_pos);
-                intstat = readl(msm_chip->regs.int_status);
-                val2 = readl(msm_chip->regs.in);
-                if (((val ^ val2) & msm_chip->both_edge_detect & ~intstat) == 0)
-                        return;
-        } while (loop_limit-- > 0);
-        printk(KERN_ERR "msm_gpio_update_both_edge_detect, "
-               "failed to reach stable state %x != %x\n", val, val2);
-}
-static int msm_gpio_clear_detect_status(struct msm_gpio_chip *msm_chip,
-                                        unsigned offset)
-{
-        unsigned bit = BIT(offset);
-#if MSM_GPIO_BROKEN_INT_CLEAR
-        /* Save interrupts that already triggered before we loose them. */
-        /* Any interrupt that triggers between the read of int_status */
-        /* and the write to int_clear will still be lost though. */
-        msm_chip->int_status_copy |= readl(msm_chip->regs.int_status);
-        msm_chip->int_status_copy &= ~bit;
-#endif
-        writel(bit, msm_chip->regs.int_clear);
-        msm_gpio_update_both_edge_detect(msm_chip);
-        return 0;
-}
-static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-{
-        struct msm_gpio_chip *msm_chip;
-        unsigned long irq_flags;
-        msm_chip = container_of(chip, struct msm_gpio_chip, chip);
-        spin_lock_irqsave(&msm_chip->lock, irq_flags);
-        writel(readl(msm_chip->regs.oe) & ~BIT(offset), msm_chip->regs.oe);
-        spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-        return 0;
-}
-static int
-msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value)
-{
-        struct msm_gpio_chip *msm_chip;
-        unsigned long irq_flags;
-        msm_chip = container_of(chip, struct msm_gpio_chip, chip);
-        spin_lock_irqsave(&msm_chip->lock, irq_flags);
-        msm_gpio_write(msm_chip, offset, value);
-        writel(readl(msm_chip->regs.oe) | BIT(offset), msm_chip->regs.oe);
-        spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-        return 0;
-}
-static int msm_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
-        struct msm_gpio_chip *msm_chip;
-        msm_chip = container_of(chip, struct msm_gpio_chip, chip);
-        return (readl(msm_chip->regs.in) & (1U << offset)) ? 1 : 0;
-}
-static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
-        struct msm_gpio_chip *msm_chip;
-        unsigned long irq_flags;
-        msm_chip = container_of(chip, struct msm_gpio_chip, chip);
-        spin_lock_irqsave(&msm_chip->lock, irq_flags);
-        msm_gpio_write(msm_chip, offset, value);
-        spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-}
-static int msm_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
-{
-        return MSM_GPIO_TO_INT(chip->base + offset);
-}
-#ifdef CONFIG_MSM_GPIOMUX
-static int msm_gpio_request(struct gpio_chip *chip, unsigned offset)
-{
-        return msm_gpiomux_get(chip->base + offset);
-}
-static void msm_gpio_free(struct gpio_chip *chip, unsigned offset)
-{
-        msm_gpiomux_put(chip->base + offset);
-}
-#else
-#define msm_gpio_request NULL
-#define msm_gpio_free NULL
-#endif
-struct msm_gpio_chip msm_gpio_chips[] = {
-#if defined(CONFIG_ARCH_MSM7X00A)
-        MSM_GPIO_BANK(0,   0,  15),
-        MSM_GPIO_BANK(1,  16,  42),
-        MSM_GPIO_BANK(2,  43,  67),
-        MSM_GPIO_BANK(3,  68,  94),
-        MSM_GPIO_BANK(4,  95, 106),
-        MSM_GPIO_BANK(5, 107, 121),
-#elif defined(CONFIG_ARCH_MSM7X25) || defined(CONFIG_ARCH_MSM7X27)
-        MSM_GPIO_BANK(0,   0,  15),
-        MSM_GPIO_BANK(1,  16,  42),
-        MSM_GPIO_BANK(2,  43,  67),
-        MSM_GPIO_BANK(3,  68,  94),
-        MSM_GPIO_BANK(4,  95, 106),
-        MSM_GPIO_BANK(5, 107, 132),
-#elif defined(CONFIG_ARCH_MSM7X30)
-        MSM_GPIO_BANK(0,   0,  15),
-        MSM_GPIO_BANK(1,  16,  43),
-        MSM_GPIO_BANK(2,  44,  67),
-        MSM_GPIO_BANK(3,  68,  94),
-        MSM_GPIO_BANK(4,  95, 106),
-        MSM_GPIO_BANK(5, 107, 133),
-        MSM_GPIO_BANK(6, 134, 150),
-        MSM_GPIO_BANK(7, 151, 181),
-#elif defined(CONFIG_ARCH_QSD8X50)
-        MSM_GPIO_BANK(0,   0,  15),
-        MSM_GPIO_BANK(1,  16,  42),
-        MSM_GPIO_BANK(2,  43,  67),
-        MSM_GPIO_BANK(3,  68,  94),
-        MSM_GPIO_BANK(4,  95, 103),
-        MSM_GPIO_BANK(5, 104, 121),
-        MSM_GPIO_BANK(6, 122, 152),
-        MSM_GPIO_BANK(7, 153, 164),
-#endif
-};
-static void msm_gpio_irq_ack(struct irq_data *d)
-{
-        unsigned long irq_flags;
-        struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
-        spin_lock_irqsave(&msm_chip->lock, irq_flags);
-        msm_gpio_clear_detect_status(msm_chip,
-                                     d->irq - gpio_to_irq(msm_chip->chip.base));
-        spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-}
-static void msm_gpio_irq_mask(struct irq_data *d)
-{
-        unsigned long irq_flags;
-        struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
-        unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
-        spin_lock_irqsave(&msm_chip->lock, irq_flags);
-        /* level triggered interrupts are also latched */
-        if (!(readl(msm_chip->regs.int_edge) & BIT(offset)))
-                msm_gpio_clear_detect_status(msm_chip, offset);
-        msm_chip->int_enable[0] &= ~BIT(offset);
-        writel(msm_chip->int_enable[0], msm_chip->regs.int_en);
-        spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-}
-static void msm_gpio_irq_unmask(struct irq_data *d)
-{
-        unsigned long irq_flags;
-        struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
-        unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
-        spin_lock_irqsave(&msm_chip->lock, irq_flags);
-        /* level triggered interrupts are also latched */
-        if (!(readl(msm_chip->regs.int_edge) & BIT(offset)))
-                msm_gpio_clear_detect_status(msm_chip, offset);
-        msm_chip->int_enable[0] |= BIT(offset);
-        writel(msm_chip->int_enable[0], msm_chip->regs.int_en);
-        spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-}
-static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
-{
-        unsigned long irq_flags;
-        struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
-        unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
-        spin_lock_irqsave(&msm_chip->lock, irq_flags);
-        if (on)
-                msm_chip->int_enable[1] |= BIT(offset);
-        else
-                msm_chip->int_enable[1] &= ~BIT(offset);
-        spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-        return 0;
-}
-static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
-{
-        unsigned long irq_flags;
-        struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
-        unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
-        unsigned val, mask = BIT(offset);
-        spin_lock_irqsave(&msm_chip->lock, irq_flags);
-        val = readl(msm_chip->regs.int_edge);
-        if (flow_type & IRQ_TYPE_EDGE_BOTH) {
-                writel(val | mask, msm_chip->regs.int_edge);
-                __irq_set_handler_locked(d->irq, handle_edge_irq);
-        } else {
-                writel(val & ~mask, msm_chip->regs.int_edge);
-                __irq_set_handler_locked(d->irq, handle_level_irq);
-        }
-        if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
-                msm_chip->both_edge_detect |= mask;
-                msm_gpio_update_both_edge_detect(msm_chip);
-        } else {
-                msm_chip->both_edge_detect &= ~mask;
-                val = readl(msm_chip->regs.int_pos);
-                if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH))
-                        writel(val | mask, msm_chip->regs.int_pos);
-                else
-                        writel(val & ~mask, msm_chip->regs.int_pos);
-        }
-        spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-        return 0;
-}
-static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
-{
-        int i, j, mask;
-        unsigned val;
-        for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) {
-                struct msm_gpio_chip *msm_chip = &msm_gpio_chips[i];
-                val = readl(msm_chip->regs.int_status);
-                val &= msm_chip->int_enable[0];
-                while (val) {
-                        mask = val & -val;
-                        j = fls(mask) - 1;
-                        /* printk("%s %08x %08x bit %d gpio %d irq %d\n",
-                                __func__, v, m, j, msm_chip->chip.start + j,
-                                FIRST_GPIO_IRQ + msm_chip->chip.start + j); */
-                        val &= ~mask;
-                        generic_handle_irq(FIRST_GPIO_IRQ +
-                                           msm_chip->chip.base + j);
-                }
-        }
-        desc->irq_data.chip->irq_ack(&desc->irq_data);
-}
-static struct irq_chip msm_gpio_irq_chip = {
-        .name          = "msmgpio",
-        .irq_ack       = msm_gpio_irq_ack,
-        .irq_mask      = msm_gpio_irq_mask,
-        .irq_unmask    = msm_gpio_irq_unmask,
-        .irq_set_wake  = msm_gpio_irq_set_wake,
-        .irq_set_type  = msm_gpio_irq_set_type,
-};
-static int __init msm_init_gpio(void)
-{
-        int i, j = 0;
-        for (i = FIRST_GPIO_IRQ; i < FIRST_GPIO_IRQ + NR_GPIO_IRQS; i++) {
-                if (i - FIRST_GPIO_IRQ >=
-                        msm_gpio_chips[j].chip.base +
-                        msm_gpio_chips[j].chip.ngpio)
-                        j++;
-                irq_set_chip_data(i, &msm_gpio_chips[j]);
-                irq_set_chip_and_handler(i, &msm_gpio_irq_chip,
-                                         handle_edge_irq);
-                set_irq_flags(i, IRQF_VALID);
-        }
-        for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) {
-                spin_lock_init(&msm_gpio_chips[i].lock);
-                writel(0, msm_gpio_chips[i].regs.int_en);
-                gpiochip_add(&msm_gpio_chips[i].chip);
-        }
-        irq_set_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler);
-        irq_set_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler);
-        irq_set_irq_wake(INT_GPIO_GROUP1, 1);
-        irq_set_irq_wake(INT_GPIO_GROUP2, 2);
-        return 0;
-}
-postcore_initcall(msm_init_gpio);
diff --git a/arch/arm/mach-msm/gpio_hw.h b/arch/arm/mach-msm/gpio_hw.h
deleted file mode 100644
index 6b5066038baa..000000000000
--- a/arch/arm/mach-msm/gpio_hw.h
+++ /dev/null
@@ -1,278 +0,0 @@
-/* arch/arm/mach-msm/gpio_hw.h
- *
- * Copyright (C) 2007 Google, Inc.
- * Author: Brian Swetland <swetland@google.com>
- * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#ifndef __ARCH_ARM_MACH_MSM_GPIO_HW_H
-#define __ARCH_ARM_MACH_MSM_GPIO_HW_H
-#include <mach/msm_iomap.h>
-/* see 80-VA736-2 Rev C pp 695-751
-**
-** These are actually the *shadow* gpio registers, since the
-** real ones (which allow full access) are only available to the
-** ARM9 side of the world.
-**
-** Since the _BASE need to be page-aligned when we're mapping them
-** to virtual addresses, adjust for the additional offset in these
-** macros.
-*/
-#if defined(CONFIG_ARCH_MSM7X30)
-#define MSM_GPIO1_REG(off) (MSM_GPIO1_BASE + (off))
-#define MSM_GPIO2_REG(off) (MSM_GPIO2_BASE + 0x400 + (off))
-#else
-#define MSM_GPIO1_REG(off) (MSM_GPIO1_BASE + 0x800 + (off))
-#define MSM_GPIO2_REG(off) (MSM_GPIO2_BASE + 0xC00 + (off))
-#endif
-#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_MSM7X25) ||\
-    defined(CONFIG_ARCH_MSM7X27)
-/* output value */
-#define MSM_GPIO_OUT_0         MSM_GPIO1_REG(0x00)  /* gpio  15-0  */
-#define MSM_GPIO_OUT_1         MSM_GPIO2_REG(0x00)  /* gpio  42-16 */
-#define MSM_GPIO_OUT_2         MSM_GPIO1_REG(0x04)  /* gpio  67-43 */
-#define MSM_GPIO_OUT_3         MSM_GPIO1_REG(0x08)  /* gpio  94-68 */
-#define MSM_GPIO_OUT_4         MSM_GPIO1_REG(0x0C)  /* gpio 106-95 */
-#define MSM_GPIO_OUT_5         MSM_GPIO1_REG(0x50)  /* gpio 107-121 */
-/* same pin map as above, output enable */
-#define MSM_GPIO_OE_0          MSM_GPIO1_REG(0x10)
-#define MSM_GPIO_OE_1          MSM_GPIO2_REG(0x08)
-#define MSM_GPIO_OE_2          MSM_GPIO1_REG(0x14)
-#define MSM_GPIO_OE_3          MSM_GPIO1_REG(0x18)
-#define MSM_GPIO_OE_4          MSM_GPIO1_REG(0x1C)
-#define MSM_GPIO_OE_5          MSM_GPIO1_REG(0x54)
-/* same pin map as above, input read */
-#define MSM_GPIO_IN_0          MSM_GPIO1_REG(0x34)
-#define MSM_GPIO_IN_1          MSM_GPIO2_REG(0x20)
-#define MSM_GPIO_IN_2          MSM_GPIO1_REG(0x38)
-#define MSM_GPIO_IN_3          MSM_GPIO1_REG(0x3C)
-#define MSM_GPIO_IN_4          MSM_GPIO1_REG(0x40)
-#define MSM_GPIO_IN_5          MSM_GPIO1_REG(0x44)
-/* same pin map as above, 1=edge 0=level interrup */
-#define MSM_GPIO_INT_EDGE_0    MSM_GPIO1_REG(0x60)
-#define MSM_GPIO_INT_EDGE_1    MSM_GPIO2_REG(0x50)
-#define MSM_GPIO_INT_EDGE_2    MSM_GPIO1_REG(0x64)
-#define MSM_GPIO_INT_EDGE_3    MSM_GPIO1_REG(0x68)
-#define MSM_GPIO_INT_EDGE_4    MSM_GPIO1_REG(0x6C)
-#define MSM_GPIO_INT_EDGE_5    MSM_GPIO1_REG(0xC0)
-/* same pin map as above, 1=positive 0=negative */
-#define MSM_GPIO_INT_POS_0     MSM_GPIO1_REG(0x70)
-#define MSM_GPIO_INT_POS_1     MSM_GPIO2_REG(0x58)
-#define MSM_GPIO_INT_POS_2     MSM_GPIO1_REG(0x74)
-#define MSM_GPIO_INT_POS_3     MSM_GPIO1_REG(0x78)
-#define MSM_GPIO_INT_POS_4     MSM_GPIO1_REG(0x7C)
-#define MSM_GPIO_INT_POS_5     MSM_GPIO1_REG(0xBC)
-/* same pin map as above, interrupt enable */
-#define MSM_GPIO_INT_EN_0      MSM_GPIO1_REG(0x80)
-#define MSM_GPIO_INT_EN_1      MSM_GPIO2_REG(0x60)
-#define MSM_GPIO_INT_EN_2      MSM_GPIO1_REG(0x84)
-#define MSM_GPIO_INT_EN_3      MSM_GPIO1_REG(0x88)
-#define MSM_GPIO_INT_EN_4      MSM_GPIO1_REG(0x8C)
-#define MSM_GPIO_INT_EN_5      MSM_GPIO1_REG(0xB8)
-/* same pin map as above, write 1 to clear interrupt */
-#define MSM_GPIO_INT_CLEAR_0   MSM_GPIO1_REG(0x90)
-#define MSM_GPIO_INT_CLEAR_1   MSM_GPIO2_REG(0x68)
-#define MSM_GPIO_INT_CLEAR_2   MSM_GPIO1_REG(0x94)
-#define MSM_GPIO_INT_CLEAR_3   MSM_GPIO1_REG(0x98)
-#define MSM_GPIO_INT_CLEAR_4   MSM_GPIO1_REG(0x9C)
-#define MSM_GPIO_INT_CLEAR_5   MSM_GPIO1_REG(0xB4)
-/* same pin map as above, 1=interrupt pending */
-#define MSM_GPIO_INT_STATUS_0  MSM_GPIO1_REG(0xA0)
-#define MSM_GPIO_INT_STATUS_1  MSM_GPIO2_REG(0x70)
-#define MSM_GPIO_INT_STATUS_2  MSM_GPIO1_REG(0xA4)
-#define MSM_GPIO_INT_STATUS_3  MSM_GPIO1_REG(0xA8)
-#define MSM_GPIO_INT_STATUS_4  MSM_GPIO1_REG(0xAC)
-#define MSM_GPIO_INT_STATUS_5  MSM_GPIO1_REG(0xB0)
-#endif
-#if defined(CONFIG_ARCH_QSD8X50)
-/* output value */
-#define MSM_GPIO_OUT_0         MSM_GPIO1_REG(0x00)  /* gpio  15-0   */
-#define MSM_GPIO_OUT_1         MSM_GPIO2_REG(0x00)  /* gpio  42-16  */
-#define MSM_GPIO_OUT_2         MSM_GPIO1_REG(0x04)  /* gpio  67-43  */
-#define MSM_GPIO_OUT_3         MSM_GPIO1_REG(0x08)  /* gpio  94-68  */
-#define MSM_GPIO_OUT_4         MSM_GPIO1_REG(0x0C)  /* gpio 103-95  */
-#define MSM_GPIO_OUT_5         MSM_GPIO1_REG(0x10)  /* gpio 121-104 */
-#define MSM_GPIO_OUT_6         MSM_GPIO1_REG(0x14)  /* gpio 152-122 */
-#define MSM_GPIO_OUT_7         MSM_GPIO1_REG(0x18)  /* gpio 164-153 */
-/* same pin map as above, output enable */
-#define MSM_GPIO_OE_0          MSM_GPIO1_REG(0x20)
-#define MSM_GPIO_OE_1          MSM_GPIO2_REG(0x08)
-#define MSM_GPIO_OE_2          MSM_GPIO1_REG(0x24)
-#define MSM_GPIO_OE_3          MSM_GPIO1_REG(0x28)
-#define MSM_GPIO_OE_4          MSM_GPIO1_REG(0x2C)
-#define MSM_GPIO_OE_5          MSM_GPIO1_REG(0x30)
-#define MSM_GPIO_OE_6          MSM_GPIO1_REG(0x34)
-#define MSM_GPIO_OE_7          MSM_GPIO1_REG(0x38)
-/* same pin map as above, input read */
-#define MSM_GPIO_IN_0          MSM_GPIO1_REG(0x50)
-#define MSM_GPIO_IN_1          MSM_GPIO2_REG(0x20)
-#define MSM_GPIO_IN_2          MSM_GPIO1_REG(0x54)
-#define MSM_GPIO_IN_3          MSM_GPIO1_REG(0x58)
-#define MSM_GPIO_IN_4          MSM_GPIO1_REG(0x5C)
-#define MSM_GPIO_IN_5          MSM_GPIO1_REG(0x60)
-#define MSM_GPIO_IN_6          MSM_GPIO1_REG(0x64)
-#define MSM_GPIO_IN_7          MSM_GPIO1_REG(0x68)
-/* same pin map as above, 1=edge 0=level interrup */
-#define MSM_GPIO_INT_EDGE_0    MSM_GPIO1_REG(0x70)
-#define MSM_GPIO_INT_EDGE_1    MSM_GPIO2_REG(0x50)
-#define MSM_GPIO_INT_EDGE_2    MSM_GPIO1_REG(0x74)
-#define MSM_GPIO_INT_EDGE_3    MSM_GPIO1_REG(0x78)
-#define MSM_GPIO_INT_EDGE_4    MSM_GPIO1_REG(0x7C)
-#define MSM_GPIO_INT_EDGE_5    MSM_GPIO1_REG(0x80)
-#define MSM_GPIO_INT_EDGE_6    MSM_GPIO1_REG(0x84)
-#define MSM_GPIO_INT_EDGE_7    MSM_GPIO1_REG(0x88)
-/* same pin map as above, 1=positive 0=negative */
-#define MSM_GPIO_INT_POS_0     MSM_GPIO1_REG(0x90)
-#define MSM_GPIO_INT_POS_1     MSM_GPIO2_REG(0x58)
-#define MSM_GPIO_INT_POS_2     MSM_GPIO1_REG(0x94)
-#define MSM_GPIO_INT_POS_3     MSM_GPIO1_REG(0x98)
-#define MSM_GPIO_INT_POS_4     MSM_GPIO1_REG(0x9C)
-#define MSM_GPIO_INT_POS_5     MSM_GPIO1_REG(0xA0)
-#define MSM_GPIO_INT_POS_6     MSM_GPIO1_REG(0xA4)
-#define MSM_GPIO_INT_POS_7     MSM_GPIO1_REG(0xA8)
-/* same pin map as above, interrupt enable */
-#define MSM_GPIO_INT_EN_0      MSM_GPIO1_REG(0xB0)
-#define MSM_GPIO_INT_EN_1      MSM_GPIO2_REG(0x60)
-#define MSM_GPIO_INT_EN_2      MSM_GPIO1_REG(0xB4)
-#define MSM_GPIO_INT_EN_3      MSM_GPIO1_REG(0xB8)
-#define MSM_GPIO_INT_EN_4      MSM_GPIO1_REG(0xBC)
-#define MSM_GPIO_INT_EN_5      MSM_GPIO1_REG(0xC0)
-#define MSM_GPIO_INT_EN_6      MSM_GPIO1_REG(0xC4)
-#define MSM_GPIO_INT_EN_7      MSM_GPIO1_REG(0xC8)
-/* same pin map as above, write 1 to clear interrupt */
-#define MSM_GPIO_INT_CLEAR_0   MSM_GPIO1_REG(0xD0)
-#define MSM_GPIO_INT_CLEAR_1   MSM_GPIO2_REG(0x68)
-#define MSM_GPIO_INT_CLEAR_2   MSM_GPIO1_REG(0xD4)
-#define MSM_GPIO_INT_CLEAR_3   MSM_GPIO1_REG(0xD8)
-#define MSM_GPIO_INT_CLEAR_4   MSM_GPIO1_REG(0xDC)
-#define MSM_GPIO_INT_CLEAR_5   MSM_GPIO1_REG(0xE0)
-#define MSM_GPIO_INT_CLEAR_6   MSM_GPIO1_REG(0xE4)
-#define MSM_GPIO_INT_CLEAR_7   MSM_GPIO1_REG(0xE8)
-/* same pin map as above, 1=interrupt pending */
-#define MSM_GPIO_INT_STATUS_0  MSM_GPIO1_REG(0xF0)
-#define MSM_GPIO_INT_STATUS_1  MSM_GPIO2_REG(0x70)
-#define MSM_GPIO_INT_STATUS_2  MSM_GPIO1_REG(0xF4)
-#define MSM_GPIO_INT_STATUS_3  MSM_GPIO1_REG(0xF8)
-#define MSM_GPIO_INT_STATUS_4  MSM_GPIO1_REG(0xFC)
-#define MSM_GPIO_INT_STATUS_5  MSM_GPIO1_REG(0x100)
-#define MSM_GPIO_INT_STATUS_6  MSM_GPIO1_REG(0x104)
-#define MSM_GPIO_INT_STATUS_7  MSM_GPIO1_REG(0x108)
-#endif
-#if defined(CONFIG_ARCH_MSM7X30)
-/* output value */
-#define MSM_GPIO_OUT_0         MSM_GPIO1_REG(0x00)   /* gpio  15-0   */
-#define MSM_GPIO_OUT_1         MSM_GPIO2_REG(0x00)   /* gpio  43-16  */
-#define MSM_GPIO_OUT_2         MSM_GPIO1_REG(0x04)   /* gpio  67-44  */
-#define MSM_GPIO_OUT_3         MSM_GPIO1_REG(0x08)   /* gpio  94-68  */
-#define MSM_GPIO_OUT_4         MSM_GPIO1_REG(0x0C)   /* gpio 106-95  */
-#define MSM_GPIO_OUT_5         MSM_GPIO1_REG(0x50)   /* gpio 133-107 */
-#define MSM_GPIO_OUT_6         MSM_GPIO1_REG(0xC4)   /* gpio 150-134 */
-#define MSM_GPIO_OUT_7         MSM_GPIO1_REG(0x214)  /* gpio 181-151 */
-/* same pin map as above, output enable */
-#define MSM_GPIO_OE_0          MSM_GPIO1_REG(0x10)
-#define MSM_GPIO_OE_1          MSM_GPIO2_REG(0x08)
-#define MSM_GPIO_OE_2          MSM_GPIO1_REG(0x14)
-#define MSM_GPIO_OE_3          MSM_GPIO1_REG(0x18)
-#define MSM_GPIO_OE_4          MSM_GPIO1_REG(0x1C)
-#define MSM_GPIO_OE_5          MSM_GPIO1_REG(0x54)
-#define MSM_GPIO_OE_6          MSM_GPIO1_REG(0xC8)
-#define MSM_GPIO_OE_7          MSM_GPIO1_REG(0x218)
-/* same pin map as above, input read */
-#define MSM_GPIO_IN_0          MSM_GPIO1_REG(0x34)
-#define MSM_GPIO_IN_1          MSM_GPIO2_REG(0x20)
-#define MSM_GPIO_IN_2          MSM_GPIO1_REG(0x38)
-#define MSM_GPIO_IN_3          MSM_GPIO1_REG(0x3C)
-#define MSM_GPIO_IN_4          MSM_GPIO1_REG(0x40)
-#define MSM_GPIO_IN_5          MSM_GPIO1_REG(0x44)
-#define MSM_GPIO_IN_6          MSM_GPIO1_REG(0xCC)
-#define MSM_GPIO_IN_7          MSM_GPIO1_REG(0x21C)
-/* same pin map as above, 1=edge 0=level interrup */
-#define MSM_GPIO_INT_EDGE_0    MSM_GPIO1_REG(0x60)
-#define MSM_GPIO_INT_EDGE_1    MSM_GPIO2_REG(0x50)
-#define MSM_GPIO_INT_EDGE_2    MSM_GPIO1_REG(0x64)
-#define MSM_GPIO_INT_EDGE_3    MSM_GPIO1_REG(0x68)
-#define MSM_GPIO_INT_EDGE_4    MSM_GPIO1_REG(0x6C)
-#define MSM_GPIO_INT_EDGE_5    MSM_GPIO1_REG(0xC0)
-#define MSM_GPIO_INT_EDGE_6    MSM_GPIO1_REG(0xD0)
-#define MSM_GPIO_INT_EDGE_7    MSM_GPIO1_REG(0x240)
-/* same pin map as above, 1=positive 0=negative */
-#define MSM_GPIO_INT_POS_0     MSM_GPIO1_REG(0x70)
-#define MSM_GPIO_INT_POS_1     MSM_GPIO2_REG(0x58)
-#define MSM_GPIO_INT_POS_2     MSM_GPIO1_REG(0x74)
-#define MSM_GPIO_INT_POS_3     MSM_GPIO1_REG(0x78)
-#define MSM_GPIO_INT_POS_4     MSM_GPIO1_REG(0x7C)
-#define MSM_GPIO_INT_POS_5     MSM_GPIO1_REG(0xBC)
-#define MSM_GPIO_INT_POS_6     MSM_GPIO1_REG(0xD4)
-#define MSM_GPIO_INT_POS_7     MSM_GPIO1_REG(0x228)
-/* same pin map as above, interrupt enable */
-#define MSM_GPIO_INT_EN_0      MSM_GPIO1_REG(0x80)
-#define MSM_GPIO_INT_EN_1      MSM_GPIO2_REG(0x60)
-#define MSM_GPIO_INT_EN_2      MSM_GPIO1_REG(0x84)
-#define MSM_GPIO_INT_EN_3      MSM_GPIO1_REG(0x88)
-#define MSM_GPIO_INT_EN_4      MSM_GPIO1_REG(0x8C)
-#define MSM_GPIO_INT_EN_5      MSM_GPIO1_REG(0xB8)
-#define MSM_GPIO_INT_EN_6      MSM_GPIO1_REG(0xD8)
-#define MSM_GPIO_INT_EN_7      MSM_GPIO1_REG(0x22C)
-/* same pin map as above, write 1 to clear interrupt */
-#define MSM_GPIO_INT_CLEAR_0   MSM_GPIO1_REG(0x90)
-#define MSM_GPIO_INT_CLEAR_1   MSM_GPIO2_REG(0x68)
-#define MSM_GPIO_INT_CLEAR_2   MSM_GPIO1_REG(0x94)
-#define MSM_GPIO_INT_CLEAR_3   MSM_GPIO1_REG(0x98)
-#define MSM_GPIO_INT_CLEAR_4   MSM_GPIO1_REG(0x9C)
-#define MSM_GPIO_INT_CLEAR_5   MSM_GPIO1_REG(0xB4)
-#define MSM_GPIO_INT_CLEAR_6   MSM_GPIO1_REG(0xDC)
-#define MSM_GPIO_INT_CLEAR_7   MSM_GPIO1_REG(0x230)
-/* same pin map as above, 1=interrupt pending */
-#define MSM_GPIO_INT_STATUS_0  MSM_GPIO1_REG(0xA0)
-#define MSM_GPIO_INT_STATUS_1  MSM_GPIO2_REG(0x70)
-#define MSM_GPIO_INT_STATUS_2  MSM_GPIO1_REG(0xA4)
-#define MSM_GPIO_INT_STATUS_3  MSM_GPIO1_REG(0xA8)
-#define MSM_GPIO_INT_STATUS_4  MSM_GPIO1_REG(0xAC)
-#define MSM_GPIO_INT_STATUS_5  MSM_GPIO1_REG(0xB0)
-#define MSM_GPIO_INT_STATUS_6  MSM_GPIO1_REG(0xE0)
-#define MSM_GPIO_INT_STATUS_7  MSM_GPIO1_REG(0x234)
-#endif
-#endif
diff --git a/arch/arm/mach-msm/gpiomux.h b/arch/arm/mach-msm/gpiomux.h
index b178d9cb742f..00459f6ee13c 100644
--- a/arch/arm/mach-msm/gpiomux.h
+++ b/arch/arm/mach-msm/gpiomux.h
@@ -19,6 +19,7 @@
 #include <linux/bitops.h>
 #include <linux/errno.h>
+#include <mach/msm_gpiomux.h>
 #if defined(CONFIG_MSM_V2_TLMM)
 #include "gpiomux-v2.h"
@@ -71,12 +72,6 @@ enum {
 */
 extern struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS];
-/* Increment a gpio's reference count, possibly activating the line. */
-int __must_check msm_gpiomux_get(unsigned gpio);
-/* Decrement a gpio's reference count, possibly suspending the line. */
-int msm_gpiomux_put(unsigned gpio);
 /* Install a new configuration to the gpio line.  To avoid overwriting
 * a configuration, leave the VALID bit out.
 */
@@ -94,16 +89,6 @@ int msm_gpiomux_write(unsigned gpio,
 */
 void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val);
 #else
-static inline int __must_check msm_gpiomux_get(unsigned gpio)
-{
-        return -ENOSYS;
-}
-static inline int msm_gpiomux_put(unsigned gpio)
-{
-        return -ENOSYS;
-}
 static inline int msm_gpiomux_write(unsigned gpio,
                                    gpiomux_config_t active,
                                    gpiomux_config_t suspended)
diff --git a/arch/arm/mach-msm/include/mach/msm_gpiomux.h b/arch/arm/mach-msm/include/mach/msm_gpiomux.h
new file mode 100644
index 000000000000..0c7d3936e02f
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_gpiomux.h
@@ -0,0 +1,38 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef _LINUX_MSM_GPIOMUX_H
+#define _LINUX_MSM_GPIOMUX_H
+#ifdef CONFIG_MSM_GPIOMUX
+/* Increment a gpio's reference count, possibly activating the line. */
+int __must_check msm_gpiomux_get(unsigned gpio);
+/* Decrement a gpio's reference count, possibly suspending the line. */
+int msm_gpiomux_put(unsigned gpio);
+#else
+static inline int __must_check msm_gpiomux_get(unsigned gpio)
+{
+        return -ENOSYS;
+}
+static inline int msm_gpiomux_put(unsigned gpio)
+{
+        return -ENOSYS;
+}
+#endif
+#endif /* _LINUX_MSM_GPIOMUX_H */
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 8f99d97615a0..94fe9fe6feb3 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -55,13 +55,11 @@
 #define MSM_DMOV_PHYS         0xA9700000
 #define MSM_DMOV_SIZE         SZ_4K
-#define MSM_GPIO1_BASE        IOMEM(0xE0003000)
+#define MSM7X00_GPIO1_PHYS        0xA9200000
-#define MSM_GPIO1_PHYS        0xA9200000
+#define MSM7X00_GPIO1_SIZE        SZ_4K
-#define MSM_GPIO1_SIZE        SZ_4K
-#define MSM_GPIO2_BASE        IOMEM(0xE0004000)
+#define MSM7X00_GPIO2_PHYS        0xA9300000
-#define MSM_GPIO2_PHYS        0xA9300000
+#define MSM7X00_GPIO2_SIZE        SZ_4K
-#define MSM_GPIO2_SIZE        SZ_4K
 #define MSM_CLK_CTL_BASE      IOMEM(0xE0005000)
 #define MSM_CLK_CTL_PHYS      0xA8600000
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index 4d84be15955e..37694442d1bd 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -46,13 +46,11 @@
 #define MSM_DMOV_PHYS         0xAC400000
 #define MSM_DMOV_SIZE         SZ_4K
-#define MSM_GPIO1_BASE        IOMEM(0xE0003000)
+#define MSM7X30_GPIO1_PHYS        0xAC001000
-#define MSM_GPIO1_PHYS        0xAC001000
+#define MSM7X30_GPIO1_SIZE        SZ_4K
-#define MSM_GPIO1_SIZE        SZ_4K
-#define MSM_GPIO2_BASE        IOMEM(0xE0004000)
+#define MSM7X30_GPIO2_PHYS        0xAC101000
-#define MSM_GPIO2_PHYS        0xAC101000
+#define MSM7X30_GPIO2_SIZE        SZ_4K
-#define MSM_GPIO2_SIZE        SZ_4K
 #define MSM_CLK_CTL_BASE      IOMEM(0xE0005000)
 #define MSM_CLK_CTL_PHYS      0xAB800000
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index d4143201999f..d67cd73316f4 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -46,13 +46,11 @@
 #define MSM_DMOV_PHYS         0xA9700000
 #define MSM_DMOV_SIZE         SZ_4K
-#define MSM_GPIO1_BASE        IOMEM(0xE0003000)
+#define QSD8X50_GPIO1_PHYS        0xA9000000
-#define MSM_GPIO1_PHYS        0xA9000000
+#define QSD8X50_GPIO1_SIZE        SZ_4K
-#define MSM_GPIO1_SIZE        SZ_4K
-#define MSM_GPIO2_BASE        IOMEM(0xE0004000)
+#define QSD8X50_GPIO2_PHYS        0xA9100000
-#define MSM_GPIO2_PHYS        0xA9100000
+#define QSD8X50_GPIO2_SIZE        SZ_4K
-#define MSM_GPIO2_SIZE        SZ_4K
 #define MSM_CLK_CTL_BASE      IOMEM(0xE0005000)
 #define MSM_CLK_CTL_PHYS      0xA8600000
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 2f494b6a9d0a..4ded15238b60 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -61,5 +61,7 @@
 #define MSM_QGIC_CPU_BASE       IOMEM(0xF0001000)
 #define MSM_TMR_BASE            IOMEM(0xF0200000)
 #define MSM_TMR0_BASE           IOMEM(0xF0201000)
+#define MSM_GPIO1_BASE          IOMEM(0xE0003000)
+#define MSM_GPIO2_BASE          IOMEM(0xE0004000)
 #endif
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index cec6ed1c91d3..140ddbbc3a8a 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -43,8 +43,8 @@ static struct map_desc msm_io_desc[] __initdata = {
        MSM_DEVICE(VIC),
        MSM_CHIP_DEVICE(CSR, MSM7X00),
        MSM_DEVICE(DMOV),
-        MSM_DEVICE(GPIO1),
+        MSM_CHIP_DEVICE(GPIO1, MSM7X00),
-        MSM_DEVICE(GPIO2),
+        MSM_CHIP_DEVICE(GPIO2, MSM7X00),
        MSM_DEVICE(CLK_CTL),
 #ifdef CONFIG_MSM_DEBUG_UART
        MSM_DEVICE(DEBUG_UART),
@@ -76,8 +76,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
        MSM_DEVICE(VIC),
        MSM_CHIP_DEVICE(CSR, QSD8X50),
        MSM_DEVICE(DMOV),
-        MSM_DEVICE(GPIO1),
+        MSM_CHIP_DEVICE(GPIO1, QSD8X50),
-        MSM_DEVICE(GPIO2),
+        MSM_CHIP_DEVICE(GPIO2, QSD8X50),
        MSM_DEVICE(CLK_CTL),
        MSM_DEVICE(SIRC),
        MSM_DEVICE(SCPLL),
@@ -135,8 +135,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
        MSM_DEVICE(VIC),
        MSM_CHIP_DEVICE(CSR, MSM7X30),
        MSM_DEVICE(DMOV),
-        MSM_DEVICE(GPIO1),
+        MSM_CHIP_DEVICE(GPIO1, MSM7X30),
-        MSM_DEVICE(GPIO2),
+        MSM_CHIP_DEVICE(GPIO2, MSM7X30),
        MSM_DEVICE(CLK_CTL),
        MSM_DEVICE(CLK_CTL_SH2),
        MSM_DEVICE(AD5),
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index d6336afe9948..c51af1cac300 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -260,7 +260,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys)
        return bus;
 }
-static int __init mv78xx0_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        struct pcie_port *pp = bus_to_port(dev->bus->number);
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index cc503aa89c5e..5a886cd2c598 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -418,6 +418,10 @@ static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
+static struct regulator_consumer_supply rx51_vaux2_supply[] = {
+        REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
+};
 static struct regulator_consumer_supply rx51_vaux3_supply[] = {
        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
 };
@@ -479,6 +483,8 @@ static struct regulator_init_data rx51_vaux2 = {
                .valid_ops_mask         = REGULATOR_CHANGE_MODE
                                        | REGULATOR_CHANGE_STATUS,
        },
+        .num_consumer_supplies  = ARRAY_SIZE(rx51_vaux2_supply),
+        .consumer_supplies      = rx51_vaux2_supply,
 };
 /* VAUX3 - adds more power to VIO_18 rail */
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 543fcb8b518c..a5b7a236aa5b 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -25,6 +25,7 @@
 #include <video/omapdss.h>
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
+#include <plat/omap-pm.h>
 static struct platform_device omap_display_device = {
        .name          = "omapdss",
@@ -42,20 +43,6 @@ static struct omap_device_pm_latency omap_dss_latency[] = {
        },
 };
-/* oh_core is used for getting opt-clocks */
-static struct omap_hwmod        *oh_core;
-static bool opt_clock_available(const char *clk_role)
-{
-        int i;
-        for (i = 0; i < oh_core->opt_clks_cnt; i++) {
-                if (!strcmp(oh_core->opt_clks[i].role, clk_role))
-                        return true;
-        }
-        return false;
-}
 struct omap_dss_hwmod_data {
        const char *oh_name;
        const char *dev_name;
@@ -109,16 +96,9 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
                oh_count = ARRAY_SIZE(omap4_dss_hwmod_data);
        }
-        /* opt_clks are always associated with dss hwmod */
-        oh_core = omap_hwmod_lookup("dss_core");
-        if (!oh_core) {
-                pr_err("Could not look up dss_core.\n");
-                return -ENODEV;
-        }
        pdata.board_data = board_data;
-        pdata.board_data->get_last_off_on_transaction_id = NULL;
+        pdata.board_data->get_context_loss_count =
-        pdata.opt_clock_available = opt_clock_available;
+                omap_pm_get_dev_context_loss_count;
        for (i = 0; i < oh_count; i++) {
                oh = omap_hwmod_lookup(curr_dss_hwmod[i].oh_name);
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index f2b2b35e8646..3e5499dda49a 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -51,7 +51,7 @@ void orion5x_pci_disable(void);
 void orion5x_pci_set_cardbus_mode(void);
 int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
 struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
-int orion5x_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
+int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 struct machine_desc;
 struct meminfo;
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index f95d3cb01cbf..a3e3e9e5e328 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -237,7 +237,8 @@ void __init db88f5281_pci_preinit(void)
        }
 }
-static int __init db88f5281_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init db88f5281_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 855e0e77d563..a6eddae82a0b 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -70,14 +70,14 @@ enum {
 * PCI setup
 */
-static int __init dns323_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init dns323_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
        /*
         * Check for devices with hard-wired IRQs.
         */
-        irq = orion5x_pci_map_irq(dev, slot, pin);
+        irq = orion5x_pci_map_irq(const dev, slot, pin);
        if (irq != -1)
                return irq;
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index c0eb6462633f..00381249d766 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -119,7 +119,8 @@ static struct platform_device kurobox_pro_nor_flash = {
 * PCI
 ****************************************************************************/
-static int __init kurobox_pro_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init kurobox_pro_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 59263b73d1e4..ef3bb8e9a4c2 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -73,7 +73,7 @@ static struct platform_device mss2_nor_flash = {
 /****************************************************************************
 * PCI setup
 ****************************************************************************/
-static int __init mss2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index f64965d4f8e8..28b8760ab9fa 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -589,7 +589,7 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys
        return bus;
 }
-int __init orion5x_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int bus = dev->bus->number;
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index 9eec7c2375e9..291d22bf44c9 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -131,7 +131,7 @@ static void __init rd88f5181l_fxo_init(void)
 }
 static int __init
-rd88f5181l_fxo_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index 0cc90bbfd326..3f02362e1632 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -140,7 +140,7 @@ static void __init rd88f5181l_ge_init(void)
 }
 static int __init
-rd88f5181l_ge_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 48da39b9bdb0..27fd38e658bd 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -172,7 +172,8 @@ void __init rd88f5182_pci_preinit(void)
        }
 }
-static int __init rd88f5182_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 29ce826c3c21..a34e4fac72b0 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -100,7 +100,7 @@ void __init tsp2_pci_preinit(void)
        }
 }
-static int __init tsp2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init tsp2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 47162fd5f044..c9831614e355 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -143,7 +143,8 @@ void __init qnap_ts209_pci_preinit(void)
        }
 }
-static int __init qnap_ts209_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init qnap_ts209_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 5aacc7ac5cf4..cc33b2222bad 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -121,7 +121,8 @@ static struct platform_device qnap_ts409_nor_flash = {
 * PCI
 ****************************************************************************/
-static int __init qnap_ts409_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init qnap_ts409_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index 444a1c7fdfd6..2653595f901c 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -133,7 +133,8 @@ static void __init wnr854t_init(void)
        platform_device_register(&wnr854t_nor_flash);
 }
-static int __init wnr854t_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index d1952be0ae1c..251ef1543e53 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -221,7 +221,8 @@ static void __init wrt350n_v2_init(void)
        platform_device_register(&wrt350n_v2_button_device);
 }
-static int __init wrt350n_v2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 4eb7660a279d..6bf479d9b5ac 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -77,7 +77,7 @@ void cmx2xx_pci_resume(void) {}
 #endif
 /* PCI IRQ mapping*/
-static int __init cmx2xx_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init cmx2xx_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
index 5fc074fe3eee..964c6c3cd7a6 100644
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ b/arch/arm/mach-sa1100/pci-nanoengine.c
@@ -122,7 +122,8 @@ static struct pci_ops pci_nano_ops = {
        .write  = nanoengine_write_config,
 };
-static int __init pci_nanoengine_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,
+        u8 pin)
 {
        return NANOENGINE_IRQ_GPIO_PCI;
 }
diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c
index 92d7227de0ac..7cb79a092f31 100644
--- a/arch/arm/mach-shark/pci.c
+++ b/arch/arm/mach-shark/pci.c
@@ -14,7 +14,7 @@
 #include <asm/mach/pci.h>
 #include <asm/mach-types.h>
-static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init shark_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        if (dev->bus->number == 0)
                if (dev->devfn == 0)
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 837138e369bc..9e0856b2f9e9 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -957,19 +957,16 @@ static struct resource csi2_resources[] = {
        },
 };
-static struct platform_device csi2_device = {
+static struct sh_mobile_ceu_companion csi2 = {
-        .name   = "sh-mobile-csi2",
+        .id             = 0,
-        .id     = 0,
        .num_resources  = ARRAY_SIZE(csi2_resources),
        .resource       = csi2_resources,
-        .dev    = {
+        .platform_data  = &csi2_info,
-                .platform_data = &csi2_info,
-        },
 };
 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
        .flags = SH_CEU_FLAG_USE_8BIT_BUS,
-        .csi2_dev = &csi2_device.dev,
+        .csi2 = &csi2,
 };
 static struct resource ceu_resources[] = {
@@ -1013,7 +1010,6 @@ static struct platform_device *ap4evb_devices[] __initdata = {
        &lcdc1_device,
        &lcdc_device,
        &hdmi_device,
-        &csi2_device,
        &ceu_device,
        &ap4evb_camera,
        &meram_device,
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 5b36b6c5b448..d41c01f83f15 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1192,8 +1192,8 @@ static struct platform_device sh_mmcif_device = {
 };
-static int mackerel_camera_add(struct soc_camera_link *icl, struct device *dev);
+static int mackerel_camera_add(struct soc_camera_device *icd);
-static void mackerel_camera_del(struct soc_camera_link *icl);
+static void mackerel_camera_del(struct soc_camera_device *icd);
 static int camera_set_capture(struct soc_camera_platform_info *info,
                              int enable)
@@ -1232,16 +1232,15 @@ static void mackerel_camera_release(struct device *dev)
        soc_camera_platform_release(&camera_device);
 }
-static int mackerel_camera_add(struct soc_camera_link *icl,
+static int mackerel_camera_add(struct soc_camera_device *icd)
-                               struct device *dev)
 {
-        return soc_camera_platform_add(icl, dev, &camera_device, &camera_link,
+        return soc_camera_platform_add(icd, &camera_device, &camera_link,
                                       mackerel_camera_release, 0);
 }
-static void mackerel_camera_del(struct soc_camera_link *icl)
+static void mackerel_camera_del(struct soc_camera_device *icd)
 {
-        soc_camera_platform_del(icl, camera_device, &camera_link);
+        soc_camera_platform_del(icd, camera_device, &camera_link);
 }
 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index 6b186aefcbd6..5218c34a9cc6 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -259,9 +259,6 @@ static struct clk mstp_clks[MSTP_NR] = {
        [CMMSTP003] = MSTP(&r_clk, CMMSTPCR0, 3, 0), /* KEYSC */
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
-#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("r_clk", &r_clk),
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 91f5779abdd3..6b1619a65dba 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -561,10 +561,6 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
-#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
-#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("dv_clki_div2_clk", &sh7372_dv_clki_div2_clk),
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
index 95942466e63f..8cee7b151ae3 100644
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -267,9 +267,6 @@ static struct clk mstp_clks[] = {
        [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
-#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("r_clk", &r_clk),
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index bcacb1e8cf85..6db2ccabc2bf 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -306,10 +306,6 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
-#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
-#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("r_clk", &r_clk),
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 031cd0a7d71d..f1f699d86c32 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -449,7 +449,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
        return 1;
 }
-static int tegra_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int tegra_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        return INT_PCIE_INTR;
 }
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index 7848a177b1f0..c898deb3ada0 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -328,7 +328,7 @@ void __init pci_versatile_preinit(void)
 /*
 * map the specified device/slot/pin to an IRQ.   Different backplanes may need to modify this.
 */
-static int __init versatile_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
        int devslot = PCI_SLOT(dev->devfn);
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index e9d689b7c833..197e96f70405 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -10,6 +10,7 @@ config AVR32
        select GENERIC_IRQ_PROBE
        select HARDIRQS_SW_RESEND
        select GENERIC_IRQ_SHOW
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG
        help
          AVR32 is a high-performance 32-bit RISC microprocessor core,
          designed for cost-sensitive embedded applications, with particular
diff --git a/arch/cris/arch-v10/drivers/sync_serial.c b/arch/cris/arch-v10/drivers/sync_serial.c
index 850265373611..466af40c5822 100644
--- a/arch/cris/arch-v10/drivers/sync_serial.c
+++ b/arch/cris/arch-v10/drivers/sync_serial.c
@@ -158,7 +158,7 @@ static int sync_serial_open(struct inode *inode, struct file *file);
 static int sync_serial_release(struct inode *inode, struct file *file);
 static unsigned int sync_serial_poll(struct file *filp, poll_table *wait);
-static int sync_serial_ioctl(struct file *file,
+static long sync_serial_ioctl(struct file *file,
        unsigned int cmd, unsigned long arg);
 static ssize_t sync_serial_write(struct file *file, const char *buf,
        size_t count, loff_t *ppos);
@@ -625,11 +625,11 @@ static int sync_serial_open(struct inode *inode, struct file *file)
                        *R_IRQ_MASK1_SET = 1 << port->data_avail_bit;
                DEBUG(printk(KERN_DEBUG "sser%d rec started\n", dev));
        }
-        ret = 0;
+        err = 0;
        
 out:
        mutex_unlock(&sync_serial_mutex);
-        return ret;
+        return err;
 }
 static int sync_serial_release(struct inode *inode, struct file *file)
diff --git a/arch/cris/arch-v10/kernel/irq.c b/arch/cris/arch-v10/kernel/irq.c
index 907cfb5a873d..ba0e5965d6e3 100644
--- a/arch/cris/arch-v10/kernel/irq.c
+++ b/arch/cris/arch-v10/kernel/irq.c
@@ -20,6 +20,9 @@
 #define crisv10_mask_irq(irq_nr) (*R_VECT_MASK_CLR = 1 << (irq_nr));
 #define crisv10_unmask_irq(irq_nr) (*R_VECT_MASK_SET = 1 << (irq_nr));
+extern void kgdb_init(void);
+extern void breakpoint(void);
 /* don't use set_int_vector, it bypasses the linux interrupt handlers. it is
 * global just so that the kernel gdb can use it.
 */
diff --git a/arch/cris/include/asm/thread_info.h b/arch/cris/include/asm/thread_info.h
index 29b74a105830..332f19c54557 100644
--- a/arch/cris/include/asm/thread_info.h
+++ b/arch/cris/include/asm/thread_info.h
@@ -11,8 +11,6 @@
 #ifdef __KERNEL__
-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
 #ifndef __ASSEMBLY__
 #include <asm/types.h>
 #include <asm/processor.h>
@@ -67,8 +65,10 @@ struct thread_info {
 #define init_thread_info        (init_thread_union.thread_info)
+#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
 /* thread information allocation */
-#define alloc_thread_info(tsk, node) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
+#define alloc_thread_info_node(tsk, node)       \
+        ((struct thread_info *) __get_free_pages(GFP_KERNEL, 1))
 #define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig
index cb884e489425..bad27a6ff407 100644
--- a/arch/frv/Kconfig
+++ b/arch/frv/Kconfig
@@ -7,6 +7,7 @@ config FRV
        select HAVE_PERF_EVENTS
        select HAVE_GENERIC_HARDIRQS
        select GENERIC_IRQ_SHOW
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG
 config ZONE_DMA
        bool
diff --git a/arch/frv/mm/pgalloc.c b/arch/frv/mm/pgalloc.c
index c42c83d507bc..4fb63a36bd52 100644
--- a/arch/frv/mm/pgalloc.c
+++ b/arch/frv/mm/pgalloc.c
@@ -133,13 +133,7 @@ void pgd_dtor(void *pgd)
 pgd_t *pgd_alloc(struct mm_struct *mm)
 {
-        pgd_t *pgd;
+        return quicklist_alloc(0, GFP_KERNEL, pgd_ctor);
-        pgd = quicklist_alloc(0, GFP_KERNEL, pgd_ctor);
-        if (!pgd)
-                return pgd;
-        return pgd;
 }
 void pgd_free(struct mm_struct *mm, pgd_t *pgd)
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 137b277f7e56..124854714958 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -27,6 +27,8 @@ config IA64
        select GENERIC_PENDING_IRQ if SMP
        select IRQ_PER_CPU
        select GENERIC_IRQ_SHOW
+        select ARCH_WANT_OPTIONAL_GPIOLIB
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG
        default y
        help
          The Itanium Processor Family is Intel's 64-bit successor to
@@ -89,6 +91,9 @@ config GENERIC_TIME_VSYSCALL
 config HAVE_SETUP_PER_CPU_AREA
        def_bool y
+config GENERIC_GPIO
+        def_bool y
 config DMI
        bool
        default y
diff --git a/arch/ia64/include/asm/gpio.h b/arch/ia64/include/asm/gpio.h
new file mode 100644
index 000000000000..590a20debc4e
--- /dev/null
+++ b/arch/ia64/include/asm/gpio.h
@@ -0,0 +1,55 @@
+/*
+ * Generic GPIO API implementation for IA-64.
+ *
+ * A stright copy of that for PowerPC which was:
+ *
+ * Copyright (c) 2007-2008  MontaVista Software, Inc.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef _ASM_IA64_GPIO_H
+#define _ASM_IA64_GPIO_H
+#include <linux/errno.h>
+#include <asm-generic/gpio.h>
+#ifdef CONFIG_GPIOLIB
+/*
+ * We don't (yet) implement inlined/rapid versions for on-chip gpios.
+ * Just call gpiolib.
+ */
+static inline int gpio_get_value(unsigned int gpio)
+{
+        return __gpio_get_value(gpio);
+}
+static inline void gpio_set_value(unsigned int gpio, int value)
+{
+        __gpio_set_value(gpio, value);
+}
+static inline int gpio_cansleep(unsigned int gpio)
+{
+        return __gpio_cansleep(gpio);
+}
+static inline int gpio_to_irq(unsigned int gpio)
+{
+        return __gpio_to_irq(gpio);
+}
+static inline int irq_to_gpio(unsigned int irq)
+{
+        return -EINVAL;
+}
+#endif /* CONFIG_GPIOLIB */
+#endif /* _ASM_IA64_GPIO_H */
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c
index 6fc03aff046c..c38d22e5e902 100644
--- a/arch/ia64/kernel/efi.c
+++ b/arch/ia64/kernel/efi.c
@@ -156,7 +156,7 @@ prefix##_get_next_variable (unsigned long *name_size, efi_char16_t *name,      \
 #define STUB_SET_VARIABLE(prefix, adjust_arg)                                  \
 static efi_status_t                                                            \
 prefix##_set_variable (efi_char16_t *name, efi_guid_t *vendor,                 \
-                       unsigned long attr, unsigned long data_size,            \
+                       u32 attr, unsigned long data_size,                      \
                       void *data)                                             \
 {                                                                              \
        struct ia64_fpreg fr[6];                                               \
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 284cd3771eaa..9e8ee9d2b8ca 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -6,6 +6,7 @@ config M68K
        select GENERIC_ATOMIC64 if MMU
        select HAVE_GENERIC_HARDIRQS if !MMU
        select GENERIC_IRQ_SHOW if !MMU
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
 config RWSEM_GENERIC_SPINLOCK
        bool
diff --git a/arch/m68k/Kconfig.mmu b/arch/m68k/Kconfig.mmu
index 16539b1d5d3a..13e20bbc4079 100644
--- a/arch/m68k/Kconfig.mmu
+++ b/arch/m68k/Kconfig.mmu
@@ -372,12 +372,6 @@ config AMIGA_PCMCIA
          Include support in the kernel for pcmcia on Amiga 1200 and Amiga
          600. If you intend to use pcmcia cards say Y; otherwise say N.
-config STRAM_PROC
-        bool "ST-RAM statistics in /proc"
-        depends on ATARI
-        help
-          Say Y here to report ST-RAM usage statistics in /proc/stram.
 config HEARTBEAT
        bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || MAC ||Q40
        default y if !AMIGA && !APOLLO && !ATARI && !MAC && !Q40 && HP300
diff --git a/arch/m68k/amiga/chipram.c b/arch/m68k/amiga/chipram.c
index dd0447db1c90..99449fbf9a72 100644
--- a/arch/m68k/amiga/chipram.c
+++ b/arch/m68k/amiga/chipram.c
@@ -16,6 +16,7 @@
 #include <linux/string.h>
 #include <linux/module.h>
+#include <asm/atomic.h>
 #include <asm/page.h>
 #include <asm/amigahw.h>
@@ -23,111 +24,100 @@ unsigned long amiga_chip_size;
 EXPORT_SYMBOL(amiga_chip_size);
 static struct resource chipram_res = {
-    .name = "Chip RAM", .start = CHIP_PHYSADDR
+        .name = "Chip RAM", .start = CHIP_PHYSADDR
 };
-static unsigned long chipavail;
+static atomic_t chipavail;
 void __init amiga_chip_init(void)
 {
-    if (!AMIGAHW_PRESENT(CHIP_RAM))
+        if (!AMIGAHW_PRESENT(CHIP_RAM))
-        return;
+                return;
-    chipram_res.end = amiga_chip_size-1;
+        chipram_res.end = CHIP_PHYSADDR + amiga_chip_size - 1;
-    request_resource(&iomem_resource, &chipram_res);
+        request_resource(&iomem_resource, &chipram_res);
-    chipavail = amiga_chip_size;
+        atomic_set(&chipavail, amiga_chip_size);
 }
 void *amiga_chip_alloc(unsigned long size, const char *name)
 {
-    struct resource *res;
+        struct resource *res;
+        void *p;
-    /* round up */
+        res = kzalloc(sizeof(struct resource), GFP_KERNEL);
-    size = PAGE_ALIGN(size);
+        if (!res)
+                return NULL;
-#ifdef DEBUG
+        res->name = name;
-    printk("amiga_chip_alloc: allocate %ld bytes\n", size);
+        p = amiga_chip_alloc_res(size, res);
-#endif
+        if (!p) {
-    res = kzalloc(sizeof(struct resource), GFP_KERNEL);
+                kfree(res);
-    if (!res)
+                return NULL;
-        return NULL;
+        }
-    res->name = name;
-    if (allocate_resource(&chipram_res, res, size, 0, UINT_MAX, PAGE_SIZE, NULL, NULL) < 0) {
+        return p;
-        kfree(res);
-        return NULL;
-    }
-    chipavail -= size;
-#ifdef DEBUG
-    printk("amiga_chip_alloc: returning %lx\n", res->start);
-#endif
-    return (void *)ZTWO_VADDR(res->start);
 }
 EXPORT_SYMBOL(amiga_chip_alloc);
-    /*
+        /*
-     *  Warning:
+         *  Warning:
-     *  amiga_chip_alloc_res is meant only for drivers that need to allocate
+         *  amiga_chip_alloc_res is meant only for drivers that need to
-     *  Chip RAM before kmalloc() is functional. As a consequence, those
+         *  allocate Chip RAM before kmalloc() is functional. As a consequence,
-     *  drivers must not free that Chip RAM afterwards.
+         *  those drivers must not free that Chip RAM afterwards.
-     */
+         */
-void * __init amiga_chip_alloc_res(unsigned long size, struct resource *res)
+void *amiga_chip_alloc_res(unsigned long size, struct resource *res)
 {
-    unsigned long start;
+        int error;
-    /* round up */
+        /* round up */
-    size = PAGE_ALIGN(size);
+        size = PAGE_ALIGN(size);
-    /* dmesg into chipmem prefers memory at the safe end */
-    start = CHIP_PHYSADDR + chipavail - size;
+        pr_debug("amiga_chip_alloc_res: allocate %lu bytes\n", size);
+        error = allocate_resource(&chipram_res, res, size, 0, UINT_MAX,
-#ifdef DEBUG
+                                  PAGE_SIZE, NULL, NULL);
-    printk("amiga_chip_alloc_res: allocate %ld bytes\n", size);
+        if (error < 0) {
-#endif
+                pr_err("amiga_chip_alloc_res: allocate_resource() failed %d!\n",
-    if (allocate_resource(&chipram_res, res, size, start, UINT_MAX, PAGE_SIZE, NULL, NULL) < 0) {
+                       error);
-        printk("amiga_chip_alloc_res: first alloc failed!\n");
+                return NULL;
-        if (allocate_resource(&chipram_res, res, size, 0, UINT_MAX, PAGE_SIZE, NULL, NULL) < 0)
+        }
-            return NULL;
-    }
+        atomic_sub(size, &chipavail);
-    chipavail -= size;
+        pr_debug("amiga_chip_alloc_res: returning %pR\n", res);
-#ifdef DEBUG
+        return (void *)ZTWO_VADDR(res->start);
-    printk("amiga_chip_alloc_res: returning %lx\n", res->start);
-#endif
-    return (void *)ZTWO_VADDR(res->start);
 }
 void amiga_chip_free(void *ptr)
 {
-    unsigned long start = ZTWO_PADDR(ptr);
+        unsigned long start = ZTWO_PADDR(ptr);
-    struct resource **p, *res;
+        struct resource *res;
-    unsigned long size;
+        unsigned long size;
-    for (p = &chipram_res.child; (res = *p); p = &res->sibling) {
+        res = lookup_resource(&chipram_res, start);
-        if (res->start != start)
+        if (!res) {
-            continue;
+                pr_err("amiga_chip_free: trying to free nonexistent region at "
-        *p = res->sibling;
+                       "%p\n", ptr);
-        size = res->end-start;
+                return;
-#ifdef DEBUG
+        }
-        printk("amiga_chip_free: free %ld bytes at %p\n", size, ptr);
-#endif
+        size = resource_size(res);
-        chipavail += size;
+        pr_debug("amiga_chip_free: free %lu bytes at %p\n", size, ptr);
+        atomic_add(size, &chipavail);
+        release_resource(res);
        kfree(res);
-        return;
-    }
-    printk("amiga_chip_free: trying to free nonexistent region at %p\n", ptr);
 }
 EXPORT_SYMBOL(amiga_chip_free);
 unsigned long amiga_chip_avail(void)
 {
-#ifdef DEBUG
+        unsigned long n = atomic_read(&chipavail);
-        printk("amiga_chip_avail : %ld bytes\n", chipavail);
-#endif
+        pr_debug("amiga_chip_avail : %lu bytes\n", n);
-        return chipavail;
+        return n;
 }
 EXPORT_SYMBOL(amiga_chip_avail);
diff --git a/arch/m68k/atari/stram.c b/arch/m68k/atari/stram.c
index 6ec3b7f33779..0810c8d56e59 100644
--- a/arch/m68k/atari/stram.c
+++ b/arch/m68k/atari/stram.c
@@ -1,5 +1,5 @@
 /*
- * arch/m68k/atari/stram.c: Functions for ST-RAM allocations
+ * Functions for ST-RAM allocations
 *
 * Copyright 1994-97 Roman Hodek <Roman.Hodek@informatik.uni-erlangen.de>
 *
@@ -30,91 +30,35 @@
 #include <asm/atari_stram.h>
 #include <asm/io.h>
-#undef DEBUG
-#ifdef DEBUG
-#define DPRINTK(fmt,args...) printk( fmt, ##args )
-#else
-#define DPRINTK(fmt,args...)
-#endif
-#if defined(CONFIG_PROC_FS) && defined(CONFIG_STRAM_PROC)
-/* abbrev for the && above... */
-#define DO_PROC
-#include <linux/proc_fs.h>
-#include <linux/seq_file.h>
-#endif
 /*
- * ++roman:
+ * The ST-RAM allocator allocates memory from a pool of reserved ST-RAM of
- *
+ * configurable size, set aside on ST-RAM init.
- * New version of ST-Ram buffer allocation. Instead of using the
+ * As long as this pool is not exhausted, allocation of real ST-RAM can be
- * 1 MB - 4 KB that remain when the ST-Ram chunk starts at $1000
+ * guaranteed.
- * (1 MB granularity!), such buffers are reserved like this:
- *
- *  - If the kernel resides in ST-Ram anyway, we can take the buffer
- *    from behind the current kernel data space the normal way
- *    (incrementing start_mem).
- *
- *  - If the kernel is in TT-Ram, stram_init() initializes start and
- *    end of the available region. Buffers are allocated from there
- *    and mem_init() later marks the such used pages as reserved.
- *    Since each TT-Ram chunk is at least 4 MB in size, I hope there
- *    won't be an overrun of the ST-Ram region by normal kernel data
- *    space.
- *
- * For that, ST-Ram may only be allocated while kernel initialization
- * is going on, or exactly: before mem_init() is called. There is also
- * no provision now for freeing ST-Ram buffers. It seems that isn't
- * really needed.
- *
 */
-/* Start and end (virtual) of ST-RAM */
-static void *stram_start, *stram_end;
-/* set after memory_init() executed and allocations via start_mem aren't
- * possible anymore */
-static int mem_init_done;
 /* set if kernel is in ST-RAM */
 static int kernel_in_stram;
-typedef struct stram_block {
+static struct resource stram_pool = {
-        struct stram_block *next;
+        .name = "ST-RAM Pool"
-        void *start;
+};
-        unsigned long size;
-        unsigned flags;
-        const char *owner;
-} BLOCK;
-/* values for flags field */
-#define BLOCK_FREE      0x01    /* free structure in the BLOCKs pool */
-#define BLOCK_KMALLOCED 0x02    /* structure allocated by kmalloc() */
-#define BLOCK_GFP       0x08    /* block allocated with __get_dma_pages() */
-/* list of allocated blocks */
+static unsigned long pool_size = 1024*1024;
-static BLOCK *alloc_list;
-/* We can't always use kmalloc() to allocate BLOCK structures, since
- * stram_alloc() can be called rather early. So we need some pool of
- * statically allocated structures. 20 of them is more than enough, so in most
- * cases we never should need to call kmalloc(). */
-#define N_STATIC_BLOCKS 20
-static BLOCK static_blocks[N_STATIC_BLOCKS];
-/***************************** Prototypes *****************************/
+static int __init atari_stram_setup(char *arg)
+{
+        if (!MACH_IS_ATARI)
+                return 0;
-static BLOCK *add_region( void *addr, unsigned long size );
+        pool_size = memparse(arg, NULL);
-static BLOCK *find_region( void *addr );
+        return 0;
-static int remove_region( BLOCK *block );
+}
-/************************* End of Prototypes **************************/
+early_param("stram_pool", atari_stram_setup);
-/* ------------------------------------------------------------------------ */
-/*                                                         Public Interface                                                             */
-/* ------------------------------------------------------------------------ */
 /*
 * This init function is called very early by atari/config.c
@@ -123,25 +67,23 @@ static int remove_region( BLOCK *block );
 void __init atari_stram_init(void)
 {
        int i;
+        void *stram_start;
-        /* initialize static blocks */
+        /*
-        for( i = 0; i < N_STATIC_BLOCKS; ++i )
+         * determine whether kernel code resides in ST-RAM
-                static_blocks[i].flags = BLOCK_FREE;
+         * (then ST-RAM is the first memory block at virtual 0x0)
+         */
-        /* determine whether kernel code resides in ST-RAM (then ST-RAM is the
-         * first memory block at virtual 0x0) */
        stram_start = phys_to_virt(0);
        kernel_in_stram = (stram_start == 0);
-        for( i = 0; i < m68k_num_memory; ++i ) {
+        for (i = 0; i < m68k_num_memory; ++i) {
                if (m68k_memory[i].addr == 0) {
-                        /* skip first 2kB or page (supervisor-only!) */
-                        stram_end = stram_start + m68k_memory[i].size;
                        return;
                }
        }
        /* Should never come here! (There is always ST-Ram!) */
-        panic( "atari_stram_init: no ST-RAM found!" );
+        panic("atari_stram_init: no ST-RAM found!");
 }
@@ -151,226 +93,68 @@ void __init atari_stram_init(void)
 */
 void __init atari_stram_reserve_pages(void *start_mem)
 {
-        /* always reserve first page of ST-RAM, the first 2 kB are
+        /*
-         * supervisor-only! */
+         * always reserve first page of ST-RAM, the first 2 KiB are
+         * supervisor-only!
+         */
        if (!kernel_in_stram)
                reserve_bootmem(0, PAGE_SIZE, BOOTMEM_DEFAULT);
-}
+        stram_pool.start = (resource_size_t)alloc_bootmem_low_pages(pool_size);
+        stram_pool.end = stram_pool.start + pool_size - 1;
+        request_resource(&iomem_resource, &stram_pool);
-void atari_stram_mem_init_hook (void)
+        pr_debug("atari_stram pool: size = %lu bytes, resource = %pR\n",
-{
+                 pool_size, &stram_pool);
-        mem_init_done = 1;
 }
-/*
+void *atari_stram_alloc(unsigned long size, const char *owner)
- * This is main public interface: somehow allocate a ST-RAM block
- *
- *  - If we're before mem_init(), we have to make a static allocation. The
- *    region is taken in the kernel data area (if the kernel is in ST-RAM) or
- *    from the start of ST-RAM (if the kernel is in TT-RAM) and added to the
- *    rsvd_stram_* region. The ST-RAM is somewhere in the middle of kernel
- *    address space in the latter case.
- *
- *  - If mem_init() already has been called, try with __get_dma_pages().
- *    This has the disadvantage that it's very hard to get more than 1 page,
- *    and it is likely to fail :-(
- *
- */
-void *atari_stram_alloc(long size, const char *owner)
 {
-        void *addr = NULL;
+        struct resource *res;
-        BLOCK *block;
+        int error;
-        int flags;
+        pr_debug("atari_stram_alloc: allocate %lu bytes\n", size);
-        DPRINTK("atari_stram_alloc(size=%08lx,owner=%s)\n", size, owner);
+        /* round up */
-        if (!mem_init_done)
+        size = PAGE_ALIGN(size);
-                return alloc_bootmem_low(size);
-        else {
+        res = kzalloc(sizeof(struct resource), GFP_KERNEL);
-                /* After mem_init(): can only resort to __get_dma_pages() */
+        if (!res)
-                addr = (void *)__get_dma_pages(GFP_KERNEL, get_order(size));
+                return NULL;
-                flags = BLOCK_GFP;
-                DPRINTK( "atari_stram_alloc: after mem_init, "
+        res->name = owner;
-                                 "get_pages=%p\n", addr );
+        error = allocate_resource(&stram_pool, res, size, 0, UINT_MAX,
+                                  PAGE_SIZE, NULL, NULL);
+        if (error < 0) {
+                pr_err("atari_stram_alloc: allocate_resource() failed %d!\n",
+                       error);
+                kfree(res);
+                return NULL;
        }
-        if (addr) {
+        pr_debug("atari_stram_alloc: returning %pR\n", res);
-                if (!(block = add_region( addr, size ))) {
+        return (void *)res->start;
-                        /* out of memory for BLOCK structure :-( */
-                        DPRINTK( "atari_stram_alloc: out of mem for BLOCK -- "
-                                         "freeing again\n" );
-                        free_pages((unsigned long)addr, get_order(size));
-                        return( NULL );
-                }
-                block->owner = owner;
-                block->flags |= flags;
-        }
-        return( addr );
 }
 EXPORT_SYMBOL(atari_stram_alloc);
-void atari_stram_free( void *addr )
+void atari_stram_free(void *addr)
 {
-        BLOCK *block;
+        unsigned long start = (unsigned long)addr;
+        struct resource *res;
-        DPRINTK( "atari_stram_free(addr=%p)\n", addr );
+        unsigned long size;
-        if (!(block = find_region( addr ))) {
+        res = lookup_resource(&stram_pool, start);
-                printk( KERN_ERR "Attempt to free non-allocated ST-RAM block at %p "
+        if (!res) {
-                                "from %p\n", addr, __builtin_return_address(0) );
+                pr_err("atari_stram_free: trying to free nonexistent region "
+                       "at %p\n", addr);
                return;
        }
-        DPRINTK( "atari_stram_free: found block (%p): size=%08lx, owner=%s, "
-                         "flags=%02x\n", block, block->size, block->owner, block->flags );
-        if (!(block->flags & BLOCK_GFP))
-                goto fail;
-        DPRINTK("atari_stram_free: is kmalloced, order_size=%d\n",
+        size = resource_size(res);
-                get_order(block->size));
+        pr_debug("atari_stram_free: free %lu bytes at %p\n", size, addr);
-        free_pages((unsigned long)addr, get_order(block->size));
+        release_resource(res);
-        remove_region( block );
+        kfree(res);
-        return;
-  fail:
-        printk( KERN_ERR "atari_stram_free: cannot free block at %p "
-                        "(called from %p)\n", addr, __builtin_return_address(0) );
 }
 EXPORT_SYMBOL(atari_stram_free);
-/* ------------------------------------------------------------------------ */
-/*                                                        Region Management                                                             */
-/* ------------------------------------------------------------------------ */
-/* insert a region into the alloced list (sorted) */
-static BLOCK *add_region( void *addr, unsigned long size )
-{
-        BLOCK **p, *n = NULL;
-        int i;
-        for( i = 0; i < N_STATIC_BLOCKS; ++i ) {
-                if (static_blocks[i].flags & BLOCK_FREE) {
-                        n = &static_blocks[i];
-                        n->flags = 0;
-                        break;
-                }
-        }
-        if (!n && mem_init_done) {
-                /* if statics block pool exhausted and we can call kmalloc() already
-                 * (after mem_init()), try that */
-                n = kmalloc( sizeof(BLOCK), GFP_KERNEL );
-                if (n)
-                        n->flags = BLOCK_KMALLOCED;
-        }
-        if (!n) {
-                printk( KERN_ERR "Out of memory for ST-RAM descriptor blocks\n" );
-                return( NULL );
-        }
-        n->start = addr;
-        n->size  = size;
-        for( p = &alloc_list; *p; p = &((*p)->next) )
-                if ((*p)->start > addr) break;
-        n->next = *p;
-        *p = n;
-        return( n );
-}
-/* find a region (by start addr) in the alloced list */
-static BLOCK *find_region( void *addr )
-{
-        BLOCK *p;
-        for( p = alloc_list; p; p = p->next ) {
-                if (p->start == addr)
-                        return( p );
-                if (p->start > addr)
-                        break;
-        }
-        return( NULL );
-}
-/* remove a block from the alloced list */
-static int remove_region( BLOCK *block )
-{
-        BLOCK **p;
-        for( p = &alloc_list; *p; p = &((*p)->next) )
-                if (*p == block) break;
-        if (!*p)
-                return( 0 );
-        *p = block->next;
-        if (block->flags & BLOCK_KMALLOCED)
-                kfree( block );
-        else
-                block->flags |= BLOCK_FREE;
-        return( 1 );
-}
-/* ------------------------------------------------------------------------ */
-/*                                               /proc statistics file stuff                                            */
-/* ------------------------------------------------------------------------ */
-#ifdef DO_PROC
-#define PRINT_PROC(fmt,args...) seq_printf( m, fmt, ##args )
-static int stram_proc_show(struct seq_file *m, void *v)
-{
-        BLOCK *p;
-        PRINT_PROC("Total ST-RAM:      %8u kB\n",
-                           (stram_end - stram_start) >> 10);
-        PRINT_PROC( "Allocated regions:\n" );
-        for( p = alloc_list; p; p = p->next ) {
-                PRINT_PROC("0x%08lx-0x%08lx: %s (",
-                           virt_to_phys(p->start),
-                           virt_to_phys(p->start+p->size-1),
-                           p->owner);
-                if (p->flags & BLOCK_GFP)
-                        PRINT_PROC( "page-alloced)\n" );
-                else
-                        PRINT_PROC( "??)\n" );
-        }
-        return 0;
-}
-static int stram_proc_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, stram_proc_show, NULL);
-}
-static const struct file_operations stram_proc_fops = {
-        .open           = stram_proc_open,
-        .read           = seq_read,
-        .llseek         = seq_lseek,
-        .release        = single_release,
-};
-static int __init proc_stram_init(void)
-{
-        proc_create("stram", 0, NULL, &stram_proc_fops);
-        return 0;
-}
-module_init(proc_stram_init);
-#endif
-/*
- * Local variables:
- *  c-indent-level: 4
- *  tab-width: 4
- * End:
- */
diff --git a/arch/m68k/include/asm/atari_stram.h b/arch/m68k/include/asm/atari_stram.h
index 7546d13963be..62e27598af91 100644
--- a/arch/m68k/include/asm/atari_stram.h
+++ b/arch/m68k/include/asm/atari_stram.h
@@ -6,12 +6,11 @@
 */
 /* public interface */
-void *atari_stram_alloc(long size, const char *owner);
+void *atari_stram_alloc(unsigned long size, const char *owner);
 void atari_stram_free(void *);
 /* functions called internally by other parts of the kernel */
 void atari_stram_init(void);
 void atari_stram_reserve_pages(void *start_mem);
-void atari_stram_mem_init_hook (void);
 #endif /*_M68K_ATARI_STRAM_H */
diff --git a/arch/m68k/include/asm/atarihw.h b/arch/m68k/include/asm/atarihw.h
index f51f709bbf30..0392b28656ab 100644
--- a/arch/m68k/include/asm/atarihw.h
+++ b/arch/m68k/include/asm/atarihw.h
@@ -399,8 +399,8 @@ struct CODEC
 #define CODEC_OVERFLOW_LEFT     2
  u_char unused2, unused3, unused4, unused5;
  u_char gpio_directions;
-#define GPIO_IN                 0
+#define CODEC_GPIO_IN           0
-#define GPIO_OUT                1
+#define CODEC_GPIO_OUT          1
  u_char unused6;
  u_char gpio_data;
 };
diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c
index 334d83640376..c3b45061dd08 100644
--- a/arch/m68k/kernel/setup_mm.c
+++ b/arch/m68k/kernel/setup_mm.c
@@ -216,7 +216,9 @@ static void __init m68k_parse_bootinfo(const struct bi_record *record)
 void __init setup_arch(char **cmdline_p)
 {
+#ifndef CONFIG_SUN3
        int i;
+#endif
        /* The bootinfo is located right after the kernel bss */
        m68k_parse_bootinfo((const struct bi_record *)_end);
diff --git a/arch/m68k/math-emu/fp_log.c b/arch/m68k/math-emu/fp_log.c
index 367ecee2f981..3384a5244fbd 100644
--- a/arch/m68k/math-emu/fp_log.c
+++ b/arch/m68k/math-emu/fp_log.c
@@ -105,9 +105,6 @@ fp_fetoxm1(struct fp_ext *dest, struct fp_ext *src)
        fp_monadic_check(dest, src);
-        if (IS_ZERO(dest))
-                return dest;
        return dest;
 }
diff --git a/arch/m68k/math-emu/multi_arith.h b/arch/m68k/math-emu/multi_arith.h
index 4ad0ca918e2e..4b5eb3d85638 100644
--- a/arch/m68k/math-emu/multi_arith.h
+++ b/arch/m68k/math-emu/multi_arith.h
@@ -19,246 +19,6 @@
 #ifndef MULTI_ARITH_H
 #define MULTI_ARITH_H
-#if 0   /* old code... */
-/* Unsigned only, because we don't need signs to multiply and divide. */
-typedef unsigned int int128[4];
-/* Word order */
-enum {
-        MSW128,
-        NMSW128,
-        NLSW128,
-        LSW128
-};
-/* big-endian */
-#define LO_WORD(ll) (((unsigned int *) &ll)[1])
-#define HI_WORD(ll) (((unsigned int *) &ll)[0])
-/* Convenience functions to stuff various integer values into int128s */
-static inline void zero128(int128 a)
-{
-        a[LSW128] = a[NLSW128] = a[NMSW128] = a[MSW128] = 0;
-}
-/* Human-readable word order in the arguments */
-static inline void set128(unsigned int i3, unsigned int i2, unsigned int i1,
-                          unsigned int i0, int128 a)
-{
-        a[LSW128] = i0;
-        a[NLSW128] = i1;
-        a[NMSW128] = i2;
-        a[MSW128] = i3;
-}
-/* Convenience functions (for testing as well) */
-static inline void int64_to_128(unsigned long long src, int128 dest)
-{
-        dest[LSW128] = (unsigned int) src;
-        dest[NLSW128] = src >> 32;
-        dest[NMSW128] = dest[MSW128] = 0;
-}
-static inline void int128_to_64(const int128 src, unsigned long long *dest)
-{
-        *dest = src[LSW128] | (long long) src[NLSW128] << 32;
-}
-static inline void put_i128(const int128 a)
-{
-        printk("%08x %08x %08x %08x\n", a[MSW128], a[NMSW128],
-               a[NLSW128], a[LSW128]);
-}
-/* Internal shifters:
-   Note that these are only good for 0 < count < 32.
- */
-static inline void _lsl128(unsigned int count, int128 a)
-{
-        a[MSW128] = (a[MSW128] << count) | (a[NMSW128] >> (32 - count));
-        a[NMSW128] = (a[NMSW128] << count) | (a[NLSW128] >> (32 - count));
-        a[NLSW128] = (a[NLSW128] << count) | (a[LSW128] >> (32 - count));
-        a[LSW128] <<= count;
-}
-static inline void _lsr128(unsigned int count, int128 a)
-{
-        a[LSW128] = (a[LSW128] >> count) | (a[NLSW128] << (32 - count));
-        a[NLSW128] = (a[NLSW128] >> count) | (a[NMSW128] << (32 - count));
-        a[NMSW128] = (a[NMSW128] >> count) | (a[MSW128] << (32 - count));
-        a[MSW128] >>= count;
-}
-/* Should be faster, one would hope */
-static inline void lslone128(int128 a)
-{
-        asm volatile ("lsl.l #1,%0\n"
-                      "roxl.l #1,%1\n"
-                      "roxl.l #1,%2\n"
-                      "roxl.l #1,%3\n"
-                      :
-                      "=d" (a[LSW128]),
-                      "=d"(a[NLSW128]),
-                      "=d"(a[NMSW128]),
-                      "=d"(a[MSW128])
-                      :
-                      "0"(a[LSW128]),
-                      "1"(a[NLSW128]),
-                      "2"(a[NMSW128]),
-                      "3"(a[MSW128]));
-}
-static inline void lsrone128(int128 a)
-{
-        asm volatile ("lsr.l #1,%0\n"
-                      "roxr.l #1,%1\n"
-                      "roxr.l #1,%2\n"
-                      "roxr.l #1,%3\n"
-                      :
-                      "=d" (a[MSW128]),
-                      "=d"(a[NMSW128]),
-                      "=d"(a[NLSW128]),
-                      "=d"(a[LSW128])
-                      :
-                      "0"(a[MSW128]),
-                      "1"(a[NMSW128]),
-                      "2"(a[NLSW128]),
-                      "3"(a[LSW128]));
-}
-/* Generalized 128-bit shifters:
-   These bit-shift to a multiple of 32, then move whole longwords.  */
-static inline void lsl128(unsigned int count, int128 a)
-{
-        int wordcount, i;
-        if (count % 32)
-                _lsl128(count % 32, a);
-        if (0 == (wordcount = count / 32))
-                return;
-        /* argh, gak, endian-sensitive */
-        for (i = 0; i < 4 - wordcount; i++) {
-                a[i] = a[i + wordcount];
-        }
-        for (i = 3; i >= 4 - wordcount; --i) {
-                a[i] = 0;
-        }
-}
-static inline void lsr128(unsigned int count, int128 a)
-{
-        int wordcount, i;
-        if (count % 32)
-                _lsr128(count % 32, a);
-        if (0 == (wordcount = count / 32))
-                return;
-        for (i = 3; i >= wordcount; --i) {
-                a[i] = a[i - wordcount];
-        }
-        for (i = 0; i < wordcount; i++) {
-                a[i] = 0;
-        }
-}
-static inline int orl128(int a, int128 b)
-{
-        b[LSW128] |= a;
-}
-static inline int btsthi128(const int128 a)
-{
-        return a[MSW128] & 0x80000000;
-}
-/* test bits (numbered from 0 = LSB) up to and including "top" */
-static inline int bftestlo128(int top, const int128 a)
-{
-        int r = 0;
-        if (top > 31)
-                r |= a[LSW128];
-        if (top > 63)
-                r |= a[NLSW128];
-        if (top > 95)
-                r |= a[NMSW128];
-        r |= a[3 - (top / 32)] & ((1 << (top % 32 + 1)) - 1);
-        return (r != 0);
-}
-/* Aargh.  We need these because GCC is broken */
-/* FIXME: do them in assembly, for goodness' sake! */
-static inline void mask64(int pos, unsigned long long *mask)
-{
-        *mask = 0;
-        if (pos < 32) {
-                LO_WORD(*mask) = (1 << pos) - 1;
-                return;
-        }
-        LO_WORD(*mask) = -1;
-        HI_WORD(*mask) = (1 << (pos - 32)) - 1;
-}
-static inline void bset64(int pos, unsigned long long *dest)
-{
-        /* This conditional will be optimized away.  Thanks, GCC! */
-        if (pos < 32)
-                asm volatile ("bset %1,%0":"=m"
-                              (LO_WORD(*dest)):"id"(pos));
-        else
-                asm volatile ("bset %1,%0":"=m"
-                              (HI_WORD(*dest)):"id"(pos - 32));
-}
-static inline int btst64(int pos, unsigned long long dest)
-{
-        if (pos < 32)
-                return (0 != (LO_WORD(dest) & (1 << pos)));
-        else
-                return (0 != (HI_WORD(dest) & (1 << (pos - 32))));
-}
-static inline void lsl64(int count, unsigned long long *dest)
-{
-        if (count < 32) {
-                HI_WORD(*dest) = (HI_WORD(*dest) << count)
-                    | (LO_WORD(*dest) >> count);
-                LO_WORD(*dest) <<= count;
-                return;
-        }
-        count -= 32;
-        HI_WORD(*dest) = LO_WORD(*dest) << count;
-        LO_WORD(*dest) = 0;
-}
-static inline void lsr64(int count, unsigned long long *dest)
-{
-        if (count < 32) {
-                LO_WORD(*dest) = (LO_WORD(*dest) >> count)
-                    | (HI_WORD(*dest) << (32 - count));
-                HI_WORD(*dest) >>= count;
-                return;
-        }
-        count -= 32;
-        LO_WORD(*dest) = HI_WORD(*dest) >> count;
-        HI_WORD(*dest) = 0;
-}
-#endif
 static inline void fp_denormalize(struct fp_ext *reg, unsigned int cnt)
 {
        reg->exp += cnt;
@@ -481,117 +241,6 @@ static inline void fp_dividemant(union fp_mant128 *dest, struct fp_ext *src,
        }
 }
-#if 0
-static inline unsigned int fp_fls128(union fp_mant128 *src)
-{
-        unsigned long data;
-        unsigned int res, off;
-        if ((data = src->m32[0]))
-                off = 0;
-        else if ((data = src->m32[1]))
-                off = 32;
-        else if ((data = src->m32[2]))
-                off = 64;
-        else if ((data = src->m32[3]))
-                off = 96;
-        else
-                return 128;
-        asm ("bfffo %1{#0,#32},%0" : "=d" (res) : "dm" (data));
-        return res + off;
-}
-static inline void fp_shiftmant128(union fp_mant128 *src, int shift)
-{
-        unsigned long sticky;
-        switch (shift) {
-        case 0:
-                return;
-        case 1:
-                asm volatile ("lsl.l #1,%0"
-                        : "=d" (src->m32[3]) : "0" (src->m32[3]));
-                asm volatile ("roxl.l #1,%0"
-                        : "=d" (src->m32[2]) : "0" (src->m32[2]));
-                asm volatile ("roxl.l #1,%0"
-                        : "=d" (src->m32[1]) : "0" (src->m32[1]));
-                asm volatile ("roxl.l #1,%0"
-                        : "=d" (src->m32[0]) : "0" (src->m32[0]));
-                return;
-        case 2 ... 31:
-                src->m32[0] = (src->m32[0] << shift) | (src->m32[1] >> (32 - shift));
-                src->m32[1] = (src->m32[1] << shift) | (src->m32[2] >> (32 - shift));
-                src->m32[2] = (src->m32[2] << shift) | (src->m32[3] >> (32 - shift));
-                src->m32[3] = (src->m32[3] << shift);
-                return;
-        case 32 ... 63:
-                shift -= 32;
-                src->m32[0] = (src->m32[1] << shift) | (src->m32[2] >> (32 - shift));
-                src->m32[1] = (src->m32[2] << shift) | (src->m32[3] >> (32 - shift));
-                src->m32[2] = (src->m32[3] << shift);
-                src->m32[3] = 0;
-                return;
-        case 64 ... 95:
-                shift -= 64;
-                src->m32[0] = (src->m32[2] << shift) | (src->m32[3] >> (32 - shift));
-                src->m32[1] = (src->m32[3] << shift);
-                src->m32[2] = src->m32[3] = 0;
-                return;
-        case 96 ... 127:
-                shift -= 96;
-                src->m32[0] = (src->m32[3] << shift);
-                src->m32[1] = src->m32[2] = src->m32[3] = 0;
-                return;
-        case -31 ... -1:
-                shift = -shift;
-                sticky = 0;
-                if (src->m32[3] << (32 - shift))
-                        sticky = 1;
-                src->m32[3] = (src->m32[3] >> shift) | (src->m32[2] << (32 - shift)) | sticky;
-                src->m32[2] = (src->m32[2] >> shift) | (src->m32[1] << (32 - shift));
-                src->m32[1] = (src->m32[1] >> shift) | (src->m32[0] << (32 - shift));
-                src->m32[0] = (src->m32[0] >> shift);
-                return;
-        case -63 ... -32:
-                shift = -shift - 32;
-                sticky = 0;
-                if ((src->m32[2] << (32 - shift)) || src->m32[3])
-                        sticky = 1;
-                src->m32[3] = (src->m32[2] >> shift) | (src->m32[1] << (32 - shift)) | sticky;
-                src->m32[2] = (src->m32[1] >> shift) | (src->m32[0] << (32 - shift));
-                src->m32[1] = (src->m32[0] >> shift);
-                src->m32[0] = 0;
-                return;
-        case -95 ... -64:
-                shift = -shift - 64;
-                sticky = 0;
-                if ((src->m32[1] << (32 - shift)) || src->m32[2] || src->m32[3])
-                        sticky = 1;
-                src->m32[3] = (src->m32[1] >> shift) | (src->m32[0] << (32 - shift)) | sticky;
-                src->m32[2] = (src->m32[0] >> shift);
-                src->m32[1] = src->m32[0] = 0;
-                return;
-        case -127 ... -96:
-                shift = -shift - 96;
-                sticky = 0;
-                if ((src->m32[0] << (32 - shift)) || src->m32[1] || src->m32[2] || src->m32[3])
-                        sticky = 1;
-                src->m32[3] = (src->m32[0] >> shift) | sticky;
-                src->m32[2] = src->m32[1] = src->m32[0] = 0;
-                return;
-        }
-        if (shift < 0 && (src->m32[0] || src->m32[1] || src->m32[2] || src->m32[3]))
-                src->m32[3] = 1;
-        else
-                src->m32[3] = 0;
-        src->m32[2] = 0;
-        src->m32[1] = 0;
-        src->m32[0] = 0;
-}
-#endif
 static inline void fp_putmant128(struct fp_ext *dest, union fp_mant128 *src,
                                 int shift)
 {
@@ -637,183 +286,4 @@ static inline void fp_putmant128(struct fp_ext *dest, union fp_mant128 *src,
        }
 }
-#if 0 /* old code... */
-static inline int fls(unsigned int a)
-{
-        int r;
-        asm volatile ("bfffo %1{#0,#32},%0"
-                      : "=d" (r) : "md" (a));
-        return r;
-}
-/* fls = "find last set" (cf. ffs(3)) */
-static inline int fls128(const int128 a)
-{
-        if (a[MSW128])
-                return fls(a[MSW128]);
-        if (a[NMSW128])
-                return fls(a[NMSW128]) + 32;
-        /* XXX: it probably never gets beyond this point in actual
-           use, but that's indicative of a more general problem in the
-           algorithm (i.e. as per the actual 68881 implementation, we
-           really only need at most 67 bits of precision [plus
-           overflow]) so I'm not going to fix it. */
-        if (a[NLSW128])
-                return fls(a[NLSW128]) + 64;
-        if (a[LSW128])
-                return fls(a[LSW128]) + 96;
-        else
-                return -1;
-}
-static inline int zerop128(const int128 a)
-{
-        return !(a[LSW128] | a[NLSW128] | a[NMSW128] | a[MSW128]);
-}
-static inline int nonzerop128(const int128 a)
-{
-        return (a[LSW128] | a[NLSW128] | a[NMSW128] | a[MSW128]);
-}
-/* Addition and subtraction */
-/* Do these in "pure" assembly, because "extended" asm is unmanageable
-   here */
-static inline void add128(const int128 a, int128 b)
-{
-        /* rotating carry flags */
-        unsigned int carry[2];
-        carry[0] = a[LSW128] > (0xffffffff - b[LSW128]);
-        b[LSW128] += a[LSW128];
-        carry[1] = a[NLSW128] > (0xffffffff - b[NLSW128] - carry[0]);
-        b[NLSW128] = a[NLSW128] + b[NLSW128] + carry[0];
-        carry[0] = a[NMSW128] > (0xffffffff - b[NMSW128] - carry[1]);
-        b[NMSW128] = a[NMSW128] + b[NMSW128] + carry[1];
-        b[MSW128] = a[MSW128] + b[MSW128] + carry[0];
-}
-/* Note: assembler semantics: "b -= a" */
-static inline void sub128(const int128 a, int128 b)
-{
-        /* rotating borrow flags */
-        unsigned int borrow[2];
-        borrow[0] = b[LSW128] < a[LSW128];
-        b[LSW128] -= a[LSW128];
-        borrow[1] = b[NLSW128] < a[NLSW128] + borrow[0];
-        b[NLSW128] = b[NLSW128] - a[NLSW128] - borrow[0];
-        borrow[0] = b[NMSW128] < a[NMSW128] + borrow[1];
-        b[NMSW128] = b[NMSW128] - a[NMSW128] - borrow[1];
-        b[MSW128] = b[MSW128] - a[MSW128] - borrow[0];
-}
-/* Poor man's 64-bit expanding multiply */
-static inline void mul64(unsigned long long a, unsigned long long b, int128 c)
-{
-        unsigned long long acc;
-        int128 acc128;
-        zero128(acc128);
-        zero128(c);
-        /* first the low words */
-        if (LO_WORD(a) && LO_WORD(b)) {
-                acc = (long long) LO_WORD(a) * LO_WORD(b);
-                c[NLSW128] = HI_WORD(acc);
-                c[LSW128] = LO_WORD(acc);
-        }
-        /* Next the high words */
-        if (HI_WORD(a) && HI_WORD(b)) {
-                acc = (long long) HI_WORD(a) * HI_WORD(b);
-                c[MSW128] = HI_WORD(acc);
-                c[NMSW128] = LO_WORD(acc);
-        }
-        /* The middle words */
-        if (LO_WORD(a) && HI_WORD(b)) {
-                acc = (long long) LO_WORD(a) * HI_WORD(b);
-                acc128[NMSW128] = HI_WORD(acc);
-                acc128[NLSW128] = LO_WORD(acc);
-                add128(acc128, c);
-        }
-        /* The first and last words */
-        if (HI_WORD(a) && LO_WORD(b)) {
-                acc = (long long) HI_WORD(a) * LO_WORD(b);
-                acc128[NMSW128] = HI_WORD(acc);
-                acc128[NLSW128] = LO_WORD(acc);
-                add128(acc128, c);
-        }
-}
-/* Note: unsigned */
-static inline int cmp128(int128 a, int128 b)
-{
-        if (a[MSW128] < b[MSW128])
-                return -1;
-        if (a[MSW128] > b[MSW128])
-                return 1;
-        if (a[NMSW128] < b[NMSW128])
-                return -1;
-        if (a[NMSW128] > b[NMSW128])
-                return 1;
-        if (a[NLSW128] < b[NLSW128])
-                return -1;
-        if (a[NLSW128] > b[NLSW128])
-                return 1;
-        return (signed) a[LSW128] - b[LSW128];
-}
-inline void div128(int128 a, int128 b, int128 c)
-{
-        int128 mask;
-        /* Algorithm:
-           Shift the divisor until it's at least as big as the
-           dividend, keeping track of the position to which we've
-           shifted it, i.e. the power of 2 which we've multiplied it
-           by.
-           Then, for this power of 2 (the mask), and every one smaller
-           than it, subtract the mask from the dividend and add it to
-           the quotient until the dividend is smaller than the raised
-           divisor.  At this point, divide the dividend and the mask
-           by 2 (i.e. shift one place to the right).  Lather, rinse,
-           and repeat, until there are no more powers of 2 left. */
-        /* FIXME: needless to say, there's room for improvement here too. */
-        /* Shift up */
-        /* XXX: since it just has to be "at least as big", we can
-           probably eliminate this horribly wasteful loop.  I will
-           have to prove this first, though */
-        set128(0, 0, 0, 1, mask);
-        while (cmp128(b, a) < 0 && !btsthi128(b)) {
-                lslone128(b);
-                lslone128(mask);
-        }
-        /* Shift down */
-        zero128(c);
-        do {
-                if (cmp128(a, b) >= 0) {
-                        sub128(b, a);
-                        add128(mask, c);
-                }
-                lsrone128(mask);
-                lsrone128(b);
-        } while (nonzerop128(mask));
-        /* The remainder is in a... */
-}
-#endif
 #endif  /* MULTI_ARITH_H */
diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c
index 9113c2f17607..bbe525434ccb 100644
--- a/arch/m68k/mm/init_mm.c
+++ b/arch/m68k/mm/init_mm.c
@@ -83,11 +83,6 @@ void __init mem_init(void)
        int initpages = 0;
        int i;
-#ifdef CONFIG_ATARI
-        if (MACH_IS_ATARI)
-                atari_stram_mem_init_hook();
-#endif
        /* this will put all memory onto the freelists */
        totalram_pages = num_physpages = 0;
        for_each_online_pgdat(pgdat) {
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 65adc86a230e..e077b0bf56ca 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -15,6 +15,7 @@ config PARISC
        select HAVE_GENERIC_HARDIRQS
        select GENERIC_IRQ_PROBE
        select IRQ_PER_CPU
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG
        help
          The PA-RISC microprocessor is designed by Hewlett-Packard and used
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h
index b1dc71f5534e..4054b31e0fa9 100644
--- a/arch/parisc/include/asm/atomic.h
+++ b/arch/parisc/include/asm/atomic.h
@@ -258,10 +258,10 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
 #define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
-static __inline__ int
+static __inline__ s64
 __atomic64_add_return(s64 i, atomic64_t *v)
 {
-        int ret;
+        s64 ret;
        unsigned long flags;
        _atomic_spin_lock_irqsave(v, flags);
diff --git a/arch/parisc/include/asm/futex.h b/arch/parisc/include/asm/futex.h
index 67a33cc27ef2..2388bdb32832 100644
--- a/arch/parisc/include/asm/futex.h
+++ b/arch/parisc/include/asm/futex.h
@@ -5,11 +5,14 @@
 #include <linux/futex.h>
 #include <linux/uaccess.h>
+#include <asm/atomic.h>
 #include <asm/errno.h>
 static inline int
 futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
 {
+        unsigned long int flags;
+        u32 val;
        int op = (encoded_op >> 28) & 7;
        int cmp = (encoded_op >> 24) & 15;
        int oparg = (encoded_op << 8) >> 20;
@@ -18,21 +21,58 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
        if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
                oparg = 1 << oparg;
-        if (! access_ok (VERIFY_WRITE, uaddr, sizeof(u32)))
+        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(*uaddr)))
                return -EFAULT;
        pagefault_disable();
+        _atomic_spin_lock_irqsave(uaddr, flags);
        switch (op) {
        case FUTEX_OP_SET:
+                /* *(int *)UADDR2 = OPARG; */
+                ret = get_user(oldval, uaddr);
+                if (!ret)
+                        ret = put_user(oparg, uaddr);
+                break;
        case FUTEX_OP_ADD:
+                /* *(int *)UADDR2 += OPARG; */
+                ret = get_user(oldval, uaddr);
+                if (!ret) {
+                        val = oldval + oparg;
+                        ret = put_user(val, uaddr);
+                }
+                break;
        case FUTEX_OP_OR:
+                /* *(int *)UADDR2 |= OPARG; */
+                ret = get_user(oldval, uaddr);
+                if (!ret) {
+                        val = oldval | oparg;
+                        ret = put_user(val, uaddr);
+                }
+                break;
        case FUTEX_OP_ANDN:
+                /* *(int *)UADDR2 &= ~OPARG; */
+                ret = get_user(oldval, uaddr);
+                if (!ret) {
+                        val = oldval & ~oparg;
+                        ret = put_user(val, uaddr);
+                }
+                break;
        case FUTEX_OP_XOR:
+                /* *(int *)UADDR2 ^= OPARG; */
+                ret = get_user(oldval, uaddr);
+                if (!ret) {
+                        val = oldval ^ oparg;
+                        ret = put_user(val, uaddr);
+                }
+                break;
        default:
                ret = -ENOSYS;
        }
+        _atomic_spin_unlock_irqrestore(uaddr, flags);
        pagefault_enable();
        if (!ret) {
@@ -54,7 +94,9 @@ static inline int
 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
                              u32 oldval, u32 newval)
 {
+        int ret;
        u32 val;
+        unsigned long flags;
        /* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is
         * our gateway page, and causes no end of trouble...
@@ -65,12 +107,24 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
                return -EFAULT;
-        if (get_user(val, uaddr))
+        /* HPPA has no cmpxchg in hardware and therefore the
-                return -EFAULT;
+         * best we can do here is use an array of locks. The
-        if (val == oldval && put_user(newval, uaddr))
+         * lock selected is based on a hash of the userspace
-                return -EFAULT;
+         * address. This should scale to a couple of CPUs.
+         */
+        _atomic_spin_lock_irqsave(uaddr, flags);
+        ret = get_user(val, uaddr);
+        if (!ret && val == oldval)
+                ret = put_user(newval, uaddr);
        *uval = val;
-        return 0;
+        _atomic_spin_unlock_irqrestore(uaddr, flags);
+        return ret;
 }
 #endif /*__KERNEL__*/
diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h
index 3392de3e7be0..d61de64f990a 100644
--- a/arch/parisc/include/asm/unistd.h
+++ b/arch/parisc/include/asm/unistd.h
@@ -821,8 +821,9 @@
 #define __NR_open_by_handle_at  (__NR_Linux + 326)
 #define __NR_syncfs             (__NR_Linux + 327)
 #define __NR_setns              (__NR_Linux + 328)
+#define __NR_sendmmsg           (__NR_Linux + 329)
-#define __NR_Linux_syscalls     (__NR_setns + 1)
+#define __NR_Linux_syscalls     (__NR_sendmmsg + 1)
 #define __IGNORE_select         /* newselect */
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 34a4f5a2fffb..e66366fd2abc 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -427,6 +427,7 @@
        ENTRY_COMP(open_by_handle_at)
        ENTRY_SAME(syncfs)
        ENTRY_SAME(setns)
+        ENTRY_COMP(sendmmsg)
        /* Nothing yet */
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 374c475e56a3..6926b61acfea 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -136,6 +136,7 @@ config PPC
        select HAVE_SYSCALL_TRACEPOINTS
        select HAVE_BPF_JIT if (PPC64 && NET)
        select HAVE_ARCH_JUMP_LABEL
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG
 config EARLY_PRINTK
        bool
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index c03fef7a9c22..ed5cb5af5281 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -81,6 +81,7 @@ config S390
        select INIT_ALL_POSSIBLE
        select HAVE_IRQ_WORK
        select HAVE_PERF_EVENTS
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG
        select HAVE_KERNEL_GZIP
        select HAVE_KERNEL_BZIP2
        select HAVE_KERNEL_LZMA
@@ -273,11 +274,11 @@ config MARCH_Z10
          on older machines.
 config MARCH_Z196
-        bool "IBM zEnterprise 196"
+        bool "IBM zEnterprise 114 and 196"
        help
-          Select this to enable optimizations for IBM zEnterprise 196
+          Select this to enable optimizations for IBM zEnterprise 114 and 196
-          (2817 series). The kernel will be slightly faster but will not work
+          (2818 and 2817 series). The kernel will be slightly faster but will
-          on older machines.
+          not work on older machines.
 endchoice
diff --git a/arch/s390/include/asm/ipl.h b/arch/s390/include/asm/ipl.h
index 5e95d95450b3..97cc4403fabf 100644
--- a/arch/s390/include/asm/ipl.h
+++ b/arch/s390/include/asm/ipl.h
@@ -167,5 +167,6 @@ enum diag308_rc {
 };
 extern int diag308(unsigned long subcode, void *addr);
+extern void diag308_reset(void);
 #endif /* _ASM_S390_IPL_H */
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index f26280d9e88d..e85c911aabf0 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -18,6 +18,7 @@ void system_call(void);
 void pgm_check_handler(void);
 void mcck_int_handler(void);
 void io_int_handler(void);
+void psw_restart_int_handler(void);
 #ifdef CONFIG_32BIT
@@ -150,7 +151,10 @@ struct _lowcore {
         */
        __u32   ipib;                           /* 0x0e00 */
        __u32   ipib_checksum;                  /* 0x0e04 */
-        __u8    pad_0x0e08[0x0f00-0x0e08];      /* 0x0e08 */
+        /* 64 bit save area */
+        __u64   save_area_64;                   /* 0x0e08 */
+        __u8    pad_0x0e10[0x0f00-0x0e10];      /* 0x0e10 */
        /* Extended facility list */
        __u64   stfle_fac_list[32];             /* 0x0f00 */
@@ -286,7 +290,10 @@ struct _lowcore {
         */
        __u64   ipib;                           /* 0x0e00 */
        __u32   ipib_checksum;                  /* 0x0e08 */
-        __u8    pad_0x0e0c[0x0f00-0x0e0c];      /* 0x0e0c */
+        /* 64 bit save area */
+        __u64   save_area_64;                   /* 0x0e0c */
+        __u8    pad_0x0e14[0x0f00-0x0e14];      /* 0x0e14 */
        /* Extended facility list */
        __u64   stfle_fac_list[32];             /* 0x0f00 */
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index 55dfcc8bdc0d..a4b6229e5d4b 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -119,14 +119,12 @@ struct stack_frame {
 * Do necessary setup to start up a new thread.
 */
 #define start_thread(regs, new_psw, new_stackp) do {            \
-        set_fs(USER_DS);                                        \
        regs->psw.mask  = psw_user_bits;                        \
        regs->psw.addr  = new_psw | PSW_ADDR_AMODE;             \
        regs->gprs[15]  = new_stackp;                           \
 } while (0)
 #define start_thread31(regs, new_psw, new_stackp) do {          \
-        set_fs(USER_DS);                                        \
        regs->psw.mask  = psw_user32_bits;                      \
        regs->psw.addr  = new_psw | PSW_ADDR_AMODE;             \
        regs->gprs[15]  = new_stackp;                           \
diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h
index d382629a0172..6582f69f2389 100644
--- a/arch/s390/include/asm/system.h
+++ b/arch/s390/include/asm/system.h
@@ -113,6 +113,7 @@ extern void pfault_fini(void);
 extern void cmma_init(void);
 extern int memcpy_real(void *, void *, size_t);
+extern void copy_to_absolute_zero(void *dest, void *src, size_t count);
 #define finish_arch_switch(prev) do {                                        \
        set_fs(current->thread.mm_segment);                                  \
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index 05d8f38734ec..532fd4322156 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -27,12 +27,9 @@ int main(void)
        BLANK();
        DEFINE(__TASK_pid, offsetof(struct task_struct, pid));
        BLANK();
-        DEFINE(__THREAD_per_cause,
+        DEFINE(__THREAD_per_cause, offsetof(struct task_struct, thread.per_event.cause));
-               offsetof(struct task_struct, thread.per_event.cause));
+        DEFINE(__THREAD_per_address, offsetof(struct task_struct, thread.per_event.address));
-        DEFINE(__THREAD_per_address,
+        DEFINE(__THREAD_per_paid, offsetof(struct task_struct, thread.per_event.paid));
-               offsetof(struct task_struct, thread.per_event.address));
-        DEFINE(__THREAD_per_paid,
-               offsetof(struct task_struct, thread.per_event.paid));
        BLANK();
        DEFINE(__TI_task, offsetof(struct thread_info, task));
        DEFINE(__TI_domain, offsetof(struct thread_info, exec_domain));
@@ -142,6 +139,7 @@ int main(void)
        DEFINE(__LC_FPREGS_SAVE_AREA, offsetof(struct _lowcore, floating_pt_save_area));
        DEFINE(__LC_GPREGS_SAVE_AREA, offsetof(struct _lowcore, gpregs_save_area));
        DEFINE(__LC_CREGS_SAVE_AREA, offsetof(struct _lowcore, cregs_save_area));
+        DEFINE(__LC_SAVE_AREA_64, offsetof(struct _lowcore, save_area_64));
 #ifdef CONFIG_32BIT
        DEFINE(SAVE_AREA_BASE, offsetof(struct _lowcore, extended_save_area_addr));
 #else /* CONFIG_32BIT */
diff --git a/arch/s390/kernel/base.S b/arch/s390/kernel/base.S
index 209938c1dfc8..255435663bf8 100644
--- a/arch/s390/kernel/base.S
+++ b/arch/s390/kernel/base.S
@@ -76,6 +76,42 @@ s390_base_pgm_handler_fn:
        .quad   0
        .previous
+#
+# Calls diag 308 subcode 1 and continues execution
+#
+# The following conditions must be ensured before calling this function:
+# * Prefix register = 0
+# * Lowcore protection is disabled
+#
+ENTRY(diag308_reset)
+        larl    %r4,.Lctlregs           # Save control registers
+        stctg   %c0,%c15,0(%r4)
+        larl    %r4,.Lrestart_psw       # Setup restart PSW at absolute 0
+        lghi    %r3,0
+        lg      %r4,0(%r4)              # Save PSW
+        sturg   %r4,%r3                 # Use sturg, because of large pages
+        lghi    %r1,1
+        diag    %r1,%r1,0x308
+.Lrestart_part2:
+        lhi     %r0,0                   # Load r0 with zero
+        lhi     %r1,2                   # Use mode 2 = ESAME (dump)
+        sigp    %r1,%r0,0x12            # Switch to ESAME mode
+        sam64                           # Switch to 64 bit addressing mode
+        larl    %r4,.Lctlregs           # Restore control registers
+        lctlg   %c0,%c15,0(%r4)
+        br      %r14
+.align 16
+.Lrestart_psw:
+        .long   0x00080000,0x80000000 + .Lrestart_part2
+        .section .bss
+.align 8
+.Lctlregs:
+        .rept   16
+        .quad   0
+        .endr
+        .previous
 #else /* CONFIG_64BIT */
 ENTRY(s390_base_mcck_handler)
diff --git a/arch/s390/kernel/compat_signal.c b/arch/s390/kernel/compat_signal.c
index eee999853a7c..a9a285b8c4ad 100644
--- a/arch/s390/kernel/compat_signal.c
+++ b/arch/s390/kernel/compat_signal.c
@@ -380,20 +380,13 @@ asmlinkage long sys32_sigreturn(void)
                goto badframe;
        if (__copy_from_user(&set.sig, &frame->sc.oldmask, _SIGMASK_COPY_SIZE32))
                goto badframe;
        sigdelsetmask(&set, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
+        set_current_blocked(&set);
-        current->blocked = set;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
        if (restore_sigregs32(regs, &frame->sregs))
                goto badframe;
        if (restore_sigregs_gprs_high(regs, frame->gprs_high))
                goto badframe;
        return regs->gprs[2];
 badframe:
        force_sig(SIGSEGV, current);
        return 0;
@@ -413,31 +406,22 @@ asmlinkage long sys32_rt_sigreturn(void)
                goto badframe;
        if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
                goto badframe;
        sigdelsetmask(&set, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
+        set_current_blocked(&set);
-        current->blocked = set;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
        if (restore_sigregs32(regs, &frame->uc.uc_mcontext))
                goto badframe;
        if (restore_sigregs_gprs_high(regs, frame->gprs_high))
                goto badframe;
        err = __get_user(ss_sp, &frame->uc.uc_stack.ss_sp);
        st.ss_sp = compat_ptr(ss_sp);
        err |= __get_user(st.ss_size, &frame->uc.uc_stack.ss_size);
        err |= __get_user(st.ss_flags, &frame->uc.uc_stack.ss_flags);
        if (err)
                goto badframe; 
        set_fs (KERNEL_DS);
        do_sigaltstack((stack_t __force __user *)&st, NULL, regs->gprs[15]);
        set_fs (old_fs);
        return regs->gprs[2];
 badframe:
        force_sig(SIGSEGV, current);
        return 0;
@@ -605,10 +589,10 @@ give_sigsegv:
 * OK, we're invoking a handler
 */     
-int
+int handle_signal32(unsigned long sig, struct k_sigaction *ka,
-handle_signal32(unsigned long sig, struct k_sigaction *ka,
+                    siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)
-                siginfo_t *info, sigset_t *oldset, struct pt_regs * regs)
 {
+        sigset_t blocked;
        int ret;
        /* Set up the stack frame */
@@ -616,15 +600,12 @@ handle_signal32(unsigned long sig, struct k_sigaction *ka,
                ret = setup_rt_frame32(sig, ka, info, oldset, regs);
        else
                ret = setup_frame32(sig, ka, oldset, regs);
+        if (ret)
-        if (ret == 0) {
+                return ret;
-                spin_lock_irq(&current->sighand->siglock);
+        sigorsets(&blocked, &current->blocked, &ka->sa.sa_mask);
-                sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
+        if (!(ka->sa.sa_flags & SA_NODEFER))
-                if (!(ka->sa.sa_flags & SA_NODEFER))
+                sigaddset(&blocked, sig);
-                        sigaddset(&current->blocked,sig);
+        set_current_blocked(&blocked);
-                recalc_sigpending();
+        return 0;
-                spin_unlock_irq(&current->sighand->siglock);
-        }
-        return ret;
 }
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 3eab7cfab07c..02ec8fe7d03f 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -849,6 +849,34 @@ restart_crash:
 restart_go:
 #endif
+#
+# PSW restart interrupt handler
+#
+ENTRY(psw_restart_int_handler)
+        st      %r15,__LC_SAVE_AREA_64(%r0)     # save r15
+        basr    %r15,0
+0:      l       %r15,.Lrestart_stack-0b(%r15)   # load restart stack
+        l       %r15,0(%r15)
+        ahi     %r15,-SP_SIZE                   # make room for pt_regs
+        stm     %r0,%r14,SP_R0(%r15)            # store gprs %r0-%r14 to stack
+        mvc     SP_R15(4,%r15),__LC_SAVE_AREA_64(%r0)# store saved %r15 to stack
+        mvc     SP_PSW(8,%r15),__LC_RST_OLD_PSW(%r0) # store restart old psw
+        xc      __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # set backchain to 0
+        basr    %r14,0
+1:      l       %r14,.Ldo_restart-1b(%r14)
+        basr    %r14,%r14
+        basr    %r14,0                          # load disabled wait PSW if
+2:      lpsw    restart_psw_crash-2b(%r14)      # do_restart returns
+        .align 4
+.Ldo_restart:
+        .long   do_restart
+.Lrestart_stack:
+        .long   restart_stack
+        .align 8
+restart_psw_crash:
+        .long   0x000a0000,0x00000000 + restart_psw_crash
        .section .kprobes.text, "ax"
 #ifdef CONFIG_CHECK_STACK
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 7a0fd426ca92..5f729d627cef 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -865,6 +865,26 @@ restart_crash:
 restart_go:
 #endif
+#
+# PSW restart interrupt handler
+#
+ENTRY(psw_restart_int_handler)
+        stg     %r15,__LC_SAVE_AREA_64(%r0)     # save r15
+        larl    %r15,restart_stack              # load restart stack
+        lg      %r15,0(%r15)
+        aghi    %r15,-SP_SIZE                   # make room for pt_regs
+        stmg    %r0,%r14,SP_R0(%r15)            # store gprs %r0-%r14 to stack
+        mvc     SP_R15(8,%r15),__LC_SAVE_AREA_64(%r0)# store saved %r15 to stack
+        mvc     SP_PSW(16,%r15),__LC_RST_OLD_PSW(%r0)# store restart old psw
+        xc      __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # set backchain to 0
+        brasl   %r14,do_restart
+        larl    %r14,restart_psw_crash          # load disabled wait PSW if
+        lpswe   0(%r14)                         # do_restart returns
+        .align 8
+restart_psw_crash:
+        .quad   0x0002000080000000,0x0000000000000000 + restart_psw_crash
        .section .kprobes.text, "ax"
 #ifdef CONFIG_CHECK_STACK
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c
index a689070be287..04361d5a4279 100644
--- a/arch/s390/kernel/ipl.c
+++ b/arch/s390/kernel/ipl.c
@@ -45,11 +45,13 @@
 * - halt
 * - power off
 * - reipl
+ * - restart
 */
 #define ON_PANIC_STR            "on_panic"
 #define ON_HALT_STR             "on_halt"
 #define ON_POFF_STR             "on_poff"
 #define ON_REIPL_STR            "on_reboot"
+#define ON_RESTART_STR          "on_restart"
 struct shutdown_action;
 struct shutdown_trigger {
@@ -1544,17 +1546,20 @@ static char vmcmd_on_reboot[128];
 static char vmcmd_on_panic[128];
 static char vmcmd_on_halt[128];
 static char vmcmd_on_poff[128];
+static char vmcmd_on_restart[128];
 DEFINE_IPL_ATTR_STR_RW(vmcmd, on_reboot, "%s\n", "%s\n", vmcmd_on_reboot);
 DEFINE_IPL_ATTR_STR_RW(vmcmd, on_panic, "%s\n", "%s\n", vmcmd_on_panic);
 DEFINE_IPL_ATTR_STR_RW(vmcmd, on_halt, "%s\n", "%s\n", vmcmd_on_halt);
 DEFINE_IPL_ATTR_STR_RW(vmcmd, on_poff, "%s\n", "%s\n", vmcmd_on_poff);
+DEFINE_IPL_ATTR_STR_RW(vmcmd, on_restart, "%s\n", "%s\n", vmcmd_on_restart);
 static struct attribute *vmcmd_attrs[] = {
        &sys_vmcmd_on_reboot_attr.attr,
        &sys_vmcmd_on_panic_attr.attr,
        &sys_vmcmd_on_halt_attr.attr,
        &sys_vmcmd_on_poff_attr.attr,
+        &sys_vmcmd_on_restart_attr.attr,
        NULL,
 };
@@ -1576,6 +1581,8 @@ static void vmcmd_run(struct shutdown_trigger *trigger)
                cmd = vmcmd_on_halt;
        else if (strcmp(trigger->name, ON_POFF_STR) == 0)
                cmd = vmcmd_on_poff;
+        else if (strcmp(trigger->name, ON_RESTART_STR) == 0)
+                cmd = vmcmd_on_restart;
        else
                return;
@@ -1707,6 +1714,34 @@ static void do_panic(void)
        stop_run(&on_panic_trigger);
 }
+/* on restart */
+static struct shutdown_trigger on_restart_trigger = {ON_RESTART_STR,
+        &reipl_action};
+static ssize_t on_restart_show(struct kobject *kobj,
+                               struct kobj_attribute *attr, char *page)
+{
+        return sprintf(page, "%s\n", on_restart_trigger.action->name);
+}
+static ssize_t on_restart_store(struct kobject *kobj,
+                                struct kobj_attribute *attr,
+                                const char *buf, size_t len)
+{
+        return set_trigger(buf, &on_restart_trigger, len);
+}
+static struct kobj_attribute on_restart_attr =
+        __ATTR(on_restart, 0644, on_restart_show, on_restart_store);
+void do_restart(void)
+{
+        smp_send_stop();
+        on_restart_trigger.action->fn(&on_restart_trigger);
+        stop_run(&on_restart_trigger);
+}
 /* on halt */
 static struct shutdown_trigger on_halt_trigger = {ON_HALT_STR, &stop_action};
@@ -1783,7 +1818,9 @@ static void __init shutdown_triggers_init(void)
        if (sysfs_create_file(&shutdown_actions_kset->kobj,
                              &on_poff_attr.attr))
                goto fail;
+        if (sysfs_create_file(&shutdown_actions_kset->kobj,
+                              &on_restart_attr.attr))
+                goto fail;
        return;
 fail:
        panic("shutdown_triggers_init failed\n");
@@ -1959,6 +1996,12 @@ static void do_reset_calls(void)
 {
        struct reset_call *reset;
+#ifdef CONFIG_64BIT
+        if (diag308_set_works) {
+                diag308_reset();
+                return;
+        }
+#endif
        list_for_each_entry(reset, &rcall, list)
                reset->fn();
 }
diff --git a/arch/s390/kernel/reipl64.S b/arch/s390/kernel/reipl64.S
index 78eb7cfbd3d1..e690975403f4 100644
--- a/arch/s390/kernel/reipl64.S
+++ b/arch/s390/kernel/reipl64.S
@@ -1,5 +1,5 @@
 /*
- *    Copyright IBM Corp 2000,2009
+ *    Copyright IBM Corp 2000,2011
 *    Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>,
 *               Denis Joseph Barrow,
 */
@@ -8,6 +8,64 @@
 #include <asm/asm-offsets.h>
 #
+# store_status
+#
+# Prerequisites to run this function:
+# - Prefix register is set to zero
+# - Original prefix register is stored in "dump_prefix_page"
+# - Lowcore protection is off
+#
+ENTRY(store_status)
+        /* Save register one and load save area base */
+        stg     %r1,__LC_SAVE_AREA_64(%r0)
+        lghi    %r1,SAVE_AREA_BASE
+        /* General purpose registers */
+        stmg    %r0,%r15,__LC_GPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        lg      %r2,__LC_SAVE_AREA_64(%r0)
+        stg     %r2,__LC_GPREGS_SAVE_AREA-SAVE_AREA_BASE+8(%r1)
+        /* Control registers */
+        stctg   %c0,%c15,__LC_CREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        /* Access registers */
+        stam    %a0,%a15,__LC_AREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        /* Floating point registers */
+        std     %f0, 0x00 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f1, 0x08 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f2, 0x10 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f3, 0x18 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f4, 0x20 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f5, 0x28 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f6, 0x30 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f7, 0x38 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f8, 0x40 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f9, 0x48 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f10,0x50 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f11,0x58 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f12,0x60 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f13,0x68 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f14,0x70 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        std     %f15,0x78 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        /* Floating point control register */
+        stfpc   __LC_FP_CREG_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        /* CPU timer */
+        stpt    __LC_CPU_TIMER_SAVE_AREA-SAVE_AREA_BASE(%r1)
+        /* Saved prefix register */
+        larl    %r2,dump_prefix_page
+        mvc     __LC_PREFIX_SAVE_AREA-SAVE_AREA_BASE(4,%r1),0(%r2)
+        /* Clock comparator - seven bytes */
+        larl    %r2,.Lclkcmp
+        stckc   0(%r2)
+        mvc     __LC_CLOCK_COMP_SAVE_AREA-SAVE_AREA_BASE + 1(7,%r1),1(%r2)
+        /* Program status word */
+        epsw    %r2,%r3
+        st      %r2,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 0(%r1)
+        st      %r3,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 4(%r1)
+        larl    %r2,store_status
+        stg     %r2,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 8(%r1)
+        br      %r14
+.align  8
+.Lclkcmp:       .quad   0x0000000000000000
+#
 # do_reipl_asm
 # Parameter: r2 = schid of reipl device
 #
@@ -15,22 +73,7 @@
 ENTRY(do_reipl_asm)
                basr    %r13,0
 .Lpg0:          lpswe   .Lnewpsw-.Lpg0(%r13)
-.Lpg1:          # do store status of all registers
+.Lpg1:          brasl   %r14,store_status
-                stg     %r1,.Lregsave-.Lpg0(%r13)
-                lghi    %r1,0x1000
-                stmg    %r0,%r15,__LC_GPREGS_SAVE_AREA-0x1000(%r1)
-                lg      %r0,.Lregsave-.Lpg0(%r13)
-                stg     %r0,__LC_GPREGS_SAVE_AREA-0x1000+8(%r1)
-                stctg   %c0,%c15,__LC_CREGS_SAVE_AREA-0x1000(%r1)
-                stam    %a0,%a15,__LC_AREGS_SAVE_AREA-0x1000(%r1)
-                lg      %r10,.Ldump_pfx-.Lpg0(%r13)
-                mvc     __LC_PREFIX_SAVE_AREA-0x1000(4,%r1),0(%r10)
-                stfpc   __LC_FP_CREG_SAVE_AREA-0x1000(%r1)
-                stckc   .Lclkcmp-.Lpg0(%r13)
-                mvc     __LC_CLOCK_COMP_SAVE_AREA-0x1000(7,%r1),.Lclkcmp-.Lpg0(%r13)
-                stpt    __LC_CPU_TIMER_SAVE_AREA-0x1000(%r1)
-                stg     %r13, __LC_PSW_SAVE_AREA-0x1000+8(%r1)
                lctlg   %c6,%c6,.Lall-.Lpg0(%r13)
                lgr     %r1,%r2
@@ -67,10 +110,7 @@ ENTRY(do_reipl_asm)
                st      %r14,.Ldispsw+12-.Lpg0(%r13)
                lpswe   .Ldispsw-.Lpg0(%r13)
                .align  8
-.Lclkcmp:       .quad   0x0000000000000000
 .Lall:          .quad   0x00000000ff000000
-.Ldump_pfx:     .quad   dump_prefix_page
-.Lregsave:      .quad   0x0000000000000000
                .align  16
 /*
 * These addresses have to be 31 bit otherwise
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 0c35dee10b00..7b371c37061d 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -346,7 +346,7 @@ setup_lowcore(void)
        lc = __alloc_bootmem_low(LC_PAGES * PAGE_SIZE, LC_PAGES * PAGE_SIZE, 0);
        lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
        lc->restart_psw.addr =
-                PSW_ADDR_AMODE | (unsigned long) restart_int_handler;
+                PSW_ADDR_AMODE | (unsigned long) psw_restart_int_handler;
        if (user_mode != HOME_SPACE_MODE)
                lc->restart_psw.mask |= PSW_ASC_HOME;
        lc->external_new_psw.mask = psw_kernel_bits;
@@ -529,6 +529,27 @@ static void __init setup_memory_end(void)
                memory_end = memory_size;
 }
+void *restart_stack __attribute__((__section__(".data")));
+/*
+ * Setup new PSW and allocate stack for PSW restart interrupt
+ */
+static void __init setup_restart_psw(void)
+{
+        psw_t psw;
+        restart_stack = __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0);
+        restart_stack += ASYNC_SIZE;
+        /*
+         * Setup restart PSW for absolute zero lowcore. This is necesary
+         * if PSW restart is done on an offline CPU that has lowcore zero
+         */
+        psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
+        psw.addr = PSW_ADDR_AMODE | (unsigned long) psw_restart_int_handler;
+        copy_to_absolute_zero(&S390_lowcore.restart_psw, &psw, sizeof(psw));
+}
 static void __init
 setup_memory(void)
 {
@@ -731,6 +752,7 @@ static void __init setup_hwcaps(void)
                strcpy(elf_platform, "z10");
                break;
        case 0x2817:
+        case 0x2818:
                strcpy(elf_platform, "z196");
                break;
        }
@@ -792,6 +814,7 @@ setup_arch(char **cmdline_p)
        setup_addressing_mode();
        setup_memory();
        setup_resources();
+        setup_restart_psw();
        setup_lowcore();
        cpu_init();
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index abbb3c3c7aab..9a40e1cc5ec3 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -57,17 +57,15 @@ typedef struct
 */
 SYSCALL_DEFINE3(sigsuspend, int, history0, int, history1, old_sigset_t, mask)
 {
-        mask &= _BLOCKABLE;
+        sigset_t blocked;
-        spin_lock_irq(&current->sighand->siglock);
-        current->saved_sigmask = current->blocked;
-        siginitset(&current->blocked, mask);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
+        current->saved_sigmask = current->blocked;
+        mask &= _BLOCKABLE;
+        siginitset(&blocked, mask);
+        set_current_blocked(&blocked);
        set_current_state(TASK_INTERRUPTIBLE);
        schedule();
-        set_thread_flag(TIF_RESTORE_SIGMASK);
+        set_restore_sigmask();
        return -ERESTARTNOHAND;
 }
@@ -172,18 +170,11 @@ SYSCALL_DEFINE0(sigreturn)
                goto badframe;
        if (__copy_from_user(&set.sig, &frame->sc.oldmask, _SIGMASK_COPY_SIZE))
                goto badframe;
        sigdelsetmask(&set, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
+        set_current_blocked(&set);
-        current->blocked = set;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
        if (restore_sigregs(regs, &frame->sregs))
                goto badframe;
        return regs->gprs[2];
 badframe:
        force_sig(SIGSEGV, current);
        return 0;
@@ -199,21 +190,14 @@ SYSCALL_DEFINE0(rt_sigreturn)
                goto badframe;
        if (__copy_from_user(&set.sig, &frame->uc.uc_sigmask, sizeof(set)))
                goto badframe;
        sigdelsetmask(&set, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
+        set_current_blocked(&set);
-        current->blocked = set;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
        if (restore_sigregs(regs, &frame->uc.uc_mcontext))
                goto badframe;
        if (do_sigaltstack(&frame->uc.uc_stack, NULL,
                           regs->gprs[15]) == -EFAULT)
                goto badframe;
        return regs->gprs[2];
 badframe:
        force_sig(SIGSEGV, current);
        return 0;
@@ -385,14 +369,11 @@ give_sigsegv:
        return -EFAULT;
 }
-/*
+static int handle_signal(unsigned long sig, struct k_sigaction *ka,
- * OK, we're invoking a handler
+                         siginfo_t *info, sigset_t *oldset,
- */     
+                         struct pt_regs *regs)
-static int
-handle_signal(unsigned long sig, struct k_sigaction *ka,
-              siginfo_t *info, sigset_t *oldset, struct pt_regs * regs)
 {
+        sigset_t blocked;
        int ret;
        /* Set up the stack frame */
@@ -400,17 +381,13 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
                ret = setup_rt_frame(sig, ka, info, oldset, regs);
        else
                ret = setup_frame(sig, ka, oldset, regs);
+        if (ret)
-        if (ret == 0) {
+                return ret;
-                spin_lock_irq(&current->sighand->siglock);
+        sigorsets(&blocked, &current->blocked, &ka->sa.sa_mask);
-                sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
+        if (!(ka->sa.sa_flags & SA_NODEFER))
-                if (!(ka->sa.sa_flags & SA_NODEFER))
+                sigaddset(&blocked, sig);
-                        sigaddset(&current->blocked,sig);
+        set_current_blocked(&blocked);
-                recalc_sigpending();
+        return 0;
-                spin_unlock_irq(&current->sighand->siglock);
-        }
-        return ret;
 }
 /*
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index a6d85c0a7f20..6ab16ac64d29 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -452,23 +452,27 @@ out:
 */
 int __cpuinit start_secondary(void *cpuvoid)
 {
-        /* Setup the cpu */
        cpu_init();
        preempt_disable();
-        /* Enable TOD clock interrupts on the secondary cpu. */
        init_cpu_timer();
-        /* Enable cpu timer interrupts on the secondary cpu. */
        init_cpu_vtimer();
-        /* Enable pfault pseudo page faults on this cpu. */
        pfault_init();
-        /* call cpu notifiers */
        notify_cpu_starting(smp_processor_id());
-        /* Mark this cpu as online */
        ipi_call_lock();
        set_cpu_online(smp_processor_id(), true);
        ipi_call_unlock();
-        /* Switch on interrupts */
+        __ctl_clear_bit(0, 28); /* Disable lowcore protection */
+        S390_lowcore.restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
+        S390_lowcore.restart_psw.addr =
+                PSW_ADDR_AMODE | (unsigned long) psw_restart_int_handler;
+        __ctl_set_bit(0, 28); /* Enable lowcore protection */
+        /*
+         * Wait until the cpu which brought this one up marked it
+         * active before enabling interrupts.
+         */
+        while (!cpumask_test_cpu(smp_processor_id(), cpu_active_mask))
+                cpu_relax();
        local_irq_enable();
        /* cpu_idle will call schedule for us */
        cpu_idle();
@@ -507,7 +511,11 @@ static int __cpuinit smp_alloc_lowcore(int cpu)
        memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512);
        lowcore->async_stack = async_stack + ASYNC_SIZE;
        lowcore->panic_stack = panic_stack + PAGE_SIZE;
+        lowcore->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
+        lowcore->restart_psw.addr =
+                PSW_ADDR_AMODE | (unsigned long) restart_int_handler;
+        if (user_mode != HOME_SPACE_MODE)
+                lowcore->restart_psw.mask |= PSW_ASC_HOME;
 #ifndef CONFIG_64BIT
        if (MACHINE_HAS_IEEE) {
                unsigned long save_area;
diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c
index 51e5cd9b906a..5dbbaa6e594c 100644
--- a/arch/s390/mm/maccess.c
+++ b/arch/s390/mm/maccess.c
@@ -85,3 +85,19 @@ int memcpy_real(void *dest, void *src, size_t count)
        arch_local_irq_restore(flags);
        return rc;
 }
+/*
+ * Copy memory to absolute zero
+ */
+void copy_to_absolute_zero(void *dest, void *src, size_t count)
+{
+        unsigned long cr0;
+        BUG_ON((unsigned long) dest + count >= sizeof(struct _lowcore));
+        preempt_disable();
+        __ctl_store(cr0, 0, 0);
+        __ctl_clear_bit(0, 28); /* disable lowcore protection */
+        memcpy_real(dest + store_prefix(), src, count);
+        __ctl_load(cr0, 0, 0);
+        preempt_enable();
+}
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 2adb23938a7f..4d1f2bce87b3 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -528,6 +528,7 @@ static inline void page_table_free_pgste(unsigned long *table)
 static inline unsigned long *page_table_alloc_pgste(struct mm_struct *mm,
                                                    unsigned long vmaddr)
 {
+        return NULL;
 }
 static inline void page_table_free_pgste(unsigned long *table)
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 748ff1920068..ff9177c8f643 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -11,6 +11,7 @@ config SUPERH
        select HAVE_DMA_ATTRS
        select HAVE_IRQ_WORK
        select HAVE_PERF_EVENTS
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
        select PERF_USE_VMALLOC
        select HAVE_KERNEL_GZIP
        select HAVE_KERNEL_BZIP2
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index e3d8170ad00b..99385d0b3f3b 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -173,6 +173,7 @@ core-$(CONFIG_HD6446X_SERIES)	+= arch/sh/cchips/hd6446x/
 cpuincdir-$(CONFIG_CPU_SH2A)    += cpu-sh2a
 cpuincdir-$(CONFIG_CPU_SH2)     += cpu-sh2
 cpuincdir-$(CONFIG_CPU_SH3)     += cpu-sh3
+cpuincdir-$(CONFIG_CPU_SH4A)    += cpu-sh4a
 cpuincdir-$(CONFIG_CPU_SH4)     += cpu-sh4
 cpuincdir-$(CONFIG_CPU_SH5)     += cpu-sh5
 cpuincdir-y                     += cpu-common   # Must be last
diff --git a/arch/sh/boards/board-apsh4a3a.c b/arch/sh/boards/board-apsh4a3a.c
index 8e2a27057bc9..2823619c6006 100644
--- a/arch/sh/boards/board-apsh4a3a.c
+++ b/arch/sh/boards/board-apsh4a3a.c
@@ -116,7 +116,7 @@ static int apsh4a3a_clk_init(void)
        int ret;
        clk = clk_get(NULL, "extal");
-        if (!clk || IS_ERR(clk))
+        if (IS_ERR(clk))
                return PTR_ERR(clk);
        ret = clk_set_rate(clk, 33333000);
        clk_put(clk);
diff --git a/arch/sh/boards/board-apsh4ad0a.c b/arch/sh/boards/board-apsh4ad0a.c
index e2bd218a054e..b4d6292a9247 100644
--- a/arch/sh/boards/board-apsh4ad0a.c
+++ b/arch/sh/boards/board-apsh4ad0a.c
@@ -94,7 +94,7 @@ static int apsh4ad0a_clk_init(void)
        int ret;
        clk = clk_get(NULL, "extal");
-        if (!clk || IS_ERR(clk))
+        if (IS_ERR(clk))
                return PTR_ERR(clk);
        ret = clk_set_rate(clk, 33333000);
        clk_put(clk);
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index ee65ff05c558..d879848f3cdd 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -299,7 +299,7 @@ static int sh7785lcr_clk_init(void)
        int ret;
        clk = clk_get(NULL, "extal");
-        if (!clk || IS_ERR(clk))
+        if (IS_ERR(clk))
                return PTR_ERR(clk);
        ret = clk_set_rate(clk, 33333333);
        clk_put(clk);
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index d81c609decc7..24e3316c5c17 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -190,7 +190,7 @@ static int urquell_clk_init(void)
                return -EINVAL;
        clk = clk_get(NULL, "extal");
-        if (!clk || IS_ERR(clk))
+        if (IS_ERR(clk))
                return PTR_ERR(clk);
        ret = clk_set_rate(clk, 33333333);
        clk_put(clk);
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index 1dc924b2f508..d36265758911 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -332,8 +332,8 @@ static int camera_set_capture(struct soc_camera_platform_info *info,
        return ret;
 }
-static int ap325rxa_camera_add(struct soc_camera_link *icl, struct device *dev);
+static int ap325rxa_camera_add(struct soc_camera_device *icd);
-static void ap325rxa_camera_del(struct soc_camera_link *icl);
+static void ap325rxa_camera_del(struct soc_camera_device *icd);
 static struct soc_camera_platform_info camera_info = {
        .format_name = "UYVY",
@@ -366,24 +366,23 @@ static void ap325rxa_camera_release(struct device *dev)
        soc_camera_platform_release(&camera_device);
 }
-static int ap325rxa_camera_add(struct soc_camera_link *icl,
+static int ap325rxa_camera_add(struct soc_camera_device *icd)
-                               struct device *dev)
 {
-        int ret = soc_camera_platform_add(icl, dev, &camera_device, &camera_link,
+        int ret = soc_camera_platform_add(icd, &camera_device, &camera_link,
                                          ap325rxa_camera_release, 0);
        if (ret < 0)
                return ret;
        ret = camera_probe();
        if (ret < 0)
-                soc_camera_platform_del(icl, camera_device, &camera_link);
+                soc_camera_platform_del(icd, camera_device, &camera_link);
        return ret;
 }
-static void ap325rxa_camera_del(struct soc_camera_link *icl)
+static void ap325rxa_camera_del(struct soc_camera_device *icd)
 {
-        soc_camera_platform_del(icl, camera_device, &camera_link);
+        soc_camera_platform_del(icd, camera_device, &camera_link);
 }
 #endif /* CONFIG_I2C */
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index 87618c91d178..74b8db1b74a9 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -335,8 +335,6 @@ static struct clk *r7780rp_clocks[] = {
        &ivdr_clk,
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("ivdr_clk", &ivdr_clk),
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
index 1521aa75ee3a..486d1ac3694c 100644
--- a/arch/sh/boards/mach-sdk7786/setup.c
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -194,7 +194,7 @@ static int sdk7786_clk_init(void)
                return -EINVAL;
        clk = clk_get(NULL, "extal");
-        if (!clk || IS_ERR(clk))
+        if (IS_ERR(clk))
                return PTR_ERR(clk);
        ret = clk_set_rate(clk, 33333333);
        clk_put(clk);
diff --git a/arch/sh/drivers/pci/fixups-cayman.c b/arch/sh/drivers/pci/fixups-cayman.c
index b68b61d22c6c..edc2fb7a5bb2 100644
--- a/arch/sh/drivers/pci/fixups-cayman.c
+++ b/arch/sh/drivers/pci/fixups-cayman.c
@@ -5,7 +5,7 @@
 #include <cpu/irq.h>
 #include "pci-sh5.h"
-int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int result = -1;
diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c
index 942ef4f155f5..edeea8960c30 100644
--- a/arch/sh/drivers/pci/fixups-dreamcast.c
+++ b/arch/sh/drivers/pci/fixups-dreamcast.c
@@ -64,7 +64,7 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, gapspci_fixup_resources);
-int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        /*
         * The interrupt routing semantics here are quite trivial.
diff --git a/arch/sh/drivers/pci/fixups-landisk.c b/arch/sh/drivers/pci/fixups-landisk.c
index 95c6e2d94a0a..ecb1d1060638 100644
--- a/arch/sh/drivers/pci/fixups-landisk.c
+++ b/arch/sh/drivers/pci/fixups-landisk.c
@@ -19,7 +19,7 @@
 #define PCIMCR_MRSET_OFF        0xBFFFFFFF
 #define PCIMCR_RFSH_OFF         0xFFFFFFFB
-int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
        /*
         * slot0: pin1-4 = irq5,6,7,8
diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c
index 08b2d8658a00..f9370dce0b70 100644
--- a/arch/sh/drivers/pci/fixups-r7780rp.c
+++ b/arch/sh/drivers/pci/fixups-r7780rp.c
@@ -18,7 +18,7 @@ static char irq_tab[] __initdata = {
        65, 66, 67, 68,
 };
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
        return irq_tab[slot];
 }
diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c
index e248516118a9..eaddb56c45c6 100644
--- a/arch/sh/drivers/pci/fixups-rts7751r2d.c
+++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c
@@ -31,7 +31,7 @@ static char lboxre2_irq_tab[] __initdata = {
        IRQ_ETH0, IRQ_ETH1, IRQ_INTA, IRQ_INTD,
 };
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
        if (mach_is_lboxre2())
                return lboxre2_irq_tab[slot];
diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c
index 0930f988ac29..0b8472501b88 100644
--- a/arch/sh/drivers/pci/fixups-sdk7780.c
+++ b/arch/sh/drivers/pci/fixups-sdk7780.c
@@ -27,7 +27,7 @@ static char sdk7780_irq_tab[4][16] __initdata = {
        { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
 };
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
       return sdk7780_irq_tab[pin-1][slot];
 }
diff --git a/arch/sh/drivers/pci/fixups-se7751.c b/arch/sh/drivers/pci/fixups-se7751.c
index fd3e6b02f289..2ec146c3fa44 100644
--- a/arch/sh/drivers/pci/fixups-se7751.c
+++ b/arch/sh/drivers/pci/fixups-se7751.c
@@ -6,7 +6,7 @@
 #include <linux/io.h>
 #include "pci-sh4.h"
-int __init pcibios_map_platform_irq(struct pci_dev *, u8 slot, u8 pin)
+int __init pcibios_map_platform_irq(const struct pci_dev *, u8 slot, u8 pin)
 {
        switch (slot) {
        case 0: return 13;
diff --git a/arch/sh/drivers/pci/fixups-sh03.c b/arch/sh/drivers/pci/fixups-sh03.c
index 2e8a18b7ee53..1615e5906168 100644
--- a/arch/sh/drivers/pci/fixups-sh03.c
+++ b/arch/sh/drivers/pci/fixups-sh03.c
@@ -3,7 +3,7 @@
 #include <linux/types.h>
 #include <linux/pci.h>
-int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq;
diff --git a/arch/sh/drivers/pci/fixups-snapgear.c b/arch/sh/drivers/pci/fixups-snapgear.c
index 5a39ecc1adb8..4a093c648d12 100644
--- a/arch/sh/drivers/pci/fixups-snapgear.c
+++ b/arch/sh/drivers/pci/fixups-snapgear.c
@@ -18,7 +18,7 @@
 #include <linux/pci.h>
 #include "pci-sh4.h"
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
        int irq = -1;
diff --git a/arch/sh/drivers/pci/fixups-titan.c b/arch/sh/drivers/pci/fixups-titan.c
index 3a79fa8254a6..bd1addb1b8be 100644
--- a/arch/sh/drivers/pci/fixups-titan.c
+++ b/arch/sh/drivers/pci/fixups-titan.c
@@ -27,7 +27,7 @@ static char titan_irq_tab[] __initdata = {
        TITAN_IRQ_USB,
 };
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
        int irq = titan_irq_tab[slot];
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index 4418f9070ed1..4df27c4fbf99 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -466,7 +466,7 @@ static int __init pcie_init(struct sh7786_pcie_port *port)
        return 0;
 }
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
        return 71;
 }
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index f0efe97f1750..cb21e2399dc1 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -112,7 +112,7 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
 #endif
 /* Board-specific fixup routines. */
-int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
+int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 extern void pcibios_resource_to_bus(struct pci_dev *dev,
        struct pci_bus_region *region, struct resource *res);
diff --git a/arch/sh/include/cpu-sh3/cpu/serial.h b/arch/sh/include/cpu-sh3/cpu/serial.h
new file mode 100644
index 000000000000..7766329bc103
--- /dev/null
+++ b/arch/sh/include/cpu-sh3/cpu/serial.h
@@ -0,0 +1,10 @@
+#ifndef __CPU_SH3_SERIAL_H
+#define __CPU_SH3_SERIAL_H
+#include <linux/serial_sci.h>
+extern struct plat_sci_port_ops sh770x_sci_port_ops;
+extern struct plat_sci_port_ops sh7710_sci_port_ops;
+extern struct plat_sci_port_ops sh7720_sci_port_ops;
+#endif /* __CPU_SH3_SERIAL_H */
diff --git a/arch/sh/include/cpu-sh4a/cpu/serial.h b/arch/sh/include/cpu-sh4a/cpu/serial.h
new file mode 100644
index 000000000000..ff1bc275d210
--- /dev/null
+++ b/arch/sh/include/cpu-sh4a/cpu/serial.h
@@ -0,0 +1,7 @@
+#ifndef __CPU_SH4A_SERIAL_H
+#define __CPU_SH4A_SERIAL_H
+/* arch/sh/kernel/cpu/sh4a/serial-sh7722.c */
+extern struct plat_sci_port_ops sh7722_sci_port_ops;
+#endif /* __CPU_SH4A_SERIAL_H */
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index 8f63a264a842..f59b1f30d44b 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -35,8 +35,6 @@ static struct clk *onchip_clocks[] = {
        &cpu_clk,
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("master_clk", &master_clk),
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index ecab274141a8..6f13f33a35ff 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -7,15 +7,15 @@ obj-y	:= ex.o probe.o entry.o setup-sh3.o
 obj-$(CONFIG_HIBERNATION)               += swsusp.o
 # CPU subtype setup
-obj-$(CONFIG_CPU_SUBTYPE_SH7705)        += setup-sh7705.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7705)        += setup-sh7705.o serial-sh770x.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7706)        += setup-sh770x.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7706)        += setup-sh770x.o serial-sh770x.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7707)        += setup-sh770x.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7707)        += setup-sh770x.o serial-sh770x.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7708)        += setup-sh770x.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7708)        += setup-sh770x.o serial-sh770x.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7709)        += setup-sh770x.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7709)        += setup-sh770x.o serial-sh770x.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7710)        += setup-sh7710.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7710)        += setup-sh7710.o serial-sh7710.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7712)        += setup-sh7710.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7712)        += setup-sh7710.o serial-sh7710.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7720)        += setup-sh7720.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7720)        += setup-sh7720.o serial-sh7720.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7721)        += setup-sh7720.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7721)        += setup-sh7720.o serial-sh7720.o
 # Primary on-chip clocks (common)
 clock-$(CONFIG_CPU_SH3)                 := clock-sh3.o
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh770x.c b/arch/sh/kernel/cpu/sh3/serial-sh770x.c
new file mode 100644
index 000000000000..4f7242c676b3
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/serial-sh770x.c
@@ -0,0 +1,33 @@
+#include <linux/serial_sci.h>
+#include <linux/serial_core.h>
+#include <linux/io.h>
+#include <cpu/serial.h>
+#define SCPCR 0xA4000116
+#define SCPDR 0xA4000136
+static void sh770x_sci_init_pins(struct uart_port *port, unsigned int cflag)
+{
+        unsigned short data;
+        /* We need to set SCPCR to enable RTS/CTS */
+        data = __raw_readw(SCPCR);
+        /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
+        __raw_writew(data & 0x0fcf, SCPCR);
+        if (!(cflag & CRTSCTS)) {
+                /* We need to set SCPCR to enable RTS/CTS */
+                data = __raw_readw(SCPCR);
+                /* Clear out SCP7MD1,0, SCP4MD1,0,
+                   Set SCP6MD1,0 = {01} (output)  */
+                __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
+                data = __raw_readb(SCPDR);
+                /* Set /RTS2 (bit6) = 0 */
+                __raw_writeb(data & 0xbf, SCPDR);
+        }
+}
+struct plat_sci_port_ops sh770x_sci_port_ops = {
+        .init_pins      = sh770x_sci_init_pins,
+};
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7710.c b/arch/sh/kernel/cpu/sh3/serial-sh7710.c
new file mode 100644
index 000000000000..42190ef6aebf
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/serial-sh7710.c
@@ -0,0 +1,20 @@
+#include <linux/serial_sci.h>
+#include <linux/serial_core.h>
+#include <linux/io.h>
+#include <cpu/serial.h>
+#define PACR 0xa4050100
+#define PBCR 0xa4050102
+static void sh7710_sci_init_pins(struct uart_port *port, unsigned int cflag)
+{
+        if (port->mapbase == 0xA4400000) {
+                __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
+                __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
+        } else if (port->mapbase == 0xA4410000)
+                __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
+}
+struct plat_sci_port_ops sh7710_sci_port_ops = {
+        .init_pins      = sh7710_sci_init_pins,
+};
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7720.c b/arch/sh/kernel/cpu/sh3/serial-sh7720.c
new file mode 100644
index 000000000000..8832c526cdf9
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/serial-sh7720.c
@@ -0,0 +1,37 @@
+#include <linux/serial_sci.h>
+#include <linux/serial_core.h>
+#include <linux/io.h>
+#include <cpu/serial.h>
+#include <asm/gpio.h>
+static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag)
+{
+        unsigned short data;
+        if (cflag & CRTSCTS) {
+                /* enable RTS/CTS */
+                if (port->mapbase == 0xa4430000) { /* SCIF0 */
+                        /* Clear PTCR bit 9-2; enable all scif pins but sck */
+                        data = __raw_readw(PORT_PTCR);
+                        __raw_writew((data & 0xfc03), PORT_PTCR);
+                } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
+                        /* Clear PVCR bit 9-2 */
+                        data = __raw_readw(PORT_PVCR);
+                        __raw_writew((data & 0xfc03), PORT_PVCR);
+                }
+        } else {
+                if (port->mapbase == 0xa4430000) { /* SCIF0 */
+                        /* Clear PTCR bit 5-2; enable only tx and rx  */
+                        data = __raw_readw(PORT_PTCR);
+                        __raw_writew((data & 0xffc3), PORT_PTCR);
+                } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
+                        /* Clear PVCR bit 5-2 */
+                        data = __raw_readw(PORT_PVCR);
+                        __raw_writew((data & 0xffc3), PORT_PVCR);
+                }
+        }
+}
+struct plat_sci_port_ops sh7720_sci_port_ops = {
+        .init_pins      = sh7720_sci_init_pins,
+};
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index cd2e702feb7e..2309618c015d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -15,6 +15,7 @@
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
 #include <asm/rtc.h>
+#include <cpu/serial.h>
 enum {
        UNUSED = 0,
@@ -75,6 +76,8 @@ static struct plat_sci_port scif0_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_4,
        .type           = PORT_SCIF,
        .irqs           = { 56, 56, 56 },
+        .ops            = &sh770x_sci_port_ops,
+        .regtype        = SCIx_SH7705_SCIF_REGTYPE,
 };
 static struct platform_device scif0_device = {
@@ -92,6 +95,8 @@ static struct plat_sci_port scif1_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_4,
        .type           = PORT_SCIF,
        .irqs           = { 52, 52, 52 },
+        .ops            = &sh770x_sci_port_ops,
+        .regtype        = SCIx_SH7705_SCIF_REGTYPE,
 };
 static struct platform_device scif1_device = {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 4551ad647c2c..3f3d5fe5892d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -19,6 +19,7 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
+#include <cpu/serial.h>
 enum {
        UNUSED = 0,
@@ -108,11 +109,14 @@ static struct platform_device rtc_device = {
 static struct plat_sci_port scif0_platform_data = {
        .mapbase        = 0xfffffe80,
+        .port_reg       = 0xa4000136,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_TE | SCSCR_RE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCI,
        .irqs           = { 23, 23, 23, 0 },
+        .ops            = &sh770x_sci_port_ops,
+        .regshift       = 1,
 };
 static struct platform_device scif0_device = {
@@ -132,6 +136,8 @@ static struct plat_sci_port scif1_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 56, 56, 56, 56 },
+        .ops            = &sh770x_sci_port_ops,
+        .regtype        = SCIx_SH3_SCIF_REGTYPE,
 };
 static struct platform_device scif1_device = {
@@ -146,11 +152,14 @@ static struct platform_device scif1_device = {
    defined(CONFIG_CPU_SUBTYPE_SH7709)
 static struct plat_sci_port scif2_platform_data = {
        .mapbase        = 0xa4000140,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_TE | SCSCR_RE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_IRDA,
        .irqs           = { 52, 52, 52, 52 },
+        .ops            = &sh770x_sci_port_ops,
+        .regshift       = 1,
 };
 static struct platform_device scif2_device = {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 365b94a6fcb7..94920345c14d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -20,6 +20,7 @@
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
 #include <asm/rtc.h>
+#include <cpu/serial.h>
 static struct resource rtc_resources[] = {
        [0] = {
@@ -55,6 +56,8 @@ static struct plat_sci_port scif0_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_4,
        .type           = PORT_SCIF,
        .irqs           = { 80, 80, 80, 80 },
+        .ops            = &sh7720_sci_port_ops,
+        .regtype        = SCIx_SH7705_SCIF_REGTYPE,
 };
 static struct platform_device scif0_device = {
@@ -72,6 +75,8 @@ static struct plat_sci_port scif1_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_4,
        .type           = PORT_SCIF,
        .irqs           = { 81, 81, 81, 81 },
+        .ops            = &sh7720_sci_port_ops,
+        .regtype        = SCIx_SH7705_SCIF_REGTYPE,
 };
 static struct platform_device scif1_device = {
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 3f6f8e98635c..f4e262adb39e 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -147,8 +147,6 @@ static struct clk *sh4202_onchip_clocks[] = {
        &sh4202_shoc_clk,
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("emi_clk", &sh4202_emi_clk),
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index e53b4b38bd11..98cc0c794c76 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -1,5 +1,5 @@
 /*
- * SH7750/SH7751 Setup
+ * SH7091/SH7750/SH7750S/SH7750R/SH7751/SH7751R Setup
 *
 *  Copyright (C) 2006  Paul Mundt
 *  Copyright (C) 2006  Jamie Lenehan
@@ -38,11 +38,13 @@ static struct platform_device rtc_device = {
 static struct plat_sci_port sci_platform_data = {
        .mapbase        = 0xffe00000,
+        .port_reg       = 0xffe0001C,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_TE | SCSCR_RE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCI,
        .irqs           = { 23, 23, 23, 0 },
+        .regshift       = 2,
 };
 static struct platform_device sci_device = {
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 78bbf232e391..c0b4c774700e 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -133,6 +133,7 @@ static struct plat_sci_port scif0_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 52, 53, 55, 54 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif0_device = {
@@ -150,6 +151,7 @@ static struct plat_sci_port scif1_platform_data = {
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .irqs           = { 72, 73, 75, 74 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif1_device = {
@@ -167,6 +169,7 @@ static struct plat_sci_port scif2_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 76, 77, 79, 78 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif2_device = {
@@ -184,6 +187,7 @@ static struct plat_sci_port scif3_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCI,
        .irqs           = { 80, 81, 82, 0 },
+        .regshift       = 2,
 };
 static struct platform_device scif3_device = {
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index cc122b1d3035..c57fb287011e 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780)	+= setup-sh7780.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7785)        += setup-sh7785.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7786)        += setup-sh7786.o intc-shx3.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7343)        += setup-sh7343.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7722)        += setup-sh7722.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7722)        += setup-sh7722.o serial-sh7722.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7723)        += setup-sh7723.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7724)        += setup-sh7724.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7366)        += setup-sh7366.o
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 93c646072c1b..70e45bdaadc7 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -194,8 +194,6 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP200] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 0, 0),
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("rclk", &r_clk),
@@ -233,32 +231,17 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]),
        CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
        CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),
-        {
-                /* SCIF0 */
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP007]),
-                .dev_id         = "sh-sci.0",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP006]),
-                .con_id         = "sci_fck",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP005]),
-                .clk            = &mstp_clks[MSTP007],
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP004]),
-        }, {
-                /* SCIF1 */
-                .dev_id         = "sh-sci.1",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP006],
-        }, {
-                /* SCIF2 */
-                .dev_id         = "sh-sci.2",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP005],
-        }, {
-                /* SCIF3 */
-                .dev_id         = "sh-sci.3",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP004],
-        },
        CLKDEV_CON_ID("sio0", &mstp_clks[MSTP003]),
        CLKDEV_CON_ID("siof0", &mstp_clks[MSTP002]),
        CLKDEV_CON_ID("siof1", &mstp_clks[MSTP001]),
-        CLKDEV_CON_ID("i2c0", &mstp_clks[MSTP109]),
+        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP109]),
-        CLKDEV_CON_ID("i2c1", &mstp_clks[MSTP108]),
+        CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP108]),
        CLKDEV_CON_ID("tpu0", &mstp_clks[MSTP225]),
        CLKDEV_CON_ID("irda0", &mstp_clks[MSTP224]),
        CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP218]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index 049dc0628ccc..3c3165000c52 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -192,8 +192,6 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP200] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 0, 0),
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("rclk", &r_clk),
@@ -231,25 +229,14 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]),
        CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
        CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),
-        {
-                /* SCIF0 */
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP007]),
-                .dev_id         = "sh-sci.0",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP006]),
-                .con_id         = "sci_fck",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP005]),
-                .clk            = &mstp_clks[MSTP007],
-        }, {
-                /* SCIF1 */
-                .dev_id         = "sh-sci.1",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP006],
-        }, {
-                /* SCIF2 */
-                .dev_id         = "sh-sci.2",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP005],
-        },
        CLKDEV_CON_ID("msiof0", &mstp_clks[MSTP002]),
        CLKDEV_CON_ID("sbr0", &mstp_clks[MSTP001]),
-        CLKDEV_CON_ID("i2c0", &mstp_clks[MSTP109]),
+        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP109]),
        CLKDEV_CON_ID("icb0", &mstp_clks[MSTP227]),
        CLKDEV_CON_ID("meram0", &mstp_clks[MSTP226]),
        CLKDEV_CON_ID("dacy1", &mstp_clks[MSTP224]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 9d23a36f0647..c9a48088ad47 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -175,8 +175,6 @@ static struct clk mstp_clks[HWBLK_NR] = {
        SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_P], 0),
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("rclk", &r_clk),
@@ -201,42 +199,20 @@ static struct clk_lookup lookups[] = {
        /* MSTP clocks */
        CLKDEV_CON_ID("uram0", &mstp_clks[HWBLK_URAM]),
        CLKDEV_CON_ID("xymem0", &mstp_clks[HWBLK_XYMEM]),
-        {
-                /* TMU0 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU]),
-                .dev_id         = "sh_tmu.0",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU]),
-                .con_id         = "tmu_fck",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU]),
-                .clk            = &mstp_clks[HWBLK_TMU],
-        }, {
-                /* TMU1 */
-                .dev_id         = "sh_tmu.1",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[HWBLK_TMU],
-        }, {
-                /* TMU2 */
-                .dev_id         = "sh_tmu.2",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[HWBLK_TMU],
-        },
        CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
        CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
        CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
-        {
-                /* SCIF0 */
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
-                .dev_id         = "sh-sci.0",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
-                .con_id         = "sci_fck",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
-                .clk            = &mstp_clks[HWBLK_SCIF0],
-        }, {
+        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]),
-                /* SCIF1 */
-                .dev_id         = "sh-sci.1",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[HWBLK_SCIF1],
-        }, {
-                /* SCIF2 */
-                .dev_id         = "sh-sci.2",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[HWBLK_SCIF2],
-        },
-        CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC]),
        CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
        CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI]),
        CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 55493cd5bd8f..3cc3827380e3 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -200,8 +200,6 @@ static struct clk mstp_clks[] = {
        SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("rclk", &r_clk),
@@ -305,7 +303,7 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
        CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
        CLKDEV_CON_ID("meram0", &mstp_clks[HWBLK_MERAM]),
-        CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC]),
+        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]),
        CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
        CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
        CLKDEV_CON_ID("adc0", &mstp_clks[HWBLK_ADC]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index d08fa953c88b..8668f557e0ac 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -252,8 +252,6 @@ static struct clk mstp_clks[HWBLK_NR] = {
        SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("rclk", &r_clk),
@@ -289,77 +287,31 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
        CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
        CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
-        {
-                /* TMU0 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]),
-                .dev_id         = "sh_tmu.0",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]),
-                .con_id         = "tmu_fck",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU0]),
-                .clk            = &mstp_clks[HWBLK_TMU0],
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
-        }, {
-                /* TMU1 */
-                .dev_id         = "sh_tmu.1",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[HWBLK_TMU0],
-        }, {
-                /* TMU2 */
-                .dev_id         = "sh_tmu.2",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[HWBLK_TMU0],
-        }, {
-                /* TMU3 */
-                .dev_id         = "sh_tmu.3",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[HWBLK_TMU1],
-        },
        CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
        CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
        CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
-        {
-                /* TMU4 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
-                .dev_id         = "sh_tmu.4",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
-                .con_id         = "tmu_fck",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
-                .clk            = &mstp_clks[HWBLK_TMU1],
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
-        }, {
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
-                /* TMU5 */
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
-                .dev_id         = "sh_tmu.5",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
-                .con_id         = "tmu_fck",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
-                .clk            = &mstp_clks[HWBLK_TMU1],
-        }, {
-                /* SCIF0 */
-                .dev_id         = "sh-sci.0",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[HWBLK_SCIF0],
-        }, {
-                /* SCIF1 */
-                .dev_id         = "sh-sci.1",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[HWBLK_SCIF1],
-        }, {
-                /* SCIF2 */
-                .dev_id         = "sh-sci.2",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[HWBLK_SCIF2],
-        }, {
-                /* SCIF3 */
-                .dev_id         = "sh-sci.3",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[HWBLK_SCIF3],
-        }, {
-                /* SCIF4 */
-                .dev_id         = "sh-sci.4",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[HWBLK_SCIF4],
-        }, {
-                /* SCIF5 */
-                .dev_id         = "sh-sci.5",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[HWBLK_SCIF5],
-        },
        CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
        CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
        CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
        CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
-        CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC0]),
+        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC0]),
-        CLKDEV_CON_ID("i2c1", &mstp_clks[HWBLK_IIC1]),
+        CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[HWBLK_IIC1]),
        CLKDEV_CON_ID("mmc0", &mstp_clks[HWBLK_MMC]),
        CLKDEV_CON_ID("eth0", &mstp_clks[HWBLK_ETHER]),
        CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index eedddad13835..3b097b09a3ba 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -101,8 +101,6 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP220] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 20, 0),
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("extal", &extal_clk),
@@ -116,33 +114,13 @@ static struct clk_lookup lookups[] = {
        /* MSTP32 clocks */
        CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP004]),
        CLKDEV_CON_ID("riic", &mstp_clks[MSTP000]),
-        {
-                /* TMU0 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP113]),
-                .dev_id         = "sh_tmu.0",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP114]),
-                .con_id         = "tmu_fck",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP112]),
-                .clk            = &mstp_clks[MSTP113],
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP111]),
-        }, {
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP110]),
-                /* TMU1 */
-                .dev_id         = "sh_tmu.1",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP114],
-        },
-        {
-                /* SCIF4 (But, ID is 2) */
-                .dev_id         = "sh-sci.2",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP112],
-        }, {
-                /* SCIF3 */
-                .dev_id         = "sh-sci.1",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP111],
-        }, {
-                /* SCIF2 */
-                .dev_id         = "sh-sci.0",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP110],
-        },
        CLKDEV_CON_ID("usb0", &mstp_clks[MSTP102]),
        CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP220]),
 };
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 599630fc4d3b..2d4c7fd79c02 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -91,8 +91,6 @@ static struct clk *sh7763_onchip_clocks[] = {
        &sh7763_shyway_clk,
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("shyway_clk", &sh7763_shyway_clk),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index 8894926479a6..3b53348fe2fc 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -97,8 +97,6 @@ static struct clk *sh7780_onchip_clocks[] = {
        &sh7780_shyway_clk,
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("shyway_clk", &sh7780_shyway_clk),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index 2d960247f3eb..e5b420cc1265 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -116,8 +116,6 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP100] = SH_CLK_MSTP32(NULL, MSTPCR1, 0, 0),
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("extal", &extal_clk),
@@ -134,74 +132,27 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
        /* MSTP32 clocks */
-        {
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP029]),
-                /* SCIF5 */
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP028]),
-                .dev_id         = "sh-sci.5",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP027]),
-                .con_id         = "sci_fck",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP026]),
-                .clk            = &mstp_clks[MSTP029],
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP025]),
-        }, {
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP024]),
-                /* SCIF4 */
-                .dev_id         = "sh-sci.4",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP028],
-        }, {
-                /* SCIF3 */
-                .dev_id         = "sh-sci.3",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP027],
-        }, {
-                /* SCIF2 */
-                .dev_id         = "sh-sci.2",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP026],
-        }, {
-                /* SCIF1 */
-                .dev_id         = "sh-sci.1",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP025],
-        }, {
-                /* SCIF0 */
-                .dev_id         = "sh-sci.0",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP024],
-        },
        CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
        CLKDEV_CON_ID("ssi0_fck", &mstp_clks[MSTP020]),
        CLKDEV_CON_ID("hac1_fck", &mstp_clks[MSTP017]),
        CLKDEV_CON_ID("hac0_fck", &mstp_clks[MSTP016]),
        CLKDEV_CON_ID("mmcif_fck", &mstp_clks[MSTP013]),
        CLKDEV_CON_ID("flctl_fck", &mstp_clks[MSTP012]),
-        {
-                /* TMU0 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
-                .dev_id         = "sh_tmu.0",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
-                .con_id         = "tmu_fck",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
-                .clk            = &mstp_clks[MSTP008],
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
-        }, {
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
-                /* TMU1 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
-                .dev_id         = "sh_tmu.1",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP008],
-        }, {
-                /* TMU2 */
-                .dev_id         = "sh_tmu.2",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP008],
-        }, {
-                /* TMU3 */
-                .dev_id         = "sh_tmu.3",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP009],
-        }, {
-                /* TMU4 */
-                .dev_id         = "sh_tmu.4",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP009],
-        }, {
-                /* TMU5 */
-                .dev_id         = "sh_tmu.5",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP009],
-        },
        CLKDEV_CON_ID("siof_fck", &mstp_clks[MSTP003]),
        CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
        CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index 42e403be9076..f6c0c3d5599f 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -125,8 +125,6 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP102] = SH_CLK_MSTP32(NULL, MSTPCR1, 2, 0),
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("extal", &extal_clk),
@@ -141,37 +139,13 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
        /* MSTP32 clocks */
-        {
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP029]),
-                /* SCIF5 */
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP028]),
-                .dev_id         = "sh-sci.5",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP027]),
-                .con_id         = "sci_fck",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP026]),
-                .clk            = &mstp_clks[MSTP029],
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP025]),
-        }, {
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP024]),
-                /* SCIF4 */
-                .dev_id         = "sh-sci.4",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP028],
-        }, {
-                /* SCIF3 */
-                .dev_id         = "sh-sci.3",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP027],
-        }, {
-                /* SCIF2 */
-                .dev_id         = "sh-sci.2",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP026],
-        }, {
-                /* SCIF1 */
-                .dev_id         = "sh-sci.1",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP025],
-        }, {
-                /* SCIF0 */
-                .dev_id         = "sh-sci.0",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP024],
-        },
        CLKDEV_CON_ID("ssi3_fck", &mstp_clks[MSTP023]),
        CLKDEV_CON_ID("ssi2_fck", &mstp_clks[MSTP022]),
        CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
@@ -180,67 +154,20 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("hac0_fck", &mstp_clks[MSTP016]),
        CLKDEV_CON_ID("i2c1_fck", &mstp_clks[MSTP015]),
        CLKDEV_CON_ID("i2c0_fck", &mstp_clks[MSTP014]),
-        {
-                /* TMU0 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
-                .dev_id         = "sh_tmu.0",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
-                .con_id         = "tmu_fck",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
-                .clk            = &mstp_clks[MSTP008],
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
-        }, {
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
-                /* TMU1 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
-                .dev_id         = "sh_tmu.1",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.6", &mstp_clks[MSTP010]),
-                .con_id         = "tmu_fck",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.7", &mstp_clks[MSTP010]),
-                .clk            = &mstp_clks[MSTP008],
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.8", &mstp_clks[MSTP010]),
-        }, {
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.9", &mstp_clks[MSTP011]),
-                /* TMU2 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.10", &mstp_clks[MSTP011]),
-                .dev_id         = "sh_tmu.2",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.11", &mstp_clks[MSTP011]),
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP008],
-        }, {
-                /* TMU3 */
-                .dev_id         = "sh_tmu.3",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP009],
-        }, {
-                /* TMU4 */
-                .dev_id         = "sh_tmu.4",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP009],
-        }, {
-                /* TMU5 */
-                .dev_id         = "sh_tmu.5",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP009],
-        }, {
-                /* TMU6 */
-                .dev_id         = "sh_tmu.6",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP010],
-        }, {
-                /* TMU7 */
-                .dev_id         = "sh_tmu.7",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP010],
-        }, {
-                /* TMU8 */
-                .dev_id         = "sh_tmu.8",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP010],
-        }, {
-                /* TMU9 */
-                .dev_id         = "sh_tmu.9",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP011],
-        }, {
-                /* TMU10 */
-                .dev_id         = "sh_tmu.10",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP011],
-        }, {
-                /* TMU11 */
-                .dev_id         = "sh_tmu.11",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP011],
-        },
        CLKDEV_CON_ID("sdif1_fck", &mstp_clks[MSTP005]),
        CLKDEV_CON_ID("sdif0_fck", &mstp_clks[MSTP004]),
        CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 1afdb93b8ccb..bf2d00b8b908 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -100,8 +100,6 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP104] = SH_CLK_MSTP32(NULL, MSTPCR1, 4, 0),
 };
-#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 static struct clk_lookup lookups[] = {
        /* main clocks */
        CLKDEV_CON_ID("extal", &extal_clk),
@@ -116,62 +114,23 @@ static struct clk_lookup lookups[] = {
        CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
        /* MSTP32 clocks */
-        {
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP027]),
-                /* SCIF3 */
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP026]),
-                .dev_id         = "sh-sci.3",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP025]),
-                .con_id         = "sci_fck",
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP024]),
-                .clk            = &mstp_clks[MSTP027],
-        }, {
-                /* SCIF2 */
-                .dev_id         = "sh-sci.2",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP026],
-        }, {
-                /* SCIF1 */
-                .dev_id         = "sh-sci.1",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP025],
-        }, {
-                /* SCIF0 */
-                .dev_id         = "sh-sci.0",
-                .con_id         = "sci_fck",
-                .clk            = &mstp_clks[MSTP024],
-        },
        CLKDEV_CON_ID("h8ex_fck", &mstp_clks[MSTP003]),
        CLKDEV_CON_ID("csm_fck", &mstp_clks[MSTP002]),
        CLKDEV_CON_ID("fe1_fck", &mstp_clks[MSTP001]),
        CLKDEV_CON_ID("fe0_fck", &mstp_clks[MSTP000]),
-        {
-                /* TMU0 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
-                .dev_id         = "sh_tmu.0",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
-                .con_id         = "tmu_fck",
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
-                .clk            = &mstp_clks[MSTP008],
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
-        }, {
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
-                /* TMU1 */
+        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
-                .dev_id         = "sh_tmu.1",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP008],
-        }, {
-                /* TMU2 */
-                .dev_id         = "sh_tmu.2",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP008],
-        }, {
-                /* TMU3 */
-                .dev_id         = "sh_tmu.3",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP009],
-        }, {
-                /* TMU4 */
-                .dev_id         = "sh_tmu.4",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP009],
-        }, {
-                /* TMU5 */
-                .dev_id         = "sh_tmu.5",
-                .con_id         = "tmu_fck",
-                .clk            = &mstp_clks[MSTP009],
-        },
        CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]),
        CLKDEV_CON_ID("dmac_11_6_fck", &mstp_clks[MSTP105]),
        CLKDEV_CON_ID("dmac_5_0_fck", &mstp_clks[MSTP104]),
diff --git a/arch/sh/kernel/cpu/sh4a/serial-sh7722.c b/arch/sh/kernel/cpu/sh4a/serial-sh7722.c
new file mode 100644
index 000000000000..59bc3a72702e
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/serial-sh7722.c
@@ -0,0 +1,23 @@
+#include <linux/serial_sci.h>
+#include <linux/serial_core.h>
+#include <linux/io.h>
+#define PSCR 0xA405011E
+static void sh7722_sci_init_pins(struct uart_port *port, unsigned int cflag)
+{
+        unsigned short data;
+        if (port->mapbase == 0xffe00000) {
+                data = __raw_readw(PSCR);
+                data &= ~0x03cf;
+                if (!(cflag & CRTSCTS))
+                        data |= 0x0340;
+                __raw_writew(data, PSCR);
+        }
+}
+struct plat_sci_port_ops sh7722_sci_port_ops = {
+        .init_pins      = sh7722_sci_init_pins,
+};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 82616af64d62..87773869a2f3 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -20,6 +20,7 @@
 static struct plat_sci_port scif0_platform_data = {
        .mapbase        = 0xffe00000,
+        .port_reg       = 0xa405013e,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 5813d8023619..278a0e572158 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -22,6 +22,7 @@
 #include <cpu/dma-register.h>
 #include <cpu/sh7722.h>
+#include <cpu/serial.h>
 static const struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
        {
@@ -185,6 +186,8 @@ static struct plat_sci_port scif0_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 80, 80, 80, 80 },
+        .ops            = &sh7722_sci_port_ops,
+        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 static struct platform_device scif0_device = {
@@ -202,6 +205,8 @@ static struct plat_sci_port scif1_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 81, 81, 81, 81 },
+        .ops            = &sh7722_sci_port_ops,
+        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 static struct platform_device scif1_device = {
@@ -219,6 +224,8 @@ static struct plat_sci_port scif2_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 82, 82, 82, 82 },
+        .ops            = &sh7722_sci_port_ops,
+        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 static struct platform_device scif2_device = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 072382280f96..3c2810d8f72e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -23,11 +23,13 @@
 /* Serial */
 static struct plat_sci_port scif0_platform_data = {
        .mapbase        = 0xffe00000,
+        .port_reg       = 0xa4050160,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 80, 80, 80, 80 },
+        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 static struct platform_device scif0_device = {
@@ -40,11 +42,13 @@ static struct platform_device scif0_device = {
 static struct plat_sci_port scif1_platform_data = {
        .mapbase        = 0xffe10000,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 81, 81, 81, 81 },
+        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 static struct platform_device scif1_device = {
@@ -57,11 +61,13 @@ static struct platform_device scif1_device = {
 static struct plat_sci_port scif2_platform_data = {
        .mapbase        = 0xffe20000,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 82, 82, 82, 82 },
+        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 static struct platform_device scif2_device = {
@@ -75,6 +81,7 @@ static struct platform_device scif2_device = {
 static struct plat_sci_port scif3_platform_data = {
        .mapbase        = 0xa4e30000,
        .flags          = UPF_BOOT_AUTOCONF,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_3,
        .type           = PORT_SCIFA,
@@ -91,6 +98,7 @@ static struct platform_device scif3_device = {
 static struct plat_sci_port scif4_platform_data = {
        .mapbase        = 0xa4e40000,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_3,
@@ -108,6 +116,7 @@ static struct platform_device scif4_device = {
 static struct plat_sci_port scif5_platform_data = {
        .mapbase        = 0xa4e50000,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_3,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 134a397b1918..a37dd72c3671 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -296,11 +296,13 @@ static struct platform_device dma1_device = {
 /* Serial */
 static struct plat_sci_port scif0_platform_data = {
        .mapbase        = 0xffe00000,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 80, 80, 80, 80 },
+        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 static struct platform_device scif0_device = {
@@ -313,11 +315,13 @@ static struct platform_device scif0_device = {
 static struct plat_sci_port scif1_platform_data = {
        .mapbase        = 0xffe10000,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 81, 81, 81, 81 },
+        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 static struct platform_device scif1_device = {
@@ -330,11 +334,13 @@ static struct platform_device scif1_device = {
 static struct plat_sci_port scif2_platform_data = {
        .mapbase        = 0xffe20000,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 82, 82, 82, 82 },
+        .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 static struct platform_device scif2_device = {
@@ -347,6 +353,7 @@ static struct platform_device scif2_device = {
 static struct plat_sci_port scif3_platform_data = {
        .mapbase        = 0xa4e30000,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE,
        .scbrr_algo_id  = SCBRR_ALGO_3,
@@ -364,6 +371,7 @@ static struct platform_device scif3_device = {
 static struct plat_sci_port scif4_platform_data = {
        .mapbase        = 0xa4e40000,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE,
        .scbrr_algo_id  = SCBRR_ALGO_3,
@@ -381,6 +389,7 @@ static struct platform_device scif4_device = {
 static struct plat_sci_port scif5_platform_data = {
        .mapbase        = 0xa4e50000,
+        .port_reg       = SCIx_NOT_SUPPORTED,
        .flags          = UPF_BOOT_AUTOCONF,
        .scscr          = SCSCR_RE | SCSCR_TE,
        .scbrr_algo_id  = SCBRR_ALGO_3,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 593eca6509b5..00113515f233 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -23,6 +23,7 @@ static struct plat_sci_port scif0_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 40, 40, 40, 40 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif0_device = {
@@ -40,6 +41,7 @@ static struct plat_sci_port scif1_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 76, 76, 76, 76 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif1_device = {
@@ -57,6 +59,7 @@ static struct plat_sci_port scif2_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_2,
        .type           = PORT_SCIF,
        .irqs           = { 104, 104, 104, 104 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif2_device = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 08add7fa6849..3d4d2075c19a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -14,7 +14,6 @@
 #include <linux/serial_sci.h>
 #include <linux/sh_dma.h>
 #include <linux/sh_timer.h>
 #include <cpu/dma-register.h>
 static struct plat_sci_port scif0_platform_data = {
@@ -24,6 +23,7 @@ static struct plat_sci_port scif0_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 40, 40, 40, 40 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif0_device = {
@@ -41,6 +41,7 @@ static struct plat_sci_port scif1_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 76, 76, 76, 76 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif1_device = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 18d8fc136fb2..b29e6340414a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -15,9 +15,7 @@
 #include <linux/mm.h>
 #include <linux/sh_dma.h>
 #include <linux/sh_timer.h>
 #include <asm/mmzone.h>
 #include <cpu/dma-register.h>
 static struct plat_sci_port scif0_platform_data = {
@@ -27,6 +25,7 @@ static struct plat_sci_port scif0_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 40, 40, 40, 40 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif0_device = {
@@ -44,6 +43,7 @@ static struct plat_sci_port scif1_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 44, 44, 44, 44 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif1_device = {
@@ -61,6 +61,7 @@ static struct plat_sci_port scif2_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 60, 60, 60, 60 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif2_device = {
@@ -78,6 +79,7 @@ static struct plat_sci_port scif3_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 61, 61, 61, 61 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif3_device = {
@@ -95,6 +97,7 @@ static struct plat_sci_port scif4_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 62, 62, 62, 62 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif4_device = {
@@ -112,6 +115,7 @@ static struct plat_sci_port scif5_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 63, 63, 63, 63 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif5_device = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index beba32beb6d9..dd5e709f9821 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -1,7 +1,7 @@
 /*
 * SH7786 Setup
 *
- * Copyright (C) 2009 - 2010  Renesas Solutions Corp.
+ * Copyright (C) 2009 - 2011  Renesas Solutions Corp.
 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
 * Paul Mundt <paul.mundt@renesas.com>
 *
@@ -33,6 +33,7 @@ static struct plat_sci_port scif0_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 40, 41, 43, 42 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif0_device = {
@@ -53,6 +54,7 @@ static struct plat_sci_port scif1_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 44, 44, 44, 44 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif1_device = {
@@ -70,6 +72,7 @@ static struct plat_sci_port scif2_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 50, 50, 50, 50 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif2_device = {
@@ -87,6 +90,7 @@ static struct plat_sci_port scif3_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 51, 51, 51, 51 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif3_device = {
@@ -104,6 +108,7 @@ static struct plat_sci_port scif4_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 52, 52, 52, 52 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif4_device = {
@@ -121,6 +126,7 @@ static struct plat_sci_port scif5_platform_data = {
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
        .irqs           = { 53, 53, 53, 53 },
+        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 static struct platform_device scif5_device = {
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 84db0d6ccd0d..32114e0941ae 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -16,12 +16,13 @@
 #include <linux/thread_info.h>
 #include <linux/irqflags.h>
 #include <linux/smp.h>
+#include <linux/cpuidle.h>
 #include <asm/pgalloc.h>
 #include <asm/system.h>
 #include <linux/atomic.h>
 #include <asm/smp.h>
-void (*pm_idle)(void) = NULL;
+static void (*pm_idle)(void);
 static int hlt_counter;
@@ -100,7 +101,8 @@ void cpu_idle(void)
                        local_irq_disable();
                        /* Don't trace irqs off for idle */
                        stop_critical_timings();
-                        pm_idle();
+                        if (cpuidle_idle_call())
+                                pm_idle();
                        /*
                         * Sanity check to ensure that pm_idle() returns
                         * with IRQs enabled
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 1074dddcb104..42c67beadcae 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -54,6 +54,7 @@ config SPARC64
        select HAVE_PERF_EVENTS
        select PERF_USE_VMALLOC
        select IRQ_PREFLOW_FASTEOI
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG
 config ARCH_DEFCONFIG
        string
diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild
index 3c93f08ce187..2c2e38821f60 100644
--- a/arch/sparc/include/asm/Kbuild
+++ b/arch/sparc/include/asm/Kbuild
@@ -16,3 +16,8 @@ header-y += traps.h
 header-y += uctx.h
 header-y += utrap.h
 header-y += watchdog.h
+generic-y += div64.h
+generic-y += local64.h
+generic-y += irq_regs.h
+generic-y += local.h
diff --git a/arch/sparc/include/asm/bitops_64.h b/arch/sparc/include/asm/bitops_64.h
index 325e295d60de..29011cc0e4be 100644
--- a/arch/sparc/include/asm/bitops_64.h
+++ b/arch/sparc/include/asm/bitops_64.h
@@ -26,61 +26,28 @@ extern void change_bit(unsigned long nr, volatile unsigned long *addr);
 #define smp_mb__before_clear_bit()      barrier()
 #define smp_mb__after_clear_bit()       barrier()
-#include <asm-generic/bitops/ffz.h>
-#include <asm-generic/bitops/__ffs.h>
 #include <asm-generic/bitops/fls.h>
 #include <asm-generic/bitops/__fls.h>
 #include <asm-generic/bitops/fls64.h>
 #ifdef __KERNEL__
+extern int ffs(int x);
+extern unsigned long __ffs(unsigned long);
+#include <asm-generic/bitops/ffz.h>
 #include <asm-generic/bitops/sched.h>
-#include <asm-generic/bitops/ffs.h>
 /*
 * hweightN: returns the hamming weight (i.e. the number
 * of bits set) of a N-bit word
 */
-#ifdef ULTRA_HAS_POPULATION_COUNT
+extern unsigned long __arch_hweight64(__u64 w);
+extern unsigned int __arch_hweight32(unsigned int w);
-static inline unsigned int __arch_hweight64(unsigned long w)
+extern unsigned int __arch_hweight16(unsigned int w);
-{
+extern unsigned int __arch_hweight8(unsigned int w);
-        unsigned int res;
-        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w));
-        return res;
-}
-static inline unsigned int __arch_hweight32(unsigned int w)
-{
-        unsigned int res;
-        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffffffff));
-        return res;
-}
-static inline unsigned int __arch_hweight16(unsigned int w)
-{
-        unsigned int res;
-        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffff));
-        return res;
-}
-static inline unsigned int __arch_hweight8(unsigned int w)
-{
-        unsigned int res;
-        __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xff));
-        return res;
-}
-#else
-#include <asm-generic/bitops/arch_hweight.h>
-#endif
 #include <asm-generic/bitops/const_hweight.h>
 #include <asm-generic/bitops/lock.h>
 #endif /* __KERNEL__ */
diff --git a/arch/sparc/include/asm/div64.h b/arch/sparc/include/asm/div64.h
deleted file mode 100644
index 6cd978cefb28..000000000000
--- a/arch/sparc/include/asm/div64.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/div64.h>
diff --git a/arch/sparc/include/asm/elf_64.h b/arch/sparc/include/asm/elf_64.h
index 64f7a00b3747..7df8b7f544d4 100644
--- a/arch/sparc/include/asm/elf_64.h
+++ b/arch/sparc/include/asm/elf_64.h
@@ -59,15 +59,33 @@
 #define R_SPARC_6               45
 /* Bits present in AT_HWCAP, primarily for Sparc32.  */
+#define HWCAP_SPARC_FLUSH       0x00000001
-#define HWCAP_SPARC_FLUSH       1    /* CPU supports flush instruction. */
+#define HWCAP_SPARC_STBAR       0x00000002
-#define HWCAP_SPARC_STBAR       2
+#define HWCAP_SPARC_SWAP        0x00000004
-#define HWCAP_SPARC_SWAP        4
+#define HWCAP_SPARC_MULDIV      0x00000008
-#define HWCAP_SPARC_MULDIV      8
+#define HWCAP_SPARC_V9          0x00000010
-#define HWCAP_SPARC_V9          16
+#define HWCAP_SPARC_ULTRA3      0x00000020
-#define HWCAP_SPARC_ULTRA3      32
+#define HWCAP_SPARC_BLKINIT     0x00000040
-#define HWCAP_SPARC_BLKINIT     64
+#define HWCAP_SPARC_N2          0x00000080
-#define HWCAP_SPARC_N2          128
+/* Solaris compatible AT_HWCAP bits. */
+#define AV_SPARC_MUL32          0x00000100 /* 32x32 multiply is efficient */
+#define AV_SPARC_DIV32          0x00000200 /* 32x32 divide is efficient */
+#define AV_SPARC_FSMULD         0x00000400 /* 'fsmuld' is efficient */
+#define AV_SPARC_V8PLUS         0x00000800 /* v9 insn available to 32bit */
+#define AV_SPARC_POPC           0x00001000 /* 'popc' is efficient */
+#define AV_SPARC_VIS            0x00002000 /* VIS insns available */
+#define AV_SPARC_VIS2           0x00004000 /* VIS2 insns available */
+#define AV_SPARC_ASI_BLK_INIT   0x00008000 /* block init ASIs available */
+#define AV_SPARC_FMAF           0x00010000 /* fused multiply-add */
+#define AV_SPARC_VIS3           0x00020000 /* VIS3 insns available */
+#define AV_SPARC_HPC            0x00040000 /* HPC insns available */
+#define AV_SPARC_RANDOM         0x00080000 /* 'random' insn available */
+#define AV_SPARC_TRANS          0x00100000 /* transaction insns available */
+#define AV_SPARC_FJFMAU         0x00200000 /* unfused multiply-add */
+#define AV_SPARC_IMA            0x00400000 /* integer multiply-add */
+#define AV_SPARC_ASI_CACHE_SPARING \
+                                0x00800000 /* cache sparing ASIs available */
 #define CORE_DUMP_USE_REGSET
@@ -162,33 +180,8 @@ typedef struct {
 #define ELF_ET_DYN_BASE         0x0000010000000000UL
 #define COMPAT_ELF_ET_DYN_BASE  0x0000000070000000UL
+extern unsigned long sparc64_elf_hwcap;
-/* This yields a mask that user programs can use to figure out what
+#define ELF_HWCAP       sparc64_elf_hwcap
-   instruction set this cpu supports.  */
-/* On Ultra, we support all of the v8 capabilities. */
-static inline unsigned int sparc64_elf_hwcap(void)
-{
-        unsigned int cap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
-                            HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV |
-                            HWCAP_SPARC_V9);
-        if (tlb_type == cheetah || tlb_type == cheetah_plus)
-                cap |= HWCAP_SPARC_ULTRA3;
-        else if (tlb_type == hypervisor) {
-                if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||
-                    sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
-                    sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
-                        cap |= HWCAP_SPARC_BLKINIT;
-                if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
-                    sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
-                        cap |= HWCAP_SPARC_N2;
-        }
-        return cap;
-}
-#define ELF_HWCAP       sparc64_elf_hwcap()
 /* This yields a string that ld.so will use to load implementation
   specific libraries for optimization.  This is more specific in
diff --git a/arch/sparc/include/asm/hypervisor.h b/arch/sparc/include/asm/hypervisor.h
index 7a5f80df15d0..015a761eaa32 100644
--- a/arch/sparc/include/asm/hypervisor.h
+++ b/arch/sparc/include/asm/hypervisor.h
@@ -2927,6 +2927,13 @@ extern unsigned long sun4v_ncs_request(unsigned long request,
 #define HV_FAST_FIRE_GET_PERFREG        0x120
 #define HV_FAST_FIRE_SET_PERFREG        0x121
+#define HV_FAST_REBOOT_DATA_SET         0x172
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_reboot_data_set(unsigned long ra,
+                                           unsigned long len);
+#endif
 /* Function numbers for HV_CORE_TRAP.  */
 #define HV_CORE_SET_VER                 0x00
 #define HV_CORE_PUTCHAR                 0x01
@@ -2940,11 +2947,17 @@ extern unsigned long sun4v_ncs_request(unsigned long request,
 #define HV_GRP_CORE                     0x0001
 #define HV_GRP_INTR                     0x0002
 #define HV_GRP_SOFT_STATE               0x0003
+#define HV_GRP_TM                       0x0080
 #define HV_GRP_PCI                      0x0100
 #define HV_GRP_LDOM                     0x0101
 #define HV_GRP_SVC_CHAN                 0x0102
 #define HV_GRP_NCS                      0x0103
 #define HV_GRP_RNG                      0x0104
+#define HV_GRP_PBOOT                    0x0105
+#define HV_GRP_TPM                      0x0107
+#define HV_GRP_SDIO                     0x0108
+#define HV_GRP_SDIO_ERR                 0x0109
+#define HV_GRP_REBOOT_DATA              0x0110
 #define HV_GRP_NIAG_PERF                0x0200
 #define HV_GRP_FIRE_PERF                0x0201
 #define HV_GRP_N2_CPU                   0x0202
diff --git a/arch/sparc/include/asm/irq_regs.h b/arch/sparc/include/asm/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/arch/sparc/include/asm/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/irq_regs.h>
diff --git a/arch/sparc/include/asm/leon_pci.h b/arch/sparc/include/asm/leon_pci.h
index 42b4b31a82fe..f48527ebdd8f 100644
--- a/arch/sparc/include/asm/leon_pci.h
+++ b/arch/sparc/include/asm/leon_pci.h
@@ -12,7 +12,7 @@ struct leon_pci_info {
        struct pci_ops *ops;
        struct resource io_space;
        struct resource mem_space;
-        int (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin);
+        int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
 };
 extern void leon_pci_init(struct platform_device *ofdev,
diff --git a/arch/sparc/include/asm/local.h b/arch/sparc/include/asm/local.h
deleted file mode 100644
index bc80815a435c..000000000000
--- a/arch/sparc/include/asm/local.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _SPARC_LOCAL_H
-#define _SPARC_LOCAL_H
-#include <asm-generic/local.h>
-#endif
diff --git a/arch/sparc/include/asm/local64.h b/arch/sparc/include/asm/local64.h
deleted file mode 100644
index 36c93b5cc239..000000000000
--- a/arch/sparc/include/asm/local64.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/local64.h>
diff --git a/arch/sparc/include/asm/tsb.h b/arch/sparc/include/asm/tsb.h
index 83c571d8c8a7..1a8afd1ad04f 100644
--- a/arch/sparc/include/asm/tsb.h
+++ b/arch/sparc/include/asm/tsb.h
@@ -133,29 +133,6 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
        sub     TSB, 0x8, TSB;   \
        TSB_STORE(TSB, TAG);
-#define KTSB_LOAD_QUAD(TSB, REG) \
-        ldda            [TSB] ASI_NUCLEUS_QUAD_LDD, REG;
-#define KTSB_STORE(ADDR, VAL) \
-        stxa            VAL, [ADDR] ASI_N;
-#define KTSB_LOCK_TAG(TSB, REG1, REG2)  \
-99:     lduwa   [TSB] ASI_N, REG1;      \
-        sethi   %hi(TSB_TAG_LOCK_HIGH), REG2;\
-        andcc   REG1, REG2, %g0;        \
-        bne,pn  %icc, 99b;              \
-         nop;                           \
-        casa    [TSB] ASI_N, REG1, REG2;\
-        cmp     REG1, REG2;             \
-        bne,pn  %icc, 99b;              \
-         nop;                           \
-#define KTSB_WRITE(TSB, TTE, TAG) \
-        add     TSB, 0x8, TSB;   \
-        stxa    TTE, [TSB] ASI_N;     \
-        sub     TSB, 0x8, TSB;   \
-        stxa    TAG, [TSB] ASI_N;
        /* Do a kernel page table walk.  Leaves physical PTE pointer in
         * REG1.  Jumps to FAIL_LABEL on early page table walk termination.
         * VADDR will not be clobbered, but REG2 will.
@@ -239,6 +216,8 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
        (KERNEL_TSB_SIZE_BYTES / 16)
 #define KERNEL_TSB4M_NENTRIES   4096
+#define KTSB_PHYS_SHIFT         15
        /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL
         * on TSB hit.  REG1, REG2, REG3, and REG4 are used as temporaries
         * and the found TTE will be left in REG1.  REG3 and REG4 must
@@ -247,13 +226,22 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
         * VADDR and TAG will be preserved and not clobbered by this macro.
         */
 #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
-        sethi           %hi(swapper_tsb), REG1; \
+661:    sethi           %hi(swapper_tsb), REG1;                 \
        or              REG1, %lo(swapper_tsb), REG1; \
+        .section        .swapper_tsb_phys_patch, "ax"; \
+        .word           661b; \
+        .previous; \
+661:    nop; \
+        .section        .tsb_ldquad_phys_patch, "ax"; \
+        .word           661b; \
+        sllx            REG1, KTSB_PHYS_SHIFT, REG1; \
+        sllx            REG1, KTSB_PHYS_SHIFT, REG1; \
+        .previous; \
        srlx            VADDR, PAGE_SHIFT, REG2; \
        and             REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \
        sllx            REG2, 4, REG2; \
        add             REG1, REG2, REG2; \
-        KTSB_LOAD_QUAD(REG2, REG3); \
+        TSB_LOAD_QUAD(REG2, REG3); \
        cmp             REG3, TAG; \
        be,a,pt         %xcc, OK_LABEL; \
         mov            REG4, REG1;
@@ -263,12 +251,21 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
         * we can make use of that for the index computation.
         */
 #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
-        sethi           %hi(swapper_4m_tsb), REG1; \
+661:    sethi           %hi(swapper_4m_tsb), REG1;           \
        or              REG1, %lo(swapper_4m_tsb), REG1; \
+        .section        .swapper_4m_tsb_phys_patch, "ax"; \
+        .word           661b; \
+        .previous; \
+661:    nop; \
+        .section        .tsb_ldquad_phys_patch, "ax"; \
+        .word           661b; \
+        sllx            REG1, KTSB_PHYS_SHIFT, REG1; \
+        sllx            REG1, KTSB_PHYS_SHIFT, REG1; \
+        .previous; \
        and             TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \
        sllx            REG2, 4, REG2; \
        add             REG1, REG2, REG2; \
-        KTSB_LOAD_QUAD(REG2, REG3); \
+        TSB_LOAD_QUAD(REG2, REG3); \
        cmp             REG3, TAG; \
        be,a,pt         %xcc, OK_LABEL; \
         mov            REG4, REG1;
diff --git a/arch/sparc/kernel/cpu.c b/arch/sparc/kernel/cpu.c
index 17cf290dc2bc..9810fd881058 100644
--- a/arch/sparc/kernel/cpu.c
+++ b/arch/sparc/kernel/cpu.c
@@ -396,6 +396,7 @@ static int show_cpuinfo(struct seq_file *m, void *__unused)
                   , cpu_data(0).clock_tick
 #endif
                );
+        cpucap_info(m);
 #ifdef CONFIG_SMP
        smp_bogo(m);
 #endif
diff --git a/arch/sparc/kernel/ds.c b/arch/sparc/kernel/ds.c
index dd1342c0a3be..490e5418740d 100644
--- a/arch/sparc/kernel/ds.c
+++ b/arch/sparc/kernel/ds.c
@@ -15,12 +15,15 @@
 #include <linux/reboot.h>
 #include <linux/cpu.h>
+#include <asm/hypervisor.h>
 #include <asm/ldc.h>
 #include <asm/vio.h>
 #include <asm/mdesc.h>
 #include <asm/head.h>
 #include <asm/irq.h>
+#include "kernel.h"
 #define DRV_MODULE_NAME         "ds"
 #define PFX DRV_MODULE_NAME     ": "
 #define DRV_MODULE_VERSION      "1.0"
@@ -828,18 +831,32 @@ void ldom_set_var(const char *var, const char *value)
        }
 }
+static char full_boot_str[256] __attribute__((aligned(32)));
+static int reboot_data_supported;
 void ldom_reboot(const char *boot_command)
 {
        /* Don't bother with any of this if the boot_command
         * is empty.
         */
        if (boot_command && strlen(boot_command)) {
-                char full_boot_str[256];
+                unsigned long len;
                strcpy(full_boot_str, "boot ");
                strcpy(full_boot_str + strlen("boot "), boot_command);
+                len = strlen(full_boot_str);
-                ldom_set_var("reboot-command", full_boot_str);
+                if (reboot_data_supported) {
+                        unsigned long ra = kimage_addr_to_ra(full_boot_str);
+                        unsigned long hv_ret;
+                        hv_ret = sun4v_reboot_data_set(ra, len);
+                        if (hv_ret != HV_EOK)
+                                pr_err("SUN4V: Unable to set reboot data "
+                                       "hv_ret=%lu\n", hv_ret);
+                } else {
+                        ldom_set_var("reboot-command", full_boot_str);
+                }
        }
        sun4v_mach_sir();
 }
@@ -1237,6 +1254,15 @@ static struct vio_driver ds_driver = {
 static int __init ds_init(void)
 {
+        unsigned long hv_ret, major, minor;
+        hv_ret = sun4v_get_version(HV_GRP_REBOOT_DATA, &major, &minor);
+        if (hv_ret == HV_EOK) {
+                pr_info("SUN4V: Reboot data supported (maj=%lu,min=%lu).\n",
+                        major, minor);
+                reboot_data_supported = 1;
+        }
        kthread_run(ds_thread, NULL, "kldomd");
        return vio_register_driver(&ds_driver);
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h
index d1f1361c4167..e27f8ea8656e 100644
--- a/arch/sparc/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -42,6 +42,20 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
 extern void fpload(unsigned long *fpregs, unsigned long *fsr);
 #else /* CONFIG_SPARC32 */
+struct popc_3insn_patch_entry {
+        unsigned int    addr;
+        unsigned int    insns[3];
+};
+extern struct popc_3insn_patch_entry __popc_3insn_patch,
+        __popc_3insn_patch_end;
+struct popc_6insn_patch_entry {
+        unsigned int    addr;
+        unsigned int    insns[6];
+};
+extern struct popc_6insn_patch_entry __popc_6insn_patch,
+        __popc_6insn_patch_end;
 extern void __init per_cpu_patch(void);
 extern void __init sun4v_patch(void);
 extern void __init boot_cpu_id_too_large(int cpu);
diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S
index c752603a7c0d..0eac1b2fc53d 100644
--- a/arch/sparc/kernel/head_64.S
+++ b/arch/sparc/kernel/head_64.S
@@ -559,7 +559,7 @@ niagara2_patch:
         nop
        call    niagara_patch_bzero
         nop
-        call    niagara2_patch_pageops
+        call    niagara_patch_pageops
         nop
        ba,a,pt %xcc, 80f
diff --git a/arch/sparc/kernel/hvapi.c b/arch/sparc/kernel/hvapi.c
index d306e648c33c..c2d055d8ba9e 100644
--- a/arch/sparc/kernel/hvapi.c
+++ b/arch/sparc/kernel/hvapi.c
@@ -28,11 +28,17 @@ static struct api_info api_table[] = {
        { .group = HV_GRP_CORE,         .flags = FLAG_PRE_API   },
        { .group = HV_GRP_INTR,                                 },
        { .group = HV_GRP_SOFT_STATE,                           },
+        { .group = HV_GRP_TM,                                   },
        { .group = HV_GRP_PCI,          .flags = FLAG_PRE_API   },
        { .group = HV_GRP_LDOM,                                 },
        { .group = HV_GRP_SVC_CHAN,     .flags = FLAG_PRE_API   },
        { .group = HV_GRP_NCS,          .flags = FLAG_PRE_API   },
        { .group = HV_GRP_RNG,                                  },
+        { .group = HV_GRP_PBOOT,                                },
+        { .group = HV_GRP_TPM,                                  },
+        { .group = HV_GRP_SDIO,                                 },
+        { .group = HV_GRP_SDIO_ERR,                             },
+        { .group = HV_GRP_REBOOT_DATA,                          },
        { .group = HV_GRP_NIAG_PERF,    .flags = FLAG_PRE_API   },
        { .group = HV_GRP_FIRE_PERF,                            },
        { .group = HV_GRP_N2_CPU,                               },
diff --git a/arch/sparc/kernel/hvcalls.S b/arch/sparc/kernel/hvcalls.S
index 8a5f35ffb15e..58d60de4d65b 100644
--- a/arch/sparc/kernel/hvcalls.S
+++ b/arch/sparc/kernel/hvcalls.S
@@ -798,3 +798,10 @@ ENTRY(sun4v_niagara2_setperf)
        retl
         nop
 ENDPROC(sun4v_niagara2_setperf)
+ENTRY(sun4v_reboot_data_set)
+        mov     HV_FAST_REBOOT_DATA_SET, %o5
+        ta      HV_FAST_TRAP
+        retl
+         nop
+ENDPROC(sun4v_reboot_data_set)
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c
index 6ffccd6e0156..d0479e2163fa 100644
--- a/arch/sparc/kernel/ioport.c
+++ b/arch/sparc/kernel/ioport.c
@@ -65,9 +65,6 @@ static inline void dma_make_coherent(unsigned long pa, unsigned long len)
 }
 #endif
-static struct resource *_sparc_find_resource(struct resource *r,
-                                             unsigned long);
 static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);
 static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
    unsigned long size, char *name);
@@ -143,7 +140,11 @@ void iounmap(volatile void __iomem *virtual)
        unsigned long vaddr = (unsigned long) virtual & PAGE_MASK;
        struct resource *res;
-        if ((res = _sparc_find_resource(&sparc_iomap, vaddr)) == NULL) {
+        /*
+         * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case.
+         * This probably warrants some sort of hashing.
+        */
+        if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) {
                printk("free_io/iounmap: cannot free %lx\n", vaddr);
                return;
        }
@@ -319,7 +320,7 @@ static void sbus_free_coherent(struct device *dev, size_t n, void *p,
        struct resource *res;
        struct page *pgv;
-        if ((res = _sparc_find_resource(&_sparc_dvma,
+        if ((res = lookup_resource(&_sparc_dvma,
            (unsigned long)p)) == NULL) {
                printk("sbus_free_consistent: cannot free %p\n", p);
                return;
@@ -492,7 +493,7 @@ static void pci32_free_coherent(struct device *dev, size_t n, void *p,
 {
        struct resource *res;
-        if ((res = _sparc_find_resource(&_sparc_dvma,
+        if ((res = lookup_resource(&_sparc_dvma,
            (unsigned long)p)) == NULL) {
                printk("pci_free_consistent: cannot free %p\n", p);
                return;
@@ -715,25 +716,6 @@ static const struct file_operations sparc_io_proc_fops = {
 };
 #endif /* CONFIG_PROC_FS */
-/*
- * This is a version of find_resource and it belongs to kernel/resource.c.
- * Until we have agreement with Linus and Martin, it lingers here.
- *
- * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case.
- * This probably warrants some sort of hashing.
- */
-static struct resource *_sparc_find_resource(struct resource *root,
-                                             unsigned long hit)
-{
-        struct resource *tmp;
-        for (tmp = root->child; tmp != 0; tmp = tmp->sibling) {
-                if (tmp->start <= hit && tmp->end >= hit)
-                        return tmp;
-        }
-        return NULL;
-}
 static void register_proc_sparc_ioport(void)
 {
 #ifdef CONFIG_PROC_FS
diff --git a/arch/sparc/kernel/kernel.h b/arch/sparc/kernel/kernel.h
index 6f6544cfa0ef..fd6c36b1df74 100644
--- a/arch/sparc/kernel/kernel.h
+++ b/arch/sparc/kernel/kernel.h
@@ -4,12 +4,27 @@
 #include <linux/interrupt.h>
 #include <asm/traps.h>
+#include <asm/head.h>
+#include <asm/io.h>
 /* cpu.c */
 extern const char *sparc_pmu_type;
 extern unsigned int fsr_storage;
 extern int ncpus_probed;
+#ifdef CONFIG_SPARC64
+/* setup_64.c */
+struct seq_file;
+extern void cpucap_info(struct seq_file *);
+static inline unsigned long kimage_addr_to_ra(const char *p)
+{
+        unsigned long val = (unsigned long) p;
+        return kern_base + (val - KERNBASE);
+}
+#endif
 #ifdef CONFIG_SPARC32
 /* cpu.c */
 extern void cpu_probe(void);
diff --git a/arch/sparc/kernel/ktlb.S b/arch/sparc/kernel/ktlb.S
index 1d361477d7d6..79f310364849 100644
--- a/arch/sparc/kernel/ktlb.S
+++ b/arch/sparc/kernel/ktlb.S
@@ -47,16 +47,16 @@ kvmap_itlb_tsb_miss:
 kvmap_itlb_vmalloc_addr:
        KERN_PGTABLE_WALK(%g4, %g5, %g2, kvmap_itlb_longpath)
-        KTSB_LOCK_TAG(%g1, %g2, %g7)
+        TSB_LOCK_TAG(%g1, %g2, %g7)
        /* Load and check PTE.  */
        ldxa            [%g5] ASI_PHYS_USE_EC, %g5
        mov             1, %g7
        sllx            %g7, TSB_TAG_INVALID_BIT, %g7
        brgez,a,pn      %g5, kvmap_itlb_longpath
-         KTSB_STORE(%g1, %g7)
+         TSB_STORE(%g1, %g7)
-        KTSB_WRITE(%g1, %g5, %g6)
+        TSB_WRITE(%g1, %g5, %g6)
        /* fallthrough to TLB load */
@@ -102,9 +102,9 @@ kvmap_itlb_longpath:
 kvmap_itlb_obp:
        OBP_TRANS_LOOKUP(%g4, %g5, %g2, %g3, kvmap_itlb_longpath)
-        KTSB_LOCK_TAG(%g1, %g2, %g7)
+        TSB_LOCK_TAG(%g1, %g2, %g7)
-        KTSB_WRITE(%g1, %g5, %g6)
+        TSB_WRITE(%g1, %g5, %g6)
        ba,pt           %xcc, kvmap_itlb_load
         nop
@@ -112,17 +112,17 @@ kvmap_itlb_obp:
 kvmap_dtlb_obp:
        OBP_TRANS_LOOKUP(%g4, %g5, %g2, %g3, kvmap_dtlb_longpath)
-        KTSB_LOCK_TAG(%g1, %g2, %g7)
+        TSB_LOCK_TAG(%g1, %g2, %g7)
-        KTSB_WRITE(%g1, %g5, %g6)
+        TSB_WRITE(%g1, %g5, %g6)
        ba,pt           %xcc, kvmap_dtlb_load
         nop
        .align          32
 kvmap_dtlb_tsb4m_load:
-        KTSB_LOCK_TAG(%g1, %g2, %g7)
+        TSB_LOCK_TAG(%g1, %g2, %g7)
-        KTSB_WRITE(%g1, %g5, %g6)
+        TSB_WRITE(%g1, %g5, %g6)
        ba,pt           %xcc, kvmap_dtlb_load
         nop
@@ -222,16 +222,16 @@ kvmap_linear_patch:
 kvmap_dtlb_vmalloc_addr:
        KERN_PGTABLE_WALK(%g4, %g5, %g2, kvmap_dtlb_longpath)
-        KTSB_LOCK_TAG(%g1, %g2, %g7)
+        TSB_LOCK_TAG(%g1, %g2, %g7)
        /* Load and check PTE.  */
        ldxa            [%g5] ASI_PHYS_USE_EC, %g5
        mov             1, %g7
        sllx            %g7, TSB_TAG_INVALID_BIT, %g7
        brgez,a,pn      %g5, kvmap_dtlb_longpath
-         KTSB_STORE(%g1, %g7)
+         TSB_STORE(%g1, %g7)
-        KTSB_WRITE(%g1, %g5, %g6)
+        TSB_WRITE(%g1, %g5, %g6)
        /* fallthrough to TLB load */
diff --git a/arch/sparc/kernel/leon_pci_grpci2.c b/arch/sparc/kernel/leon_pci_grpci2.c
index 44dc093ee33a..fad1bd07cb56 100644
--- a/arch/sparc/kernel/leon_pci_grpci2.c
+++ b/arch/sparc/kernel/leon_pci_grpci2.c
@@ -215,7 +215,7 @@ struct grpci2_priv {
 DEFINE_SPINLOCK(grpci2_dev_lock);
 struct grpci2_priv *grpci2priv;
-int grpci2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int grpci2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        struct grpci2_priv *priv = dev->bus->sysdata;
        int irq_group;
diff --git a/arch/sparc/kernel/mdesc.c b/arch/sparc/kernel/mdesc.c
index 42f28c7420e1..acaebb63c4fd 100644
--- a/arch/sparc/kernel/mdesc.c
+++ b/arch/sparc/kernel/mdesc.c
@@ -508,6 +508,8 @@ const char *mdesc_node_name(struct mdesc_handle *hp, u64 node)
 }
 EXPORT_SYMBOL(mdesc_node_name);
+static u64 max_cpus = 64;
 static void __init report_platform_properties(void)
 {
        struct mdesc_handle *hp = mdesc_grab();
@@ -543,8 +545,10 @@ static void __init report_platform_properties(void)
        if (v)
                printk("PLATFORM: watchdog-max-timeout [%llu ms]\n", *v);
        v = mdesc_get_property(hp, pn, "max-cpus", NULL);
-        if (v)
+        if (v) {
-                printk("PLATFORM: max-cpus [%llu]\n", *v);
+                max_cpus = *v;
+                printk("PLATFORM: max-cpus [%llu]\n", max_cpus);
+        }
 #ifdef CONFIG_SMP
        {
@@ -715,7 +719,7 @@ static void __cpuinit set_proc_ids(struct mdesc_handle *hp)
 }
 static void __cpuinit get_one_mondo_bits(const u64 *p, unsigned int *mask,
-                                         unsigned char def)
+                                         unsigned long def, unsigned long max)
 {
        u64 val;
@@ -726,6 +730,9 @@ static void __cpuinit get_one_mondo_bits(const u64 *p, unsigned int *mask,
        if (!val || val >= 64)
                goto use_default;
+        if (val > max)
+                val = max;
        *mask = ((1U << val) * 64U) - 1U;
        return;
@@ -736,19 +743,28 @@ use_default:
 static void __cpuinit get_mondo_data(struct mdesc_handle *hp, u64 mp,
                                     struct trap_per_cpu *tb)
 {
+        static int printed;
        const u64 *val;
        val = mdesc_get_property(hp, mp, "q-cpu-mondo-#bits", NULL);
-        get_one_mondo_bits(val, &tb->cpu_mondo_qmask, 7);
+        get_one_mondo_bits(val, &tb->cpu_mondo_qmask, 7, ilog2(max_cpus * 2));
        val = mdesc_get_property(hp, mp, "q-dev-mondo-#bits", NULL);
-        get_one_mondo_bits(val, &tb->dev_mondo_qmask, 7);
+        get_one_mondo_bits(val, &tb->dev_mondo_qmask, 7, 8);
        val = mdesc_get_property(hp, mp, "q-resumable-#bits", NULL);
-        get_one_mondo_bits(val, &tb->resum_qmask, 6);
+        get_one_mondo_bits(val, &tb->resum_qmask, 6, 7);
        val = mdesc_get_property(hp, mp, "q-nonresumable-#bits", NULL);
-        get_one_mondo_bits(val, &tb->nonresum_qmask, 2);
+        get_one_mondo_bits(val, &tb->nonresum_qmask, 2, 2);
+        if (!printed++) {
+                pr_info("SUN4V: Mondo queue sizes "
+                        "[cpu(%u) dev(%u) r(%u) nr(%u)]\n",
+                        tb->cpu_mondo_qmask + 1,
+                        tb->dev_mondo_qmask + 1,
+                        tb->resum_qmask + 1,
+                        tb->nonresum_qmask + 1);
+        }
 }
 static void * __cpuinit mdesc_iterate_over_cpus(void *(*func)(struct mdesc_handle *, u64, int, void *), void *arg, cpumask_t *mask)
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index c4dd0999da86..3e9daea1653d 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -29,6 +29,7 @@
 #include <linux/interrupt.h>
 #include <linux/cpu.h>
 #include <linux/initrd.h>
+#include <linux/module.h>
 #include <asm/system.h>
 #include <asm/io.h>
@@ -46,6 +47,8 @@
 #include <asm/mmu.h>
 #include <asm/ns87303.h>
 #include <asm/btext.h>
+#include <asm/elf.h>
+#include <asm/mdesc.h>
 #ifdef CONFIG_IP_PNP
 #include <net/ipconfig.h>
@@ -269,6 +272,40 @@ void __init sun4v_patch(void)
        sun4v_hvapi_init();
 }
+static void __init popc_patch(void)
+{
+        struct popc_3insn_patch_entry *p3;
+        struct popc_6insn_patch_entry *p6;
+        p3 = &__popc_3insn_patch;
+        while (p3 < &__popc_3insn_patch_end) {
+                unsigned long i, addr = p3->addr;
+                for (i = 0; i < 3; i++) {
+                        *(unsigned int *) (addr +  (i * 4)) = p3->insns[i];
+                        wmb();
+                        __asm__ __volatile__("flush     %0"
+                                             : : "r" (addr +  (i * 4)));
+                }
+                p3++;
+        }
+        p6 = &__popc_6insn_patch;
+        while (p6 < &__popc_6insn_patch_end) {
+                unsigned long i, addr = p6->addr;
+                for (i = 0; i < 6; i++) {
+                        *(unsigned int *) (addr +  (i * 4)) = p6->insns[i];
+                        wmb();
+                        __asm__ __volatile__("flush     %0"
+                                             : : "r" (addr +  (i * 4)));
+                }
+                p6++;
+        }
+}
 #ifdef CONFIG_SMP
 void __init boot_cpu_id_too_large(int cpu)
 {
@@ -278,6 +315,154 @@ void __init boot_cpu_id_too_large(int cpu)
 }
 #endif
+/* On Ultra, we support all of the v8 capabilities. */
+unsigned long sparc64_elf_hwcap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
+                                   HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV |
+                                   HWCAP_SPARC_V9);
+EXPORT_SYMBOL(sparc64_elf_hwcap);
+static const char *hwcaps[] = {
+        "flush", "stbar", "swap", "muldiv", "v9",
+        "ultra3", "blkinit", "n2",
+        /* These strings are as they appear in the machine description
+         * 'hwcap-list' property for cpu nodes.
+         */
+        "mul32", "div32", "fsmuld", "v8plus", "popc", "vis", "vis2",
+        "ASIBlkInit", "fmaf", "vis3", "hpc", "random", "trans", "fjfmau",
+        "ima", "cspare",
+};
+void cpucap_info(struct seq_file *m)
+{
+        unsigned long caps = sparc64_elf_hwcap;
+        int i, printed = 0;
+        seq_puts(m, "cpucaps\t\t: ");
+        for (i = 0; i < ARRAY_SIZE(hwcaps); i++) {
+                unsigned long bit = 1UL << i;
+                if (caps & bit) {
+                        seq_printf(m, "%s%s",
+                                   printed ? "," : "", hwcaps[i]);
+                        printed++;
+                }
+        }
+        seq_putc(m, '\n');
+}
+static void __init report_hwcaps(unsigned long caps)
+{
+        int i, printed = 0;
+        printk(KERN_INFO "CPU CAPS: [");
+        for (i = 0; i < ARRAY_SIZE(hwcaps); i++) {
+                unsigned long bit = 1UL << i;
+                if (caps & bit) {
+                        printk(KERN_CONT "%s%s",
+                               printed ? "," : "", hwcaps[i]);
+                        if (++printed == 8) {
+                                printk(KERN_CONT "]\n");
+                                printk(KERN_INFO "CPU CAPS: [");
+                                printed = 0;
+                        }
+                }
+        }
+        printk(KERN_CONT "]\n");
+}
+static unsigned long __init mdesc_cpu_hwcap_list(void)
+{
+        struct mdesc_handle *hp;
+        unsigned long caps = 0;
+        const char *prop;
+        int len;
+        u64 pn;
+        hp = mdesc_grab();
+        if (!hp)
+                return 0;
+        pn = mdesc_node_by_name(hp, MDESC_NODE_NULL, "cpu");
+        if (pn == MDESC_NODE_NULL)
+                goto out;
+        prop = mdesc_get_property(hp, pn, "hwcap-list", &len);
+        if (!prop)
+                goto out;
+        while (len) {
+                int i, plen;
+                for (i = 0; i < ARRAY_SIZE(hwcaps); i++) {
+                        unsigned long bit = 1UL << i;
+                        if (!strcmp(prop, hwcaps[i])) {
+                                caps |= bit;
+                                break;
+                        }
+                }
+                plen = strlen(prop) + 1;
+                prop += plen;
+                len -= plen;
+        }
+out:
+        mdesc_release(hp);
+        return caps;
+}
+/* This yields a mask that user programs can use to figure out what
+ * instruction set this cpu supports.
+ */
+static void __init init_sparc64_elf_hwcap(void)
+{
+        unsigned long cap = sparc64_elf_hwcap;
+        unsigned long mdesc_caps;
+        if (tlb_type == cheetah || tlb_type == cheetah_plus)
+                cap |= HWCAP_SPARC_ULTRA3;
+        else if (tlb_type == hypervisor) {
+                if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||
+                    sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
+                    sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
+                        cap |= HWCAP_SPARC_BLKINIT;
+                if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
+                    sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
+                        cap |= HWCAP_SPARC_N2;
+        }
+        cap |= (AV_SPARC_MUL32 | AV_SPARC_DIV32 | AV_SPARC_V8PLUS);
+        mdesc_caps = mdesc_cpu_hwcap_list();
+        if (!mdesc_caps) {
+                if (tlb_type == spitfire)
+                        cap |= AV_SPARC_VIS;
+                if (tlb_type == cheetah || tlb_type == cheetah_plus)
+                        cap |= AV_SPARC_VIS | AV_SPARC_VIS2;
+                if (tlb_type == cheetah_plus)
+                        cap |= AV_SPARC_POPC;
+                if (tlb_type == hypervisor) {
+                        if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1)
+                                cap |= AV_SPARC_ASI_BLK_INIT;
+                        if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
+                            sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
+                                cap |= (AV_SPARC_VIS | AV_SPARC_VIS2 |
+                                        AV_SPARC_ASI_BLK_INIT |
+                                        AV_SPARC_POPC);
+                        if (sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
+                                cap |= (AV_SPARC_VIS3 | AV_SPARC_HPC |
+                                        AV_SPARC_FMAF);
+                }
+        }
+        sparc64_elf_hwcap = cap | mdesc_caps;
+        report_hwcaps(sparc64_elf_hwcap);
+        if (sparc64_elf_hwcap & AV_SPARC_POPC)
+                popc_patch();
+}
 void __init setup_arch(char **cmdline_p)
 {
        /* Initialize PROM console and command line. */
@@ -337,6 +522,7 @@ void __init setup_arch(char **cmdline_p)
        init_cur_cpu_trap(current_thread_info());
        paging_init();
+        init_sparc64_elf_hwcap();
 }
 extern int stop_a_enabled;
diff --git a/arch/sparc/kernel/sparc_ksyms_64.c b/arch/sparc/kernel/sparc_ksyms_64.c
index 372ad59c4cba..83b47ab02d96 100644
--- a/arch/sparc/kernel/sparc_ksyms_64.c
+++ b/arch/sparc/kernel/sparc_ksyms_64.c
@@ -8,6 +8,7 @@
 #include <linux/module.h>
 #include <linux/pci.h>
 #include <linux/init.h>
+#include <linux/bitops.h>
 #include <asm/system.h>
 #include <asm/cpudata.h>
@@ -38,5 +39,15 @@ EXPORT_SYMBOL(sun4v_niagara_setperf);
 EXPORT_SYMBOL(sun4v_niagara2_getperf);
 EXPORT_SYMBOL(sun4v_niagara2_setperf);
+/* from hweight.S */
+EXPORT_SYMBOL(__arch_hweight8);
+EXPORT_SYMBOL(__arch_hweight16);
+EXPORT_SYMBOL(__arch_hweight32);
+EXPORT_SYMBOL(__arch_hweight64);
+/* from ffs_ffz.S */
+EXPORT_SYMBOL(ffs);
+EXPORT_SYMBOL(__ffs);
 /* Exporting a symbol from /init/main.c */
 EXPORT_SYMBOL(saved_command_line);
diff --git a/arch/sparc/kernel/sstate.c b/arch/sparc/kernel/sstate.c
index 8cdbe5946b43..c59af546f522 100644
--- a/arch/sparc/kernel/sstate.c
+++ b/arch/sparc/kernel/sstate.c
@@ -14,14 +14,9 @@
 #include <asm/head.h>
 #include <asm/io.h>
-static int hv_supports_soft_state;
+#include "kernel.h"
-static unsigned long kimage_addr_to_ra(const char *p)
-{
-        unsigned long val = (unsigned long) p;
-        return kern_base + (val - KERNBASE);
+static int hv_supports_soft_state;
-}
 static void do_set_sstate(unsigned long state, const char *msg)
 {
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c
index 35cff1673aa4..76e4ac1a13e1 100644
--- a/arch/sparc/kernel/unaligned_64.c
+++ b/arch/sparc/kernel/unaligned_64.c
@@ -22,6 +22,7 @@
 #include <linux/bitops.h>
 #include <linux/perf_event.h>
 #include <linux/ratelimit.h>
+#include <linux/bitops.h>
 #include <asm/fpumacro.h>
 enum direction {
@@ -373,16 +374,11 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
        }
 }
-static char popc_helper[] = {
-0, 1, 1, 2, 1, 2, 2, 3,
-1, 2, 2, 3, 2, 3, 3, 4, 
-};
 int handle_popc(u32 insn, struct pt_regs *regs)
 {
-        u64 value;
-        int ret, i, rd = ((insn >> 25) & 0x1f);
        int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
+        int ret, rd = ((insn >> 25) & 0x1f);
+        u64 value;
                                
        perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
        if (insn & 0x2000) {
@@ -392,10 +388,7 @@ int handle_popc(u32 insn, struct pt_regs *regs)
                maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
                value = fetch_reg(insn & 0x1f, regs);
        }
-        for (ret = 0, i = 0; i < 16; i++) {
+        ret = hweight64(value);
-                ret += popc_helper[value & 0xf];
-                value >>= 4;
-        }
        if (rd < 16) {
                if (rd)
                        regs->u_regs[rd] = ret;
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S
index c0220759003e..0e1605697b49 100644
--- a/arch/sparc/kernel/vmlinux.lds.S
+++ b/arch/sparc/kernel/vmlinux.lds.S
@@ -107,7 +107,26 @@ SECTIONS
                *(.sun4v_2insn_patch)
                __sun4v_2insn_patch_end = .;
        }
+        .swapper_tsb_phys_patch : {
+                __swapper_tsb_phys_patch = .;
+                *(.swapper_tsb_phys_patch)
+                __swapper_tsb_phys_patch_end = .;
+        }
+        .swapper_4m_tsb_phys_patch : {
+                __swapper_4m_tsb_phys_patch = .;
+                *(.swapper_4m_tsb_phys_patch)
+                __swapper_4m_tsb_phys_patch_end = .;
+        }
+        .popc_3insn_patch : {
+                __popc_3insn_patch = .;
+                *(.popc_3insn_patch)
+                __popc_3insn_patch_end = .;
+        }
+        .popc_6insn_patch : {
+                __popc_6insn_patch = .;
+                *(.popc_6insn_patch)
+                __popc_6insn_patch_end = .;
+        }
        PERCPU_SECTION(SMP_CACHE_BYTES)
        . = ALIGN(PAGE_SIZE);
diff --git a/arch/sparc/lib/Makefile b/arch/sparc/lib/Makefile
index 7f01b8fce8bc..a3fc4375a150 100644
--- a/arch/sparc/lib/Makefile
+++ b/arch/sparc/lib/Makefile
@@ -31,13 +31,13 @@ lib-$(CONFIG_SPARC64) += NGmemcpy.o NGcopy_from_user.o NGcopy_to_user.o
 lib-$(CONFIG_SPARC64) += NGpatch.o NGpage.o NGbzero.o
 lib-$(CONFIG_SPARC64) += NG2memcpy.o NG2copy_from_user.o NG2copy_to_user.o
-lib-$(CONFIG_SPARC64) +=  NG2patch.o NG2page.o
+lib-$(CONFIG_SPARC64) +=  NG2patch.o
 lib-$(CONFIG_SPARC64) += GENmemcpy.o GENcopy_from_user.o GENcopy_to_user.o
 lib-$(CONFIG_SPARC64) += GENpatch.o GENpage.o GENbzero.o
 lib-$(CONFIG_SPARC64) += copy_in_user.o user_fixup.o memmove.o
-lib-$(CONFIG_SPARC64) += mcount.o ipcsum.o xor.o
+lib-$(CONFIG_SPARC64) += mcount.o ipcsum.o xor.o hweight.o ffs.o
 obj-y                 += iomap.o
 obj-$(CONFIG_SPARC32) += atomic32.o
diff --git a/arch/sparc/lib/NG2page.S b/arch/sparc/lib/NG2page.S
deleted file mode 100644
index 73b6b7c72cbf..000000000000
--- a/arch/sparc/lib/NG2page.S
+++ /dev/null
@@ -1,61 +0,0 @@
-/* NG2page.S: Niagara-2 optimized clear and copy page.
- *
- * Copyright (C) 2007 (davem@davemloft.net)
- */
-#include <asm/asi.h>
-#include <asm/page.h>
-#include <asm/visasm.h>
-        .text
-        .align  32
-        /* This is heavily simplified from the sun4u variants
-         * because Niagara-2 does not have any D-cache aliasing issues.
-         */
-NG2copy_user_page:      /* %o0=dest, %o1=src, %o2=vaddr */
-        prefetch        [%o1 + 0x00], #one_read
-        prefetch        [%o1 + 0x40], #one_read
-        VISEntryHalf
-        set             PAGE_SIZE, %g7
-        sub             %o0, %o1, %g3
-1:      stxa            %g0, [%o1 + %g3] ASI_BLK_INIT_QUAD_LDD_P
-        subcc           %g7, 64, %g7
-        ldda            [%o1] ASI_BLK_P, %f0
-        stda            %f0, [%o1 + %g3] ASI_BLK_P
-        add             %o1, 64, %o1
-        bne,pt          %xcc, 1b
-         prefetch       [%o1 + 0x40], #one_read
-        membar          #Sync
-        VISExitHalf
-        retl
-         nop
-#define BRANCH_ALWAYS   0x10680000
-#define NOP             0x01000000
-#define NG_DO_PATCH(OLD, NEW)   \
-        sethi   %hi(NEW), %g1; \
-        or      %g1, %lo(NEW), %g1; \
-        sethi   %hi(OLD), %g2; \
-        or      %g2, %lo(OLD), %g2; \
-        sub     %g1, %g2, %g1; \
-        sethi   %hi(BRANCH_ALWAYS), %g3; \
-        sll     %g1, 11, %g1; \
-        srl     %g1, 11 + 2, %g1; \
-        or      %g3, %lo(BRANCH_ALWAYS), %g3; \
-        or      %g3, %g1, %g3; \
-        stw     %g3, [%g2]; \
-        sethi   %hi(NOP), %g3; \
-        or      %g3, %lo(NOP), %g3; \
-        stw     %g3, [%g2 + 0x4]; \
-        flush   %g2;
-        .globl  niagara2_patch_pageops
-        .type   niagara2_patch_pageops,#function
-niagara2_patch_pageops:
-        NG_DO_PATCH(copy_user_page, NG2copy_user_page)
-        NG_DO_PATCH(_clear_page, NGclear_page)
-        NG_DO_PATCH(clear_user_page, NGclear_user_page)
-        retl
-         nop
-        .size   niagara2_patch_pageops,.-niagara2_patch_pageops
diff --git a/arch/sparc/lib/NGpage.S b/arch/sparc/lib/NGpage.S
index 428920de05ba..b9e790b9c6b8 100644
--- a/arch/sparc/lib/NGpage.S
+++ b/arch/sparc/lib/NGpage.S
@@ -16,55 +16,91 @@
         */
 NGcopy_user_page:       /* %o0=dest, %o1=src, %o2=vaddr */
-        prefetch        [%o1 + 0x00], #one_read
+        save            %sp, -192, %sp
-        mov             8, %g1
+        rd              %asi, %g3
-        mov             16, %g2
+        wr              %g0, ASI_BLK_INIT_QUAD_LDD_P, %asi
-        mov             24, %g3
        set             PAGE_SIZE, %g7
+        prefetch        [%i1 + 0x00], #one_read
+        prefetch        [%i1 + 0x40], #one_read
-1:      ldda            [%o1 + %g0] ASI_BLK_INIT_QUAD_LDD_P, %o2
+1:      prefetch        [%i1 + 0x80], #one_read
-        ldda            [%o1 + %g2] ASI_BLK_INIT_QUAD_LDD_P, %o4
+        prefetch        [%i1 + 0xc0], #one_read
-        prefetch        [%o1 + 0x40], #one_read
+        ldda            [%i1 + 0x00] %asi, %o2
-        add             %o1, 32, %o1
+        ldda            [%i1 + 0x10] %asi, %o4
-        stxa            %o2, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
+        ldda            [%i1 + 0x20] %asi, %l2
-        stxa            %o3, [%o0 + %g1] ASI_BLK_INIT_QUAD_LDD_P
+        ldda            [%i1 + 0x30] %asi, %l4
-        ldda            [%o1 + %g0] ASI_BLK_INIT_QUAD_LDD_P, %o2
+        stxa            %o2, [%i0 + 0x00] %asi
-        stxa            %o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %o3, [%i0 + 0x08] %asi
-        stxa            %o5, [%o0 + %g3] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %o4, [%i0 + 0x10] %asi
-        ldda            [%o1 + %g2] ASI_BLK_INIT_QUAD_LDD_P, %o4
+        stxa            %o5, [%i0 + 0x18] %asi
-        add             %o1, 32, %o1
+        stxa            %l2, [%i0 + 0x20] %asi
-        add             %o0, 32, %o0
+        stxa            %l3, [%i0 + 0x28] %asi
-        stxa            %o2, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %l4, [%i0 + 0x30] %asi
-        stxa            %o3, [%o0 + %g1] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %l5, [%i0 + 0x38] %asi
-        stxa            %o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
+        ldda            [%i1 + 0x40] %asi, %o2
-        stxa            %o5, [%o0 + %g3] ASI_BLK_INIT_QUAD_LDD_P
+        ldda            [%i1 + 0x50] %asi, %o4
-        subcc           %g7, 64, %g7
+        ldda            [%i1 + 0x60] %asi, %l2
+        ldda            [%i1 + 0x70] %asi, %l4
+        stxa            %o2, [%i0 + 0x40] %asi
+        stxa            %o3, [%i0 + 0x48] %asi
+        stxa            %o4, [%i0 + 0x50] %asi
+        stxa            %o5, [%i0 + 0x58] %asi
+        stxa            %l2, [%i0 + 0x60] %asi
+        stxa            %l3, [%i0 + 0x68] %asi
+        stxa            %l4, [%i0 + 0x70] %asi
+        stxa            %l5, [%i0 + 0x78] %asi
+        add             %i1, 128, %i1
+        subcc           %g7, 128, %g7
        bne,pt          %xcc, 1b
-         add            %o0, 32, %o0
+         add            %i0, 128, %i0
+        wr              %g3, 0x0, %asi
        membar          #Sync
-        retl
+        ret
-         nop
+         restore
-        .globl          NGclear_page, NGclear_user_page
+        .align          32
 NGclear_page:           /* %o0=dest */
 NGclear_user_page:      /* %o0=dest, %o1=vaddr */
-        mov             8, %g1
+        rd              %asi, %g3
-        mov             16, %g2
+        wr              %g0, ASI_BLK_INIT_QUAD_LDD_P, %asi
-        mov             24, %g3
        set             PAGE_SIZE, %g7
-1:      stxa            %g0, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
+1:      stxa            %g0, [%o0 + 0x00] %asi
-        stxa            %g0, [%o0 + %g1] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %g0, [%o0 + 0x08] %asi
-        stxa            %g0, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %g0, [%o0 + 0x10] %asi
-        stxa            %g0, [%o0 + %g3] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %g0, [%o0 + 0x18] %asi
-        add             %o0, 32, %o0
+        stxa            %g0, [%o0 + 0x20] %asi
-        stxa            %g0, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %g0, [%o0 + 0x28] %asi
-        stxa            %g0, [%o0 + %g1] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %g0, [%o0 + 0x30] %asi
-        stxa            %g0, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %g0, [%o0 + 0x38] %asi
-        stxa            %g0, [%o0 + %g3] ASI_BLK_INIT_QUAD_LDD_P
+        stxa            %g0, [%o0 + 0x40] %asi
-        subcc           %g7, 64, %g7
+        stxa            %g0, [%o0 + 0x48] %asi
+        stxa            %g0, [%o0 + 0x50] %asi
+        stxa            %g0, [%o0 + 0x58] %asi
+        stxa            %g0, [%o0 + 0x60] %asi
+        stxa            %g0, [%o0 + 0x68] %asi
+        stxa            %g0, [%o0 + 0x70] %asi
+        stxa            %g0, [%o0 + 0x78] %asi
+        stxa            %g0, [%o0 + 0x80] %asi
+        stxa            %g0, [%o0 + 0x88] %asi
+        stxa            %g0, [%o0 + 0x90] %asi
+        stxa            %g0, [%o0 + 0x98] %asi
+        stxa            %g0, [%o0 + 0xa0] %asi
+        stxa            %g0, [%o0 + 0xa8] %asi
+        stxa            %g0, [%o0 + 0xb0] %asi
+        stxa            %g0, [%o0 + 0xb8] %asi
+        stxa            %g0, [%o0 + 0xc0] %asi
+        stxa            %g0, [%o0 + 0xc8] %asi
+        stxa            %g0, [%o0 + 0xd0] %asi
+        stxa            %g0, [%o0 + 0xd8] %asi
+        stxa            %g0, [%o0 + 0xe0] %asi
+        stxa            %g0, [%o0 + 0xe8] %asi
+        stxa            %g0, [%o0 + 0xf0] %asi
+        stxa            %g0, [%o0 + 0xf8] %asi
+        subcc           %g7, 256, %g7
        bne,pt          %xcc, 1b
-         add            %o0, 32, %o0
+         add            %o0, 256, %o0
+        wr              %g3, 0x0, %asi
        membar          #Sync
        retl
         nop
diff --git a/arch/sparc/lib/atomic32.c b/arch/sparc/lib/atomic32.c
index 8600eb2461b5..1d32b54089aa 100644
--- a/arch/sparc/lib/atomic32.c
+++ b/arch/sparc/lib/atomic32.c
@@ -65,7 +65,7 @@ int __atomic_add_unless(atomic_t *v, int a, int u)
        if (ret != u)
                v->counter += a;
        spin_unlock_irqrestore(ATOMIC_HASH(v), flags);
-        return ret != u;
+        return ret;
 }
 EXPORT_SYMBOL(__atomic_add_unless);
diff --git a/arch/sparc/lib/ffs.S b/arch/sparc/lib/ffs.S
new file mode 100644
index 000000000000..b39389f69899
--- /dev/null
+++ b/arch/sparc/lib/ffs.S
@@ -0,0 +1,84 @@
+#include <linux/linkage.h>
+        .register       %g2,#scratch
+        .text
+        .align  32
+ENTRY(ffs)
+        brnz,pt %o0, 1f
+         mov    1, %o1
+        retl
+         clr    %o0
+        nop
+        nop
+ENTRY(__ffs)
+        sllx    %o0, 32, %g1            /* 1  */
+        srlx    %o0, 32, %g2
+        clr     %o1                     /* 2  */
+        movrz   %g1, %g2, %o0
+        movrz   %g1, 32, %o1            /* 3  */
+1:      clr     %o2
+        sllx    %o0, (64 - 16), %g1     /* 4  */
+        srlx    %o0, 16, %g2
+        movrz   %g1, %g2, %o0           /* 5  */
+        clr     %o3
+        movrz   %g1, 16, %o2            /* 6  */
+        clr     %o4
+        and     %o0, 0xff, %g1          /* 7  */
+        srlx    %o0, 8, %g2
+        movrz   %g1, %g2, %o0           /* 8  */
+        clr     %o5
+        movrz   %g1, 8, %o3             /* 9  */
+        add     %o2, %o1, %o2
+        and     %o0, 0xf, %g1           /* 10 */
+        srlx    %o0, 4, %g2
+        movrz   %g1, %g2, %o0           /* 11 */
+        add     %o2, %o3, %o2
+        movrz   %g1, 4, %o4             /* 12 */
+        and     %o0, 0x3, %g1           /* 13 */
+        srlx    %o0, 2, %g2
+        movrz   %g1, %g2, %o0           /* 14 */
+        add     %o2, %o4, %o2
+        movrz   %g1, 2, %o5             /* 15 */
+        and     %o0, 0x1, %g1           /* 16 */
+        add     %o2, %o5, %o2           /* 17 */
+        xor     %g1, 0x1, %g1
+        retl                            /* 18 */
+         add    %o2, %g1, %o0
+ENDPROC(ffs)
+ENDPROC(__ffs)
+        .section        .popc_6insn_patch, "ax"
+        .word           ffs
+        brz,pn  %o0, 98f
+         neg    %o0, %g1
+        xnor    %o0, %g1, %o1
+        popc    %o1, %o0
+98:     retl
+         nop
+        .word           __ffs
+        neg     %o0, %g1
+        xnor    %o0, %g1, %o1
+        popc    %o1, %o0
+        retl
+         sub    %o0, 1, %o0
+        nop
+        .previous
diff --git a/arch/sparc/lib/hweight.S b/arch/sparc/lib/hweight.S
new file mode 100644
index 000000000000..95414e0a6808
--- /dev/null
+++ b/arch/sparc/lib/hweight.S
@@ -0,0 +1,51 @@
+#include <linux/linkage.h>
+        .text
+        .align  32
+ENTRY(__arch_hweight8)
+        ba,pt   %xcc, __sw_hweight8
+         nop
+        nop
+ENDPROC(__arch_hweight8)
+        .section        .popc_3insn_patch, "ax"
+        .word           __arch_hweight8
+        sllx            %o0, 64-8, %g1
+        retl
+         popc           %g1, %o0
+        .previous
+ENTRY(__arch_hweight16)
+        ba,pt   %xcc, __sw_hweight16
+         nop
+        nop
+ENDPROC(__arch_hweight16)
+        .section        .popc_3insn_patch, "ax"
+        .word           __arch_hweight16
+        sllx            %o0, 64-16, %g1
+        retl
+         popc           %g1, %o0
+        .previous
+ENTRY(__arch_hweight32)
+        ba,pt   %xcc, __sw_hweight32
+         nop
+        nop
+ENDPROC(__arch_hweight32)
+        .section        .popc_3insn_patch, "ax"
+        .word           __arch_hweight32
+        sllx            %o0, 64-32, %g1
+        retl
+         popc           %g1, %o0
+        .previous
+ENTRY(__arch_hweight64)
+        ba,pt   %xcc, __sw_hweight64
+         nop
+        nop
+ENDPROC(__arch_hweight64)
+        .section        .popc_3insn_patch, "ax"
+        .word           __arch_hweight64
+        retl
+         popc           %o0, %o0
+        nop
+        .previous
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index 3fd8e18bed80..adfac23d976a 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -1597,6 +1597,42 @@ static void __init tsb_phys_patch(void)
 static struct hv_tsb_descr ktsb_descr[NUM_KTSB_DESCR];
 extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
+static void patch_one_ktsb_phys(unsigned int *start, unsigned int *end, unsigned long pa)
+{
+        pa >>= KTSB_PHYS_SHIFT;
+        while (start < end) {
+                unsigned int *ia = (unsigned int *)(unsigned long)*start;
+                ia[0] = (ia[0] & ~0x3fffff) | (pa >> 10);
+                __asm__ __volatile__("flush     %0" : : "r" (ia));
+                ia[1] = (ia[1] & ~0x3ff) | (pa & 0x3ff);
+                __asm__ __volatile__("flush     %0" : : "r" (ia + 1));
+                start++;
+        }
+}
+static void ktsb_phys_patch(void)
+{
+        extern unsigned int __swapper_tsb_phys_patch;
+        extern unsigned int __swapper_tsb_phys_patch_end;
+        extern unsigned int __swapper_4m_tsb_phys_patch;
+        extern unsigned int __swapper_4m_tsb_phys_patch_end;
+        unsigned long ktsb_pa;
+        ktsb_pa = kern_base + ((unsigned long)&swapper_tsb[0] - KERNBASE);
+        patch_one_ktsb_phys(&__swapper_tsb_phys_patch,
+                            &__swapper_tsb_phys_patch_end, ktsb_pa);
+#ifndef CONFIG_DEBUG_PAGEALLOC
+        ktsb_pa = (kern_base +
+                   ((unsigned long)&swapper_4m_tsb[0] - KERNBASE));
+        patch_one_ktsb_phys(&__swapper_4m_tsb_phys_patch,
+                            &__swapper_4m_tsb_phys_patch_end, ktsb_pa);
+#endif
+}
 static void __init sun4v_ktsb_init(void)
 {
        unsigned long ktsb_pa;
@@ -1716,8 +1752,10 @@ void __init paging_init(void)
                sun4u_pgprot_init();
        if (tlb_type == cheetah_plus ||
-            tlb_type == hypervisor)
+            tlb_type == hypervisor) {
                tsb_phys_patch();
+                ktsb_phys_patch();
+        }
        if (tlb_type == hypervisor) {
                sun4v_patch_tlb_handlers();
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 0249b8b4db54..b30f71ac0d06 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -12,6 +12,7 @@ config TILE
        select GENERIC_PENDING_IRQ if SMP
        select GENERIC_IRQ_SHOW
        select SYS_HYPERVISOR
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG if !M386
 # FIXME: investigate whether we need/want these options.
 #       select HAVE_IOREMAP_PROT
diff --git a/arch/tile/include/asm/Kbuild b/arch/tile/include/asm/Kbuild
index 849ab2fa1f5c..aec60dc06007 100644
--- a/arch/tile/include/asm/Kbuild
+++ b/arch/tile/include/asm/Kbuild
@@ -2,3 +2,41 @@ include include/asm-generic/Kbuild.asm
 header-y += ucontext.h
 header-y += hardwall.h
+generic-y += bug.h
+generic-y += bugs.h
+generic-y += cputime.h
+generic-y += device.h
+generic-y += div64.h
+generic-y += emergency-restart.h
+generic-y += errno.h
+generic-y += fb.h
+generic-y += fcntl.h
+generic-y += ioctl.h
+generic-y += ioctls.h
+generic-y += ipc.h
+generic-y += ipcbuf.h
+generic-y += irq_regs.h
+generic-y += kdebug.h
+generic-y += local.h
+generic-y += module.h
+generic-y += msgbuf.h
+generic-y += mutex.h
+generic-y += param.h
+generic-y += parport.h
+generic-y += poll.h
+generic-y += posix_types.h
+generic-y += resource.h
+generic-y += scatterlist.h
+generic-y += sembuf.h
+generic-y += serial.h
+generic-y += shmbuf.h
+generic-y += shmparam.h
+generic-y += socket.h
+generic-y += sockios.h
+generic-y += statfs.h
+generic-y += termbits.h
+generic-y += termios.h
+generic-y += types.h
+generic-y += ucontext.h
+generic-y += xor.h
diff --git a/arch/tile/include/asm/bug.h b/arch/tile/include/asm/bug.h
deleted file mode 100644
index b12fd89e42e9..000000000000
--- a/arch/tile/include/asm/bug.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/bug.h>
diff --git a/arch/tile/include/asm/bugs.h b/arch/tile/include/asm/bugs.h
deleted file mode 100644
index 61791e1ad9f5..000000000000
--- a/arch/tile/include/asm/bugs.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/bugs.h>
diff --git a/arch/tile/include/asm/cputime.h b/arch/tile/include/asm/cputime.h
deleted file mode 100644
index 6d68ad7e0ea3..000000000000
--- a/arch/tile/include/asm/cputime.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/cputime.h>
diff --git a/arch/tile/include/asm/device.h b/arch/tile/include/asm/device.h
deleted file mode 100644
index f0a4c256403b..000000000000
--- a/arch/tile/include/asm/device.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/device.h>
diff --git a/arch/tile/include/asm/div64.h b/arch/tile/include/asm/div64.h
deleted file mode 100644
index 6cd978cefb28..000000000000
--- a/arch/tile/include/asm/div64.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/div64.h>
diff --git a/arch/tile/include/asm/emergency-restart.h b/arch/tile/include/asm/emergency-restart.h
deleted file mode 100644
index 3711bd9d50bd..000000000000
--- a/arch/tile/include/asm/emergency-restart.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/emergency-restart.h>
diff --git a/arch/tile/include/asm/errno.h b/arch/tile/include/asm/errno.h
deleted file mode 100644
index 4c82b503d92f..000000000000
--- a/arch/tile/include/asm/errno.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/errno.h>
diff --git a/arch/tile/include/asm/fb.h b/arch/tile/include/asm/fb.h
deleted file mode 100644
index 3a4988e8df45..000000000000
--- a/arch/tile/include/asm/fb.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/fb.h>
diff --git a/arch/tile/include/asm/fcntl.h b/arch/tile/include/asm/fcntl.h
deleted file mode 100644
index 46ab12db5739..000000000000
--- a/arch/tile/include/asm/fcntl.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/fcntl.h>
diff --git a/arch/tile/include/asm/fixmap.h b/arch/tile/include/asm/fixmap.h
index 51537ff9265a..c66f7933beaa 100644
--- a/arch/tile/include/asm/fixmap.h
+++ b/arch/tile/include/asm/fixmap.h
@@ -75,12 +75,6 @@ extern void __set_fixmap(enum fixed_addresses idx,
 #define set_fixmap(idx, phys) \
                __set_fixmap(idx, phys, PAGE_KERNEL)
-/*
- * Some hardware wants to get fixmapped without caching.
- */
-#define set_fixmap_nocache(idx, phys) \
-                __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
 #define clear_fixmap(idx) \
                __set_fixmap(idx, 0, __pgprot(0))
diff --git a/arch/tile/include/asm/ioctl.h b/arch/tile/include/asm/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/arch/tile/include/asm/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/ioctl.h>
diff --git a/arch/tile/include/asm/ioctls.h b/arch/tile/include/asm/ioctls.h
deleted file mode 100644
index ec34c760665e..000000000000
--- a/arch/tile/include/asm/ioctls.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/ioctls.h>
diff --git a/arch/tile/include/asm/ipc.h b/arch/tile/include/asm/ipc.h
deleted file mode 100644
index a46e3d9c2a3f..000000000000
--- a/arch/tile/include/asm/ipc.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/ipc.h>
diff --git a/arch/tile/include/asm/ipcbuf.h b/arch/tile/include/asm/ipcbuf.h
deleted file mode 100644
index 84c7e51cb6d0..000000000000
--- a/arch/tile/include/asm/ipcbuf.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/ipcbuf.h>
diff --git a/arch/tile/include/asm/irq_regs.h b/arch/tile/include/asm/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/arch/tile/include/asm/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/irq_regs.h>
diff --git a/arch/tile/include/asm/kdebug.h b/arch/tile/include/asm/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/arch/tile/include/asm/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/kdebug.h>
diff --git a/arch/tile/include/asm/local.h b/arch/tile/include/asm/local.h
deleted file mode 100644
index c11c530f74d0..000000000000
--- a/arch/tile/include/asm/local.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/local.h>
diff --git a/arch/tile/include/asm/module.h b/arch/tile/include/asm/module.h
deleted file mode 100644
index 1e4b79fe8584..000000000000
--- a/arch/tile/include/asm/module.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/module.h>
diff --git a/arch/tile/include/asm/msgbuf.h b/arch/tile/include/asm/msgbuf.h
deleted file mode 100644
index 809134c644a6..000000000000
--- a/arch/tile/include/asm/msgbuf.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/msgbuf.h>
diff --git a/arch/tile/include/asm/mutex.h b/arch/tile/include/asm/mutex.h
deleted file mode 100644
index ff6101aa2c71..000000000000
--- a/arch/tile/include/asm/mutex.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/mutex-dec.h>
diff --git a/arch/tile/include/asm/param.h b/arch/tile/include/asm/param.h
deleted file mode 100644
index 965d45427975..000000000000
--- a/arch/tile/include/asm/param.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/param.h>
diff --git a/arch/tile/include/asm/parport.h b/arch/tile/include/asm/parport.h
deleted file mode 100644
index cf252af64590..000000000000
--- a/arch/tile/include/asm/parport.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/parport.h>
diff --git a/arch/tile/include/asm/poll.h b/arch/tile/include/asm/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/arch/tile/include/asm/poll.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/poll.h>
diff --git a/arch/tile/include/asm/posix_types.h b/arch/tile/include/asm/posix_types.h
deleted file mode 100644
index 22cae6230ceb..000000000000
--- a/arch/tile/include/asm/posix_types.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/posix_types.h>
diff --git a/arch/tile/include/asm/resource.h b/arch/tile/include/asm/resource.h
deleted file mode 100644
index 04bc4db8921b..000000000000
--- a/arch/tile/include/asm/resource.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/resource.h>
diff --git a/arch/tile/include/asm/scatterlist.h b/arch/tile/include/asm/scatterlist.h
deleted file mode 100644
index 35d786fe93ae..000000000000
--- a/arch/tile/include/asm/scatterlist.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/scatterlist.h>
diff --git a/arch/tile/include/asm/sembuf.h b/arch/tile/include/asm/sembuf.h
deleted file mode 100644
index 7673b83cfef7..000000000000
--- a/arch/tile/include/asm/sembuf.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/sembuf.h>
diff --git a/arch/tile/include/asm/serial.h b/arch/tile/include/asm/serial.h
deleted file mode 100644
index a0cb0caff152..000000000000
--- a/arch/tile/include/asm/serial.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/serial.h>
diff --git a/arch/tile/include/asm/shmbuf.h b/arch/tile/include/asm/shmbuf.h
deleted file mode 100644
index 83c05fc2de38..000000000000
--- a/arch/tile/include/asm/shmbuf.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/shmbuf.h>
diff --git a/arch/tile/include/asm/shmparam.h b/arch/tile/include/asm/shmparam.h
deleted file mode 100644
index 93f30deb95d0..000000000000
--- a/arch/tile/include/asm/shmparam.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/shmparam.h>
diff --git a/arch/tile/include/asm/socket.h b/arch/tile/include/asm/socket.h
deleted file mode 100644
index 6b71384b9d8b..000000000000
--- a/arch/tile/include/asm/socket.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/socket.h>
diff --git a/arch/tile/include/asm/sockios.h b/arch/tile/include/asm/sockios.h
deleted file mode 100644
index def6d4746ee7..000000000000
--- a/arch/tile/include/asm/sockios.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/sockios.h>
diff --git a/arch/tile/include/asm/statfs.h b/arch/tile/include/asm/statfs.h
deleted file mode 100644
index 0b91fe198c20..000000000000
--- a/arch/tile/include/asm/statfs.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/statfs.h>
diff --git a/arch/tile/include/asm/termbits.h b/arch/tile/include/asm/termbits.h
deleted file mode 100644
index 3935b106de79..000000000000
--- a/arch/tile/include/asm/termbits.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/termbits.h>
diff --git a/arch/tile/include/asm/termios.h b/arch/tile/include/asm/termios.h
deleted file mode 100644
index 280d78a9d966..000000000000
--- a/arch/tile/include/asm/termios.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/termios.h>
diff --git a/arch/tile/include/asm/types.h b/arch/tile/include/asm/types.h
deleted file mode 100644
index b9e79bc580dd..000000000000
--- a/arch/tile/include/asm/types.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/types.h>
diff --git a/arch/tile/include/asm/ucontext.h b/arch/tile/include/asm/ucontext.h
deleted file mode 100644
index 9bc07b9f30fb..000000000000
--- a/arch/tile/include/asm/ucontext.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/ucontext.h>
diff --git a/arch/tile/include/asm/xor.h b/arch/tile/include/asm/xor.h
deleted file mode 100644
index c82eb12a5b18..000000000000
--- a/arch/tile/include/asm/xor.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/xor.h>
diff --git a/arch/tile/include/hv/drv_srom_intf.h b/arch/tile/include/hv/drv_srom_intf.h
new file mode 100644
index 000000000000..6395faa6d9e6
--- /dev/null
+++ b/arch/tile/include/hv/drv_srom_intf.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright 2011 Tilera Corporation. All Rights Reserved.
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License
+ *   as published by the Free Software Foundation, version 2.
+ *
+ *   This program is distributed in the hope that it will be useful, but
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ *   NON INFRINGEMENT.  See the GNU General Public License for
+ *   more details.
+ */
+/**
+ * @file drv_srom_intf.h
+ * Interface definitions for the SPI Flash ROM driver.
+ */
+#ifndef _SYS_HV_INCLUDE_DRV_SROM_INTF_H
+#define _SYS_HV_INCLUDE_DRV_SROM_INTF_H
+/** Read this offset to get the total device size. */
+#define SROM_TOTAL_SIZE_OFF   0xF0000000
+/** Read this offset to get the device sector size. */
+#define SROM_SECTOR_SIZE_OFF  0xF0000004
+/** Read this offset to get the device page size. */
+#define SROM_PAGE_SIZE_OFF    0xF0000008
+/** Write this offset to flush any pending writes. */
+#define SROM_FLUSH_OFF        0xF1000000
+/** Write this offset, plus the byte offset of the start of a sector, to
+ *  erase a sector.  Any write data is ignored, but there must be at least
+ *  one byte of write data.  Only applies when the driver is in MTD mode.
+ */
+#define SROM_ERASE_OFF        0xF2000000
+#endif /* _SYS_HV_INCLUDE_DRV_SROM_INTF_H */
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index 6d4cb5d7a9fd..2a8014cb1ff5 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -228,7 +228,7 @@ err_cont:
 * (pin - 1) converts from the PCI standard's [1:4] convention to
 * a normal [0:3] range.
 */
-static int tile_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int tile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        struct pci_controller *controller =
                (struct pci_controller *)dev->sysdata;
diff --git a/arch/tile/kernel/time.c b/arch/tile/kernel/time.c
index c4be58cc5d50..f6f50f2a5e37 100644
--- a/arch/tile/kernel/time.c
+++ b/arch/tile/kernel/time.c
@@ -78,7 +78,6 @@ static struct clocksource cycle_counter_cs = {
        .rating = 300,
        .read = clocksource_get_cycles,
        .mask = CLOCKSOURCE_MASK(64),
-        .shift = 22,   /* typical value, e.g. x86 tsc uses this */
        .flags = CLOCK_SOURCE_IS_CONTINUOUS,
 };
@@ -91,8 +90,6 @@ void __init setup_clock(void)
        cycles_per_sec = hv_sysconf(HV_SYSCONF_CPU_SPEED);
        sched_clock_mult =
                clocksource_hz2mult(cycles_per_sec, SCHED_CLOCK_SHIFT);
-        cycle_counter_cs.mult =
-                clocksource_hz2mult(cycles_per_sec, cycle_counter_cs.shift);
 }
 void __init calibrate_delay(void)
@@ -107,7 +104,7 @@ void __init calibrate_delay(void)
 void __init time_init(void)
 {
        /* Initialize and register the clock source. */
-        clocksource_register(&cycle_counter_cs);
+        clocksource_register_hz(&cycle_counter_cs, cycles_per_sec);
        /* Start up the tile-timer interrupt source on the boot cpu. */
        setup_tile_timer();
diff --git a/arch/tile/mm/init.c b/arch/tile/mm/init.c
index 4e10c4023028..7309988c9794 100644
--- a/arch/tile/mm/init.c
+++ b/arch/tile/mm/init.c
@@ -836,8 +836,7 @@ void __init mem_init(void)
 #endif
 #ifdef CONFIG_FLATMEM
-        if (!mem_map)
+        BUG_ON(!mem_map);
-                BUG();
 #endif
 #ifdef CONFIG_HIGHMEM
diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index 100eab842e66..4892fbb54ebf 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -102,7 +102,7 @@ void pci_puv3_preinit(void)
        writel(readl(PCIBRI_CMD) | PCIBRI_CMD_IO | PCIBRI_CMD_MEM, PCIBRI_CMD);
 }
-static int __init pci_puv3_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init pci_puv3_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        if (dev->bus->number == 0) {
 #ifdef CONFIG_ARCH_FPGA /* 4 pci slots */
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 153aa6f78299..6a47bb22657f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -72,6 +72,7 @@ config X86
        select USE_GENERIC_SMP_HELPERS if SMP
        select HAVE_BPF_JIT if (X86_64 && NET)
        select CLKEVT_I8253
+        select ARCH_HAVE_NMI_SAFE_CMPXCHG
 config INSTRUCTION_DECODER
        def_bool (KPROBES || PERF_EVENTS)
@@ -1905,7 +1906,7 @@ config PCI_BIOS
 # x86-64 doesn't support PCI BIOS access from long mode so always go direct.
 config PCI_DIRECT
        def_bool y
-        depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC))
+        depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG))
 config PCI_MMCONFIG
        def_bool y
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index d02804d650c4..d8e8eefbe24c 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -40,8 +40,6 @@
 #include <linux/compiler.h>
 #include <asm/page.h>
-#include <xen/xen.h>
 #define build_mmio_read(name, size, type, reg, barrier) \
 static inline type name(const volatile void __iomem *addr) \
 { type ret; asm volatile("mov" size " %1,%0":reg (ret) \
@@ -334,6 +332,7 @@ extern void fixup_early_ioremap(void);
 extern bool is_early_ioremap_ptep(pte_t *ptep);
 #ifdef CONFIG_XEN
+#include <xen/xen.h>
 struct bio_vec;
 extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 219371546afd..0d1171c97729 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -751,8 +751,6 @@ static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
                     :: "a" (eax), "c" (ecx));
 }
-extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
 extern void select_idle_routine(const struct cpuinfo_x86 *c);
 extern void init_amd_e400_c1e_mask(void);
diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index 5812404a0d4c..f50e7fb2a201 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -149,6 +149,29 @@ int acpi_processor_ffh_cstate_probe(unsigned int cpu,
 }
 EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe);
+/*
+ * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
+ * which can obviate IPI to trigger checking of need_resched.
+ * We execute MONITOR against need_resched and enter optimized wait state
+ * through MWAIT. Whenever someone changes need_resched, we would be woken
+ * up from MWAIT (without an IPI).
+ *
+ * New with Core Duo processors, MWAIT can take some hints based on CPU
+ * capability.
+ */
+void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
+{
+        if (!need_resched()) {
+                if (this_cpu_has(X86_FEATURE_CLFLUSH_MONITOR))
+                        clflush((void *)&current_thread_info()->flags);
+                __monitor((void *)&current_thread_info()->flags, 0, 0);
+                smp_mb();
+                if (!need_resched())
+                        __mwait(ax, cx);
+        }
+}
 void acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cx)
 {
        unsigned int cpu = smp_processor_id();
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index e1ba8cb24e4e..e7e3b019c439 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -438,29 +438,6 @@ void cpu_idle_wait(void)
 }
 EXPORT_SYMBOL_GPL(cpu_idle_wait);
-/*
- * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
- * which can obviate IPI to trigger checking of need_resched.
- * We execute MONITOR against need_resched and enter optimized wait state
- * through MWAIT. Whenever someone changes need_resched, we would be woken
- * up from MWAIT (without an IPI).
- *
- * New with Core Duo processors, MWAIT can take some hints based on CPU
- * capability.
- */
-void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
-{
-        if (!need_resched()) {
-                if (this_cpu_has(X86_FEATURE_CLFLUSH_MONITOR))
-                        clflush((void *)&current_thread_info()->flags);
-                __monitor((void *)&current_thread_info()->flags, 0, 0);
-                smp_mb();
-                if (!need_resched())
-                        __mwait(ax, cx);
-        }
-}
 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 static void mwait_idle(void)
 {
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index a3d0dc59067b..7a3b65107a27 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -38,6 +38,7 @@
 #include <linux/uaccess.h>
 #include <linux/io.h>
 #include <linux/kdebug.h>
+#include <linux/cpuidle.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -109,7 +110,8 @@ void cpu_idle(void)
                        local_irq_disable();
                        /* Don't trace irqs off for idle */
                        stop_critical_timings();
-                        pm_idle();
+                        if (cpuidle_idle_call())
+                                pm_idle();
                        start_critical_timings();
                }
                tick_nohz_restart_sched_tick();
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index ca6f7ab8df33..f693e44e1bf6 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -37,6 +37,7 @@
 #include <linux/uaccess.h>
 #include <linux/io.h>
 #include <linux/ftrace.h>
+#include <linux/cpuidle.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -136,7 +137,8 @@ void cpu_idle(void)
                        enter_idle();
                        /* Don't trace irqs off for idle */
                        stop_critical_timings();
-                        pm_idle();
+                        if (cpuidle_idle_call())
+                                pm_idle();
                        start_critical_timings();
                        /* In many cases the interrupt that ended idle
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 68c3c1395202..ae3cb23cd89b 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -246,10 +246,9 @@ static void add_resources(struct pci_root_info *info)
                conflict = insert_resource_conflict(root, res);
                if (conflict)
-                        dev_err(&info->bridge->dev,
+                        dev_info(&info->bridge->dev,
-                                "address space collision: host bridge window %pR "
+                                 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
-                                "conflicts with %s %pR\n",
+                                 res, conflict->name, conflict);
-                                res, conflict->name, conflict);
                else
                        pci_bus_add_resource(info->bus, res, 0);
        }
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c
index 67858be4b52b..99176094500b 100644
--- a/arch/x86/pci/ce4100.c
+++ b/arch/x86/pci/ce4100.c
@@ -257,6 +257,7 @@ static int ce4100_conf_read(unsigned int seg, unsigned int bus,
 {
        int i;
+        WARN_ON(seg);
        if (bus == 1) {
                for (i = 0; i < ARRAY_SIZE(bus1_fixups); i++) {
                        if (bus1_fixups[i].dev_func == devfn &&
@@ -282,6 +283,7 @@ static int ce4100_conf_write(unsigned int seg, unsigned int bus,
 {
        int i;
+        WARN_ON(seg);
        if (bus == 1) {
                for (i = 0; i < ARRAY_SIZE(bus1_fixups); i++) {
                        if (bus1_fixups[i].dev_func == devfn &&
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 5fe75026ecc2..92df322e0b57 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -247,13 +247,6 @@ static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {
        },
 #endif          /* __i386__ */
        {
-                .callback = find_sort_method,
-                .ident = "Dell System",
-                .matches = {
-                        DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
-                },
-        },
-        {
                .callback = set_bf_sort,
                .ident = "Dell PowerEdge 1950",
                .matches = {
@@ -294,6 +287,13 @@ static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {
                },
        },
        {
+                .callback = find_sort_method,
+                .ident = "Dell System",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
+                },
+        },
+        {
                .callback = set_bf_sort,
                .ident = "HP ProLiant BL20p G3",
                .matches = {
diff --git a/arch/x86/pci/direct.c b/arch/x86/pci/direct.c
index e6fd8473fb7b..4f2c70439d7f 100644
--- a/arch/x86/pci/direct.c
+++ b/arch/x86/pci/direct.c
@@ -22,7 +22,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus,
 {
        unsigned long flags;
-        if ((bus > 255) || (devfn > 255) || (reg > 4095)) {
+        if (seg || (bus > 255) || (devfn > 255) || (reg > 4095)) {
                *value = -1;
                return -EINVAL;
        }
@@ -53,7 +53,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus,
 {
        unsigned long flags;
-        if ((bus > 255) || (devfn > 255) || (reg > 4095))
+        if (seg || (bus > 255) || (devfn > 255) || (reg > 4095))
                return -EINVAL;
        raw_spin_lock_irqsave(&pci_config_lock, flags);
@@ -97,6 +97,7 @@ static int pci_conf2_read(unsigned int seg, unsigned int bus,
        unsigned long flags;
        int dev, fn;
+        WARN_ON(seg);
        if ((bus > 255) || (devfn > 255) || (reg > 255)) {
                *value = -1;
                return -EINVAL;
@@ -138,6 +139,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus,
        unsigned long flags;
        int dev, fn;
+        WARN_ON(seg);
        if ((bus > 255) || (devfn > 255) || (reg > 255)) 
                return -EINVAL;
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 5c9e2458df4e..512a88c41501 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -34,6 +34,7 @@ static int pci_conf1_mq_read(unsigned int seg, unsigned int bus,
        unsigned long flags;
        void *adr __iomem = XQUAD_PORT_ADDR(0xcfc, BUS2QUAD(bus));
+        WARN_ON(seg);
        if (!value || (bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255))
                return -EINVAL;
@@ -73,6 +74,7 @@ static int pci_conf1_mq_write(unsigned int seg, unsigned int bus,
        unsigned long flags;
        void *adr __iomem = XQUAD_PORT_ADDR(0xcfc, BUS2QUAD(bus));
+        WARN_ON(seg);
        if ((bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) 
                return -EINVAL;
diff --git a/arch/x86/pci/olpc.c b/arch/x86/pci/olpc.c
index 13700ec8e2e4..5262603b04d9 100644
--- a/arch/x86/pci/olpc.c
+++ b/arch/x86/pci/olpc.c
@@ -206,6 +206,8 @@ static int pci_olpc_read(unsigned int seg, unsigned int bus,
 {
        uint32_t *addr;
+        WARN_ON(seg);
        /* Use the hardware mechanism for non-simulated devices */
        if (!is_simulated(bus, devfn))
                return pci_direct_conf1.read(seg, bus, devfn, reg, len, value);
@@ -264,6 +266,8 @@ static int pci_olpc_read(unsigned int seg, unsigned int bus,
 static int pci_olpc_write(unsigned int seg, unsigned int bus,
                unsigned int devfn, int reg, int len, uint32_t value)
 {
+        WARN_ON(seg);
        /* Use the hardware mechanism for non-simulated devices */
        if (!is_simulated(bus, devfn))
                return pci_direct_conf1.write(seg, bus, devfn, reg, len, value);
diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c
index a5f7d0d63de0..f68553551467 100644
--- a/arch/x86/pci/pcbios.c
+++ b/arch/x86/pci/pcbios.c
@@ -181,6 +181,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus,
        unsigned long flags;
        unsigned long bx = (bus << 8) | devfn;
+        WARN_ON(seg);
        if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
                return -EINVAL;
@@ -247,6 +248,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus,
        unsigned long flags;
        unsigned long bx = (bus << 8) | devfn;
+        WARN_ON(seg);
        if ((bus > 255) || (devfn > 255) || (reg > 255)) 
                return -EINVAL;
diff --git a/arch/x86/pci/visws.c b/arch/x86/pci/visws.c
index 03008f72eb04..6f2f8eeed171 100644
--- a/arch/x86/pci/visws.c
+++ b/arch/x86/pci/visws.c
@@ -24,7 +24,7 @@ static void pci_visws_disable_irq(struct pci_dev *dev) { }
 unsigned int pci_bus0, pci_bus1;
-static int __init visws_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init visws_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        int irq, bus = dev->bus->number;
diff --git a/arch/x86/platform/mrst/Makefile b/arch/x86/platform/mrst/Makefile
index f61ccdd49341..1ea38775a6d3 100644
--- a/arch/x86/platform/mrst/Makefile
+++ b/arch/x86/platform/mrst/Makefile
@@ -1,3 +1,4 @@
 obj-$(CONFIG_X86_MRST)          += mrst.o
 obj-$(CONFIG_X86_MRST)          += vrtc.o
 obj-$(CONFIG_EARLY_PRINTK_MRST) += early_printk_mrst.o
+obj-$(CONFIG_X86_MRST)          += pmu.o
diff --git a/arch/x86/platform/mrst/pmu.c b/arch/x86/platform/mrst/pmu.c
new file mode 100644
index 000000000000..9281da7d91bd
--- /dev/null
+++ b/arch/x86/platform/mrst/pmu.c
@@ -0,0 +1,817 @@
+/*
+ * mrst/pmu.c - driver for MRST Power Management Unit
+ *
+ * Copyright (c) 2011, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#include <linux/cpuidle.h>
+#include <linux/debugfs.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/seq_file.h>
+#include <linux/sfi.h>
+#include <asm/intel_scu_ipc.h>
+#include "pmu.h"
+#define IPCMSG_FW_REVISION      0xF4
+struct mrst_device {
+        u16 pci_dev_num;        /* DEBUG only */
+        u16 lss;
+        u16 latest_request;
+        unsigned int pci_state_counts[PCI_D3cold + 1]; /* DEBUG only */
+};
+/*
+ * comlete list of MRST PCI devices
+ */
+static struct mrst_device mrst_devs[] = {
+/*  0 */ { 0x0800, LSS_SPI0 },          /* Moorestown SPI Ctrl 0 */
+/*  1 */ { 0x0801, LSS_SPI1 },          /* Moorestown SPI Ctrl 1 */
+/*  2 */ { 0x0802, LSS_I2C0 },          /* Moorestown I2C 0 */
+/*  3 */ { 0x0803, LSS_I2C1 },          /* Moorestown I2C 1 */
+/*  4 */ { 0x0804, LSS_I2C2 },          /* Moorestown I2C 2 */
+/*  5 */ { 0x0805, LSS_KBD },           /* Moorestown Keyboard Ctrl */
+/*  6 */ { 0x0806, LSS_USB_HC },        /* Moorestown USB Ctrl */
+/*  7 */ { 0x0807, LSS_SD_HC0 },        /* Moorestown SD Host Ctrl 0 */
+/*  8 */ { 0x0808, LSS_SD_HC1 },        /* Moorestown SD Host Ctrl 1 */
+/*  9 */ { 0x0809, LSS_NAND },          /* Moorestown NAND Ctrl */
+/* 10 */ { 0x080a, LSS_AUDIO },         /* Moorestown Audio Ctrl */
+/* 11 */ { 0x080b, LSS_IMAGING },       /* Moorestown ISP */
+/* 12 */ { 0x080c, LSS_SECURITY },      /* Moorestown Security Controller */
+/* 13 */ { 0x080d, LSS_DISPLAY },       /* Moorestown External Displays */
+/* 14 */ { 0x080e, 0 },                 /* Moorestown SCU IPC */
+/* 15 */ { 0x080f, LSS_GPIO },          /* Moorestown GPIO Controller */
+/* 16 */ { 0x0810, 0 },                 /* Moorestown Power Management Unit */
+/* 17 */ { 0x0811, LSS_USB_OTG },       /* Moorestown OTG Ctrl */
+/* 18 */ { 0x0812, LSS_SPI2 },          /* Moorestown SPI Ctrl 2 */
+/* 19 */ { 0x0813, 0 },                 /* Moorestown SC DMA */
+/* 20 */ { 0x0814, LSS_AUDIO_LPE },     /* Moorestown LPE DMA */
+/* 21 */ { 0x0815, LSS_AUDIO_SSP },     /* Moorestown SSP0 */
+/* 22 */ { 0x084F, LSS_SD_HC2 },        /* Moorestown SD Host Ctrl 2 */
+/* 23 */ { 0x4102, 0 },                 /* Lincroft */
+/* 24 */ { 0x4110, 0 },                 /* Lincroft */
+};
+/* n.b. We ignore PCI-id 0x815 in LSS9 b/c MeeGo has no driver for it */
+static u16 mrst_lss9_pci_ids[] = {0x080a, 0x0814, 0};
+static u16 mrst_lss10_pci_ids[] = {0x0800, 0x0801, 0x0802, 0x0803,
+                                        0x0804, 0x0805, 0x080f, 0};
+/* handle concurrent SMP invokations of pmu_pci_set_power_state() */
+static spinlock_t mrst_pmu_power_state_lock;
+static unsigned int wake_counters[MRST_NUM_LSS];        /* DEBUG only */
+static unsigned int pmu_irq_stats[INT_INVALID + 1];     /* DEBUG only */
+static int graphics_is_off;
+static int lss_s0i3_enabled;
+static bool mrst_pmu_s0i3_enable;
+/*  debug counters */
+static u32 pmu_wait_ready_calls;
+static u32 pmu_wait_ready_udelays;
+static u32 pmu_wait_ready_udelays_max;
+static u32 pmu_wait_done_calls;
+static u32 pmu_wait_done_udelays;
+static u32 pmu_wait_done_udelays_max;
+static u32 pmu_set_power_state_entry;
+static u32 pmu_set_power_state_send_cmd;
+static struct mrst_device *pci_id_2_mrst_dev(u16 pci_dev_num)
+{
+        int index = 0;
+        if ((pci_dev_num >= 0x0800) && (pci_dev_num <= 0x815))
+                index = pci_dev_num - 0x800;
+        else if (pci_dev_num == 0x084F)
+                index = 22;
+        else if (pci_dev_num == 0x4102)
+                index = 23;
+        else if (pci_dev_num == 0x4110)
+                index = 24;
+        if (pci_dev_num != mrst_devs[index].pci_dev_num) {
+                WARN_ONCE(1, FW_BUG "Unknown PCI device 0x%04X\n", pci_dev_num);
+                return 0;
+        }
+        return &mrst_devs[index];
+}
+/**
+ * mrst_pmu_validate_cstates
+ * @dev: cpuidle_device
+ *
+ * Certain states are not appropriate for governor to pick in some cases.
+ * This function will be called as cpuidle_device's prepare callback and
+ * thus tells governor to ignore such states when selecting the next state
+ * to enter.
+ */
+#define IDLE_STATE4_IS_C6       4
+#define IDLE_STATE5_IS_S0I3     5
+int mrst_pmu_invalid_cstates(void)
+{
+        int cpu = smp_processor_id();
+        /*
+         * Demote to C4 if the PMU is busy.
+         * Since LSS changes leave the busy bit clear...
+         * busy means either the PMU is waiting for an ACK-C6 that
+         * isn't coming due to an MWAIT that returned immediately;
+         * or we returned from S0i3 successfully, and the PMU
+         * is not done sending us interrupts.
+         */
+        if (pmu_read_busy_status())
+                return 1 << IDLE_STATE4_IS_C6 | 1 << IDLE_STATE5_IS_S0I3;
+        /*
+         * Disallow S0i3 if: PMU is not initialized, or CPU1 is active,
+         * or if device LSS is insufficient, or the GPU is active,
+         * or if it has been explicitly disabled.
+         */
+        if (!pmu_reg || !cpumask_equal(cpu_online_mask, cpumask_of(cpu)) ||
+            !lss_s0i3_enabled || !graphics_is_off || !mrst_pmu_s0i3_enable)
+                return 1 << IDLE_STATE5_IS_S0I3;
+        else
+                return 0;
+}
+/*
+ * pmu_update_wake_counters(): read PM_WKS, update wake_counters[]
+ * DEBUG only.
+ */
+static void pmu_update_wake_counters(void)
+{
+        int lss;
+        u32 wake_status;
+        wake_status = pmu_read_wks();
+        for (lss = 0; lss < MRST_NUM_LSS; ++lss) {
+                if (wake_status & (1 << lss))
+                        wake_counters[lss]++;
+        }
+}
+int mrst_pmu_s0i3_entry(void)
+{
+        int status;
+        /* Clear any possible error conditions */
+        pmu_write_ics(0x300);
+        /* set wake control to current D-states */
+        pmu_write_wssc(S0I3_SSS_TARGET);
+        status = mrst_s0i3_entry(PM_S0I3_COMMAND, &pmu_reg->pm_cmd);
+        pmu_update_wake_counters();
+        return status;
+}
+/* poll for maximum of 5ms for busy bit to clear */
+static int pmu_wait_ready(void)
+{
+        int udelays;
+        pmu_wait_ready_calls++;
+        for (udelays = 0; udelays < 500; ++udelays) {
+                if (udelays > pmu_wait_ready_udelays_max)
+                        pmu_wait_ready_udelays_max = udelays;
+                if (pmu_read_busy_status() == 0)
+                        return 0;
+                udelay(10);
+                pmu_wait_ready_udelays++;
+        }
+        /*
+         * if this fires, observe
+         * /sys/kernel/debug/mrst_pmu_wait_ready_calls
+         * /sys/kernel/debug/mrst_pmu_wait_ready_udelays
+         */
+        WARN_ONCE(1, "SCU not ready for 5ms");
+        return -EBUSY;
+}
+/* poll for maximum of 50ms us for busy bit to clear */
+static int pmu_wait_done(void)
+{
+        int udelays;
+        pmu_wait_done_calls++;
+        for (udelays = 0; udelays < 500; ++udelays) {
+                if (udelays > pmu_wait_done_udelays_max)
+                        pmu_wait_done_udelays_max = udelays;
+                if (pmu_read_busy_status() == 0)
+                        return 0;
+                udelay(100);
+                pmu_wait_done_udelays++;
+        }
+        /*
+         * if this fires, observe
+         * /sys/kernel/debug/mrst_pmu_wait_done_calls
+         * /sys/kernel/debug/mrst_pmu_wait_done_udelays
+         */
+        WARN_ONCE(1, "SCU not done for 50ms");
+        return -EBUSY;
+}
+u32 mrst_pmu_msi_is_disabled(void)
+{
+        return pmu_msi_is_disabled();
+}
+void mrst_pmu_enable_msi(void)
+{
+        pmu_msi_enable();
+}
+/**
+ * pmu_irq - pmu driver interrupt handler
+ * Context: interrupt context
+ */
+static irqreturn_t pmu_irq(int irq, void *dummy)
+{
+        union pmu_pm_ics pmu_ics;
+        pmu_ics.value = pmu_read_ics();
+        if (!pmu_ics.bits.pending)
+                return IRQ_NONE;
+        switch (pmu_ics.bits.cause) {
+        case INT_SPURIOUS:
+        case INT_CMD_DONE:
+        case INT_CMD_ERR:
+        case INT_WAKE_RX:
+        case INT_SS_ERROR:
+        case INT_S0IX_MISS:
+        case INT_NO_ACKC6:
+                pmu_irq_stats[pmu_ics.bits.cause]++;
+                break;
+        default:
+                pmu_irq_stats[INT_INVALID]++;
+        }
+        pmu_write_ics(pmu_ics.value); /* Clear pending interrupt */
+        return IRQ_HANDLED;
+}
+/*
+ * Translate PCI power management to MRST LSS D-states
+ */
+static int pci_2_mrst_state(int lss, pci_power_t pci_state)
+{
+        switch (pci_state) {
+        case PCI_D0:
+                if (SSMSK(D0i1, lss) & D0I1_ACG_SSS_TARGET)
+                        return D0i1;
+                else
+                        return D0;
+        case PCI_D1:
+                return D0i1;
+        case PCI_D2:
+                return D0i2;
+        case PCI_D3hot:
+        case PCI_D3cold:
+                return D0i3;
+        default:
+                WARN(1, "pci_state %d\n", pci_state);
+                return 0;
+        }
+}
+static int pmu_issue_command(u32 pm_ssc)
+{
+        union pmu_pm_set_cfg_cmd_t command;
+        if (pmu_read_busy_status()) {
+                pr_debug("pmu is busy, Operation not permitted\n");
+                return -1;
+        }
+        /*
+         * enable interrupts in PMU so that interrupts are
+         * propagated when ioc bit for a particular set
+         * command is set
+         */
+        pmu_irq_enable();
+        /* Configure the sub systems for pmu2 */
+        pmu_write_ssc(pm_ssc);
+        /*
+         * Send the set config command for pmu its configured
+         * for mode CM_IMMEDIATE & hence with No Trigger
+         */
+        command.pmu2_params.d_param.cfg_mode = CM_IMMEDIATE;
+        command.pmu2_params.d_param.cfg_delay = 0;
+        command.pmu2_params.d_param.rsvd = 0;
+        /* construct the command to send SET_CFG to particular PMU */
+        command.pmu2_params.d_param.cmd = SET_CFG_CMD;
+        command.pmu2_params.d_param.ioc = 0;
+        command.pmu2_params.d_param.mode_id = 0;
+        command.pmu2_params.d_param.sys_state = SYS_STATE_S0I0;
+        /* write the value of PM_CMD into particular PMU */
+        pr_debug("pmu command being written %x\n",
+                        command.pmu_pm_set_cfg_cmd_value);
+        pmu_write_cmd(command.pmu_pm_set_cfg_cmd_value);
+        return 0;
+}
+static u16 pmu_min_lss_pci_req(u16 *ids, u16 pci_state)
+{
+        u16 existing_request;
+        int i;
+        for (i = 0; ids[i]; ++i) {
+                struct mrst_device *mrst_dev;
+                mrst_dev = pci_id_2_mrst_dev(ids[i]);
+                if (unlikely(!mrst_dev))
+                        continue;
+                existing_request = mrst_dev->latest_request;
+                if (existing_request < pci_state)
+                        pci_state = existing_request;
+        }
+        return pci_state;
+}
+/**
+ * pmu_pci_set_power_state - Callback function is used by all the PCI devices
+ *                      for a platform  specific device power on/shutdown.
+ */
+int pmu_pci_set_power_state(struct pci_dev *pdev, pci_power_t pci_state)
+{
+        u32 old_sss, new_sss;
+        int status = 0;
+        struct mrst_device *mrst_dev;
+        pmu_set_power_state_entry++;
+        BUG_ON(pdev->vendor != PCI_VENDOR_ID_INTEL);
+        BUG_ON(pci_state < PCI_D0 || pci_state > PCI_D3cold);
+        mrst_dev = pci_id_2_mrst_dev(pdev->device);
+        if (unlikely(!mrst_dev))
+                return -ENODEV;
+        mrst_dev->pci_state_counts[pci_state]++;        /* count invocations */
+        /* PMU driver calls self as part of PCI initialization, ignore */
+        if (pdev->device == PCI_DEV_ID_MRST_PMU)
+                return 0;
+        BUG_ON(!pmu_reg); /* SW bug if called before initialized */
+        spin_lock(&mrst_pmu_power_state_lock);
+        if (pdev->d3_delay) {
+                dev_dbg(&pdev->dev, "d3_delay %d, should be 0\n",
+                        pdev->d3_delay);
+                pdev->d3_delay = 0;
+        }
+        /*
+         * If Lincroft graphics, simply remember state
+         */
+        if ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY
+                && !((pdev->class & PCI_SUB_CLASS_MASK) >> 8)) {
+                if (pci_state == PCI_D0)
+                        graphics_is_off = 0;
+                else
+                        graphics_is_off = 1;
+                goto ret;
+        }
+        if (!mrst_dev->lss)
+                goto ret;       /* device with no LSS */
+        if (mrst_dev->latest_request == pci_state)
+                goto ret;       /* no change */
+        mrst_dev->latest_request = pci_state;   /* record latest request */
+        /*
+         * LSS9 and LSS10 contain multiple PCI devices.
+         * Use the lowest numbered (highest power) state in the LSS
+         */
+        if (mrst_dev->lss == 9)
+                pci_state = pmu_min_lss_pci_req(mrst_lss9_pci_ids, pci_state);
+        else if (mrst_dev->lss == 10)
+                pci_state = pmu_min_lss_pci_req(mrst_lss10_pci_ids, pci_state);
+        status = pmu_wait_ready();
+        if (status)
+                goto ret;
+        old_sss = pmu_read_sss();
+        new_sss = old_sss & ~SSMSK(3, mrst_dev->lss);
+        new_sss |= SSMSK(pci_2_mrst_state(mrst_dev->lss, pci_state),
+                        mrst_dev->lss);
+        if (new_sss == old_sss)
+                goto ret;       /* nothing to do */
+        pmu_set_power_state_send_cmd++;
+        status = pmu_issue_command(new_sss);
+        if (unlikely(status != 0)) {
+                dev_err(&pdev->dev, "Failed to Issue a PM command\n");
+                goto ret;
+        }
+        if (pmu_wait_done())
+                goto ret;
+        lss_s0i3_enabled =
+        ((pmu_read_sss() & S0I3_SSS_TARGET) == S0I3_SSS_TARGET);
+ret:
+        spin_unlock(&mrst_pmu_power_state_lock);
+        return status;
+}
+#ifdef CONFIG_DEBUG_FS
+static char *d0ix_names[] = {"D0", "D0i1", "D0i2", "D0i3"};
+static inline const char *d0ix_name(int state)
+{
+        return d0ix_names[(int) state];
+}
+static int debug_mrst_pmu_show(struct seq_file *s, void *unused)
+{
+        struct pci_dev *pdev = NULL;
+        u32 cur_pmsss;
+        int lss;
+        seq_printf(s, "0x%08X D0I1_ACG_SSS_TARGET\n", D0I1_ACG_SSS_TARGET);
+        cur_pmsss = pmu_read_sss();
+        seq_printf(s, "0x%08X S0I3_SSS_TARGET\n", S0I3_SSS_TARGET);
+        seq_printf(s, "0x%08X Current SSS ", cur_pmsss);
+        seq_printf(s, lss_s0i3_enabled ? "\n" : "[BLOCKS s0i3]\n");
+        if (cpumask_equal(cpu_online_mask, cpumask_of(0)))
+                seq_printf(s, "cpu0 is only cpu online\n");
+        else
+                seq_printf(s, "cpu0 is NOT only cpu online [BLOCKS S0i3]\n");
+        seq_printf(s, "GFX: %s\n", graphics_is_off ? "" : "[BLOCKS s0i3]");
+        for_each_pci_dev(pdev) {
+                int pos;
+                u16 pmcsr;
+                struct mrst_device *mrst_dev;
+                int i;
+                mrst_dev = pci_id_2_mrst_dev(pdev->device);
+                seq_printf(s, "%s %04x/%04X %-16.16s ",
+                        dev_name(&pdev->dev),
+                        pdev->vendor, pdev->device,
+                        dev_driver_string(&pdev->dev));
+                if (unlikely (!mrst_dev)) {
+                        seq_printf(s, " UNKNOWN\n");
+                        continue;
+                }
+                if (mrst_dev->lss)
+                        seq_printf(s, "LSS %2d %-4s ", mrst_dev->lss,
+                                d0ix_name(((cur_pmsss >>
+                                        (mrst_dev->lss * 2)) & 0x3)));
+                else
+                        seq_printf(s, "            ");
+                /* PCI PM config space setting */
+                pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
+                if (pos != 0) {
+                        pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
+                seq_printf(s, "PCI-%-4s",
+                        pci_power_name(pmcsr & PCI_PM_CTRL_STATE_MASK));
+                } else {
+                        seq_printf(s, "        ");
+                }
+                seq_printf(s, " %s ", pci_power_name(mrst_dev->latest_request));
+                for (i = 0; i <= PCI_D3cold; ++i)
+                        seq_printf(s, "%d ", mrst_dev->pci_state_counts[i]);
+                if (mrst_dev->lss) {
+                        unsigned int lssmask;
+                        lssmask = SSMSK(D0i3, mrst_dev->lss);
+                        if ((lssmask & S0I3_SSS_TARGET) &&
+                                ((lssmask & cur_pmsss) !=
+                                        (lssmask & S0I3_SSS_TARGET)))
+                                                seq_printf(s , "[BLOCKS s0i3]");
+                }
+                seq_printf(s, "\n");
+        }
+        seq_printf(s, "Wake Counters:\n");
+        for (lss = 0; lss < MRST_NUM_LSS; ++lss)
+                seq_printf(s, "LSS%d %d\n", lss, wake_counters[lss]);
+        seq_printf(s, "Interrupt Counters:\n");
+        seq_printf(s,
+                "INT_SPURIOUS \t%8u\n" "INT_CMD_DONE \t%8u\n"
+                "INT_CMD_ERR  \t%8u\n" "INT_WAKE_RX  \t%8u\n"
+                "INT_SS_ERROR \t%8u\n" "INT_S0IX_MISS\t%8u\n"
+                "INT_NO_ACKC6 \t%8u\n" "INT_INVALID  \t%8u\n",
+                pmu_irq_stats[INT_SPURIOUS], pmu_irq_stats[INT_CMD_DONE],
+                pmu_irq_stats[INT_CMD_ERR], pmu_irq_stats[INT_WAKE_RX],
+                pmu_irq_stats[INT_SS_ERROR], pmu_irq_stats[INT_S0IX_MISS],
+                pmu_irq_stats[INT_NO_ACKC6], pmu_irq_stats[INT_INVALID]);
+        seq_printf(s, "mrst_pmu_wait_ready_calls          %8d\n",
+                        pmu_wait_ready_calls);
+        seq_printf(s, "mrst_pmu_wait_ready_udelays        %8d\n",
+                        pmu_wait_ready_udelays);
+        seq_printf(s, "mrst_pmu_wait_ready_udelays_max    %8d\n",
+                        pmu_wait_ready_udelays_max);
+        seq_printf(s, "mrst_pmu_wait_done_calls           %8d\n",
+                        pmu_wait_done_calls);
+        seq_printf(s, "mrst_pmu_wait_done_udelays         %8d\n",
+                        pmu_wait_done_udelays);
+        seq_printf(s, "mrst_pmu_wait_done_udelays_max     %8d\n",
+                        pmu_wait_done_udelays_max);
+        seq_printf(s, "mrst_pmu_set_power_state_entry     %8d\n",
+                        pmu_set_power_state_entry);
+        seq_printf(s, "mrst_pmu_set_power_state_send_cmd  %8d\n",
+                        pmu_set_power_state_send_cmd);
+        seq_printf(s, "SCU busy: %d\n", pmu_read_busy_status());
+        return 0;
+}
+static int debug_mrst_pmu_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, debug_mrst_pmu_show, NULL);
+}
+static const struct file_operations devices_state_operations = {
+        .open           = debug_mrst_pmu_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+#endif  /* DEBUG_FS */
+/*
+ * Validate SCU PCI shim PCI vendor capability byte
+ * against LSS hard-coded in mrst_devs[] above.
+ * DEBUG only.
+ */
+static void pmu_scu_firmware_debug(void)
+{
+        struct pci_dev *pdev = NULL;
+        for_each_pci_dev(pdev) {
+                struct mrst_device *mrst_dev;
+                u8 pci_config_lss;
+                int pos;
+                mrst_dev = pci_id_2_mrst_dev(pdev->device);
+                if (unlikely(!mrst_dev)) {
+                        printk(KERN_ERR FW_BUG "pmu: Unknown "
+                                "PCI device 0x%04X\n", pdev->device);
+                        continue;
+                }
+                if (mrst_dev->lss == 0)
+                        continue;        /* no LSS in our table */
+                pos = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
+                if (!pos != 0) {
+                        printk(KERN_ERR FW_BUG "pmu: 0x%04X "
+                                "missing PCI Vendor Capability\n",
+                                pdev->device);
+                        continue;
+                }
+                pci_read_config_byte(pdev, pos + 4, &pci_config_lss);
+                if (!(pci_config_lss & PCI_VENDOR_CAP_LOG_SS_MASK)) {
+                        printk(KERN_ERR FW_BUG "pmu: 0x%04X "
+                                "invalid PCI Vendor Capability 0x%x "
+                                " expected LSS 0x%X\n",
+                                pdev->device, pci_config_lss, mrst_dev->lss);
+                        continue;
+                }
+                pci_config_lss &= PCI_VENDOR_CAP_LOG_ID_MASK;
+                if (mrst_dev->lss == pci_config_lss)
+                        continue;
+                printk(KERN_ERR FW_BUG "pmu: 0x%04X LSS = %d, expected %d\n",
+                        pdev->device, pci_config_lss, mrst_dev->lss);
+        }
+}
+/**
+ * pmu_probe
+ */
+static int __devinit pmu_probe(struct pci_dev *pdev,
+                                   const struct pci_device_id *pci_id)
+{
+        int ret;
+        struct mrst_pmu_reg *pmu;
+        /* Init the device */
+        ret = pci_enable_device(pdev);
+        if (ret) {
+                dev_err(&pdev->dev, "Unable to Enable PCI device\n");
+                return ret;
+        }
+        ret = pci_request_regions(pdev, MRST_PMU_DRV_NAME);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "Cannot obtain PCI resources, aborting\n");
+                goto out_err1;
+        }
+        /* Map the memory of PMU reg base */
+        pmu = pci_iomap(pdev, 0, 0);
+        if (!pmu) {
+                dev_err(&pdev->dev, "Unable to map the PMU address space\n");
+                ret = -ENOMEM;
+                goto out_err2;
+        }
+#ifdef CONFIG_DEBUG_FS
+        /* /sys/kernel/debug/mrst_pmu */
+        (void) debugfs_create_file("mrst_pmu", S_IFREG | S_IRUGO,
+                                NULL, NULL, &devices_state_operations);
+#endif
+        pmu_reg = pmu;  /* success */
+        if (request_irq(pdev->irq, pmu_irq, 0, MRST_PMU_DRV_NAME, NULL)) {
+                dev_err(&pdev->dev, "Registering isr has failed\n");
+                ret = -1;
+                goto out_err3;
+        }
+        pmu_scu_firmware_debug();
+        pmu_write_wkc(S0I3_WAKE_SOURCES);       /* Enable S0i3 wakeup sources */
+        pmu_wait_ready();
+        pmu_write_ssc(D0I1_ACG_SSS_TARGET);     /* Enable Auto-Clock_Gating */
+        pmu_write_cmd(0x201);
+        spin_lock_init(&mrst_pmu_power_state_lock);
+        /* Enable the hardware interrupt */
+        pmu_irq_enable();
+        return 0;
+out_err3:
+        free_irq(pdev->irq, NULL);
+        pci_iounmap(pdev, pmu_reg);
+        pmu_reg = NULL;
+out_err2:
+        pci_release_region(pdev, 0);
+out_err1:
+        pci_disable_device(pdev);
+        return ret;
+}
+static void __devexit pmu_remove(struct pci_dev *pdev)
+{
+        dev_err(&pdev->dev, "Mid PM pmu_remove called\n");
+        /* Freeing up the irq */
+        free_irq(pdev->irq, NULL);
+        pci_iounmap(pdev, pmu_reg);
+        pmu_reg = NULL;
+        /* disable the current PCI device */
+        pci_release_region(pdev, 0);
+        pci_disable_device(pdev);
+}
+static DEFINE_PCI_DEVICE_TABLE(pmu_pci_ids) = {
+        { PCI_VDEVICE(INTEL, PCI_DEV_ID_MRST_PMU), 0 },
+        { }
+};
+MODULE_DEVICE_TABLE(pci, pmu_pci_ids);
+static struct pci_driver driver = {
+        .name = MRST_PMU_DRV_NAME,
+        .id_table = pmu_pci_ids,
+        .probe = pmu_probe,
+        .remove = __devexit_p(pmu_remove),
+};
+/**
+ * pmu_pci_register - register the PMU driver as PCI device
+ */
+static int __init pmu_pci_register(void)
+{
+        return pci_register_driver(&driver);
+}
+/* Register and probe via fs_initcall() to preceed device_initcall() */
+fs_initcall(pmu_pci_register);
+static void __exit mid_pci_cleanup(void)
+{
+        pci_unregister_driver(&driver);
+}
+static int ia_major;
+static int ia_minor;
+static int pmu_sfi_parse_oem(struct sfi_table_header *table)
+{
+        struct sfi_table_simple *sb;
+        sb = (struct sfi_table_simple *)table;
+        ia_major = (sb->pentry[1] >> 0) & 0xFFFF;
+        ia_minor = (sb->pentry[1] >> 16) & 0xFFFF;
+        printk(KERN_INFO "mrst_pmu: IA FW version v%x.%x\n",
+                ia_major, ia_minor);
+        return 0;
+}
+static int __init scu_fw_check(void)
+{
+        int ret;
+        u32 fw_version;
+        if (!pmu_reg)
+                return 0;       /* this driver didn't probe-out */
+        sfi_table_parse("OEMB", NULL, NULL, pmu_sfi_parse_oem);
+        if (ia_major < 0x6005 || ia_minor < 0x1525) {
+                WARN(1, "mrst_pmu: IA FW version too old\n");
+                return -1;
+        }
+        ret = intel_scu_ipc_command(IPCMSG_FW_REVISION, 0, NULL, 0,
+                                        &fw_version, 1);
+        if (ret) {
+                WARN(1, "mrst_pmu: IPC FW version? %d\n", ret);
+        } else {
+                int scu_major = (fw_version >> 8) & 0xFF;
+                int scu_minor = (fw_version >> 0) & 0xFF;
+                printk(KERN_INFO "mrst_pmu: firmware v%x\n", fw_version);
+                if ((scu_major >= 0xC0) && (scu_minor >= 0x49)) {
+                        printk(KERN_INFO "mrst_pmu: enabling S0i3\n");
+                        mrst_pmu_s0i3_enable = true;
+                } else {
+                        WARN(1, "mrst_pmu: S0i3 disabled, old firmware %X.%X",
+                                        scu_major, scu_minor);
+                }
+        }
+        return 0;
+}
+late_initcall(scu_fw_check);
+module_exit(mid_pci_cleanup);
diff --git a/arch/x86/platform/mrst/pmu.h b/arch/x86/platform/mrst/pmu.h
new file mode 100644
index 000000000000..bfbfe64b167b
--- /dev/null
+++ b/arch/x86/platform/mrst/pmu.h
@@ -0,0 +1,234 @@
+/*
+ * mrst/pmu.h - private definitions for MRST Power Management Unit mrst/pmu.c
+ *
+ * Copyright (c) 2011, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#ifndef _MRST_PMU_H_
+#define _MRST_PMU_H_
+#define PCI_DEV_ID_MRST_PMU             0x0810
+#define MRST_PMU_DRV_NAME               "mrst_pmu"
+#define PCI_SUB_CLASS_MASK              0xFF00
+#define PCI_VENDOR_CAP_LOG_ID_MASK      0x7F
+#define PCI_VENDOR_CAP_LOG_SS_MASK      0x80
+#define SUB_SYS_ALL_D0I1        0x01155555
+#define S0I3_WAKE_SOURCES       0x00001FFF
+#define PM_S0I3_COMMAND                                 \
+        ((0 << 31) |    /* Reserved */                  \
+        (0 << 30) |     /* Core must be idle */         \
+        (0xc2 << 22) |  /* ACK C6 trigger */            \
+        (3 << 19) |     /* Trigger on DMI message */    \
+        (3 << 16) |     /* Enter S0i3 */                \
+        (0 << 13) |     /* Numeric mode ID (sw) */      \
+        (3 << 9) |      /* Trigger mode */              \
+        (0 << 8) |      /* Do not interrupt */          \
+        (1 << 0))       /* Set configuration */
+#define LSS_DMI         0
+#define LSS_SD_HC0      1
+#define LSS_SD_HC1      2
+#define LSS_NAND        3
+#define LSS_IMAGING     4
+#define LSS_SECURITY    5
+#define LSS_DISPLAY     6
+#define LSS_USB_HC      7
+#define LSS_USB_OTG     8
+#define LSS_AUDIO       9
+#define LSS_AUDIO_LPE   9
+#define LSS_AUDIO_SSP   9
+#define LSS_I2C0        10
+#define LSS_I2C1        10
+#define LSS_I2C2        10
+#define LSS_KBD         10
+#define LSS_SPI0        10
+#define LSS_SPI1        10
+#define LSS_SPI2        10
+#define LSS_GPIO        10
+#define LSS_SRAM        11      /* used by SCU, do not touch */
+#define LSS_SD_HC2      12
+/* LSS hardware bits 15,14,13 are hardwired to 0, thus unusable */
+#define MRST_NUM_LSS    13
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#define SSMSK(mask, lss) ((mask) << ((lss) * 2))
+#define D0      0
+#define D0i1    1
+#define D0i2    2
+#define D0i3    3
+#define S0I3_SSS_TARGET (               \
+        SSMSK(D0i1, LSS_DMI) |          \
+        SSMSK(D0i3, LSS_SD_HC0) |       \
+        SSMSK(D0i3, LSS_SD_HC1) |       \
+        SSMSK(D0i3, LSS_NAND) |         \
+        SSMSK(D0i3, LSS_SD_HC2) |       \
+        SSMSK(D0i3, LSS_IMAGING) |      \
+        SSMSK(D0i3, LSS_SECURITY) |     \
+        SSMSK(D0i3, LSS_DISPLAY) |      \
+        SSMSK(D0i3, LSS_USB_HC) |       \
+        SSMSK(D0i3, LSS_USB_OTG) |      \
+        SSMSK(D0i3, LSS_AUDIO) |        \
+        SSMSK(D0i1, LSS_I2C0))
+/*
+ * D0i1 on Langwell is Autonomous Clock Gating (ACG).
+ * Enable ACG on every LSS except camera and audio
+ */
+#define D0I1_ACG_SSS_TARGET      \
+        (SUB_SYS_ALL_D0I1 & ~SSMSK(D0i1, LSS_IMAGING) & ~SSMSK(D0i1, LSS_AUDIO))
+enum cm_mode {
+        CM_NOP,                 /* ignore the config mode value */
+        CM_IMMEDIATE,
+        CM_DELAY,
+        CM_TRIGGER,
+        CM_INVALID
+};
+enum sys_state {
+        SYS_STATE_S0I0,
+        SYS_STATE_S0I1,
+        SYS_STATE_S0I2,
+        SYS_STATE_S0I3,
+        SYS_STATE_S3,
+        SYS_STATE_S5
+};
+#define SET_CFG_CMD     1
+enum int_status {
+        INT_SPURIOUS = 0,
+        INT_CMD_DONE = 1,
+        INT_CMD_ERR = 2,
+        INT_WAKE_RX = 3,
+        INT_SS_ERROR = 4,
+        INT_S0IX_MISS = 5,
+        INT_NO_ACKC6 = 6,
+        INT_INVALID = 7,
+};
+/* PMU register interface */
+static struct mrst_pmu_reg {
+        u32 pm_sts;             /* 0x00 */
+        u32 pm_cmd;             /* 0x04 */
+        u32 pm_ics;             /* 0x08 */
+        u32 _resv1;             /* 0x0C */
+        u32 pm_wkc[2];          /* 0x10 */
+        u32 pm_wks[2];          /* 0x18 */
+        u32 pm_ssc[4];          /* 0x20 */
+        u32 pm_sss[4];          /* 0x30 */
+        u32 pm_wssc[4];         /* 0x40 */
+        u32 pm_c3c4;            /* 0x50 */
+        u32 pm_c5c6;            /* 0x54 */
+        u32 pm_msi_disable;     /* 0x58 */
+} *pmu_reg;
+static inline u32 pmu_read_sts(void) { return readl(&pmu_reg->pm_sts); }
+static inline u32 pmu_read_ics(void) { return readl(&pmu_reg->pm_ics); }
+static inline u32 pmu_read_wks(void) { return readl(&pmu_reg->pm_wks[0]); }
+static inline u32 pmu_read_sss(void) { return readl(&pmu_reg->pm_sss[0]); }
+static inline void pmu_write_cmd(u32 arg) { writel(arg, &pmu_reg->pm_cmd); }
+static inline void pmu_write_ics(u32 arg) { writel(arg, &pmu_reg->pm_ics); }
+static inline void pmu_write_wkc(u32 arg) { writel(arg, &pmu_reg->pm_wkc[0]); }
+static inline void pmu_write_ssc(u32 arg) { writel(arg, &pmu_reg->pm_ssc[0]); }
+static inline void pmu_write_wssc(u32 arg)
+                                        { writel(arg, &pmu_reg->pm_wssc[0]); }
+static inline void pmu_msi_enable(void) { writel(0, &pmu_reg->pm_msi_disable); }
+static inline u32 pmu_msi_is_disabled(void)
+                                { return readl(&pmu_reg->pm_msi_disable); }
+union pmu_pm_ics {
+        struct {
+                u32 cause:8;
+                u32 enable:1;
+                u32 pending:1;
+                u32 reserved:22;
+        } bits;
+        u32 value;
+};
+static inline void pmu_irq_enable(void)
+{
+        union pmu_pm_ics pmu_ics;
+        pmu_ics.value = pmu_read_ics();
+        pmu_ics.bits.enable = 1;
+        pmu_write_ics(pmu_ics.value);
+}
+union pmu_pm_status {
+        struct {
+                u32 pmu_rev:8;
+                u32 pmu_busy:1;
+                u32 mode_id:4;
+                u32 Reserved:19;
+        } pmu_status_parts;
+        u32 pmu_status_value;
+};
+static inline int pmu_read_busy_status(void)
+{
+        union pmu_pm_status result;
+        result.pmu_status_value = pmu_read_sts();
+        return result.pmu_status_parts.pmu_busy;
+}
+/* pmu set config parameters */
+struct cfg_delay_param_t {
+        u32 cmd:8;
+        u32 ioc:1;
+        u32 cfg_mode:4;
+        u32 mode_id:3;
+        u32 sys_state:3;
+        u32 cfg_delay:8;
+        u32 rsvd:5;
+};
+struct cfg_trig_param_t {
+        u32 cmd:8;
+        u32 ioc:1;
+        u32 cfg_mode:4;
+        u32 mode_id:3;
+        u32 sys_state:3;
+        u32 cfg_trig_type:3;
+        u32 cfg_trig_val:8;
+        u32 cmbi:1;
+        u32 rsvd1:1;
+};
+union pmu_pm_set_cfg_cmd_t {
+        union {
+                struct cfg_delay_param_t d_param;
+                struct cfg_trig_param_t t_param;
+        } pmu2_params;
+        u32 pmu_pm_set_cfg_cmd_value;
+};
+#ifdef FUTURE_PATCH
+extern int mrst_s0i3_entry(u32 regval, u32 *regaddr);
+#else
+static inline int mrst_s0i3_entry(u32 regval, u32 *regaddr) { return -1; }
+#endif
+#endif
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 02ffd9e48c9f..df118a825f39 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -9,6 +9,7 @@
 #include <linux/mm.h>
 #include <linux/pm.h>
 #include <linux/memblock.h>
+#include <linux/cpuidle.h>
 #include <asm/elf.h>
 #include <asm/vdso.h>
@@ -424,7 +425,7 @@ void __init xen_arch_setup(void)
 #ifdef CONFIG_X86_32
        boot_cpu_data.hlt_works_ok = 1;
 #endif
-        pm_idle = default_idle;
+        disable_cpuidle();
        boot_option_idle_override = IDLE_HALT;
        fiddle_vdso();