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-rw-r--r--arch/s390/include/asm/clp.h28
-rw-r--r--arch/s390/include/asm/pci.h7
-rw-r--r--arch/s390/include/asm/pci_clp.h182
3 files changed, 217 insertions, 0 deletions
diff --git a/arch/s390/include/asm/clp.h b/arch/s390/include/asm/clp.h
new file mode 100644
index 000000000000..6c3aecc245ff
--- /dev/null
+++ b/arch/s390/include/asm/clp.h
@@ -0,0 +1,28 @@
1#ifndef _ASM_S390_CLP_H
2#define _ASM_S390_CLP_H
3
4/* CLP common request & response block size */
5#define CLP_BLK_SIZE (PAGE_SIZE * 2)
6
7struct clp_req_hdr {
8 u16 len;
9 u16 cmd;
10} __packed;
11
12struct clp_rsp_hdr {
13 u16 len;
14 u16 rsp;
15} __packed;
16
17/* CLP Response Codes */
18#define CLP_RC_OK 0x0010 /* Command request successfully */
19#define CLP_RC_CMD 0x0020 /* Command code not recognized */
20#define CLP_RC_PERM 0x0030 /* Command not authorized */
21#define CLP_RC_FMT 0x0040 /* Invalid command request format */
22#define CLP_RC_LEN 0x0050 /* Invalid command request length */
23#define CLP_RC_8K 0x0060 /* Command requires 8K LPCB */
24#define CLP_RC_RESNOT0 0x0070 /* Reserved field not zero */
25#define CLP_RC_NODATA 0x0080 /* No data available */
26#define CLP_RC_FC_UNKNOWN 0x0100 /* Function code not recognized */
27
28#endif
diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
index ff7b3596f47c..6f98a54950ea 100644
--- a/arch/s390/include/asm/pci.h
+++ b/arch/s390/include/asm/pci.h
@@ -8,6 +8,7 @@
8 8
9#include <asm-generic/pci.h> 9#include <asm-generic/pci.h>
10#include <asm-generic/pci-dma-compat.h> 10#include <asm-generic/pci-dma-compat.h>
11#include <asm/pci_clp.h>
11 12
12#define PCIBIOS_MIN_IO 0x1000 13#define PCIBIOS_MIN_IO 0x1000
13#define PCIBIOS_MIN_MEM 0x10000000 14#define PCIBIOS_MIN_MEM 0x10000000
@@ -76,6 +77,12 @@ void zpci_stop_device(struct zpci_dev *);
76void zpci_free_device(struct zpci_dev *); 77void zpci_free_device(struct zpci_dev *);
77int zpci_scan_device(struct zpci_dev *); 78int zpci_scan_device(struct zpci_dev *);
78 79
80/* CLP */
81int clp_find_pci_devices(void);
82int clp_add_pci_device(u32, u32, int);
83int clp_enable_fh(struct zpci_dev *, u8);
84int clp_disable_fh(struct zpci_dev *);
85
79/* Helpers */ 86/* Helpers */
80struct zpci_dev *get_zdev(struct pci_dev *); 87struct zpci_dev *get_zdev(struct pci_dev *);
81struct zpci_dev *get_zdev_by_fid(u32); 88struct zpci_dev *get_zdev_by_fid(u32);
diff --git a/arch/s390/include/asm/pci_clp.h b/arch/s390/include/asm/pci_clp.h
new file mode 100644
index 000000000000..d31d739f8689
--- /dev/null
+++ b/arch/s390/include/asm/pci_clp.h
@@ -0,0 +1,182 @@
1#ifndef _ASM_S390_PCI_CLP_H
2#define _ASM_S390_PCI_CLP_H
3
4#include <asm/clp.h>
5
6/*
7 * Call Logical Processor - Command Codes
8 */
9#define CLP_LIST_PCI 0x0002
10#define CLP_QUERY_PCI_FN 0x0003
11#define CLP_QUERY_PCI_FNGRP 0x0004
12#define CLP_SET_PCI_FN 0x0005
13
14/* PCI function handle list entry */
15struct clp_fh_list_entry {
16 u16 device_id;
17 u16 vendor_id;
18 u32 config_state : 1;
19 u32 : 31;
20 u32 fid; /* PCI function id */
21 u32 fh; /* PCI function handle */
22} __packed;
23
24#define CLP_RC_SETPCIFN_FH 0x0101 /* Invalid PCI fn handle */
25#define CLP_RC_SETPCIFN_FHOP 0x0102 /* Fn handle not valid for op */
26#define CLP_RC_SETPCIFN_DMAAS 0x0103 /* Invalid DMA addr space */
27#define CLP_RC_SETPCIFN_RES 0x0104 /* Insufficient resources */
28#define CLP_RC_SETPCIFN_ALRDY 0x0105 /* Fn already in requested state */
29#define CLP_RC_SETPCIFN_ERR 0x0106 /* Fn in permanent error state */
30#define CLP_RC_SETPCIFN_RECPND 0x0107 /* Error recovery pending */
31#define CLP_RC_SETPCIFN_BUSY 0x0108 /* Fn busy */
32#define CLP_RC_LISTPCI_BADRT 0x010a /* Resume token not recognized */
33#define CLP_RC_QUERYPCIFG_PFGID 0x010b /* Unrecognized PFGID */
34
35/* request or response block header length */
36#define LIST_PCI_HDR_LEN 32
37
38/* Number of function handles fitting in response block */
39#define CLP_FH_LIST_NR_ENTRIES \
40 ((CLP_BLK_SIZE - 2 * LIST_PCI_HDR_LEN) \
41 / sizeof(struct clp_fh_list_entry))
42
43#define CLP_SET_ENABLE_PCI_FN 0 /* Yes, 0 enables it */
44#define CLP_SET_DISABLE_PCI_FN 1 /* Yes, 1 disables it */
45
46#define CLP_UTIL_STR_LEN 64
47
48/* List PCI functions request */
49struct clp_req_list_pci {
50 struct clp_req_hdr hdr;
51 u32 fmt : 4; /* cmd request block format */
52 u32 : 28;
53 u64 reserved1;
54 u64 resume_token;
55 u64 reserved2;
56} __packed;
57
58/* List PCI functions response */
59struct clp_rsp_list_pci {
60 struct clp_rsp_hdr hdr;
61 u32 fmt : 4; /* cmd request block format */
62 u32 : 28;
63 u64 reserved1;
64 u64 resume_token;
65 u32 reserved2;
66 u16 max_fn;
67 u8 reserved3;
68 u8 entry_size;
69 struct clp_fh_list_entry fh_list[CLP_FH_LIST_NR_ENTRIES];
70} __packed;
71
72/* Query PCI function request */
73struct clp_req_query_pci {
74 struct clp_req_hdr hdr;
75 u32 fmt : 4; /* cmd request block format */
76 u32 : 28;
77 u64 reserved1;
78 u32 fh; /* function handle */
79 u32 reserved2;
80 u64 reserved3;
81} __packed;
82
83/* Query PCI function response */
84struct clp_rsp_query_pci {
85 struct clp_rsp_hdr hdr;
86 u32 fmt : 4; /* cmd request block format */
87 u32 : 28;
88 u64 reserved1;
89 u16 vfn; /* virtual fn number */
90 u16 : 7;
91 u16 util_str_avail : 1; /* utility string available? */
92 u16 pfgid : 8; /* pci function group id */
93 u32 fid; /* pci function id */
94 u8 bar_size[PCI_BAR_COUNT];
95 u16 pchid;
96 u32 bar[PCI_BAR_COUNT];
97 u64 reserved2;
98 u64 sdma; /* start dma as */
99 u64 edma; /* end dma as */
100 u64 reserved3[6];
101 u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */
102} __packed;
103
104/* Query PCI function group request */
105struct clp_req_query_pci_grp {
106 struct clp_req_hdr hdr;
107 u32 fmt : 4; /* cmd request block format */
108 u32 : 28;
109 u64 reserved1;
110 u32 : 24;
111 u32 pfgid : 8; /* function group id */
112 u32 reserved2;
113 u64 reserved3;
114} __packed;
115
116/* Query PCI function group response */
117struct clp_rsp_query_pci_grp {
118 struct clp_rsp_hdr hdr;
119 u32 fmt : 4; /* cmd request block format */
120 u32 : 28;
121 u64 reserved1;
122 u16 : 4;
123 u16 noi : 12; /* number of interrupts */
124 u8 version;
125 u8 : 6;
126 u8 frame : 1;
127 u8 refresh : 1; /* TLB refresh mode */
128 u16 reserved2;
129 u16 mui;
130 u64 reserved3;
131 u64 dasm; /* dma address space mask */
132 u64 msia; /* MSI address */
133 u64 reserved4;
134 u64 reserved5;
135} __packed;
136
137/* Set PCI function request */
138struct clp_req_set_pci {
139 struct clp_req_hdr hdr;
140 u32 fmt : 4; /* cmd request block format */
141 u32 : 28;
142 u64 reserved1;
143 u32 fh; /* function handle */
144 u16 reserved2;
145 u8 oc; /* operation controls */
146 u8 ndas; /* number of dma spaces */
147 u64 reserved3;
148} __packed;
149
150/* Set PCI function response */
151struct clp_rsp_set_pci {
152 struct clp_rsp_hdr hdr;
153 u32 fmt : 4; /* cmd request block format */
154 u32 : 28;
155 u64 reserved1;
156 u32 fh; /* function handle */
157 u32 reserved3;
158 u64 reserved4;
159} __packed;
160
161/* Combined request/response block structures used by clp insn */
162struct clp_req_rsp_list_pci {
163 struct clp_req_list_pci request;
164 struct clp_rsp_list_pci response;
165} __packed;
166
167struct clp_req_rsp_set_pci {
168 struct clp_req_set_pci request;
169 struct clp_rsp_set_pci response;
170} __packed;
171
172struct clp_req_rsp_query_pci {
173 struct clp_req_query_pci request;
174 struct clp_rsp_query_pci response;
175} __packed;
176
177struct clp_req_rsp_query_pci_grp {
178 struct clp_req_query_pci_grp request;
179 struct clp_rsp_query_pci_grp response;
180} __packed;
181
182#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 13:42:48 -0500