1 files changed, 316 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/p2020ds.dtsi b/arch/powerpc/boot/dts/p2020ds.dtsi
new file mode 100644
index 000000000000..c1cf6cef4dd6
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020ds.dtsi
@@ -0,0 +1,316 @@
+/*
+ * P2020DS Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+&board_lbc {
+        nor@0,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "cfi-flash";
+                reg = <0x0 0x0 0x8000000>;
+                bank-width = <2>;
+                device-width = <1>;
+                ramdisk@0 {
+                        reg = <0x0 0x03000000>;
+                        read-only;
+                };
+                diagnostic@3000000 {
+                        reg = <0x03000000 0x00e00000>;
+                        read-only;
+                };
+                dink@3e00000 {
+                        reg = <0x03e00000 0x00200000>;
+                        read-only;
+                };
+                kernel@4000000 {
+                        reg = <0x04000000 0x00400000>;
+                        read-only;
+                };
+                jffs2@4400000 {
+                        reg = <0x04400000 0x03b00000>;
+                };
+                dtb@7f00000 {
+                        reg = <0x07f00000 0x00080000>;
+                        read-only;
+                };
+                u-boot@7f80000 {
+                        reg = <0x07f80000 0x00080000>;
+                        read-only;
+                };
+        };
+        nand@2,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,elbc-fcm-nand";
+                reg = <0x2 0x0 0x40000>;
+                u-boot@0 {
+                        reg = <0x0 0x02000000>;
+                        read-only;
+                };
+                jffs2@2000000 {
+                        reg = <0x02000000 0x10000000>;
+                };
+                ramdisk@12000000 {
+                        reg = <0x12000000 0x08000000>;
+                        read-only;
+                };
+                kernel@1a000000 {
+                        reg = <0x1a000000 0x04000000>;
+                };
+                dtb@1e000000 {
+                        reg = <0x1e000000 0x01000000>;
+                        read-only;
+                };
+                empty@1f000000 {
+                        reg = <0x1f000000 0x21000000>;
+                };
+        };
+        board-control@3,0 {
+                compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis";
+                reg = <0x3 0x0 0x30>;
+        };
+        nand@4,0 {
+                compatible = "fsl,elbc-fcm-nand";
+                reg = <0x4 0x0 0x40000>;
+        };
+        nand@5,0 {
+                compatible = "fsl,elbc-fcm-nand";
+                reg = <0x5 0x0 0x40000>;
+        };
+        nand@6,0 {
+                compatible = "fsl,elbc-fcm-nand";
+                reg = <0x6 0x0 0x40000>;
+        };
+};
+&board_soc {
+        usb@22000 {
+                phy_type = "ulpi";
+        };
+        mdio@24520 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <3 1 0 0>;
+                        reg = <0x0>;
+                };
+                phy1: ethernet-phy@1 {
+                        interrupts = <3 1 0 0>;
+                        reg = <0x1>;
+                };
+                phy2: ethernet-phy@2 {
+                        interrupts = <3 1 0 0>;
+                        reg = <0x2>;
+                };
+                tbi0: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+        mdio@25520 {
+                tbi1: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+        mdio@26520 {
+                tbi2: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+        ptp_clock@24e00 {
+                fsl,tclk-period = <5>;
+                fsl,tmr-prsc = <200>;
+                fsl,tmr-add = <0xCCCCCCCD>;
+                fsl,tmr-fiper1 = <0x3B9AC9FB>;
+                fsl,tmr-fiper2 = <0x0001869B>;
+                fsl,max-adj = <249999999>;
+        };
+        enet0: ethernet@24000 {
+                tbi-handle = <&tbi0>;
+                phy-handle = <&phy0>;
+                phy-connection-type = "rgmii-id";
+        };
+        enet1: ethernet@25000 {
+                tbi-handle = <&tbi1>;
+                phy-handle = <&phy1>;
+                phy-connection-type = "rgmii-id";
+        };
+        enet2: ethernet@26000 {
+                tbi-handle = <&tbi2>;
+                phy-handle = <&phy2>;
+                phy-connection-type = "rgmii-id";
+        };
+};
+&board_pci1 {
+        pcie@0 {
+                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+                interrupt-map = <
+                        // IDSEL 0x11 func 0 - PCI slot 1
+                        0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
+                        // IDSEL 0x11 func 1 - PCI slot 1
+                        0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
+                        // IDSEL 0x11 func 2 - PCI slot 1
+                        0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
+                        // IDSEL 0x11 func 3 - PCI slot 1
+                        0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
+                        // IDSEL 0x11 func 4 - PCI slot 1
+                        0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2
+                        // IDSEL 0x11 func 5 - PCI slot 1
+                        0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2
+                        // IDSEL 0x11 func 6 - PCI slot 1
+                        0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2
+                        // IDSEL 0x11 func 7 - PCI slot 1
+                        0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2
+                        // IDSEL 0x1d  Audio
+                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
+                        // IDSEL 0x1e Legacy
+                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
+                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
+                        // IDSEL 0x1f IDE/SATA
+                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
+                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
+                        >;
+                uli1575@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        ranges = <0x2000000 0x0 0xa0000000
+                                  0x2000000 0x0 0xa0000000
+                                  0x0 0x20000000
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x10000>;
+                        isa@1e {
+                                device_type = "isa";
+                                #interrupt-cells = <2>;
+                                #size-cells = <1>;
+                                #address-cells = <2>;
+                                reg = <0xf000 0x0 0x0 0x0 0x0>;
+                                ranges = <0x1 0x0 0x1000000 0x0 0x0
+                                          0x1000>;
+                                interrupt-parent = <&i8259>;
+                                i8259: interrupt-controller@20 {
+                                        reg = <0x1 0x20 0x2
+                                               0x1 0xa0 0x2
+                                               0x1 0x4d0 0x2>;
+                                        interrupt-controller;
+                                        device_type = "interrupt-controller";
+                                        #address-cells = <0>;
+                                        #interrupt-cells = <2>;
+                                        compatible = "chrp,iic";
+                                        interrupts = <4 1 0 0>;
+                                        interrupt-parent = <&mpic>;
+                                };
+                                i8042@60 {
+                                        #size-cells = <0>;
+                                        #address-cells = <1>;
+                                        reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
+                                        interrupts = <1 3 12 3>;
+                                        interrupt-parent =
+                                                <&i8259>;
+                                        keyboard@0 {
+                                                reg = <0x0>;
+                                                compatible = "pnpPNP,303";
+                                        };
+                                        mouse@1 {
+                                                reg = <0x1>;
+                                                compatible = "pnpPNP,f03";
+                                        };
+                                };
+                                rtc@70 {
+                                        compatible = "pnpPNP,b00";
+                                        reg = <0x1 0x70 0x2>;
+                                };
+                                gpio@400 {
+                                        reg = <0x1 0x400 0x80>;
+                                };
+                        };
+                };
+        };
+};

diff --git a/arch/powerpc/boot/dts/p2020ds.dtsi b/arch/powerpc/boot/dts/p2020ds.dtsi new file mode 100644 index 000000000000..c1cf6cef4dd6 --- /dev/null +++ b/arch/powerpc/boot/dts/p2020ds.dtsi
@@ -0,0 +1,316 @@
	1	/*
	2	* P2020DS Device Tree Source stub (no addresses or top-level ranges)
	3	*
	4	* Copyright 2011 Freescale Semiconductor Inc.
	5	*
	6	* Redistribution and use in source and binary forms, with or without
	7	* modification, are permitted provided that the following conditions are met:
	8	* * Redistributions of source code must retain the above copyright
	9	* notice, this list of conditions and the following disclaimer.
	10	* * Redistributions in binary form must reproduce the above copyright
	11	* notice, this list of conditions and the following disclaimer in the
	12	* documentation and/or other materials provided with the distribution.
	13	* * Neither the name of Freescale Semiconductor nor the
	14	* names of its contributors may be used to endorse or promote products
	15	* derived from this software without specific prior written permission.
	16	*
	17	*
	18	* ALTERNATIVELY, this software may be distributed under the terms of the
	19	* GNU General Public License ("GPL") as published by the Free Software
	20	* Foundation, either version 2 of that License or (at your option) any
	21	* later version.
	22	*
	23	* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
	24	* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
	25	* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	26	* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
	27	* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
	28	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
	29	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
	30	* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	31	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
	32	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	33	*/
	34
	35	&board_lbc {
	36	nor@0,0 {
	37	#address-cells = <1>;
	38	#size-cells = <1>;
	39	compatible = "cfi-flash";
	40	reg = <0x0 0x0 0x8000000>;
	41	bank-width = <2>;
	42	device-width = <1>;
	43
	44	ramdisk@0 {
	45	reg = <0x0 0x03000000>;
	46	read-only;
	47	};
	48
	49	diagnostic@3000000 {
	50	reg = <0x03000000 0x00e00000>;
	51	read-only;
	52	};
	53
	54	dink@3e00000 {
	55	reg = <0x03e00000 0x00200000>;
	56	read-only;
	57	};
	58
	59	kernel@4000000 {
	60	reg = <0x04000000 0x00400000>;
	61	read-only;
	62	};
	63
	64	jffs2@4400000 {
	65	reg = <0x04400000 0x03b00000>;
	66	};
	67
	68	dtb@7f00000 {
	69	reg = <0x07f00000 0x00080000>;
	70	read-only;
	71	};
	72
	73	u-boot@7f80000 {
	74	reg = <0x07f80000 0x00080000>;
	75	read-only;
	76	};
	77	};
	78
	79	nand@2,0 {
	80	#address-cells = <1>;
	81	#size-cells = <1>;
	82	compatible = "fsl,elbc-fcm-nand";
	83	reg = <0x2 0x0 0x40000>;
	84
	85	u-boot@0 {
	86	reg = <0x0 0x02000000>;
	87	read-only;
	88	};
	89
	90	jffs2@2000000 {
	91	reg = <0x02000000 0x10000000>;
	92	};
	93
	94	ramdisk@12000000 {
	95	reg = <0x12000000 0x08000000>;
	96	read-only;
	97	};
	98
	99	kernel@1a000000 {
	100	reg = <0x1a000000 0x04000000>;
	101	};
	102
	103	dtb@1e000000 {
	104	reg = <0x1e000000 0x01000000>;
	105	read-only;
	106	};
	107
	108	empty@1f000000 {
	109	reg = <0x1f000000 0x21000000>;
	110	};
	111	};
	112
	113	board-control@3,0 {
	114	compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis";
	115	reg = <0x3 0x0 0x30>;
	116	};
	117
	118	nand@4,0 {
	119	compatible = "fsl,elbc-fcm-nand";
	120	reg = <0x4 0x0 0x40000>;
	121	};
	122
	123	nand@5,0 {
	124	compatible = "fsl,elbc-fcm-nand";
	125	reg = <0x5 0x0 0x40000>;
	126	};
	127
	128	nand@6,0 {
	129	compatible = "fsl,elbc-fcm-nand";
	130	reg = <0x6 0x0 0x40000>;
	131	};
	132	};
	133
	134	&board_soc {
	135	usb@22000 {
	136	phy_type = "ulpi";
	137	};
	138
	139	mdio@24520 {
	140	phy0: ethernet-phy@0 {
	141	interrupts = <3 1 0 0>;
	142	reg = <0x0>;
	143	};
	144	phy1: ethernet-phy@1 {
	145	interrupts = <3 1 0 0>;
	146	reg = <0x1>;
	147	};
	148	phy2: ethernet-phy@2 {
	149	interrupts = <3 1 0 0>;
	150	reg = <0x2>;
	151	};
	152	tbi0: tbi-phy@11 {
	153	reg = <0x11>;
	154	device_type = "tbi-phy";
	155	};
	156
	157	};
	158
	159	mdio@25520 {
	160	tbi1: tbi-phy@11 {
	161	reg = <0x11>;
	162	device_type = "tbi-phy";
	163	};
	164	};
	165
	166	mdio@26520 {
	167	tbi2: tbi-phy@11 {
	168	reg = <0x11>;
	169	device_type = "tbi-phy";
	170	};
	171
	172	};
	173
	174	ptp_clock@24e00 {
	175	fsl,tclk-period = <5>;
	176	fsl,tmr-prsc = <200>;
	177	fsl,tmr-add = <0xCCCCCCCD>;
	178	fsl,tmr-fiper1 = <0x3B9AC9FB>;
	179	fsl,tmr-fiper2 = <0x0001869B>;
	180	fsl,max-adj = <249999999>;
	181	};
	182
	183	enet0: ethernet@24000 {
	184	tbi-handle = <&tbi0>;
	185	phy-handle = <&phy0>;
	186	phy-connection-type = "rgmii-id";
	187	};
	188
	189	enet1: ethernet@25000 {
	190	tbi-handle = <&tbi1>;
	191	phy-handle = <&phy1>;
	192	phy-connection-type = "rgmii-id";
	193
	194	};
	195
	196	enet2: ethernet@26000 {
	197	tbi-handle = <&tbi2>;
	198	phy-handle = <&phy2>;
	199	phy-connection-type = "rgmii-id";
	200	};
	201	};
	202
	203	&board_pci1 {
	204	pcie@0 {
	205	interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
	206	interrupt-map = <
	207
	208	// IDSEL 0x11 func 0 - PCI slot 1
	209	0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
	210	0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
	211
	212	// IDSEL 0x11 func 1 - PCI slot 1
	213	0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
	214	0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
	215
	216	// IDSEL 0x11 func 2 - PCI slot 1
	217	0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
	218	0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
	219
	220	// IDSEL 0x11 func 3 - PCI slot 1
	221	0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
	222	0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
	223
	224	// IDSEL 0x11 func 4 - PCI slot 1
	225	0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2
	226	0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2
	227
	228	// IDSEL 0x11 func 5 - PCI slot 1
	229	0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2
	230	0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2
	231
	232	// IDSEL 0x11 func 6 - PCI slot 1
	233	0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2
	234	0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2
	235
	236	// IDSEL 0x11 func 7 - PCI slot 1
	237	0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
	238	0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2
	239
	240	// IDSEL 0x1d Audio
	241	0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
	242
	243	// IDSEL 0x1e Legacy
	244	0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
	245	0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
	246
	247	// IDSEL 0x1f IDE/SATA
	248	0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
	249	0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
	250	>;
	251
	252	uli1575@0 {
	253	reg = <0x0 0x0 0x0 0x0 0x0>;
	254	#size-cells = <2>;
	255	#address-cells = <3>;
	256	ranges = <0x2000000 0x0 0xa0000000
	257	0x2000000 0x0 0xa0000000
	258	0x0 0x20000000
	259
	260	0x1000000 0x0 0x0
	261	0x1000000 0x0 0x0
	262	0x0 0x10000>;
	263	isa@1e {
	264	device_type = "isa";
	265	#interrupt-cells = <2>;
	266	#size-cells = <1>;
	267	#address-cells = <2>;
	268	reg = <0xf000 0x0 0x0 0x0 0x0>;
	269	ranges = <0x1 0x0 0x1000000 0x0 0x0
	270	0x1000>;
	271	interrupt-parent = <&i8259>;
	272
	273	i8259: interrupt-controller@20 {
	274	reg = <0x1 0x20 0x2
	275	0x1 0xa0 0x2
	276	0x1 0x4d0 0x2>;
	277	interrupt-controller;
	278	device_type = "interrupt-controller";
	279	#address-cells = <0>;
	280	#interrupt-cells = <2>;
	281	compatible = "chrp,iic";
	282	interrupts = <4 1 0 0>;
	283	interrupt-parent = <&mpic>;
	284	};
	285
	286	i8042@60 {
	287	#size-cells = <0>;
	288	#address-cells = <1>;
	289	reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
	290	interrupts = <1 3 12 3>;
	291	interrupt-parent =
	292	<&i8259>;
	293
	294	keyboard@0 {
	295	reg = <0x0>;
	296	compatible = "pnpPNP,303";
	297	};
	298
	299	mouse@1 {
	300	reg = <0x1>;
	301	compatible = "pnpPNP,f03";
	302	};
	303	};
	304
	305	rtc@70 {
	306	compatible = "pnpPNP,b00";
	307	reg = <0x1 0x70 0x2>;
	308	};
	309
	310	gpio@400 {
	311	reg = <0x1 0x400 0x80>;
	312	};
	313	};
	314	};
	315	};
	316	};