1 files changed, 51 insertions, 51 deletions
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index cd60005b2bbe..440aa4dfab0c 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -30,7 +30,7 @@
                PowerPC,8377@0 {
                        device_type = "cpu";
-                        reg = <0>;
+                        reg = <0x0>;
                        d-cache-line-size = <32>;
                        i-cache-line-size = <32>;
                        d-cache-size = <32768>;
@@ -51,22 +51,22 @@
                #size-cells = <1>;
                compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
                reg = <0xe0005000 0x1000>;
-                interrupts = <77 8>;
+                interrupts = <77 0x8>;
                interrupt-parent = <&ipic>;
                // CS0 and CS1 are swapped when
                // booting from nand, but the
                // addresses are the same.
-                ranges = <0 0 0xfe000000 0x00800000
+                ranges = <0x0 0x0 0xfe000000 0x00800000
-                          1 0 0xe0600000 0x00008000
+                          0x1 0x0 0xe0600000 0x00008000
-                          2 0 0xf0000000 0x00020000
+                          0x2 0x0 0xf0000000 0x00020000
-                          3 0 0xfa000000 0x00008000>;
+                          0x3 0x0 0xfa000000 0x00008000>;
                flash@0,0 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "cfi-flash";
-                        reg = <0 0 0x800000>;
+                        reg = <0x0 0x0 0x800000>;
                        bank-width = <2>;
                        device-width = <1>;
                };
@@ -76,7 +76,7 @@
                        #size-cells = <1>;
                        compatible = "fsl,mpc8377-fcm-nand",
                                     "fsl,elbc-fcm-nand";
-                        reg = <1 0 0x8000>;
+                        reg = <0x1 0x0 0x8000>;
                        u-boot@0 {
                                reg = <0x0 0x100000>;
@@ -97,7 +97,7 @@
                #size-cells = <1>;
                device_type = "soc";
                compatible = "simple-bus";
-                ranges = <0 0xe0000000 0x00100000>;
+                ranges = <0x0 0xe0000000 0x00100000>;
                reg = <0xe0000000 0x00000200>;
                bus-frequency = <0>;
@@ -113,8 +113,8 @@
                        cell-index = <0>;
                        compatible = "fsl-i2c";
                        reg = <0x3000 0x100>;
-                        interrupts = <14 8>;
+                        interrupts = <14 0x8>;
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
                        dfsrr;
                        rtc@68 {
                                device_type = "rtc";
@@ -129,8 +129,8 @@
                        cell-index = <1>;
                        compatible = "fsl-i2c";
                        reg = <0x3100 0x100>;
-                        interrupts = <15 8>;
+                        interrupts = <15 0x8>;
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
                        dfsrr;
                };
@@ -138,8 +138,8 @@
                        cell-index = <0>;
                        compatible = "fsl,spi";
                        reg = <0x7000 0x1000>;
-                        interrupts = <16 8>;
+                        interrupts = <16 0x8>;
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
                        mode = "cpu";
                };
@@ -149,8 +149,8 @@
                        reg = <0x23000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
-                        interrupts = <38 8>;
+                        interrupts = <38 0x8>;
                        phy_type = "utmi";
                };
@@ -160,15 +160,15 @@
                        compatible = "fsl,gianfar-mdio";
                        reg = <0x24520 0x20>;
                        phy2: ethernet-phy@2 {
-                                interrupt-parent = < &ipic >;
+                                interrupt-parent = <&ipic>;
-                                interrupts = <17 8>;
+                                interrupts = <17 0x8>;
-                                reg = <2>;
+                                reg = <0x2>;
                                device_type = "ethernet-phy";
                        };
                        phy3: ethernet-phy@3 {
-                                interrupt-parent = < &ipic >;
+                                interrupt-parent = <&ipic>;
-                                interrupts = <18 8>;
+                                interrupts = <18 0x8>;
-                                reg = <3>;
+                                reg = <0x3>;
                                device_type = "ethernet-phy";
                        };
                };
@@ -180,10 +180,10 @@
                        compatible = "gianfar";
                        reg = <0x24000 0x1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <32 8 33 8 34 8>;
+                        interrupts = <32 0x8 33 0x8 34 0x8>;
                        phy-connection-type = "mii";
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
-                        phy-handle = < &phy2 >;
+                        phy-handle = <&phy2>;
                };
                enet1: ethernet@25000 {
@@ -193,10 +193,10 @@
                        compatible = "gianfar";
                        reg = <0x25000 0x1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <35 8 36 8 37 8>;
+                        interrupts = <35 0x8 36 0x8 37 0x8>;
                        phy-connection-type = "mii";
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
-                        phy-handle = < &phy3 >;
+                        phy-handle = <&phy3>;
                };
                serial0: serial@4500 {
@@ -205,8 +205,8 @@
                        compatible = "ns16550";
                        reg = <0x4500 0x100>;
                        clock-frequency = <0>;
-                        interrupts = <9 8>;
+                        interrupts = <9 0x8>;
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
                };
                serial1: serial@4600 {
@@ -215,8 +215,8 @@
                        compatible = "ns16550";
                        reg = <0x4600 0x100>;
                        clock-frequency = <0>;
-                        interrupts = <10 8>;
+                        interrupts = <10 0x8>;
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
                };
                crypto@30000 {
@@ -224,8 +224,8 @@
                        device_type = "crypto";
                        compatible = "talitos";
                        reg = <0x30000 0x10000>;
-                        interrupts = <11 8>;
+                        interrupts = <11 0x8>;
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
                        /* Rev. 3.0 geometry */
                        num-channels = <4>;
                        channel-fifo-len = <24>;
@@ -236,15 +236,15 @@
                sata@18000 {
                        compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
                        reg = <0x18000 0x1000>;
-                        interrupts = <44 8>;
+                        interrupts = <44 0x8>;
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
                };
                sata@19000 {
                        compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
                        reg = <0x19000 0x1000>;
-                        interrupts = <45 8>;
+                        interrupts = <45 0x8>;
-                        interrupt-parent = < &ipic >;
+                        interrupt-parent = <&ipic>;
                };
                /* IPIC
@@ -268,23 +268,23 @@
                                /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
                                /* IDSEL AD14 IRQ6 inta */
-                                 0x7000 0 0 1 &ipic 22 8
+                                 0x7000 0x0 0x0 0x1 &ipic 22 0x8
                                /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
-                                 0x7800 0 0 1 &ipic 21 8
+                                 0x7800 0x0 0x0 0x1 &ipic 21 0x8
-                                 0x7800 0 0 2 &ipic 22 8
+                                 0x7800 0x0 0x0 0x2 &ipic 22 0x8
-                                 0x7800 0 0 4 &ipic 23 8
+                                 0x7800 0x0 0x0 0x4 &ipic 23 0x8
                                /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
-                                 0xE000 0 0 1 &ipic 23 8
+                                 0xE000 0x0 0x0 0x1 &ipic 23 0x8
-                                 0xE000 0 0 2 &ipic 21 8
+                                 0xE000 0x0 0x0 0x2 &ipic 21 0x8
-                                 0xE000 0 0 3 &ipic 22 8>;
+                                 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
-                interrupt-parent = < &ipic >;
+                interrupt-parent = <&ipic>;
-                interrupts = <66 8>;
+                interrupts = <66 0x8>;
                bus-range = <0 0>;
-                ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
+                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
-                          0x42000000 0 0x80000000 0x80000000 0 0x10000000
+                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
-                          0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
+                          0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
                clock-frequency = <66666666>;
                #interrupt-cells = <1>;
                #size-cells = <2>;

diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index cd60005b2bbe..440aa4dfab0c 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -30,7 +30,7 @@
30		30
31	PowerPC,8377@0 {	31	PowerPC,8377@0 {
32	device_type = "cpu";	32	device_type = "cpu";
33	reg = <0>;	33	reg = <0x0>;
34	d-cache-line-size = <32>;	34	d-cache-line-size = <32>;
35	i-cache-line-size = <32>;	35	i-cache-line-size = <32>;
36	d-cache-size = <32768>;	36	d-cache-size = <32768>;
@@ -51,22 +51,22 @@
51	#size-cells = <1>;	51	#size-cells = <1>;
52	compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";	52	compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
53	reg = <0xe0005000 0x1000>;	53	reg = <0xe0005000 0x1000>;
54	interrupts = <77 8>;	54	interrupts = <77 0x8>;
55	interrupt-parent = <&ipic>;	55	interrupt-parent = <&ipic>;
56		56
57	// CS0 and CS1 are swapped when	57	// CS0 and CS1 are swapped when
58	// booting from nand, but the	58	// booting from nand, but the
59	// addresses are the same.	59	// addresses are the same.
60	ranges = <0 0 0xfe000000 0x00800000	60	ranges = <0x0 0x0 0xfe000000 0x00800000
61	1 0 0xe0600000 0x00008000	61	0x1 0x0 0xe0600000 0x00008000
62	2 0 0xf0000000 0x00020000	62	0x2 0x0 0xf0000000 0x00020000
63	3 0 0xfa000000 0x00008000>;	63	0x3 0x0 0xfa000000 0x00008000>;
64		64
65	flash@0,0 {	65	flash@0,0 {
66	#address-cells = <1>;	66	#address-cells = <1>;
67	#size-cells = <1>;	67	#size-cells = <1>;
68	compatible = "cfi-flash";	68	compatible = "cfi-flash";
69	reg = <0 0 0x800000>;	69	reg = <0x0 0x0 0x800000>;
70	bank-width = <2>;	70	bank-width = <2>;
71	device-width = <1>;	71	device-width = <1>;
72	};	72	};
@@ -76,7 +76,7 @@
76	#size-cells = <1>;	76	#size-cells = <1>;
77	compatible = "fsl,mpc8377-fcm-nand",	77	compatible = "fsl,mpc8377-fcm-nand",
78	"fsl,elbc-fcm-nand";	78	"fsl,elbc-fcm-nand";
79	reg = <1 0 0x8000>;	79	reg = <0x1 0x0 0x8000>;
80		80
81	u-boot@0 {	81	u-boot@0 {
82	reg = <0x0 0x100000>;	82	reg = <0x0 0x100000>;
@@ -97,7 +97,7 @@
97	#size-cells = <1>;	97	#size-cells = <1>;
98	device_type = "soc";	98	device_type = "soc";
99	compatible = "simple-bus";	99	compatible = "simple-bus";
100	ranges = <0 0xe0000000 0x00100000>;	100	ranges = <0x0 0xe0000000 0x00100000>;
101	reg = <0xe0000000 0x00000200>;	101	reg = <0xe0000000 0x00000200>;
102	bus-frequency = <0>;	102	bus-frequency = <0>;
103		103
@@ -113,8 +113,8 @@
113	cell-index = <0>;	113	cell-index = <0>;
114	compatible = "fsl-i2c";	114	compatible = "fsl-i2c";
115	reg = <0x3000 0x100>;	115	reg = <0x3000 0x100>;
116	interrupts = <14 8>;	116	interrupts = <14 0x8>;
117	interrupt-parent = < &ipic >;	117	interrupt-parent = <&ipic>;
118	dfsrr;	118	dfsrr;
119	rtc@68 {	119	rtc@68 {
120	device_type = "rtc";	120	device_type = "rtc";
@@ -129,8 +129,8 @@
129	cell-index = <1>;	129	cell-index = <1>;
130	compatible = "fsl-i2c";	130	compatible = "fsl-i2c";
131	reg = <0x3100 0x100>;	131	reg = <0x3100 0x100>;
132	interrupts = <15 8>;	132	interrupts = <15 0x8>;
133	interrupt-parent = < &ipic >;	133	interrupt-parent = <&ipic>;
134	dfsrr;	134	dfsrr;
135	};	135	};
136		136
@@ -138,8 +138,8 @@
138	cell-index = <0>;	138	cell-index = <0>;
139	compatible = "fsl,spi";	139	compatible = "fsl,spi";
140	reg = <0x7000 0x1000>;	140	reg = <0x7000 0x1000>;
141	interrupts = <16 8>;	141	interrupts = <16 0x8>;
142	interrupt-parent = < &ipic >;	142	interrupt-parent = <&ipic>;
143	mode = "cpu";	143	mode = "cpu";
144	};	144	};
145		145
@@ -149,8 +149,8 @@
149	reg = <0x23000 0x1000>;	149	reg = <0x23000 0x1000>;
150	#address-cells = <1>;	150	#address-cells = <1>;
151	#size-cells = <0>;	151	#size-cells = <0>;
152	interrupt-parent = < &ipic >;	152	interrupt-parent = <&ipic>;
153	interrupts = <38 8>;	153	interrupts = <38 0x8>;
154	phy_type = "utmi";	154	phy_type = "utmi";
155	};	155	};
156		156
@@ -160,15 +160,15 @@
160	compatible = "fsl,gianfar-mdio";	160	compatible = "fsl,gianfar-mdio";
161	reg = <0x24520 0x20>;	161	reg = <0x24520 0x20>;
162	phy2: ethernet-phy@2 {	162	phy2: ethernet-phy@2 {
163	interrupt-parent = < &ipic >;	163	interrupt-parent = <&ipic>;
164	interrupts = <17 8>;	164	interrupts = <17 0x8>;
165	reg = <2>;	165	reg = <0x2>;
166	device_type = "ethernet-phy";	166	device_type = "ethernet-phy";
167	};	167	};
168	phy3: ethernet-phy@3 {	168	phy3: ethernet-phy@3 {
169	interrupt-parent = < &ipic >;	169	interrupt-parent = <&ipic>;
170	interrupts = <18 8>;	170	interrupts = <18 0x8>;
171	reg = <3>;	171	reg = <0x3>;
172	device_type = "ethernet-phy";	172	device_type = "ethernet-phy";
173	};	173	};
174	};	174	};
@@ -180,10 +180,10 @@
180	compatible = "gianfar";	180	compatible = "gianfar";
181	reg = <0x24000 0x1000>;	181	reg = <0x24000 0x1000>;
182	local-mac-address = [ 00 00 00 00 00 00 ];	182	local-mac-address = [ 00 00 00 00 00 00 ];
183	interrupts = <32 8 33 8 34 8>;	183	interrupts = <32 0x8 33 0x8 34 0x8>;
184	phy-connection-type = "mii";	184	phy-connection-type = "mii";
185	interrupt-parent = < &ipic >;	185	interrupt-parent = <&ipic>;
186	phy-handle = < &phy2 >;	186	phy-handle = <&phy2>;
187	};	187	};
188		188
189	enet1: ethernet@25000 {	189	enet1: ethernet@25000 {
@@ -193,10 +193,10 @@
193	compatible = "gianfar";	193	compatible = "gianfar";
194	reg = <0x25000 0x1000>;	194	reg = <0x25000 0x1000>;
195	local-mac-address = [ 00 00 00 00 00 00 ];	195	local-mac-address = [ 00 00 00 00 00 00 ];
196	interrupts = <35 8 36 8 37 8>;	196	interrupts = <35 0x8 36 0x8 37 0x8>;
197	phy-connection-type = "mii";	197	phy-connection-type = "mii";
198	interrupt-parent = < &ipic >;	198	interrupt-parent = <&ipic>;
199	phy-handle = < &phy3 >;	199	phy-handle = <&phy3>;
200	};	200	};
201		201
202	serial0: serial@4500 {	202	serial0: serial@4500 {
@@ -205,8 +205,8 @@
205	compatible = "ns16550";	205	compatible = "ns16550";
206	reg = <0x4500 0x100>;	206	reg = <0x4500 0x100>;
207	clock-frequency = <0>;	207	clock-frequency = <0>;
208	interrupts = <9 8>;	208	interrupts = <9 0x8>;
209	interrupt-parent = < &ipic >;	209	interrupt-parent = <&ipic>;
210	};	210	};
211		211
212	serial1: serial@4600 {	212	serial1: serial@4600 {
@@ -215,8 +215,8 @@
215	compatible = "ns16550";	215	compatible = "ns16550";
216	reg = <0x4600 0x100>;	216	reg = <0x4600 0x100>;
217	clock-frequency = <0>;	217	clock-frequency = <0>;
218	interrupts = <10 8>;	218	interrupts = <10 0x8>;
219	interrupt-parent = < &ipic >;	219	interrupt-parent = <&ipic>;
220	};	220	};
221		221
222	crypto@30000 {	222	crypto@30000 {
@@ -224,8 +224,8 @@
224	device_type = "crypto";	224	device_type = "crypto";
225	compatible = "talitos";	225	compatible = "talitos";
226	reg = <0x30000 0x10000>;	226	reg = <0x30000 0x10000>;
227	interrupts = <11 8>;	227	interrupts = <11 0x8>;
228	interrupt-parent = < &ipic >;	228	interrupt-parent = <&ipic>;
229	/* Rev. 3.0 geometry */	229	/* Rev. 3.0 geometry */
230	num-channels = <4>;	230	num-channels = <4>;
231	channel-fifo-len = <24>;	231	channel-fifo-len = <24>;
@@ -236,15 +236,15 @@
236	sata@18000 {	236	sata@18000 {
237	compatible = "fsl,mpc8377-sata", "fsl,pq-sata";	237	compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
238	reg = <0x18000 0x1000>;	238	reg = <0x18000 0x1000>;
239	interrupts = <44 8>;	239	interrupts = <44 0x8>;
240	interrupt-parent = < &ipic >;	240	interrupt-parent = <&ipic>;
241	};	241	};
242		242
243	sata@19000 {	243	sata@19000 {
244	compatible = "fsl,mpc8377-sata", "fsl,pq-sata";	244	compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
245	reg = <0x19000 0x1000>;	245	reg = <0x19000 0x1000>;
246	interrupts = <45 8>;	246	interrupts = <45 0x8>;
247	interrupt-parent = < &ipic >;	247	interrupt-parent = <&ipic>;
248	};	248	};
249		249
250	/* IPIC	250	/* IPIC
@@ -268,23 +268,23 @@
268	/* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */	268	/* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
269		269
270	/* IDSEL AD14 IRQ6 inta */	270	/* IDSEL AD14 IRQ6 inta */
271	0x7000 0 0 1 &ipic 22 8	271	0x7000 0x0 0x0 0x1 &ipic 22 0x8
272		272
273	/* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */	273	/* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
274	0x7800 0 0 1 &ipic 21 8	274	0x7800 0x0 0x0 0x1 &ipic 21 0x8
275	0x7800 0 0 2 &ipic 22 8	275	0x7800 0x0 0x0 0x2 &ipic 22 0x8
276	0x7800 0 0 4 &ipic 23 8	276	0x7800 0x0 0x0 0x4 &ipic 23 0x8
277		277
278	/* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/	278	/* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
279	0xE000 0 0 1 &ipic 23 8	279	0xE000 0x0 0x0 0x1 &ipic 23 0x8
280	0xE000 0 0 2 &ipic 21 8	280	0xE000 0x0 0x0 0x2 &ipic 21 0x8
281	0xE000 0 0 3 &ipic 22 8>;	281	0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
282	interrupt-parent = < &ipic >;	282	interrupt-parent = <&ipic>;
283	interrupts = <66 8>;	283	interrupts = <66 0x8>;
284	bus-range = <0 0>;	284	bus-range = <0 0>;
285	ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000	285	ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
286	0x42000000 0 0x80000000 0x80000000 0 0x10000000	286	0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
287	0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;	287	0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
288	clock-frequency = <66666666>;	288	clock-frequency = <66666666>;
289	#interrupt-cells = <1>;	289	#interrupt-cells = <1>;
290	#size-cells = <2>;	290	#size-cells = <2>;