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-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi248
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi63
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi191
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi63
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi143
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi62
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi270
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi65
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi304
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi64
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi196
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi70
-rw-r--r--arch/powerpc/boot/dts/fsl/p1010si-post.dtsi198
-rw-r--r--arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi64
-rw-r--r--arch/powerpc/boot/dts/fsl/p1020si-post.dtsi174
-rw-r--r--arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi68
-rw-r--r--arch/powerpc/boot/dts/fsl/p1021si-post.dtsi225
-rw-r--r--arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi68
-rw-r--r--arch/powerpc/boot/dts/fsl/p1022si-post.dtsi235
-rw-r--r--arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi68
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-post.dtsi224
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi76
-rw-r--r--arch/powerpc/boot/dts/fsl/p2020si-post.dtsi194
-rw-r--r--arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi69
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi325
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi111
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi352
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi112
-rw-r--r--arch/powerpc/boot/dts/fsl/p3060si-post.dtsi296
-rw-r--r--arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi125
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi350
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi143
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi355
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi96
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi51
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi53
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi53
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi53
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi53
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi39
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi60
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi60
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi59
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi42
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi42
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi42
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi43
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi43
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi42
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi68
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi40
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi40
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi43
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi45
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi45
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi45
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi65
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi51
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi51
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi40
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi53
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi53
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi106
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi68
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi39
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi39
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi100
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi109
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi109
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi41
83 files changed, 8310 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
new file mode 100644
index 000000000000..89af62637707
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
@@ -0,0 +1,248 @@
1/*
2 * MPC8536 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x8000 */
43&pci0 {
44 compatible = "fsl,mpc8540-pci";
45 device_type = "pci";
46 interrupts = <24 0x2 0 0>;
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
51};
52
53/* controller at 0x9000 */
54&pci1 {
55 compatible = "fsl,mpc8548-pcie";
56 device_type = "pci";
57 #size-cells = <2>;
58 #address-cells = <3>;
59 bus-range = <0 255>;
60 clock-frequency = <33333333>;
61 interrupts = <25 2 0 0>;
62
63 pcie@0 {
64 reg = <0 0 0 0 0>;
65 #interrupt-cells = <1>;
66 #size-cells = <2>;
67 #address-cells = <3>;
68 device_type = "pci";
69 interrupts = <25 2 0 0>;
70 interrupt-map-mask = <0xf800 0 0 7>;
71
72 interrupt-map = <
73 /* IDSEL 0x0 */
74 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
75 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
76 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
77 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
78 >;
79 };
80};
81
82/* controller at 0xa000 */
83&pci2 {
84 compatible = "fsl,mpc8548-pcie";
85 device_type = "pci";
86 #size-cells = <2>;
87 #address-cells = <3>;
88 bus-range = <0 255>;
89 clock-frequency = <33333333>;
90 interrupts = <26 2 0 0>;
91
92 pcie@0 {
93 reg = <0 0 0 0 0>;
94 #interrupt-cells = <1>;
95 #size-cells = <2>;
96 #address-cells = <3>;
97 device_type = "pci";
98 interrupts = <26 2 0 0>;
99 interrupt-map-mask = <0xf800 0 0 7>;
100 interrupt-map = <
101 /* IDSEL 0x0 */
102 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
103 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
104 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
105 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
106 >;
107 };
108};
109
110/* controller at 0xb000 */
111&pci3 {
112 compatible = "fsl,mpc8548-pcie";
113 device_type = "pci";
114 #size-cells = <2>;
115 #address-cells = <3>;
116 bus-range = <0 255>;
117 clock-frequency = <33333333>;
118 interrupts = <27 2 0 0>;
119
120 pcie@0 {
121 reg = <0 0 0 0 0>;
122 #interrupt-cells = <1>;
123 #size-cells = <2>;
124 #address-cells = <3>;
125 device_type = "pci";
126 interrupts = <27 2 0 0>;
127 interrupt-map-mask = <0xf800 0 0 7>;
128 interrupt-map = <
129 /* IDSEL 0x0 */
130 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
131 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
132 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
133 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
134 >;
135 };
136};
137&soc {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 device_type = "soc";
141 compatible = "fsl,mpc8536-immr", "simple-bus";
142 bus-frequency = <0>; // Filled out by uboot.
143
144 ecm-law@0 {
145 compatible = "fsl,ecm-law";
146 reg = <0x0 0x1000>;
147 fsl,num-laws = <12>;
148 };
149
150 ecm@1000 {
151 compatible = "fsl,mpc8536-ecm", "fsl,ecm";
152 reg = <0x1000 0x1000>;
153 interrupts = <17 2 0 0>;
154 };
155
156 memory-controller@2000 {
157 compatible = "fsl,mpc8536-memory-controller";
158 reg = <0x2000 0x1000>;
159 interrupts = <18 2 0 0>;
160 };
161
162/include/ "pq3-i2c-0.dtsi"
163/include/ "pq3-i2c-1.dtsi"
164/include/ "pq3-duart-0.dtsi"
165
166/include/ "pq3-espi-0.dtsi"
167 spi@7000 {
168 fsl,espi-num-chipselects = <4>;
169 };
170
171/include/ "pq3-gpio-0.dtsi"
172
173 /* mark compat w/8572 to get some erratum treatment */
174 gpio-controller@f000 {
175 compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
176 };
177
178 sata@18000 {
179 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
180 reg = <0x18000 0x1000>;
181 cell-index = <1>;
182 interrupts = <74 0x2 0 0>;
183 };
184
185 sata@19000 {
186 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
187 reg = <0x19000 0x1000>;
188 cell-index = <2>;
189 interrupts = <41 0x2 0 0>;
190 };
191
192 L2: l2-cache-controller@20000 {
193 compatible = "fsl,mpc8536-l2-cache-controller";
194 reg = <0x20000 0x1000>;
195 cache-line-size = <32>; // 32 bytes
196 cache-size = <0x80000>; // L2, 512K
197 interrupts = <16 2 0 0>;
198 };
199
200/include/ "pq3-dma-0.dtsi"
201/include/ "pq3-etsec1-0.dtsi"
202/include/ "pq3-etsec1-timer-0.dtsi"
203
204 usb@22000 {
205 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
206 reg = <0x22000 0x1000>;
207 #address-cells = <1>;
208 #size-cells = <0>;
209 interrupts = <28 0x2 0 0>;
210 };
211
212 usb@23000 {
213 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
214 reg = <0x23000 0x1000>;
215 #address-cells = <1>;
216 #size-cells = <0>;
217 interrupts = <46 0x2 0 0>;
218 };
219
220 ptp_clock@24e00 {
221 interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
222 };
223
224/include/ "pq3-etsec1-2.dtsi"
225
226 ethernet@26000 {
227 cell-index = <1>;
228 };
229
230 usb@2b000 {
231 compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
232 reg = <0x2b000 0x1000>;
233 #address-cells = <1>;
234 #size-cells = <0>;
235 interrupts = <60 0x2 0 0>;
236 };
237
238/include/ "pq3-esdhc-0.dtsi"
239/include/ "pq3-sec3.0-0.dtsi"
240/include/ "pq3-mpic.dtsi"
241/include/ "pq3-mpic-timer-B.dtsi"
242
243 global-utilities@e0000 {
244 compatible = "fsl,mpc8536-guts";
245 reg = <0xe0000 0x1000>;
246 fsl,has-rstcr;
247 };
248};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
new file mode 100644
index 000000000000..7de45a784df6
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
@@ -0,0 +1,63 @@
1/*
2 * MPC8536 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,MPC8536";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet2;
47 pci0 = &pci0;
48 pci1 = &pci1;
49 pci2 = &pci2;
50 pci3 = &pci3;
51 };
52
53 cpus {
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 PowerPC,8536@0 {
58 device_type = "cpu";
59 reg = <0x0>;
60 next-level-cache = <&L2>;
61 };
62 };
63};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi
new file mode 100644
index 000000000000..b68eb119faef
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi
@@ -0,0 +1,191 @@
1/*
2 * MPC8544 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8544-lbc", "fsl,pq3-localbus", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x8000 */
43&pci0 {
44 compatible = "fsl,mpc8540-pci";
45 device_type = "pci";
46 interrupts = <24 0x2 0 0>;
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
51};
52
53/* controller at 0x9000 */
54&pci1 {
55 compatible = "fsl,mpc8548-pcie";
56 device_type = "pci";
57 #size-cells = <2>;
58 #address-cells = <3>;
59 bus-range = <0 255>;
60 clock-frequency = <33333333>;
61 interrupts = <25 2 0 0>;
62
63 pcie@0 {
64 reg = <0 0 0 0 0>;
65 #interrupt-cells = <1>;
66 #size-cells = <2>;
67 #address-cells = <3>;
68 device_type = "pci";
69 interrupts = <25 2 0 0>;
70 interrupt-map-mask = <0xf800 0 0 7>;
71
72 interrupt-map = <
73 /* IDSEL 0x0 */
74 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
75 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
76 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
77 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
78 >;
79 };
80};
81
82/* controller at 0xa000 */
83&pci2 {
84 compatible = "fsl,mpc8548-pcie";
85 device_type = "pci";
86 #size-cells = <2>;
87 #address-cells = <3>;
88 bus-range = <0 255>;
89 clock-frequency = <33333333>;
90 interrupts = <26 2 0 0>;
91
92 pcie@0 {
93 reg = <0 0 0 0 0>;
94 #interrupt-cells = <1>;
95 #size-cells = <2>;
96 #address-cells = <3>;
97 device_type = "pci";
98 interrupts = <26 2 0 0>;
99 interrupt-map-mask = <0xf800 0 0 7>;
100 interrupt-map = <
101 /* IDSEL 0x0 */
102 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
103 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
104 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
105 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
106 >;
107 };
108};
109
110/* controller at 0xb000 */
111&pci3 {
112 compatible = "fsl,mpc8548-pcie";
113 device_type = "pci";
114 #size-cells = <2>;
115 #address-cells = <3>;
116 bus-range = <0 255>;
117 clock-frequency = <33333333>;
118 interrupts = <27 2 0 0>;
119
120 pcie@0 {
121 reg = <0 0 0 0 0>;
122 #interrupt-cells = <1>;
123 #size-cells = <2>;
124 #address-cells = <3>;
125 device_type = "pci";
126 interrupts = <27 2 0 0>;
127 interrupt-map-mask = <0xf800 0 0 7>;
128 interrupt-map = <
129 /* IDSEL 0x0 */
130 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
131 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
132 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
133 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
134 >;
135 };
136};
137
138&soc {
139 #address-cells = <1>;
140 #size-cells = <1>;
141 device_type = "soc";
142 compatible = "fsl,mpc8544-immr", "simple-bus";
143 bus-frequency = <0>; // Filled out by uboot.
144
145 ecm-law@0 {
146 compatible = "fsl,ecm-law";
147 reg = <0x0 0x1000>;
148 fsl,num-laws = <10>;
149 };
150
151 ecm@1000 {
152 compatible = "fsl,mpc8544-ecm", "fsl,ecm";
153 reg = <0x1000 0x1000>;
154 interrupts = <17 2 0 0>;
155 };
156
157 memory-controller@2000 {
158 compatible = "fsl,mpc8544-memory-controller";
159 reg = <0x2000 0x1000>;
160 interrupts = <18 2 0 0>;
161 };
162
163/include/ "pq3-i2c-0.dtsi"
164/include/ "pq3-i2c-1.dtsi"
165/include/ "pq3-duart-0.dtsi"
166
167 L2: l2-cache-controller@20000 {
168 compatible = "fsl,mpc8544-l2-cache-controller";
169 reg = <0x20000 0x1000>;
170 cache-line-size = <32>; // 32 bytes
171 cache-size = <0x40000>; // L2, 256K
172 interrupts = <16 2 0 0>;
173 };
174
175/include/ "pq3-dma-0.dtsi"
176/include/ "pq3-etsec1-0.dtsi"
177/include/ "pq3-etsec1-2.dtsi"
178
179 ethernet@26000 {
180 cell-index = <1>;
181 };
182
183/include/ "pq3-sec2.1-0.dtsi"
184/include/ "pq3-mpic.dtsi"
185
186 global-utilities@e0000 {
187 compatible = "fsl,mpc8544-guts";
188 reg = <0xe0000 0x1000>;
189 fsl,has-rstcr;
190 };
191};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
new file mode 100644
index 000000000000..8777f9239d9e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
@@ -0,0 +1,63 @@
1/*
2 * MPC8544 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,MPC8544";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet2;
47 pci0 = &pci0;
48 pci1 = &pci1;
49 pci2 = &pci2;
50 pci3 = &pci3;
51 };
52
53 cpus {
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 PowerPC,8544@0 {
58 device_type = "cpu";
59 reg = <0x0>;
60 next-level-cache = <&L2>;
61 };
62 };
63};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
new file mode 100644
index 000000000000..9d8023a69d7d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
@@ -0,0 +1,143 @@
1/*
2 * MPC8548 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8548-lbc", "fsl,pq3-localbus", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x8000 */
43&pci0 {
44 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
45 device_type = "pci";
46 interrupts = <24 0x2 0 0>;
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
51};
52
53/* controller at 0x9000 */
54&pci1 {
55 compatible = "fsl,mpc8540-pci";
56 device_type = "pci";
57 interrupts = <25 0x2 0 0>;
58 bus-range = <0 0xff>;
59 #interrupt-cells = <1>;
60 #size-cells = <2>;
61 #address-cells = <3>;
62};
63
64/* controller at 0xa000 */
65&pci2 {
66 compatible = "fsl,mpc8548-pcie";
67 device_type = "pci";
68 #size-cells = <2>;
69 #address-cells = <3>;
70 bus-range = <0 255>;
71 clock-frequency = <33333333>;
72 interrupts = <26 2 0 0>;
73
74 pcie@0 {
75 reg = <0 0 0 0 0>;
76 #interrupt-cells = <1>;
77 #size-cells = <2>;
78 #address-cells = <3>;
79 device_type = "pci";
80 interrupts = <26 2 0 0>;
81 interrupt-map-mask = <0xf800 0 0 7>;
82 interrupt-map = <
83 /* IDSEL 0x0 */
84 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
85 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
86 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
87 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
88 >;
89 };
90};
91
92&soc {
93 #address-cells = <1>;
94 #size-cells = <1>;
95 device_type = "soc";
96 compatible = "fsl,mpc8548-immr", "simple-bus";
97 bus-frequency = <0>; // Filled out by uboot.
98
99 ecm-law@0 {
100 compatible = "fsl,ecm-law";
101 reg = <0x0 0x1000>;
102 fsl,num-laws = <10>;
103 };
104
105 ecm@1000 {
106 compatible = "fsl,mpc8548-ecm", "fsl,ecm";
107 reg = <0x1000 0x1000>;
108 interrupts = <17 2 0 0>;
109 };
110
111 memory-controller@2000 {
112 compatible = "fsl,mpc8548-memory-controller";
113 reg = <0x2000 0x1000>;
114 interrupts = <18 2 0 0>;
115 };
116
117/include/ "pq3-i2c-0.dtsi"
118/include/ "pq3-i2c-1.dtsi"
119/include/ "pq3-duart-0.dtsi"
120
121 L2: l2-cache-controller@20000 {
122 compatible = "fsl,mpc8548-l2-cache-controller";
123 reg = <0x20000 0x1000>;
124 cache-line-size = <32>; // 32 bytes
125 cache-size = <0x80000>; // L2, 512K
126 interrupts = <16 2 0 0>;
127 };
128
129/include/ "pq3-dma-0.dtsi"
130/include/ "pq3-etsec1-0.dtsi"
131/include/ "pq3-etsec1-1.dtsi"
132/include/ "pq3-etsec1-2.dtsi"
133/include/ "pq3-etsec1-3.dtsi"
134
135/include/ "pq3-sec2.1-0.dtsi"
136/include/ "pq3-mpic.dtsi"
137
138 global-utilities@e0000 {
139 compatible = "fsl,mpc8548-guts";
140 reg = <0xe0000 0x1000>;
141 fsl,has-rstcr;
142 };
143};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
new file mode 100644
index 000000000000..289f1218d755
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
@@ -0,0 +1,62 @@
1/*
2 * MPC8548 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,MPC8548";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet2;
47 pci0 = &pci0;
48 pci1 = &pci1;
49 pci2 = &pci2;
50 };
51
52 cpus {
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 PowerPC,8548@0 {
57 device_type = "cpu";
58 reg = <0x0>;
59 next-level-cache = <&L2>;
60 };
61 };
62};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
new file mode 100644
index 000000000000..64e7075a9cd4
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
@@ -0,0 +1,270 @@
1/*
2 * MPC8568 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus";
39 interrupts = <19 2 0 0>;
40 sleep = <&pmc 0x08000000>;
41};
42
43/* controller at 0x8000 */
44&pci0 {
45 compatible = "fsl,mpc8540-pci";
46 device_type = "pci";
47 interrupts = <24 0x2 0 0>;
48 bus-range = <0 0xff>;
49 #interrupt-cells = <1>;
50 #size-cells = <2>;
51 #address-cells = <3>;
52 sleep = <&pmc 0x80000000>;
53};
54
55/* controller at 0xa000 */
56&pci1 {
57 compatible = "fsl,mpc8548-pcie";
58 device_type = "pci";
59 #size-cells = <2>;
60 #address-cells = <3>;
61 bus-range = <0 255>;
62 clock-frequency = <33333333>;
63 interrupts = <26 2 0 0>;
64 sleep = <&pmc 0x20000000>;
65
66 pcie@0 {
67 reg = <0 0 0 0 0>;
68 #interrupt-cells = <1>;
69 #size-cells = <2>;
70 #address-cells = <3>;
71 device_type = "pci";
72 interrupts = <26 2 0 0>;
73 interrupt-map-mask = <0xf800 0 0 7>;
74 interrupt-map = <
75 /* IDSEL 0x0 */
76 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
77 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
78 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
79 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
80 >;
81 };
82};
83
84&rio {
85 compatible = "fsl,srio";
86 interrupts = <48 2 0 0>;
87 #address-cells = <2>;
88 #size-cells = <2>;
89 fsl,srio-rmu-handle = <&rmu>;
90 sleep = <&pmc 0x00080000>;
91 ranges;
92
93 port1 {
94 #address-cells = <2>;
95 #size-cells = <2>;
96 cell-index = <1>;
97 };
98};
99
100&soc {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 device_type = "soc";
104 compatible = "fsl,mpc8568-immr", "simple-bus";
105 bus-frequency = <0>; // Filled out by uboot.
106
107 ecm-law@0 {
108 compatible = "fsl,ecm-law";
109 reg = <0x0 0x1000>;
110 fsl,num-laws = <10>;
111 };
112
113 ecm@1000 {
114 compatible = "fsl,mpc8568-ecm", "fsl,ecm";
115 reg = <0x1000 0x1000>;
116 interrupts = <17 2 0 0>;
117 };
118
119 memory-controller@2000 {
120 compatible = "fsl,mpc8568-memory-controller";
121 reg = <0x2000 0x1000>;
122 interrupts = <18 2 0 0>;
123 };
124
125 i2c-sleep-nexus {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "simple-bus";
129 sleep = <&pmc 0x00000004>;
130 ranges;
131
132/include/ "pq3-i2c-0.dtsi"
133/include/ "pq3-i2c-1.dtsi"
134
135 };
136
137 duart-sleep-nexus {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 compatible = "simple-bus";
141 sleep = <&pmc 0x00000002>;
142 ranges;
143
144/include/ "pq3-duart-0.dtsi"
145
146 };
147
148 L2: l2-cache-controller@20000 {
149 compatible = "fsl,mpc8568-l2-cache-controller";
150 reg = <0x20000 0x1000>;
151 cache-line-size = <32>; // 32 bytes
152 cache-size = <0x80000>; // L2, 512K
153 interrupts = <16 2 0 0>;
154 };
155
156/include/ "pq3-dma-0.dtsi"
157 dma@21300 {
158 sleep = <&pmc 0x00000400>;
159 };
160
161/include/ "pq3-etsec1-0.dtsi"
162 ethernet@24000 {
163 sleep = <&pmc 0x00000080>;
164 };
165
166/include/ "pq3-etsec1-1.dtsi"
167 ethernet@25000 {
168 sleep = <&pmc 0x00000040>;
169 };
170
171 par_io@e0100 {
172 reg = <0xe0100 0x100>;
173 device_type = "par_io";
174 };
175
176/include/ "pq3-sec2.1-0.dtsi"
177 crypto@30000 {
178 sleep = <&pmc 0x01000000>;
179 };
180
181/include/ "pq3-mpic.dtsi"
182/include/ "pq3-rmu-0.dtsi"
183 rmu@d3000 {
184 sleep = <&pmc 0x00040000>;
185 };
186
187 global-utilities@e0000 {
188 #address-cells = <1>;
189 #size-cells = <1>;
190 compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts";
191 reg = <0xe0000 0x1000>;
192 ranges = <0 0xe0000 0x1000>;
193 fsl,has-rstcr;
194
195 pmc: power@70 {
196 compatible = "fsl,mpc8568-pmc",
197 "fsl,mpc8548-pmc";
198 reg = <0x70 0x20>;
199 };
200 };
201};
202
203&qe {
204 #address-cells = <1>;
205 #size-cells = <1>;
206 device_type = "qe";
207 compatible = "fsl,qe";
208 sleep = <&pmc 0x00000800>;
209 brg-frequency = <0>;
210 bus-frequency = <396000000>;
211 fsl,qe-num-riscs = <2>;
212 fsl,qe-num-snums = <28>;
213
214 qeic: interrupt-controller@80 {
215 interrupt-controller;
216 compatible = "fsl,qe-ic";
217 #address-cells = <0>;
218 #interrupt-cells = <1>;
219 reg = <0x80 0x80>;
220 interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30
221 interrupt-parent = <&mpic>;
222 };
223
224 spi@4c0 {
225 #address-cells = <1>;
226 #size-cells = <0>;
227 compatible = "fsl,spi";
228 reg = <0x4c0 0x40>;
229 cell-index = <0>;
230 interrupts = <2>;
231 interrupt-parent = <&qeic>;
232 };
233
234 spi@500 {
235 #address-cells = <1>;
236 #size-cells = <0>;
237 cell-index = <1>;
238 compatible = "fsl,spi";
239 reg = <0x500 0x40>;
240 interrupts = <1>;
241 interrupt-parent = <&qeic>;
242 };
243
244 ucc@2000 {
245 cell-index = <1>;
246 reg = <0x2000 0x200>;
247 interrupts = <32>;
248 interrupt-parent = <&qeic>;
249 };
250
251 ucc@3000 {
252 cell-index = <2>;
253 reg = <0x3000 0x200>;
254 interrupts = <33>;
255 interrupt-parent = <&qeic>;
256 };
257
258 muram@10000 {
259 #address-cells = <1>;
260 #size-cells = <1>;
261 compatible = "fsl,qe-muram", "fsl,cpm-muram";
262 ranges = <0x0 0x10000 0x10000>;
263
264 data-only@0 {
265 compatible = "fsl,qe-muram-data",
266 "fsl,cpm-muram-data";
267 reg = <0x0 0x10000>;
268 };
269 };
270};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
new file mode 100644
index 000000000000..eacd62c5fe6c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
@@ -0,0 +1,65 @@
1/*
2 * MPC8568 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,MPC8568";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet1;
47 ethernet2 = &enet2;
48 ethernet3 = &enet3;
49 pci0 = &pci0;
50 pci1 = &pci1;
51 };
52
53 cpus {
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 PowerPC,8568@0 {
58 device_type = "cpu";
59 reg = <0x0>;
60 next-level-cache = <&L2>;
61 sleep = <&pmc 0x00008000 // core
62 &pmc 0x00004000>; // timebase
63 };
64 };
65};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi
new file mode 100644
index 000000000000..3e6346a4a183
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi
@@ -0,0 +1,304 @@
1/*
2 * MPC8569 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40 sleep = <&pmc 0x08000000>;
41};
42
43/* controller at 0xa000 */
44&pci1 {
45 compatible = "fsl,mpc8548-pcie";
46 device_type = "pci";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
51 interrupts = <26 2 0 0>;
52 sleep = <&pmc 0x20000000>;
53
54 pcie@0 {
55 reg = <0 0 0 0 0>;
56 #interrupt-cells = <1>;
57 #size-cells = <2>;
58 #address-cells = <3>;
59 device_type = "pci";
60 interrupts = <26 2 0 0>;
61 interrupt-map-mask = <0xf800 0 0 7>;
62 interrupt-map = <
63 /* IDSEL 0x0 */
64 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
65 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
66 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
67 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
68 >;
69 };
70};
71
72&rio {
73 compatible = "fsl,srio";
74 interrupts = <48 2 0 0>;
75 #address-cells = <2>;
76 #size-cells = <2>;
77 fsl,srio-rmu-handle = <&rmu>;
78 sleep = <&pmc 0x00080000>;
79 ranges;
80
81 port1 {
82 #address-cells = <2>;
83 #size-cells = <2>;
84 cell-index = <1>;
85 };
86
87 port2 {
88 #address-cells = <2>;
89 #size-cells = <2>;
90 cell-index = <2>;
91 };
92};
93
94&soc {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 device_type = "soc";
98 compatible = "fsl,mpc8569-immr", "simple-bus";
99 bus-frequency = <0>; // Filled out by uboot.
100
101 ecm-law@0 {
102 compatible = "fsl,ecm-law";
103 reg = <0x0 0x1000>;
104 fsl,num-laws = <10>;
105 };
106
107 ecm@1000 {
108 compatible = "fsl,mpc8569-ecm", "fsl,ecm";
109 reg = <0x1000 0x1000>;
110 interrupts = <17 2 0 0>;
111 };
112
113 memory-controller@2000 {
114 compatible = "fsl,mpc8569-memory-controller";
115 reg = <0x2000 0x1000>;
116 interrupts = <18 2 0 0>;
117 };
118
119 i2c-sleep-nexus {
120 #address-cells = <1>;
121 #size-cells = <1>;
122 compatible = "simple-bus";
123 sleep = <&pmc 0x00000004>;
124 ranges;
125
126/include/ "pq3-i2c-0.dtsi"
127/include/ "pq3-i2c-1.dtsi"
128
129 };
130
131 duart-sleep-nexus {
132 #address-cells = <1>;
133 #size-cells = <1>;
134 compatible = "simple-bus";
135 sleep = <&pmc 0x00000002>;
136 ranges;
137
138/include/ "pq3-duart-0.dtsi"
139
140 };
141
142 L2: l2-cache-controller@20000 {
143 compatible = "fsl,mpc8569-l2-cache-controller";
144 reg = <0x20000 0x1000>;
145 cache-line-size = <32>; // 32 bytes
146 cache-size = <0x80000>; // L2, 512K
147 interrupts = <16 2 0 0>;
148 };
149
150/include/ "pq3-dma-0.dtsi"
151/include/ "pq3-esdhc-0.dtsi"
152 sdhc@2e000 {
153 sleep = <&pmc 0x00200000>;
154 };
155
156 par_io@e0100 {
157 #address-cells = <1>;
158 #size-cells = <1>;
159 reg = <0xe0100 0x100>;
160 ranges = <0x0 0xe0100 0x100>;
161 device_type = "par_io";
162 };
163
164/include/ "pq3-sec3.1-0.dtsi"
165 crypto@30000 {
166 sleep = <&pmc 0x01000000>;
167 };
168
169/include/ "pq3-mpic.dtsi"
170/include/ "pq3-rmu-0.dtsi"
171 rmu@d3000 {
172 sleep = <&pmc 0x00040000>;
173 };
174
175 global-utilities@e0000 {
176 #address-cells = <1>;
177 #size-cells = <1>;
178 compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts";
179 reg = <0xe0000 0x1000>;
180 ranges = <0 0xe0000 0x1000>;
181 fsl,has-rstcr;
182
183 pmc: power@70 {
184 compatible = "fsl,mpc8569-pmc",
185 "fsl,mpc8548-pmc";
186 reg = <0x70 0x20>;
187 };
188 };
189};
190
191&qe {
192 #address-cells = <1>;
193 #size-cells = <1>;
194 device_type = "qe";
195 compatible = "fsl,qe";
196 sleep = <&pmc 0x00000800>;
197 brg-frequency = <0>;
198 bus-frequency = <0>;
199 fsl,qe-num-riscs = <4>;
200 fsl,qe-num-snums = <46>;
201
202 qeic: interrupt-controller@80 {
203 interrupt-controller;
204 compatible = "fsl,qe-ic";
205 #address-cells = <0>;
206 #interrupt-cells = <1>;
207 reg = <0x80 0x80>;
208 interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30
209 interrupt-parent = <&mpic>;
210 };
211
212 timer@440 {
213 compatible = "fsl,mpc8569-qe-gtm",
214 "fsl,qe-gtm", "fsl,gtm";
215 reg = <0x440 0x40>;
216 interrupts = <12 13 14 15>;
217 interrupt-parent = <&qeic>;
218 /* Filled in by U-Boot */
219 clock-frequency = <0>;
220 };
221
222 spi@4c0 {
223 #address-cells = <1>;
224 #size-cells = <0>;
225 compatible = "fsl,mpc8569-qe-spi", "fsl,spi";
226 reg = <0x4c0 0x40>;
227 cell-index = <0>;
228 interrupts = <2>;
229 interrupt-parent = <&qeic>;
230 };
231
232 spi@500 {
233 #address-cells = <1>;
234 #size-cells = <0>;
235 cell-index = <1>;
236 compatible = "fsl,spi";
237 reg = <0x500 0x40>;
238 interrupts = <1>;
239 interrupt-parent = <&qeic>;
240 };
241
242 usb@6c0 {
243 compatible = "fsl,mpc8569-qe-usb",
244 "fsl,mpc8323-qe-usb";
245 reg = <0x6c0 0x40 0x8b00 0x100>;
246 interrupts = <11>;
247 interrupt-parent = <&qeic>;
248 };
249
250 ucc@2000 {
251 cell-index = <1>;
252 reg = <0x2000 0x200>;
253 interrupts = <32>;
254 interrupt-parent = <&qeic>;
255 };
256
257 ucc@2200 {
258 cell-index = <3>;
259 reg = <0x2200 0x200>;
260 interrupts = <34>;
261 interrupt-parent = <&qeic>;
262 };
263
264 ucc@3000 {
265 cell-index = <2>;
266 reg = <0x3000 0x200>;
267 interrupts = <33>;
268 interrupt-parent = <&qeic>;
269 };
270
271 ucc@3200 {
272 cell-index = <4>;
273 reg = <0x3200 0x200>;
274 interrupts = <35>;
275 interrupt-parent = <&qeic>;
276 };
277
278 ucc@3400 {
279 cell-index = <6>;
280 reg = <0x3400 0x200>;
281 interrupts = <41>;
282 interrupt-parent = <&qeic>;
283 };
284
285 ucc@3600 {
286 cell-index = <8>;
287 reg = <0x3600 0x200>;
288 interrupts = <43>;
289 interrupt-parent = <&qeic>;
290 };
291
292 muram@10000 {
293 #address-cells = <1>;
294 #size-cells = <1>;
295 compatible = "fsl,qe-muram", "fsl,cpm-muram";
296 ranges = <0x0 0x10000 0x20000>;
297
298 data-only@0 {
299 compatible = "fsl,qe-muram-data",
300 "fsl,cpm-muram-data";
301 reg = <0x0 0x20000>;
302 };
303 };
304};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
new file mode 100644
index 000000000000..b07064d11930
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
@@ -0,0 +1,64 @@
1/*
2 * MPC8569 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,MPC8569";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet1;
47 ethernet2 = &enet2;
48 ethernet3 = &enet3;
49 pci1 = &pci1;
50 };
51
52 cpus {
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 PowerPC,8569@0 {
57 device_type = "cpu";
58 reg = <0x0>;
59 next-level-cache = <&L2>;
60 sleep = <&pmc 0x00008000 // core
61 &pmc 0x00004000>; // timebase
62 };
63 };
64};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
new file mode 100644
index 000000000000..d44e25a48734
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
@@ -0,0 +1,196 @@
1/*
2 * MPC8572 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x8000 */
43&pci0 {
44 compatible = "fsl,mpc8548-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <24 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <24 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60
61 interrupt-map = <
62 /* IDSEL 0x0 */
63 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
64 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
65 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
66 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
67 >;
68 };
69};
70
71/* controller at 0x9000 */
72&pci1 {
73 compatible = "fsl,mpc8548-pcie";
74 device_type = "pci";
75 #size-cells = <2>;
76 #address-cells = <3>;
77 bus-range = <0 255>;
78 clock-frequency = <33333333>;
79 interrupts = <25 2 0 0>;
80
81 pcie@0 {
82 reg = <0 0 0 0 0>;
83 #interrupt-cells = <1>;
84 #size-cells = <2>;
85 #address-cells = <3>;
86 device_type = "pci";
87 interrupts = <25 2 0 0>;
88 interrupt-map-mask = <0xf800 0 0 7>;
89
90 interrupt-map = <
91 /* IDSEL 0x0 */
92 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
93 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
94 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
95 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
96 >;
97 };
98};
99
100/* controller at 0xa000 */
101&pci2 {
102 compatible = "fsl,mpc8548-pcie";
103 device_type = "pci";
104 #size-cells = <2>;
105 #address-cells = <3>;
106 bus-range = <0 255>;
107 clock-frequency = <33333333>;
108 interrupts = <26 2 0 0>;
109
110 pcie@0 {
111 reg = <0 0 0 0 0>;
112 #interrupt-cells = <1>;
113 #size-cells = <2>;
114 #address-cells = <3>;
115 device_type = "pci";
116 interrupts = <26 2 0 0>;
117 interrupt-map-mask = <0xf800 0 0 7>;
118 interrupt-map = <
119 /* IDSEL 0x0 */
120 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
121 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
122 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
123 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
124 >;
125 };
126};
127
128&soc {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 device_type = "soc";
132 compatible = "fsl,mpc8572-immr", "simple-bus";
133 bus-frequency = <0>; // Filled out by uboot.
134
135 ecm-law@0 {
136 compatible = "fsl,ecm-law";
137 reg = <0x0 0x1000>;
138 fsl,num-laws = <12>;
139 };
140
141 ecm@1000 {
142 compatible = "fsl,mpc8572-ecm", "fsl,ecm";
143 reg = <0x1000 0x1000>;
144 interrupts = <17 2 0 0>;
145 };
146
147 memory-controller@2000 {
148 compatible = "fsl,mpc8572-memory-controller";
149 reg = <0x2000 0x1000>;
150 interrupts = <18 2 0 0>;
151 };
152
153 memory-controller@6000 {
154 compatible = "fsl,mpc8572-memory-controller";
155 reg = <0x6000 0x1000>;
156 interrupts = <18 2 0 0>;
157 };
158
159/include/ "pq3-i2c-0.dtsi"
160/include/ "pq3-i2c-1.dtsi"
161/include/ "pq3-duart-0.dtsi"
162/include/ "pq3-dma-1.dtsi"
163/include/ "pq3-gpio-0.dtsi"
164 gpio-controller@f000 {
165 compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
166 };
167
168 L2: l2-cache-controller@20000 {
169 compatible = "fsl,mpc8572-l2-cache-controller";
170 reg = <0x20000 0x1000>;
171 cache-line-size = <32>; // 32 bytes
172 cache-size = <0x100000>; // L2,1M
173 interrupts = <16 2 0 0>;
174 };
175
176/include/ "pq3-dma-0.dtsi"
177/include/ "pq3-etsec1-0.dtsi"
178/include/ "pq3-etsec1-timer-0.dtsi"
179
180 ptp_clock@24e00 {
181 interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
182 };
183
184/include/ "pq3-etsec1-1.dtsi"
185/include/ "pq3-etsec1-2.dtsi"
186/include/ "pq3-etsec1-3.dtsi"
187/include/ "pq3-sec3.0-0.dtsi"
188/include/ "pq3-mpic.dtsi"
189/include/ "pq3-mpic-timer-B.dtsi"
190
191 global-utilities@e0000 {
192 compatible = "fsl,mpc8572-guts";
193 reg = <0xe0000 0x1000>;
194 fsl,has-rstcr;
195 };
196};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
new file mode 100644
index 000000000000..ca188326c2ca
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
@@ -0,0 +1,70 @@
1/*
2 * MPC8572 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,MPC8572";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet1;
47 ethernet2 = &enet2;
48 ethernet3 = &enet3;
49 pci0 = &pci0;
50 pci1 = &pci1;
51 pci2 = &pci2;
52 };
53
54 cpus {
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 PowerPC,8572@0 {
59 device_type = "cpu";
60 reg = <0x0>;
61 next-level-cache = <&L2>;
62 };
63
64 PowerPC,8572@1 {
65 device_type = "cpu";
66 reg = <0x1>;
67 next-level-cache = <&L2>;
68 };
69 };
70};
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
new file mode 100644
index 000000000000..bd9e163c764b
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -0,0 +1,198 @@
1/*
2 * P1010/P1014 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&ifc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,ifc", "simple-bus";
39 interrupts = <16 2 0 0 19 2 0 0>;
40};
41
42/* controller at 0x9000 */
43&pci0 {
44 compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <16 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60 interrupt-map = <
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
63 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
64 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
65 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
66 >;
67 };
68};
69
70/* controller at 0xa000 */
71&pci1 {
72 compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
73 device_type = "pci";
74 #size-cells = <2>;
75 #address-cells = <3>;
76 bus-range = <0 255>;
77 clock-frequency = <33333333>;
78 interrupts = <16 2 0 0>;
79
80 pcie@0 {
81 reg = <0 0 0 0 0>;
82 #interrupt-cells = <1>;
83 #size-cells = <2>;
84 #address-cells = <3>;
85 device_type = "pci";
86 interrupts = <16 2 0 0>;
87 interrupt-map-mask = <0xf800 0 0 7>;
88
89 interrupt-map = <
90 /* IDSEL 0x0 */
91 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
92 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
93 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
94 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
95 >;
96 };
97};
98
99&soc {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 device_type = "soc";
103 compatible = "fsl,p1010-immr", "simple-bus";
104 bus-frequency = <0>; // Filled out by uboot.
105
106 ecm-law@0 {
107 compatible = "fsl,ecm-law";
108 reg = <0x0 0x1000>;
109 fsl,num-laws = <12>;
110 };
111
112 ecm@1000 {
113 compatible = "fsl,p1010-ecm", "fsl,ecm";
114 reg = <0x1000 0x1000>;
115 interrupts = <16 2 0 0>;
116 };
117
118 memory-controller@2000 {
119 compatible = "fsl,p1010-memory-controller";
120 reg = <0x2000 0x1000>;
121 interrupts = <16 2 0 0>;
122 };
123
124/include/ "pq3-i2c-0.dtsi"
125/include/ "pq3-i2c-1.dtsi"
126/include/ "pq3-duart-0.dtsi"
127/include/ "pq3-espi-0.dtsi"
128 spi0: spi@7000 {
129 fsl,espi-num-chipselects = <1>;
130 };
131
132/include/ "pq3-gpio-0.dtsi"
133/include/ "pq3-sata2-0.dtsi"
134/include/ "pq3-sata2-1.dtsi"
135
136 can0: can@1c000 {
137 compatible = "fsl,p1010-flexcan";
138 reg = <0x1c000 0x1000>;
139 interrupts = <48 0x2 0 0>;
140 };
141
142 can1: can@1d000 {
143 compatible = "fsl,p1010-flexcan";
144 reg = <0x1d000 0x1000>;
145 interrupts = <61 0x2 0 0>;
146 };
147
148 L2: l2-cache-controller@20000 {
149 compatible = "fsl,p1010-l2-cache-controller",
150 "fsl,p1014-l2-cache-controller";
151 reg = <0x20000 0x1000>;
152 cache-line-size = <32>; // 32 bytes
153 cache-size = <0x40000>; // L2,256K
154 interrupts = <16 2 0 0>;
155 };
156
157/include/ "pq3-dma-0.dtsi"
158/include/ "pq3-usb2-dr-0.dtsi"
159/include/ "pq3-esdhc-0.dtsi"
160 sdhc@2e000 {
161 fsl,sdhci-auto-cmd12;
162 };
163
164/include/ "pq3-sec4.4-0.dtsi"
165/include/ "pq3-mpic.dtsi"
166/include/ "pq3-mpic-timer-B.dtsi"
167
168/include/ "pq3-etsec2-0.dtsi"
169 enet0: ethernet@b0000 {
170 queue-group@b0000 {
171 fsl,rx-bit-map = <0xff>;
172 fsl,tx-bit-map = <0xff>;
173 };
174 };
175
176/include/ "pq3-etsec2-1.dtsi"
177 enet1: ethernet@b1000 {
178 queue-group@b1000 {
179 fsl,rx-bit-map = <0xff>;
180 fsl,tx-bit-map = <0xff>;
181 };
182 };
183
184/include/ "pq3-etsec2-2.dtsi"
185 enet2: ethernet@b2000 {
186 queue-group@b2000 {
187 fsl,rx-bit-map = <0xff>;
188 fsl,tx-bit-map = <0xff>;
189 };
190
191 };
192
193 global-utilities@e0000 {
194 compatible = "fsl,p1010-guts";
195 reg = <0xe0000 0x1000>;
196 fsl,has-rstcr;
197 };
198};
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
new file mode 100644
index 000000000000..7354a8f90ea5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
@@ -0,0 +1,64 @@
1/*
2 * P1010/P1014 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P1010";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet1;
47 ethernet2 = &enet2;
48 pci0 = &pci0;
49 pci1 = &pci1;
50 can0 = &can0;
51 can1 = &can1;
52 };
53
54 cpus {
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 PowerPC,P1010@0 {
59 device_type = "cpu";
60 reg = <0x0>;
61 next-level-cache = <&L2>;
62 };
63 };
64};
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
new file mode 100644
index 000000000000..fc924c5ffebe
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
@@ -0,0 +1,174 @@
1/*
2 * P1020/P1011 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x9000 */
43&pci0 {
44 compatible = "fsl,mpc8548-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <16 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60 interrupt-map = <
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
63 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
64 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
65 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
66 >;
67 };
68};
69
70/* controller at 0xa000 */
71&pci1 {
72 compatible = "fsl,mpc8548-pcie";
73 device_type = "pci";
74 #size-cells = <2>;
75 #address-cells = <3>;
76 bus-range = <0 255>;
77 clock-frequency = <33333333>;
78 interrupts = <16 2 0 0>;
79
80 pcie@0 {
81 reg = <0 0 0 0 0>;
82 #interrupt-cells = <1>;
83 #size-cells = <2>;
84 #address-cells = <3>;
85 device_type = "pci";
86 interrupts = <16 2 0 0>;
87 interrupt-map-mask = <0xf800 0 0 7>;
88
89 interrupt-map = <
90 /* IDSEL 0x0 */
91 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
92 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
93 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
94 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
95 >;
96 };
97};
98
99&soc {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 device_type = "soc";
103 compatible = "fsl,p1020-immr", "simple-bus";
104 bus-frequency = <0>; // Filled out by uboot.
105
106 ecm-law@0 {
107 compatible = "fsl,ecm-law";
108 reg = <0x0 0x1000>;
109 fsl,num-laws = <12>;
110 };
111
112 ecm@1000 {
113 compatible = "fsl,p1020-ecm", "fsl,ecm";
114 reg = <0x1000 0x1000>;
115 interrupts = <16 2 0 0>;
116 };
117
118 memory-controller@2000 {
119 compatible = "fsl,p1020-memory-controller";
120 reg = <0x2000 0x1000>;
121 interrupts = <16 2 0 0>;
122 };
123
124/include/ "pq3-i2c-0.dtsi"
125/include/ "pq3-i2c-1.dtsi"
126/include/ "pq3-duart-0.dtsi"
127
128/include/ "pq3-espi-0.dtsi"
129 spi@7000 {
130 fsl,espi-num-chipselects = <4>;
131 };
132
133/include/ "pq3-gpio-0.dtsi"
134
135 L2: l2-cache-controller@20000 {
136 compatible = "fsl,p1020-l2-cache-controller";
137 reg = <0x20000 0x1000>;
138 cache-line-size = <32>; // 32 bytes
139 cache-size = <0x40000>; // L2,256K
140 interrupts = <16 2 0 0>;
141 };
142
143/include/ "pq3-dma-0.dtsi"
144/include/ "pq3-usb2-dr-0.dtsi"
145/include/ "pq3-usb2-dr-1.dtsi"
146
147/include/ "pq3-esdhc-0.dtsi"
148/include/ "pq3-sec3.3-0.dtsi"
149
150/include/ "pq3-mpic.dtsi"
151/include/ "pq3-mpic-timer-B.dtsi"
152
153/include/ "pq3-etsec2-0.dtsi"
154 enet0: enet0_grp2: ethernet@b0000 {
155 };
156
157/include/ "pq3-etsec2-1.dtsi"
158 enet1: enet1_grp2: ethernet@b1000 {
159 };
160
161/include/ "pq3-etsec2-2.dtsi"
162 enet2: enet2_grp2: ethernet@b2000 {
163 };
164
165 global-utilities@e0000 {
166 compatible = "fsl,p1020-guts";
167 reg = <0xe0000 0x1000>;
168 fsl,has-rstcr;
169 };
170};
171
172/include/ "pq3-etsec2-grp2-0.dtsi"
173/include/ "pq3-etsec2-grp2-1.dtsi"
174/include/ "pq3-etsec2-grp2-2.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
new file mode 100644
index 000000000000..6f0376e554eb
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
@@ -0,0 +1,68 @@
1/*
2 * P1020/P1011 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P1020";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet1;
47 ethernet2 = &enet2;
48 pci0 = &pci0;
49 pci1 = &pci1;
50 };
51
52 cpus {
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 PowerPC,P1020@0 {
57 device_type = "cpu";
58 reg = <0x0>;
59 next-level-cache = <&L2>;
60 };
61
62 PowerPC,P1020@1 {
63 device_type = "cpu";
64 reg = <0x1>;
65 next-level-cache = <&L2>;
66 };
67 };
68};
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
new file mode 100644
index 000000000000..38ba54d1e32e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -0,0 +1,225 @@
1/*
2 * P1021/P1012 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x9000 */
43&pci0 {
44 compatible = "fsl,mpc8548-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <16 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60 interrupt-map = <
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
63 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
64 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
65 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
66 >;
67 };
68};
69
70/* controller at 0xa000 */
71&pci1 {
72 compatible = "fsl,mpc8548-pcie";
73 device_type = "pci";
74 #size-cells = <2>;
75 #address-cells = <3>;
76 bus-range = <0 255>;
77 clock-frequency = <33333333>;
78 interrupts = <16 2 0 0>;
79
80 pcie@0 {
81 reg = <0 0 0 0 0>;
82 #interrupt-cells = <1>;
83 #size-cells = <2>;
84 #address-cells = <3>;
85 device_type = "pci";
86 interrupts = <16 2 0 0>;
87 interrupt-map-mask = <0xf800 0 0 7>;
88
89 interrupt-map = <
90 /* IDSEL 0x0 */
91 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
92 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
93 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
94 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
95 >;
96 };
97};
98
99&soc {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 device_type = "soc";
103 compatible = "fsl,p1021-immr", "simple-bus";
104 bus-frequency = <0>; // Filled out by uboot.
105
106 ecm-law@0 {
107 compatible = "fsl,ecm-law";
108 reg = <0x0 0x1000>;
109 fsl,num-laws = <12>;
110 };
111
112 ecm@1000 {
113 compatible = "fsl,p1021-ecm", "fsl,ecm";
114 reg = <0x1000 0x1000>;
115 interrupts = <16 2 0 0>;
116 };
117
118 memory-controller@2000 {
119 compatible = "fsl,p1021-memory-controller";
120 reg = <0x2000 0x1000>;
121 interrupts = <16 2 0 0>;
122 };
123
124/include/ "pq3-i2c-0.dtsi"
125/include/ "pq3-i2c-1.dtsi"
126/include/ "pq3-duart-0.dtsi"
127
128/include/ "pq3-espi-0.dtsi"
129 spi@7000 {
130 fsl,espi-num-chipselects = <4>;
131 };
132
133/include/ "pq3-gpio-0.dtsi"
134
135 L2: l2-cache-controller@20000 {
136 compatible = "fsl,p1021-l2-cache-controller";
137 reg = <0x20000 0x1000>;
138 cache-line-size = <32>; // 32 bytes
139 cache-size = <0x40000>; // L2,256K
140 interrupts = <16 2 0 0>;
141 };
142
143/include/ "pq3-dma-0.dtsi"
144/include/ "pq3-usb2-dr-0.dtsi"
145
146/include/ "pq3-esdhc-0.dtsi"
147/include/ "pq3-sec3.3-0.dtsi"
148
149/include/ "pq3-mpic.dtsi"
150/include/ "pq3-mpic-timer-B.dtsi"
151
152/include/ "pq3-etsec2-0.dtsi"
153 enet0: enet0_grp2: ethernet@b0000 {
154 };
155
156/include/ "pq3-etsec2-1.dtsi"
157 enet1: enet1_grp2: ethernet@b1000 {
158 };
159
160/include/ "pq3-etsec2-2.dtsi"
161 enet2: enet2_grp2: ethernet@b2000 {
162 };
163
164 global-utilities@e0000 {
165 compatible = "fsl,p1021-guts";
166 reg = <0xe0000 0x1000>;
167 fsl,has-rstcr;
168 };
169};
170
171&qe {
172 #address-cells = <1>;
173 #size-cells = <1>;
174 device_type = "qe";
175 compatible = "fsl,qe";
176 fsl,qe-num-riscs = <1>;
177 fsl,qe-num-snums = <28>;
178
179 qeic: interrupt-controller@80 {
180 interrupt-controller;
181 compatible = "fsl,qe-ic";
182 #address-cells = <0>;
183 #interrupt-cells = <1>;
184 reg = <0x80 0x80>;
185 interrupts = <63 2 0 0 60 2 0 0>; //high:47 low:44
186 };
187
188 ucc@2000 {
189 cell-index = <1>;
190 reg = <0x2000 0x200>;
191 interrupts = <32>;
192 interrupt-parent = <&qeic>;
193 };
194
195 mdio@2120 {
196 #address-cells = <1>;
197 #size-cells = <0>;
198 reg = <0x2120 0x18>;
199 compatible = "fsl,ucc-mdio";
200 };
201
202 ucc@2400 {
203 cell-index = <5>;
204 reg = <0x2400 0x200>;
205 interrupts = <40>;
206 interrupt-parent = <&qeic>;
207 };
208
209 muram@10000 {
210 #address-cells = <1>;
211 #size-cells = <1>;
212 compatible = "fsl,qe-muram", "fsl,cpm-muram";
213 ranges = <0x0 0x10000 0x6000>;
214
215 data-only@0 {
216 compatible = "fsl,qe-muram-data",
217 "fsl,cpm-muram-data";
218 reg = <0x0 0x6000>;
219 };
220 };
221};
222
223/include/ "pq3-etsec2-grp2-0.dtsi"
224/include/ "pq3-etsec2-grp2-1.dtsi"
225/include/ "pq3-etsec2-grp2-2.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
new file mode 100644
index 000000000000..4abd54bc3308
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
@@ -0,0 +1,68 @@
1/*
2 * P1021/P1012 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P1021";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet1;
47 ethernet2 = &enet2;
48 pci0 = &pci0;
49 pci1 = &pci1;
50 };
51
52 cpus {
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 PowerPC,P1021@0 {
57 device_type = "cpu";
58 reg = <0x0>;
59 next-level-cache = <&L2>;
60 };
61
62 PowerPC,P1021@1 {
63 device_type = "cpu";
64 reg = <0x1>;
65 next-level-cache = <&L2>;
66 };
67 };
68};
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
new file mode 100644
index 000000000000..16239b199d0a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
@@ -0,0 +1,235 @@
1/*
2 * P1022/P1013 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x9000 */
43&pci0 {
44 compatible = "fsl,p1022-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <16 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60 interrupt-map = <
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
63 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
64 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
65 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
66 >;
67 };
68};
69
70/* controller at 0xa000 */
71&pci1 {
72 compatible = "fsl,p1022-pcie";
73 device_type = "pci";
74 #size-cells = <2>;
75 #address-cells = <3>;
76 bus-range = <0 255>;
77 clock-frequency = <33333333>;
78 interrupts = <16 2 0 0>;
79
80 pcie@0 {
81 reg = <0 0 0 0 0>;
82 #interrupt-cells = <1>;
83 #size-cells = <2>;
84 #address-cells = <3>;
85 device_type = "pci";
86 interrupts = <16 2 0 0>;
87 interrupt-map-mask = <0xf800 0 0 7>;
88
89 interrupt-map = <
90 /* IDSEL 0x0 */
91 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
92 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
93 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
94 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
95 >;
96 };
97};
98
99/* controller at 0xb000 */
100&pci2 {
101 compatible = "fsl,p1022-pcie";
102 device_type = "pci";
103 #size-cells = <2>;
104 #address-cells = <3>;
105 bus-range = <0 255>;
106 clock-frequency = <33333333>;
107 interrupts = <16 2 0 0>;
108
109 pcie@0 {
110 reg = <0 0 0 0 0>;
111 #interrupt-cells = <1>;
112 #size-cells = <2>;
113 #address-cells = <3>;
114 device_type = "pci";
115 interrupts = <16 2 0 0>;
116 interrupt-map-mask = <0xf800 0 0 7>;
117
118 interrupt-map = <
119 /* IDSEL 0x0 */
120 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
121 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
122 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
123 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
124 >;
125 };
126};
127
128&soc {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 device_type = "soc";
132 compatible = "fsl,p1022-immr", "simple-bus";
133 bus-frequency = <0>; // Filled out by uboot.
134
135 ecm-law@0 {
136 compatible = "fsl,ecm-law";
137 reg = <0x0 0x1000>;
138 fsl,num-laws = <12>;
139 };
140
141 ecm@1000 {
142 compatible = "fsl,p1022-ecm", "fsl,ecm";
143 reg = <0x1000 0x1000>;
144 interrupts = <16 2 0 0>;
145 };
146
147 memory-controller@2000 {
148 compatible = "fsl,p1022-memory-controller";
149 reg = <0x2000 0x1000>;
150 interrupts = <16 2 0 0>;
151 };
152
153/include/ "pq3-i2c-0.dtsi"
154/include/ "pq3-i2c-1.dtsi"
155/include/ "pq3-duart-0.dtsi"
156/include/ "pq3-espi-0.dtsi"
157 spi@7000 {
158 fsl,espi-num-chipselects = <4>;
159 };
160
161/include/ "pq3-dma-1.dtsi"
162 dma@c300 {
163 dma00: dma-channel@0 {
164 compatible = "fsl,ssi-dma-channel";
165 };
166 dma01: dma-channel@80 {
167 compatible = "fsl,ssi-dma-channel";
168 };
169 };
170
171/include/ "pq3-gpio-0.dtsi"
172
173 display@10000 {
174 compatible = "fsl,diu", "fsl,p1022-diu";
175 reg = <0x10000 1000>;
176 interrupts = <64 2 0 0>;
177 };
178
179 ssi@15000 {
180 compatible = "fsl,mpc8610-ssi";
181 cell-index = <0>;
182 reg = <0x15000 0x100>;
183 interrupts = <75 2 0 0>;
184 fsl,playback-dma = <&dma00>;
185 fsl,capture-dma = <&dma01>;
186 fsl,fifo-depth = <15>;
187 };
188
189/include/ "pq3-sata2-0.dtsi"
190/include/ "pq3-sata2-1.dtsi"
191
192 L2: l2-cache-controller@20000 {
193 compatible = "fsl,p1022-l2-cache-controller";
194 reg = <0x20000 0x1000>;
195 cache-line-size = <32>; // 32 bytes
196 cache-size = <0x40000>; // L2,256K
197 interrupts = <16 2 0 0>;
198 };
199
200/include/ "pq3-dma-0.dtsi"
201/include/ "pq3-usb2-dr-0.dtsi"
202/include/ "pq3-usb2-dr-1.dtsi"
203
204/include/ "pq3-esdhc-0.dtsi"
205 sdhc@2e000 {
206 fsl,sdhci-auto-cmd12;
207 };
208
209/include/ "pq3-sec3.3-0.dtsi"
210/include/ "pq3-mpic.dtsi"
211/include/ "pq3-mpic-timer-B.dtsi"
212
213/include/ "pq3-etsec2-0.dtsi"
214 enet0: enet0_grp2: ethernet@b0000 {
215 };
216
217/include/ "pq3-etsec2-1.dtsi"
218 enet1: enet1_grp2: ethernet@b1000 {
219 };
220
221 global-utilities@e0000 {
222 compatible = "fsl,p1022-guts";
223 reg = <0xe0000 0x1000>;
224 fsl,has-rstcr;
225 };
226
227 power@e0070{
228 compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
229 reg = <0xe0070 0x20>;
230 };
231
232};
233
234/include/ "pq3-etsec2-grp2-0.dtsi"
235/include/ "pq3-etsec2-grp2-1.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
new file mode 100644
index 000000000000..e930f4f7ca89
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
@@ -0,0 +1,68 @@
1/*
2 * P1022/P1013 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P1022";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet1;
47 pci0 = &pci0;
48 pci1 = &pci1;
49 pci2 = &pci2;
50 };
51
52 cpus {
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 PowerPC,P1022@0 {
57 device_type = "cpu";
58 reg = <0x0>;
59 next-level-cache = <&L2>;
60 };
61
62 PowerPC,P1022@1 {
63 device_type = "cpu";
64 reg = <0x1>;
65 next-level-cache = <&L2>;
66 };
67 };
68};
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
new file mode 100644
index 000000000000..b06bb4cc1fe8
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
@@ -0,0 +1,224 @@
1/*
2 * P1023/P1017 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0xa000 */
43&pci0 {
44 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 0 0>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 0 0>;
58 };
59};
60
61/* controller at 0x9000 */
62&pci1 {
63 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
64 device_type = "pci";
65 #size-cells = <2>;
66 #address-cells = <3>;
67 bus-range = <0 0xff>;
68 clock-frequency = <33333333>;
69 interrupts = <16 2 0 0>;
70 pcie@0 {
71 reg = <0 0 0 0 0>;
72 #interrupt-cells = <1>;
73 #size-cells = <2>;
74 #address-cells = <3>;
75 device_type = "pci";
76 interrupts = <16 2 0 0>;
77 };
78};
79
80/* controller at 0xb000 */
81&pci2 {
82 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
83 device_type = "pci";
84 #size-cells = <2>;
85 #address-cells = <3>;
86 bus-range = <0x0 0xff>;
87 clock-frequency = <33333333>;
88 interrupts = <16 2 0 0>;
89 pcie@0 {
90 reg = <0 0 0 0 0>;
91 #interrupt-cells = <1>;
92 #size-cells = <2>;
93 #address-cells = <3>;
94 device_type = "pci";
95 interrupts = <16 2 0 0>;
96 };
97};
98
99&soc {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 device_type = "soc";
103 compatible = "fsl,p1023-immr", "simple-bus";
104 bus-frequency = <0>; // Filled out by uboot.
105
106 ecm-law@0 {
107 compatible = "fsl,ecm-law";
108 reg = <0x0 0x1000>;
109 fsl,num-laws = <12>;
110 };
111
112 ecm@1000 {
113 compatible = "fsl,p1023-ecm", "fsl,ecm";
114 reg = <0x1000 0x1000>;
115 interrupts = <16 2 0 0>;
116 };
117
118 memory-controller@2000 {
119 compatible = "fsl,p1023-memory-controller";
120 reg = <0x2000 0x1000>;
121 interrupts = <16 2 0 0>;
122 };
123
124/include/ "pq3-i2c-0.dtsi"
125/include/ "pq3-i2c-1.dtsi"
126/include/ "pq3-duart-0.dtsi"
127
128/include/ "pq3-espi-0.dtsi"
129 spi@7000 {
130 fsl,espi-num-chipselects = <4>;
131 };
132
133/include/ "pq3-gpio-0.dtsi"
134
135 L2: l2-cache-controller@20000 {
136 compatible = "fsl,p1023-l2-cache-controller";
137 reg = <0x20000 0x1000>;
138 cache-line-size = <32>; // 32 bytes
139 cache-size = <0x40000>; // L2,256K
140 interrupts = <16 2 0 0>;
141 };
142
143/include/ "pq3-dma-0.dtsi"
144/include/ "pq3-usb2-dr-0.dtsi"
145
146 crypto: crypto@300000 {
147 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
148 #address-cells = <1>;
149 #size-cells = <1>;
150 reg = <0x30000 0x10000>;
151 ranges = <0 0x30000 0x10000>;
152 interrupts = <58 2 0 0>;
153
154 sec_jr0: jr@1000 {
155 compatible = "fsl,sec-v4.2-job-ring",
156 "fsl,sec-v4.0-job-ring";
157 reg = <0x1000 0x1000>;
158 interrupts = <45 2 0 0>;
159 };
160
161 sec_jr1: jr@2000 {
162 compatible = "fsl,sec-v4.2-job-ring",
163 "fsl,sec-v4.0-job-ring";
164 reg = <0x2000 0x1000>;
165 interrupts = <45 2 0 0>;
166 };
167
168 sec_jr2: jr@3000 {
169 compatible = "fsl,sec-v4.2-job-ring",
170 "fsl,sec-v4.0-job-ring";
171 reg = <0x3000 0x1000>;
172 interrupts = <57 2 0 0>;
173 };
174
175 sec_jr3: jr@4000 {
176 compatible = "fsl,sec-v4.2-job-ring",
177 "fsl,sec-v4.0-job-ring";
178 reg = <0x4000 0x1000>;
179 interrupts = <57 2 0 0>;
180 };
181
182 rtic@6000 {
183 compatible = "fsl,sec-v4.2-rtic",
184 "fsl,sec-v4.0-rtic";
185 #address-cells = <1>;
186 #size-cells = <1>;
187 reg = <0x6000 0x100>;
188 ranges = <0x0 0x6100 0xe00>;
189
190 rtic_a: rtic-a@0 {
191 compatible = "fsl,sec-v4.2-rtic-memory",
192 "fsl,sec-v4.0-rtic-memory";
193 reg = <0x00 0x20 0x100 0x80>;
194 };
195
196 rtic_b: rtic-b@20 {
197 compatible = "fsl,sec-v4.2-rtic-memory",
198 "fsl,sec-v4.0-rtic-memory";
199 reg = <0x20 0x20 0x200 0x80>;
200 };
201
202 rtic_c: rtic-c@40 {
203 compatible = "fsl,sec-v4.2-rtic-memory",
204 "fsl,sec-v4.0-rtic-memory";
205 reg = <0x40 0x20 0x300 0x80>;
206 };
207
208 rtic_d: rtic-d@60 {
209 compatible = "fsl,sec-v4.2-rtic-memory",
210 "fsl,sec-v4.0-rtic-memory";
211 reg = <0x60 0x20 0x500 0x80>;
212 };
213 };
214 };
215
216/include/ "pq3-mpic.dtsi"
217/include/ "pq3-mpic-timer-B.dtsi"
218
219 global-utilities@e0000 {
220 compatible = "fsl,p1023-guts";
221 reg = <0xe0000 0x1000>;
222 fsl,has-rstcr;
223 };
224};
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
new file mode 100644
index 000000000000..ac45f6d93385
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
@@ -0,0 +1,76 @@
1/*
2 * P1023/P1017 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P1023";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 pci0 = &pci0;
46 pci1 = &pci1;
47 pci2 = &pci2;
48
49 crypto = &crypto;
50 sec_jr0 = &sec_jr0;
51 sec_jr1 = &sec_jr1;
52 sec_jr2 = &sec_jr2;
53 sec_jr3 = &sec_jr3;
54 rtic_a = &rtic_a;
55 rtic_b = &rtic_b;
56 rtic_c = &rtic_c;
57 rtic_d = &rtic_d;
58 };
59
60 cpus {
61 #address-cells = <1>;
62 #size-cells = <0>;
63
64 PowerPC,P1023@0 {
65 device_type = "cpu";
66 reg = <0x0>;
67 next-level-cache = <&L2>;
68 };
69
70 PowerPC,P1023@1 {
71 device_type = "cpu";
72 reg = <0x1>;
73 next-level-cache = <&L2>;
74 };
75 };
76};
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
new file mode 100644
index 000000000000..c041050561a7
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
@@ -0,0 +1,194 @@
1/*
2 * P2020/P2010 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0xa000 */
43&pci0 {
44 compatible = "fsl,mpc8548-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <26 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <26 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60 interrupt-map = <
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
63 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
64 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
65 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
66 >;
67 };
68};
69
70/* controller at 0x9000 */
71&pci1 {
72 compatible = "fsl,mpc8548-pcie";
73 device_type = "pci";
74 #size-cells = <2>;
75 #address-cells = <3>;
76 bus-range = <0 255>;
77 clock-frequency = <33333333>;
78 interrupts = <25 2 0 0>;
79
80 pcie@0 {
81 reg = <0 0 0 0 0>;
82 #interrupt-cells = <1>;
83 #size-cells = <2>;
84 #address-cells = <3>;
85 device_type = "pci";
86 interrupts = <25 2 0 0>;
87 interrupt-map-mask = <0xf800 0 0 7>;
88
89 interrupt-map = <
90 /* IDSEL 0x0 */
91 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
92 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
93 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
94 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
95 >;
96 };
97};
98
99/* controller at 0x8000 */
100&pci2 {
101 compatible = "fsl,mpc8548-pcie";
102 device_type = "pci";
103 #size-cells = <2>;
104 #address-cells = <3>;
105 bus-range = <0 255>;
106 clock-frequency = <33333333>;
107 interrupts = <24 2 0 0>;
108
109 pcie@0 {
110 reg = <0 0 0 0 0>;
111 #interrupt-cells = <1>;
112 #size-cells = <2>;
113 #address-cells = <3>;
114 device_type = "pci";
115 interrupts = <24 2 0 0>;
116 interrupt-map-mask = <0xf800 0 0 7>;
117
118 interrupt-map = <
119 /* IDSEL 0x0 */
120 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
121 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
122 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
123 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
124 >;
125 };
126};
127
128&soc {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 device_type = "soc";
132 compatible = "fsl,p2020-immr", "simple-bus";
133 bus-frequency = <0>; // Filled out by uboot.
134
135 ecm-law@0 {
136 compatible = "fsl,ecm-law";
137 reg = <0x0 0x1000>;
138 fsl,num-laws = <12>;
139 };
140
141 ecm@1000 {
142 compatible = "fsl,p2020-ecm", "fsl,ecm";
143 reg = <0x1000 0x1000>;
144 interrupts = <17 2 0 0>;
145 };
146
147 memory-controller@2000 {
148 compatible = "fsl,p2020-memory-controller";
149 reg = <0x2000 0x1000>;
150 interrupts = <18 2 0 0>;
151 };
152
153/include/ "pq3-i2c-0.dtsi"
154/include/ "pq3-i2c-1.dtsi"
155/include/ "pq3-duart-0.dtsi"
156/include/ "pq3-espi-0.dtsi"
157 spi0: spi@7000 {
158 fsl,espi-num-chipselects = <4>;
159 };
160
161/include/ "pq3-dma-1.dtsi"
162/include/ "pq3-gpio-0.dtsi"
163
164 L2: l2-cache-controller@20000 {
165 compatible = "fsl,p2020-l2-cache-controller";
166 reg = <0x20000 0x1000>;
167 cache-line-size = <32>; // 32 bytes
168 cache-size = <0x80000>; // L2,512K
169 interrupts = <16 2 0 0>;
170 };
171
172/include/ "pq3-dma-0.dtsi"
173/include/ "pq3-usb2-dr-0.dtsi"
174/include/ "pq3-etsec1-0.dtsi"
175/include/ "pq3-etsec1-timer-0.dtsi"
176
177 ptp_clock@24e00 {
178 interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
179 };
180
181
182/include/ "pq3-etsec1-1.dtsi"
183/include/ "pq3-etsec1-2.dtsi"
184/include/ "pq3-esdhc-0.dtsi"
185/include/ "pq3-sec3.1-0.dtsi"
186/include/ "pq3-mpic.dtsi"
187/include/ "pq3-mpic-timer-B.dtsi"
188
189 global-utilities@e0000 {
190 compatible = "fsl,p2020-guts";
191 reg = <0xe0000 0x1000>;
192 fsl,has-rstcr;
193 };
194};
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
new file mode 100644
index 000000000000..3213288641d1
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
@@ -0,0 +1,69 @@
1/*
2 * P2020/P2010 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P2020";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet1;
47 ethernet2 = &enet2;
48 pci0 = &pci0;
49 pci1 = &pci1;
50 pci2 = &pci2;
51 };
52
53 cpus {
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 PowerPC,P2020@0 {
58 device_type = "cpu";
59 reg = <0x0>;
60 next-level-cache = <&L2>;
61 };
62
63 PowerPC,P2020@1 {
64 device_type = "cpu";
65 reg = <0x1>;
66 next-level-cache = <&L2>;
67 };
68 };
69};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
new file mode 100644
index 000000000000..234a399ddeb2
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -0,0 +1,325 @@
1/*
2 * P2041/P2040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123&rio {
124 compatible = "fsl,srio";
125 interrupts = <16 2 1 11>;
126 #address-cells = <2>;
127 #size-cells = <2>;
128 ranges;
129
130 port1 {
131 #address-cells = <2>;
132 #size-cells = <2>;
133 cell-index = <1>;
134 };
135
136 port2 {
137 #address-cells = <2>;
138 #size-cells = <2>;
139 cell-index = <2>;
140 };
141};
142
143&dcsr {
144 #address-cells = <1>;
145 #size-cells = <1>;
146 compatible = "fsl,dcsr", "simple-bus";
147
148 dcsr-epu@0 {
149 compatible = "fsl,dcsr-epu";
150 interrupts = <52 2 0 0
151 84 2 0 0
152 85 2 0 0>;
153 reg = <0x0 0x1000>;
154 };
155 dcsr-npc {
156 compatible = "fsl,dcsr-npc";
157 reg = <0x1000 0x1000 0x1000000 0x8000>;
158 };
159 dcsr-nxc@2000 {
160 compatible = "fsl,dcsr-nxc";
161 reg = <0x2000 0x1000>;
162 };
163 dcsr-corenet {
164 compatible = "fsl,dcsr-corenet";
165 reg = <0x8000 0x1000 0xB0000 0x1000>;
166 };
167 dcsr-dpaa@9000 {
168 compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa";
169 reg = <0x9000 0x1000>;
170 };
171 dcsr-ocn@11000 {
172 compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn";
173 reg = <0x11000 0x1000>;
174 };
175 dcsr-ddr@12000 {
176 compatible = "fsl,dcsr-ddr";
177 dev-handle = <&ddr1>;
178 reg = <0x12000 0x1000>;
179 };
180 dcsr-nal@18000 {
181 compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal";
182 reg = <0x18000 0x1000>;
183 };
184 dcsr-rcpm@22000 {
185 compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm";
186 reg = <0x22000 0x1000>;
187 };
188 dcsr-cpu-sb-proxy@40000 {
189 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
190 cpu-handle = <&cpu0>;
191 reg = <0x40000 0x1000>;
192 };
193 dcsr-cpu-sb-proxy@41000 {
194 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
195 cpu-handle = <&cpu1>;
196 reg = <0x41000 0x1000>;
197 };
198 dcsr-cpu-sb-proxy@42000 {
199 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
200 cpu-handle = <&cpu2>;
201 reg = <0x42000 0x1000>;
202 };
203 dcsr-cpu-sb-proxy@43000 {
204 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
205 cpu-handle = <&cpu3>;
206 reg = <0x43000 0x1000>;
207 };
208};
209
210&soc {
211 #address-cells = <1>;
212 #size-cells = <1>;
213 device_type = "soc";
214 compatible = "simple-bus";
215
216 soc-sram-error {
217 compatible = "fsl,soc-sram-error";
218 interrupts = <16 2 1 29>;
219 };
220
221 corenet-law@0 {
222 compatible = "fsl,corenet-law";
223 reg = <0x0 0x1000>;
224 fsl,num-laws = <32>;
225 };
226
227 ddr1: memory-controller@8000 {
228 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
229 reg = <0x8000 0x1000>;
230 interrupts = <16 2 1 23>;
231 };
232
233 cpc: l3-cache-controller@10000 {
234 compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
235 reg = <0x10000 0x1000>;
236 interrupts = <16 2 1 27>;
237 };
238
239 corenet-cf@18000 {
240 compatible = "fsl,corenet-cf";
241 reg = <0x18000 0x1000>;
242 interrupts = <16 2 1 31>;
243 fsl,ccf-num-csdids = <32>;
244 fsl,ccf-num-snoopids = <32>;
245 };
246
247 iommu@20000 {
248 compatible = "fsl,pamu-v1.0", "fsl,pamu";
249 reg = <0x20000 0x4000>;
250 interrupts = <
251 24 2 0 0
252 16 2 1 30>;
253 };
254
255/include/ "qoriq-mpic.dtsi"
256
257 guts: global-utilities@e0000 {
258 compatible = "fsl,qoriq-device-config-1.0";
259 reg = <0xe0000 0xe00>;
260 fsl,has-rstcr;
261 #sleep-cells = <1>;
262 fsl,liodn-bits = <12>;
263 };
264
265 pins: global-utilities@e0e00 {
266 compatible = "fsl,qoriq-pin-control-1.0";
267 reg = <0xe0e00 0x200>;
268 #sleep-cells = <2>;
269 };
270
271 clockgen: global-utilities@e1000 {
272 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
273 reg = <0xe1000 0x1000>;
274 clock-frequency = <0>;
275 };
276
277 rcpm: global-utilities@e2000 {
278 compatible = "fsl,qoriq-rcpm-1.0";
279 reg = <0xe2000 0x1000>;
280 #sleep-cells = <1>;
281 };
282
283 sfp: sfp@e8000 {
284 compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
285 reg = <0xe8000 0x1000>;
286 };
287
288 serdes: serdes@ea000 {
289 compatible = "fsl,p2041-serdes";
290 reg = <0xea000 0x1000>;
291 };
292
293/include/ "qoriq-dma-0.dtsi"
294/include/ "qoriq-dma-1.dtsi"
295/include/ "qoriq-espi-0.dtsi"
296 spi@110000 {
297 fsl,espi-num-chipselects = <4>;
298 };
299
300/include/ "qoriq-esdhc-0.dtsi"
301 sdhc@114000 {
302 sdhci,auto-cmd12;
303 };
304
305/include/ "qoriq-i2c-0.dtsi"
306/include/ "qoriq-i2c-1.dtsi"
307/include/ "qoriq-duart-0.dtsi"
308/include/ "qoriq-duart-1.dtsi"
309/include/ "qoriq-gpio-0.dtsi"
310/include/ "qoriq-usb2-mph-0.dtsi"
311 usb0: usb@210000 {
312 phy_type = "utmi";
313 port0;
314 };
315
316/include/ "qoriq-usb2-dr-0.dtsi"
317 usb1: usb@211000 {
318 dr_mode = "host";
319 phy_type = "utmi";
320 };
321
322/include/ "qoriq-sata2-0.dtsi"
323/include/ "qoriq-sata2-1.dtsi"
324/include/ "qoriq-sec4.2-0.dtsi"
325};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
new file mode 100644
index 000000000000..2d0a40d6b10f
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -0,0 +1,111 @@
1/*
2 * P2041 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P2041";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 ccsr = &soc;
44 dcsr = &dcsr;
45
46 serial0 = &serial0;
47 serial1 = &serial1;
48 serial2 = &serial2;
49 serial3 = &serial3;
50 pci0 = &pci0;
51 pci1 = &pci1;
52 pci2 = &pci2;
53 usb0 = &usb0;
54 usb1 = &usb1;
55 dma0 = &dma0;
56 dma1 = &dma1;
57 sdhc = &sdhc;
58 msi0 = &msi0;
59 msi1 = &msi1;
60 msi2 = &msi2;
61
62 crypto = &crypto;
63 sec_jr0 = &sec_jr0;
64 sec_jr1 = &sec_jr1;
65 sec_jr2 = &sec_jr2;
66 sec_jr3 = &sec_jr3;
67 rtic_a = &rtic_a;
68 rtic_b = &rtic_b;
69 rtic_c = &rtic_c;
70 rtic_d = &rtic_d;
71 sec_mon = &sec_mon;
72 };
73
74 cpus {
75 #address-cells = <1>;
76 #size-cells = <0>;
77
78 cpu0: PowerPC,e500mc@0 {
79 device_type = "cpu";
80 reg = <0>;
81 next-level-cache = <&L2_0>;
82 L2_0: l2-cache {
83 next-level-cache = <&cpc>;
84 };
85 };
86 cpu1: PowerPC,e500mc@1 {
87 device_type = "cpu";
88 reg = <1>;
89 next-level-cache = <&L2_1>;
90 L2_1: l2-cache {
91 next-level-cache = <&cpc>;
92 };
93 };
94 cpu2: PowerPC,e500mc@2 {
95 device_type = "cpu";
96 reg = <2>;
97 next-level-cache = <&L2_2>;
98 L2_2: l2-cache {
99 next-level-cache = <&cpc>;
100 };
101 };
102 cpu3: PowerPC,e500mc@3 {
103 device_type = "cpu";
104 reg = <3>;
105 next-level-cache = <&L2_3>;
106 L2_3: l2-cache {
107 next-level-cache = <&cpc>;
108 };
109 };
110 };
111};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
new file mode 100644
index 000000000000..d41d08de7f7e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -0,0 +1,352 @@
1/*
2 * P3041 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123/* controller at 0x203000 */
124&pci3 {
125 compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
126 device_type = "pci";
127 #size-cells = <2>;
128 #address-cells = <3>;
129 bus-range = <0x0 0xff>;
130 clock-frequency = <33333333>;
131 interrupts = <16 2 1 12>;
132 pcie@0 {
133 reg = <0 0 0 0 0>;
134 #interrupt-cells = <1>;
135 #size-cells = <2>;
136 #address-cells = <3>;
137 device_type = "pci";
138 interrupts = <16 2 1 12>;
139 interrupt-map-mask = <0xf800 0 0 7>;
140 interrupt-map = <
141 /* IDSEL 0x0 */
142 0000 0 0 1 &mpic 43 1 0 0
143 0000 0 0 2 &mpic 0 1 0 0
144 0000 0 0 3 &mpic 4 1 0 0
145 0000 0 0 4 &mpic 8 1 0 0
146 >;
147 };
148};
149
150&rio {
151 compatible = "fsl,srio";
152 interrupts = <16 2 1 11>;
153 #address-cells = <2>;
154 #size-cells = <2>;
155 ranges;
156
157 port1 {
158 #address-cells = <2>;
159 #size-cells = <2>;
160 cell-index = <1>;
161 };
162
163 port2 {
164 #address-cells = <2>;
165 #size-cells = <2>;
166 cell-index = <2>;
167 };
168};
169
170&dcsr {
171 #address-cells = <1>;
172 #size-cells = <1>;
173 compatible = "fsl,dcsr", "simple-bus";
174
175 dcsr-epu@0 {
176 compatible = "fsl,dcsr-epu";
177 interrupts = <52 2 0 0
178 84 2 0 0
179 85 2 0 0>;
180 reg = <0x0 0x1000>;
181 };
182 dcsr-npc {
183 compatible = "fsl,dcsr-npc";
184 reg = <0x1000 0x1000 0x1000000 0x8000>;
185 };
186 dcsr-nxc@2000 {
187 compatible = "fsl,dcsr-nxc";
188 reg = <0x2000 0x1000>;
189 };
190 dcsr-corenet {
191 compatible = "fsl,dcsr-corenet";
192 reg = <0x8000 0x1000 0xB0000 0x1000>;
193 };
194 dcsr-dpaa@9000 {
195 compatible = "fsl,p3041-dcsr-dpaa", "fsl,dcsr-dpaa";
196 reg = <0x9000 0x1000>;
197 };
198 dcsr-ocn@11000 {
199 compatible = "fsl,p3041-dcsr-ocn", "fsl,dcsr-ocn";
200 reg = <0x11000 0x1000>;
201 };
202 dcsr-ddr@12000 {
203 compatible = "fsl,dcsr-ddr";
204 dev-handle = <&ddr1>;
205 reg = <0x12000 0x1000>;
206 };
207 dcsr-nal@18000 {
208 compatible = "fsl,p3041-dcsr-nal", "fsl,dcsr-nal";
209 reg = <0x18000 0x1000>;
210 };
211 dcsr-rcpm@22000 {
212 compatible = "fsl,p3041-dcsr-rcpm", "fsl,dcsr-rcpm";
213 reg = <0x22000 0x1000>;
214 };
215 dcsr-cpu-sb-proxy@40000 {
216 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
217 cpu-handle = <&cpu0>;
218 reg = <0x40000 0x1000>;
219 };
220 dcsr-cpu-sb-proxy@41000 {
221 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
222 cpu-handle = <&cpu1>;
223 reg = <0x41000 0x1000>;
224 };
225 dcsr-cpu-sb-proxy@42000 {
226 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
227 cpu-handle = <&cpu2>;
228 reg = <0x42000 0x1000>;
229 };
230 dcsr-cpu-sb-proxy@43000 {
231 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
232 cpu-handle = <&cpu3>;
233 reg = <0x43000 0x1000>;
234 };
235};
236
237&soc {
238 #address-cells = <1>;
239 #size-cells = <1>;
240 device_type = "soc";
241 compatible = "simple-bus";
242
243 soc-sram-error {
244 compatible = "fsl,soc-sram-error";
245 interrupts = <16 2 1 29>;
246 };
247
248 corenet-law@0 {
249 compatible = "fsl,corenet-law";
250 reg = <0x0 0x1000>;
251 fsl,num-laws = <32>;
252 };
253
254 ddr1: memory-controller@8000 {
255 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
256 reg = <0x8000 0x1000>;
257 interrupts = <16 2 1 23>;
258 };
259
260 cpc: l3-cache-controller@10000 {
261 compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
262 reg = <0x10000 0x1000>;
263 interrupts = <16 2 1 27>;
264 };
265
266 corenet-cf@18000 {
267 compatible = "fsl,corenet-cf";
268 reg = <0x18000 0x1000>;
269 interrupts = <16 2 1 31>;
270 fsl,ccf-num-csdids = <32>;
271 fsl,ccf-num-snoopids = <32>;
272 };
273
274 iommu@20000 {
275 compatible = "fsl,pamu-v1.0", "fsl,pamu";
276 reg = <0x20000 0x4000>;
277 interrupts = <
278 24 2 0 0
279 16 2 1 30>;
280 };
281
282/include/ "qoriq-mpic.dtsi"
283
284 guts: global-utilities@e0000 {
285 compatible = "fsl,qoriq-device-config-1.0";
286 reg = <0xe0000 0xe00>;
287 fsl,has-rstcr;
288 #sleep-cells = <1>;
289 fsl,liodn-bits = <12>;
290 };
291
292 pins: global-utilities@e0e00 {
293 compatible = "fsl,qoriq-pin-control-1.0";
294 reg = <0xe0e00 0x200>;
295 #sleep-cells = <2>;
296 };
297
298 clockgen: global-utilities@e1000 {
299 compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
300 reg = <0xe1000 0x1000>;
301 clock-frequency = <0>;
302 };
303
304 rcpm: global-utilities@e2000 {
305 compatible = "fsl,qoriq-rcpm-1.0";
306 reg = <0xe2000 0x1000>;
307 #sleep-cells = <1>;
308 };
309
310 sfp: sfp@e8000 {
311 compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0";
312 reg = <0xe8000 0x1000>;
313 };
314
315 serdes: serdes@ea000 {
316 compatible = "fsl,p3041-serdes";
317 reg = <0xea000 0x1000>;
318 };
319
320/include/ "qoriq-dma-0.dtsi"
321/include/ "qoriq-dma-1.dtsi"
322/include/ "qoriq-espi-0.dtsi"
323 spi@110000 {
324 fsl,espi-num-chipselects = <4>;
325 };
326
327/include/ "qoriq-esdhc-0.dtsi"
328 sdhc@114000 {
329 sdhci,auto-cmd12;
330 };
331
332/include/ "qoriq-i2c-0.dtsi"
333/include/ "qoriq-i2c-1.dtsi"
334/include/ "qoriq-duart-0.dtsi"
335/include/ "qoriq-duart-1.dtsi"
336/include/ "qoriq-gpio-0.dtsi"
337/include/ "qoriq-usb2-mph-0.dtsi"
338 usb0: usb@210000 {
339 phy_type = "utmi";
340 port0;
341 };
342
343/include/ "qoriq-usb2-dr-0.dtsi"
344 usb1: usb@211000 {
345 dr_mode = "host";
346 phy_type = "utmi";
347 };
348
349/include/ "qoriq-sata2-0.dtsi"
350/include/ "qoriq-sata2-1.dtsi"
351/include/ "qoriq-sec4.2-0.dtsi"
352};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
new file mode 100644
index 000000000000..136def3536b6
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -0,0 +1,112 @@
1/*
2 * P3041 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P3041";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 ccsr = &soc;
44 dcsr = &dcsr;
45
46 serial0 = &serial0;
47 serial1 = &serial1;
48 serial2 = &serial2;
49 serial3 = &serial3;
50 pci0 = &pci0;
51 pci1 = &pci1;
52 pci2 = &pci2;
53 pci3 = &pci3;
54 usb0 = &usb0;
55 usb1 = &usb1;
56 dma0 = &dma0;
57 dma1 = &dma1;
58 sdhc = &sdhc;
59 msi0 = &msi0;
60 msi1 = &msi1;
61 msi2 = &msi2;
62
63 crypto = &crypto;
64 sec_jr0 = &sec_jr0;
65 sec_jr1 = &sec_jr1;
66 sec_jr2 = &sec_jr2;
67 sec_jr3 = &sec_jr3;
68 rtic_a = &rtic_a;
69 rtic_b = &rtic_b;
70 rtic_c = &rtic_c;
71 rtic_d = &rtic_d;
72 sec_mon = &sec_mon;
73 };
74
75 cpus {
76 #address-cells = <1>;
77 #size-cells = <0>;
78
79 cpu0: PowerPC,e500mc@0 {
80 device_type = "cpu";
81 reg = <0>;
82 next-level-cache = <&L2_0>;
83 L2_0: l2-cache {
84 next-level-cache = <&cpc>;
85 };
86 };
87 cpu1: PowerPC,e500mc@1 {
88 device_type = "cpu";
89 reg = <1>;
90 next-level-cache = <&L2_1>;
91 L2_1: l2-cache {
92 next-level-cache = <&cpc>;
93 };
94 };
95 cpu2: PowerPC,e500mc@2 {
96 device_type = "cpu";
97 reg = <2>;
98 next-level-cache = <&L2_2>;
99 L2_2: l2-cache {
100 next-level-cache = <&cpc>;
101 };
102 };
103 cpu3: PowerPC,e500mc@3 {
104 device_type = "cpu";
105 reg = <3>;
106 next-level-cache = <&L2_3>;
107 L2_3: l2-cache {
108 next-level-cache = <&cpc>;
109 };
110 };
111 };
112};
diff --git a/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
new file mode 100644
index 000000000000..a63edd195ae5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
@@ -0,0 +1,296 @@
1/*
2 * P3060 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96&rio {
97 compatible = "fsl,srio";
98 interrupts = <16 2 1 11>;
99 #address-cells = <2>;
100 #size-cells = <2>;
101 fsl,srio-rmu-handle = <&rmu>;
102 ranges;
103
104 port1 {
105 #address-cells = <2>;
106 #size-cells = <2>;
107 cell-index = <1>;
108 };
109
110 port2 {
111 #address-cells = <2>;
112 #size-cells = <2>;
113 cell-index = <2>;
114 };
115};
116
117&dcsr {
118 #address-cells = <1>;
119 #size-cells = <1>;
120 compatible = "fsl,dcsr", "simple-bus";
121
122 dcsr-epu@0 {
123 compatible = "fsl,dcsr-epu";
124 interrupts = <52 2 0 0
125 84 2 0 0
126 85 2 0 0>;
127 reg = <0x0 0x1000>;
128 };
129 dcsr-npc {
130 compatible = "fsl,dcsr-npc";
131 reg = <0x1000 0x1000 0x1000000 0x8000>;
132 };
133 dcsr-nxc@2000 {
134 compatible = "fsl,dcsr-nxc";
135 reg = <0x2000 0x1000>;
136 };
137 dcsr-corenet {
138 compatible = "fsl,dcsr-corenet";
139 reg = <0x8000 0x1000 0xB0000 0x1000>;
140 };
141 dcsr-dpaa@9000 {
142 compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa";
143 reg = <0x9000 0x1000>;
144 };
145 dcsr-ocn@11000 {
146 compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn";
147 reg = <0x11000 0x1000>;
148 };
149 dcsr-ddr@12000 {
150 compatible = "fsl,dcsr-ddr";
151 dev-handle = <&ddr1>;
152 reg = <0x12000 0x1000>;
153 };
154 dcsr-nal@18000 {
155 compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal";
156 reg = <0x18000 0x1000>;
157 };
158 dcsr-rcpm@22000 {
159 compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm";
160 reg = <0x22000 0x1000>;
161 };
162 dcsr-cpu-sb-proxy@40000 {
163 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
164 cpu-handle = <&cpu0>;
165 reg = <0x40000 0x1000>;
166 };
167 dcsr-cpu-sb-proxy@41000 {
168 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
169 cpu-handle = <&cpu1>;
170 reg = <0x41000 0x1000>;
171 };
172 dcsr-cpu-sb-proxy@44000 {
173 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
174 cpu-handle = <&cpu4>;
175 reg = <0x44000 0x1000>;
176 };
177 dcsr-cpu-sb-proxy@45000 {
178 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
179 cpu-handle = <&cpu5>;
180 reg = <0x45000 0x1000>;
181 };
182 dcsr-cpu-sb-proxy@46000 {
183 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
184 cpu-handle = <&cpu6>;
185 reg = <0x46000 0x1000>;
186 };
187 dcsr-cpu-sb-proxy@47000 {
188 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
189 cpu-handle = <&cpu7>;
190 reg = <0x47000 0x1000>;
191 };
192
193};
194
195&soc {
196 #address-cells = <1>;
197 #size-cells = <1>;
198 device_type = "soc";
199 compatible = "simple-bus";
200
201 soc-sram-error {
202 compatible = "fsl,soc-sram-error";
203 interrupts = <16 2 1 29>;
204 };
205
206 corenet-law@0 {
207 compatible = "fsl,corenet-law";
208 reg = <0x0 0x1000>;
209 fsl,num-laws = <32>;
210 };
211
212 ddr1: memory-controller@8000 {
213 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
214 reg = <0x8000 0x1000>;
215 interrupts = <16 2 1 23>;
216 };
217
218 cpc: l3-cache-controller@10000 {
219 compatible = "fsl,p3060-l3-cache-controller", "cache";
220 reg = <0x10000 0x1000
221 0x11000 0x1000>;
222 interrupts = <16 2 1 27
223 16 2 1 26>;
224 };
225
226 corenet-cf@18000 {
227 compatible = "fsl,corenet-cf";
228 reg = <0x18000 0x1000>;
229 interrupts = <16 2 1 31>;
230 fsl,ccf-num-csdids = <32>;
231 fsl,ccf-num-snoopids = <32>;
232 };
233
234 iommu@20000 {
235 compatible = "fsl,pamu-v1.0", "fsl,pamu";
236 reg = <0x20000 0x5000>;
237 interrupts = <
238 24 2 0 0
239 16 2 1 30>;
240 };
241
242/include/ "qoriq-rmu-0.dtsi"
243/include/ "qoriq-mpic.dtsi"
244
245 guts: global-utilities@e0000 {
246 compatible = "fsl,qoriq-device-config-1.0";
247 reg = <0xe0000 0xe00>;
248 fsl,has-rstcr;
249 #sleep-cells = <1>;
250 fsl,liodn-bits = <12>;
251 };
252
253 pins: global-utilities@e0e00 {
254 compatible = "fsl,qoriq-pin-control-1.0";
255 reg = <0xe0e00 0x200>;
256 #sleep-cells = <2>;
257 };
258
259 clockgen: global-utilities@e1000 {
260 compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0";
261 reg = <0xe1000 0x1000>;
262 clock-frequency = <0>;
263 };
264
265 rcpm: global-utilities@e2000 {
266 compatible = "fsl,qoriq-rcpm-1.0";
267 reg = <0xe2000 0x1000>;
268 #sleep-cells = <1>;
269 };
270
271 sfp: sfp@e8000 {
272 compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0";
273 reg = <0xe8000 0x1000>;
274 };
275
276 serdes: serdes@ea000 {
277 compatible = "fsl,p3060-serdes";
278 reg = <0xea000 0x1000>;
279 };
280
281/include/ "qoriq-dma-0.dtsi"
282/include/ "qoriq-dma-1.dtsi"
283/include/ "qoriq-espi-0.dtsi"
284 spi@110000 {
285 fsl,espi-num-chipselects = <4>;
286 };
287
288/include/ "qoriq-i2c-0.dtsi"
289/include/ "qoriq-i2c-1.dtsi"
290/include/ "qoriq-duart-0.dtsi"
291/include/ "qoriq-duart-1.dtsi"
292/include/ "qoriq-gpio-0.dtsi"
293/include/ "qoriq-usb2-mph-0.dtsi"
294/include/ "qoriq-usb2-dr-0.dtsi"
295/include/ "qoriq-sec4.1-0.dtsi"
296};
diff --git a/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi
new file mode 100644
index 000000000000..00c8e70e7b90
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi
@@ -0,0 +1,125 @@
1/*
2 * P3060 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P3060";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 ccsr = &soc;
44 dcsr = &dcsr;
45
46 serial0 = &serial0;
47 serial1 = &serial1;
48 serial2 = &serial2;
49 serial3 = &serial3;
50 pci0 = &pci0;
51 pci1 = &pci1;
52 usb0 = &usb0;
53 usb1 = &usb1;
54 dma0 = &dma0;
55 dma1 = &dma1;
56 msi0 = &msi0;
57 msi1 = &msi1;
58 msi2 = &msi2;
59
60 crypto = &crypto;
61 sec_jr0 = &sec_jr0;
62 sec_jr1 = &sec_jr1;
63 sec_jr2 = &sec_jr2;
64 sec_jr3 = &sec_jr3;
65 rtic_a = &rtic_a;
66 rtic_b = &rtic_b;
67 rtic_c = &rtic_c;
68 rtic_d = &rtic_d;
69 sec_mon = &sec_mon;
70 };
71
72 cpus {
73 #address-cells = <1>;
74 #size-cells = <0>;
75
76 cpu0: PowerPC,e500mc@0 {
77 device_type = "cpu";
78 reg = <0>;
79 next-level-cache = <&L2_0>;
80 L2_0: l2-cache {
81 next-level-cache = <&cpc>;
82 };
83 };
84 cpu1: PowerPC,e500mc@1 {
85 device_type = "cpu";
86 reg = <1>;
87 next-level-cache = <&L2_1>;
88 L2_1: l2-cache {
89 next-level-cache = <&cpc>;
90 };
91 };
92 cpu4: PowerPC,e500mc@4 {
93 device_type = "cpu";
94 reg = <4>;
95 next-level-cache = <&L2_4>;
96 L2_4: l2-cache {
97 next-level-cache = <&cpc>;
98 };
99 };
100 cpu5: PowerPC,e500mc@5 {
101 device_type = "cpu";
102 reg = <5>;
103 next-level-cache = <&L2_5>;
104 L2_5: l2-cache {
105 next-level-cache = <&cpc>;
106 };
107 };
108 cpu6: PowerPC,e500mc@6 {
109 device_type = "cpu";
110 reg = <6>;
111 next-level-cache = <&L2_6>;
112 L2_6: l2-cache {
113 next-level-cache = <&cpc>;
114 };
115 };
116 cpu7: PowerPC,e500mc@7 {
117 device_type = "cpu";
118 reg = <7>;
119 next-level-cache = <&L2_7>;
120 L2_7: l2-cache {
121 next-level-cache = <&cpc>;
122 };
123 };
124 };
125};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
new file mode 100644
index 000000000000..8d35d2c1f694
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -0,0 +1,350 @@
1/*
2 * P4080/P4040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p4080-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p4080-pcie";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p4080-pcie";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123&rio {
124 compatible = "fsl,srio";
125 interrupts = <16 2 1 11>;
126 #address-cells = <2>;
127 #size-cells = <2>;
128 fsl,srio-rmu-handle = <&rmu>;
129 ranges;
130
131 port1 {
132 #address-cells = <2>;
133 #size-cells = <2>;
134 cell-index = <1>;
135 };
136
137 port2 {
138 #address-cells = <2>;
139 #size-cells = <2>;
140 cell-index = <2>;
141 };
142};
143
144&dcsr {
145 #address-cells = <1>;
146 #size-cells = <1>;
147 compatible = "fsl,dcsr", "simple-bus";
148
149 dcsr-epu@0 {
150 compatible = "fsl,dcsr-epu";
151 interrupts = <52 2 0 0
152 84 2 0 0
153 85 2 0 0>;
154 reg = <0x0 0x1000>;
155 };
156 dcsr-npc {
157 compatible = "fsl,dcsr-npc";
158 reg = <0x1000 0x1000 0x1000000 0x8000>;
159 };
160 dcsr-nxc@2000 {
161 compatible = "fsl,dcsr-nxc";
162 reg = <0x2000 0x1000>;
163 };
164 dcsr-corenet {
165 compatible = "fsl,dcsr-corenet";
166 reg = <0x8000 0x1000 0xB0000 0x1000>;
167 };
168 dcsr-dpaa@9000 {
169 compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
170 reg = <0x9000 0x1000>;
171 };
172 dcsr-ocn@11000 {
173 compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
174 reg = <0x11000 0x1000>;
175 };
176 dcsr-ddr@12000 {
177 compatible = "fsl,dcsr-ddr";
178 dev-handle = <&ddr1>;
179 reg = <0x12000 0x1000>;
180 };
181 dcsr-ddr@13000 {
182 compatible = "fsl,dcsr-ddr";
183 dev-handle = <&ddr2>;
184 reg = <0x13000 0x1000>;
185 };
186 dcsr-nal@18000 {
187 compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
188 reg = <0x18000 0x1000>;
189 };
190 dcsr-rcpm@22000 {
191 compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
192 reg = <0x22000 0x1000>;
193 };
194 dcsr-cpu-sb-proxy@40000 {
195 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
196 cpu-handle = <&cpu0>;
197 reg = <0x40000 0x1000>;
198 };
199 dcsr-cpu-sb-proxy@41000 {
200 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
201 cpu-handle = <&cpu1>;
202 reg = <0x41000 0x1000>;
203 };
204 dcsr-cpu-sb-proxy@42000 {
205 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
206 cpu-handle = <&cpu2>;
207 reg = <0x42000 0x1000>;
208 };
209 dcsr-cpu-sb-proxy@43000 {
210 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
211 cpu-handle = <&cpu3>;
212 reg = <0x43000 0x1000>;
213 };
214 dcsr-cpu-sb-proxy@44000 {
215 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
216 cpu-handle = <&cpu4>;
217 reg = <0x44000 0x1000>;
218 };
219 dcsr-cpu-sb-proxy@45000 {
220 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
221 cpu-handle = <&cpu5>;
222 reg = <0x45000 0x1000>;
223 };
224 dcsr-cpu-sb-proxy@46000 {
225 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
226 cpu-handle = <&cpu6>;
227 reg = <0x46000 0x1000>;
228 };
229 dcsr-cpu-sb-proxy@47000 {
230 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
231 cpu-handle = <&cpu7>;
232 reg = <0x47000 0x1000>;
233 };
234
235};
236
237&soc {
238 #address-cells = <1>;
239 #size-cells = <1>;
240 device_type = "soc";
241 compatible = "simple-bus";
242
243 soc-sram-error {
244 compatible = "fsl,soc-sram-error";
245 interrupts = <16 2 1 29>;
246 };
247
248 corenet-law@0 {
249 compatible = "fsl,corenet-law";
250 reg = <0x0 0x1000>;
251 fsl,num-laws = <32>;
252 };
253
254 ddr1: memory-controller@8000 {
255 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
256 reg = <0x8000 0x1000>;
257 interrupts = <16 2 1 23>;
258 };
259
260 ddr2: memory-controller@9000 {
261 compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
262 reg = <0x9000 0x1000>;
263 interrupts = <16 2 1 22>;
264 };
265
266 cpc: l3-cache-controller@10000 {
267 compatible = "fsl,p4080-l3-cache-controller", "cache";
268 reg = <0x10000 0x1000
269 0x11000 0x1000>;
270 interrupts = <16 2 1 27
271 16 2 1 26>;
272 };
273
274 corenet-cf@18000 {
275 compatible = "fsl,corenet-cf";
276 reg = <0x18000 0x1000>;
277 interrupts = <16 2 1 31>;
278 fsl,ccf-num-csdids = <32>;
279 fsl,ccf-num-snoopids = <32>;
280 };
281
282 iommu@20000 {
283 compatible = "fsl,pamu-v1.0", "fsl,pamu";
284 reg = <0x20000 0x5000>;
285 interrupts = <
286 24 2 0 0
287 16 2 1 30>;
288 };
289
290/include/ "qoriq-rmu-0.dtsi"
291/include/ "qoriq-mpic.dtsi"
292
293 guts: global-utilities@e0000 {
294 compatible = "fsl,qoriq-device-config-1.0";
295 reg = <0xe0000 0xe00>;
296 fsl,has-rstcr;
297 #sleep-cells = <1>;
298 fsl,liodn-bits = <12>;
299 };
300
301 pins: global-utilities@e0e00 {
302 compatible = "fsl,qoriq-pin-control-1.0";
303 reg = <0xe0e00 0x200>;
304 #sleep-cells = <2>;
305 };
306
307 clockgen: global-utilities@e1000 {
308 compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
309 reg = <0xe1000 0x1000>;
310 clock-frequency = <0>;
311 };
312
313 rcpm: global-utilities@e2000 {
314 compatible = "fsl,qoriq-rcpm-1.0";
315 reg = <0xe2000 0x1000>;
316 #sleep-cells = <1>;
317 };
318
319 sfp: sfp@e8000 {
320 compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";
321 reg = <0xe8000 0x1000>;
322 };
323
324 serdes: serdes@ea000 {
325 compatible = "fsl,p4080-serdes";
326 reg = <0xea000 0x1000>;
327 };
328
329/include/ "qoriq-dma-0.dtsi"
330/include/ "qoriq-dma-1.dtsi"
331/include/ "qoriq-espi-0.dtsi"
332 spi@110000 {
333 fsl,espi-num-chipselects = <4>;
334 };
335
336/include/ "qoriq-esdhc-0.dtsi"
337 sdhc@114000 {
338 voltage-ranges = <3300 3300>;
339 sdhci,auto-cmd12;
340 };
341
342/include/ "qoriq-i2c-0.dtsi"
343/include/ "qoriq-i2c-1.dtsi"
344/include/ "qoriq-duart-0.dtsi"
345/include/ "qoriq-duart-1.dtsi"
346/include/ "qoriq-gpio-0.dtsi"
347/include/ "qoriq-usb2-mph-0.dtsi"
348/include/ "qoriq-usb2-dr-0.dtsi"
349/include/ "qoriq-sec4.0-0.dtsi"
350};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
new file mode 100644
index 000000000000..b9556ee3a639
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -0,0 +1,143 @@
1/*
2 * P4080/P4040 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P4080";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 ccsr = &soc;
44 dcsr = &dcsr;
45
46 serial0 = &serial0;
47 serial1 = &serial1;
48 serial2 = &serial2;
49 serial3 = &serial3;
50 pci0 = &pci0;
51 pci1 = &pci1;
52 pci2 = &pci2;
53 usb0 = &usb0;
54 usb1 = &usb1;
55 dma0 = &dma0;
56 dma1 = &dma1;
57 sdhc = &sdhc;
58 msi0 = &msi0;
59 msi1 = &msi1;
60 msi2 = &msi2;
61
62 crypto = &crypto;
63 sec_jr0 = &sec_jr0;
64 sec_jr1 = &sec_jr1;
65 sec_jr2 = &sec_jr2;
66 sec_jr3 = &sec_jr3;
67 rtic_a = &rtic_a;
68 rtic_b = &rtic_b;
69 rtic_c = &rtic_c;
70 rtic_d = &rtic_d;
71 sec_mon = &sec_mon;
72 };
73
74 cpus {
75 #address-cells = <1>;
76 #size-cells = <0>;
77
78 cpu0: PowerPC,e500mc@0 {
79 device_type = "cpu";
80 reg = <0>;
81 next-level-cache = <&L2_0>;
82 L2_0: l2-cache {
83 next-level-cache = <&cpc>;
84 };
85 };
86 cpu1: PowerPC,e500mc@1 {
87 device_type = "cpu";
88 reg = <1>;
89 next-level-cache = <&L2_1>;
90 L2_1: l2-cache {
91 next-level-cache = <&cpc>;
92 };
93 };
94 cpu2: PowerPC,e500mc@2 {
95 device_type = "cpu";
96 reg = <2>;
97 next-level-cache = <&L2_2>;
98 L2_2: l2-cache {
99 next-level-cache = <&cpc>;
100 };
101 };
102 cpu3: PowerPC,e500mc@3 {
103 device_type = "cpu";
104 reg = <3>;
105 next-level-cache = <&L2_3>;
106 L2_3: l2-cache {
107 next-level-cache = <&cpc>;
108 };
109 };
110 cpu4: PowerPC,e500mc@4 {
111 device_type = "cpu";
112 reg = <4>;
113 next-level-cache = <&L2_4>;
114 L2_4: l2-cache {
115 next-level-cache = <&cpc>;
116 };
117 };
118 cpu5: PowerPC,e500mc@5 {
119 device_type = "cpu";
120 reg = <5>;
121 next-level-cache = <&L2_5>;
122 L2_5: l2-cache {
123 next-level-cache = <&cpc>;
124 };
125 };
126 cpu6: PowerPC,e500mc@6 {
127 device_type = "cpu";
128 reg = <6>;
129 next-level-cache = <&L2_6>;
130 L2_6: l2-cache {
131 next-level-cache = <&cpc>;
132 };
133 };
134 cpu7: PowerPC,e500mc@7 {
135 device_type = "cpu";
136 reg = <7>;
137 next-level-cache = <&L2_7>;
138 L2_7: l2-cache {
139 next-level-cache = <&cpc>;
140 };
141 };
142 };
143};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
new file mode 100644
index 000000000000..914074b91a85
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -0,0 +1,355 @@
1/*
2 * P5020/5010 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123/* controller at 0x203000 */
124&pci3 {
125 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
126 device_type = "pci";
127 #size-cells = <2>;
128 #address-cells = <3>;
129 bus-range = <0x0 0xff>;
130 clock-frequency = <33333333>;
131 interrupts = <16 2 1 12>;
132 pcie@0 {
133 reg = <0 0 0 0 0>;
134 #interrupt-cells = <1>;
135 #size-cells = <2>;
136 #address-cells = <3>;
137 device_type = "pci";
138 interrupts = <16 2 1 12>;
139 interrupt-map-mask = <0xf800 0 0 7>;
140 interrupt-map = <
141 /* IDSEL 0x0 */
142 0000 0 0 1 &mpic 43 1 0 0
143 0000 0 0 2 &mpic 0 1 0 0
144 0000 0 0 3 &mpic 4 1 0 0
145 0000 0 0 4 &mpic 8 1 0 0
146 >;
147 };
148};
149
150&rio {
151 compatible = "fsl,srio";
152 interrupts = <16 2 1 11>;
153 #address-cells = <2>;
154 #size-cells = <2>;
155 ranges;
156
157 port1 {
158 #address-cells = <2>;
159 #size-cells = <2>;
160 cell-index = <1>;
161 };
162
163 port2 {
164 #address-cells = <2>;
165 #size-cells = <2>;
166 cell-index = <2>;
167 };
168};
169
170&dcsr {
171 #address-cells = <1>;
172 #size-cells = <1>;
173 compatible = "fsl,dcsr", "simple-bus";
174
175 dcsr-epu@0 {
176 compatible = "fsl,dcsr-epu";
177 interrupts = <52 2 0 0
178 84 2 0 0
179 85 2 0 0>;
180 reg = <0x0 0x1000>;
181 };
182 dcsr-npc {
183 compatible = "fsl,dcsr-npc";
184 reg = <0x1000 0x1000 0x1000000 0x8000>;
185 };
186 dcsr-nxc@2000 {
187 compatible = "fsl,dcsr-nxc";
188 reg = <0x2000 0x1000>;
189 };
190 dcsr-corenet {
191 compatible = "fsl,dcsr-corenet";
192 reg = <0x8000 0x1000 0xB0000 0x1000>;
193 };
194 dcsr-dpaa@9000 {
195 compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa";
196 reg = <0x9000 0x1000>;
197 };
198 dcsr-ocn@11000 {
199 compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn";
200 reg = <0x11000 0x1000>;
201 };
202 dcsr-ddr@12000 {
203 compatible = "fsl,dcsr-ddr";
204 dev-handle = <&ddr1>;
205 reg = <0x12000 0x1000>;
206 };
207 dcsr-ddr@13000 {
208 compatible = "fsl,dcsr-ddr";
209 dev-handle = <&ddr2>;
210 reg = <0x13000 0x1000>;
211 };
212 dcsr-nal@18000 {
213 compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal";
214 reg = <0x18000 0x1000>;
215 };
216 dcsr-rcpm@22000 {
217 compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm";
218 reg = <0x22000 0x1000>;
219 };
220 dcsr-cpu-sb-proxy@40000 {
221 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
222 cpu-handle = <&cpu0>;
223 reg = <0x40000 0x1000>;
224 };
225 dcsr-cpu-sb-proxy@41000 {
226 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
227 cpu-handle = <&cpu1>;
228 reg = <0x41000 0x1000>;
229 };
230};
231
232&soc {
233 #address-cells = <1>;
234 #size-cells = <1>;
235 device_type = "soc";
236 compatible = "simple-bus";
237
238 soc-sram-error {
239 compatible = "fsl,soc-sram-error";
240 interrupts = <16 2 1 29>;
241 };
242
243 corenet-law@0 {
244 compatible = "fsl,corenet-law";
245 reg = <0x0 0x1000>;
246 fsl,num-laws = <32>;
247 };
248
249 ddr1: memory-controller@8000 {
250 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
251 reg = <0x8000 0x1000>;
252 interrupts = <16 2 1 23>;
253 };
254
255 ddr2: memory-controller@9000 {
256 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
257 reg = <0x9000 0x1000>;
258 interrupts = <16 2 1 22>;
259 };
260
261 cpc: l3-cache-controller@10000 {
262 compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
263 reg = <0x10000 0x1000
264 0x11000 0x1000>;
265 interrupts = <16 2 1 27
266 16 2 1 26>;
267 };
268
269 corenet-cf@18000 {
270 compatible = "fsl,corenet-cf";
271 reg = <0x18000 0x1000>;
272 interrupts = <16 2 1 31>;
273 fsl,ccf-num-csdids = <32>;
274 fsl,ccf-num-snoopids = <32>;
275 };
276
277 iommu@20000 {
278 compatible = "fsl,pamu-v1.0", "fsl,pamu";
279 reg = <0x20000 0x4000>;
280 interrupts = <
281 24 2 0 0
282 16 2 1 30>;
283 };
284
285/include/ "qoriq-mpic.dtsi"
286
287 guts: global-utilities@e0000 {
288 compatible = "fsl,qoriq-device-config-1.0";
289 reg = <0xe0000 0xe00>;
290 fsl,has-rstcr;
291 #sleep-cells = <1>;
292 fsl,liodn-bits = <12>;
293 };
294
295 pins: global-utilities@e0e00 {
296 compatible = "fsl,qoriq-pin-control-1.0";
297 reg = <0xe0e00 0x200>;
298 #sleep-cells = <2>;
299 };
300
301 clockgen: global-utilities@e1000 {
302 compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
303 reg = <0xe1000 0x1000>;
304 clock-frequency = <0>;
305 };
306
307 rcpm: global-utilities@e2000 {
308 compatible = "fsl,qoriq-rcpm-1.0";
309 reg = <0xe2000 0x1000>;
310 #sleep-cells = <1>;
311 };
312
313 sfp: sfp@e8000 {
314 compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
315 reg = <0xe8000 0x1000>;
316 };
317
318 serdes: serdes@ea000 {
319 compatible = "fsl,p5020-serdes";
320 reg = <0xea000 0x1000>;
321 };
322
323/include/ "qoriq-dma-0.dtsi"
324/include/ "qoriq-dma-1.dtsi"
325/include/ "qoriq-espi-0.dtsi"
326 spi@110000 {
327 fsl,espi-num-chipselects = <4>;
328 };
329
330/include/ "qoriq-esdhc-0.dtsi"
331 sdhc@114000 {
332 sdhci,auto-cmd12;
333 };
334
335/include/ "qoriq-i2c-0.dtsi"
336/include/ "qoriq-i2c-1.dtsi"
337/include/ "qoriq-duart-0.dtsi"
338/include/ "qoriq-duart-1.dtsi"
339/include/ "qoriq-gpio-0.dtsi"
340/include/ "qoriq-usb2-mph-0.dtsi"
341 usb0: usb@210000 {
342 phy_type = "utmi";
343 port0;
344 };
345
346/include/ "qoriq-usb2-dr-0.dtsi"
347 usb1: usb@211000 {
348 dr_mode = "host";
349 phy_type = "utmi";
350 };
351
352/include/ "qoriq-sata2-0.dtsi"
353/include/ "qoriq-sata2-1.dtsi"
354/include/ "qoriq-sec4.2-0.dtsi"
355};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
new file mode 100644
index 000000000000..ae823a47584e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -0,0 +1,96 @@
1/*
2 * P5020/P5010 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P5020";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 ccsr = &soc;
44 dcsr = &dcsr;
45
46 serial0 = &serial0;
47 serial1 = &serial1;
48 serial2 = &serial2;
49 serial3 = &serial3;
50 pci0 = &pci0;
51 pci1 = &pci1;
52 pci2 = &pci2;
53 pci3 = &pci3;
54 usb0 = &usb0;
55 usb1 = &usb1;
56 dma0 = &dma0;
57 dma1 = &dma1;
58 sdhc = &sdhc;
59 msi0 = &msi0;
60 msi1 = &msi1;
61 msi2 = &msi2;
62
63 crypto = &crypto;
64 sec_jr0 = &sec_jr0;
65 sec_jr1 = &sec_jr1;
66 sec_jr2 = &sec_jr2;
67 sec_jr3 = &sec_jr3;
68 rtic_a = &rtic_a;
69 rtic_b = &rtic_b;
70 rtic_c = &rtic_c;
71 rtic_d = &rtic_d;
72 sec_mon = &sec_mon;
73 };
74
75 cpus {
76 #address-cells = <1>;
77 #size-cells = <0>;
78
79 cpu0: PowerPC,e5500@0 {
80 device_type = "cpu";
81 reg = <0>;
82 next-level-cache = <&L2_0>;
83 L2_0: l2-cache {
84 next-level-cache = <&cpc>;
85 };
86 };
87 cpu1: PowerPC,e5500@1 {
88 device_type = "cpu";
89 reg = <1>;
90 next-level-cache = <&L2_1>;
91 L2_1: l2-cache {
92 next-level-cache = <&cpc>;
93 };
94 };
95 };
96};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi
new file mode 100644
index 000000000000..b5b37ad30e75
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi
@@ -0,0 +1,66 @@
1/*
2 * PQ3 DMA device tree stub [ controller @ offset 0x21000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma@21300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,eloplus-dma";
39 reg = <0x21300 0x4>;
40 ranges = <0x0 0x21100 0x200>;
41 cell-index = <0>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 cell-index = <0>;
46 interrupts = <20 2 0 0>;
47 };
48 dma-channel@80 {
49 compatible = "fsl,eloplus-dma-channel";
50 reg = <0x80 0x80>;
51 cell-index = <1>;
52 interrupts = <21 2 0 0>;
53 };
54 dma-channel@100 {
55 compatible = "fsl,eloplus-dma-channel";
56 reg = <0x100 0x80>;
57 cell-index = <2>;
58 interrupts = <22 2 0 0>;
59 };
60 dma-channel@180 {
61 compatible = "fsl,eloplus-dma-channel";
62 reg = <0x180 0x80>;
63 cell-index = <3>;
64 interrupts = <23 2 0 0>;
65 };
66};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi
new file mode 100644
index 000000000000..28cb8a55d807
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi
@@ -0,0 +1,66 @@
1/*
2 * PQ3 DMA device tree stub [ controller @ offset 0xc300 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma@c300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,eloplus-dma";
39 reg = <0xc300 0x4>;
40 ranges = <0x0 0xc100 0x200>;
41 cell-index = <1>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 cell-index = <0>;
46 interrupts = <76 2 0 0>;
47 };
48 dma-channel@80 {
49 compatible = "fsl,eloplus-dma-channel";
50 reg = <0x80 0x80>;
51 cell-index = <1>;
52 interrupts = <77 2 0 0>;
53 };
54 dma-channel@100 {
55 compatible = "fsl,eloplus-dma-channel";
56 reg = <0x100 0x80>;
57 cell-index = <2>;
58 interrupts = <78 2 0 0>;
59 };
60 dma-channel@180 {
61 compatible = "fsl,eloplus-dma-channel";
62 reg = <0x180 0x80>;
63 cell-index = <3>;
64 interrupts = <79 2 0 0>;
65 };
66};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi
new file mode 100644
index 000000000000..5e268fdb9d1f
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi
@@ -0,0 +1,51 @@
1/*
2 * PQ3 DUART device tree stub [ controller @ offset 0x4000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35serial0: serial@4500 {
36 cell-index = <0>;
37 device_type = "serial";
38 compatible = "fsl,ns16550", "ns16550";
39 reg = <0x4500 0x100>;
40 clock-frequency = <0>;
41 interrupts = <42 2 0 0>;
42};
43
44serial1: serial@4600 {
45 cell-index = <1>;
46 device_type = "serial";
47 compatible = "fsl,ns16550", "ns16550";
48 reg = <0x4600 0x100>;
49 clock-frequency = <0>;
50 interrupts = <42 2 0 0>;
51};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi
new file mode 100644
index 000000000000..5743433e278e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi
@@ -0,0 +1,41 @@
1/*
2 * PQ3 eSDHC device tree stub [ controller @ offset 0x2e000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sdhc@2e000 {
36 compatible = "fsl,esdhc";
37 reg = <0x2e000 0x1000>;
38 interrupts = <72 0x2 0 0>;
39 /* Filled in by U-Boot */
40 clock-frequency = <0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi
new file mode 100644
index 000000000000..75854b2e0391
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi
@@ -0,0 +1,41 @@
1/*
2 * PQ3 eSPI device tree stub [ controller @ offset 0x7000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35spi@7000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 compatible = "fsl,mpc8536-espi";
39 reg = <0x7000 0x1000>;
40 interrupts = <59 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi
new file mode 100644
index 000000000000..a1979ae334a7
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi
@@ -0,0 +1,53 @@
1/*
2 * PQ3 eTSEC device tree stub [ @ offsets 0x24000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35ethernet@24000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <0>;
39 device_type = "network";
40 model = "eTSEC";
41 compatible = "gianfar";
42 reg = <0x24000 0x1000>;
43 ranges = <0x0 0x24000 0x1000>;
44 local-mac-address = [ 00 00 00 00 00 00 ];
45 interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
46};
47
48mdio@24520 {
49 #address-cells = <1>;
50 #size-cells = <0>;
51 compatible = "fsl,gianfar-mdio";
52 reg = <0x24520 0x20>;
53};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi
new file mode 100644
index 000000000000..4c4fdde1ec2a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi
@@ -0,0 +1,53 @@
1/*
2 * PQ3 eTSEC device tree stub [ @ offsets 0x25000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35ethernet@25000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <1>;
39 device_type = "network";
40 model = "eTSEC";
41 compatible = "gianfar";
42 reg = <0x25000 0x1000>;
43 ranges = <0x0 0x25000 0x1000>;
44 local-mac-address = [ 00 00 00 00 00 00 ];
45 interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
46};
47
48mdio@25520 {
49 #address-cells = <1>;
50 #size-cells = <0>;
51 compatible = "fsl,gianfar-tbi";
52 reg = <0x25520 0x20>;
53};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi
new file mode 100644
index 000000000000..4b8ab438668a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi
@@ -0,0 +1,53 @@
1/*
2 * PQ3 eTSEC device tree stub [ @ offsets 0x26000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35ethernet@26000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <2>;
39 device_type = "network";
40 model = "eTSEC";
41 compatible = "gianfar";
42 reg = <0x26000 0x1000>;
43 ranges = <0x0 0x26000 0x1000>;
44 local-mac-address = [ 00 00 00 00 00 00 ];
45 interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
46};
47
48mdio@26520 {
49 #address-cells = <1>;
50 #size-cells = <0>;
51 compatible = "fsl,gianfar-tbi";
52 reg = <0x26520 0x20>;
53};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi
new file mode 100644
index 000000000000..40c9137729ae
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi
@@ -0,0 +1,53 @@
1/*
2 * PQ3 eTSEC device tree stub [ @ offsets 0x27000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35ethernet@27000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <3>;
39 device_type = "network";
40 model = "eTSEC";
41 compatible = "gianfar";
42 reg = <0x27000 0x1000>;
43 ranges = <0x0 0x27000 0x1000>;
44 local-mac-address = [ 00 00 00 00 00 00 ];
45 interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>;
46};
47
48mdio@27520 {
49 #address-cells = <1>;
50 #size-cells = <0>;
51 compatible = "fsl,gianfar-tbi";
52 reg = <0x27520 0x20>;
53};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi
new file mode 100644
index 000000000000..efe2ca04bce8
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi
@@ -0,0 +1,39 @@
1/*
2 * PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35ptp_clock@24e00 {
36 compatible = "fsl,etsec-ptp";
37 reg = <0x24e00 0xb0>;
38 interrupts = <68 2 0 0 69 2 0 0>;
39};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi
new file mode 100644
index 000000000000..1382fec9e8c5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi
@@ -0,0 +1,60 @@
1/*
2 * PQ3 eTSEC2 device tree stub [ @ offsets 0x24000/0xb0000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35
36mdio@24000 {
37 #address-cells = <1>;
38 #size-cells = <0>;
39 compatible = "fsl,etsec2-mdio";
40 reg = <0x24000 0x1000 0xb0030 0x4>;
41};
42
43ethernet@b0000 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 device_type = "network";
47 model = "eTSEC";
48 compatible = "fsl,etsec2";
49 fsl,num_rx_queues = <0x8>;
50 fsl,num_tx_queues = <0x8>;
51 fsl,magic-packet;
52 local-mac-address = [ 00 00 00 00 00 00 ];
53
54 queue-group@b0000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 reg = <0xb0000 0x1000>;
58 interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
59 };
60};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi
new file mode 100644
index 000000000000..221cd2ea5b31
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi
@@ -0,0 +1,60 @@
1/*
2 * PQ3 eTSEC2 device tree stub [ @ offsets 0x25000/0xb1000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35
36mdio@25000 {
37 #address-cells = <1>;
38 #size-cells = <0>;
39 compatible = "fsl,etsec2-tbi";
40 reg = <0x25000 0x1000 0xb1030 0x4>;
41};
42
43ethernet@b1000 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 device_type = "network";
47 model = "eTSEC";
48 compatible = "fsl,etsec2";
49 fsl,num_rx_queues = <0x8>;
50 fsl,num_tx_queues = <0x8>;
51 fsl,magic-packet;
52 local-mac-address = [ 00 00 00 00 00 00 ];
53
54 queue-group@b1000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 reg = <0xb1000 0x1000>;
58 interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
59 };
60};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi
new file mode 100644
index 000000000000..61456c317609
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi
@@ -0,0 +1,59 @@
1/*
2 * PQ3 eTSEC2 device tree stub [ @ offsets 0x26000/0xb2000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35mdio@26000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 compatible = "fsl,etsec2-tbi";
39 reg = <0x26000 0x1000 0xb1030 0x4>;
40};
41
42ethernet@b2000 {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 device_type = "network";
46 model = "eTSEC";
47 compatible = "fsl,etsec2";
48 fsl,num_rx_queues = <0x8>;
49 fsl,num_tx_queues = <0x8>;
50 fsl,magic-packet;
51 local-mac-address = [ 00 00 00 00 00 00 ];
52
53 queue-group@b2000 {
54 #address-cells = <1>;
55 #size-cells = <1>;
56 reg = <0xb2000 0x1000>;
57 interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
58 };
59};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi
new file mode 100644
index 000000000000..034ab8fac22f
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi
@@ -0,0 +1,42 @@
1/*
2 * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb4000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&enet0_grp2 {
36 queue-group@b4000 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0xb4000 0x1000>;
40 interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>;
41 };
42};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi
new file mode 100644
index 000000000000..3be9ba3b374e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi
@@ -0,0 +1,42 @@
1/*
2 * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb5000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&enet1_grp2 {
36 queue-group@b5000 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0xb5000 0x1000>;
40 interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>;
41 };
42};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi
new file mode 100644
index 000000000000..02a33457048c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi
@@ -0,0 +1,42 @@
1/*
2 * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb6000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&enet2_grp2 {
36 queue-group@b6000 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0xb6000 0x1000>;
40 interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>;
41 };
42};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi
new file mode 100644
index 000000000000..72a3ef5945c1
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi
@@ -0,0 +1,41 @@
1/*
2 * PQ3 GPIO device tree stub [ controller @ offset 0xf000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35gpio-controller@f000 {
36 #gpio-cells = <2>;
37 compatible = "fsl,pq3-gpio";
38 reg = <0xf000 0x100>;
39 interrupts = <47 0x2 0 0>;
40 gpio-controller;
41};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi
new file mode 100644
index 000000000000..d1dd6fb82a78
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi
@@ -0,0 +1,43 @@
1/*
2 * PQ3 I2C device tree stub [ controller @ offset 0x3000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35i2c@3000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 cell-index = <0>;
39 compatible = "fsl-i2c";
40 reg = <0x3000 0x100>;
41 interrupts = <43 2 0 0>;
42 dfsrr;
43};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi
new file mode 100644
index 000000000000..a9bd803e2090
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi
@@ -0,0 +1,43 @@
1/*
2 * PQ3 I2C device tree stub [ controller @ offset 0x3100 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35i2c@3100 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 cell-index = <1>;
39 compatible = "fsl-i2c";
40 reg = <0x3100 0x100>;
41 interrupts = <43 2 0 0>;
42 dfsrr;
43};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
new file mode 100644
index 000000000000..8734cffae1a1
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
@@ -0,0 +1,42 @@
1/*
2 * PQ3 MPIC Timer (Group B) device tree stub [ controller @ offset 0x42100 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35timer@42100 {
36 compatible = "fsl,mpic-global-timer";
37 reg = <0x42100 0x100 0x42300 4>;
38 interrupts = <4 0 3 0
39 5 0 3 0
40 6 0 3 0
41 7 0 3 0>;
42};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
new file mode 100644
index 000000000000..5c8046065844
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -0,0 +1,66 @@
1/*
2 * PQ3 MPIC device tree stub [ controller @ offset 0x40000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35mpic: pic@40000 {
36 interrupt-controller;
37 #address-cells = <0>;
38 #interrupt-cells = <4>;
39 reg = <0x40000 0x40000>;
40 compatible = "fsl,mpic";
41 device_type = "open-pic";
42};
43
44timer@41100 {
45 compatible = "fsl,mpic-global-timer";
46 reg = <0x41100 0x100 0x41300 4>;
47 interrupts = <0 0 3 0
48 1 0 3 0
49 2 0 3 0
50 3 0 3 0>;
51};
52
53msi@41600 {
54 compatible = "fsl,mpic-msi";
55 reg = <0x41600 0x80>;
56 msi-available-ranges = <0 0x100>;
57 interrupts = <
58 0xe0 0 0 0
59 0xe1 0 0 0
60 0xe2 0 0 0
61 0xe3 0 0 0
62 0xe4 0 0 0
63 0xe5 0 0 0
64 0xe6 0 0 0
65 0xe7 0 0 0>;
66};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi
new file mode 100644
index 000000000000..587ca9ffad7d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi
@@ -0,0 +1,68 @@
1/*
2 * PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35rmu: rmu@d3000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,srio-rmu";
39 reg = <0xd3000 0x500>;
40 ranges = <0x0 0xd3000 0x500>;
41
42 message-unit@0 {
43 compatible = "fsl,srio-msg-unit";
44 reg = <0x0 0x100>;
45 interrupts = <
46 53 2 0 0 /* msg1_tx_irq */
47 54 2 0 0>;/* msg1_rx_irq */
48 };
49 message-unit@100 {
50 compatible = "fsl,srio-msg-unit";
51 reg = <0x100 0x100>;
52 interrupts = <
53 55 2 0 0 /* msg2_tx_irq */
54 56 2 0 0>;/* msg2_rx_irq */
55 };
56 doorbell-unit@400 {
57 compatible = "fsl,srio-dbell-unit";
58 reg = <0x400 0x80>;
59 interrupts = <
60 49 2 0 0 /* bell_outb_irq */
61 50 2 0 0>;/* bell_inb_irq */
62 };
63 port-write-unit@4e0 {
64 compatible = "fsl,srio-port-write-unit";
65 reg = <0x4e0 0x20>;
66 interrupts = <48 2 0 0>;
67 };
68};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi
new file mode 100644
index 000000000000..3c28dd08d38b
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi
@@ -0,0 +1,40 @@
1/*
2 * PQ3 SATAv2 device tree stub [ controller @ offset 0x18000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sata@18000 {
36 compatible = "fsl,pq-sata-v2";
37 reg = <0x18000 0x1000>;
38 cell-index = <1>;
39 interrupts = <74 0x2 0 0>;
40};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi
new file mode 100644
index 000000000000..eefaf2855e3b
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi
@@ -0,0 +1,40 @@
1/*
2 * PQ3 SATAv2 device tree stub [ controller @ offset 0x19000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sata@19000 {
36 compatible = "fsl,pq-sata-v2";
37 reg = <0x19000 0x1000>;
38 cell-index = <2>;
39 interrupts = <41 0x2 0 0>;
40};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi
new file mode 100644
index 000000000000..02a5c7ae72d0
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi
@@ -0,0 +1,43 @@
1/*
2 * PQ3 Sec/Crypto 2.1 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36 compatible = "fsl,sec2.1", "fsl,sec2.0";
37 reg = <0x30000 0x10000>;
38 interrupts = <45 2 0 0>;
39 fsl,num-channels = <4>;
40 fsl,channel-fifo-len = <24>;
41 fsl,exec-units-mask = <0xfe>;
42 fsl,descriptor-types-mask = <0x12b0ebf>;
43};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi
new file mode 100644
index 000000000000..bba1ba44ccf0
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi
@@ -0,0 +1,45 @@
1/*
2 * PQ3 Sec/Crypto 3.0 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36 compatible = "fsl,sec3.0",
37 "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
38 "fsl,sec2.0";
39 reg = <0x30000 0x10000>;
40 interrupts = <45 2 0 0 58 2 0 0>;
41 fsl,num-channels = <4>;
42 fsl,channel-fifo-len = <24>;
43 fsl,exec-units-mask = <0x9fe>;
44 fsl,descriptor-types-mask = <0x3ab0ebf>;
45};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi
new file mode 100644
index 000000000000..8f0a5669bee5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi
@@ -0,0 +1,45 @@
1/*
2 * PQ3 Sec/Crypto 3.1 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36 compatible = "fsl,sec3.1", "fsl,sec3.0",
37 "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
38 "fsl,sec2.0";
39 reg = <0x30000 0x10000>;
40 interrupts = <45 2 0 0 58 2 0 0>;
41 fsl,num-channels = <4>;
42 fsl,channel-fifo-len = <24>;
43 fsl,exec-units-mask = <0xbfe>;
44 fsl,descriptor-types-mask = <0x3ab0ebf>;
45};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi
new file mode 100644
index 000000000000..c227f2748a24
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi
@@ -0,0 +1,45 @@
1/*
2 * PQ3 Sec/Crypto 3.3 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36 compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
37 "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
38 "fsl,sec2.0";
39 reg = <0x30000 0x10000>;
40 interrupts = <45 2 0 0 58 2 0 0>;
41 fsl,num-channels = <4>;
42 fsl,channel-fifo-len = <24>;
43 fsl,exec-units-mask = <0x97c>;
44 fsl,descriptor-types-mask = <0x3a30abf>;
45};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
new file mode 100644
index 000000000000..bf957a7fca2a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
@@ -0,0 +1,65 @@
1/*
2 * PQ3 Sec/Crypto 4.4 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36 compatible = "fsl,sec4.4", "fsl,sec4.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x30000 0x10000>;
40 interrupts = <58 2 0 0>;
41
42 sec_jr0: jr@1000 {
43 compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
44 reg = <0x1000 0x1000>;
45 interrupts = <45 2 0 0>;
46 };
47
48 sec_jr1: jr@2000 {
49 compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
50 reg = <0x2000 0x1000>;
51 interrupts = <45 2 0 0>;
52 };
53
54 sec_jr2: jr@3000 {
55 compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
56 reg = <0x3000 0x1000>;
57 interrupts = <45 2 0 0>;
58 };
59
60 sec_jr3: jr@4000 {
61 compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
62 reg = <0x4000 0x1000>;
63 interrupts = <45 2 0 0>;
64 };
65};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi
new file mode 100644
index 000000000000..185ab9dc3ecd
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi
@@ -0,0 +1,41 @@
1/*
2 * PQ3 USB DR device tree stub [ controller @ offset 0x22000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35usb@22000 {
36 compatible = "fsl-usb2-dr";
37 reg = <0x22000 0x1000>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <28 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi
new file mode 100644
index 000000000000..fe24cd612fff
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi
@@ -0,0 +1,41 @@
1/*
2 * PQ3 USB DR device tree stub [ controller @ offset 0x23000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35usb@23000 {
36 compatible = "fsl-usb2-dr";
37 reg = <0x23000 0x1000>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <46 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi
new file mode 100644
index 000000000000..1aebf3ea4ca5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi
@@ -0,0 +1,66 @@
1/*
2 * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma0: dma@100300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,eloplus-dma";
39 reg = <0x100300 0x4>;
40 ranges = <0x0 0x100100 0x200>;
41 cell-index = <0>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 cell-index = <0>;
46 interrupts = <28 2 0 0>;
47 };
48 dma-channel@80 {
49 compatible = "fsl,eloplus-dma-channel";
50 reg = <0x80 0x80>;
51 cell-index = <1>;
52 interrupts = <29 2 0 0>;
53 };
54 dma-channel@100 {
55 compatible = "fsl,eloplus-dma-channel";
56 reg = <0x100 0x80>;
57 cell-index = <2>;
58 interrupts = <30 2 0 0>;
59 };
60 dma-channel@180 {
61 compatible = "fsl,eloplus-dma-channel";
62 reg = <0x180 0x80>;
63 cell-index = <3>;
64 interrupts = <31 2 0 0>;
65 };
66};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi
new file mode 100644
index 000000000000..ecf5e180fe79
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi
@@ -0,0 +1,66 @@
1/*
2 * QorIQ DMA device tree stub [ controller @ offset 0x101000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma1: dma@101300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,eloplus-dma";
39 reg = <0x101300 0x4>;
40 ranges = <0x0 0x101100 0x200>;
41 cell-index = <1>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 cell-index = <0>;
46 interrupts = <32 2 0 0>;
47 };
48 dma-channel@80 {
49 compatible = "fsl,eloplus-dma-channel";
50 reg = <0x80 0x80>;
51 cell-index = <1>;
52 interrupts = <33 2 0 0>;
53 };
54 dma-channel@100 {
55 compatible = "fsl,eloplus-dma-channel";
56 reg = <0x100 0x80>;
57 cell-index = <2>;
58 interrupts = <34 2 0 0>;
59 };
60 dma-channel@180 {
61 compatible = "fsl,eloplus-dma-channel";
62 reg = <0x180 0x80>;
63 cell-index = <3>;
64 interrupts = <35 2 0 0>;
65 };
66};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi
new file mode 100644
index 000000000000..225c07b4e8ab
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi
@@ -0,0 +1,51 @@
1/*
2 * QorIQ DUART device tree stub [ controller @ offset 0x11c000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35serial0: serial@11c500 {
36 cell-index = <0>;
37 device_type = "serial";
38 compatible = "fsl,ns16550", "ns16550";
39 reg = <0x11c500 0x100>;
40 clock-frequency = <0>;
41 interrupts = <36 2 0 0>;
42};
43
44serial1: serial@11c600 {
45 cell-index = <1>;
46 device_type = "serial";
47 compatible = "fsl,ns16550", "ns16550";
48 reg = <0x11c600 0x100>;
49 clock-frequency = <0>;
50 interrupts = <36 2 0 0>;
51};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi
new file mode 100644
index 000000000000..d23233a56b91
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi
@@ -0,0 +1,51 @@
1/*
2 * QorIQ DUART device tree stub [ controller @ offset 0x11d000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35serial2: serial@11d500 {
36 cell-index = <2>;
37 device_type = "serial";
38 compatible = "fsl,ns16550", "ns16550";
39 reg = <0x11d500 0x100>;
40 clock-frequency = <0>;
41 interrupts = <37 2 0 0>;
42};
43
44serial3: serial@11d600 {
45 cell-index = <3>;
46 device_type = "serial";
47 compatible = "fsl,ns16550", "ns16550";
48 reg = <0x11d600 0x100>;
49 clock-frequency = <0>;
50 interrupts = <37 2 0 0>;
51};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi
new file mode 100644
index 000000000000..20835ae216c7
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi
@@ -0,0 +1,40 @@
1/*
2 * QorIQ eSDHC device tree stub [ controller @ offset 0x114000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sdhc: sdhc@114000 {
36 compatible = "fsl,esdhc";
37 reg = <0x114000 0x1000>;
38 interrupts = <48 2 0 0>;
39 clock-frequency = <0>;
40};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi
new file mode 100644
index 000000000000..6db06975e095
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi
@@ -0,0 +1,41 @@
1/*
2 * QorIQ eSPI device tree stub [ controller @ offset 0x110000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35spi@110000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 compatible = "fsl,mpc8536-espi";
39 reg = <0x110000 0x1000>;
40 interrupts = <53 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi
new file mode 100644
index 000000000000..cf714f5f68bc
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi
@@ -0,0 +1,41 @@
1/*
2 * QorIQ GPIO device tree stub [ controller @ offset 0x130000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35gpio0: gpio@130000 {
36 compatible = "fsl,qoriq-gpio";
37 reg = <0x130000 0x1000>;
38 interrupts = <55 2 0 0>;
39 #gpio-cells = <2>;
40 gpio-controller;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi
new file mode 100644
index 000000000000..5f9bf7debe4c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi
@@ -0,0 +1,53 @@
1/*
2 * QorIQ I2C device tree stub [ controller @ offset 0x118000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35i2c@118000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 cell-index = <0>;
39 compatible = "fsl-i2c";
40 reg = <0x118000 0x100>;
41 interrupts = <38 2 0 0>;
42 dfsrr;
43};
44
45i2c@118100 {
46 #address-cells = <1>;
47 #size-cells = <0>;
48 cell-index = <1>;
49 compatible = "fsl-i2c";
50 reg = <0x118100 0x100>;
51 interrupts = <38 2 0 0>;
52 dfsrr;
53};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi
new file mode 100644
index 000000000000..7989bf5eeb53
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi
@@ -0,0 +1,53 @@
1/*
2 * QorIQ I2C device tree stub [ controller @ offset 0x119000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35i2c@119000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 cell-index = <2>;
39 compatible = "fsl-i2c";
40 reg = <0x119000 0x100>;
41 interrupts = <39 2 0 0>;
42 dfsrr;
43};
44
45i2c@119100 {
46 #address-cells = <1>;
47 #size-cells = <0>;
48 cell-index = <3>;
49 compatible = "fsl-i2c";
50 reg = <0x119100 0x100>;
51 interrupts = <39 2 0 0>;
52 dfsrr;
53};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
new file mode 100644
index 000000000000..b9bada6a87dc
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
@@ -0,0 +1,106 @@
1/*
2 * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35mpic: pic@40000 {
36 interrupt-controller;
37 #address-cells = <0>;
38 #interrupt-cells = <4>;
39 reg = <0x40000 0x40000>;
40 compatible = "fsl,mpic", "chrp,open-pic";
41 device_type = "open-pic";
42 clock-frequency = <0x0>;
43};
44
45timer@41100 {
46 compatible = "fsl,mpic-global-timer";
47 reg = <0x41100 0x100 0x41300 4>;
48 interrupts = <0 0 3 0
49 1 0 3 0
50 2 0 3 0
51 3 0 3 0>;
52};
53
54msi0: msi@41600 {
55 compatible = "fsl,mpic-msi";
56 reg = <0x41600 0x200>;
57 msi-available-ranges = <0 0x100>;
58 interrupts = <
59 0xe0 0 0 0
60 0xe1 0 0 0
61 0xe2 0 0 0
62 0xe3 0 0 0
63 0xe4 0 0 0
64 0xe5 0 0 0
65 0xe6 0 0 0
66 0xe7 0 0 0>;
67};
68
69msi1: msi@41800 {
70 compatible = "fsl,mpic-msi";
71 reg = <0x41800 0x200>;
72 msi-available-ranges = <0 0x100>;
73 interrupts = <
74 0xe8 0 0 0
75 0xe9 0 0 0
76 0xea 0 0 0
77 0xeb 0 0 0
78 0xec 0 0 0
79 0xed 0 0 0
80 0xee 0 0 0
81 0xef 0 0 0>;
82};
83
84msi2: msi@41a00 {
85 compatible = "fsl,mpic-msi";
86 reg = <0x41a00 0x200>;
87 msi-available-ranges = <0 0x100>;
88 interrupts = <
89 0xf0 0 0 0
90 0xf1 0 0 0
91 0xf2 0 0 0
92 0xf3 0 0 0
93 0xf4 0 0 0
94 0xf5 0 0 0
95 0xf6 0 0 0
96 0xf7 0 0 0>;
97};
98
99timer@42100 {
100 compatible = "fsl,mpic-global-timer";
101 reg = <0x42100 0x100 0x42300 4>;
102 interrupts = <4 0 3 0
103 5 0 3 0
104 6 0 3 0
105 7 0 3 0>;
106};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi
new file mode 100644
index 000000000000..ca7fec792e53
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi
@@ -0,0 +1,68 @@
1/*
2 * QorIQ RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35rmu: rmu@d3000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,srio-rmu";
39 reg = <0xd3000 0x500>;
40 ranges = <0x0 0xd3000 0x500>;
41
42 message-unit@0 {
43 compatible = "fsl,srio-msg-unit";
44 reg = <0x0 0x100>;
45 interrupts = <
46 60 2 0 0 /* msg1_tx_irq */
47 61 2 0 0>;/* msg1_rx_irq */
48 };
49 message-unit@100 {
50 compatible = "fsl,srio-msg-unit";
51 reg = <0x100 0x100>;
52 interrupts = <
53 62 2 0 0 /* msg2_tx_irq */
54 63 2 0 0>;/* msg2_rx_irq */
55 };
56 doorbell-unit@400 {
57 compatible = "fsl,srio-dbell-unit";
58 reg = <0x400 0x80>;
59 interrupts = <
60 56 2 0 0 /* bell_outb_irq */
61 57 2 0 0>;/* bell_inb_irq */
62 };
63 port-write-unit@4e0 {
64 compatible = "fsl,srio-port-write-unit";
65 reg = <0x4e0 0x20>;
66 interrupts = <16 2 1 11>;
67 };
68};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi
new file mode 100644
index 000000000000..b642047fdecf
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi
@@ -0,0 +1,39 @@
1/*
2 * QorIQ SATAv2 device tree stub [ controller @ offset 0x220000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sata@220000 {
36 compatible = "fsl,pq-sata-v2";
37 reg = <0x220000 0x1000>;
38 interrupts = <68 0x2 0 0>;
39};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi
new file mode 100644
index 000000000000..c57370259750
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi
@@ -0,0 +1,39 @@
1/*
2 * QorIQ SATAv2 device tree stub [ controller @ offset 0x221000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sata@221000 {
36 compatible = "fsl,pq-sata-v2";
37 reg = <0x221000 0x1000>;
38 interrupts = <69 0x2 0 0>;
39};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
new file mode 100644
index 000000000000..0cbbac329539
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
@@ -0,0 +1,100 @@
1/*
2 * QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto: crypto@300000 {
36 compatible = "fsl,sec-v4.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x300000 0x10000>;
40 ranges = <0 0x300000 0x10000>;
41 interrupts = <92 2 0 0>;
42
43 sec_jr0: jr@1000 {
44 compatible = "fsl,sec-v4.0-job-ring";
45 reg = <0x1000 0x1000>;
46 interrupts = <88 2 0 0>;
47 };
48
49 sec_jr1: jr@2000 {
50 compatible = "fsl,sec-v4.0-job-ring";
51 reg = <0x2000 0x1000>;
52 interrupts = <89 2 0 0>;
53 };
54
55 sec_jr2: jr@3000 {
56 compatible = "fsl,sec-v4.0-job-ring";
57 reg = <0x3000 0x1000>;
58 interrupts = <90 2 0 0>;
59 };
60
61 sec_jr3: jr@4000 {
62 compatible = "fsl,sec-v4.0-job-ring";
63 reg = <0x4000 0x1000>;
64 interrupts = <91 2 0 0>;
65 };
66
67 rtic@6000 {
68 compatible = "fsl,sec-v4.0-rtic";
69 #address-cells = <1>;
70 #size-cells = <1>;
71 reg = <0x6000 0x100>;
72 ranges = <0x0 0x6100 0xe00>;
73
74 rtic_a: rtic-a@0 {
75 compatible = "fsl,sec-v4.0-rtic-memory";
76 reg = <0x00 0x20 0x100 0x80>;
77 };
78
79 rtic_b: rtic-b@20 {
80 compatible = "fsl,sec-v4.0-rtic-memory";
81 reg = <0x20 0x20 0x200 0x80>;
82 };
83
84 rtic_c: rtic-c@40 {
85 compatible = "fsl,sec-v4.0-rtic-memory";
86 reg = <0x40 0x20 0x300 0x80>;
87 };
88
89 rtic_d: rtic-d@60 {
90 compatible = "fsl,sec-v4.0-rtic-memory";
91 reg = <0x60 0x20 0x500 0x80>;
92 };
93 };
94};
95
96sec_mon: sec_mon@314000 {
97 compatible = "fsl,sec-v4.0-mon";
98 reg = <0x314000 0x1000>;
99 interrupts = <93 2 0 0>;
100};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi
new file mode 100644
index 000000000000..3308986bba0d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi
@@ -0,0 +1,109 @@
1/*
2 * QorIQ Sec/Crypto 4.1 device tree stub [ controller @ offset 0x300000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto: crypto@300000 {
36 compatible = "fsl,sec-v4.1", "fsl,sec-v4.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x300000 0x10000>;
40 ranges = <0 0x300000 0x10000>;
41 interrupts = <92 2 0 0>;
42
43 sec_jr0: jr@1000 {
44 compatible = "fsl,sec-v4.1-job-ring",
45 "fsl,sec-v4.0-job-ring";
46 reg = <0x1000 0x1000>;
47 interrupts = <88 2 0 0>;
48 };
49
50 sec_jr1: jr@2000 {
51 compatible = "fsl,sec-v4.1-job-ring",
52 "fsl,sec-v4.0-job-ring";
53 reg = <0x2000 0x1000>;
54 interrupts = <89 2 0 0>;
55 };
56
57 sec_jr2: jr@3000 {
58 compatible = "fsl,sec-v4.1-job-ring",
59 "fsl,sec-v4.0-job-ring";
60 reg = <0x3000 0x1000>;
61 interrupts = <90 2 0 0>;
62 };
63
64 sec_jr3: jr@4000 {
65 compatible = "fsl,sec-v4.1-job-ring",
66 "fsl,sec-v4.0-job-ring";
67 reg = <0x4000 0x1000>;
68 interrupts = <91 2 0 0>;
69 };
70
71 rtic@6000 {
72 compatible = "fsl,sec-v4.1-rtic",
73 "fsl,sec-v4.0-rtic";
74 #address-cells = <1>;
75 #size-cells = <1>;
76 reg = <0x6000 0x100>;
77 ranges = <0x0 0x6100 0xe00>;
78
79 rtic_a: rtic-a@0 {
80 compatible = "fsl,sec-v4.1-rtic-memory",
81 "fsl,sec-v4.0-rtic-memory";
82 reg = <0x00 0x20 0x100 0x80>;
83 };
84
85 rtic_b: rtic-b@20 {
86 compatible = "fsl,sec-v4.1-rtic-memory",
87 "fsl,sec-v4.0-rtic-memory";
88 reg = <0x20 0x20 0x200 0x80>;
89 };
90
91 rtic_c: rtic-c@40 {
92 compatible = "fsl,sec-v4.1-rtic-memory",
93 "fsl,sec-v4.0-rtic-memory";
94 reg = <0x40 0x20 0x300 0x80>;
95 };
96
97 rtic_d: rtic-d@60 {
98 compatible = "fsl,sec-v4.1-rtic-memory",
99 "fsl,sec-v4.0-rtic-memory";
100 reg = <0x60 0x20 0x500 0x80>;
101 };
102 };
103};
104
105sec_mon: sec_mon@314000 {
106 compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon";
107 reg = <0x314000 0x1000>;
108 interrupts = <93 2 0 0>;
109};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
new file mode 100644
index 000000000000..7990e0d3d6f2
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
@@ -0,0 +1,109 @@
1/*
2 * QorIQ Sec/Crypto 4.2 device tree stub [ controller @ offset 0x300000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto: crypto@300000 {
36 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x300000 0x10000>;
40 ranges = <0 0x300000 0x10000>;
41 interrupts = <92 2 0 0>;
42
43 sec_jr0: jr@1000 {
44 compatible = "fsl,sec-v4.2-job-ring",
45 "fsl,sec-v4.0-job-ring";
46 reg = <0x1000 0x1000>;
47 interrupts = <88 2 0 0>;
48 };
49
50 sec_jr1: jr@2000 {
51 compatible = "fsl,sec-v4.2-job-ring",
52 "fsl,sec-v4.0-job-ring";
53 reg = <0x2000 0x1000>;
54 interrupts = <89 2 0 0>;
55 };
56
57 sec_jr2: jr@3000 {
58 compatible = "fsl,sec-v4.2-job-ring",
59 "fsl,sec-v4.0-job-ring";
60 reg = <0x3000 0x1000>;
61 interrupts = <90 2 0 0>;
62 };
63
64 sec_jr3: jr@4000 {
65 compatible = "fsl,sec-v4.2-job-ring",
66 "fsl,sec-v4.0-job-ring";
67 reg = <0x4000 0x1000>;
68 interrupts = <91 2 0 0>;
69 };
70
71 rtic@6000 {
72 compatible = "fsl,sec-v4.2-rtic",
73 "fsl,sec-v4.0-rtic";
74 #address-cells = <1>;
75 #size-cells = <1>;
76 reg = <0x6000 0x100>;
77 ranges = <0x0 0x6100 0xe00>;
78
79 rtic_a: rtic-a@0 {
80 compatible = "fsl,sec-v4.2-rtic-memory",
81 "fsl,sec-v4.0-rtic-memory";
82 reg = <0x00 0x20 0x100 0x80>;
83 };
84
85 rtic_b: rtic-b@20 {
86 compatible = "fsl,sec-v4.2-rtic-memory",
87 "fsl,sec-v4.0-rtic-memory";
88 reg = <0x20 0x20 0x200 0x80>;
89 };
90
91 rtic_c: rtic-c@40 {
92 compatible = "fsl,sec-v4.2-rtic-memory",
93 "fsl,sec-v4.0-rtic-memory";
94 reg = <0x40 0x20 0x300 0x80>;
95 };
96
97 rtic_d: rtic-d@60 {
98 compatible = "fsl,sec-v4.2-rtic-memory",
99 "fsl,sec-v4.0-rtic-memory";
100 reg = <0x60 0x20 0x500 0x80>;
101 };
102 };
103};
104
105sec_mon: sec_mon@314000 {
106 compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
107 reg = <0x314000 0x1000>;
108 interrupts = <93 2 0 0>;
109};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi
new file mode 100644
index 000000000000..4dd6f84c239c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi
@@ -0,0 +1,41 @@
1/*
2 * QorIQ USB DR device tree stub [ controller @ offset 0x211000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35usb@211000 {
36 compatible = "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
37 reg = <0x211000 0x1000>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <45 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi
new file mode 100644
index 000000000000..f053835aa1c7
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi
@@ -0,0 +1,41 @@
1/*
2 * QorIQ USB Host device tree stub [ controller @ offset 0x210000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35usb@210000 {
36 compatible = "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
37 reg = <0x210000 0x1000>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <44 0x2 0 0>;
41};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-23 01:55:37 -0500