aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig101
-rw-r--r--arch/mips/Makefile1
-rw-r--r--arch/mips/arc/identify.c1
-rw-r--r--arch/mips/au1000/common/au1xxx_irqmap.c1
-rw-r--r--arch/mips/au1000/common/dbdma.c9
-rw-r--r--arch/mips/au1000/common/dbg_io.c1
-rw-r--r--arch/mips/au1000/common/dma.c1
-rw-r--r--arch/mips/au1000/common/gpio.c1
-rw-r--r--arch/mips/au1000/common/irq.c37
-rw-r--r--arch/mips/au1000/common/pci.c1
-rw-r--r--arch/mips/au1000/common/platform.c1
-rw-r--r--arch/mips/au1000/common/power.c23
-rw-r--r--arch/mips/au1000/common/reset.c1
-rw-r--r--arch/mips/au1000/common/setup.c1
-rw-r--r--arch/mips/au1000/common/time.c1
-rw-r--r--arch/mips/au1000/common/usbdev.c8
-rw-r--r--arch/mips/au1000/csb250/board_setup.c1
-rw-r--r--arch/mips/au1000/csb250/init.c6
-rw-r--r--arch/mips/au1000/db1x00/board_setup.c1
-rw-r--r--arch/mips/au1000/db1x00/init.c1
-rw-r--r--arch/mips/au1000/db1x00/irqmap.c1
-rw-r--r--arch/mips/au1000/db1x00/mirage_ts.c1
-rw-r--r--arch/mips/au1000/hydrogen3/board_setup.c1
-rw-r--r--arch/mips/au1000/hydrogen3/init.c1
-rw-r--r--arch/mips/au1000/mtx-1/board_setup.c1
-rw-r--r--arch/mips/au1000/pb1000/board_setup.c1
-rw-r--r--arch/mips/au1000/pb1100/board_setup.c1
-rw-r--r--arch/mips/au1000/pb1200/board_setup.c1
-rw-r--r--arch/mips/au1000/pb1200/irqmap.c3
-rw-r--r--arch/mips/au1000/pb1500/board_setup.c1
-rw-r--r--arch/mips/au1000/xxs1500/board_setup.c1
-rw-r--r--arch/mips/basler/excite/excite_iodev.c2
-rw-r--r--arch/mips/basler/excite/excite_setup.c2
-rw-r--r--arch/mips/cobalt/console.c1
-rw-r--r--arch/mips/cobalt/setup.c1
-rw-r--r--arch/mips/ddb5xxx/common/prom.c3
-rw-r--r--arch/mips/ddb5xxx/ddb5477/irq.c1
-rw-r--r--arch/mips/ddb5xxx/ddb5477/irq_5477.c2
-rw-r--r--arch/mips/ddb5xxx/ddb5477/setup.c1
-rw-r--r--arch/mips/dec/int-handler.S1
-rw-r--r--arch/mips/dec/ioasic-irq.c4
-rw-r--r--arch/mips/dec/kn02-irq.c2
-rw-r--r--arch/mips/dec/prom/init.c1
-rw-r--r--arch/mips/dec/prom/memory.c1
-rw-r--r--arch/mips/dec/setup.c4
-rw-r--r--arch/mips/galileo-boards/ev96100/setup.c1
-rw-r--r--arch/mips/galileo-boards/ev96100/time.c1
-rw-r--r--arch/mips/gt64120/common/Makefile1
-rw-r--r--arch/mips/gt64120/common/pci.c147
-rw-r--r--arch/mips/gt64120/common/time.c3
-rw-r--r--arch/mips/gt64120/ev64120/irq.c2
-rw-r--r--arch/mips/gt64120/momenco_ocelot/dbg_io.c1
-rw-r--r--arch/mips/gt64120/momenco_ocelot/setup.c4
-rw-r--r--arch/mips/gt64120/wrppmc/Makefile2
-rw-r--r--arch/mips/gt64120/wrppmc/int-handler.S59
-rw-r--r--arch/mips/gt64120/wrppmc/irq.c20
-rw-r--r--arch/mips/gt64120/wrppmc/setup.c2
-rw-r--r--arch/mips/gt64120/wrppmc/time.c4
-rw-r--r--arch/mips/ite-boards/generic/dbg_io.c1
-rw-r--r--arch/mips/ite-boards/generic/irq.c4
-rw-r--r--arch/mips/ite-boards/generic/it8172_cir.c1
-rw-r--r--arch/mips/ite-boards/generic/it8172_setup.c1
-rw-r--r--arch/mips/ite-boards/generic/pmon_prom.c1
-rw-r--r--arch/mips/jazz/irq.c2
-rw-r--r--arch/mips/jazz/setup.c1
-rw-r--r--arch/mips/jmr3927/rbhma3100/init.c1
-rw-r--r--arch/mips/jmr3927/rbhma3100/irq.c3
-rw-r--r--arch/mips/jmr3927/rbhma3100/setup.c1
-rw-r--r--arch/mips/kernel/apm.c2
-rw-r--r--arch/mips/kernel/asm-offsets.c1
-rw-r--r--arch/mips/kernel/cpu-bugs64.c1
-rw-r--r--arch/mips/kernel/cpu-probe.c3
-rw-r--r--arch/mips/kernel/entry.S9
-rw-r--r--arch/mips/kernel/gdb-low.S5
-rw-r--r--arch/mips/kernel/gdb-stub.c1
-rw-r--r--arch/mips/kernel/genex.S3
-rw-r--r--arch/mips/kernel/head.S3
-rw-r--r--arch/mips/kernel/i8259.c4
-rw-r--r--arch/mips/kernel/irixelf.c2
-rw-r--r--arch/mips/kernel/irq-msc01.c4
-rw-r--r--arch/mips/kernel/irq-mv6434x.c2
-rw-r--r--arch/mips/kernel/irq-rm7000.c2
-rw-r--r--arch/mips/kernel/irq-rm9000.c4
-rw-r--r--arch/mips/kernel/irq.c5
-rw-r--r--arch/mips/kernel/irq_cpu.c4
-rw-r--r--arch/mips/kernel/linux32.c1
-rw-r--r--arch/mips/kernel/mips-mt.c6
-rw-r--r--arch/mips/kernel/mips_ksyms.c1
-rw-r--r--arch/mips/kernel/proc.c1
-rw-r--r--arch/mips/kernel/process.c1
-rw-r--r--arch/mips/kernel/ptrace.c1
-rw-r--r--arch/mips/kernel/r2300_switch.S1
-rw-r--r--arch/mips/kernel/r4k_fpu.S1
-rw-r--r--arch/mips/kernel/r4k_switch.S7
-rw-r--r--arch/mips/kernel/rtlx.c2
-rw-r--r--arch/mips/kernel/scall32-o32.S2
-rw-r--r--arch/mips/kernel/scall64-64.S2
-rw-r--r--arch/mips/kernel/scall64-n32.S2
-rw-r--r--arch/mips/kernel/scall64-o32.S2
-rw-r--r--arch/mips/kernel/setup.c6
-rw-r--r--arch/mips/kernel/signal-common.h1
-rw-r--r--arch/mips/kernel/signal.c1
-rw-r--r--arch/mips/kernel/smp-mt.c4
-rw-r--r--arch/mips/kernel/smtc-asm.S10
-rw-r--r--arch/mips/kernel/smtc.c2
-rw-r--r--arch/mips/kernel/syscall.c9
-rw-r--r--arch/mips/kernel/time.c3
-rw-r--r--arch/mips/kernel/traps.c16
-rw-r--r--arch/mips/kernel/unaligned.c1
-rw-r--r--arch/mips/kernel/vmlinux.lds.S1
-rw-r--r--arch/mips/lasat/interrupt.c2
-rw-r--r--arch/mips/lasat/lasat_board.c1
-rw-r--r--arch/mips/lasat/reset.c1
-rw-r--r--arch/mips/lasat/setup.c1
-rw-r--r--arch/mips/lasat/sysctl.c1
-rw-r--r--arch/mips/lib-32/dump_tlb.c1
-rw-r--r--arch/mips/lib-64/dump_tlb.c1
-rw-r--r--arch/mips/lib/memcpy.S1
-rw-r--r--arch/mips/math-emu/kernel_linkage.c1
-rw-r--r--arch/mips/mips-boards/atlas/atlas_int.c2
-rw-r--r--arch/mips/mips-boards/atlas/atlas_setup.c1
-rw-r--r--arch/mips/mips-boards/generic/init.c1
-rw-r--r--arch/mips/mips-boards/generic/memory.c1
-rw-r--r--arch/mips/mips-boards/generic/printf.c1
-rw-r--r--arch/mips/mips-boards/generic/reset.c1
-rw-r--r--arch/mips/mips-boards/generic/time.c1
-rw-r--r--arch/mips/mips-boards/malta/malta_setup.c3
-rw-r--r--arch/mips/mips-boards/sead/sead_setup.c1
-rw-r--r--arch/mips/mips-boards/sim/sim_IRQ.c1
-rw-r--r--arch/mips/mips-boards/sim/sim_irq.S1
-rw-r--r--arch/mips/mips-boards/sim/sim_setup.c1
-rw-r--r--arch/mips/mips-boards/sim/sim_smp.c1
-rw-r--r--arch/mips/mips-boards/sim/sim_time.c1
-rw-r--r--arch/mips/mm/Makefile1
-rw-r--r--arch/mips/mm/c-r4k.c100
-rw-r--r--arch/mips/mm/c-sb1.c1
-rw-r--r--arch/mips/mm/cache.c1
-rw-r--r--arch/mips/mm/cerr-sb1.c1
-rw-r--r--arch/mips/mm/dma-coherent.c1
-rw-r--r--arch/mips/mm/dma-noncoherent.c1
-rw-r--r--arch/mips/mm/highmem.c1
-rw-r--r--arch/mips/mm/init.c1
-rw-r--r--arch/mips/mm/pg-sb1.c1
-rw-r--r--arch/mips/mm/pgtable-32.c1
-rw-r--r--arch/mips/mm/pgtable.c1
-rw-r--r--arch/mips/mm/sc-mips.c112
-rw-r--r--arch/mips/mm/tlb-r4k.c1
-rw-r--r--arch/mips/mm/tlb-r8k.c1
-rw-r--r--arch/mips/mm/tlbex.c1
-rw-r--r--arch/mips/momentum/jaguar_atx/dbg_io.c1
-rw-r--r--arch/mips/momentum/jaguar_atx/irq.c2
-rw-r--r--arch/mips/momentum/jaguar_atx/prom.c1
-rw-r--r--arch/mips/momentum/jaguar_atx/reset.c1
-rw-r--r--arch/mips/momentum/jaguar_atx/setup.c5
-rw-r--r--arch/mips/momentum/ocelot_3/irq.c2
-rw-r--r--arch/mips/momentum/ocelot_3/prom.c1
-rw-r--r--arch/mips/momentum/ocelot_c/cpci-irq.c2
-rw-r--r--arch/mips/momentum/ocelot_c/dbg_io.c1
-rw-r--r--arch/mips/momentum/ocelot_c/irq.c4
-rw-r--r--arch/mips/momentum/ocelot_c/ocelot_c_fpga.h1
-rw-r--r--arch/mips/momentum/ocelot_c/prom.c1
-rw-r--r--arch/mips/momentum/ocelot_c/reset.c1
-rw-r--r--arch/mips/momentum/ocelot_c/setup.c5
-rw-r--r--arch/mips/momentum/ocelot_c/uart-irq.c4
-rw-r--r--arch/mips/momentum/ocelot_g/dbg_io.c1
-rw-r--r--arch/mips/momentum/ocelot_g/gt-irq.c3
-rw-r--r--arch/mips/momentum/ocelot_g/prom.c1
-rw-r--r--arch/mips/momentum/ocelot_g/setup.c5
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c148
-rw-r--r--arch/mips/pci/Makefile2
-rw-r--r--arch/mips/pci/fixup-atlas.c1
-rw-r--r--arch/mips/pci/fixup-vr4133.c1
-rw-r--r--arch/mips/pci/ops-au1000.c1
-rw-r--r--arch/mips/pci/ops-tx4927.c8
-rw-r--r--arch/mips/pci/ops-tx4938.c8
-rw-r--r--arch/mips/pci/pci-bcm1480.c1
-rw-r--r--arch/mips/pci/pci-bcm1480ht.c1
-rw-r--r--arch/mips/pci/pci-ip32.c1
-rw-r--r--arch/mips/pci/pci-sb1250.c1
-rw-r--r--arch/mips/pci/pci.c5
-rw-r--r--arch/mips/philips/pnx8550/common/int.c15
-rw-r--r--arch/mips/philips/pnx8550/common/setup.c1
-rw-r--r--arch/mips/pmc-sierra/yosemite/ht.c5
-rw-r--r--arch/mips/pmc-sierra/yosemite/irq.c1
-rw-r--r--arch/mips/pmc-sierra/yosemite/prom.c1
-rw-r--r--arch/mips/sgi-ip22/ip22-eisa.c5
-rw-r--r--arch/mips/sgi-ip22/ip22-int.c13
-rw-r--r--arch/mips/sgi-ip22/ip22-setup.c1
-rw-r--r--arch/mips/sgi-ip27/Kconfig3
-rw-r--r--arch/mips/sgi-ip27/Makefile11
-rw-r--r--arch/mips/sgi-ip27/ip27-console.c40
-rw-r--r--arch/mips/sgi-ip27/ip27-init.c1
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c5
-rw-r--r--arch/mips/sgi-ip27/ip27-klnuma.c1
-rw-r--r--arch/mips/sgi-ip27/ip27-memory.c1
-rw-r--r--arch/mips/sgi-ip27/ip27-reset.c1
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c2
-rw-r--r--arch/mips/sgi-ip32/ip32-irq.c14
-rw-r--r--arch/mips/sgi-ip32/ip32-setup.c1
-rw-r--r--arch/mips/sibyte/Kconfig3
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c5
-rw-r--r--arch/mips/sibyte/bcm1480/setup.c1
-rw-r--r--arch/mips/sibyte/bcm1480/time.c1
-rw-r--r--arch/mips/sibyte/cfe/console.c1
-rw-r--r--arch/mips/sibyte/cfe/setup.c1
-rw-r--r--arch/mips/sibyte/sb1250/bus_watcher.c1
-rw-r--r--arch/mips/sibyte/sb1250/irq.c5
-rw-r--r--arch/mips/sibyte/sb1250/prom.c1
-rw-r--r--arch/mips/sibyte/sb1250/setup.c1
-rw-r--r--arch/mips/sibyte/sb1250/time.c1
-rw-r--r--arch/mips/sibyte/swarm/setup.c3
-rw-r--r--arch/mips/sni/irq.c2
-rw-r--r--arch/mips/sni/setup.c3
-rw-r--r--arch/mips/tx4927/common/tx4927_irq.c5
-rw-r--r--arch/mips/tx4927/common/tx4927_setup.c1
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c17
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c1
-rw-r--r--arch/mips/tx4938/common/irq.c4
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/irq.c2
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/prom.c1
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/setup.c1
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c1
-rw-r--r--arch/mips/vr41xx/common/icu.c4
-rw-r--r--arch/mips/vr41xx/common/irq.c4
-rw-r--r--arch/mips/vr41xx/common/vrc4173.c2
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/init.c1
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/irq.c2
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c1
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/setup.c1
229 files changed, 599 insertions, 712 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 35e038a974c6..747a9c1228f2 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -308,6 +308,7 @@ config MIPS_ATLAS
308 select SYS_SUPPORTS_64BIT_KERNEL 308 select SYS_SUPPORTS_64BIT_KERNEL
309 select SYS_SUPPORTS_BIG_ENDIAN 309 select SYS_SUPPORTS_BIG_ENDIAN
310 select SYS_SUPPORTS_LITTLE_ENDIAN 310 select SYS_SUPPORTS_LITTLE_ENDIAN
311 select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
311 help 312 help
312 This enables support for the MIPS Technologies Atlas evaluation 313 This enables support for the MIPS Technologies Atlas evaluation
313 board. 314 board.
@@ -324,6 +325,7 @@ config MIPS_MALTA
324 select I8259 325 select I8259
325 select MIPS_BOARDS_GEN 326 select MIPS_BOARDS_GEN
326 select MIPS_BONITO64 327 select MIPS_BONITO64
328 select MIPS_CPU_SCACHE
327 select MIPS_GT64120 329 select MIPS_GT64120
328 select MIPS_MSC 330 select MIPS_MSC
329 select SWAP_IO_SPACE 331 select SWAP_IO_SPACE
@@ -336,6 +338,7 @@ config MIPS_MALTA
336 select SYS_SUPPORTS_64BIT_KERNEL 338 select SYS_SUPPORTS_64BIT_KERNEL
337 select SYS_SUPPORTS_BIG_ENDIAN 339 select SYS_SUPPORTS_BIG_ENDIAN
338 select SYS_SUPPORTS_LITTLE_ENDIAN 340 select SYS_SUPPORTS_LITTLE_ENDIAN
341 select SYS_SUPPORTS_MULTITHREADING
339 help 342 help
340 This enables support for the MIPS Technologies Malta evaluation 343 This enables support for the MIPS Technologies Malta evaluation
341 board. 344 board.
@@ -358,7 +361,7 @@ config MIPS_SEAD
358 board. 361 board.
359 362
360config WR_PPMC 363config WR_PPMC
361 bool "Support for Wind River PPMC board" 364 bool "Wind River PPMC board"
362 select IRQ_CPU 365 select IRQ_CPU
363 select BOOT_ELF32 366 select BOOT_ELF32
364 select DMA_NONCOHERENT 367 select DMA_NONCOHERENT
@@ -536,6 +539,7 @@ config PMC_YOSEMITE
536 select SYS_SUPPORTS_64BIT_KERNEL 539 select SYS_SUPPORTS_64BIT_KERNEL
537 select SYS_SUPPORTS_BIG_ENDIAN 540 select SYS_SUPPORTS_BIG_ENDIAN
538 select SYS_SUPPORTS_HIGHMEM 541 select SYS_SUPPORTS_HIGHMEM
542 select SYS_SUPPORTS_SMP
539 help 543 help
540 Yosemite is an evaluation board for the RM9000x2 processor 544 Yosemite is an evaluation board for the RM9000x2 processor
541 manufactured by PMC-Sierra. 545 manufactured by PMC-Sierra.
@@ -590,6 +594,7 @@ config SGI_IP22
590 select SYS_SUPPORTS_32BIT_KERNEL 594 select SYS_SUPPORTS_32BIT_KERNEL
591 select SYS_SUPPORTS_64BIT_KERNEL 595 select SYS_SUPPORTS_64BIT_KERNEL
592 select SYS_SUPPORTS_BIG_ENDIAN 596 select SYS_SUPPORTS_BIG_ENDIAN
597 select SYS_SUPPORTS_SMP
593 help 598 help
594 This are the SGI Indy, Challenge S and Indigo2, as well as certain 599 This are the SGI Indy, Challenge S and Indigo2, as well as certain
595 OEM variants like the Tandem CMN B006S. To compile a Linux kernel 600 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
@@ -601,6 +606,7 @@ config SGI_IP27
601 select ARC64 606 select ARC64
602 select BOOT_ELF64 607 select BOOT_ELF64
603 select DMA_IP27 608 select DMA_IP27
609 select EARLY_PRINTK
604 select HW_HAS_PCI 610 select HW_HAS_PCI
605 select PCI_DOMAINS 611 select PCI_DOMAINS
606 select SYS_HAS_CPU_R10000 612 select SYS_HAS_CPU_R10000
@@ -1249,7 +1255,7 @@ config CPU_R6000
1249 select CPU_SUPPORTS_32BIT_KERNEL 1255 select CPU_SUPPORTS_32BIT_KERNEL
1250 help 1256 help
1251 MIPS Technologies R6000 and R6000A series processors. Note these 1257 MIPS Technologies R6000 and R6000A series processors. Note these
1252 processors are extremly rare and the support for them is incomplete. 1258 processors are extremely rare and the support for them is incomplete.
1253 1259
1254config CPU_NEVADA 1260config CPU_NEVADA
1255 bool "RM52xx" 1261 bool "RM52xx"
@@ -1370,7 +1376,7 @@ config SYS_HAS_CPU_SB1
1370endmenu 1376endmenu
1371 1377
1372# 1378#
1373# These two indicate any levelof the MIPS32 and MIPS64 architecture 1379# These two indicate any level of the MIPS32 and MIPS64 architecture
1374# 1380#
1375config CPU_MIPS32 1381config CPU_MIPS32
1376 bool 1382 bool
@@ -1381,7 +1387,7 @@ config CPU_MIPS64
1381 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 1387 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
1382 1388
1383# 1389#
1384# These two indicate the revision of the architecture, either 32 bot 64 bit. 1390# These two indicate the revision of the architecture, either Release 1 or Release 2
1385# 1391#
1386config CPU_MIPSR1 1392config CPU_MIPSR1
1387 bool 1393 bool
@@ -1474,6 +1480,13 @@ config IP22_CPU_SCACHE
1474 bool 1480 bool
1475 select BOARD_SCACHE 1481 select BOARD_SCACHE
1476 1482
1483#
1484# Support for a MIPS32 / MIPS64 style S-caches
1485#
1486config MIPS_CPU_SCACHE
1487 bool
1488 select BOARD_SCACHE
1489
1477config R5000_CPU_SCACHE 1490config R5000_CPU_SCACHE
1478 bool 1491 bool
1479 select BOARD_SCACHE 1492 select BOARD_SCACHE
@@ -1493,32 +1506,57 @@ config SIBYTE_DMA_PAGEOPS
1493config CPU_HAS_PREFETCH 1506config CPU_HAS_PREFETCH
1494 bool 1507 bool
1495 1508
1496config MIPS_MT
1497 bool "Enable MIPS MT"
1498
1499choice 1509choice
1500 prompt "MIPS MT options" 1510 prompt "MIPS MT options"
1501 depends on MIPS_MT 1511
1512config MIPS_MT_DISABLED
1513 bool "Disable multithreading support."
1514 help
1515 Use this option if your workload can't take advantage of
1516 MIPS hardware multithreading support. On systems that don't have
1517 the option of an MT-enabled processor this option will be the only
1518 option in this menu.
1502 1519
1503config MIPS_MT_SMTC 1520config MIPS_MT_SMTC
1504 bool "SMTC: Use all TCs on all VPEs for SMP" 1521 bool "SMTC: Use all TCs on all VPEs for SMP"
1522 depends on CPU_MIPS32_R2
1523 #depends on CPU_MIPS64_R2 # once there is hardware ...
1524 depends on SYS_SUPPORTS_MULTITHREADING
1505 select CPU_MIPSR2_IRQ_VI 1525 select CPU_MIPSR2_IRQ_VI
1506 select CPU_MIPSR2_SRS 1526 select CPU_MIPSR2_SRS
1527 select MIPS_MT
1507 select SMP 1528 select SMP
1529 help
1530 This is a kernel model which is known a SMTC or lately has been
1531 marketesed into SMVP.
1508 1532
1509config MIPS_MT_SMP 1533config MIPS_MT_SMP
1510 bool "Use 1 TC on each available VPE for SMP" 1534 bool "Use 1 TC on each available VPE for SMP"
1535 depends on SYS_SUPPORTS_MULTITHREADING
1536 select CPU_MIPSR2_IRQ_VI
1537 select CPU_MIPSR2_SRS
1538 select MIPS_MT
1511 select SMP 1539 select SMP
1540 help
1541 This is a kernel model which is also known a VSMP or lately
1542 has been marketesed into SMVP.
1512 1543
1513config MIPS_VPE_LOADER 1544config MIPS_VPE_LOADER
1514 bool "VPE loader support." 1545 bool "VPE loader support."
1515 depends on MIPS_MT 1546 depends on SYS_SUPPORTS_MULTITHREADING
1547 select MIPS_MT
1516 help 1548 help
1517 Includes a loader for loading an elf relocatable object 1549 Includes a loader for loading an elf relocatable object
1518 onto another VPE and running it. 1550 onto another VPE and running it.
1519 1551
1520endchoice 1552endchoice
1521 1553
1554config MIPS_MT
1555 bool
1556
1557config SYS_SUPPORTS_MULTITHREADING
1558 bool
1559
1522config MIPS_MT_FPAFF 1560config MIPS_MT_FPAFF
1523 bool "Dynamic FPU affinity for FP-intensive threads" 1561 bool "Dynamic FPU affinity for FP-intensive threads"
1524 depends on MIPS_MT 1562 depends on MIPS_MT
@@ -1575,32 +1613,23 @@ config CPU_HAS_LLSC
1575config CPU_HAS_WB 1613config CPU_HAS_WB
1576 bool 1614 bool
1577 1615
1616#
1617# Vectored interrupt mode is an R2 feature
1618#
1578config CPU_MIPSR2_IRQ_VI 1619config CPU_MIPSR2_IRQ_VI
1579 bool "Vectored interrupt mode" 1620 bool
1580 depends on CPU_MIPSR2
1581 help
1582 Vectored interrupt mode allowing faster dispatching of interrupts.
1583 The board support code needs to be written to take advantage of this
1584 mode. Compatibility code is included to allow the kernel to run on
1585 a CPU that does not support vectored interrupts. It's safe to
1586 say Y here.
1587 1621
1622#
1623# Extended interrupt mode is an R2 feature
1624#
1588config CPU_MIPSR2_IRQ_EI 1625config CPU_MIPSR2_IRQ_EI
1589 bool "External interrupt controller mode" 1626 bool
1590 depends on CPU_MIPSR2
1591 help
1592 Extended interrupt mode takes advantage of an external interrupt
1593 controller to allow fast dispatching from many possible interrupt
1594 sources. Say N unless you know that external interrupt support is
1595 required.
1596 1627
1628#
1629# Shadow registers are an R2 feature
1630#
1597config CPU_MIPSR2_SRS 1631config CPU_MIPSR2_SRS
1598 bool "Make shadow set registers available for interrupt handlers" 1632 bool
1599 depends on CPU_MIPSR2_IRQ_VI || CPU_MIPSR2_IRQ_EI
1600 help
1601 Allow the kernel to use shadow register sets for fast interrupts.
1602 Interrupt handlers must be specially written to use shadow sets.
1603 Say N unless you know that shadow register set upport is needed.
1604 1633
1605config CPU_HAS_SYNC 1634config CPU_HAS_SYNC
1606 bool 1635 bool
@@ -1618,6 +1647,11 @@ config GENERIC_IRQ_PROBE
1618 bool 1647 bool
1619 default y 1648 default y
1620 1649
1650config IRQ_PER_CPU
1651 depends on SMP
1652 bool
1653 default y
1654
1621# 1655#
1622# - Highmem only makes sense for the 32-bit kernel. 1656# - Highmem only makes sense for the 32-bit kernel.
1623# - The current highmem code will only work properly on physically indexed 1657# - The current highmem code will only work properly on physically indexed
@@ -1676,8 +1710,8 @@ source "mm/Kconfig"
1676 1710
1677config SMP 1711config SMP
1678 bool "Multi-Processing support" 1712 bool "Multi-Processing support"
1679 depends on CPU_RM9000 || ((SIBYTE_BCM1x80 || SIBYTE_BCM1x55 || SIBYTE_SB1250 || QEMU) && !SIBYTE_STANDALONE) || SGI_IP27 || MIPS_MT_SMP || MIPS_MT_SMTC 1713 depends on SYS_SUPPORTS_SMP
1680 ---help--- 1714 help
1681 This enables support for systems with more than one CPU. If you have 1715 This enables support for systems with more than one CPU. If you have
1682 a system with only one CPU, like most personal computers, say N. If 1716 a system with only one CPU, like most personal computers, say N. If
1683 you have a system with more than one CPU, say Y. 1717 you have a system with more than one CPU, say Y.
@@ -1696,6 +1730,9 @@ config SMP
1696 1730
1697 If you don't know what to do here, say N. 1731 If you don't know what to do here, say N.
1698 1732
1733config SYS_SUPPORTS_SMP
1734 bool
1735
1699config NR_CPUS 1736config NR_CPUS
1700 int "Maximum number of CPUs (2-64)" 1737 int "Maximum number of CPUs (2-64)"
1701 range 2 64 1738 range 2 64
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index d5930148495a..ebbb9adc0e2f 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -374,6 +374,7 @@ core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
374cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite 374cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
375load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 375load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
376 376
377#
377# Qemu simulating MIPS32 4Kc 378# Qemu simulating MIPS32 4Kc
378# 379#
379core-$(CONFIG_QEMU) += arch/mips/qemu/ 380core-$(CONFIG_QEMU) += arch/mips/qemu/
diff --git a/arch/mips/arc/identify.c b/arch/mips/arc/identify.c
index 1bd6199e174a..3ba7c47f9f23 100644
--- a/arch/mips/arc/identify.c
+++ b/arch/mips/arc/identify.c
@@ -11,7 +11,6 @@
11 * 11 *
12 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) 12 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
13 */ 13 */
14#include <linux/config.h>
15#include <linux/init.h> 14#include <linux/init.h>
16#include <linux/kernel.h> 15#include <linux/kernel.h>
17#include <linux/types.h> 16#include <linux/types.h>
diff --git a/arch/mips/au1000/common/au1xxx_irqmap.c b/arch/mips/au1000/common/au1xxx_irqmap.c
index 5a1e3687cafa..7acfe9bf5fc3 100644
--- a/arch/mips/au1000/common/au1xxx_irqmap.c
+++ b/arch/mips/au1000/common/au1xxx_irqmap.c
@@ -25,7 +25,6 @@
25 * with this program; if not, write to the Free Software Foundation, Inc., 25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA. 26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */ 27 */
28#include <linux/config.h>
29#include <linux/errno.h> 28#include <linux/errno.h>
30#include <linux/init.h> 29#include <linux/init.h>
31#include <linux/irq.h> 30#include <linux/irq.h>
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 6ee090bd86c9..98244d51c154 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -30,7 +30,6 @@
30 * 30 *
31 */ 31 */
32 32
33#include <linux/config.h>
34#include <linux/kernel.h> 33#include <linux/kernel.h>
35#include <linux/errno.h> 34#include <linux/errno.h>
36#include <linux/sched.h> 35#include <linux/sched.h>
@@ -290,7 +289,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
290 /* If kmalloc fails, it is caught below same 289 /* If kmalloc fails, it is caught below same
291 * as a channel not available. 290 * as a channel not available.
292 */ 291 */
293 ctp = kmalloc(sizeof(chan_tab_t), GFP_KERNEL); 292 ctp = kmalloc(sizeof(chan_tab_t), GFP_ATOMIC);
294 chan_tab_ptr[i] = ctp; 293 chan_tab_ptr[i] = ctp;
295 break; 294 break;
296 } 295 }
@@ -730,6 +729,8 @@ au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes)
730 return rv; 729 return rv;
731} 730}
732 731
732EXPORT_SYMBOL_GPL(au1xxx_dbdma_get_dest);
733
733void 734void
734au1xxx_dbdma_stop(u32 chanid) 735au1xxx_dbdma_stop(u32 chanid)
735{ 736{
@@ -821,6 +822,8 @@ au1xxx_get_dma_residue(u32 chanid)
821 return rv; 822 return rv;
822} 823}
823 824
825EXPORT_SYMBOL_GPL(au1xxx_get_dma_residue);
826
824void 827void
825au1xxx_dbdma_chan_free(u32 chanid) 828au1xxx_dbdma_chan_free(u32 chanid)
826{ 829{
@@ -889,7 +892,7 @@ static void au1xxx_dbdma_init(void)
889 #error Unknown Au1x00 SOC 892 #error Unknown Au1x00 SOC
890#endif 893#endif
891 894
892 if (request_irq(irq_nr, dbdma_interrupt, SA_INTERRUPT, 895 if (request_irq(irq_nr, dbdma_interrupt, IRQF_DISABLED,
893 "Au1xxx dbdma", (void *)dbdma_gptr)) 896 "Au1xxx dbdma", (void *)dbdma_gptr))
894 printk("Can't get 1550 dbdma irq"); 897 printk("Can't get 1550 dbdma irq");
895} 898}
diff --git a/arch/mips/au1000/common/dbg_io.c b/arch/mips/au1000/common/dbg_io.c
index 7bc768e558db..0a50af7f34b8 100644
--- a/arch/mips/au1000/common/dbg_io.c
+++ b/arch/mips/au1000/common/dbg_io.c
@@ -1,5 +1,4 @@
1 1
2#include <linux/config.h>
3#include <asm/io.h> 2#include <asm/io.h>
4#include <asm/mach-au1x00/au1000.h> 3#include <asm/mach-au1x00/au1000.h>
5 4
diff --git a/arch/mips/au1000/common/dma.c b/arch/mips/au1000/common/dma.c
index 1d82f2277517..fb7c47c1585d 100644
--- a/arch/mips/au1000/common/dma.c
+++ b/arch/mips/au1000/common/dma.c
@@ -30,7 +30,6 @@
30 * 675 Mass Ave, Cambridge, MA 02139, USA. 30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 * 31 *
32 */ 32 */
33#include <linux/config.h>
34#include <linux/module.h> 33#include <linux/module.h>
35#include <linux/kernel.h> 34#include <linux/kernel.h>
36#include <linux/errno.h> 35#include <linux/errno.h>
diff --git a/arch/mips/au1000/common/gpio.c b/arch/mips/au1000/common/gpio.c
index 5f5915b83142..ce55297dcb8c 100644
--- a/arch/mips/au1000/common/gpio.c
+++ b/arch/mips/au1000/common/gpio.c
@@ -19,7 +19,6 @@
19 * with this program; if not, write to the Free Software Foundation, Inc., 19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 675 Mass Ave, Cambridge, MA 02139, USA. 20 * 675 Mass Ave, Cambridge, MA 02139, USA.
21 */ 21 */
22#include <linux/config.h>
23#include <linux/module.h> 22#include <linux/module.h>
24#include <au1000.h> 23#include <au1000.h>
25#include <au1xxx_gpio.h> 24#include <au1xxx_gpio.h>
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index afe05ec12c27..29d6f8178bad 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -26,7 +26,6 @@
26 * with this program; if not, write to the Free Software Foundation, Inc., 26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA. 27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */ 28 */
29#include <linux/config.h>
30#include <linux/errno.h> 29#include <linux/errno.h>
31#include <linux/init.h> 30#include <linux/init.h>
32#include <linux/irq.h> 31#include <linux/irq.h>
@@ -310,7 +309,7 @@ void startup_match20_interrupt(irqreturn_t (*handler)(int, void *, struct pt_reg
310 * can avoid it. --cgray 309 * can avoid it. --cgray
311 */ 310 */
312 action.dev_id = handler; 311 action.dev_id = handler;
313 action.flags = SA_INTERRUPT; 312 action.flags = IRQF_DISABLED;
314 cpus_clear(action.mask); 313 cpus_clear(action.mask);
315 action.name = "Au1xxx TOY"; 314 action.name = "Au1xxx TOY";
316 action.handler = handler; 315 action.handler = handler;
@@ -333,31 +332,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
333 au_writel(1<<(irq_nr-32), IC1_CFG2CLR); 332 au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
334 au_writel(1<<(irq_nr-32), IC1_CFG1CLR); 333 au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
335 au_writel(1<<(irq_nr-32), IC1_CFG0SET); 334 au_writel(1<<(irq_nr-32), IC1_CFG0SET);
336 irq_desc[irq_nr].handler = &rise_edge_irq_type; 335 irq_desc[irq_nr].chip = &rise_edge_irq_type;
337 break; 336 break;
338 case INTC_INT_FALL_EDGE: /* 0:1:0 */ 337 case INTC_INT_FALL_EDGE: /* 0:1:0 */
339 au_writel(1<<(irq_nr-32), IC1_CFG2CLR); 338 au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
340 au_writel(1<<(irq_nr-32), IC1_CFG1SET); 339 au_writel(1<<(irq_nr-32), IC1_CFG1SET);
341 au_writel(1<<(irq_nr-32), IC1_CFG0CLR); 340 au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
342 irq_desc[irq_nr].handler = &fall_edge_irq_type; 341 irq_desc[irq_nr].chip = &fall_edge_irq_type;
343 break; 342 break;
344 case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ 343 case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
345 au_writel(1<<(irq_nr-32), IC1_CFG2CLR); 344 au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
346 au_writel(1<<(irq_nr-32), IC1_CFG1SET); 345 au_writel(1<<(irq_nr-32), IC1_CFG1SET);
347 au_writel(1<<(irq_nr-32), IC1_CFG0SET); 346 au_writel(1<<(irq_nr-32), IC1_CFG0SET);
348 irq_desc[irq_nr].handler = &either_edge_irq_type; 347 irq_desc[irq_nr].chip = &either_edge_irq_type;
349 break; 348 break;
350 case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ 349 case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
351 au_writel(1<<(irq_nr-32), IC1_CFG2SET); 350 au_writel(1<<(irq_nr-32), IC1_CFG2SET);
352 au_writel(1<<(irq_nr-32), IC1_CFG1CLR); 351 au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
353 au_writel(1<<(irq_nr-32), IC1_CFG0SET); 352 au_writel(1<<(irq_nr-32), IC1_CFG0SET);
354 irq_desc[irq_nr].handler = &level_irq_type; 353 irq_desc[irq_nr].chip = &level_irq_type;
355 break; 354 break;
356 case INTC_INT_LOW_LEVEL: /* 1:1:0 */ 355 case INTC_INT_LOW_LEVEL: /* 1:1:0 */
357 au_writel(1<<(irq_nr-32), IC1_CFG2SET); 356 au_writel(1<<(irq_nr-32), IC1_CFG2SET);
358 au_writel(1<<(irq_nr-32), IC1_CFG1SET); 357 au_writel(1<<(irq_nr-32), IC1_CFG1SET);
359 au_writel(1<<(irq_nr-32), IC1_CFG0CLR); 358 au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
360 irq_desc[irq_nr].handler = &level_irq_type; 359 irq_desc[irq_nr].chip = &level_irq_type;
361 break; 360 break;
362 case INTC_INT_DISABLED: /* 0:0:0 */ 361 case INTC_INT_DISABLED: /* 0:0:0 */
363 au_writel(1<<(irq_nr-32), IC1_CFG0CLR); 362 au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
@@ -385,31 +384,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
385 au_writel(1<<irq_nr, IC0_CFG2CLR); 384 au_writel(1<<irq_nr, IC0_CFG2CLR);
386 au_writel(1<<irq_nr, IC0_CFG1CLR); 385 au_writel(1<<irq_nr, IC0_CFG1CLR);
387 au_writel(1<<irq_nr, IC0_CFG0SET); 386 au_writel(1<<irq_nr, IC0_CFG0SET);
388 irq_desc[irq_nr].handler = &rise_edge_irq_type; 387 irq_desc[irq_nr].chip = &rise_edge_irq_type;
389 break; 388 break;
390 case INTC_INT_FALL_EDGE: /* 0:1:0 */ 389 case INTC_INT_FALL_EDGE: /* 0:1:0 */
391 au_writel(1<<irq_nr, IC0_CFG2CLR); 390 au_writel(1<<irq_nr, IC0_CFG2CLR);
392 au_writel(1<<irq_nr, IC0_CFG1SET); 391 au_writel(1<<irq_nr, IC0_CFG1SET);
393 au_writel(1<<irq_nr, IC0_CFG0CLR); 392 au_writel(1<<irq_nr, IC0_CFG0CLR);
394 irq_desc[irq_nr].handler = &fall_edge_irq_type; 393 irq_desc[irq_nr].chip = &fall_edge_irq_type;
395 break; 394 break;
396 case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ 395 case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
397 au_writel(1<<irq_nr, IC0_CFG2CLR); 396 au_writel(1<<irq_nr, IC0_CFG2CLR);
398 au_writel(1<<irq_nr, IC0_CFG1SET); 397 au_writel(1<<irq_nr, IC0_CFG1SET);
399 au_writel(1<<irq_nr, IC0_CFG0SET); 398 au_writel(1<<irq_nr, IC0_CFG0SET);
400 irq_desc[irq_nr].handler = &either_edge_irq_type; 399 irq_desc[irq_nr].chip = &either_edge_irq_type;
401 break; 400 break;
402 case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ 401 case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
403 au_writel(1<<irq_nr, IC0_CFG2SET); 402 au_writel(1<<irq_nr, IC0_CFG2SET);
404 au_writel(1<<irq_nr, IC0_CFG1CLR); 403 au_writel(1<<irq_nr, IC0_CFG1CLR);
405 au_writel(1<<irq_nr, IC0_CFG0SET); 404 au_writel(1<<irq_nr, IC0_CFG0SET);
406 irq_desc[irq_nr].handler = &level_irq_type; 405 irq_desc[irq_nr].chip = &level_irq_type;
407 break; 406 break;
408 case INTC_INT_LOW_LEVEL: /* 1:1:0 */ 407 case INTC_INT_LOW_LEVEL: /* 1:1:0 */
409 au_writel(1<<irq_nr, IC0_CFG2SET); 408 au_writel(1<<irq_nr, IC0_CFG2SET);
410 au_writel(1<<irq_nr, IC0_CFG1SET); 409 au_writel(1<<irq_nr, IC0_CFG1SET);
411 au_writel(1<<irq_nr, IC0_CFG0CLR); 410 au_writel(1<<irq_nr, IC0_CFG0CLR);
412 irq_desc[irq_nr].handler = &level_irq_type; 411 irq_desc[irq_nr].chip = &level_irq_type;
413 break; 412 break;
414 case INTC_INT_DISABLED: /* 0:0:0 */ 413 case INTC_INT_DISABLED: /* 0:0:0 */
415 au_writel(1<<irq_nr, IC0_CFG0CLR); 414 au_writel(1<<irq_nr, IC0_CFG0CLR);
@@ -585,13 +584,13 @@ void intc1_req1_irqdispatch(struct pt_regs *regs)
585 * au_sleep function in power.c.....maybe I should just pm_register() 584 * au_sleep function in power.c.....maybe I should just pm_register()
586 * them instead? 585 * them instead?
587 */ 586 */
588static uint sleep_intctl_config0[2]; 587static unsigned int sleep_intctl_config0[2];
589static uint sleep_intctl_config1[2]; 588static unsigned int sleep_intctl_config1[2];
590static uint sleep_intctl_config2[2]; 589static unsigned int sleep_intctl_config2[2];
591static uint sleep_intctl_src[2]; 590static unsigned int sleep_intctl_src[2];
592static uint sleep_intctl_assign[2]; 591static unsigned int sleep_intctl_assign[2];
593static uint sleep_intctl_wake[2]; 592static unsigned int sleep_intctl_wake[2];
594static uint sleep_intctl_mask[2]; 593static unsigned int sleep_intctl_mask[2];
595 594
596void 595void
597save_au1xxx_intctl(void) 596save_au1xxx_intctl(void)
diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c
index b1392abac809..da591f674893 100644
--- a/arch/mips/au1000/common/pci.c
+++ b/arch/mips/au1000/common/pci.c
@@ -30,7 +30,6 @@
30 * with this program; if not, write to the Free Software Foundation, Inc., 30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 675 Mass Ave, Cambridge, MA 02139, USA. 31 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 */ 32 */
33#include <linux/config.h>
34#include <linux/types.h> 33#include <linux/types.h>
35#include <linux/pci.h> 34#include <linux/pci.h>
36#include <linux/kernel.h> 35#include <linux/kernel.h>
diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c
index 32702e5fbf67..8fd203d4a339 100644
--- a/arch/mips/au1000/common/platform.c
+++ b/arch/mips/au1000/common/platform.c
@@ -7,7 +7,6 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <linux/config.h>
11#include <linux/device.h> 10#include <linux/device.h>
12#include <linux/platform_device.h> 11#include <linux/platform_device.h>
13#include <linux/kernel.h> 12#include <linux/kernel.h>
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c
index f4926315fb68..7504a6364616 100644
--- a/arch/mips/au1000/common/power.c
+++ b/arch/mips/au1000/common/power.c
@@ -29,7 +29,6 @@
29 * with this program; if not, write to the Free Software Foundation, Inc., 29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA. 30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 */ 31 */
32#include <linux/config.h>
33#include <linux/init.h> 32#include <linux/init.h>
34#include <linux/pm.h> 33#include <linux/pm.h>
35#include <linux/pm_legacy.h> 34#include <linux/pm_legacy.h>
@@ -80,17 +79,17 @@ static DEFINE_SPINLOCK(pm_lock);
80 * We only have to save/restore registers that aren't otherwise 79 * We only have to save/restore registers that aren't otherwise
81 * done as part of a driver pm_* function. 80 * done as part of a driver pm_* function.
82 */ 81 */
83static uint sleep_aux_pll_cntrl; 82static unsigned int sleep_aux_pll_cntrl;
84static uint sleep_cpu_pll_cntrl; 83static unsigned int sleep_cpu_pll_cntrl;
85static uint sleep_pin_function; 84static unsigned int sleep_pin_function;
86static uint sleep_uart0_inten; 85static unsigned int sleep_uart0_inten;
87static uint sleep_uart0_fifoctl; 86static unsigned int sleep_uart0_fifoctl;
88static uint sleep_uart0_linectl; 87static unsigned int sleep_uart0_linectl;
89static uint sleep_uart0_clkdiv; 88static unsigned int sleep_uart0_clkdiv;
90static uint sleep_uart0_enable; 89static unsigned int sleep_uart0_enable;
91static uint sleep_usbhost_enable; 90static unsigned int sleep_usbhost_enable;
92static uint sleep_usbdev_enable; 91static unsigned int sleep_usbdev_enable;
93static uint sleep_static_memctlr[4][3]; 92static unsigned int sleep_static_memctlr[4][3];
94 93
95/* Define this to cause the value you write to /proc/sys/pm/sleep to 94/* Define this to cause the value you write to /proc/sys/pm/sleep to
96 * set the TOY timer for the amount of time you want to sleep. 95 * set the TOY timer for the amount of time you want to sleep.
diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
index c93af224c1b3..de5447e83849 100644
--- a/arch/mips/au1000/common/reset.c
+++ b/arch/mips/au1000/common/reset.c
@@ -27,7 +27,6 @@
27 * with this program; if not, write to the Free Software Foundation, Inc., 27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA. 28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 29 */
30#include <linux/config.h>
31#include <linux/sched.h> 30#include <linux/sched.h>
32#include <linux/mm.h> 31#include <linux/mm.h>
33#include <asm/io.h> 32#include <asm/io.h>
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index 97165b6b3894..cc5138ce9c95 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -25,7 +25,6 @@
25 * with this program; if not, write to the Free Software Foundation, Inc., 25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA. 26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */ 27 */
28#include <linux/config.h>
29#include <linux/init.h> 28#include <linux/init.h>
30#include <linux/sched.h> 29#include <linux/sched.h>
31#include <linux/ioport.h> 30#include <linux/ioport.h>
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 842e1b5ac4a1..7e988b0b0130 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -33,7 +33,6 @@
33 */ 33 */
34 34
35#include <linux/types.h> 35#include <linux/types.h>
36#include <linux/config.h>
37#include <linux/init.h> 36#include <linux/init.h>
38#include <linux/kernel_stat.h> 37#include <linux/kernel_stat.h>
39#include <linux/sched.h> 38#include <linux/sched.h>
diff --git a/arch/mips/au1000/common/usbdev.c b/arch/mips/au1000/common/usbdev.c
index 2cab7629702c..63bcb3a95dc7 100644
--- a/arch/mips/au1000/common/usbdev.c
+++ b/arch/mips/au1000/common/usbdev.c
@@ -1465,14 +1465,14 @@ usbdev_init(struct usb_device_descriptor* dev_desc,
1465 */ 1465 */
1466 1466
1467 /* request the USB device transfer complete interrupt */ 1467 /* request the USB device transfer complete interrupt */
1468 if (request_irq(AU1000_USB_DEV_REQ_INT, req_sus_intr, SA_INTERRUPT, 1468 if (request_irq(AU1000_USB_DEV_REQ_INT, req_sus_intr, IRQF_DISABLED,
1469 "USBdev req", &usbdev)) { 1469 "USBdev req", &usbdev)) {
1470 err("Can't get device request intr"); 1470 err("Can't get device request intr");
1471 ret = -ENXIO; 1471 ret = -ENXIO;
1472 goto out; 1472 goto out;
1473 } 1473 }
1474 /* request the USB device suspend interrupt */ 1474 /* request the USB device suspend interrupt */
1475 if (request_irq(AU1000_USB_DEV_SUS_INT, req_sus_intr, SA_INTERRUPT, 1475 if (request_irq(AU1000_USB_DEV_SUS_INT, req_sus_intr, IRQF_DISABLED,
1476 "USBdev sus", &usbdev)) { 1476 "USBdev sus", &usbdev)) {
1477 err("Can't get device suspend intr"); 1477 err("Can't get device suspend intr");
1478 ret = -ENXIO; 1478 ret = -ENXIO;
@@ -1483,7 +1483,7 @@ usbdev_init(struct usb_device_descriptor* dev_desc,
1483 if ((ep0->indma = request_au1000_dma(ep_dma_id[0].id, 1483 if ((ep0->indma = request_au1000_dma(ep_dma_id[0].id,
1484 ep_dma_id[0].str, 1484 ep_dma_id[0].str,
1485 dma_done_ep0_intr, 1485 dma_done_ep0_intr,
1486 SA_INTERRUPT, 1486 IRQF_DISABLED,
1487 &usbdev)) < 0) { 1487 &usbdev)) < 0) {
1488 err("Can't get %s DMA", ep_dma_id[0].str); 1488 err("Can't get %s DMA", ep_dma_id[0].str);
1489 ret = -ENXIO; 1489 ret = -ENXIO;
@@ -1516,7 +1516,7 @@ usbdev_init(struct usb_device_descriptor* dev_desc,
1516 request_au1000_dma(ep_dma_id[ep->address].id, 1516 request_au1000_dma(ep_dma_id[ep->address].id,
1517 ep_dma_id[ep->address].str, 1517 ep_dma_id[ep->address].str,
1518 dma_done_ep_intr, 1518 dma_done_ep_intr,
1519 SA_INTERRUPT, 1519 IRQF_DISABLED,
1520 &usbdev); 1520 &usbdev);
1521 if (ep->indma < 0) { 1521 if (ep->indma < 0) {
1522 err("Can't get %s DMA", 1522 err("Can't get %s DMA",
diff --git a/arch/mips/au1000/csb250/board_setup.c b/arch/mips/au1000/csb250/board_setup.c
index 1c55c5f59d75..348c3024d3d1 100644
--- a/arch/mips/au1000/csb250/board_setup.c
+++ b/arch/mips/au1000/csb250/board_setup.c
@@ -26,7 +26,6 @@
26 * with this program; if not, write to the Free Software Foundation, Inc., 26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA. 27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */ 28 */
29#include <linux/config.h>
30#include <linux/init.h> 29#include <linux/init.h>
31#include <linux/sched.h> 30#include <linux/sched.h>
32#include <linux/ioport.h> 31#include <linux/ioport.h>
diff --git a/arch/mips/au1000/csb250/init.c b/arch/mips/au1000/csb250/init.c
index a4898b1bc66a..83f1b31a0b8e 100644
--- a/arch/mips/au1000/csb250/init.c
+++ b/arch/mips/au1000/csb250/init.c
@@ -65,9 +65,9 @@ int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
65 65
66 /* We use a0 and a1 to pass initrd start and size. 66 /* We use a0 and a1 to pass initrd start and size.
67 */ 67 */
68 if (((uint) argc > 0) && ((uint)argv > 0)) { 68 if (((unsigned int) argc > 0) && ((uint)argv > 0)) {
69 my_initrd_start = (uint)argc; 69 my_initrd_start = (unsigned int)argc;
70 my_initrd_size = (uint)argv; 70 my_initrd_size = (unsigned int)argv;
71 } 71 }
72 72
73 /* First argv is ignored. 73 /* First argv is ignored.
diff --git a/arch/mips/au1000/db1x00/board_setup.c b/arch/mips/au1000/db1x00/board_setup.c
index f00ec3b175d8..7a79293f8527 100644
--- a/arch/mips/au1000/db1x00/board_setup.c
+++ b/arch/mips/au1000/db1x00/board_setup.c
@@ -27,7 +27,6 @@
27 * with this program; if not, write to the Free Software Foundation, Inc., 27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA. 28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 29 */
30#include <linux/config.h>
31#include <linux/init.h> 30#include <linux/init.h>
32#include <linux/sched.h> 31#include <linux/sched.h>
33#include <linux/ioport.h> 32#include <linux/ioport.h>
diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/au1000/db1x00/init.c
index 41e0522f3cf1..0a3f025eb023 100644
--- a/arch/mips/au1000/db1x00/init.c
+++ b/arch/mips/au1000/db1x00/init.c
@@ -33,7 +33,6 @@
33#include <linux/bootmem.h> 33#include <linux/bootmem.h>
34#include <asm/addrspace.h> 34#include <asm/addrspace.h>
35#include <asm/bootinfo.h> 35#include <asm/bootinfo.h>
36#include <linux/config.h>
37#include <linux/string.h> 36#include <linux/string.h>
38#include <linux/kernel.h> 37#include <linux/kernel.h>
39 38
diff --git a/arch/mips/au1000/db1x00/irqmap.c b/arch/mips/au1000/db1x00/irqmap.c
index 0138c5b7c860..3e5729145c2b 100644
--- a/arch/mips/au1000/db1x00/irqmap.c
+++ b/arch/mips/au1000/db1x00/irqmap.c
@@ -25,7 +25,6 @@
25 * with this program; if not, write to the Free Software Foundation, Inc., 25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA. 26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */ 27 */
28#include <linux/config.h>
29#include <linux/errno.h> 28#include <linux/errno.h>
30#include <linux/init.h> 29#include <linux/init.h>
31#include <linux/irq.h> 30#include <linux/irq.h>
diff --git a/arch/mips/au1000/db1x00/mirage_ts.c b/arch/mips/au1000/db1x00/mirage_ts.c
index c29852c24b4f..0942dcf69518 100644
--- a/arch/mips/au1000/db1x00/mirage_ts.c
+++ b/arch/mips/au1000/db1x00/mirage_ts.c
@@ -31,7 +31,6 @@
31 * 675 Mass Ave, Cambridge, MA 02139, USA. 31 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 */ 32 */
33 33
34#include <linux/config.h>
35#include <linux/types.h> 34#include <linux/types.h>
36#include <linux/module.h> 35#include <linux/module.h>
37#include <linux/sched.h> 36#include <linux/sched.h>
diff --git a/arch/mips/au1000/hydrogen3/board_setup.c b/arch/mips/au1000/hydrogen3/board_setup.c
index 2efae1064647..d081640e2e00 100644
--- a/arch/mips/au1000/hydrogen3/board_setup.c
+++ b/arch/mips/au1000/hydrogen3/board_setup.c
@@ -27,7 +27,6 @@
27 * with this program; if not, write to the Free Software Foundation, Inc., 27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA. 28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 29 */
30#include <linux/config.h>
31#include <linux/init.h> 30#include <linux/init.h>
32#include <linux/sched.h> 31#include <linux/sched.h>
33#include <linux/ioport.h> 32#include <linux/ioport.h>
diff --git a/arch/mips/au1000/hydrogen3/init.c b/arch/mips/au1000/hydrogen3/init.c
index 01ab28483959..8f02bb80a55a 100644
--- a/arch/mips/au1000/hydrogen3/init.c
+++ b/arch/mips/au1000/hydrogen3/init.c
@@ -34,7 +34,6 @@
34#include <linux/bootmem.h> 34#include <linux/bootmem.h>
35#include <asm/addrspace.h> 35#include <asm/addrspace.h>
36#include <asm/bootinfo.h> 36#include <asm/bootinfo.h>
37#include <linux/config.h>
38#include <linux/string.h> 37#include <linux/string.h>
39#include <linux/kernel.h> 38#include <linux/kernel.h>
40 39
diff --git a/arch/mips/au1000/mtx-1/board_setup.c b/arch/mips/au1000/mtx-1/board_setup.c
index 638de7bb43f0..e917e54fc683 100644
--- a/arch/mips/au1000/mtx-1/board_setup.c
+++ b/arch/mips/au1000/mtx-1/board_setup.c
@@ -28,7 +28,6 @@
28 * with this program; if not, write to the Free Software Foundation, Inc., 28 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA. 29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 */ 30 */
31#include <linux/config.h>
32#include <linux/init.h> 31#include <linux/init.h>
33#include <linux/sched.h> 32#include <linux/sched.h>
34#include <linux/ioport.h> 33#include <linux/ioport.h>
diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/au1000/pb1000/board_setup.c
index 0b4807dc9f44..1cf18e16ab54 100644
--- a/arch/mips/au1000/pb1000/board_setup.c
+++ b/arch/mips/au1000/pb1000/board_setup.c
@@ -23,7 +23,6 @@
23 * with this program; if not, write to the Free Software Foundation, Inc., 23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */ 25 */
26#include <linux/config.h>
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/sched.h> 27#include <linux/sched.h>
29#include <linux/ioport.h> 28#include <linux/ioport.h>
diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c
index 13c2f6ca7e33..db27b9331ff3 100644
--- a/arch/mips/au1000/pb1100/board_setup.c
+++ b/arch/mips/au1000/pb1100/board_setup.c
@@ -23,7 +23,6 @@
23 * with this program; if not, write to the Free Software Foundation, Inc., 23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */ 25 */
26#include <linux/config.h>
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/sched.h> 27#include <linux/sched.h>
29#include <linux/ioport.h> 28#include <linux/ioport.h>
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c
index a45b17538ac9..8b953b9fc25c 100644
--- a/arch/mips/au1000/pb1200/board_setup.c
+++ b/arch/mips/au1000/pb1200/board_setup.c
@@ -23,7 +23,6 @@
23 * with this program; if not, write to the Free Software Foundation, Inc., 23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */ 25 */
26#include <linux/config.h>
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/sched.h> 27#include <linux/sched.h>
29#include <linux/ioport.h> 28#include <linux/ioport.h>
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
index bacc0c6bfe67..2d49f32f4622 100644
--- a/arch/mips/au1000/pb1200/irqmap.c
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -22,7 +22,6 @@
22 * with this program; if not, write to the Free Software Foundation, Inc., 22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */ 24 */
25#include <linux/config.h>
26#include <linux/errno.h> 25#include <linux/errno.h>
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/irq.h> 27#include <linux/irq.h>
@@ -172,7 +171,7 @@ void _board_init_irq(void)
172 171
173 for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++) 172 for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
174 { 173 {
175 irq_desc[irq_nr].handler = &external_irq_type; 174 irq_desc[irq_nr].chip = &external_irq_type;
176 pb1200_disable_irq(irq_nr); 175 pb1200_disable_irq(irq_nr);
177 } 176 }
178 177
diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/au1000/pb1500/board_setup.c
index 30bb87282b1f..1a9a293de6ab 100644
--- a/arch/mips/au1000/pb1500/board_setup.c
+++ b/arch/mips/au1000/pb1500/board_setup.c
@@ -23,7 +23,6 @@
23 * with this program; if not, write to the Free Software Foundation, Inc., 23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */ 25 */
26#include <linux/config.h>
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/sched.h> 27#include <linux/sched.h>
29#include <linux/ioport.h> 28#include <linux/ioport.h>
diff --git a/arch/mips/au1000/xxs1500/board_setup.c b/arch/mips/au1000/xxs1500/board_setup.c
index 1e59433dfd66..ae3d6b19e94d 100644
--- a/arch/mips/au1000/xxs1500/board_setup.c
+++ b/arch/mips/au1000/xxs1500/board_setup.c
@@ -23,7 +23,6 @@
23 * with this program; if not, write to the Free Software Foundation, Inc., 23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */ 25 */
26#include <linux/config.h>
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/sched.h> 27#include <linux/sched.h>
29#include <linux/ioport.h> 28#include <linux/ioport.h>
diff --git a/arch/mips/basler/excite/excite_iodev.c b/arch/mips/basler/excite/excite_iodev.c
index 91121e523043..b288151b532e 100644
--- a/arch/mips/basler/excite/excite_iodev.c
+++ b/arch/mips/basler/excite/excite_iodev.c
@@ -113,7 +113,7 @@ static int __exit iodev_remove(struct device *dev)
113 113
114static int iodev_open(struct inode *i, struct file *f) 114static int iodev_open(struct inode *i, struct file *f)
115{ 115{
116 return request_irq(iodev_irq, iodev_irqhdl, SA_INTERRUPT, 116 return request_irq(iodev_irq, iodev_irqhdl, IRQF_DISABLED,
117 iodev_name, &miscdev); 117 iodev_name, &miscdev);
118} 118}
119 119
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
index 005b025605e6..3d7670edd5cd 100644
--- a/arch/mips/basler/excite/excite_setup.c
+++ b/arch/mips/basler/excite/excite_setup.c
@@ -254,7 +254,7 @@ static int __init excite_platform_init(void)
254 return 0; 254 return 0;
255} 255}
256 256
257void __init plat_setup(void) 257void __init plat_mem_setup(void)
258{ 258{
259 volatile u32 * const boot_ocd_base = (u32 *) 0xbf7fc000; 259 volatile u32 * const boot_ocd_base = (u32 *) 0xbf7fc000;
260 260
diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c
index 300797d5f558..46c23b66bc17 100644
--- a/arch/mips/cobalt/console.c
+++ b/arch/mips/cobalt/console.c
@@ -2,7 +2,6 @@
2 * (C) P. Horton 2006 2 * (C) P. Horton 2006
3 */ 3 */
4 4
5#include <linux/config.h>
6#include <linux/init.h> 5#include <linux/init.h>
7#include <linux/kernel.h> 6#include <linux/kernel.h>
8#include <linux/console.h> 7#include <linux/console.h>
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index ca719d6398bd..c99714587ce8 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -9,7 +9,6 @@
9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv) 9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
10 * 10 *
11 */ 11 */
12#include <linux/config.h>
13#include <linux/interrupt.h> 12#include <linux/interrupt.h>
14#include <linux/pci.h> 13#include <linux/pci.h>
15#include <linux/init.h> 14#include <linux/init.h>
diff --git a/arch/mips/ddb5xxx/common/prom.c b/arch/mips/ddb5xxx/common/prom.c
index 00c62c1c28a3..efef0f57ce1e 100644
--- a/arch/mips/ddb5xxx/common/prom.c
+++ b/arch/mips/ddb5xxx/common/prom.c
@@ -7,7 +7,6 @@
7 * Free Software Foundation; either version 2 of the License, or (at your 7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version. 8 * option) any later version.
9 */ 9 */
10#include <linux/config.h>
11#include <linux/init.h> 10#include <linux/init.h>
12#include <linux/mm.h> 11#include <linux/mm.h>
13#include <linux/sched.h> 12#include <linux/sched.h>
@@ -21,8 +20,6 @@
21const char *get_system_type(void) 20const char *get_system_type(void)
22{ 21{
23 switch (mips_machtype) { 22 switch (mips_machtype) {
24 case MACH_NEC_DDB5074: return "NEC DDB Vrc-5074";
25 case MACH_NEC_DDB5476: return "NEC DDB Vrc-5476";
26 case MACH_NEC_DDB5477: return "NEC DDB Vrc-5477"; 23 case MACH_NEC_DDB5477: return "NEC DDB Vrc-5477";
27 case MACH_NEC_ROCKHOPPER: return "NEC Rockhopper"; 24 case MACH_NEC_ROCKHOPPER: return "NEC Rockhopper";
28 case MACH_NEC_ROCKHOPPERII: return "NEC RockhopperII"; 25 case MACH_NEC_ROCKHOPPERII: return "NEC RockhopperII";
diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c
index de433cf9fb50..22fb94b7c440 100644
--- a/arch/mips/ddb5xxx/ddb5477/irq.c
+++ b/arch/mips/ddb5xxx/ddb5477/irq.c
@@ -10,7 +10,6 @@
10 * Free Software Foundation; either version 2 of the License, or (at your 10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version. 11 * option) any later version.
12 */ 12 */
13#include <linux/config.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/interrupt.h> 14#include <linux/interrupt.h>
16#include <linux/irq.h> 15#include <linux/irq.h>
diff --git a/arch/mips/ddb5xxx/ddb5477/irq_5477.c b/arch/mips/ddb5xxx/ddb5477/irq_5477.c
index 5fcd5f070cdc..63c3d6534b3a 100644
--- a/arch/mips/ddb5xxx/ddb5477/irq_5477.c
+++ b/arch/mips/ddb5xxx/ddb5477/irq_5477.c
@@ -107,7 +107,7 @@ void __init vrc5477_irq_init(u32 irq_base)
107 irq_desc[i].status = IRQ_DISABLED; 107 irq_desc[i].status = IRQ_DISABLED;
108 irq_desc[i].action = NULL; 108 irq_desc[i].action = NULL;
109 irq_desc[i].depth = 1; 109 irq_desc[i].depth = 1;
110 irq_desc[i].handler = &vrc5477_irq_controller; 110 irq_desc[i].chip = &vrc5477_irq_controller;
111 } 111 }
112 112
113 vrc5477_irq_base = irq_base; 113 vrc5477_irq_base = irq_base;
diff --git a/arch/mips/ddb5xxx/ddb5477/setup.c b/arch/mips/ddb5xxx/ddb5477/setup.c
index 93167ecdb424..47ba0b6f210f 100644
--- a/arch/mips/ddb5xxx/ddb5477/setup.c
+++ b/arch/mips/ddb5xxx/ddb5477/setup.c
@@ -13,7 +13,6 @@
13 * Free Software Foundation; either version 2 of the License, or (at your 13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version. 14 * option) any later version.
15 */ 15 */
16#include <linux/config.h>
17#include <linux/init.h> 16#include <linux/init.h>
18#include <linux/kernel.h> 17#include <linux/kernel.h>
19#include <linux/types.h> 18#include <linux/types.h>
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index e8ec93e33fe6..455a65b91cb0 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -13,7 +13,6 @@
13 * Rewritten extensively for controller-driven IRQ support 13 * Rewritten extensively for controller-driven IRQ support
14 * by Maciej W. Rozycki. 14 * by Maciej W. Rozycki.
15 */ 15 */
16#include <linux/config.h>
17 16
18#include <asm/addrspace.h> 17#include <asm/addrspace.h>
19#include <asm/asm.h> 18#include <asm/asm.h>
diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c
index d5bca5d233b6..da2dbb42f913 100644
--- a/arch/mips/dec/ioasic-irq.c
+++ b/arch/mips/dec/ioasic-irq.c
@@ -144,13 +144,13 @@ void __init init_ioasic_irqs(int base)
144 irq_desc[i].status = IRQ_DISABLED; 144 irq_desc[i].status = IRQ_DISABLED;
145 irq_desc[i].action = 0; 145 irq_desc[i].action = 0;
146 irq_desc[i].depth = 1; 146 irq_desc[i].depth = 1;
147 irq_desc[i].handler = &ioasic_irq_type; 147 irq_desc[i].chip = &ioasic_irq_type;
148 } 148 }
149 for (; i < base + IO_IRQ_LINES; i++) { 149 for (; i < base + IO_IRQ_LINES; i++) {
150 irq_desc[i].status = IRQ_DISABLED; 150 irq_desc[i].status = IRQ_DISABLED;
151 irq_desc[i].action = 0; 151 irq_desc[i].action = 0;
152 irq_desc[i].depth = 1; 152 irq_desc[i].depth = 1;
153 irq_desc[i].handler = &ioasic_dma_irq_type; 153 irq_desc[i].chip = &ioasic_dma_irq_type;
154 } 154 }
155 155
156 ioasic_irq_base = base; 156 ioasic_irq_base = base;
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c
index 898bed502a34..d44c00d9e80f 100644
--- a/arch/mips/dec/kn02-irq.c
+++ b/arch/mips/dec/kn02-irq.c
@@ -123,7 +123,7 @@ void __init init_kn02_irqs(int base)
123 irq_desc[i].status = IRQ_DISABLED; 123 irq_desc[i].status = IRQ_DISABLED;
124 irq_desc[i].action = 0; 124 irq_desc[i].action = 0;
125 irq_desc[i].depth = 1; 125 irq_desc[i].depth = 1;
126 irq_desc[i].handler = &kn02_irq_type; 126 irq_desc[i].chip = &kn02_irq_type;
127 } 127 }
128 128
129 kn02_irq_base = base; 129 kn02_irq_base = base;
diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c
index 32a7cc7e4c65..bf2858071f1f 100644
--- a/arch/mips/dec/prom/init.c
+++ b/arch/mips/dec/prom/init.c
@@ -4,7 +4,6 @@
4 * Copyright (C) 1998 Harald Koerfgen 4 * Copyright (C) 1998 Harald Koerfgen
5 * Copyright (C) 2002, 2004 Maciej W. Rozycki 5 * Copyright (C) 2002, 2004 Maciej W. Rozycki
6 */ 6 */
7#include <linux/config.h>
8#include <linux/init.h> 7#include <linux/init.h>
9#include <linux/kernel.h> 8#include <linux/kernel.h>
10#include <linux/linkage.h> 9#include <linux/linkage.h>
diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c
index 1edaf3074ee9..3027ce782797 100644
--- a/arch/mips/dec/prom/memory.c
+++ b/arch/mips/dec/prom/memory.c
@@ -4,7 +4,6 @@
4 * Copyright (C) 1998 Harald Koerfgen, Frieder Streffer and Paul M. Antoine 4 * Copyright (C) 1998 Harald Koerfgen, Frieder Streffer and Paul M. Antoine
5 * Copyright (C) 2000, 2002 Maciej W. Rozycki 5 * Copyright (C) 2000, 2002 Maciej W. Rozycki
6 */ 6 */
7#include <linux/config.h>
8#include <linux/init.h> 7#include <linux/init.h>
9#include <linux/kernel.h> 8#include <linux/kernel.h>
10#include <linux/mm.h> 9#include <linux/mm.h>
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index 9c707b9ceb65..2684f121784b 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -105,7 +105,7 @@ static struct irqaction fpuirq = {
105}; 105};
106 106
107static struct irqaction busirq = { 107static struct irqaction busirq = {
108 .flags = SA_INTERRUPT, 108 .flags = IRQF_DISABLED,
109 .name = "bus error", 109 .name = "bus error",
110}; 110};
111 111
@@ -124,7 +124,7 @@ static void __init dec_be_init(void)
124 case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */ 124 case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */
125 board_be_handler = dec_kn01_be_handler; 125 board_be_handler = dec_kn01_be_handler;
126 busirq.handler = dec_kn01_be_interrupt; 126 busirq.handler = dec_kn01_be_interrupt;
127 busirq.flags |= SA_SHIRQ; 127 busirq.flags |= IRQF_SHARED;
128 dec_kn01_be_init(); 128 dec_kn01_be_init();
129 break; 129 break;
130 case MACH_DS5000_1XX: /* DS5000/1xx 3min */ 130 case MACH_DS5000_1XX: /* DS5000/1xx 3min */
diff --git a/arch/mips/galileo-boards/ev96100/setup.c b/arch/mips/galileo-boards/ev96100/setup.c
index a04aea6123da..639ad5562c63 100644
--- a/arch/mips/galileo-boards/ev96100/setup.c
+++ b/arch/mips/galileo-boards/ev96100/setup.c
@@ -32,7 +32,6 @@
32 * with this program; if not, write to the Free Software Foundation, Inc., 32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA. 33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */ 34 */
35#include <linux/config.h>
36#include <linux/init.h> 35#include <linux/init.h>
37#include <linux/sched.h> 36#include <linux/sched.h>
38#include <linux/ioport.h> 37#include <linux/ioport.h>
diff --git a/arch/mips/galileo-boards/ev96100/time.c b/arch/mips/galileo-boards/ev96100/time.c
index bff5b1c174e4..8cbe8426491a 100644
--- a/arch/mips/galileo-boards/ev96100/time.c
+++ b/arch/mips/galileo-boards/ev96100/time.c
@@ -32,7 +32,6 @@
32 * with this program; if not, write to the Free Software Foundation, Inc., 32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA. 33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */ 34 */
35#include <linux/config.h>
36#include <linux/init.h> 35#include <linux/init.h>
37#include <linux/kernel_stat.h> 36#include <linux/kernel_stat.h>
38#include <linux/module.h> 37#include <linux/module.h>
diff --git a/arch/mips/gt64120/common/Makefile b/arch/mips/gt64120/common/Makefile
index eba5051015a5..1ef676e22ab4 100644
--- a/arch/mips/gt64120/common/Makefile
+++ b/arch/mips/gt64120/common/Makefile
@@ -3,4 +3,3 @@
3# 3#
4 4
5obj-y += time.o 5obj-y += time.o
6obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/mips/gt64120/common/pci.c b/arch/mips/gt64120/common/pci.c
deleted file mode 100644
index e9e5419a0d53..000000000000
--- a/arch/mips/gt64120/common/pci.c
+++ /dev/null
@@ -1,147 +0,0 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Galileo Evaluation Boards PCI support.
4 *
5 * The general-purpose functions to read/write and configure the GT64120A's
6 * PCI registers (function names start with pci0 or pci1) are either direct
7 * copies of functions written by Galileo Technology, or are modifications
8 * of their functions to work with Linux 2.4 vs Linux 2.2. These functions
9 * are Copyright - Galileo Technology.
10 *
11 * Other functions are derived from other MIPS PCI implementations, or were
12 * written by RidgeRun, Inc, Copyright (C) 2000 RidgeRun, Inc.
13 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */
35#include <linux/init.h>
36#include <linux/types.h>
37#include <linux/pci.h>
38#include <linux/kernel.h>
39#include <asm/gt64120.h>
40
41#define SELF 0
42
43/*
44 * pciXReadConfigReg - Read from a PCI configuration register
45 * - Make sure the GT is configured as a master before
46 * reading from another device on the PCI.
47 * - The function takes care of Big/Little endian conversion.
48 * INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
49 * spec)
50 * pciDevNum: The device number needs to be addressed.
51 * RETURNS: data , if the data == 0xffffffff check the master abort bit in the
52 * cause register to make sure the data is valid
53 *
54 * Configuration Address 0xCF8:
55 *
56 * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
57 * |congif|Reserved| Bus |Device|Function|Register|00|
58 * |Enable| |Number|Number| Number | Number | | <=field Name
59 *
60 */
61static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device)
62{
63 unsigned int DataForRegCf8;
64 unsigned int data;
65
66 DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
67 (PCI_FUNC(device->devfn) << 8) |
68 (offset & ~0x3)) | 0x80000000;
69 GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
70
71 /*
72 * The casual observer might wonder why the READ is duplicated here,
73 * rather than immediately following the WRITE, and just have the swap
74 * in the "if". That's because there is a latency problem with trying
75 * to read immediately after setting up the address register. The "if"
76 * check gives enough time for the address to stabilize, so the READ
77 * can work.
78 */
79 if (PCI_SLOT(device->devfn) == SELF) /* This board */
80 return GT_READ(GT_PCI0_CFGDATA_OFS);
81 else /* PCI is little endian so swap the Data. */
82 return __GT_READ(GT_PCI0_CFGDATA_OFS);
83}
84
85/*
86 * pciXWriteConfigReg - Write to a PCI configuration register
87 * - Make sure the GT is configured as a master before
88 * writingto another device on the PCI.
89 * - The function takes care of Big/Little endian conversion.
90 * Inputs: unsigned int regOffset: The register offset as it apears in the
91 * GT spec
92 * (or any other PCI device spec)
93 * pciDevNum: The device number needs to be addressed.
94 *
95 * Configuration Address 0xCF8:
96 *
97 * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
98 * |congif|Reserved| Bus |Device|Function|Register|00|
99 * |Enable| |Number|Number| Number | Number | | <=field Name
100 *
101 */
102static void pci0WriteConfigReg(unsigned int offset,
103 struct pci_dev *device, unsigned int data)
104{
105 unsigned int DataForRegCf8;
106
107 DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
108 (PCI_FUNC(device->devfn) << 8) |
109 (offset & ~0x3)) | 0x80000000;
110 GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
111
112 if (PCI_SLOT(device->devfn) == SELF) /* This board */
113 GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
114 else /* configuration Transaction over the pci. */
115 __GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
116}
117
118extern struct pci_ops gt64120_pci_ops;
119
120void __init pcibios_init(void)
121{
122 u32 tmp;
123 struct pci_dev controller;
124
125 controller.devfn = SELF;
126
127 tmp = GT_READ(GT_PCI0_CMD_OFS); /* Huh??? -- Ralf */
128 tmp = GT_READ(GT_PCI0_BARE_OFS);
129
130 /*
131 * You have to enable bus mastering to configure any other
132 * card on the bus.
133 */
134 tmp = pci0ReadConfigReg(PCI_COMMAND, &controller);
135 tmp |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
136 pci0WriteConfigReg(PCI_COMMAND, &controller, tmp);
137
138 /*
139 * Reset PCI I/O and PCI MEM values to ones supported by EVM.
140 */
141 ioport_resource.start = GT_PCI_IO_BASE;
142 ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
143 iomem_resource.start = GT_PCI_MEM_BASE;
144 iomem_resource.end = GT_PCI_MEM_BASE + GT_PCI_MEM_SIZE - 1;
145
146 pci_scan_bus(0, &gt64120_pci_ops, NULL);
147}
diff --git a/arch/mips/gt64120/common/time.c b/arch/mips/gt64120/common/time.c
index 2287b59536e5..d837b26fbe51 100644
--- a/arch/mips/gt64120/common/time.c
+++ b/arch/mips/gt64120/common/time.c
@@ -8,7 +8,6 @@
8 */ 8 */
9#include <linux/interrupt.h> 9#include <linux/interrupt.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/config.h>
12#include <linux/sched.h> 11#include <linux/sched.h>
13#include <linux/kernel_stat.h> 12#include <linux/kernel_stat.h>
14#include <asm/ptrace.h> 13#include <asm/ptrace.h>
@@ -78,7 +77,7 @@ void gt64120_time_init(void)
78 * the values to the correct interrupt line. 77 * the values to the correct interrupt line.
79 */ 78 */
80 timer.handler = gt64120_irq; 79 timer.handler = gt64120_irq;
81 timer.flags = SA_SHIRQ | SA_INTERRUPT; 80 timer.flags = IRQF_SHARED | IRQF_DISABLED;
82 timer.name = "timer"; 81 timer.name = "timer";
83 timer.dev_id = NULL; 82 timer.dev_id = NULL;
84 timer.next = NULL; 83 timer.next = NULL;
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c
index 46c468b26b30..f489a8067a93 100644
--- a/arch/mips/gt64120/ev64120/irq.c
+++ b/arch/mips/gt64120/ev64120/irq.c
@@ -138,7 +138,7 @@ void __init arch_init_irq(void)
138 /* Let's initialize our IRQ descriptors */ 138 /* Let's initialize our IRQ descriptors */
139 for (i = 0; i < NR_IRQS; i++) { 139 for (i = 0; i < NR_IRQS; i++) {
140 irq_desc[i].status = 0; 140 irq_desc[i].status = 0;
141 irq_desc[i].handler = &no_irq_type; 141 irq_desc[i].chip = &no_irq_type;
142 irq_desc[i].action = NULL; 142 irq_desc[i].action = NULL;
143 irq_desc[i].depth = 0; 143 irq_desc[i].depth = 0;
144 spin_lock_init(&irq_desc[i].lock); 144 spin_lock_init(&irq_desc[i].lock);
diff --git a/arch/mips/gt64120/momenco_ocelot/dbg_io.c b/arch/mips/gt64120/momenco_ocelot/dbg_io.c
index f0a6a38fcf4d..2128684584f5 100644
--- a/arch/mips/gt64120/momenco_ocelot/dbg_io.c
+++ b/arch/mips/gt64120/momenco_ocelot/dbg_io.c
@@ -1,4 +1,3 @@
1#include <linux/config.h>
2 1
3#ifdef CONFIG_KGDB 2#ifdef CONFIG_KGDB
4 3
diff --git a/arch/mips/gt64120/momenco_ocelot/setup.c b/arch/mips/gt64120/momenco_ocelot/setup.c
index 1193a22c4693..9804642ecf89 100644
--- a/arch/mips/gt64120/momenco_ocelot/setup.c
+++ b/arch/mips/gt64120/momenco_ocelot/setup.c
@@ -164,8 +164,8 @@ void __init plat_mem_setup(void)
164 pm_power_off = momenco_ocelot_power_off; 164 pm_power_off = momenco_ocelot_power_off;
165 165
166 /* 166 /*
167 * initrd_start = (ulong)ocelot_initrd_start; 167 * initrd_start = (unsigned long)ocelot_initrd_start;
168 * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size; 168 * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size;
169 * initrd_below_start_ok = 1; 169 * initrd_below_start_ok = 1;
170 */ 170 */
171 171
diff --git a/arch/mips/gt64120/wrppmc/Makefile b/arch/mips/gt64120/wrppmc/Makefile
index 72606b9af12a..7cf52205511c 100644
--- a/arch/mips/gt64120/wrppmc/Makefile
+++ b/arch/mips/gt64120/wrppmc/Makefile
@@ -9,6 +9,6 @@
9# Makefile for the Wind River MIPS 4KC PPMC Eval Board 9# Makefile for the Wind River MIPS 4KC PPMC Eval Board
10# 10#
11 11
12obj-y += int-handler.o irq.o reset.o setup.o time.o pci.o 12obj-y += irq.o reset.o setup.o time.o pci.o
13 13
14EXTRA_AFLAGS := $(CFLAGS) 14EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/gt64120/wrppmc/int-handler.S b/arch/mips/gt64120/wrppmc/int-handler.S
deleted file mode 100644
index edee7b394175..000000000000
--- a/arch/mips/gt64120/wrppmc/int-handler.S
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
7 * Copyright (C) Wind River System Inc. Rongkai.Zhan <rongkai.zhan@windriver.com>
8 */
9#include <asm/asm.h>
10#include <asm/mipsregs.h>
11#include <asm/addrspace.h>
12#include <asm/regdef.h>
13#include <asm/stackframe.h>
14#include <asm/mach-wrppmc/mach-gt64120.h>
15
16 .align 5
17 .set noat
18NESTED(handle_IRQ, PT_SIZE, sp)
19 SAVE_ALL
20 CLI # Important: mark KERNEL mode !
21 .set at
22
23 mfc0 t0, CP0_CAUSE # get pending interrupts
24 mfc0 t1, CP0_STATUS # get enabled interrupts
25 and t0, t0, t1 # get allowed interrupts
26 andi t0, t0, 0xFF00
27 beqz t0, 1f
28 move a1, sp # Prepare 'struct pt_regs *regs' pointer
29
30 andi t1, t0, CAUSEF_IP7 # CPU Compare/Count internal timer
31 bnez t1, handle_cputimer_irq
32 andi t1, t0, CAUSEF_IP6 # UART 16550 port
33 bnez t1, handle_uart_irq
34 andi t1, t0, CAUSEF_IP3 # PCI INT_A
35 bnez t1, handle_pci_intA_irq
36
37 /* wrong alarm or masked ... */
381: j spurious_interrupt
39 nop
40END(handle_IRQ)
41
42 .align 5
43handle_cputimer_irq:
44 li a0, WRPPMC_MIPS_TIMER_IRQ
45 jal do_IRQ
46 j ret_from_irq
47
48 .align 5
49handle_uart_irq:
50 li a0, WRPPMC_UART16550_IRQ
51 jal do_IRQ
52 j ret_from_irq
53
54 .align 5
55handle_pci_intA_irq:
56 li a0, WRPPMC_PCI_INTA_IRQ
57 jal do_IRQ
58 j ret_from_irq
59
diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c
index 8605687e24ed..8d75a43ce877 100644
--- a/arch/mips/gt64120/wrppmc/irq.c
+++ b/arch/mips/gt64120/wrppmc/irq.c
@@ -30,7 +30,19 @@
30#include <asm/irq_cpu.h> 30#include <asm/irq_cpu.h>
31#include <asm/gt64120.h> 31#include <asm/gt64120.h>
32 32
33extern asmlinkage void handle_IRQ(void); 33asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
34{
35 unsigned int pending = read_c0_status() & read_c0_cause();
36
37 if (pending & STATUSF_IP7)
38 do_IRQ(WRPPMC_MIPS_TIMER_IRQ, regs); /* CPU Compare/Count internal timer */
39 else if (pending & STATUSF_IP6)
40 do_IRQ(WRPPMC_UART16550_IRQ, regs); /* UART 16550 port */
41 else if (pending & STATUSF_IP3)
42 do_IRQ(WRPPMC_PCI_INTA_IRQ, regs); /* PCI INT_A */
43 else
44 spurious_interrupt(regs);
45}
34 46
35/** 47/**
36 * Initialize GT64120 Interrupt Controller 48 * Initialize GT64120 Interrupt Controller
@@ -50,12 +62,6 @@ void gt64120_init_pic(void)
50 62
51void __init arch_init_irq(void) 63void __init arch_init_irq(void)
52{ 64{
53 /* enable all CPU interrupt bits. */
54 set_c0_status(ST0_IM); /* IE bit is still 0 */
55
56 /* Install MIPS Interrupt Trap Vector */
57 set_except_vector(0, handle_IRQ);
58
59 /* IRQ 0 - 7 are for MIPS common irq_cpu controller */ 65 /* IRQ 0 - 7 are for MIPS common irq_cpu controller */
60 mips_cpu_irq_init(0); 66 mips_cpu_irq_init(0);
61 67
diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c
index 20c591e49dae..2db6375ef29e 100644
--- a/arch/mips/gt64120/wrppmc/setup.c
+++ b/arch/mips/gt64120/wrppmc/setup.c
@@ -125,7 +125,7 @@ static void wrppmc_setup_serial(void)
125} 125}
126#endif 126#endif
127 127
128void __init plat_setup(void) 128void __init plat_mem_setup(void)
129{ 129{
130 extern void wrppmc_time_init(void); 130 extern void wrppmc_time_init(void);
131 extern void wrppmc_timer_setup(struct irqaction *); 131 extern void wrppmc_timer_setup(struct irqaction *);
diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c
index 175d22adb450..6c24a82df0dd 100644
--- a/arch/mips/gt64120/wrppmc/time.c
+++ b/arch/mips/gt64120/wrppmc/time.c
@@ -31,10 +31,6 @@ void __init wrppmc_timer_setup(struct irqaction *irq)
31{ 31{
32 /* Install ISR for timer interrupt */ 32 /* Install ISR for timer interrupt */
33 setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq); 33 setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq);
34
35 /* to generate the first timer interrupt */
36 write_c0_compare(mips_hpt_frequency/HZ);
37 write_c0_count(0);
38} 34}
39 35
40/* 36/*
diff --git a/arch/mips/ite-boards/generic/dbg_io.c b/arch/mips/ite-boards/generic/dbg_io.c
index 6a7ccaf93502..8e9cd8a9670a 100644
--- a/arch/mips/ite-boards/generic/dbg_io.c
+++ b/arch/mips/ite-boards/generic/dbg_io.c
@@ -1,5 +1,4 @@
1 1
2#include <linux/config.h>
3 2
4#ifdef CONFIG_KGDB 3#ifdef CONFIG_KGDB
5 4
diff --git a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c
index 77be7216bdd0..a6749c56fe38 100644
--- a/arch/mips/ite-boards/generic/irq.c
+++ b/arch/mips/ite-boards/generic/irq.c
@@ -208,10 +208,10 @@ void __init arch_init_irq(void)
208#endif 208#endif
209 209
210 for (i = 0; i <= IT8172_LAST_IRQ; i++) { 210 for (i = 0; i <= IT8172_LAST_IRQ; i++) {
211 irq_desc[i].handler = &it8172_irq_type; 211 irq_desc[i].chip = &it8172_irq_type;
212 spin_lock_init(&irq_desc[i].lock); 212 spin_lock_init(&irq_desc[i].lock);
213 } 213 }
214 irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type; 214 irq_desc[MIPS_CPU_TIMER_IRQ].chip = &cp0_irq_type;
215 set_c0_status(ALLINTS_NOTIMER); 215 set_c0_status(ALLINTS_NOTIMER);
216} 216}
217 217
diff --git a/arch/mips/ite-boards/generic/it8172_cir.c b/arch/mips/ite-boards/generic/it8172_cir.c
index 19deb153d005..bfc25adcfec6 100644
--- a/arch/mips/ite-boards/generic/it8172_cir.c
+++ b/arch/mips/ite-boards/generic/it8172_cir.c
@@ -28,7 +28,6 @@
28 * 675 Mass Ave, Cambridge, MA 02139, USA. 28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 29 */
30 30
31#include <linux/config.h>
32 31
33#ifdef CONFIG_IT8172_CIR 32#ifdef CONFIG_IT8172_CIR
34 33
diff --git a/arch/mips/ite-boards/generic/it8172_setup.c b/arch/mips/ite-boards/generic/it8172_setup.c
index da6ae0991199..a4615a5904aa 100644
--- a/arch/mips/ite-boards/generic/it8172_setup.c
+++ b/arch/mips/ite-boards/generic/it8172_setup.c
@@ -26,7 +26,6 @@
26 * with this program; if not, write to the Free Software Foundation, Inc., 26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA. 27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */ 28 */
29#include <linux/config.h>
30#include <linux/init.h> 29#include <linux/init.h>
31#include <linux/sched.h> 30#include <linux/sched.h>
32#include <linux/ioport.h> 31#include <linux/ioport.h>
diff --git a/arch/mips/ite-boards/generic/pmon_prom.c b/arch/mips/ite-boards/generic/pmon_prom.c
index 6e505af0cc08..7d0a79be34d8 100644
--- a/arch/mips/ite-boards/generic/pmon_prom.c
+++ b/arch/mips/ite-boards/generic/pmon_prom.c
@@ -35,7 +35,6 @@
35 * 675 Mass Ave, Cambridge, MA 02139, USA. 35 * 675 Mass Ave, Cambridge, MA 02139, USA.
36 */ 36 */
37 37
38#include <linux/config.h>
39#include <linux/kernel.h> 38#include <linux/kernel.h>
40#include <linux/init.h> 39#include <linux/init.h>
41#include <linux/string.h> 40#include <linux/string.h>
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index becc9accd495..478be9858a1e 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -73,7 +73,7 @@ void __init init_r4030_ints(void)
73 irq_desc[i].status = IRQ_DISABLED; 73 irq_desc[i].status = IRQ_DISABLED;
74 irq_desc[i].action = 0; 74 irq_desc[i].action = 0;
75 irq_desc[i].depth = 1; 75 irq_desc[i].depth = 1;
76 irq_desc[i].handler = &r4030_irq_type; 76 irq_desc[i].chip = &r4030_irq_type;
77 } 77 }
78 78
79 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); 79 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0);
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index c8d0df7d0c36..385413e30fdd 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -8,7 +8,6 @@
8 * Copyright (C) 1996, 1997, 1998, 2001 by Ralf Baechle 8 * Copyright (C) 1996, 1997, 1998, 2001 by Ralf Baechle
9 * Copyright (C) 2001 MIPS Technologies, Inc. 9 * Copyright (C) 2001 MIPS Technologies, Inc.
10 */ 10 */
11#include <linux/config.h>
12#include <linux/eisa.h> 11#include <linux/eisa.h>
13#include <linux/hdreg.h> 12#include <linux/hdreg.h>
14#include <linux/init.h> 13#include <linux/init.h>
diff --git a/arch/mips/jmr3927/rbhma3100/init.c b/arch/mips/jmr3927/rbhma3100/init.c
index a0674d73962f..a55cb4572ded 100644
--- a/arch/mips/jmr3927/rbhma3100/init.c
+++ b/arch/mips/jmr3927/rbhma3100/init.c
@@ -27,7 +27,6 @@
27 * with this program; if not, write to the Free Software Foundation, Inc., 27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA. 28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 29 */
30#include <linux/config.h>
31#include <linux/init.h> 30#include <linux/init.h>
32#include <linux/mm.h> 31#include <linux/mm.h>
33#include <linux/sched.h> 32#include <linux/sched.h>
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
index 11304d1354f4..9c43702e7a93 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/jmr3927/rbhma3100/irq.c
@@ -29,7 +29,6 @@
29 * with this program; if not, write to the Free Software Foundation, Inc., 29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA. 30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 */ 31 */
32#include <linux/config.h>
33#include <linux/init.h> 32#include <linux/init.h>
34 33
35#include <linux/errno.h> 34#include <linux/errno.h>
@@ -435,7 +434,7 @@ void jmr3927_irq_init(u32 irq_base)
435 irq_desc[i].status = IRQ_DISABLED; 434 irq_desc[i].status = IRQ_DISABLED;
436 irq_desc[i].action = NULL; 435 irq_desc[i].action = NULL;
437 irq_desc[i].depth = 1; 436 irq_desc[i].depth = 1;
438 irq_desc[i].handler = &jmr3927_irq_controller; 437 irq_desc[i].chip = &jmr3927_irq_controller;
439 } 438 }
440 439
441 jmr3927_irq_base = irq_base; 440 jmr3927_irq_base = irq_base;
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index 308e6cdcd245..6d4635d89d94 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -33,7 +33,6 @@
33 *********************************************************************** 33 ***********************************************************************
34 */ 34 */
35 35
36#include <linux/config.h>
37#include <linux/init.h> 36#include <linux/init.h>
38#include <linux/kernel.h> 37#include <linux/kernel.h>
39#include <linux/kdev_t.h> 38#include <linux/kdev_t.h>
diff --git a/arch/mips/kernel/apm.c b/arch/mips/kernel/apm.c
index 15f46b4471fd..7bdbcd811b57 100644
--- a/arch/mips/kernel/apm.c
+++ b/arch/mips/kernel/apm.c
@@ -260,7 +260,7 @@ static unsigned int apm_poll(struct file *fp, poll_table * wait)
260 * has acknowledge does the actual suspend happen. 260 * has acknowledge does the actual suspend happen.
261 */ 261 */
262static int 262static int
263apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg) 263apm_ioctl(struct inode * inode, struct file *filp, unsigned int cmd, unsigned long arg)
264{ 264{
265 struct apm_user *as = filp->private_data; 265 struct apm_user *as = filp->private_data;
266 unsigned long flags; 266 unsigned long flags;
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index f1bb6a2dc5fc..ec28077d5ee2 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -8,7 +8,6 @@
8 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 8 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2000 MIPS Technologies, Inc. 9 * Copyright (C) 2000 MIPS Technologies, Inc.
10 */ 10 */
11#include <linux/config.h>
12#include <linux/compat.h> 11#include <linux/compat.h>
13#include <linux/types.h> 12#include <linux/types.h>
14#include <linux/sched.h> 13#include <linux/sched.h>
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index d268827c62bd..c09337b947b9 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -6,7 +6,6 @@
6 * as published by the Free Software Foundation; either version 6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version. 7 * 2 of the License, or (at your option) any later version.
8 */ 8 */
9#include <linux/config.h>
10#include <linux/init.h> 9#include <linux/init.h>
11#include <linux/kernel.h> 10#include <linux/kernel.h>
12#include <linux/ptrace.h> 11#include <linux/ptrace.h>
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 8c2c359a05f4..ba08f055feb2 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -11,7 +11,6 @@
11 * as published by the Free Software Foundation; either version 11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version. 12 * 2 of the License, or (at your option) any later version.
13 */ 13 */
14#include <linux/config.h>
15#include <linux/init.h> 14#include <linux/init.h>
16#include <linux/kernel.h> 15#include <linux/kernel.h>
17#include <linux/ptrace.h> 16#include <linux/ptrace.h>
@@ -597,8 +596,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
597 break; 596 break;
598 case PRID_IMP_25KF: 597 case PRID_IMP_25KF:
599 c->cputype = CPU_25KF; 598 c->cputype = CPU_25KF;
600 /* Probe for L2 cache */
601 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
602 break; 599 break;
603 case PRID_IMP_34K: 600 case PRID_IMP_34K:
604 c->cputype = CPU_34K; 601 c->cputype = CPU_34K;
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index a9c6de1b9542..01e7fa86aa43 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -7,7 +7,6 @@
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc. 8 * Copyright (C) 2001 MIPS Technologies, Inc.
9 */ 9 */
10#include <linux/config.h>
11 10
12#include <asm/asm.h> 11#include <asm/asm.h>
13#include <asm/asmmacro.h> 12#include <asm/asmmacro.h>
@@ -66,7 +65,7 @@ need_resched:
66#endif 65#endif
67 66
68FEXPORT(ret_from_fork) 67FEXPORT(ret_from_fork)
69 jal schedule_tail # a0 = task_t *prev 68 jal schedule_tail # a0 = struct task_struct *prev
70 69
71FEXPORT(syscall_exit) 70FEXPORT(syscall_exit)
72 local_irq_disable # make sure need_resched and 71 local_irq_disable # make sure need_resched and
@@ -87,7 +86,7 @@ FEXPORT(restore_all) # restore full frame
87 ori v1, v0, TCSTATUS_IXMT 86 ori v1, v0, TCSTATUS_IXMT
88 mtc0 v1, CP0_TCSTATUS 87 mtc0 v1, CP0_TCSTATUS
89 andi v0, TCSTATUS_IXMT 88 andi v0, TCSTATUS_IXMT
90 ehb 89 _ehb
91 mfc0 t0, CP0_TCCONTEXT 90 mfc0 t0, CP0_TCCONTEXT
92 DMT 9 # dmt t1 91 DMT 9 # dmt t1
93 jal mips_ihb 92 jal mips_ihb
@@ -95,7 +94,7 @@ FEXPORT(restore_all) # restore full frame
95 andi t3, t0, 0xff00 94 andi t3, t0, 0xff00
96 or t2, t2, t3 95 or t2, t2, t3
97 mtc0 t2, CP0_STATUS 96 mtc0 t2, CP0_STATUS
98 ehb 97 _ehb
99 andi t1, t1, VPECONTROL_TE 98 andi t1, t1, VPECONTROL_TE
100 beqz t1, 1f 99 beqz t1, 1f
101 EMT 100 EMT
@@ -105,7 +104,7 @@ FEXPORT(restore_all) # restore full frame
105 xori v1, v1, TCSTATUS_IXMT 104 xori v1, v1, TCSTATUS_IXMT
106 or v1, v0, v1 105 or v1, v0, v1
107 mtc0 v1, CP0_TCSTATUS 106 mtc0 v1, CP0_TCSTATUS
108 ehb 107 _ehb
109 xor t0, t0, t3 108 xor t0, t0, t3
110 mtc0 t0, CP0_TCCONTEXT 109 mtc0 t0, CP0_TCCONTEXT
111#endif /* CONFIG_MIPS_MT_SMTC */ 110#endif /* CONFIG_MIPS_MT_SMTC */
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S
index 5fd7a8af0c62..666bc9014cbd 100644
--- a/arch/mips/kernel/gdb-low.S
+++ b/arch/mips/kernel/gdb-low.S
@@ -3,7 +3,6 @@
3 * 3 *
4 * Copyright (C) 1995 Andreas Busse 4 * Copyright (C) 1995 Andreas Busse
5 */ 5 */
6#include <linux/config.h>
7#include <linux/sys.h> 6#include <linux/sys.h>
8 7
9#include <asm/asm.h> 8#include <asm/asm.h>
@@ -291,7 +290,7 @@
291 ori t1, t2, TCSTATUS_IXMT 290 ori t1, t2, TCSTATUS_IXMT
292 mtc0 t1, CP0_TCSTATUS 291 mtc0 t1, CP0_TCSTATUS
293 andi t2, t2, TCSTATUS_IXMT 292 andi t2, t2, TCSTATUS_IXMT
294 ehb 293 _ehb
295 DMT 9 # dmt t1 294 DMT 9 # dmt t1
296 jal mips_ihb 295 jal mips_ihb
297 nop 296 nop
@@ -310,7 +309,7 @@
310 xori t1, t1, TCSTATUS_IXMT 309 xori t1, t1, TCSTATUS_IXMT
311 or t1, t1, t2 310 or t1, t1, t2
312 mtc0 t1, CP0_TCSTATUS 311 mtc0 t1, CP0_TCSTATUS
313 ehb 312 _ehb
314#endif /* CONFIG_MIPS_MT_SMTC */ 313#endif /* CONFIG_MIPS_MT_SMTC */
315 LONG_L v0, GDB_FR_STATUS(sp) 314 LONG_L v0, GDB_FR_STATUS(sp)
316 LONG_L v1, GDB_FR_EPC(sp) 315 LONG_L v1, GDB_FR_EPC(sp)
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
index 6ecbdc1fefd1..719d26968cb2 100644
--- a/arch/mips/kernel/gdb-stub.c
+++ b/arch/mips/kernel/gdb-stub.c
@@ -120,7 +120,6 @@
120 * breakpoints, single stepping, 120 * breakpoints, single stepping,
121 * printing variables, etc. 121 * printing variables, etc.
122 */ 122 */
123#include <linux/config.h>
124#include <linux/string.h> 123#include <linux/string.h>
125#include <linux/kernel.h> 124#include <linux/kernel.h>
126#include <linux/signal.h> 125#include <linux/signal.h>
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index ff7af369f286..5254a2222d2b 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -8,7 +8,6 @@
8 * Copyright (C) 2001 MIPS Technologies, Inc. 8 * Copyright (C) 2001 MIPS Technologies, Inc.
9 * Copyright (C) 2002 Maciej W. Rozycki 9 * Copyright (C) 2002 Maciej W. Rozycki
10 */ 10 */
11#include <linux/config.h>
12#include <linux/init.h> 11#include <linux/init.h>
13 12
14#include <asm/asm.h> 13#include <asm/asm.h>
@@ -214,7 +213,7 @@ NESTED(except_vec_vi_handler, 0, sp)
214 mtc0 t0, CP0_TCCONTEXT 213 mtc0 t0, CP0_TCCONTEXT
215 xor t1, t1, t0 214 xor t1, t1, t0
216 mtc0 t1, CP0_STATUS 215 mtc0 t1, CP0_STATUS
217 ehb 216 _ehb
218#endif /* CONFIG_MIPS_MT_SMTC */ 217#endif /* CONFIG_MIPS_MT_SMTC */
219 CLI 218 CLI
220 move a0, sp 219 move a0, sp
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index bdf6f6eff721..476c1eb33c94 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -13,7 +13,6 @@
13 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 13 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
14 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 14 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
15 */ 15 */
16#include <linux/config.h>
17#include <linux/init.h> 16#include <linux/init.h>
18#include <linux/threads.h> 17#include <linux/threads.h>
19 18
@@ -96,7 +95,7 @@
96 /* Clear TKSU, leave IXMT */ 95 /* Clear TKSU, leave IXMT */
97 xori t0, 0x00001800 96 xori t0, 0x00001800
98 mtc0 t0, CP0_TCSTATUS 97 mtc0 t0, CP0_TCSTATUS
99 ehb 98 _ehb
100 /* We need to leave the global IE bit set, but clear EXL...*/ 99 /* We need to leave the global IE bit set, but clear EXL...*/
101 mfc0 t0, CP0_STATUS 100 mfc0 t0, CP0_STATUS
102 or t0, ST0_CU0 | ST0_EXL | ST0_ERL | \set | \clr 101 or t0, ST0_CU0 | ST0_EXL | ST0_ERL | \set | \clr
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 0cb8ed5662f3..91ffb1233cad 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -120,7 +120,7 @@ int i8259A_irq_pending(unsigned int irq)
120void make_8259A_irq(unsigned int irq) 120void make_8259A_irq(unsigned int irq)
121{ 121{
122 disable_irq_nosync(irq); 122 disable_irq_nosync(irq);
123 irq_desc[irq].handler = &i8259A_irq_type; 123 irq_desc[irq].chip = &i8259A_irq_type;
124 enable_irq(irq); 124 enable_irq(irq);
125} 125}
126 126
@@ -327,7 +327,7 @@ void __init init_i8259_irqs (void)
327 irq_desc[i].status = IRQ_DISABLED; 327 irq_desc[i].status = IRQ_DISABLED;
328 irq_desc[i].action = NULL; 328 irq_desc[i].action = NULL;
329 irq_desc[i].depth = 1; 329 irq_desc[i].depth = 1;
330 irq_desc[i].handler = &i8259A_irq_type; 330 irq_desc[i].chip = &i8259A_irq_type;
331 } 331 }
332 332
333 setup_irq(2, &irq2); 333 setup_irq(2, &irq2);
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 10d3644e3608..ab12c8f01518 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -999,8 +999,6 @@ static inline int maydump(struct vm_area_struct *vma)
999 return 1; 999 return 1;
1000} 1000}
1001 1001
1002#define roundup(x, y) ((((x)+((y)-1))/(y))*(y))
1003
1004/* An ELF note in memory. */ 1002/* An ELF note in memory. */
1005struct memelfnote 1003struct memelfnote
1006{ 1004{
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 97ebdc754b9e..f8cd1ac64d88 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -174,14 +174,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq)
174 174
175 switch (imp->im_type) { 175 switch (imp->im_type) {
176 case MSC01_IRQ_EDGE: 176 case MSC01_IRQ_EDGE:
177 irq_desc[base+n].handler = &msc_edgeirq_type; 177 irq_desc[base+n].chip = &msc_edgeirq_type;
178 if (cpu_has_veic) 178 if (cpu_has_veic)
179 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); 179 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
180 else 180 else
181 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); 181 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
182 break; 182 break;
183 case MSC01_IRQ_LEVEL: 183 case MSC01_IRQ_LEVEL:
184 irq_desc[base+n].handler = &msc_levelirq_type; 184 irq_desc[base+n].chip = &msc_levelirq_type;
185 if (cpu_has_veic) 185 if (cpu_has_veic)
186 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); 186 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
187 else 187 else
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c
index 0613f1f36b1b..f9c763a65547 100644
--- a/arch/mips/kernel/irq-mv6434x.c
+++ b/arch/mips/kernel/irq-mv6434x.c
@@ -155,7 +155,7 @@ void __init mv64340_irq_init(unsigned int base)
155 irq_desc[i].status = IRQ_DISABLED; 155 irq_desc[i].status = IRQ_DISABLED;
156 irq_desc[i].action = 0; 156 irq_desc[i].action = 0;
157 irq_desc[i].depth = 2; 157 irq_desc[i].depth = 2;
158 irq_desc[i].handler = &mv64340_irq_type; 158 irq_desc[i].chip = &mv64340_irq_type;
159 } 159 }
160 160
161 irq_base = base; 161 irq_base = base;
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
index 0b130c5ac5d9..121da385a94d 100644
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -91,7 +91,7 @@ void __init rm7k_cpu_irq_init(int base)
91 irq_desc[i].status = IRQ_DISABLED; 91 irq_desc[i].status = IRQ_DISABLED;
92 irq_desc[i].action = NULL; 92 irq_desc[i].action = NULL;
93 irq_desc[i].depth = 1; 93 irq_desc[i].depth = 1;
94 irq_desc[i].handler = &rm7k_irq_controller; 94 irq_desc[i].chip = &rm7k_irq_controller;
95 } 95 }
96 96
97 irq_base = base; 97 irq_base = base;
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
index 9b5f20c32acb..25109c103e44 100644
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -139,11 +139,11 @@ void __init rm9k_cpu_irq_init(int base)
139 irq_desc[i].status = IRQ_DISABLED; 139 irq_desc[i].status = IRQ_DISABLED;
140 irq_desc[i].action = NULL; 140 irq_desc[i].action = NULL;
141 irq_desc[i].depth = 1; 141 irq_desc[i].depth = 1;
142 irq_desc[i].handler = &rm9k_irq_controller; 142 irq_desc[i].chip = &rm9k_irq_controller;
143 } 143 }
144 144
145 rm9000_perfcount_irq = base + 1; 145 rm9000_perfcount_irq = base + 1;
146 irq_desc[rm9000_perfcount_irq].handler = &rm9k_perfcounter_irq; 146 irq_desc[rm9000_perfcount_irq].chip = &rm9k_perfcounter_irq;
147 147
148 irq_base = base; 148 irq_base = base;
149} 149}
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 3dce742e716f..cde5e5afa179 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -8,7 +8,6 @@
8 * Copyright (C) 1992 Linus Torvalds 8 * Copyright (C) 1992 Linus Torvalds
9 * Copyright (C) 1994 - 2000 Ralf Baechle 9 * Copyright (C) 1994 - 2000 Ralf Baechle
10 */ 10 */
11#include <linux/config.h>
12#include <linux/kernel.h> 11#include <linux/kernel.h>
13#include <linux/delay.h> 12#include <linux/delay.h>
14#include <linux/init.h> 13#include <linux/init.h>
@@ -95,7 +94,7 @@ int show_interrupts(struct seq_file *p, void *v)
95 for_each_online_cpu(j) 94 for_each_online_cpu(j)
96 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 95 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
97#endif 96#endif
98 seq_printf(p, " %14s", irq_desc[i].handler->typename); 97 seq_printf(p, " %14s", irq_desc[i].chip->typename);
99 seq_printf(p, " %s", action->name); 98 seq_printf(p, " %s", action->name);
100 99
101 for (action=action->next; action; action = action->next) 100 for (action=action->next; action; action = action->next)
@@ -137,7 +136,7 @@ void __init init_IRQ(void)
137 irq_desc[i].status = IRQ_DISABLED; 136 irq_desc[i].status = IRQ_DISABLED;
138 irq_desc[i].action = NULL; 137 irq_desc[i].action = NULL;
139 irq_desc[i].depth = 1; 138 irq_desc[i].depth = 1;
140 irq_desc[i].handler = &no_irq_type; 139 irq_desc[i].chip = &no_irq_type;
141 spin_lock_init(&irq_desc[i].lock); 140 spin_lock_init(&irq_desc[i].lock);
142#ifdef CONFIG_MIPS_MT_SMTC 141#ifdef CONFIG_MIPS_MT_SMTC
143 irq_hwmask[i] = 0; 142 irq_hwmask[i] = 0;
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 5db67e31ec1a..0e455a8ad860 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -167,14 +167,14 @@ void __init mips_cpu_irq_init(int irq_base)
167 irq_desc[i].status = IRQ_DISABLED; 167 irq_desc[i].status = IRQ_DISABLED;
168 irq_desc[i].action = NULL; 168 irq_desc[i].action = NULL;
169 irq_desc[i].depth = 1; 169 irq_desc[i].depth = 1;
170 irq_desc[i].handler = &mips_mt_cpu_irq_controller; 170 irq_desc[i].chip = &mips_mt_cpu_irq_controller;
171 } 171 }
172 172
173 for (i = irq_base + 2; i < irq_base + 8; i++) { 173 for (i = irq_base + 2; i < irq_base + 8; i++) {
174 irq_desc[i].status = IRQ_DISABLED; 174 irq_desc[i].status = IRQ_DISABLED;
175 irq_desc[i].action = NULL; 175 irq_desc[i].action = NULL;
176 irq_desc[i].depth = 1; 176 irq_desc[i].depth = 1;
177 irq_desc[i].handler = &mips_cpu_irq_controller; 177 irq_desc[i].chip = &mips_cpu_irq_controller;
178 } 178 }
179 179
180 mips_cpu_irq_base = irq_base; 180 mips_cpu_irq_base = irq_base;
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index a7d2bb3cf835..450ac592da57 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -5,7 +5,6 @@
5 * Written by Ulf Carlsson (ulfc@engr.sgi.com) 5 * Written by Ulf Carlsson (ulfc@engr.sgi.com)
6 * sys32_execve from ia64/ia32 code, Feb 2000, Kanoj Sarcar (kanoj@sgi.com) 6 * sys32_execve from ia64/ia32 code, Feb 2000, Kanoj Sarcar (kanoj@sgi.com)
7 */ 7 */
8#include <linux/config.h>
9#include <linux/compiler.h> 8#include <linux/compiler.h>
10#include <linux/mm.h> 9#include <linux/mm.h>
11#include <linux/errno.h> 10#include <linux/errno.h>
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index 02237a685ec7..4dcc39f42951 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -47,7 +47,7 @@ unsigned long mt_fpemul_threshold = 0;
47 * used in sys_sched_set/getaffinity() in kernel/sched.c, so 47 * used in sys_sched_set/getaffinity() in kernel/sched.c, so
48 * cloned here. 48 * cloned here.
49 */ 49 */
50static inline task_t *find_process_by_pid(pid_t pid) 50static inline struct task_struct *find_process_by_pid(pid_t pid)
51{ 51{
52 return pid ? find_task_by_pid(pid) : current; 52 return pid ? find_task_by_pid(pid) : current;
53} 53}
@@ -62,7 +62,7 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
62 cpumask_t new_mask; 62 cpumask_t new_mask;
63 cpumask_t effective_mask; 63 cpumask_t effective_mask;
64 int retval; 64 int retval;
65 task_t *p; 65 struct task_struct *p;
66 66
67 if (len < sizeof(new_mask)) 67 if (len < sizeof(new_mask))
68 return -EINVAL; 68 return -EINVAL;
@@ -127,7 +127,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len,
127 unsigned int real_len; 127 unsigned int real_len;
128 cpumask_t mask; 128 cpumask_t mask;
129 int retval; 129 int retval;
130 task_t *p; 130 struct task_struct *p;
131 131
132 real_len = sizeof(mask); 132 real_len = sizeof(mask);
133 if (len < real_len) 133 if (len < real_len)
diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index 0a71a4c33716..f44a01357ada 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -8,7 +8,6 @@
8 * Copyright (C) 1996, 97, 98, 99, 2000, 01, 03, 04, 05 by Ralf Baechle 8 * Copyright (C) 1996, 97, 98, 99, 2000, 01, 03, 04, 05 by Ralf Baechle
9 * Copyright (C) 1999, 2000, 01 Silicon Graphics, Inc. 9 * Copyright (C) 1999, 2000, 01 Silicon Graphics, Inc.
10 */ 10 */
11#include <linux/config.h>
12#include <linux/interrupt.h> 11#include <linux/interrupt.h>
13#include <linux/module.h> 12#include <linux/module.h>
14#include <asm/checksum.h> 13#include <asm/checksum.h>
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 9def554f335b..d8beef107902 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -5,7 +5,6 @@
5 * Copyright (C) 2001, 2004 MIPS Technologies, Inc. 5 * Copyright (C) 2001, 2004 MIPS Technologies, Inc.
6 * Copyright (C) 2004 Maciej W. Rozycki 6 * Copyright (C) 2004 Maciej W. Rozycki
7 */ 7 */
8#include <linux/config.h>
9#include <linux/delay.h> 8#include <linux/delay.h>
10#include <linux/kernel.h> 9#include <linux/kernel.h>
11#include <linux/sched.h> 10#include <linux/sched.h>
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 199a06e873c6..7ab67f786bfe 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -8,7 +8,6 @@
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer 9 * Copyright (C) 2004 Thiemo Seufer
10 */ 10 */
11#include <linux/config.h>
12#include <linux/errno.h> 11#include <linux/errno.h>
13#include <linux/module.h> 12#include <linux/module.h>
14#include <linux/sched.h> 13#include <linux/sched.h>
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 1d44025188d8..362d1728e531 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -14,7 +14,6 @@
14 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit 14 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15 * binaries. 15 * binaries.
16 */ 16 */
17#include <linux/config.h>
18#include <linux/compiler.h> 17#include <linux/compiler.h>
19#include <linux/kernel.h> 18#include <linux/kernel.h>
20#include <linux/sched.h> 19#include <linux/sched.h>
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 0d9c4a32a9c2..656bde2e11b1 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -10,7 +10,6 @@
10 * Further modifications to make this work: 10 * Further modifications to make this work:
11 * Copyright (c) 1998-2000 Harald Koerfgen 11 * Copyright (c) 1998-2000 Harald Koerfgen
12 */ 12 */
13#include <linux/config.h>
14#include <asm/asm.h> 13#include <asm/asm.h>
15#include <asm/cachectl.h> 14#include <asm/cachectl.h>
16#include <asm/fpregdef.h> 15#include <asm/fpregdef.h>
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 283a98508fc8..880fa6e841ee 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -12,7 +12,6 @@
12 * Copyright (C) 2000 MIPS Technologies, Inc. 12 * Copyright (C) 2000 MIPS Technologies, Inc.
13 * Copyright (C) 1999, 2001 Silicon Graphics, Inc. 13 * Copyright (C) 1999, 2001 Silicon Graphics, Inc.
14 */ 14 */
15#include <linux/config.h>
16#include <asm/asm.h> 15#include <asm/asm.h>
17#include <asm/errno.h> 16#include <asm/errno.h>
18#include <asm/fpregdef.h> 17#include <asm/fpregdef.h>
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index db94e556fc97..d5c8b82fed72 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -10,7 +10,6 @@
10 * Copyright (C) 2000 MIPS Technologies, Inc. 10 * Copyright (C) 2000 MIPS Technologies, Inc.
11 * written by Carsten Langgaard, carstenl@mips.com 11 * written by Carsten Langgaard, carstenl@mips.com
12 */ 12 */
13#include <linux/config.h>
14#include <asm/asm.h> 13#include <asm/asm.h>
15#include <asm/cachectl.h> 14#include <asm/cachectl.h>
16#include <asm/fpregdef.h> 15#include <asm/fpregdef.h>
@@ -94,7 +93,7 @@
94 ori t1, t2, TCSTATUS_IXMT 93 ori t1, t2, TCSTATUS_IXMT
95 mtc0 t1, CP0_TCSTATUS 94 mtc0 t1, CP0_TCSTATUS
96 andi t2, t2, TCSTATUS_IXMT 95 andi t2, t2, TCSTATUS_IXMT
97 ehb 96 _ehb
98 DMT 8 # dmt t0 97 DMT 8 # dmt t0
99 move t1,ra 98 move t1,ra
100 jal mips_ihb 99 jal mips_ihb
@@ -109,7 +108,7 @@
109 or a2, t1 108 or a2, t1
110 mtc0 a2, CP0_STATUS 109 mtc0 a2, CP0_STATUS
111#ifdef CONFIG_MIPS_MT_SMTC 110#ifdef CONFIG_MIPS_MT_SMTC
112 ehb 111 _ehb
113 andi t0, t0, VPECONTROL_TE 112 andi t0, t0, VPECONTROL_TE
114 beqz t0, 1f 113 beqz t0, 1f
115 emt 114 emt
@@ -118,7 +117,7 @@
118 xori t1, t1, TCSTATUS_IXMT 117 xori t1, t1, TCSTATUS_IXMT
119 or t1, t1, t2 118 or t1, t1, t2
120 mtc0 t1, CP0_TCSTATUS 119 mtc0 t1, CP0_TCSTATUS
121 ehb 120 _ehb
122#endif /* CONFIG_MIPS_MT_SMTC */ 121#endif /* CONFIG_MIPS_MT_SMTC */
123 move v0, a0 122 move v0, a0
124 jr ra 123 jr ra
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index caf777f83289..cdab1b2cd134 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -487,7 +487,7 @@ static struct file_operations rtlx_fops = {
487 487
488static struct irqaction rtlx_irq = { 488static struct irqaction rtlx_irq = {
489 .handler = rtlx_interrupt, 489 .handler = rtlx_interrupt,
490 .flags = SA_INTERRUPT, 490 .flags = IRQF_DISABLED,
491 .name = "RTLX", 491 .name = "RTLX",
492}; 492};
493 493
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 2d2fdf77e308..8f8101f878ca 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -7,7 +7,6 @@
7 * Copyright (C) 2001 MIPS Technologies, Inc. 7 * Copyright (C) 2001 MIPS Technologies, Inc.
8 * Copyright (C) 2004 Thiemo Seufer 8 * Copyright (C) 2004 Thiemo Seufer
9 */ 9 */
10#include <linux/config.h>
11#include <linux/errno.h> 10#include <linux/errno.h>
12#include <asm/asm.h> 11#include <asm/asm.h>
13#include <asm/asmmacro.h> 12#include <asm/asmmacro.h>
@@ -647,6 +646,7 @@ einval: li v0, -EINVAL
647 sys sys_unshare 1 646 sys sys_unshare 1
648 sys sys_splice 4 647 sys sys_splice 4
649 sys sys_sync_file_range 7 /* 4305 */ 648 sys sys_sync_file_range 7 /* 4305 */
649 sys sys_tee 4
650 .endm 650 .endm
651 651
652 /* We pre-compute the number of _instruction_ bytes needed to 652 /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 9ba750887377..b4a34a625a2e 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -7,7 +7,6 @@
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc. 8 * Copyright (C) 2001 MIPS Technologies, Inc.
9 */ 9 */
10#include <linux/config.h>
11#include <linux/errno.h> 10#include <linux/errno.h>
12#include <asm/asm.h> 11#include <asm/asm.h>
13#include <asm/asmmacro.h> 12#include <asm/asmmacro.h>
@@ -462,3 +461,4 @@ sys_call_table:
462 PTR sys_unshare 461 PTR sys_unshare
463 PTR sys_splice 462 PTR sys_splice
464 PTR sys_sync_file_range 463 PTR sys_sync_file_range
464 PTR sys_tee /* 5265 */
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 942aca26f9c4..df8c4f8ccd61 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -7,7 +7,6 @@
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc. 8 * Copyright (C) 2001 MIPS Technologies, Inc.
9 */ 9 */
10#include <linux/config.h>
11#include <linux/errno.h> 10#include <linux/errno.h>
12#include <asm/asm.h> 11#include <asm/asm.h>
13#include <asm/asmmacro.h> 12#include <asm/asmmacro.h>
@@ -388,3 +387,4 @@ EXPORT(sysn32_call_table)
388 PTR sys_unshare 387 PTR sys_unshare
389 PTR sys_splice 388 PTR sys_splice
390 PTR sys_sync_file_range 389 PTR sys_sync_file_range
390 PTR sys_tee
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 8efb23a84131..f04fe4f085c3 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -13,7 +13,6 @@
13 * to ABI64 calling convention. 64-bit syscalls are also processed 13 * to ABI64 calling convention. 64-bit syscalls are also processed
14 * here for now. 14 * here for now.
15 */ 15 */
16#include <linux/config.h>
17#include <linux/errno.h> 16#include <linux/errno.h>
18#include <asm/asm.h> 17#include <asm/asm.h>
19#include <asm/asmmacro.h> 18#include <asm/asmmacro.h>
@@ -510,4 +509,5 @@ sys_call_table:
510 PTR sys_unshare 509 PTR sys_unshare
511 PTR sys_splice 510 PTR sys_splice
512 PTR sys32_sync_file_range /* 4305 */ 511 PTR sys32_sync_file_range /* 4305 */
512 PTR sys_tee
513 .size sys_call_table,.-sys_call_table 513 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index bfcec8d9bfe4..8c2b596a136f 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -10,7 +10,6 @@
10 * Copyright (C) 1999 Silicon Graphics, Inc. 10 * Copyright (C) 1999 Silicon Graphics, Inc.
11 * Copyright (C) 2000 2001, 2002 Maciej W. Rozycki 11 * Copyright (C) 2000 2001, 2002 Maciej W. Rozycki
12 */ 12 */
13#include <linux/config.h>
14#include <linux/errno.h> 13#include <linux/errno.h>
15#include <linux/init.h> 14#include <linux/init.h>
16#include <linux/ioport.h> 15#include <linux/ioport.h>
@@ -25,7 +24,7 @@
25#include <linux/user.h> 24#include <linux/user.h>
26#include <linux/utsname.h> 25#include <linux/utsname.h>
27#include <linux/a.out.h> 26#include <linux/a.out.h>
28#include <linux/tty.h> 27#include <linux/screen_info.h>
29#include <linux/bootmem.h> 28#include <linux/bootmem.h>
30#include <linux/initrd.h> 29#include <linux/initrd.h>
31#include <linux/major.h> 30#include <linux/major.h>
@@ -488,6 +487,9 @@ static inline void resource_init(void)
488{ 487{
489 int i; 488 int i;
490 489
490 if (UNCAC_BASE != IO_BASE)
491 return;
492
491 code_resource.start = virt_to_phys(&_text); 493 code_resource.start = virt_to_phys(&_text);
492 code_resource.end = virt_to_phys(&_etext) - 1; 494 code_resource.end = virt_to_phys(&_etext) - 1;
493 data_resource.start = virt_to_phys(&_etext); 495 data_resource.start = virt_to_phys(&_etext);
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h
index ce6cb915c0a7..b1f09d54ebe6 100644
--- a/arch/mips/kernel/signal-common.h
+++ b/arch/mips/kernel/signal-common.h
@@ -8,7 +8,6 @@
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 */ 9 */
10 10
11#include <linux/config.h>
12 11
13static inline int 12static inline int
14setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) 13setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 402efd27c79e..6b4d9be31615 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -7,7 +7,6 @@
7 * Copyright (C) 1994 - 2000 Ralf Baechle 7 * Copyright (C) 1994 - 2000 Ralf Baechle
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 */ 9 */
10#include <linux/config.h>
11#include <linux/cache.h> 10#include <linux/cache.h>
12#include <linux/sched.h> 11#include <linux/sched.h>
13#include <linux/mm.h> 12#include <linux/mm.h>
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 57770902b9ae..93429a4d3012 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -130,13 +130,13 @@ irqreturn_t ipi_call_interrupt(int irq, void *dev_id, struct pt_regs *regs)
130 130
131static struct irqaction irq_resched = { 131static struct irqaction irq_resched = {
132 .handler = ipi_resched_interrupt, 132 .handler = ipi_resched_interrupt,
133 .flags = SA_INTERRUPT, 133 .flags = IRQF_DISABLED,
134 .name = "IPI_resched" 134 .name = "IPI_resched"
135}; 135};
136 136
137static struct irqaction irq_call = { 137static struct irqaction irq_call = {
138 .handler = ipi_call_interrupt, 138 .handler = ipi_call_interrupt,
139 .flags = SA_INTERRUPT, 139 .flags = IRQF_DISABLED,
140 .name = "IPI_call" 140 .name = "IPI_call"
141}; 141};
142 142
diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S
index c9d65196d917..72c6d98f8854 100644
--- a/arch/mips/kernel/smtc-asm.S
+++ b/arch/mips/kernel/smtc-asm.S
@@ -52,12 +52,12 @@ FEXPORT(__smtc_ipi_vector)
52 .set noat 52 .set noat
53 /* Disable thread scheduling to make Status update atomic */ 53 /* Disable thread scheduling to make Status update atomic */
54 DMT 27 # dmt k1 54 DMT 27 # dmt k1
55 ehb 55 _ehb
56 /* Set EXL */ 56 /* Set EXL */
57 mfc0 k0,CP0_STATUS 57 mfc0 k0,CP0_STATUS
58 ori k0,k0,ST0_EXL 58 ori k0,k0,ST0_EXL
59 mtc0 k0,CP0_STATUS 59 mtc0 k0,CP0_STATUS
60 ehb 60 _ehb
61 /* Thread scheduling now inhibited by EXL. Restore TE state. */ 61 /* Thread scheduling now inhibited by EXL. Restore TE state. */
62 andi k1,k1,VPECONTROL_TE 62 andi k1,k1,VPECONTROL_TE
63 beqz k1,1f 63 beqz k1,1f
@@ -82,7 +82,7 @@ FEXPORT(__smtc_ipi_vector)
82 li k1,ST0_CU0 82 li k1,ST0_CU0
83 or k1,k1,k0 83 or k1,k1,k0
84 mtc0 k1,CP0_STATUS 84 mtc0 k1,CP0_STATUS
85 ehb 85 _ehb
86 get_saved_sp 86 get_saved_sp
87 /* Interrupting TC will have pre-set values in slots in the new frame */ 87 /* Interrupting TC will have pre-set values in slots in the new frame */
882: subu k1,k1,PT_SIZE 882: subu k1,k1,PT_SIZE
@@ -90,7 +90,7 @@ FEXPORT(__smtc_ipi_vector)
90 lw k0,PT_TCSTATUS(k1) 90 lw k0,PT_TCSTATUS(k1)
91 /* Write it to TCStatus to restore CU/KSU/IXMT state */ 91 /* Write it to TCStatus to restore CU/KSU/IXMT state */
92 mtc0 k0,$2,1 92 mtc0 k0,$2,1
93 ehb 93 _ehb
94 lw k0,PT_EPC(k1) 94 lw k0,PT_EPC(k1)
95 mtc0 k0,CP0_EPC 95 mtc0 k0,CP0_EPC
96 /* Save all will redundantly recompute the SP, but use it for now */ 96 /* Save all will redundantly recompute the SP, but use it for now */
@@ -116,7 +116,7 @@ LEAF(self_ipi)
116 mfc0 t0,CP0_TCSTATUS 116 mfc0 t0,CP0_TCSTATUS
117 ori t1,t0,TCSTATUS_IXMT 117 ori t1,t0,TCSTATUS_IXMT
118 mtc0 t1,CP0_TCSTATUS 118 mtc0 t1,CP0_TCSTATUS
119 ehb 119 _ehb
120 /* We know we're in kernel mode, so prepare stack frame */ 120 /* We know we're in kernel mode, so prepare stack frame */
121 subu t1,sp,PT_SIZE 121 subu t1,sp,PT_SIZE
122 sw ra,PT_EPC(t1) 122 sw ra,PT_EPC(t1)
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 70cf09afdf56..a48d9e553083 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -1002,7 +1002,7 @@ void setup_cross_vpe_interrupts(void)
1002 set_vi_handler(MIPS_CPU_IPI_IRQ, ipi_irq_dispatch); 1002 set_vi_handler(MIPS_CPU_IPI_IRQ, ipi_irq_dispatch);
1003 1003
1004 irq_ipi.handler = ipi_interrupt; 1004 irq_ipi.handler = ipi_interrupt;
1005 irq_ipi.flags = SA_INTERRUPT; 1005 irq_ipi.flags = IRQF_DISABLED;
1006 irq_ipi.name = "SMTC_IPI"; 1006 irq_ipi.name = "SMTC_IPI";
1007 1007
1008 setup_irq_smtc(cpu_ipi_irq, &irq_ipi, (0x100 << MIPS_CPU_IPI_IRQ)); 1008 setup_irq_smtc(cpu_ipi_irq, &irq_ipi, (0x100 << MIPS_CPU_IPI_IRQ));
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 5e8a18a8e2bd..0721314db657 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -7,7 +7,6 @@
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc. 8 * Copyright (C) 2001 MIPS Technologies, Inc.
9 */ 9 */
10#include <linux/config.h>
11#include <linux/a.out.h> 10#include <linux/a.out.h>
12#include <linux/capability.h> 11#include <linux/capability.h>
13#include <linux/errno.h> 12#include <linux/errno.h>
@@ -301,7 +300,7 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
301 * 300 *
302 * This is really horribly ugly. 301 * This is really horribly ugly.
303 */ 302 */
304asmlinkage int sys_ipc (uint call, int first, int second, 303asmlinkage int sys_ipc (unsigned int call, int first, int second,
305 unsigned long third, void __user *ptr, long fifth) 304 unsigned long third, void __user *ptr, long fifth)
306{ 305{
307 int version, ret; 306 int version, ret;
@@ -359,18 +358,18 @@ asmlinkage int sys_ipc (uint call, int first, int second,
359 case SHMAT: 358 case SHMAT:
360 switch (version) { 359 switch (version) {
361 default: { 360 default: {
362 ulong raddr; 361 unsigned long raddr;
363 ret = do_shmat (first, (char __user *) ptr, second, 362 ret = do_shmat (first, (char __user *) ptr, second,
364 &raddr); 363 &raddr);
365 if (ret) 364 if (ret)
366 return ret; 365 return ret;
367 return put_user (raddr, (ulong __user *) third); 366 return put_user (raddr, (unsigned long __user *) third);
368 } 367 }
369 case 1: /* iBCS2 emulator entry point */ 368 case 1: /* iBCS2 emulator entry point */
370 if (!segment_eq(get_fs(), get_ds())) 369 if (!segment_eq(get_fs(), get_ds()))
371 return -EINVAL; 370 return -EINVAL;
372 return do_shmat (first, (char __user *) ptr, second, 371 return do_shmat (first, (char __user *) ptr, second,
373 (ulong *) third); 372 (unsigned long *) third);
374 } 373 }
375 case SHMDT: 374 case SHMDT:
376 return sys_shmdt ((char __user *)ptr); 375 return sys_shmdt ((char __user *)ptr);
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 13ff4da598cd..2393c11d5a20 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -11,7 +11,6 @@
11 * Free Software Foundation; either version 2 of the License, or (at your 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14#include <linux/config.h>
15#include <linux/types.h> 14#include <linux/types.h>
16#include <linux/kernel.h> 15#include <linux/kernel.h>
17#include <linux/init.h> 16#include <linux/init.h>
@@ -580,7 +579,7 @@ unsigned int mips_hpt_frequency;
580 579
581static struct irqaction timer_irqaction = { 580static struct irqaction timer_irqaction = {
582 .handler = timer_interrupt, 581 .handler = timer_interrupt,
583 .flags = SA_INTERRUPT, 582 .flags = IRQF_DISABLED,
584 .name = "timer", 583 .name = "timer",
585}; 584};
586 585
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index ad16eceb24dd..8b95eca9ac74 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -11,7 +11,6 @@
11 * Copyright (C) 2000, 01 MIPS Technologies, Inc. 11 * Copyright (C) 2000, 01 MIPS Technologies, Inc.
12 * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki 12 * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki
13 */ 13 */
14#include <linux/config.h>
15#include <linux/init.h> 14#include <linux/init.h>
16#include <linux/mm.h> 15#include <linux/mm.h>
17#include <linux/module.h> 16#include <linux/module.h>
@@ -1050,7 +1049,7 @@ void *set_except_vector(int n, void *addr)
1050 return (void *)old_handler; 1049 return (void *)old_handler;
1051} 1050}
1052 1051
1053#ifdef CONFIG_CPU_MIPSR2 1052#ifdef CONFIG_CPU_MIPSR2_SRS
1054/* 1053/*
1055 * MIPSR2 shadow register set allocation 1054 * MIPSR2 shadow register set allocation
1056 * FIXME: SMP... 1055 * FIXME: SMP...
@@ -1069,11 +1068,9 @@ static struct shadow_registers {
1069 1068
1070static void mips_srs_init(void) 1069static void mips_srs_init(void)
1071{ 1070{
1072#ifdef CONFIG_CPU_MIPSR2_SRS
1073 shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1; 1071 shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
1074 printk(KERN_INFO "%d MIPSR2 register sets available\n", 1072 printk(KERN_INFO "%d MIPSR2 register sets available\n",
1075 shadow_registers.sr_supported); 1073 shadow_registers.sr_supported);
1076#endif
1077 shadow_registers.sr_allocated = 1; /* Set 0 used by kernel */ 1074 shadow_registers.sr_allocated = 1; /* Set 0 used by kernel */
1078} 1075}
1079 1076
@@ -1198,7 +1195,14 @@ void *set_vi_handler(int n, void *addr)
1198{ 1195{
1199 return set_vi_srs_handler(n, addr, 0); 1196 return set_vi_srs_handler(n, addr, 0);
1200} 1197}
1201#endif 1198
1199#else
1200
1201static inline void mips_srs_init(void)
1202{
1203}
1204
1205#endif /* CONFIG_CPU_MIPSR2_SRS */
1202 1206
1203/* 1207/*
1204 * This is used by native signal handling 1208 * This is used by native signal handling
@@ -1388,9 +1392,7 @@ void __init trap_init(void)
1388 else 1392 else
1389 ebase = CAC_BASE; 1393 ebase = CAC_BASE;
1390 1394
1391#ifdef CONFIG_CPU_MIPSR2
1392 mips_srs_init(); 1395 mips_srs_init();
1393#endif
1394 1396
1395 per_cpu_trap_init(); 1397 per_cpu_trap_init();
1396 1398
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 5b5a3736cbbc..7e7d54823486 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -72,7 +72,6 @@
72 * A store crossing a page boundary might be executed only partially. 72 * A store crossing a page boundary might be executed only partially.
73 * Undo the partial store in this case. 73 * Undo the partial store in this case.
74 */ 74 */
75#include <linux/config.h>
76#include <linux/mm.h> 75#include <linux/mm.h>
77#include <linux/module.h> 76#include <linux/module.h>
78#include <linux/signal.h> 77#include <linux/signal.h>
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index b84d1f9ce28e..0bb9cd889456 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -1,4 +1,3 @@
1#include <linux/config.h>
2#include <asm/asm-offsets.h> 1#include <asm/asm-offsets.h>
3#include <asm-generic/vmlinux.lds.h> 2#include <asm-generic/vmlinux.lds.h>
4 3
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index 2d3472b21ebb..9316a024a818 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -156,6 +156,6 @@ void __init arch_init_irq(void)
156 irq_desc[i].status = IRQ_DISABLED; 156 irq_desc[i].status = IRQ_DISABLED;
157 irq_desc[i].action = 0; 157 irq_desc[i].action = 0;
158 irq_desc[i].depth = 1; 158 irq_desc[i].depth = 1;
159 irq_desc[i].handler = &lasat_irq_type; 159 irq_desc[i].chip = &lasat_irq_type;
160 } 160 }
161} 161}
diff --git a/arch/mips/lasat/lasat_board.c b/arch/mips/lasat/lasat_board.c
index fc9b0e2a6be1..d425120b0282 100644
--- a/arch/mips/lasat/lasat_board.c
+++ b/arch/mips/lasat/lasat_board.c
@@ -17,7 +17,6 @@
17 * 17 *
18 * Routines specific to the LASAT boards 18 * Routines specific to the LASAT boards
19 */ 19 */
20#include <linux/config.h>
21#include <linux/types.h> 20#include <linux/types.h>
22#include <linux/crc32.h> 21#include <linux/crc32.h>
23#include <asm/lasat/lasat.h> 22#include <asm/lasat/lasat.h>
diff --git a/arch/mips/lasat/reset.c b/arch/mips/lasat/reset.c
index 181bf68175fc..9e22acf03083 100644
--- a/arch/mips/lasat/reset.c
+++ b/arch/mips/lasat/reset.c
@@ -17,7 +17,6 @@
17 * 17 *
18 * Reset the LASAT board. 18 * Reset the LASAT board.
19 */ 19 */
20#include <linux/config.h>
21#include <linux/kernel.h> 20#include <linux/kernel.h>
22#include <linux/pm.h> 21#include <linux/pm.h>
23 22
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
index 3f64277429e4..2187e63c6d88 100644
--- a/arch/mips/lasat/setup.c
+++ b/arch/mips/lasat/setup.c
@@ -22,7 +22,6 @@
22 * 22 *
23 * Lasat specific setup. 23 * Lasat specific setup.
24 */ 24 */
25#include <linux/config.h>
26#include <linux/init.h> 25#include <linux/init.h>
27#include <linux/sched.h> 26#include <linux/sched.h>
28#include <linux/pci.h> 27#include <linux/pci.h>
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c
index e3d5aaa90f0d..6dd7ae1b7c25 100644
--- a/arch/mips/lasat/sysctl.c
+++ b/arch/mips/lasat/sysctl.c
@@ -20,7 +20,6 @@
20#include <linux/types.h> 20#include <linux/types.h>
21#include <asm/lasat/lasat.h> 21#include <asm/lasat/lasat.h>
22 22
23#include <linux/config.h>
24#include <linux/module.h> 23#include <linux/module.h>
25#include <linux/sysctl.h> 24#include <linux/sysctl.h>
26#include <linux/stddef.h> 25#include <linux/stddef.h>
diff --git a/arch/mips/lib-32/dump_tlb.c b/arch/mips/lib-32/dump_tlb.c
index c49a925d0169..6a68deb51aae 100644
--- a/arch/mips/lib-32/dump_tlb.c
+++ b/arch/mips/lib-32/dump_tlb.c
@@ -4,7 +4,6 @@
4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle. 4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5 * Copyright (C) 1999 by Silicon Graphics, Inc. 5 * Copyright (C) 1999 by Silicon Graphics, Inc.
6 */ 6 */
7#include <linux/config.h>
8#include <linux/kernel.h> 7#include <linux/kernel.h>
9#include <linux/mm.h> 8#include <linux/mm.h>
10#include <linux/sched.h> 9#include <linux/sched.h>
diff --git a/arch/mips/lib-64/dump_tlb.c b/arch/mips/lib-64/dump_tlb.c
index 11a5f015f040..be8261be679b 100644
--- a/arch/mips/lib-64/dump_tlb.c
+++ b/arch/mips/lib-64/dump_tlb.c
@@ -4,7 +4,6 @@
4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle. 4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5 * Copyright (C) 1999 by Silicon Graphics, Inc. 5 * Copyright (C) 1999 by Silicon Graphics, Inc.
6 */ 6 */
7#include <linux/config.h>
8#include <linux/kernel.h> 7#include <linux/kernel.h>
9#include <linux/mm.h> 8#include <linux/mm.h>
10#include <linux/sched.h> 9#include <linux/sched.h>
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index 7f9aafa4d80e..a526c62cb76a 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -12,7 +12,6 @@
12 * 12 *
13 * Mnemonic names for arguments to memcpy/__copy_user 13 * Mnemonic names for arguments to memcpy/__copy_user
14 */ 14 */
15#include <linux/config.h>
16 15
17/* 16/*
18 * Hack to resolve longstanding prefetch issue 17 * Hack to resolve longstanding prefetch issue
diff --git a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c
index 56ca0c6a7178..5b3390f64917 100644
--- a/arch/mips/math-emu/kernel_linkage.c
+++ b/arch/mips/math-emu/kernel_linkage.c
@@ -19,7 +19,6 @@
19 * manipulation primitives for the Algorithmics MIPS 19 * manipulation primitives for the Algorithmics MIPS
20 * FPU Emulator 20 * FPU Emulator
21 */ 21 */
22#include <linux/config.h>
23#include <linux/sched.h> 22#include <linux/sched.h>
24#include <asm/processor.h> 23#include <asm/processor.h>
25#include <asm/signal.h> 24#include <asm/signal.h>
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index db53950b7cfb..9dd6b8925581 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -215,7 +215,7 @@ void __init arch_init_irq(void)
215 irq_desc[i].status = IRQ_DISABLED; 215 irq_desc[i].status = IRQ_DISABLED;
216 irq_desc[i].action = 0; 216 irq_desc[i].action = 0;
217 irq_desc[i].depth = 1; 217 irq_desc[i].depth = 1;
218 irq_desc[i].handler = &atlas_irq_type; 218 irq_desc[i].chip = &atlas_irq_type;
219 spin_lock_init(&irq_desc[i].lock); 219 spin_lock_init(&irq_desc[i].lock);
220 } 220 }
221} 221}
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c
index 8cc9effcb832..3a7c3d28aa0d 100644
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ b/arch/mips/mips-boards/atlas/atlas_setup.c
@@ -15,7 +15,6 @@
15 * with this program; if not, write to the Free Software Foundation, Inc., 15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 */ 17 */
18#include <linux/config.h>
19#include <linux/init.h> 18#include <linux/init.h>
20#include <linux/interrupt.h> 19#include <linux/interrupt.h>
21#include <linux/sched.h> 20#include <linux/sched.h>
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
index df4e94735604..58a0fe883591 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mips-boards/generic/init.c
@@ -19,7 +19,6 @@
19 * 19 *
20 * PROM library initialisation code. 20 * PROM library initialisation code.
21 */ 21 */
22#include <linux/config.h>
23#include <linux/init.h> 22#include <linux/init.h>
24#include <linux/string.h> 23#include <linux/string.h>
25#include <linux/kernel.h> 24#include <linux/kernel.h>
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index fd492562584a..c89fcf9e9c22 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -18,7 +18,6 @@
18 * PROM library functions for acquiring/using memory descriptors given to 18 * PROM library functions for acquiring/using memory descriptors given to
19 * us from the YAMON. 19 * us from the YAMON.
20 */ 20 */
21#include <linux/config.h>
22#include <linux/init.h> 21#include <linux/init.h>
23#include <linux/mm.h> 22#include <linux/mm.h>
24#include <linux/bootmem.h> 23#include <linux/bootmem.h>
diff --git a/arch/mips/mips-boards/generic/printf.c b/arch/mips/mips-boards/generic/printf.c
index 2c1ab1f19fdc..1a711bd79b51 100644
--- a/arch/mips/mips-boards/generic/printf.c
+++ b/arch/mips/mips-boards/generic/printf.c
@@ -17,7 +17,6 @@
17 * 17 *
18 * Putting things on the screen/serial line using YAMONs facilities. 18 * Putting things on the screen/serial line using YAMONs facilities.
19 */ 19 */
20#include <linux/config.h>
21#include <linux/init.h> 20#include <linux/init.h>
22#include <linux/kernel.h> 21#include <linux/kernel.h>
23#include <linux/serial_reg.h> 22#include <linux/serial_reg.h>
diff --git a/arch/mips/mips-boards/generic/reset.c b/arch/mips/mips-boards/generic/reset.c
index 7213c395fb6b..0996ba368b2a 100644
--- a/arch/mips/mips-boards/generic/reset.c
+++ b/arch/mips/mips-boards/generic/reset.c
@@ -22,7 +22,6 @@
22 * Reset the MIPS boards. 22 * Reset the MIPS boards.
23 * 23 *
24 */ 24 */
25#include <linux/config.h>
26#include <linux/pm.h> 25#include <linux/pm.h>
27 26
28#include <asm/io.h> 27#include <asm/io.h>
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index a9f6124b3a22..5e207760826b 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -19,7 +19,6 @@
19 */ 19 */
20 20
21#include <linux/types.h> 21#include <linux/types.h>
22#include <linux/config.h>
23#include <linux/init.h> 22#include <linux/init.h>
24#include <linux/kernel_stat.h> 23#include <linux/kernel_stat.h>
25#include <linux/sched.h> 24#include <linux/sched.h>
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index 0766e434b6bd..7a54195c78fb 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -15,12 +15,11 @@
15 * with this program; if not, write to the Free Software Foundation, Inc., 15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 */ 17 */
18#include <linux/config.h>
19#include <linux/init.h> 18#include <linux/init.h>
20#include <linux/sched.h> 19#include <linux/sched.h>
21#include <linux/ioport.h> 20#include <linux/ioport.h>
22#include <linux/pci.h> 21#include <linux/pci.h>
23#include <linux/tty.h> 22#include <linux/screen_info.h>
24 23
25#ifdef CONFIG_MTD 24#ifdef CONFIG_MTD
26#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
index 6430f11f3a95..a856bd664879 100644
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ b/arch/mips/mips-boards/sead/sead_setup.c
@@ -17,7 +17,6 @@
17 * 17 *
18 * SEAD specific setup. 18 * SEAD specific setup.
19 */ 19 */
20#include <linux/config.h>
21#include <linux/init.h> 20#include <linux/init.h>
22#include <linux/sched.h> 21#include <linux/sched.h>
23#include <linux/ioport.h> 22#include <linux/ioport.h>
diff --git a/arch/mips/mips-boards/sim/sim_IRQ.c b/arch/mips/mips-boards/sim/sim_IRQ.c
index 5b84c7fe1022..ec549f3e2011 100644
--- a/arch/mips/mips-boards/sim/sim_IRQ.c
+++ b/arch/mips/mips-boards/sim/sim_IRQ.c
@@ -17,7 +17,6 @@
17 * 17 *
18 * Interrupt exception dispatch code. 18 * Interrupt exception dispatch code.
19 */ 19 */
20#include <linux/config.h>
21 20
22#include <asm/asm.h> 21#include <asm/asm.h>
23#include <asm/mipsregs.h> 22#include <asm/mipsregs.h>
diff --git a/arch/mips/mips-boards/sim/sim_irq.S b/arch/mips/mips-boards/sim/sim_irq.S
index d16cf3822076..b7444e74a6a1 100644
--- a/arch/mips/mips-boards/sim/sim_irq.S
+++ b/arch/mips/mips-boards/sim/sim_irq.S
@@ -17,7 +17,6 @@
17 * Interrupt exception dispatch code. 17 * Interrupt exception dispatch code.
18 * 18 *
19 */ 19 */
20#include <linux/config.h>
21 20
22#include <asm/asm.h> 21#include <asm/asm.h>
23#include <asm/mipsregs.h> 22#include <asm/mipsregs.h>
diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c
index 15a5dac4ae19..3d4a785b565a 100644
--- a/arch/mips/mips-boards/sim/sim_setup.c
+++ b/arch/mips/mips-boards/sim/sim_setup.c
@@ -16,7 +16,6 @@
16 * 16 *
17 */ 17 */
18 18
19#include <linux/config.h>
20#include <linux/init.h> 19#include <linux/init.h>
21#include <linux/string.h> 20#include <linux/string.h>
22#include <linux/kernel.h> 21#include <linux/kernel.h>
diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c
index 004070956cca..cb47863ecf10 100644
--- a/arch/mips/mips-boards/sim/sim_smp.c
+++ b/arch/mips/mips-boards/sim/sim_smp.c
@@ -18,7 +18,6 @@
18/* 18/*
19 * Simulator Platform-specific hooks for SMP operation 19 * Simulator Platform-specific hooks for SMP operation
20 */ 20 */
21#include <linux/config.h>
22#include <linux/kernel.h> 21#include <linux/kernel.h>
23#include <linux/sched.h> 22#include <linux/sched.h>
24#include <linux/cpumask.h> 23#include <linux/cpumask.h>
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c
index 18b968c696d1..e7f6003357f7 100644
--- a/arch/mips/mips-boards/sim/sim_time.c
+++ b/arch/mips/mips-boards/sim/sim_time.c
@@ -1,5 +1,4 @@
1#include <linux/types.h> 1#include <linux/types.h>
2#include <linux/config.h>
3#include <linux/init.h> 2#include <linux/init.h>
4#include <linux/kernel_stat.h> 3#include <linux/kernel_stat.h>
5#include <linux/sched.h> 4#include <linux/sched.h>
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index 4a6220116c96..19e41fd186c4 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
30obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o 30obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o
31obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o 31obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o
32obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o 32obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o
33obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o
33 34
34# 35#
35# Choose one DMA coherency model 36# Choose one DMA coherency model
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 4a43924cd4fc..857b726f4d41 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -7,7 +7,6 @@
7 * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Ralf Baechle (ralf@gnu.org) 7 * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Ralf Baechle (ralf@gnu.org)
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 */ 9 */
10#include <linux/config.h>
11#include <linux/init.h> 10#include <linux/init.h>
12#include <linux/kernel.h> 11#include <linux/kernel.h>
13#include <linux/sched.h> 12#include <linux/sched.h>
@@ -60,13 +59,13 @@ static unsigned long scache_size __read_mostly;
60/* 59/*
61 * Dummy cache handling routines for machines without boardcaches 60 * Dummy cache handling routines for machines without boardcaches
62 */ 61 */
63static void no_sc_noop(void) {} 62static void cache_noop(void) {}
64 63
65static struct bcache_ops no_sc_ops = { 64static struct bcache_ops no_sc_ops = {
66 .bc_enable = (void *)no_sc_noop, 65 .bc_enable = (void *)cache_noop,
67 .bc_disable = (void *)no_sc_noop, 66 .bc_disable = (void *)cache_noop,
68 .bc_wback_inv = (void *)no_sc_noop, 67 .bc_wback_inv = (void *)cache_noop,
69 .bc_inv = (void *)no_sc_noop 68 .bc_inv = (void *)cache_noop
70}; 69};
71 70
72struct bcache_ops *bcops = &no_sc_ops; 71struct bcache_ops *bcops = &no_sc_ops;
@@ -94,7 +93,9 @@ static inline void r4k_blast_dcache_page_setup(void)
94{ 93{
95 unsigned long dc_lsize = cpu_dcache_line_size(); 94 unsigned long dc_lsize = cpu_dcache_line_size();
96 95
97 if (dc_lsize == 16) 96 if (dc_lsize == 0)
97 r4k_blast_dcache_page = (void *)cache_noop;
98 else if (dc_lsize == 16)
98 r4k_blast_dcache_page = blast_dcache16_page; 99 r4k_blast_dcache_page = blast_dcache16_page;
99 else if (dc_lsize == 32) 100 else if (dc_lsize == 32)
100 r4k_blast_dcache_page = r4k_blast_dcache_page_dc32; 101 r4k_blast_dcache_page = r4k_blast_dcache_page_dc32;
@@ -106,7 +107,9 @@ static inline void r4k_blast_dcache_page_indexed_setup(void)
106{ 107{
107 unsigned long dc_lsize = cpu_dcache_line_size(); 108 unsigned long dc_lsize = cpu_dcache_line_size();
108 109
109 if (dc_lsize == 16) 110 if (dc_lsize == 0)
111 r4k_blast_dcache_page_indexed = (void *)cache_noop;
112 else if (dc_lsize == 16)
110 r4k_blast_dcache_page_indexed = blast_dcache16_page_indexed; 113 r4k_blast_dcache_page_indexed = blast_dcache16_page_indexed;
111 else if (dc_lsize == 32) 114 else if (dc_lsize == 32)
112 r4k_blast_dcache_page_indexed = blast_dcache32_page_indexed; 115 r4k_blast_dcache_page_indexed = blast_dcache32_page_indexed;
@@ -118,7 +121,9 @@ static inline void r4k_blast_dcache_setup(void)
118{ 121{
119 unsigned long dc_lsize = cpu_dcache_line_size(); 122 unsigned long dc_lsize = cpu_dcache_line_size();
120 123
121 if (dc_lsize == 16) 124 if (dc_lsize == 0)
125 r4k_blast_dcache = (void *)cache_noop;
126 else if (dc_lsize == 16)
122 r4k_blast_dcache = blast_dcache16; 127 r4k_blast_dcache = blast_dcache16;
123 else if (dc_lsize == 32) 128 else if (dc_lsize == 32)
124 r4k_blast_dcache = blast_dcache32; 129 r4k_blast_dcache = blast_dcache32;
@@ -201,7 +206,9 @@ static inline void r4k_blast_icache_page_setup(void)
201{ 206{
202 unsigned long ic_lsize = cpu_icache_line_size(); 207 unsigned long ic_lsize = cpu_icache_line_size();
203 208
204 if (ic_lsize == 16) 209 if (ic_lsize == 0)
210 r4k_blast_icache_page = (void *)cache_noop;
211 else if (ic_lsize == 16)
205 r4k_blast_icache_page = blast_icache16_page; 212 r4k_blast_icache_page = blast_icache16_page;
206 else if (ic_lsize == 32) 213 else if (ic_lsize == 32)
207 r4k_blast_icache_page = blast_icache32_page; 214 r4k_blast_icache_page = blast_icache32_page;
@@ -216,7 +223,9 @@ static inline void r4k_blast_icache_page_indexed_setup(void)
216{ 223{
217 unsigned long ic_lsize = cpu_icache_line_size(); 224 unsigned long ic_lsize = cpu_icache_line_size();
218 225
219 if (ic_lsize == 16) 226 if (ic_lsize == 0)
227 r4k_blast_icache_page_indexed = (void *)cache_noop;
228 else if (ic_lsize == 16)
220 r4k_blast_icache_page_indexed = blast_icache16_page_indexed; 229 r4k_blast_icache_page_indexed = blast_icache16_page_indexed;
221 else if (ic_lsize == 32) { 230 else if (ic_lsize == 32) {
222 if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) 231 if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x())
@@ -238,7 +247,9 @@ static inline void r4k_blast_icache_setup(void)
238{ 247{
239 unsigned long ic_lsize = cpu_icache_line_size(); 248 unsigned long ic_lsize = cpu_icache_line_size();
240 249
241 if (ic_lsize == 16) 250 if (ic_lsize == 0)
251 r4k_blast_icache = (void *)cache_noop;
252 else if (ic_lsize == 16)
242 r4k_blast_icache = blast_icache16; 253 r4k_blast_icache = blast_icache16;
243 else if (ic_lsize == 32) { 254 else if (ic_lsize == 32) {
244 if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) 255 if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x())
@@ -258,7 +269,7 @@ static inline void r4k_blast_scache_page_setup(void)
258 unsigned long sc_lsize = cpu_scache_line_size(); 269 unsigned long sc_lsize = cpu_scache_line_size();
259 270
260 if (scache_size == 0) 271 if (scache_size == 0)
261 r4k_blast_scache_page = (void *)no_sc_noop; 272 r4k_blast_scache_page = (void *)cache_noop;
262 else if (sc_lsize == 16) 273 else if (sc_lsize == 16)
263 r4k_blast_scache_page = blast_scache16_page; 274 r4k_blast_scache_page = blast_scache16_page;
264 else if (sc_lsize == 32) 275 else if (sc_lsize == 32)
@@ -276,7 +287,7 @@ static inline void r4k_blast_scache_page_indexed_setup(void)
276 unsigned long sc_lsize = cpu_scache_line_size(); 287 unsigned long sc_lsize = cpu_scache_line_size();
277 288
278 if (scache_size == 0) 289 if (scache_size == 0)
279 r4k_blast_scache_page_indexed = (void *)no_sc_noop; 290 r4k_blast_scache_page_indexed = (void *)cache_noop;
280 else if (sc_lsize == 16) 291 else if (sc_lsize == 16)
281 r4k_blast_scache_page_indexed = blast_scache16_page_indexed; 292 r4k_blast_scache_page_indexed = blast_scache16_page_indexed;
282 else if (sc_lsize == 32) 293 else if (sc_lsize == 32)
@@ -294,7 +305,7 @@ static inline void r4k_blast_scache_setup(void)
294 unsigned long sc_lsize = cpu_scache_line_size(); 305 unsigned long sc_lsize = cpu_scache_line_size();
295 306
296 if (scache_size == 0) 307 if (scache_size == 0)
297 r4k_blast_scache = (void *)no_sc_noop; 308 r4k_blast_scache = (void *)cache_noop;
298 else if (sc_lsize == 16) 309 else if (sc_lsize == 16)
299 r4k_blast_scache = blast_scache16; 310 r4k_blast_scache = blast_scache16;
300 else if (sc_lsize == 32) 311 else if (sc_lsize == 32)
@@ -508,7 +519,7 @@ static inline void local_r4k_flush_icache_range(void *args)
508 unsigned long end = fir_args->end; 519 unsigned long end = fir_args->end;
509 520
510 if (!cpu_has_ic_fills_f_dc) { 521 if (!cpu_has_ic_fills_f_dc) {
511 if (end - start > dcache_size) { 522 if (end - start >= dcache_size) {
512 r4k_blast_dcache(); 523 r4k_blast_dcache();
513 } else { 524 } else {
514 R4600_HIT_CACHEOP_WAR_IMPL; 525 R4600_HIT_CACHEOP_WAR_IMPL;
@@ -683,10 +694,12 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
683 unsigned long addr = (unsigned long) arg; 694 unsigned long addr = (unsigned long) arg;
684 695
685 R4600_HIT_CACHEOP_WAR_IMPL; 696 R4600_HIT_CACHEOP_WAR_IMPL;
686 protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); 697 if (dc_lsize)
698 protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
687 if (!cpu_icache_snoops_remote_store && scache_size) 699 if (!cpu_icache_snoops_remote_store && scache_size)
688 protected_writeback_scache_line(addr & ~(sc_lsize - 1)); 700 protected_writeback_scache_line(addr & ~(sc_lsize - 1));
689 protected_flush_icache_line(addr & ~(ic_lsize - 1)); 701 if (ic_lsize)
702 protected_flush_icache_line(addr & ~(ic_lsize - 1));
690 if (MIPS4K_ICACHE_REFILL_WAR) { 703 if (MIPS4K_ICACHE_REFILL_WAR) {
691 __asm__ __volatile__ ( 704 __asm__ __volatile__ (
692 ".set push\n\t" 705 ".set push\n\t"
@@ -973,8 +986,10 @@ static void __init probe_pcache(void)
973 c->icache.waysize = icache_size / c->icache.ways; 986 c->icache.waysize = icache_size / c->icache.ways;
974 c->dcache.waysize = dcache_size / c->dcache.ways; 987 c->dcache.waysize = dcache_size / c->dcache.ways;
975 988
976 c->icache.sets = icache_size / (c->icache.linesz * c->icache.ways); 989 c->icache.sets = c->icache.linesz ?
977 c->dcache.sets = dcache_size / (c->dcache.linesz * c->dcache.ways); 990 icache_size / (c->icache.linesz * c->icache.ways) : 0;
991 c->dcache.sets = c->dcache.linesz ?
992 dcache_size / (c->dcache.linesz * c->dcache.ways) : 0;
978 993
979 /* 994 /*
980 * R10000 and R12000 P-caches are odd in a positive way. They're 32kB 995 * R10000 and R12000 P-caches are odd in a positive way. They're 32kB
@@ -993,10 +1008,16 @@ static void __init probe_pcache(void)
993 break; 1008 break;
994 case CPU_24K: 1009 case CPU_24K:
995 case CPU_34K: 1010 case CPU_34K:
996 if (!(read_c0_config7() & (1 << 16))) 1011 case CPU_74K:
1012 if ((read_c0_config7() & (1 << 16))) {
1013 /* effectively physically indexed dcache,
1014 thus no virtual aliases. */
1015 c->dcache.flags |= MIPS_CACHE_PINDEX;
1016 break;
1017 }
997 default: 1018 default:
998 if (c->dcache.waysize > PAGE_SIZE) 1019 if (c->dcache.waysize > PAGE_SIZE)
999 c->dcache.flags |= MIPS_CACHE_ALIASES; 1020 c->dcache.flags |= MIPS_CACHE_ALIASES;
1000 } 1021 }
1001 1022
1002 switch (c->cputype) { 1023 switch (c->cputype) {
@@ -1092,6 +1113,7 @@ static int __init probe_scache(void)
1092 1113
1093extern int r5k_sc_init(void); 1114extern int r5k_sc_init(void);
1094extern int rm7k_sc_init(void); 1115extern int rm7k_sc_init(void);
1116extern int mips_sc_init(void);
1095 1117
1096static void __init setup_scache(void) 1118static void __init setup_scache(void)
1097{ 1119{
@@ -1139,17 +1161,29 @@ static void __init setup_scache(void)
1139 return; 1161 return;
1140 1162
1141 default: 1163 default:
1164 if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
1165 c->isa_level == MIPS_CPU_ISA_M32R2 ||
1166 c->isa_level == MIPS_CPU_ISA_M64R1 ||
1167 c->isa_level == MIPS_CPU_ISA_M64R2) {
1168#ifdef CONFIG_MIPS_CPU_SCACHE
1169 if (mips_sc_init ()) {
1170 scache_size = c->scache.ways * c->scache.sets * c->scache.linesz;
1171 printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n",
1172 scache_size >> 10,
1173 way_string[c->scache.ways], c->scache.linesz);
1174 }
1175#else
1176 if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
1177 panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
1178#endif
1179 return;
1180 }
1142 sc_present = 0; 1181 sc_present = 0;
1143 } 1182 }
1144 1183
1145 if (!sc_present) 1184 if (!sc_present)
1146 return; 1185 return;
1147 1186
1148 if ((c->isa_level == MIPS_CPU_ISA_M32R1 ||
1149 c->isa_level == MIPS_CPU_ISA_M64R1) &&
1150 !(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
1151 panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
1152
1153 /* compute a couple of other cache variables */ 1187 /* compute a couple of other cache variables */
1154 c->scache.waysize = scache_size / c->scache.ways; 1188 c->scache.waysize = scache_size / c->scache.ways;
1155 1189
@@ -1246,10 +1280,12 @@ void __init r4k_cache_init(void)
1246 * This code supports virtually indexed processors and will be 1280 * This code supports virtually indexed processors and will be
1247 * unnecessarily inefficient on physically indexed processors. 1281 * unnecessarily inefficient on physically indexed processors.
1248 */ 1282 */
1249 shm_align_mask = max_t( unsigned long, 1283 if (c->dcache.linesz)
1250 c->dcache.sets * c->dcache.linesz - 1, 1284 shm_align_mask = max_t( unsigned long,
1251 PAGE_SIZE - 1); 1285 c->dcache.sets * c->dcache.linesz - 1,
1252 1286 PAGE_SIZE - 1);
1287 else
1288 shm_align_mask = PAGE_SIZE-1;
1253 flush_cache_all = r4k_flush_cache_all; 1289 flush_cache_all = r4k_flush_cache_all;
1254 __flush_cache_all = r4k___flush_cache_all; 1290 __flush_cache_all = r4k___flush_cache_all;
1255 flush_cache_mm = r4k_flush_cache_mm; 1291 flush_cache_mm = r4k_flush_cache_mm;
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
index f9b129491b1e..2d71efb82ac5 100644
--- a/arch/mips/mm/c-sb1.c
+++ b/arch/mips/mm/c-sb1.c
@@ -18,7 +18,6 @@
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */ 20 */
21#include <linux/config.h>
22#include <linux/init.h> 21#include <linux/init.h>
23 22
24#include <asm/asm.h> 23#include <asm/asm.h>
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 83a56296be86..ddd3a2de1d73 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -5,7 +5,6 @@
5 * 5 *
6 * Copyright (C) 1994 - 2003 by Ralf Baechle 6 * Copyright (C) 1994 - 2003 by Ralf Baechle
7 */ 7 */
8#include <linux/config.h>
9#include <linux/init.h> 8#include <linux/init.h>
10#include <linux/kernel.h> 9#include <linux/kernel.h>
11#include <linux/module.h> 10#include <linux/module.h>
diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c
index 1cf3c6006ccd..e19fbb9ee47f 100644
--- a/arch/mips/mm/cerr-sb1.c
+++ b/arch/mips/mm/cerr-sb1.c
@@ -15,7 +15,6 @@
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18#include <linux/config.h>
19#include <linux/sched.h> 18#include <linux/sched.h>
20#include <asm/mipsregs.h> 19#include <asm/mipsregs.h>
21#include <asm/sibyte/sb1250.h> 20#include <asm/sibyte/sb1250.h>
diff --git a/arch/mips/mm/dma-coherent.c b/arch/mips/mm/dma-coherent.c
index f6b3c722230c..7fa5fd16e46b 100644
--- a/arch/mips/mm/dma-coherent.c
+++ b/arch/mips/mm/dma-coherent.c
@@ -7,7 +7,6 @@
7 * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org> 7 * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
8 * swiped from i386, and cloned for MIPS by Geert, polished by Ralf. 8 * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
9 */ 9 */
10#include <linux/config.h>
11#include <linux/types.h> 10#include <linux/types.h>
12#include <linux/dma-mapping.h> 11#include <linux/dma-mapping.h>
13#include <linux/mm.h> 12#include <linux/mm.h>
diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c
index cd4ea8474f89..2eeffe5c2a3a 100644
--- a/arch/mips/mm/dma-noncoherent.c
+++ b/arch/mips/mm/dma-noncoherent.c
@@ -7,7 +7,6 @@
7 * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org> 7 * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
8 * swiped from i386, and cloned for MIPS by Geert, polished by Ralf. 8 * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
9 */ 9 */
10#include <linux/config.h>
11#include <linux/types.h> 10#include <linux/types.h>
12#include <linux/mm.h> 11#include <linux/mm.h>
13#include <linux/module.h> 12#include <linux/module.h>
diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index 0c544375b856..99ebf3ccc222 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -1,4 +1,3 @@
1#include <linux/config.h>
2#include <linux/module.h> 1#include <linux/module.h>
3#include <linux/highmem.h> 2#include <linux/highmem.h>
4#include <asm/tlbflush.h> 3#include <asm/tlbflush.h>
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 33f6e1cdfd5b..802bdd32aa2b 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -8,7 +8,6 @@
8 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 8 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 9 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
10 */ 10 */
11#include <linux/config.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/module.h> 12#include <linux/module.h>
14#include <linux/signal.h> 13#include <linux/signal.h>
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
index 148c65b9cd8b..fc3c7878fb45 100644
--- a/arch/mips/mm/pg-sb1.c
+++ b/arch/mips/mm/pg-sb1.c
@@ -22,7 +22,6 @@
22 * along with this program; if not, write to the Free Software 22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 23 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
24 */ 24 */
25#include <linux/config.h>
26#include <linux/module.h> 25#include <linux/module.h>
27#include <linux/sched.h> 26#include <linux/sched.h>
28#include <linux/smp.h> 27#include <linux/smp.h>
diff --git a/arch/mips/mm/pgtable-32.c b/arch/mips/mm/pgtable-32.c
index 4a3c4919e314..4bdaa05f485b 100644
--- a/arch/mips/mm/pgtable-32.c
+++ b/arch/mips/mm/pgtable-32.c
@@ -5,7 +5,6 @@
5 * 5 *
6 * Copyright (C) 2003 by Ralf Baechle 6 * Copyright (C) 2003 by Ralf Baechle
7 */ 7 */
8#include <linux/config.h>
9#include <linux/init.h> 8#include <linux/init.h>
10#include <linux/mm.h> 9#include <linux/mm.h>
11#include <linux/bootmem.h> 10#include <linux/bootmem.h>
diff --git a/arch/mips/mm/pgtable.c b/arch/mips/mm/pgtable.c
index 3fe94202da8c..792c6eb44232 100644
--- a/arch/mips/mm/pgtable.c
+++ b/arch/mips/mm/pgtable.c
@@ -1,4 +1,3 @@
1#include <linux/config.h>
2#include <linux/kernel.h> 1#include <linux/kernel.h>
3#include <linux/mm.h> 2#include <linux/mm.h>
4#include <linux/swap.h> 3#include <linux/swap.h>
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
new file mode 100644
index 000000000000..42b50964c644
--- /dev/null
+++ b/arch/mips/mm/sc-mips.c
@@ -0,0 +1,112 @@
1/*
2 * Copyright (C) 2006 Chris Dearman (chris@mips.com),
3 */
4#include <linux/init.h>
5#include <linux/kernel.h>
6#include <linux/sched.h>
7#include <linux/mm.h>
8
9#include <asm/mipsregs.h>
10#include <asm/bcache.h>
11#include <asm/cacheops.h>
12#include <asm/page.h>
13#include <asm/pgtable.h>
14#include <asm/system.h>
15#include <asm/mmu_context.h>
16#include <asm/r4kcache.h>
17
18/*
19 * MIPS32/MIPS64 L2 cache handling
20 */
21
22/*
23 * Writeback and invalidate the secondary cache before DMA.
24 */
25static void mips_sc_wback_inv(unsigned long addr, unsigned long size)
26{
27 blast_scache_range(addr, addr + size);
28}
29
30/*
31 * Invalidate the secondary cache before DMA.
32 */
33static void mips_sc_inv(unsigned long addr, unsigned long size)
34{
35 blast_inv_scache_range(addr, addr + size);
36}
37
38static void mips_sc_enable(void)
39{
40 /* L2 cache is permanently enabled */
41}
42
43static void mips_sc_disable(void)
44{
45 /* L2 cache is permanently enabled */
46}
47
48static struct bcache_ops mips_sc_ops = {
49 .bc_enable = mips_sc_enable,
50 .bc_disable = mips_sc_disable,
51 .bc_wback_inv = mips_sc_wback_inv,
52 .bc_inv = mips_sc_inv
53};
54
55static inline int __init mips_sc_probe(void)
56{
57 struct cpuinfo_mips *c = &current_cpu_data;
58 unsigned int config1, config2;
59 unsigned int tmp;
60
61 /* Mark as not present until probe completed */
62 c->scache.flags |= MIPS_CACHE_NOT_PRESENT;
63
64 /* Ignore anything but MIPSxx processors */
65 if (c->isa_level != MIPS_CPU_ISA_M32R1 &&
66 c->isa_level != MIPS_CPU_ISA_M32R2 &&
67 c->isa_level != MIPS_CPU_ISA_M64R1 &&
68 c->isa_level != MIPS_CPU_ISA_M64R2)
69 return 0;
70
71 /* Does this MIPS32/MIPS64 CPU have a config2 register? */
72 config1 = read_c0_config1();
73 if (!(config1 & MIPS_CONF_M))
74 return 0;
75
76 config2 = read_c0_config2();
77 tmp = (config2 >> 4) & 0x0f;
78 if (0 < tmp && tmp <= 7)
79 c->scache.linesz = 2 << tmp;
80 else
81 return 0;
82
83 tmp = (config2 >> 8) & 0x0f;
84 if (0 <= tmp && tmp <= 7)
85 c->scache.sets = 64 << tmp;
86 else
87 return 0;
88
89 tmp = (config2 >> 0) & 0x0f;
90 if (0 <= tmp && tmp <= 7)
91 c->scache.ways = tmp + 1;
92 else
93 return 0;
94
95 c->scache.waysize = c->scache.sets * c->scache.linesz;
96 c->scache.waybit = __ffs(c->scache.waysize);
97
98 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
99
100 return 1;
101}
102
103int __init mips_sc_init(void)
104{
105 int found = mips_sc_probe ();
106 if (found) {
107 mips_sc_enable();
108 bcops = &mips_sc_ops;
109 }
110 return found;
111}
112
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 965cb4c4359d..2cde1b772443 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -8,7 +8,6 @@
8 * Carsten Langgaard, carstenl@mips.com 8 * Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved. 9 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
10 */ 10 */
11#include <linux/config.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/sched.h> 12#include <linux/sched.h>
14#include <linux/mm.h> 13#include <linux/mm.h>
diff --git a/arch/mips/mm/tlb-r8k.c b/arch/mips/mm/tlb-r8k.c
index 1bfb09198ce3..266a47d65eed 100644
--- a/arch/mips/mm/tlb-r8k.c
+++ b/arch/mips/mm/tlb-r8k.c
@@ -8,7 +8,6 @@
8 * Carsten Langgaard, carstenl@mips.com 8 * Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved. 9 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
10 */ 10 */
11#include <linux/config.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/sched.h> 12#include <linux/sched.h>
14#include <linux/mm.h> 13#include <linux/mm.h>
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 54507be2ab5b..e1a8139fc8fb 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -21,7 +21,6 @@
21 21
22#include <stdarg.h> 22#include <stdarg.h>
23 23
24#include <linux/config.h>
25#include <linux/mm.h> 24#include <linux/mm.h>
26#include <linux/kernel.h> 25#include <linux/kernel.h>
27#include <linux/types.h> 26#include <linux/types.h>
diff --git a/arch/mips/momentum/jaguar_atx/dbg_io.c b/arch/mips/momentum/jaguar_atx/dbg_io.c
index d7dea0a136aa..b85a6521f72d 100644
--- a/arch/mips/momentum/jaguar_atx/dbg_io.c
+++ b/arch/mips/momentum/jaguar_atx/dbg_io.c
@@ -1,4 +1,3 @@
1#include <linux/config.h>
2 1
3#if defined(CONFIG_REMOTE_DEBUG) 2#if defined(CONFIG_REMOTE_DEBUG)
4 3
diff --git a/arch/mips/momentum/jaguar_atx/irq.c b/arch/mips/momentum/jaguar_atx/irq.c
index ec4032b38f19..f9067469a656 100644
--- a/arch/mips/momentum/jaguar_atx/irq.c
+++ b/arch/mips/momentum/jaguar_atx/irq.c
@@ -71,7 +71,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
71} 71}
72 72
73static struct irqaction cascade_mv64340 = { 73static struct irqaction cascade_mv64340 = {
74 no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL 74 no_action, IRQF_DISABLED, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
75}; 75};
76 76
77void __init arch_init_irq(void) 77void __init arch_init_irq(void)
diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c
index 1cadaa92946a..3d2712929293 100644
--- a/arch/mips/momentum/jaguar_atx/prom.c
+++ b/arch/mips/momentum/jaguar_atx/prom.c
@@ -16,7 +16,6 @@
16 * 16 *
17 * Added changes for SMP - Manish Lachwani (lachwani@pmc-sierra.com) 17 * Added changes for SMP - Manish Lachwani (lachwani@pmc-sierra.com)
18 */ 18 */
19#include <linux/config.h>
20#include <linux/init.h> 19#include <linux/init.h>
21#include <linux/mm.h> 20#include <linux/mm.h>
22#include <linux/sched.h> 21#include <linux/sched.h>
diff --git a/arch/mips/momentum/jaguar_atx/reset.c b/arch/mips/momentum/jaguar_atx/reset.c
index ce9fb2e3d952..c73b0897dc52 100644
--- a/arch/mips/momentum/jaguar_atx/reset.c
+++ b/arch/mips/momentum/jaguar_atx/reset.c
@@ -14,7 +14,6 @@
14 * Louis Hamilton, Red Hat, Inc. 14 * Louis Hamilton, Red Hat, Inc.
15 * hamilton@redhat.com [MIPS64 modifications] 15 * hamilton@redhat.com [MIPS64 modifications]
16 */ 16 */
17#include <linux/config.h>
18#include <linux/sched.h> 17#include <linux/sched.h>
19#include <linux/mm.h> 18#include <linux/mm.h>
20#include <asm/io.h> 19#include <asm/io.h>
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c
index df1485501ce6..b08e6a0456c1 100644
--- a/arch/mips/momentum/jaguar_atx/setup.c
+++ b/arch/mips/momentum/jaguar_atx/setup.c
@@ -39,7 +39,6 @@
39 * with this program; if not, write to the Free Software Foundation, Inc., 39 * with this program; if not, write to the Free Software Foundation, Inc.,
40 * 675 Mass Ave, Cambridge, MA 02139, USA. 40 * 675 Mass Ave, Cambridge, MA 02139, USA.
41 */ 41 */
42#include <linux/config.h>
43#include <linux/bcd.h> 42#include <linux/bcd.h>
44#include <linux/init.h> 43#include <linux/init.h>
45#include <linux/kernel.h> 44#include <linux/kernel.h>
@@ -370,8 +369,8 @@ void __init plat_mem_setup(void)
370 pm_power_off = momenco_jaguar_power_off; 369 pm_power_off = momenco_jaguar_power_off;
371 370
372 /* 371 /*
373 * initrd_start = (ulong)jaguar_initrd_start; 372 * initrd_start = (unsigned long)jaguar_initrd_start;
374 * initrd_end = (ulong)jaguar_initrd_start + (ulong)jaguar_initrd_size; 373 * initrd_end = (unsigned long)jaguar_initrd_start + (ulong)jaguar_initrd_size;
375 * initrd_below_start_ok = 1; 374 * initrd_below_start_ok = 1;
376 */ 375 */
377 376
diff --git a/arch/mips/momentum/ocelot_3/irq.c b/arch/mips/momentum/ocelot_3/irq.c
index 87c63c340ae3..793782a9c195 100644
--- a/arch/mips/momentum/ocelot_3/irq.c
+++ b/arch/mips/momentum/ocelot_3/irq.c
@@ -54,7 +54,7 @@
54#include <asm/system.h> 54#include <asm/system.h>
55 55
56static struct irqaction cascade_mv64340 = { 56static struct irqaction cascade_mv64340 = {
57 no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL 57 no_action, IRQF_DISABLED, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
58}; 58};
59 59
60void __init arch_init_irq(void) 60void __init arch_init_irq(void)
diff --git a/arch/mips/momentum/ocelot_3/prom.c b/arch/mips/momentum/ocelot_3/prom.c
index 9803daa2a792..296d945bc248 100644
--- a/arch/mips/momentum/ocelot_3/prom.c
+++ b/arch/mips/momentum/ocelot_3/prom.c
@@ -21,7 +21,6 @@
21 * Author: Manish Lachwani, mlachwani@mvista.com 21 * Author: Manish Lachwani, mlachwani@mvista.com
22 * 22 *
23 */ 23 */
24#include <linux/config.h>
25#include <linux/init.h> 24#include <linux/init.h>
26#include <linux/bootmem.h> 25#include <linux/bootmem.h>
27#include <linux/mv643xx.h> 26#include <linux/mv643xx.h>
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c
index bd885785e2f9..31d179c4673f 100644
--- a/arch/mips/momentum/ocelot_c/cpci-irq.c
+++ b/arch/mips/momentum/ocelot_c/cpci-irq.c
@@ -147,6 +147,6 @@ void cpci_irq_init(void)
147 irq_desc[i].status = IRQ_DISABLED; 147 irq_desc[i].status = IRQ_DISABLED;
148 irq_desc[i].action = 0; 148 irq_desc[i].action = 0;
149 irq_desc[i].depth = 2; 149 irq_desc[i].depth = 2;
150 irq_desc[i].handler = &cpci_irq_type; 150 irq_desc[i].chip = &cpci_irq_type;
151 } 151 }
152} 152}
diff --git a/arch/mips/momentum/ocelot_c/dbg_io.c b/arch/mips/momentum/ocelot_c/dbg_io.c
index f0a6a38fcf4d..2128684584f5 100644
--- a/arch/mips/momentum/ocelot_c/dbg_io.c
+++ b/arch/mips/momentum/ocelot_c/dbg_io.c
@@ -1,4 +1,3 @@
1#include <linux/config.h>
2 1
3#ifdef CONFIG_KGDB 2#ifdef CONFIG_KGDB
4 3
diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c
index 86f61ce59e53..9d44ae1e156b 100644
--- a/arch/mips/momentum/ocelot_c/irq.c
+++ b/arch/mips/momentum/ocelot_c/irq.c
@@ -52,11 +52,11 @@ extern void uart_irq_init(void);
52extern void cpci_irq_init(void); 52extern void cpci_irq_init(void);
53 53
54static struct irqaction cascade_fpga = { 54static struct irqaction cascade_fpga = {
55 no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via FPGA", NULL, NULL 55 no_action, IRQF_DISABLED, CPU_MASK_NONE, "cascade via FPGA", NULL, NULL
56}; 56};
57 57
58static struct irqaction cascade_mv64340 = { 58static struct irqaction cascade_mv64340 = {
59 no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL 59 no_action, IRQF_DISABLED, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL
60}; 60};
61 61
62extern void ll_uart_irq(struct pt_regs *regs); 62extern void ll_uart_irq(struct pt_regs *regs);
diff --git a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
index 97fb77dad723..7228cd19e5ea 100644
--- a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
+++ b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
@@ -30,7 +30,6 @@
30#ifndef __OCELOT_C_FPGA_H__ 30#ifndef __OCELOT_C_FPGA_H__
31#define __OCELOT_C_FPGA_H__ 31#define __OCELOT_C_FPGA_H__
32 32
33#include <linux/config.h>
34 33
35#ifdef CONFIG_64BIT 34#ifdef CONFIG_64BIT
36#define OCELOT_C_CS0_ADDR (0xfffffffffc000000) 35#define OCELOT_C_CS0_ADDR (0xfffffffffc000000)
diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c
index e92364482c7b..4c50a147f429 100644
--- a/arch/mips/momentum/ocelot_c/prom.c
+++ b/arch/mips/momentum/ocelot_c/prom.c
@@ -14,7 +14,6 @@
14 * Free Software Foundation; either version 2 of the License, or (at your 14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version. 15 * option) any later version.
16 */ 16 */
17#include <linux/config.h>
18#include <linux/init.h> 17#include <linux/init.h>
19#include <linux/mm.h> 18#include <linux/mm.h>
20#include <linux/sched.h> 19#include <linux/sched.h>
diff --git a/arch/mips/momentum/ocelot_c/reset.c b/arch/mips/momentum/ocelot_c/reset.c
index 9dcd154c7767..3fdcb64ff1e6 100644
--- a/arch/mips/momentum/ocelot_c/reset.c
+++ b/arch/mips/momentum/ocelot_c/reset.c
@@ -14,7 +14,6 @@
14 * Louis Hamilton, Red Hat, Inc. 14 * Louis Hamilton, Red Hat, Inc.
15 * hamilton@redhat.com [MIPS64 modifications] 15 * hamilton@redhat.com [MIPS64 modifications]
16 */ 16 */
17#include <linux/config.h>
18#include <linux/sched.h> 17#include <linux/sched.h>
19#include <linux/mm.h> 18#include <linux/mm.h>
20#include <asm/io.h> 19#include <asm/io.h>
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c
index 257e1d1b72dd..6a4519936ee9 100644
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ b/arch/mips/momentum/ocelot_c/setup.c
@@ -40,7 +40,6 @@
40 * 675 Mass Ave, Cambridge, MA 02139, USA. 40 * 675 Mass Ave, Cambridge, MA 02139, USA.
41 * 41 *
42 */ 42 */
43#include <linux/config.h>
44#include <linux/bcd.h> 43#include <linux/bcd.h>
45#include <linux/init.h> 44#include <linux/init.h>
46#include <linux/kernel.h> 45#include <linux/kernel.h>
@@ -242,8 +241,8 @@ void __init plat_mem_setup(void)
242 pm_power_off = momenco_ocelot_power_off; 241 pm_power_off = momenco_ocelot_power_off;
243 242
244 /* 243 /*
245 * initrd_start = (ulong)ocelot_initrd_start; 244 * initrd_start = (unsigned long)ocelot_initrd_start;
246 * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size; 245 * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size;
247 * initrd_below_start_ok = 1; 246 * initrd_below_start_ok = 1;
248 */ 247 */
249 248
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c
index 755bde5146be..852265026fd1 100644
--- a/arch/mips/momentum/ocelot_c/uart-irq.c
+++ b/arch/mips/momentum/ocelot_c/uart-irq.c
@@ -137,10 +137,10 @@ void uart_irq_init(void)
137 irq_desc[80].status = IRQ_DISABLED; 137 irq_desc[80].status = IRQ_DISABLED;
138 irq_desc[80].action = 0; 138 irq_desc[80].action = 0;
139 irq_desc[80].depth = 2; 139 irq_desc[80].depth = 2;
140 irq_desc[80].handler = &uart_irq_type; 140 irq_desc[80].chip = &uart_irq_type;
141 141
142 irq_desc[81].status = IRQ_DISABLED; 142 irq_desc[81].status = IRQ_DISABLED;
143 irq_desc[81].action = 0; 143 irq_desc[81].action = 0;
144 irq_desc[81].depth = 2; 144 irq_desc[81].depth = 2;
145 irq_desc[81].handler = &uart_irq_type; 145 irq_desc[81].chip = &uart_irq_type;
146} 146}
diff --git a/arch/mips/momentum/ocelot_g/dbg_io.c b/arch/mips/momentum/ocelot_g/dbg_io.c
index f0a6a38fcf4d..2128684584f5 100644
--- a/arch/mips/momentum/ocelot_g/dbg_io.c
+++ b/arch/mips/momentum/ocelot_g/dbg_io.c
@@ -1,4 +1,3 @@
1#include <linux/config.h>
2 1
3#ifdef CONFIG_KGDB 2#ifdef CONFIG_KGDB
4 3
diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c
index 8bd9b844fa9e..9fb2493fff02 100644
--- a/arch/mips/momentum/ocelot_g/gt-irq.c
+++ b/arch/mips/momentum/ocelot_g/gt-irq.c
@@ -11,7 +11,6 @@
11 * Free Software Foundation; either version 2 of the License, or (at your 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14#include <linux/config.h>
15#include <linux/module.h> 14#include <linux/module.h>
16#include <linux/interrupt.h> 15#include <linux/interrupt.h>
17#include <linux/kernel.h> 16#include <linux/kernel.h>
@@ -174,7 +173,7 @@ void gt64240_time_init(void)
174 * the values to the correct interrupt line. 173 * the values to the correct interrupt line.
175 */ 174 */
176 timer.handler = &gt64240_p0int_irq; 175 timer.handler = &gt64240_p0int_irq;
177 timer.flags = SA_SHIRQ | SA_INTERRUPT; 176 timer.flags = IRQF_SHARED | IRQF_DISABLED;
178 timer.name = "timer"; 177 timer.name = "timer";
179 timer.dev_id = NULL; 178 timer.dev_id = NULL;
180 timer.next = NULL; 179 timer.next = NULL;
diff --git a/arch/mips/momentum/ocelot_g/prom.c b/arch/mips/momentum/ocelot_g/prom.c
index 6b4f577c2757..6509a9c9863c 100644
--- a/arch/mips/momentum/ocelot_g/prom.c
+++ b/arch/mips/momentum/ocelot_g/prom.c
@@ -11,7 +11,6 @@
11 * Free Software Foundation; either version 2 of the License, or (at your 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14#include <linux/config.h>
15#include <linux/init.h> 14#include <linux/init.h>
16#include <linux/mm.h> 15#include <linux/mm.h>
17#include <linux/sched.h> 16#include <linux/sched.h>
diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c
index 72143ab1e900..c580b1de33bc 100644
--- a/arch/mips/momentum/ocelot_g/setup.c
+++ b/arch/mips/momentum/ocelot_g/setup.c
@@ -37,7 +37,6 @@
37 * 675 Mass Ave, Cambridge, MA 02139, USA. 37 * 675 Mass Ave, Cambridge, MA 02139, USA.
38 * 38 *
39 */ 39 */
40#include <linux/config.h>
41#include <linux/init.h> 40#include <linux/init.h>
42#include <linux/kernel.h> 41#include <linux/kernel.h>
43#include <linux/types.h> 42#include <linux/types.h>
@@ -174,8 +173,8 @@ void __init plat_mem_setup(void)
174 pm_power_off = momenco_ocelot_power_off; 173 pm_power_off = momenco_ocelot_power_off;
175 174
176 /* 175 /*
177 * initrd_start = (ulong)ocelot_initrd_start; 176 * initrd_start = (unsigned long)ocelot_initrd_start;
178 * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size; 177 * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size;
179 * initrd_below_start_ok = 1; 178 * initrd_below_start_ok = 1;
180 */ 179 */
181 180
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index f26a00e13204..a09c5f901233 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -12,16 +12,70 @@
12 12
13#include "op_impl.h" 13#include "op_impl.h"
14 14
15#define M_PERFCTL_EXL (1UL << 0) 15#define M_PERFCTL_EXL (1UL << 0)
16#define M_PERFCTL_KERNEL (1UL << 1) 16#define M_PERFCTL_KERNEL (1UL << 1)
17#define M_PERFCTL_SUPERVISOR (1UL << 2) 17#define M_PERFCTL_SUPERVISOR (1UL << 2)
18#define M_PERFCTL_USER (1UL << 3) 18#define M_PERFCTL_USER (1UL << 3)
19#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4) 19#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4)
20#define M_PERFCTL_EVENT(event) ((event) << 5) 20#define M_PERFCTL_EVENT(event) ((event) << 5)
21#define M_PERFCTL_WIDE (1UL << 30) 21#define M_PERFCTL_VPEID(vpe) ((vpe) << 16)
22#define M_PERFCTL_MORE (1UL << 31) 22#define M_PERFCTL_MT_EN(filter) ((filter) << 20)
23#define M_TC_EN_ALL M_PERFCTL_MT_EN(0)
24#define M_TC_EN_VPE M_PERFCTL_MT_EN(1)
25#define M_TC_EN_TC M_PERFCTL_MT_EN(2)
26#define M_PERFCTL_TCID(tcid) ((tcid) << 22)
27#define M_PERFCTL_WIDE (1UL << 30)
28#define M_PERFCTL_MORE (1UL << 31)
29
30#define M_COUNTER_OVERFLOW (1UL << 31)
31
32#ifdef CONFIG_MIPS_MT_SMP
33#define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id()))
34#else
35#define WHAT 0
36#endif
23 37
24#define M_COUNTER_OVERFLOW (1UL << 31) 38#define __define_perf_accessors(r, n, np) \
39 \
40static inline unsigned int r_c0_ ## r ## n(void) \
41{ \
42 unsigned int cpu = smp_processor_id(); \
43 \
44 switch (cpu) { \
45 case 0: \
46 return read_c0_ ## r ## n(); \
47 case 1: \
48 return read_c0_ ## r ## np(); \
49 default: \
50 BUG(); \
51 } \
52} \
53 \
54static inline void w_c0_ ## r ## n(unsigned int value) \
55{ \
56 unsigned int cpu = smp_processor_id(); \
57 \
58 switch (cpu) { \
59 case 0: \
60 write_c0_ ## r ## n(value); \
61 return; \
62 case 1: \
63 write_c0_ ## r ## np(value); \
64 return; \
65 default: \
66 BUG(); \
67 } \
68} \
69
70__define_perf_accessors(perfcntr, 0, 2)
71__define_perf_accessors(perfcntr, 1, 3)
72__define_perf_accessors(perfcntr, 2, 2)
73__define_perf_accessors(perfcntr, 3, 2)
74
75__define_perf_accessors(perfctrl, 0, 2)
76__define_perf_accessors(perfctrl, 1, 3)
77__define_perf_accessors(perfctrl, 2, 2)
78__define_perf_accessors(perfctrl, 3, 2)
25 79
26struct op_mips_model op_model_mipsxx_ops; 80struct op_mips_model op_model_mipsxx_ops;
27 81
@@ -66,17 +120,17 @@ static void mipsxx_cpu_setup (void *args)
66 120
67 switch (counters) { 121 switch (counters) {
68 case 4: 122 case 4:
69 write_c0_perfctrl3(0); 123 w_c0_perfctrl3(0);
70 write_c0_perfcntr3(reg.counter[3]); 124 w_c0_perfcntr3(reg.counter[3]);
71 case 3: 125 case 3:
72 write_c0_perfctrl2(0); 126 w_c0_perfctrl2(0);
73 write_c0_perfcntr2(reg.counter[2]); 127 w_c0_perfcntr2(reg.counter[2]);
74 case 2: 128 case 2:
75 write_c0_perfctrl1(0); 129 w_c0_perfctrl1(0);
76 write_c0_perfcntr1(reg.counter[1]); 130 w_c0_perfcntr1(reg.counter[1]);
77 case 1: 131 case 1:
78 write_c0_perfctrl0(0); 132 w_c0_perfctrl0(0);
79 write_c0_perfcntr0(reg.counter[0]); 133 w_c0_perfcntr0(reg.counter[0]);
80 } 134 }
81} 135}
82 136
@@ -87,13 +141,13 @@ static void mipsxx_cpu_start(void *args)
87 141
88 switch (counters) { 142 switch (counters) {
89 case 4: 143 case 4:
90 write_c0_perfctrl3(reg.control[3]); 144 w_c0_perfctrl3(WHAT | reg.control[3]);
91 case 3: 145 case 3:
92 write_c0_perfctrl2(reg.control[2]); 146 w_c0_perfctrl2(WHAT | reg.control[2]);
93 case 2: 147 case 2:
94 write_c0_perfctrl1(reg.control[1]); 148 w_c0_perfctrl1(WHAT | reg.control[1]);
95 case 1: 149 case 1:
96 write_c0_perfctrl0(reg.control[0]); 150 w_c0_perfctrl0(WHAT | reg.control[0]);
97 } 151 }
98} 152}
99 153
@@ -104,13 +158,13 @@ static void mipsxx_cpu_stop(void *args)
104 158
105 switch (counters) { 159 switch (counters) {
106 case 4: 160 case 4:
107 write_c0_perfctrl3(0); 161 w_c0_perfctrl3(0);
108 case 3: 162 case 3:
109 write_c0_perfctrl2(0); 163 w_c0_perfctrl2(0);
110 case 2: 164 case 2:
111 write_c0_perfctrl1(0); 165 w_c0_perfctrl1(0);
112 case 1: 166 case 1:
113 write_c0_perfctrl0(0); 167 w_c0_perfctrl0(0);
114 } 168 }
115} 169}
116 170
@@ -124,12 +178,12 @@ static int mipsxx_perfcount_handler(struct pt_regs *regs)
124 switch (counters) { 178 switch (counters) {
125#define HANDLE_COUNTER(n) \ 179#define HANDLE_COUNTER(n) \
126 case n + 1: \ 180 case n + 1: \
127 control = read_c0_perfctrl ## n(); \ 181 control = r_c0_perfctrl ## n(); \
128 counter = read_c0_perfcntr ## n(); \ 182 counter = r_c0_perfcntr ## n(); \
129 if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \ 183 if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \
130 (counter & M_COUNTER_OVERFLOW)) { \ 184 (counter & M_COUNTER_OVERFLOW)) { \
131 oprofile_add_sample(regs, n); \ 185 oprofile_add_sample(regs, n); \
132 write_c0_perfcntr ## n(reg.counter[n]); \ 186 w_c0_perfcntr ## n(reg.counter[n]); \
133 handled = 1; \ 187 handled = 1; \
134 } 188 }
135 HANDLE_COUNTER(3) 189 HANDLE_COUNTER(3)
@@ -143,35 +197,47 @@ static int mipsxx_perfcount_handler(struct pt_regs *regs)
143 197
144#define M_CONFIG1_PC (1 << 4) 198#define M_CONFIG1_PC (1 << 4)
145 199
146static inline int n_counters(void) 200static inline int __n_counters(void)
147{ 201{
148 if (!(read_c0_config1() & M_CONFIG1_PC)) 202 if (!(read_c0_config1() & M_CONFIG1_PC))
149 return 0; 203 return 0;
150 if (!(read_c0_perfctrl0() & M_PERFCTL_MORE)) 204 if (!(r_c0_perfctrl0() & M_PERFCTL_MORE))
151 return 1; 205 return 1;
152 if (!(read_c0_perfctrl1() & M_PERFCTL_MORE)) 206 if (!(r_c0_perfctrl1() & M_PERFCTL_MORE))
153 return 2; 207 return 2;
154 if (!(read_c0_perfctrl2() & M_PERFCTL_MORE)) 208 if (!(r_c0_perfctrl2() & M_PERFCTL_MORE))
155 return 3; 209 return 3;
156 210
157 return 4; 211 return 4;
158} 212}
159 213
214static inline int n_counters(void)
215{
216 int counters = __n_counters();
217
218#ifndef CONFIG_SMP
219 if (current_cpu_data.cputype == CPU_34K)
220 return counters >> 1;
221#endif
222
223 return counters;
224}
225
160static inline void reset_counters(int counters) 226static inline void reset_counters(int counters)
161{ 227{
162 switch (counters) { 228 switch (counters) {
163 case 4: 229 case 4:
164 write_c0_perfctrl3(0); 230 w_c0_perfctrl3(0);
165 write_c0_perfcntr3(0); 231 w_c0_perfcntr3(0);
166 case 3: 232 case 3:
167 write_c0_perfctrl2(0); 233 w_c0_perfctrl2(0);
168 write_c0_perfcntr2(0); 234 w_c0_perfcntr2(0);
169 case 2: 235 case 2:
170 write_c0_perfctrl1(0); 236 w_c0_perfctrl1(0);
171 write_c0_perfcntr1(0); 237 w_c0_perfcntr1(0);
172 case 1: 238 case 1:
173 write_c0_perfctrl0(0); 239 w_c0_perfctrl0(0);
174 write_c0_perfcntr0(0); 240 w_c0_perfcntr0(0);
175 } 241 }
176} 242}
177 243
@@ -201,7 +267,6 @@ static int __init mipsxx_init(void)
201 op_model_mipsxx_ops.cpu_type = "mips/25K"; 267 op_model_mipsxx_ops.cpu_type = "mips/25K";
202 break; 268 break;
203 269
204#ifndef CONFIG_SMP
205 case CPU_34K: 270 case CPU_34K:
206 op_model_mipsxx_ops.cpu_type = "mips/34K"; 271 op_model_mipsxx_ops.cpu_type = "mips/34K";
207 break; 272 break;
@@ -209,7 +274,6 @@ static int __init mipsxx_init(void)
209 case CPU_74K: 274 case CPU_74K:
210 op_model_mipsxx_ops.cpu_type = "mips/74K"; 275 op_model_mipsxx_ops.cpu_type = "mips/74K";
211 break; 276 break;
212#endif
213 277
214 case CPU_5KC: 278 case CPU_5KC:
215 op_model_mipsxx_ops.cpu_type = "mips/5K"; 279 op_model_mipsxx_ops.cpu_type = "mips/5K";
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 465778c5d816..35d5927706ea 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
23# 23#
24# These are still pretty much in the old state, watch, go blind. 24# These are still pretty much in the old state, watch, go blind.
25# 25#
26obj-$(CONFIG_BASLER_EXCITE) = ops-titan.o pci-excite.o fixup-excite.o 26obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o
27obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o 27obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o
28obj-$(CONFIG_LASAT) += pci-lasat.o 28obj-$(CONFIG_LASAT) += pci-lasat.o
29obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o 29obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
index 87920b245931..439510af3037 100644
--- a/arch/mips/pci/fixup-atlas.c
+++ b/arch/mips/pci/fixup-atlas.c
@@ -16,7 +16,6 @@
16 * with this program; if not, write to the Free Software Foundation, Inc., 16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 */ 18 */
19#include <linux/config.h>
20#include <linux/init.h> 19#include <linux/init.h>
21#include <linux/pci.h> 20#include <linux/pci.h>
22 21
diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c
index a8a47b494b23..8e01d0c1b76b 100644
--- a/arch/mips/pci/fixup-vr4133.c
+++ b/arch/mips/pci/fixup-vr4133.c
@@ -15,7 +15,6 @@
15 * Author: Manish Lachwani (mlachwani@mvista.com) 15 * Author: Manish Lachwani (mlachwani@mvista.com)
16 * 16 *
17 */ 17 */
18#include <linux/config.h>
19#include <linux/init.h> 18#include <linux/init.h>
20#include <linux/pci.h> 19#include <linux/pci.h>
21 20
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c
index be1420126c42..0c0c1e6519f9 100644
--- a/arch/mips/pci/ops-au1000.c
+++ b/arch/mips/pci/ops-au1000.c
@@ -28,7 +28,6 @@
28 * with this program; if not, write to the Free Software Foundation, Inc., 28 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA. 29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 */ 30 */
31#include <linux/config.h>
32#include <linux/types.h> 31#include <linux/types.h>
33#include <linux/pci.h> 32#include <linux/pci.h>
34#include <linux/kernel.h> 33#include <linux/kernel.h>
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
index 7688b7711329..150419c8b414 100644
--- a/arch/mips/pci/ops-tx4927.c
+++ b/arch/mips/pci/ops-tx4927.c
@@ -119,7 +119,7 @@ static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, i
119 119
120 switch (size) { 120 switch (size) {
121 case 1: 121 case 1:
122 *val = *(volatile u8 *) ((ulong) & tx4927_pcicptr-> 122 *val = *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
123 g2pcfgdata | 123 g2pcfgdata |
124#ifdef __LITTLE_ENDIAN 124#ifdef __LITTLE_ENDIAN
125 (where & 3)); 125 (where & 3));
@@ -128,7 +128,7 @@ static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, i
128#endif 128#endif
129 break; 129 break;
130 case 2: 130 case 2:
131 *val = *(volatile u16 *) ((ulong) & tx4927_pcicptr-> 131 *val = *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
132 g2pcfgdata | 132 g2pcfgdata |
133#ifdef __LITTLE_ENDIAN 133#ifdef __LITTLE_ENDIAN
134 (where & 3)); 134 (where & 3));
@@ -168,7 +168,7 @@ static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
168 168
169 switch (size) { 169 switch (size) {
170 case 1: 170 case 1:
171 *(volatile u8 *) ((ulong) & tx4927_pcicptr-> 171 *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
172 g2pcfgdata | 172 g2pcfgdata |
173#ifdef __LITTLE_ENDIAN 173#ifdef __LITTLE_ENDIAN
174 (where & 3)) = val; 174 (where & 3)) = val;
@@ -178,7 +178,7 @@ static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
178 break; 178 break;
179 179
180 case 2: 180 case 2:
181 *(volatile u16 *) ((ulong) & tx4927_pcicptr-> 181 *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
182 g2pcfgdata | 182 g2pcfgdata |
183#ifdef __LITTLE_ENDIAN 183#ifdef __LITTLE_ENDIAN
184 (where & 3)) = val; 184 (where & 3)) = val;
diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c
index 0ff083489efd..445007084515 100644
--- a/arch/mips/pci/ops-tx4938.c
+++ b/arch/mips/pci/ops-tx4938.c
@@ -106,7 +106,7 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,
106 106
107 switch (size) { 107 switch (size) {
108 case 1: 108 case 1:
109 *val = *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | 109 *val = *(volatile u8 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
110#ifdef __BIG_ENDIAN 110#ifdef __BIG_ENDIAN
111 ((where & 3) ^ 3)); 111 ((where & 3) ^ 3));
112#else 112#else
@@ -114,7 +114,7 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,
114#endif 114#endif
115 break; 115 break;
116 case 2: 116 case 2:
117 *val = *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | 117 *val = *(volatile u16 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
118#ifdef __BIG_ENDIAN 118#ifdef __BIG_ENDIAN
119 ((where & 3) ^ 2)); 119 ((where & 3) ^ 2));
120#else 120#else
@@ -154,7 +154,7 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
154 154
155 switch (size) { 155 switch (size) {
156 case 1: 156 case 1:
157 *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | 157 *(volatile u8 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
158#ifdef __BIG_ENDIAN 158#ifdef __BIG_ENDIAN
159 ((where & 3) ^ 3)) = val; 159 ((where & 3) ^ 3)) = val;
160#else 160#else
@@ -162,7 +162,7 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
162#endif 162#endif
163 break; 163 break;
164 case 2: 164 case 2:
165 *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | 165 *(volatile u16 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
166#ifdef __BIG_ENDIAN 166#ifdef __BIG_ENDIAN
167 ((where & 0x3) ^ 0x2)) = val; 167 ((where & 0x3) ^ 0x2)) = val;
168#else 168#else
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index f4ef1a35ca18..f6774f54cd3c 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -32,7 +32,6 @@
32 * 32 *
33 * XXX: AT THIS TIME, ONLY the NATIVE PCI-X INTERFACE IS SUPPORTED. 33 * XXX: AT THIS TIME, ONLY the NATIVE PCI-X INTERFACE IS SUPPORTED.
34 */ 34 */
35#include <linux/config.h>
36#include <linux/types.h> 35#include <linux/types.h>
37#include <linux/pci.h> 36#include <linux/pci.h>
38#include <linux/kernel.h> 37#include <linux/kernel.h>
diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c
index a3eebe5890a7..ba2e34b09231 100644
--- a/arch/mips/pci/pci-bcm1480ht.c
+++ b/arch/mips/pci/pci-bcm1480ht.c
@@ -31,7 +31,6 @@
31 * problem. 31 * problem.
32 * 32 *
33 */ 33 */
34#include <linux/config.h>
35#include <linux/types.h> 34#include <linux/types.h>
36#include <linux/pci.h> 35#include <linux/pci.h>
37#include <linux/kernel.h> 36#include <linux/kernel.h>
diff --git a/arch/mips/pci/pci-ip32.c b/arch/mips/pci/pci-ip32.c
index 180af89bcb1e..17c7932cf0ae 100644
--- a/arch/mips/pci/pci-ip32.c
+++ b/arch/mips/pci/pci-ip32.c
@@ -6,7 +6,6 @@
6 * Copyright (C) 2000, 2001 Keith M Wesolowski 6 * Copyright (C) 2000, 2001 Keith M Wesolowski
7 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 7 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
8 */ 8 */
9#include <linux/config.h>
10#include <linux/kernel.h> 9#include <linux/kernel.h>
11#include <linux/init.h> 10#include <linux/init.h>
12#include <linux/interrupt.h> 11#include <linux/interrupt.h>
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index 7cca3bde59b2..80f5e8c4bcd4 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -30,7 +30,6 @@
30 * kernel mapped memory. Hopefully neither of these should be a huge 30 * kernel mapped memory. Hopefully neither of these should be a huge
31 * problem. 31 * problem.
32 */ 32 */
33#include <linux/config.h>
34#include <linux/types.h> 33#include <linux/types.h>
35#include <linux/pci.h> 34#include <linux/pci.h>
36#include <linux/kernel.h> 35#include <linux/kernel.h>
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 4dfce154d4af..5ace368657ad 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -6,7 +6,6 @@
6 * 6 *
7 * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org) 7 * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
8 */ 8 */
9#include <linux/config.h>
10#include <linux/kernel.h> 9#include <linux/kernel.h>
11#include <linux/mm.h> 10#include <linux/mm.h>
12#include <linux/bootmem.h> 11#include <linux/bootmem.h>
@@ -51,11 +50,11 @@ unsigned long PCIBIOS_MIN_MEM = 0;
51 */ 50 */
52void 51void
53pcibios_align_resource(void *data, struct resource *res, 52pcibios_align_resource(void *data, struct resource *res,
54 unsigned long size, unsigned long align) 53 resource_size_t size, resource_size_t align)
55{ 54{
56 struct pci_dev *dev = data; 55 struct pci_dev *dev = data;
57 struct pci_controller *hose = dev->sysdata; 56 struct pci_controller *hose = dev->sysdata;
58 unsigned long start = res->start; 57 resource_size_t start = res->start;
59 58
60 if (res->flags & IORESOURCE_IO) { 59 if (res->flags & IORESOURCE_IO) {
61 /* Make sure we start at our min on all hoses */ 60 /* Make sure we start at our min on all hoses */
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c
index 39ee6314f627..8aca317d4624 100644
--- a/arch/mips/philips/pnx8550/common/int.c
+++ b/arch/mips/philips/pnx8550/common/int.c
@@ -23,7 +23,6 @@
23 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 23 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
24 * 24 *
25 */ 25 */
26#include <linux/config.h>
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/irq.h> 27#include <linux/irq.h>
29#include <linux/sched.h> 28#include <linux/sched.h>
@@ -220,13 +219,13 @@ static struct hw_interrupt_type level_irq_type = {
220 219
221static struct irqaction gic_action = { 220static struct irqaction gic_action = {
222 .handler = no_action, 221 .handler = no_action,
223 .flags = SA_INTERRUPT, 222 .flags = IRQF_DISABLED,
224 .name = "GIC", 223 .name = "GIC",
225}; 224};
226 225
227static struct irqaction timer_action = { 226static struct irqaction timer_action = {
228 .handler = no_action, 227 .handler = no_action,
229 .flags = SA_INTERRUPT, 228 .flags = IRQF_DISABLED,
230 .name = "Timer", 229 .name = "Timer",
231}; 230};
232 231
@@ -236,7 +235,7 @@ void __init arch_init_irq(void)
236 int configPR; 235 int configPR;
237 236
238 for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { 237 for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) {
239 irq_desc[i].handler = &level_irq_type; 238 irq_desc[i].chip = &level_irq_type;
240 pnx8550_ack(i); /* mask the irq just in case */ 239 pnx8550_ack(i); /* mask the irq just in case */
241 } 240 }
242 241
@@ -273,7 +272,7 @@ void __init arch_init_irq(void)
273 /* mask/priority is still 0 so we will not get any 272 /* mask/priority is still 0 so we will not get any
274 * interrupts until it is unmasked */ 273 * interrupts until it is unmasked */
275 274
276 irq_desc[i].handler = &level_irq_type; 275 irq_desc[i].chip = &level_irq_type;
277 } 276 }
278 277
279 /* Priority level 0 */ 278 /* Priority level 0 */
@@ -282,12 +281,12 @@ void __init arch_init_irq(void)
282 /* Set int vector table address */ 281 /* Set int vector table address */
283 PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0; 282 PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0;
284 283
285 irq_desc[MIPS_CPU_GIC_IRQ].handler = &level_irq_type; 284 irq_desc[MIPS_CPU_GIC_IRQ].chip = &level_irq_type;
286 setup_irq(MIPS_CPU_GIC_IRQ, &gic_action); 285 setup_irq(MIPS_CPU_GIC_IRQ, &gic_action);
287 286
288 /* init of Timer interrupts */ 287 /* init of Timer interrupts */
289 for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) { 288 for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) {
290 irq_desc[i].handler = &level_irq_type; 289 irq_desc[i].chip = &level_irq_type;
291 } 290 }
292 291
293 /* Stop Timer 1-3 */ 292 /* Stop Timer 1-3 */
@@ -295,7 +294,7 @@ void __init arch_init_irq(void)
295 configPR |= 0x00000038; 294 configPR |= 0x00000038;
296 write_c0_config7(configPR); 295 write_c0_config7(configPR);
297 296
298 irq_desc[MIPS_CPU_TIMER_IRQ].handler = &level_irq_type; 297 irq_desc[MIPS_CPU_TIMER_IRQ].chip = &level_irq_type;
299 setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action); 298 setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action);
300} 299}
301 300
diff --git a/arch/mips/philips/pnx8550/common/setup.c b/arch/mips/philips/pnx8550/common/setup.c
index 0e791f4f6ea3..8ac81a9dc293 100644
--- a/arch/mips/philips/pnx8550/common/setup.c
+++ b/arch/mips/philips/pnx8550/common/setup.c
@@ -17,7 +17,6 @@
17 * with this program; if not, write to the Free Software Foundation, Inc., 17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 */ 19 */
20#include <linux/config.h>
21#include <linux/init.h> 20#include <linux/init.h>
22#include <linux/sched.h> 21#include <linux/sched.h>
23#include <linux/ioport.h> 22#include <linux/ioport.h>
diff --git a/arch/mips/pmc-sierra/yosemite/ht.c b/arch/mips/pmc-sierra/yosemite/ht.c
index 54b65a80abf5..1f7c999eb7c6 100644
--- a/arch/mips/pmc-sierra/yosemite/ht.c
+++ b/arch/mips/pmc-sierra/yosemite/ht.c
@@ -23,7 +23,6 @@
23 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */ 24 */
25 25
26#include <linux/config.h>
27#include <linux/types.h> 26#include <linux/types.h>
28#include <linux/pci.h> 27#include <linux/pci.h>
29#include <linux/kernel.h> 28#include <linux/kernel.h>
@@ -383,12 +382,12 @@ void pcibios_update_resource(struct pci_dev *dev, struct resource *root,
383 382
384 383
385void pcibios_align_resource(void *data, struct resource *res, 384void pcibios_align_resource(void *data, struct resource *res,
386 unsigned long size, unsigned long align) 385 resource_size_t size, resource_size_t align)
387{ 386{
388 struct pci_dev *dev = data; 387 struct pci_dev *dev = data;
389 388
390 if (res->flags & IORESOURCE_IO) { 389 if (res->flags & IORESOURCE_IO) {
391 unsigned long start = res->start; 390 resource_size_t start = res->start;
392 391
393 /* We need to avoid collisions with `mirrored' VGA ports 392 /* We need to avoid collisions with `mirrored' VGA ports
394 and other strange ISA hardware, so we always want the 393 and other strange ISA hardware, so we always want the
diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c
index a1f524fc4c10..b91d0aa3b7ed 100644
--- a/arch/mips/pmc-sierra/yosemite/irq.c
+++ b/arch/mips/pmc-sierra/yosemite/irq.c
@@ -26,7 +26,6 @@
26 * 26 *
27 * Second level Interrupt handlers for the PMC-Sierra Titan/Yosemite board 27 * Second level Interrupt handlers for the PMC-Sierra Titan/Yosemite board
28 */ 28 */
29#include <linux/config.h>
30#include <linux/errno.h> 29#include <linux/errno.h>
31#include <linux/init.h> 30#include <linux/init.h>
32#include <linux/kernel_stat.h> 31#include <linux/kernel_stat.h>
diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c
index 165275c00cbb..9fe4973377c3 100644
--- a/arch/mips/pmc-sierra/yosemite/prom.c
+++ b/arch/mips/pmc-sierra/yosemite/prom.c
@@ -8,7 +8,6 @@
8 * Author: Manish Lachwani (lachwani@pmc-sierra.com) 8 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
9 * Copyright (C) 2004 Ralf Baechle 9 * Copyright (C) 2004 Ralf Baechle
10 */ 10 */
11#include <linux/config.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/sched.h> 12#include <linux/sched.h>
14#include <linux/mm.h> 13#include <linux/mm.h>
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c
index b19820110aa3..ce8e4a7869b0 100644
--- a/arch/mips/sgi-ip22/ip22-eisa.c
+++ b/arch/mips/sgi-ip22/ip22-eisa.c
@@ -19,7 +19,6 @@
19 * - Fix more bugs. 19 * - Fix more bugs.
20 */ 20 */
21 21
22#include <linux/config.h>
23#include <linux/eisa.h> 22#include <linux/eisa.h>
24#include <linux/types.h> 23#include <linux/types.h>
25#include <linux/init.h> 24#include <linux/init.h>
@@ -279,9 +278,9 @@ int __init ip22_eisa_init(void)
279 irq_desc[i].action = 0; 278 irq_desc[i].action = 0;
280 irq_desc[i].depth = 1; 279 irq_desc[i].depth = 1;
281 if (i < (SGINT_EISA + 8)) 280 if (i < (SGINT_EISA + 8))
282 irq_desc[i].handler = &ip22_eisa1_irq_type; 281 irq_desc[i].chip = &ip22_eisa1_irq_type;
283 else 282 else
284 irq_desc[i].handler = &ip22_eisa2_irq_type; 283 irq_desc[i].chip = &ip22_eisa2_irq_type;
285 } 284 }
286 285
287 /* Cannot use request_irq because of kmalloc not being ready at such 286 /* Cannot use request_irq because of kmalloc not being ready at such
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index fc6a7e2b189c..2d8762818d95 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -9,7 +9,6 @@
9 * - Interrupt handling fixes 9 * - Interrupt handling fixes
10 * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org) 10 * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
11 */ 11 */
12#include <linux/config.h>
13#include <linux/types.h> 12#include <linux/types.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/kernel_stat.h> 14#include <linux/kernel_stat.h>
@@ -273,32 +272,32 @@ static void indy_buserror_irq(struct pt_regs *regs)
273 272
274static struct irqaction local0_cascade = { 273static struct irqaction local0_cascade = {
275 .handler = no_action, 274 .handler = no_action,
276 .flags = SA_INTERRUPT, 275 .flags = IRQF_DISABLED,
277 .name = "local0 cascade", 276 .name = "local0 cascade",
278}; 277};
279 278
280static struct irqaction local1_cascade = { 279static struct irqaction local1_cascade = {
281 .handler = no_action, 280 .handler = no_action,
282 .flags = SA_INTERRUPT, 281 .flags = IRQF_DISABLED,
283 .name = "local1 cascade", 282 .name = "local1 cascade",
284}; 283};
285 284
286static struct irqaction buserr = { 285static struct irqaction buserr = {
287 .handler = no_action, 286 .handler = no_action,
288 .flags = SA_INTERRUPT, 287 .flags = IRQF_DISABLED,
289 .name = "Bus Error", 288 .name = "Bus Error",
290}; 289};
291 290
292static struct irqaction map0_cascade = { 291static struct irqaction map0_cascade = {
293 .handler = no_action, 292 .handler = no_action,
294 .flags = SA_INTERRUPT, 293 .flags = IRQF_DISABLED,
295 .name = "mapable0 cascade", 294 .name = "mapable0 cascade",
296}; 295};
297 296
298#ifdef USE_LIO3_IRQ 297#ifdef USE_LIO3_IRQ
299static struct irqaction map1_cascade = { 298static struct irqaction map1_cascade = {
300 .handler = no_action, 299 .handler = no_action,
301 .flags = SA_INTERRUPT, 300 .flags = IRQF_DISABLED,
302 .name = "mapable1 cascade", 301 .name = "mapable1 cascade",
303}; 302};
304#define SGI_INTERRUPTS SGINT_END 303#define SGI_INTERRUPTS SGINT_END
@@ -436,7 +435,7 @@ void __init arch_init_irq(void)
436 irq_desc[i].status = IRQ_DISABLED; 435 irq_desc[i].status = IRQ_DISABLED;
437 irq_desc[i].action = 0; 436 irq_desc[i].action = 0;
438 irq_desc[i].depth = 1; 437 irq_desc[i].depth = 1;
439 irq_desc[i].handler = handler; 438 irq_desc[i].chip = handler;
440 } 439 }
441 440
442 /* vector handler. this register the IRQ as non-sharable */ 441 /* vector handler. this register the IRQ as non-sharable */
diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c
index d7138906eb10..25097ecc9baa 100644
--- a/arch/mips/sgi-ip22/ip22-setup.c
+++ b/arch/mips/sgi-ip22/ip22-setup.c
@@ -4,7 +4,6 @@
4 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) 4 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
5 * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org) 5 * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
6 */ 6 */
7#include <linux/config.h>
8#include <linux/ds1286.h> 7#include <linux/ds1286.h>
9#include <linux/init.h> 8#include <linux/init.h>
10#include <linux/kernel.h> 9#include <linux/kernel.h>
diff --git a/arch/mips/sgi-ip27/Kconfig b/arch/mips/sgi-ip27/Kconfig
index f14ef38646d0..5e960ae9735a 100644
--- a/arch/mips/sgi-ip27/Kconfig
+++ b/arch/mips/sgi-ip27/Kconfig
@@ -33,12 +33,13 @@ config MAPPED_KERNEL
33 depends on SGI_IP27 33 depends on SGI_IP27
34 help 34 help
35 Change the way a Linux kernel is loaded into memory on a MIPS64 35 Change the way a Linux kernel is loaded into memory on a MIPS64
36 machine. This is required in order to support text replication and 36 machine. This is required in order to support text replication on
37 NUMA. If you need to understand it, read the source code. 37 NUMA. If you need to understand it, read the source code.
38 38
39config REPLICATE_KTEXT 39config REPLICATE_KTEXT
40 bool "Kernel text replication support" 40 bool "Kernel text replication support"
41 depends on SGI_IP27 41 depends on SGI_IP27
42 select MAPPED_KERNEL
42 help 43 help
43 Say Y here to enable replicating the kernel text across multiple 44 Say Y here to enable replicating the kernel text across multiple
44 nodes in a NUMA cluster. This trades memory for speed. 45 nodes in a NUMA cluster. This trades memory for speed.
diff --git a/arch/mips/sgi-ip27/Makefile b/arch/mips/sgi-ip27/Makefile
index 686ba14e2882..a457263f4391 100644
--- a/arch/mips/sgi-ip27/Makefile
+++ b/arch/mips/sgi-ip27/Makefile
@@ -2,11 +2,12 @@
2# Makefile for the IP27 specific kernel interface routines under Linux. 2# Makefile for the IP27 specific kernel interface routines under Linux.
3# 3#
4 4
5obj-y := ip27-berr.o ip27-console.o ip27-irq.o ip27-init.o \ 5obj-y := ip27-berr.o ip27-irq.o ip27-init.o ip27-klconfig.o ip27-klnuma.o \
6 ip27-klconfig.o ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-reset.o \ 6 ip27-memory.o ip27-nmi.o ip27-reset.o ip27-timer.o ip27-hubio.o \
7 ip27-timer.o ip27-hubio.o ip27-xtalk.o 7 ip27-xtalk.o
8 8
9obj-$(CONFIG_KGDB) += ip27-dbgio.o 9obj-$(CONFIG_EARLY_PRINTK) += ip27-console.o
10obj-$(CONFIG_SMP) += ip27-smp.o 10obj-$(CONFIG_KGDB) += ip27-dbgio.o
11obj-$(CONFIG_SMP) += ip27-smp.o
11 12
12EXTRA_AFLAGS := $(CFLAGS) 13EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/sgi-ip27/ip27-console.c b/arch/mips/sgi-ip27/ip27-console.c
index 3e1ac299b804..14211e382374 100644
--- a/arch/mips/sgi-ip27/ip27-console.c
+++ b/arch/mips/sgi-ip27/ip27-console.c
@@ -46,33 +46,29 @@ void prom_putchar(char c)
46 uart->iu_thr = c; 46 uart->iu_thr = c;
47} 47}
48 48
49char __init prom_getchar(void) 49static void ioc3_console_write(struct console *con, const char *s, unsigned n)
50{ 50{
51 return 0; 51 while (n-- && *s) {
52 if (*s == '\n')
53 prom_putchar('\r');
54 prom_putchar(*s);
55 s++;
56 }
52} 57}
53 58
54static void inline ioc3_console_probe(void) 59static struct console ioc3_console = {
55{ 60 .name = "ioc3",
56 struct uart_port up; 61 .write = ioc3_console_write,
57 62 .flags = CON_PRINTBUFFER | CON_BOOT,
58 /* 63 .index = -1
59 * Register to interrupt zero because we share the interrupt with 64};
60 * the serial driver which we don't properly support yet.
61 */
62 memset(&up, 0, sizeof(up));
63 up.membase = (unsigned char *) console_uart();
64 up.irq = 0;
65 up.uartclk = IOC3_CLK;
66 up.regshift = 0;
67 up.iotype = UPIO_MEM;
68 up.flags = IOC3_FLAGS;
69 up.line = 0;
70 65
71 if (early_serial_setup(&up)) 66__init void ip27_setup_console(void)
72 printk(KERN_ERR "Early serial init of port 0 failed\n"); 67{
68 register_console(&ioc3_console);
73} 69}
74 70
75__init void ip27_setup_console(void) 71void __init disable_early_printk(void)
76{ 72{
77 ioc3_console_probe(); 73 unregister_console(&ioc3_console);
78} 74}
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c
index a6b490e99709..9094baf31d0e 100644
--- a/arch/mips/sgi-ip27/ip27-init.c
+++ b/arch/mips/sgi-ip27/ip27-init.c
@@ -6,7 +6,6 @@
6 * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com) 6 * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
7 * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc. 7 * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
8 */ 8 */
9#include <linux/config.h>
10#include <linux/kernel.h> 9#include <linux/kernel.h>
11#include <linux/init.h> 10#include <linux/init.h>
12#include <linux/sched.h> 11#include <linux/sched.h>
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 0b61a39ce2bb..597ec73359b7 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -8,7 +8,6 @@
8 8
9#undef DEBUG 9#undef DEBUG
10 10
11#include <linux/config.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/irq.h> 12#include <linux/irq.h>
14#include <linux/errno.h> 13#include <linux/errno.h>
@@ -119,7 +118,7 @@ static int ms1bit(unsigned long x)
119} 118}
120 119
121/* 120/*
122 * This code is unnecessarily complex, because we do SA_INTERRUPT 121 * This code is unnecessarily complex, because we do IRQF_DISABLED
123 * intr enabling. Basically, once we grab the set of intrs we need 122 * intr enabling. Basically, once we grab the set of intrs we need
124 * to service, we must mask _all_ these interrupts; firstly, to make 123 * to service, we must mask _all_ these interrupts; firstly, to make
125 * sure the same intr does not intr again, causing recursion that 124 * sure the same intr does not intr again, causing recursion that
@@ -386,7 +385,7 @@ void __devinit register_bridge_irq(unsigned int irq)
386 irq_desc[irq].status = IRQ_DISABLED; 385 irq_desc[irq].status = IRQ_DISABLED;
387 irq_desc[irq].action = 0; 386 irq_desc[irq].action = 0;
388 irq_desc[irq].depth = 1; 387 irq_desc[irq].depth = 1;
389 irq_desc[irq].handler = &bridge_irq_type; 388 irq_desc[irq].chip = &bridge_irq_type;
390} 389}
391 390
392int __devinit request_bridge_irq(struct bridge_controller *bc) 391int __devinit request_bridge_irq(struct bridge_controller *bc)
diff --git a/arch/mips/sgi-ip27/ip27-klnuma.c b/arch/mips/sgi-ip27/ip27-klnuma.c
index 41c3f405e00c..d777b7d1a9fe 100644
--- a/arch/mips/sgi-ip27/ip27-klnuma.c
+++ b/arch/mips/sgi-ip27/ip27-klnuma.c
@@ -3,7 +3,6 @@
3 * Copyright 2000 - 2001 Silicon Graphics, Inc. 3 * Copyright 2000 - 2001 Silicon Graphics, Inc.
4 * Copyright 2000 - 2001 Kanoj Sarcar (kanoj@sgi.com) 4 * Copyright 2000 - 2001 Kanoj Sarcar (kanoj@sgi.com)
5 */ 5 */
6#include <linux/config.h>
7#include <linux/init.h> 6#include <linux/init.h>
8#include <linux/mmzone.h> 7#include <linux/mmzone.h>
9#include <linux/kernel.h> 8#include <linux/kernel.h>
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index 6c00dce9f73f..efe6971fc800 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -10,7 +10,6 @@
10 * On SGI IP27 the ARC memory configuration data is completly bogus but 10 * On SGI IP27 the ARC memory configuration data is completly bogus but
11 * alternate easier to use mechanisms are available. 11 * alternate easier to use mechanisms are available.
12 */ 12 */
13#include <linux/config.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/kernel.h> 14#include <linux/kernel.h>
16#include <linux/mm.h> 15#include <linux/mm.h>
diff --git a/arch/mips/sgi-ip27/ip27-reset.c b/arch/mips/sgi-ip27/ip27-reset.c
index 4322db57d3c1..c17076108d47 100644
--- a/arch/mips/sgi-ip27/ip27-reset.c
+++ b/arch/mips/sgi-ip27/ip27-reset.c
@@ -8,7 +8,6 @@
8 * Copyright (C) 1997, 1998, 1999, 2000, 06 by Ralf Baechle 8 * Copyright (C) 1997, 1998, 1999, 2000, 06 by Ralf Baechle
9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
10 */ 10 */
11#include <linux/config.h>
12#include <linux/kernel.h> 11#include <linux/kernel.h>
13#include <linux/sched.h> 12#include <linux/sched.h>
14#include <linux/timer.h> 13#include <linux/timer.h>
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 1fb860c7ac6d..3ca614a851e5 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -217,7 +217,7 @@ static struct hw_interrupt_type rt_irq_type = {
217 217
218static struct irqaction rt_irqaction = { 218static struct irqaction rt_irqaction = {
219 .handler = ip27_rt_timer_interrupt, 219 .handler = ip27_rt_timer_interrupt,
220 .flags = SA_INTERRUPT, 220 .flags = IRQF_DISABLED,
221 .mask = CPU_MASK_NONE, 221 .mask = CPU_MASK_NONE,
222 .name = "timer" 222 .name = "timer"
223}; 223};
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index 8ba08047d164..3b7e74b6222e 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -125,9 +125,9 @@ extern irqreturn_t crime_memerr_intr (int irq, void *dev_id,
125extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id, 125extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id,
126 struct pt_regs *regs); 126 struct pt_regs *regs);
127 127
128struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT, 128struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED,
129 CPU_MASK_NONE, "CRIME memory error", NULL, NULL }; 129 CPU_MASK_NONE, "CRIME memory error", NULL, NULL };
130struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT, 130struct irqaction cpuerr_irq = { crime_cpuerr_intr, IRQF_DISABLED,
131 CPU_MASK_NONE, "CRIME CPU error", NULL, NULL }; 131 CPU_MASK_NONE, "CRIME CPU error", NULL, NULL };
132 132
133/* 133/*
@@ -316,9 +316,9 @@ static struct hw_interrupt_type ip32_macepci_interrupt = {
316 MACEISA_KEYB_POLL_INT | \ 316 MACEISA_KEYB_POLL_INT | \
317 MACEISA_MOUSE_INT | \ 317 MACEISA_MOUSE_INT | \
318 MACEISA_MOUSE_POLL_INT | \ 318 MACEISA_MOUSE_POLL_INT | \
319 MACEISA_TIMER0_INT | \ 319 MACEIIRQF_TIMER0_INT | \
320 MACEISA_TIMER1_INT | \ 320 MACEIIRQF_TIMER1_INT | \
321 MACEISA_TIMER2_INT) 321 MACEIIRQF_TIMER2_INT)
322#define MACEISA_SUPERIO_INT (MACEISA_PARALLEL_INT | \ 322#define MACEISA_SUPERIO_INT (MACEISA_PARALLEL_INT | \
323 MACEISA_PAR_CTXA_INT | \ 323 MACEISA_PAR_CTXA_INT | \
324 MACEISA_PAR_CTXB_INT | \ 324 MACEISA_PAR_CTXB_INT | \
@@ -349,7 +349,7 @@ static void enable_maceisa_irq (unsigned int irq)
349 case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ: 349 case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ:
350 crime_int = MACE_AUDIO_INT; 350 crime_int = MACE_AUDIO_INT;
351 break; 351 break;
352 case MACEISA_RTC_IRQ ... MACEISA_TIMER2_IRQ: 352 case MACEISA_RTC_IRQ ... MACEIIRQF_TIMER2_IRQ:
353 crime_int = MACE_MISC_INT; 353 crime_int = MACE_MISC_INT;
354 break; 354 break;
355 case MACEISA_PARALLEL_IRQ ... MACEISA_SERIAL2_RDMAOR_IRQ: 355 case MACEISA_PARALLEL_IRQ ... MACEISA_SERIAL2_RDMAOR_IRQ:
@@ -591,7 +591,7 @@ void __init arch_init_irq(void)
591 irq_desc[irq].status = IRQ_DISABLED; 591 irq_desc[irq].status = IRQ_DISABLED;
592 irq_desc[irq].action = 0; 592 irq_desc[irq].action = 0;
593 irq_desc[irq].depth = 0; 593 irq_desc[irq].depth = 0;
594 irq_desc[irq].handler = controller; 594 irq_desc[irq].chip = controller;
595 } 595 }
596 setup_irq(CRIME_MEMERR_IRQ, &memerr_irq); 596 setup_irq(CRIME_MEMERR_IRQ, &memerr_irq);
597 setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq); 597 setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq);
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
index acbdad06fac1..240a2f981d08 100644
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@@ -8,7 +8,6 @@
8 * Copyright (C) 2000 Harald Koerfgen 8 * Copyright (C) 2000 Harald Koerfgen
9 * Copyright (C) 2002, 2003, 2005 Ilya A. Volynets 9 * Copyright (C) 2002, 2003, 2005 Ilya A. Volynets
10 */ 10 */
11#include <linux/config.h>
12#include <linux/console.h> 11#include <linux/console.h>
13#include <linux/init.h> 12#include <linux/init.h>
14#include <linux/interrupt.h> 13#include <linux/interrupt.h>
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index 816aee7fcd25..ec7a2cffacf0 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -3,6 +3,7 @@ config SIBYTE_SB1250
3 select HW_HAS_PCI 3 select HW_HAS_PCI
4 select SIBYTE_HAS_LDT 4 select SIBYTE_HAS_LDT
5 select SIBYTE_SB1xxx_SOC 5 select SIBYTE_SB1xxx_SOC
6 select SYS_SUPPORTS_SMP
6 7
7config SIBYTE_BCM1120 8config SIBYTE_BCM1120
8 bool 9 bool
@@ -30,11 +31,13 @@ config SIBYTE_BCM1x80
30 bool 31 bool
31 select HW_HAS_PCI 32 select HW_HAS_PCI
32 select SIBYTE_SB1xxx_SOC 33 select SIBYTE_SB1xxx_SOC
34 select SYS_SUPPORTS_SMP
33 35
34config SIBYTE_BCM1x55 36config SIBYTE_BCM1x55
35 bool 37 bool
36 select HW_HAS_PCI 38 select HW_HAS_PCI
37 select SIBYTE_SB1xxx_SOC 39 select SIBYTE_SB1xxx_SOC
40 select SYS_SUPPORTS_SMP
38 41
39config SIBYTE_SB1xxx_SOC 42config SIBYTE_SB1xxx_SOC
40 bool 43 bool
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index e61760b14d99..29d3bbb5847d 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -15,7 +15,6 @@
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18#include <linux/config.h>
19#include <linux/kernel.h> 18#include <linux/kernel.h>
20#include <linux/init.h> 19#include <linux/init.h>
21#include <linux/linkage.h> 20#include <linux/linkage.h>
@@ -276,10 +275,10 @@ void __init init_bcm1480_irqs(void)
276 irq_desc[i].action = 0; 275 irq_desc[i].action = 0;
277 irq_desc[i].depth = 1; 276 irq_desc[i].depth = 1;
278 if (i < BCM1480_NR_IRQS) { 277 if (i < BCM1480_NR_IRQS) {
279 irq_desc[i].handler = &bcm1480_irq_type; 278 irq_desc[i].chip = &bcm1480_irq_type;
280 bcm1480_irq_owner[i] = 0; 279 bcm1480_irq_owner[i] = 0;
281 } else { 280 } else {
282 irq_desc[i].handler = &no_irq_type; 281 irq_desc[i].chip = &no_irq_type;
283 } 282 }
284 } 283 }
285} 284}
diff --git a/arch/mips/sibyte/bcm1480/setup.c b/arch/mips/sibyte/bcm1480/setup.c
index d90a0b87874c..8236d0c48542 100644
--- a/arch/mips/sibyte/bcm1480/setup.c
+++ b/arch/mips/sibyte/bcm1480/setup.c
@@ -15,7 +15,6 @@
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18#include <linux/config.h>
19#include <linux/kernel.h> 18#include <linux/kernel.h>
20#include <linux/reboot.h> 19#include <linux/reboot.h>
21#include <linux/string.h> 20#include <linux/string.h>
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
index efaf83efd2e4..7e088f6c4a86 100644
--- a/arch/mips/sibyte/bcm1480/time.c
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -25,7 +25,6 @@
25 * code to do general bookkeeping (e.g. update jiffies, run 25 * code to do general bookkeeping (e.g. update jiffies, run
26 * bottom halves, etc.) 26 * bottom halves, etc.)
27 */ 27 */
28#include <linux/config.h>
29#include <linux/interrupt.h> 28#include <linux/interrupt.h>
30#include <linux/sched.h> 29#include <linux/sched.h>
31#include <linux/spinlock.h> 30#include <linux/spinlock.h>
diff --git a/arch/mips/sibyte/cfe/console.c b/arch/mips/sibyte/cfe/console.c
index 7721100d0275..c6ec748175b0 100644
--- a/arch/mips/sibyte/cfe/console.c
+++ b/arch/mips/sibyte/cfe/console.c
@@ -1,4 +1,3 @@
1#include <linux/config.h>
2#include <linux/init.h> 1#include <linux/init.h>
3#include <linux/errno.h> 2#include <linux/errno.h>
4#include <linux/console.h> 3#include <linux/console.h>
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
index ea308029450e..6e8952da6e2a 100644
--- a/arch/mips/sibyte/cfe/setup.c
+++ b/arch/mips/sibyte/cfe/setup.c
@@ -16,7 +16,6 @@
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18 18
19#include <linux/config.h>
20#include <linux/init.h> 19#include <linux/init.h>
21#include <linux/kernel.h> 20#include <linux/kernel.h>
22#include <linux/linkage.h> 21#include <linux/linkage.h>
diff --git a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/sb1250/bus_watcher.c
index 482dee054e68..bb90649fbc48 100644
--- a/arch/mips/sibyte/sb1250/bus_watcher.c
+++ b/arch/mips/sibyte/sb1250/bus_watcher.c
@@ -25,7 +25,6 @@
25 * /proc/bus_watcher if PROC_FS is on. 25 * /proc/bus_watcher if PROC_FS is on.
26 */ 26 */
27 27
28#include <linux/config.h>
29#include <linux/init.h> 28#include <linux/init.h>
30#include <linux/kernel.h> 29#include <linux/kernel.h>
31#include <linux/interrupt.h> 30#include <linux/interrupt.h>
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index f853c32f60a0..1d280aabcf6a 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -15,7 +15,6 @@
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18#include <linux/config.h>
19#include <linux/kernel.h> 18#include <linux/kernel.h>
20#include <linux/init.h> 19#include <linux/init.h>
21#include <linux/linkage.h> 20#include <linux/linkage.h>
@@ -246,10 +245,10 @@ void __init init_sb1250_irqs(void)
246 irq_desc[i].action = 0; 245 irq_desc[i].action = 0;
247 irq_desc[i].depth = 1; 246 irq_desc[i].depth = 1;
248 if (i < SB1250_NR_IRQS) { 247 if (i < SB1250_NR_IRQS) {
249 irq_desc[i].handler = &sb1250_irq_type; 248 irq_desc[i].chip = &sb1250_irq_type;
250 sb1250_irq_owner[i] = 0; 249 sb1250_irq_owner[i] = 0;
251 } else { 250 } else {
252 irq_desc[i].handler = &no_irq_type; 251 irq_desc[i].chip = &no_irq_type;
253 } 252 }
254 } 253 }
255} 254}
diff --git a/arch/mips/sibyte/sb1250/prom.c b/arch/mips/sibyte/sb1250/prom.c
index 742043f8d755..3c33a4517bc3 100644
--- a/arch/mips/sibyte/sb1250/prom.c
+++ b/arch/mips/sibyte/sb1250/prom.c
@@ -16,7 +16,6 @@
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18 18
19#include <linux/config.h>
20#include <linux/init.h> 19#include <linux/init.h>
21#include <linux/kernel.h> 20#include <linux/kernel.h>
22#include <linux/mm.h> 21#include <linux/mm.h>
diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
index fde4751c84fe..d0ee1d5b8223 100644
--- a/arch/mips/sibyte/sb1250/setup.c
+++ b/arch/mips/sibyte/sb1250/setup.c
@@ -15,7 +15,6 @@
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18#include <linux/config.h>
19#include <linux/init.h> 18#include <linux/init.h>
20#include <linux/kernel.h> 19#include <linux/kernel.h>
21#include <linux/reboot.h> 20#include <linux/reboot.h>
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 1588f6debd90..4b669dc86ef4 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -25,7 +25,6 @@
25 * code to do general bookkeeping (e.g. update jiffies, run 25 * code to do general bookkeeping (e.g. update jiffies, run
26 * bottom halves, etc.) 26 * bottom halves, etc.)
27 */ 27 */
28#include <linux/config.h>
29#include <linux/interrupt.h> 28#include <linux/interrupt.h>
30#include <linux/sched.h> 29#include <linux/sched.h>
31#include <linux/spinlock.h> 30#include <linux/spinlock.h>
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index f9e694988cdf..2996e338cfbd 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -21,14 +21,13 @@
21 * Setup code for the SWARM board 21 * Setup code for the SWARM board
22 */ 22 */
23 23
24#include <linux/config.h>
25#include <linux/spinlock.h> 24#include <linux/spinlock.h>
26#include <linux/mm.h> 25#include <linux/mm.h>
27#include <linux/bootmem.h> 26#include <linux/bootmem.h>
28#include <linux/blkdev.h> 27#include <linux/blkdev.h>
29#include <linux/init.h> 28#include <linux/init.h>
30#include <linux/kernel.h> 29#include <linux/kernel.h>
31#include <linux/tty.h> 30#include <linux/screen_info.h>
32#include <linux/initrd.h> 31#include <linux/initrd.h>
33 32
34#include <asm/irq.h> 33#include <asm/irq.h>
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c
index 7365b4853ddb..c19e158ec402 100644
--- a/arch/mips/sni/irq.c
+++ b/arch/mips/sni/irq.c
@@ -203,7 +203,7 @@ void __init arch_init_irq(void)
203 irq_desc[i].status = IRQ_DISABLED; 203 irq_desc[i].status = IRQ_DISABLED;
204 irq_desc[i].action = 0; 204 irq_desc[i].action = 0;
205 irq_desc[i].depth = 1; 205 irq_desc[i].depth = 1;
206 irq_desc[i].handler = &pciasic_irq_type; 206 irq_desc[i].chip = &pciasic_irq_type;
207 } 207 }
208 208
209 change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4); 209 change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4);
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index a050bb6ae704..e5646b027f72 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -7,7 +7,6 @@
7 * 7 *
8 * Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org) 8 * Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org)
9 */ 9 */
10#include <linux/config.h>
11#include <linux/eisa.h> 10#include <linux/eisa.h>
12#include <linux/hdreg.h> 11#include <linux/hdreg.h>
13#include <linux/ioport.h> 12#include <linux/ioport.h>
@@ -19,7 +18,7 @@
19#include <linux/pci.h> 18#include <linux/pci.h>
20#include <linux/console.h> 19#include <linux/console.h>
21#include <linux/fb.h> 20#include <linux/fb.h>
22#include <linux/tty.h> 21#include <linux/screen_info.h>
23 22
24#ifdef CONFIG_ARC 23#ifdef CONFIG_ARC
25#include <asm/arc/types.h> 24#include <asm/arc/types.h>
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c
index 8ca68015cf40..ae9d5653a863 100644
--- a/arch/mips/tx4927/common/tx4927_irq.c
+++ b/arch/mips/tx4927/common/tx4927_irq.c
@@ -23,7 +23,6 @@
23 * with this program; if not, write to the Free Software Foundation, Inc., 23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */ 25 */
26#include <linux/config.h>
27#include <linux/errno.h> 26#include <linux/errno.h>
28#include <linux/init.h> 27#include <linux/init.h>
29#include <linux/kernel_stat.h> 28#include <linux/kernel_stat.h>
@@ -227,7 +226,7 @@ static void __init tx4927_irq_cp0_init(void)
227 irq_desc[i].status = IRQ_DISABLED; 226 irq_desc[i].status = IRQ_DISABLED;
228 irq_desc[i].action = 0; 227 irq_desc[i].action = 0;
229 irq_desc[i].depth = 1; 228 irq_desc[i].depth = 1;
230 irq_desc[i].handler = &tx4927_irq_cp0_type; 229 irq_desc[i].chip = &tx4927_irq_cp0_type;
231 } 230 }
232 231
233 return; 232 return;
@@ -435,7 +434,7 @@ static void __init tx4927_irq_pic_init(void)
435 irq_desc[i].status = IRQ_DISABLED; 434 irq_desc[i].status = IRQ_DISABLED;
436 irq_desc[i].action = 0; 435 irq_desc[i].action = 0;
437 irq_desc[i].depth = 2; 436 irq_desc[i].depth = 2;
438 irq_desc[i].handler = &tx4927_irq_pic_type; 437 irq_desc[i].chip = &tx4927_irq_pic_type;
439 } 438 }
440 439
441 setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); 440 setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 81a5acfe8c42..64a1b394b252 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -24,7 +24,6 @@
24 * with this program; if not, write to the Free Software Foundation, Inc., 24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */ 26 */
27#include <linux/config.h>
28#include <linux/errno.h> 27#include <linux/errno.h>
29#include <linux/init.h> 28#include <linux/init.h>
30#include <linux/kernel_stat.h> 29#include <linux/kernel_stat.h>
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index aee07ff2212a..ec0a0de3083d 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -111,7 +111,6 @@ SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
111JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6 111JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
112*/ 112*/
113 113
114#include <linux/config.h>
115#include <linux/init.h> 114#include <linux/init.h>
116#include <linux/kernel.h> 115#include <linux/kernel.h>
117#include <linux/types.h> 116#include <linux/types.h>
@@ -338,7 +337,7 @@ int toshiba_rbtx4927_irq_nested(int sw_irq)
338} 337}
339 338
340//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } 339//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
341#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, SA_SHIRQ, CPU_MASK_NONE, s, NULL, NULL } 340#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL }
342static struct irqaction toshiba_rbtx4927_irq_ioc_action = 341static struct irqaction toshiba_rbtx4927_irq_ioc_action =
343TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME); 342TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME);
344#ifdef CONFIG_TOSHIBA_FPCIB0 343#ifdef CONFIG_TOSHIBA_FPCIB0
@@ -368,7 +367,7 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void)
368 irq_desc[i].status = IRQ_DISABLED; 367 irq_desc[i].status = IRQ_DISABLED;
369 irq_desc[i].action = 0; 368 irq_desc[i].action = 0;
370 irq_desc[i].depth = 3; 369 irq_desc[i].depth = 3;
371 irq_desc[i].handler = &toshiba_rbtx4927_irq_ioc_type; 370 irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type;
372 } 371 }
373 372
374 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, 373 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
@@ -526,7 +525,7 @@ static void __init toshiba_rbtx4927_irq_isa_init(void)
526 irq_desc[i].action = 0; 525 irq_desc[i].action = 0;
527 irq_desc[i].depth = 526 irq_desc[i].depth =
528 ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5)); 527 ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5));
529 irq_desc[i].handler = &toshiba_rbtx4927_irq_isa_type; 528 irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type;
530 } 529 }
531 530
532 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, 531 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
@@ -692,13 +691,13 @@ void toshiba_rbtx4927_irq_dump(char *key)
692 { 691 {
693 u32 i, j = 0; 692 u32 i, j = 0;
694 for (i = 0; i < NR_IRQS; i++) { 693 for (i = 0; i < NR_IRQS; i++) {
695 if (strcmp(irq_desc[i].handler->typename, "none") 694 if (strcmp(irq_desc[i].chip->typename, "none")
696 == 0) 695 == 0)
697 continue; 696 continue;
698 697
699 if ((i >= 1) 698 if ((i >= 1)
700 && (irq_desc[i - 1].handler->typename == 699 && (irq_desc[i - 1].chip->typename ==
701 irq_desc[i].handler->typename)) { 700 irq_desc[i].chip->typename)) {
702 j++; 701 j++;
703 } else { 702 } else {
704 j = 0; 703 j = 0;
@@ -707,12 +706,12 @@ void toshiba_rbtx4927_irq_dump(char *key)
707 (TOSHIBA_RBTX4927_IRQ_INFO, 706 (TOSHIBA_RBTX4927_IRQ_INFO,
708 "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n", 707 "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
709 key, i, i, irq_desc[i].status, 708 key, i, i, irq_desc[i].status,
710 (u32) irq_desc[i].handler, 709 (u32) irq_desc[i].chip,
711 (u32) irq_desc[i].action, 710 (u32) irq_desc[i].action,
712 (u32) (irq_desc[i].action ? irq_desc[i]. 711 (u32) (irq_desc[i].action ? irq_desc[i].
713 action->handler : 0), 712 action->handler : 0),
714 irq_desc[i].depth, 713 irq_desc[i].depth,
715 irq_desc[i].handler->typename, j); 714 irq_desc[i].chip->typename, j);
716 } 715 }
717 } 716 }
718#endif 717#endif
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index 6dcf077f61a0..f0d70c476005 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -42,7 +42,6 @@
42 * with this program; if not, write to the Free Software Foundation, Inc., 42 * with this program; if not, write to the Free Software Foundation, Inc.,
43 * 675 Mass Ave, Cambridge, MA 02139, USA. 43 * 675 Mass Ave, Cambridge, MA 02139, USA.
44 */ 44 */
45#include <linux/config.h>
46#include <linux/init.h> 45#include <linux/init.h>
47#include <linux/kernel.h> 46#include <linux/kernel.h>
48#include <linux/types.h> 47#include <linux/types.h>
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c
index 873805178d8e..0b2f8c849218 100644
--- a/arch/mips/tx4938/common/irq.c
+++ b/arch/mips/tx4938/common/irq.c
@@ -102,7 +102,7 @@ tx4938_irq_cp0_init(void)
102 irq_desc[i].status = IRQ_DISABLED; 102 irq_desc[i].status = IRQ_DISABLED;
103 irq_desc[i].action = 0; 103 irq_desc[i].action = 0;
104 irq_desc[i].depth = 1; 104 irq_desc[i].depth = 1;
105 irq_desc[i].handler = &tx4938_irq_cp0_type; 105 irq_desc[i].chip = &tx4938_irq_cp0_type;
106 } 106 }
107 107
108 return; 108 return;
@@ -306,7 +306,7 @@ tx4938_irq_pic_init(void)
306 irq_desc[i].status = IRQ_DISABLED; 306 irq_desc[i].status = IRQ_DISABLED;
307 irq_desc[i].action = 0; 307 irq_desc[i].action = 0;
308 irq_desc[i].depth = 2; 308 irq_desc[i].depth = 2;
309 irq_desc[i].handler = &tx4938_irq_pic_type; 309 irq_desc[i].chip = &tx4938_irq_pic_type;
310 } 310 }
311 311
312 setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action); 312 setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action);
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
index 9cd9c0fe2265..3b8245dc5bd3 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
@@ -146,7 +146,7 @@ toshiba_rbtx4938_irq_ioc_init(void)
146 irq_desc[i].status = IRQ_DISABLED; 146 irq_desc[i].status = IRQ_DISABLED;
147 irq_desc[i].action = 0; 147 irq_desc[i].action = 0;
148 irq_desc[i].depth = 3; 148 irq_desc[i].depth = 3;
149 irq_desc[i].handler = &toshiba_rbtx4938_irq_ioc_type; 149 irq_desc[i].chip = &toshiba_rbtx4938_irq_ioc_type;
150 } 150 }
151 151
152 setup_irq(RBTX4938_IRQ_IOCINT, 152 setup_irq(RBTX4938_IRQ_IOCINT,
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/prom.c b/arch/mips/tx4938/toshiba_rbtx4938/prom.c
index 7df8b32ba265..e44daf30a7c1 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/prom.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/prom.c
@@ -12,7 +12,6 @@
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) 12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */ 13 */
14 14
15#include <linux/config.h>
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/mm.h> 16#include <linux/mm.h>
18#include <linux/sched.h> 17#include <linux/sched.h>
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
index 96e833cd4c14..66163ba452c8 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
@@ -11,7 +11,6 @@
11 * 11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) 12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */ 13 */
14#include <linux/config.h>
15#include <linux/init.h> 14#include <linux/init.h>
16#include <linux/types.h> 15#include <linux/types.h>
17#include <linux/ioport.h> 16#include <linux/ioport.h>
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c b/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
index 951a208ee9b3..89596e62f909 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
@@ -9,7 +9,6 @@
9 * 9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) 10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */ 11 */
12#include <linux/config.h>
13#include <linux/init.h> 12#include <linux/init.h>
14#include <linux/delay.h> 13#include <linux/delay.h>
15#include <linux/proc_fs.h> 14#include <linux/proc_fs.h>
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index 07ae19cf0c29..b9323302cc4e 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -722,10 +722,10 @@ static int __init vr41xx_icu_init(void)
722 icu2_write(MGIUINTHREG, 0xffff); 722 icu2_write(MGIUINTHREG, 0xffff);
723 723
724 for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) 724 for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
725 irq_desc[i].handler = &sysint1_irq_type; 725 irq_desc[i].chip = &sysint1_irq_type;
726 726
727 for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) 727 for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++)
728 irq_desc[i].handler = &sysint2_irq_type; 728 irq_desc[i].chip = &sysint2_irq_type;
729 729
730 cascade_irq(INT0_IRQ, icu_get_irq); 730 cascade_irq(INT0_IRQ, icu_get_irq);
731 cascade_irq(INT1_IRQ, icu_get_irq); 731 cascade_irq(INT1_IRQ, icu_get_irq);
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
index 86796bb63c3c..66aa50802deb 100644
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -73,13 +73,13 @@ static void irq_dispatch(unsigned int irq, struct pt_regs *regs)
73 if (cascade->get_irq != NULL) { 73 if (cascade->get_irq != NULL) {
74 unsigned int source_irq = irq; 74 unsigned int source_irq = irq;
75 desc = irq_desc + source_irq; 75 desc = irq_desc + source_irq;
76 desc->handler->ack(source_irq); 76 desc->chip->ack(source_irq);
77 irq = cascade->get_irq(irq, regs); 77 irq = cascade->get_irq(irq, regs);
78 if (irq < 0) 78 if (irq < 0)
79 atomic_inc(&irq_err_count); 79 atomic_inc(&irq_err_count);
80 else 80 else
81 irq_dispatch(irq, regs); 81 irq_dispatch(irq, regs);
82 desc->handler->end(source_irq); 82 desc->chip->end(source_irq);
83 } else 83 } else
84 do_IRQ(irq, regs); 84 do_IRQ(irq, regs);
85} 85}
diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c
index 3e31f8193d21..2d287b8893d9 100644
--- a/arch/mips/vr41xx/common/vrc4173.c
+++ b/arch/mips/vr41xx/common/vrc4173.c
@@ -483,7 +483,7 @@ static inline int vrc4173_icu_init(int cascade_irq)
483 vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW); 483 vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW);
484 484
485 for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) 485 for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++)
486 irq_desc[i].handler = &vrc4173_irq_type; 486 irq_desc[i].chip = &vrc4173_irq_type;
487 487
488 return 0; 488 return 0;
489} 489}
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/init.c b/arch/mips/vr41xx/nec-cmbvr4133/init.c
index be590edb0b83..ae1af6b21c45 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/init.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/init.c
@@ -15,7 +15,6 @@
15 * Support for NEC-CMBVR4133 in 2.6 15 * Support for NEC-CMBVR4133 in 2.6
16 * Manish Lachwani (mlachwani@mvista.com) 16 * Manish Lachwani (mlachwani@mvista.com)
17 */ 17 */
18#include <linux/config.h>
19 18
20#ifdef CONFIG_ROCKHOPPER 19#ifdef CONFIG_ROCKHOPPER
21#include <asm/io.h> 20#include <asm/io.h>
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
index 31db6b61a39e..7b2511ca0a61 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
@@ -104,7 +104,7 @@ void __init rockhopper_init_irq(void)
104 } 104 }
105 105
106 for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) 106 for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++)
107 irq_desc[i].handler = &i8259_irq_type; 107 irq_desc[i].chip = &i8259_irq_type;
108 108
109 setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); 109 setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade);
110 110
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c b/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
index 1f6b24ef8695..f45caccedc07 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
@@ -14,7 +14,6 @@
14 * Support for NEC-CMBVR4133 in 2.6 14 * Support for NEC-CMBVR4133 in 2.6
15 * Author: Manish Lachwani (mlachwani@mvista.com) 15 * Author: Manish Lachwani (mlachwani@mvista.com)
16 */ 16 */
17#include <linux/config.h>
18#include <linux/init.h> 17#include <linux/init.h>
19#include <linux/types.h> 18#include <linux/types.h>
20#include <linux/serial.h> 19#include <linux/serial.h>
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/setup.c b/arch/mips/vr41xx/nec-cmbvr4133/setup.c
index 53272a5c3cbe..b20b93b2b95e 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/setup.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/setup.c
@@ -14,7 +14,6 @@
14 * Support for CMBVR4133 board in 2.6 14 * Support for CMBVR4133 board in 2.6
15 * Author: Manish Lachwani (mlachwani@mvista.com) 15 * Author: Manish Lachwani (mlachwani@mvista.com)
16 */ 16 */
17#include <linux/config.h>
18#include <linux/init.h> 17#include <linux/init.h>
19#include <linux/ide.h> 18#include <linux/ide.h>
20#include <linux/ioport.h> 19#include <linux/ioport.h>