88 files changed, 767 insertions, 1385 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f88fce5e9772..a920f2c422e9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1159,7 +1159,7 @@ config ARM_NR_BANKS
 config IWMMXT
        bool "Enable iWMMXt support"
        depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
-        default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
+        default y if PXA27x || PXA3xx || ARCH_MMP
        help
          Enable support for iWMMXt context switching at run time if
          running on a CPU that supports it.
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index a517153a13ea..537208f22e56 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -54,10 +54,6 @@ ifeq ($(CONFIG_ARCH_SA1100),y)
 OBJS            += head-sa1100.o
 endif
-ifeq ($(CONFIG_ARCH_VT8500),y)
-OBJS            += head-vt8500.o
-endif
 ifeq ($(CONFIG_CPU_XSCALE),y)
 OBJS            += head-xscale.o
 endif
diff --git a/arch/arm/boot/compressed/head-vt8500.S b/arch/arm/boot/compressed/head-vt8500.S
deleted file mode 100644
index 1dc1e21a3be3..000000000000
--- a/arch/arm/boot/compressed/head-vt8500.S
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-vt8500.S
- *
- * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
- *
- * VIA VT8500 specific tweaks. This is merged into head.S by the linker.
- *
- */
-#include <linux/linkage.h>
-#include <asm/mach-types.h>
-                .section        ".start", "ax"
-__VT8500_start:
-        @ Compare the SCC ID register against a list of known values
-        ldr     r1, .SCCID
-        ldr     r3, [r1]
-        @ VT8500 override
-        ldr     r4, .VT8500SCC
-        cmp     r3, r4
-        ldreq   r7, .ID_BV07
-        beq     .Lendvt8500
-        @ WM8505 override
-        ldr     r4, .WM8505SCC
-        cmp     r3, r4
-        ldreq   r7, .ID_8505
-        beq     .Lendvt8500
-        @ Otherwise, leave the bootloader's machine id untouched
-.SCCID:
-        .word   0xd8120000
-.VT8500SCC:
-        .word   0x34000102
-.WM8505SCC:
-        .word   0x34260103
-.ID_BV07:
-        .word   MACH_TYPE_BV07
-.ID_8505:
-        .word   MACH_TYPE_WM8505_7IN_NETBOOK
-.Lendvt8500:
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
index 61767757b50a..c9c3fa344647 100644
--- a/arch/arm/boot/dts/integratorap.dts
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -18,6 +18,11 @@
                bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
        };
+        syscon {
+                /* AP system controller registers */
+                reg = <0x11000000 0x100>;
+        };
        timer0: timer@13000000 {
                compatible = "arm,integrator-timer";
        };
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
index 2dd5e4e48481..8b119399025a 100644
--- a/arch/arm/boot/dts/integratorcp.dts
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -18,6 +18,11 @@
                bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
        };
+        cpcon {
+                /* CP controller registers */
+                reg = <0xcb000000 0x100>;
+        };
        timer0: timer@13000000 {
                compatible = "arm,sp804", "arm,primecell";
        };
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 23004847bb05..8ea02ac3ec1a 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -211,13 +211,6 @@ static inline void dma_free_writecombine(struct device *dev, size_t size,
 extern void __init init_dma_coherent_pool_size(unsigned long size);
 /*
- * This can be called during boot to increase the size of the consistent
- * DMA region above it's default value of 2MB. It must be called before the
- * memory allocator is initialised, i.e. before any core_initcall.
- */
-static inline void init_consistent_dma_size(unsigned long size) { }
-/*
 * For SA-1111, IXP425, and ADI systems  the dma-mapping functions are "magic"
 * and utilize bounce buffers as needed to work around limited DMA windows.
 *
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 84af1b506d92..b7ae124c16e5 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -343,7 +343,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
 static void __init at91sam9g45_map_io(void)
 {
        at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
-        init_consistent_dma_size(SZ_4M);
 }
 static void __init at91sam9g45_ioremap_registers(void)
diff --git a/arch/arm/mach-at91/include/mach/atmel-mci.h b/arch/arm/mach-at91/include/mach/atmel-mci.h
index cd580a12e904..3069e4135573 100644
--- a/arch/arm/mach-at91/include/mach/atmel-mci.h
+++ b/arch/arm/mach-at91/include/mach/atmel-mci.h
@@ -14,11 +14,4 @@ struct mci_dma_data {
 #define slave_data_ptr(s)       (&(s)->sdata)
 #define find_slave_dev(s)       ((s)->sdata.dma_dev)
-#define setup_dma_addr(s, t, r) do {            \
-        if (s) {                                \
-                (s)->sdata.tx_reg = (t);        \
-                (s)->sdata.rx_reg = (r);        \
-        }                                       \
-} while (0)
 #endif /* __MACH_ATMEL_MCI_H */
diff --git a/arch/arm/mach-bcm2835/Makefile.boot b/arch/arm/mach-bcm2835/Makefile.boot
index 2d30e17f5b69..b3271754e9fd 100644
--- a/arch/arm/mach-bcm2835/Makefile.boot
+++ b/arch/arm/mach-bcm2835/Makefile.boot
@@ -1,3 +1 @@
-   zreladdr-y := 0x00008000
+zreladdr-y := 0x00008000
-params_phys-y := 0x00000100
-initrd_phys-y := 0x00800000
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index f6fea4933571..53e3842c9330 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -30,12 +30,12 @@ static struct map_desc io_map __initdata = {
        .type = MT_DEVICE
 };
-void __init bcm2835_map_io(void)
+static void __init bcm2835_map_io(void)
 {
        iotable_init(&io_map, 1);
 }
-void __init bcm2835_init(void)
+static void __init bcm2835_init(void)
 {
        int ret;
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 1dbf85beed1b..9211e8800c79 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -194,7 +194,7 @@ static int evm_led_setup(struct i2c_client *client, int gpio,
        while (ngpio--) {
                leds->gpio = gpio++;
                leds++;
-        };
+        }
        evm_led_dev = platform_device_alloc("leds-gpio", 0);
        platform_device_add_data(evm_led_dev, &evm_led_data,
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index 64b0f65a8639..a794f6d9d444 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -87,8 +87,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
                iotable_init(davinci_soc_info.io_desc,
                                davinci_soc_info.io_desc_num);
-        init_consistent_dma_size(14 << 20);
        /*
         * Normally devicemaps_init() would flush caches and tlb after
         * mdesc->map_io(), but we must also do it here because of the CPU
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 9ab1f105cf00..11c79a3362ef 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -713,8 +713,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
                break;
        case VPBE_ENC_CUSTOM_TIMINGS:
                if (pclock <= 27000000) {
-                        v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
+                        v |= DM644X_VPSS_DACCLKEN;
-                             DM644X_VPSS_DACCLKEN;
                        writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
                } else {
                        /*
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index f77b95336e2b..34509ffba221 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -42,14 +42,8 @@ static struct musb_hdrc_config musb_config = {
 };
 static struct musb_hdrc_platform_data usb_data = {
-#if defined(CONFIG_USB_MUSB_OTG)
        /* OTG requires a Mini-AB connector */
        .mode           = MUSB_OTG,
-#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
-        .mode           = MUSB_PERIPHERAL,
-#elif defined(CONFIG_USB_MUSB_HOST)
-        .mode           = MUSB_HOST,
-#endif
        .clock          = "usb",
        .config         = &musb_config,
 };
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 1870bee991b6..efead60b9436 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -617,11 +617,6 @@ static struct clk exynos4_init_clocks_off[] = {
                .ctrlbit        = (1 << 18),
        }, {
                .name           = "iis",
-                .devname        = "samsung-i2s.0",
-                .enable         = exynos4_clk_ip_peril_ctrl,
-                .ctrlbit        = (1 << 19),
-        }, {
-                .name           = "iis",
                .devname        = "samsung-i2s.1",
                .enable         = exynos4_clk_ip_peril_ctrl,
                .ctrlbit        = (1 << 20),
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index f1e0386262a8..7652f5d78a56 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -297,7 +297,7 @@ static struct clksrc_sources exynos5_clk_src_mpll = {
        .nr_sources     = ARRAY_SIZE(exynos5_clk_src_mpll_list),
 };
-struct clksrc_clk exynos5_clk_mout_mpll = {
+static struct clksrc_clk exynos5_clk_mout_mpll = {
        .clk = {
                .name           = "mout_mpll",
        },
@@ -472,12 +472,12 @@ static struct clksrc_clk exynos5_clk_pclk_acp = {
 /* Core list of CMU_TOP side */
-struct clk *exynos5_clkset_aclk_top_list[] = {
+static struct clk *exynos5_clkset_aclk_top_list[] = {
        [0] = &exynos5_clk_mout_mpll_user.clk,
        [1] = &exynos5_clk_mout_bpll_user.clk,
 };
-struct clksrc_sources exynos5_clkset_aclk = {
+static struct clksrc_sources exynos5_clkset_aclk = {
        .sources        = exynos5_clkset_aclk_top_list,
        .nr_sources     = ARRAY_SIZE(exynos5_clkset_aclk_top_list),
 };
@@ -491,12 +491,12 @@ static struct clksrc_clk exynos5_clk_aclk_400 = {
        .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },
 };
-struct clk *exynos5_clkset_aclk_333_166_list[] = {
+static struct clk *exynos5_clkset_aclk_333_166_list[] = {
        [0] = &exynos5_clk_mout_cpll.clk,
        [1] = &exynos5_clk_mout_mpll_user.clk,
 };
-struct clksrc_sources exynos5_clkset_aclk_333_166 = {
+static struct clksrc_sources exynos5_clkset_aclk_333_166 = {
        .sources        = exynos5_clkset_aclk_333_166_list,
        .nr_sources     = ARRAY_SIZE(exynos5_clkset_aclk_333_166_list),
 };
@@ -981,7 +981,7 @@ static struct clk exynos5_clk_fimd1 = {
        .ctrlbit        = (1 << 0),
 };
-struct clk *exynos5_clkset_group_list[] = {
+static struct clk *exynos5_clkset_group_list[] = {
        [0] = &clk_ext_xtal_mux,
        [1] = NULL,
        [2] = &exynos5_clk_sclk_hdmi24m,
@@ -994,7 +994,7 @@ struct clk *exynos5_clkset_group_list[] = {
        [9] = &exynos5_clk_mout_cpll.clk,
 };
-struct clksrc_sources exynos5_clkset_group = {
+static struct clksrc_sources exynos5_clkset_group = {
        .sources        = exynos5_clkset_group_list,
        .nr_sources     = ARRAY_SIZE(exynos5_clkset_group_list),
 };
@@ -1210,7 +1210,7 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = {
        .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 },
 };
-struct clksrc_clk exynos5_clk_sclk_fimd1 = {
+static struct clksrc_clk exynos5_clk_sclk_fimd1 = {
        .clk    = {
                .name           = "sclk_fimd",
                .devname        = "exynos5-fb.1",
@@ -1491,7 +1491,7 @@ static void exynos5_clock_resume(void)
 #define exynos5_clock_resume NULL
 #endif
-struct syscore_ops exynos5_clock_syscore_ops = {
+static struct syscore_ops exynos5_clock_syscore_ops = {
        .suspend        = exynos5_clock_suspend,
        .resume         = exynos5_clock_resume,
 };
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 4af8284f3597..4e1dd8d1eda8 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -63,7 +63,7 @@ static void exynos4_map_io(void);
 static void exynos5_map_io(void);
 static void exynos4_init_clocks(int xtal);
 static void exynos5_init_clocks(int xtal);
-static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 static int exynos_init(void);
 static struct cpu_table cpu_ids[] __initdata = {
@@ -72,7 +72,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idmask         = EXYNOS4_CPU_MASK,
                .map_io         = exynos4_map_io,
                .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos_init_uarts,
+                .init_uarts     = exynos4_init_uarts,
                .init           = exynos_init,
                .name           = name_exynos4210,
        }, {
@@ -80,7 +80,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idmask         = EXYNOS4_CPU_MASK,
                .map_io         = exynos4_map_io,
                .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos_init_uarts,
+                .init_uarts     = exynos4_init_uarts,
                .init           = exynos_init,
                .name           = name_exynos4212,
        }, {
@@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idmask         = EXYNOS4_CPU_MASK,
                .map_io         = exynos4_map_io,
                .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos_init_uarts,
+                .init_uarts     = exynos4_init_uarts,
                .init           = exynos_init,
                .name           = name_exynos4412,
        }, {
@@ -96,7 +96,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idmask         = EXYNOS5_SOC_MASK,
                .map_io         = exynos5_map_io,
                .init_clocks    = exynos5_init_clocks,
-                .init_uarts     = exynos_init_uarts,
                .init           = exynos_init,
                .name           = name_exynos5250,
        },
@@ -257,25 +256,10 @@ static struct map_desc exynos5_iodesc[] __initdata = {
                .length         = SZ_64K,
                .type           = MT_DEVICE,
        }, {
-                .virtual        = (unsigned long)S5P_VA_COMBINER_BASE,
-                .pfn            = __phys_to_pfn(EXYNOS5_PA_COMBINER),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
                .virtual        = (unsigned long)S3C_VA_UART,
                .pfn            = __phys_to_pfn(EXYNOS5_PA_UART),
                .length         = SZ_512K,
                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GIC_CPU,
-                .pfn            = __phys_to_pfn(EXYNOS5_PA_GIC_CPU),
-                .length         = SZ_8K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GIC_DIST,
-                .pfn            = __phys_to_pfn(EXYNOS5_PA_GIC_DIST),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
        },
 };
@@ -354,23 +338,6 @@ static void __init exynos4_map_io(void)
 static void __init exynos5_map_io(void)
 {
        iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
-        s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0);
-        s3c_device_i2c0.resource[0].end   = EXYNOS5_PA_IIC(0) + SZ_4K - 1;
-        s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
-        s3c_device_i2c0.resource[1].end   = EXYNOS5_IRQ_IIC;
-        s3c_sdhci_setname(0, "exynos4-sdhci");
-        s3c_sdhci_setname(1, "exynos4-sdhci");
-        s3c_sdhci_setname(2, "exynos4-sdhci");
-        s3c_sdhci_setname(3, "exynos4-sdhci");
-        /* The I2C bus controllers are directly compatible with s3c2440 */
-        s3c_i2c0_setname("s3c2440-i2c");
-        s3c_i2c1_setname("s3c2440-i2c");
-        s3c_i2c2_setname("s3c2440-i2c");
-        s3c64xx_spi_setname("exynos4210-spi");
 }
 static void __init exynos4_init_clocks(int xtal)
@@ -589,7 +556,8 @@ static void __init combiner_init(void __iomem *combiner_base,
 }
 #ifdef CONFIG_OF
-int __init combiner_of_init(struct device_node *np, struct device_node *parent)
+static int __init combiner_of_init(struct device_node *np,
+                                   struct device_node *parent)
 {
        void __iomem *combiner_base;
@@ -727,7 +695,7 @@ static int __init exynos_init(void)
 /* uart registration process */
-static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
        struct s3c2410_uartcfg *tcfg = cfg;
        u32 ucnt;
@@ -735,10 +703,7 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
        for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
                tcfg->has_fracval = 1;
-        if (soc_is_exynos5250())
+        s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
-                s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no);
-        else
-                s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
 }
 static void __iomem *exynos_eint_base;
@@ -970,14 +935,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
        struct irq_chip *chip = irq_get_chip(irq);
        chained_irq_enter(chip, desc);
-        chip->irq_mask(&desc->irq_data);
-        if (chip->irq_ack)
-                chip->irq_ack(&desc->irq_data);
        generic_handle_irq(*irq_data);
-        chip->irq_unmask(&desc->irq_data);
        chained_irq_exit(chip, desc);
 }
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c
index ae321c7cb15f..a1cb42c39590 100644
--- a/arch/arm/mach-exynos/dev-audio.c
+++ b/arch/arm/mach-exynos/dev-audio.c
@@ -14,9 +14,9 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/gpio.h>
+#include <linux/platform_data/asoc-s3c.h>
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/asoc-s3c.h>
 #include <mach/map.h>
 #include <mach/dma.h>
diff --git a/arch/arm/mach-exynos/dev-ohci.c b/arch/arm/mach-exynos/dev-ohci.c
index 14ed7951a2c6..4244d02dafbd 100644
--- a/arch/arm/mach-exynos/dev-ohci.c
+++ b/arch/arm/mach-exynos/dev-ohci.c
@@ -12,10 +12,10 @@
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
+#include <linux/platform_data/usb-exynos.h>
 #include <mach/irqs.h>
 #include <mach/map.h>
-#include <linux/platform_data/usb-exynos.h>
 #include <plat/devs.h>
 #include <plat/usb-phy.h>
diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c
index 2e85c022fd16..7c42f4b7c8be 100644
--- a/arch/arm/mach-exynos/dev-uart.c
+++ b/arch/arm/mach-exynos/dev-uart.c
@@ -52,27 +52,3 @@ struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = {
                .nr_resources   = ARRAY_SIZE(exynos4_uart3_resource),
        },
 };
-EXYNOS_UART_RESOURCE(5, 0)
-EXYNOS_UART_RESOURCE(5, 1)
-EXYNOS_UART_RESOURCE(5, 2)
-EXYNOS_UART_RESOURCE(5, 3)
-struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = {
-        [0] = {
-                .resources      = exynos5_uart0_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart0_resource),
-        },
-        [1] = {
-                .resources      = exynos5_uart1_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart0_resource),
-        },
-        [2] = {
-                .resources      = exynos5_uart2_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart2_resource),
-        },
-        [3] = {
-                .resources      = exynos5_uart3_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart3_resource),
-        },
-};
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 21d568b3b149..87e07d6fc615 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -275,6 +275,9 @@ static int __init exynos_dma_init(void)
                exynos_pdma1_pdata.nr_valid_peri =
                        ARRAY_SIZE(exynos4210_pdma1_peri);
                exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
+                if (samsung_rev() == EXYNOS4210_REV_0)
+                        exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1;
        } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
                exynos_pdma0_pdata.nr_valid_peri =
                        ARRAY_SIZE(exynos4212_pdma0_peri);
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 5adacd12e43b..5d44616c2014 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -262,11 +262,6 @@
 #define EXYNOS5_IRQ_IEM_IEC             IRQ_SPI(48)
 #define EXYNOS5_IRQ_IEM_APC             IRQ_SPI(49)
 #define EXYNOS5_IRQ_GPIO_C2C            IRQ_SPI(50)
-#define EXYNOS5_IRQ_UART0               IRQ_SPI(51)
-#define EXYNOS5_IRQ_UART1               IRQ_SPI(52)
-#define EXYNOS5_IRQ_UART2               IRQ_SPI(53)
-#define EXYNOS5_IRQ_UART3               IRQ_SPI(54)
-#define EXYNOS5_IRQ_UART4               IRQ_SPI(55)
 #define EXYNOS5_IRQ_IIC                 IRQ_SPI(56)
 #define EXYNOS5_IRQ_IIC1                IRQ_SPI(57)
 #define EXYNOS5_IRQ_IIC2                IRQ_SPI(58)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 772acd344cbd..9f180aa3a848 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -92,6 +92,7 @@
 #define EXYNOS4_PA_MDMA0                0x10810000
 #define EXYNOS4_PA_MDMA1                0x12850000
+#define EXYNOS4_PA_S_MDMA1              0x12840000
 #define EXYNOS4_PA_PDMA0                0x12680000
 #define EXYNOS4_PA_PDMA1                0x12690000
 #define EXYNOS5_PA_MDMA0                0x10800000
@@ -281,7 +282,6 @@
 #define EXYNOS5_PA_UART1                0x12C10000
 #define EXYNOS5_PA_UART2                0x12C20000
 #define EXYNOS5_PA_UART3                0x12C30000
-#define EXYNOS5_SZ_UART                 SZ_256
 #define S3C_VA_UARTx(x)                 (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index d4e392b811a3..70b2795f5283 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -230,8 +230,6 @@
 /* For EXYNOS5 */
-#define EXYNOS5_USB_CFG                                         S5P_PMUREG(0x0230)
 #define EXYNOS5_AUTO_WDTRESET_DISABLE                           S5P_PMUREG(0x0408)
 #define EXYNOS5_MASK_WDTRESET_REQUEST                           S5P_PMUREG(0x040C)
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 94970602df61..27d4ed8b116e 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -25,7 +25,10 @@
 #include <linux/mmc/host.h>
 #include <linux/fb.h>
 #include <linux/pwm_backlight.h>
+#include <linux/platform_data/i2c-s3c2410.h>
+#include <linux/platform_data/mipi-csis.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/platform_data/usb-ehci-s5p.h>
 #include <drm/exynos_drm.h>
 #include <video/platform_lcd.h>
@@ -45,14 +48,11 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/sdhci.h>
-#include <linux/platform_data/usb-ehci-s5p.h>
 #include <plat/clock.h>
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/mfc.h>
 #include <plat/fimc-core.h>
 #include <plat/camport.h>
-#include <linux/platform_data/mipi-csis.h>
 #include <mach/map.h>
@@ -113,7 +113,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
        .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
                                MMC_CAP_ERASE),
-        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
        .cd_type                = S3C_SDHCI_CD_PERMANENT,
 };
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index d8dc6d7f0c00..c931ce15a966 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -23,7 +23,10 @@
 #include <linux/mfd/max8997.h>
 #include <linux/lcd.h>
 #include <linux/rfkill-gpio.h>
+#include <linux/platform_data/i2c-s3c2410.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/platform_data/usb-ehci-s5p.h>
+#include <linux/platform_data/usb-exynos.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
@@ -36,8 +39,6 @@
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/sdhci.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <linux/platform_data/usb-ehci-s5p.h>
 #include <plat/clock.h>
 #include <plat/gpio-cfg.h>
 #include <plat/backlight.h>
@@ -45,7 +46,6 @@
 #include <plat/mfc.h>
 #include <plat/hdmi.h>
-#include <linux/platform_data/usb-exynos.h>
 #include <mach/map.h>
 #include <drm/exynos_drm.h>
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index 17b9ca48722e..a1555a73c7af 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -21,6 +21,7 @@
 #include <linux/pwm_backlight.h>
 #include <linux/regulator/machine.h>
 #include <linux/serial_core.h>
+#include <linux/platform_data/i2c-s3c2410.h>
 #include <linux/platform_data/s3c-hsotg.h>
 #include <asm/mach/arch.h>
@@ -34,7 +35,6 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/keypad.h>
 #include <plat/mfc.h>
 #include <plat/regs-serial.h>
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index 4f0ac5397ba3..063cb94b934d 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -20,7 +20,10 @@
 #include <linux/input.h>
 #include <linux/pwm.h>
 #include <linux/pwm_backlight.h>
+#include <linux/platform_data/i2c-s3c2410.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/platform_data/usb-ehci-s5p.h>
+#include <linux/platform_data/usb-exynos.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
@@ -35,16 +38,13 @@
 #include <plat/fb.h>
 #include <plat/keypad.h>
 #include <plat/sdhci.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/gpio-cfg.h>
 #include <plat/backlight.h>
 #include <plat/mfc.h>
-#include <linux/platform_data/usb-ehci-s5p.h>
 #include <plat/clock.h>
 #include <plat/hdmi.h>
 #include <mach/map.h>
-#include <linux/platform_data/usb-exynos.h>
 #include <drm/exynos_drm.h>
 #include "common.h"
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index cfdf876a8626..9e3340f18950 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -23,6 +23,8 @@
 #include <linux/i2c-gpio.h>
 #include <linux/i2c/mcs.h>
 #include <linux/i2c/atmel_mxt_ts.h>
+#include <linux/platform_data/i2c-s3c2410.h>
+#include <linux/platform_data/mipi-csis.h>
 #include <linux/platform_data/s3c-hsotg.h>
 #include <drm/exynos_drm.h>
@@ -35,7 +37,6 @@
 #include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/gpio-cfg.h>
 #include <plat/fb.h>
 #include <plat/mfc.h>
@@ -43,7 +44,6 @@
 #include <plat/fimc-core.h>
 #include <plat/s5p-time.h>
 #include <plat/camport.h>
-#include <linux/platform_data/mipi-csis.h>
 #include <mach/map.h>
@@ -754,7 +754,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
        .max_width              = 8,
        .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
-        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
        .cd_type                = S3C_SDHCI_CD_PERMANENT,
 };
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index 350e26636a06..abeff25532ab 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -8,6 +8,7 @@ config ARCH_INTEGRATOR_AP
        select MIGHT_HAVE_PCI
        select SERIAL_AMBA_PL010
        select SERIAL_AMBA_PL010_CONSOLE
+        select SOC_BUS
        help
          Include support for the ARM(R) Integrator/AP and
          Integrator/PP2 platforms.
@@ -19,6 +20,7 @@ config ARCH_INTEGRATOR_CP
        select PLAT_VERSATILE_CLCD
        select SERIAL_AMBA_PL011
        select SERIAL_AMBA_PL011_CONSOLE
+        select SOC_BUS
        help
          Include support for the ARM(R) Integrator CP platform.
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index c3ff21b5ea24..79197d8b34aa 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,6 +1,12 @@
 #include <linux/amba/serial.h>
-extern struct amba_pl010_data integrator_uart_data;
+#ifdef CONFIG_ARCH_INTEGRATOR_AP
+extern struct amba_pl010_data ap_uart_data;
+#else
+/* Not used without Integrator/AP support anyway */
+struct amba_pl010_data ap_uart_data {};
+#endif
 void integrator_init_early(void);
 int integrator_init(bool is_cp);
 void integrator_reserve(void);
 void integrator_restart(char, const char *);
+void integrator_init_sysfs(struct device *parent, u32 id);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index ea22a17246d7..39c060f75e47 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -18,10 +18,10 @@
 #include <linux/memblock.h>
 #include <linux/sched.h>
 #include <linux/smp.h>
-#include <linux/termios.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
 #include <linux/io.h>
+#include <linux/stat.h>
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -46,10 +46,10 @@ static AMBA_APB_DEVICE(rtc, "rtc", 0,
        INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
 static AMBA_APB_DEVICE(uart0, "uart0", 0,
-        INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data);
+        INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, NULL);
 static AMBA_APB_DEVICE(uart1, "uart1", 0,
-        INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data);
+        INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, NULL);
 static AMBA_APB_DEVICE(kmi0, "kmi0", 0, KMI0_BASE, KMI0_IRQ, NULL);
 static AMBA_APB_DEVICE(kmi1, "kmi1", 0, KMI1_BASE, KMI1_IRQ, NULL);
@@ -77,6 +77,8 @@ int __init integrator_init(bool is_cp)
                uart1_device.periphid   = 0x00041010;
                kmi0_device.periphid    = 0x00041050;
                kmi1_device.periphid    = 0x00041050;
+                uart0_device.dev.platform_data = &ap_uart_data;
+                uart1_device.dev.platform_data = &ap_uart_data;
        }
        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
@@ -89,49 +91,6 @@ int __init integrator_init(bool is_cp)
 #endif
-/*
- * On the Integrator platform, the port RTS and DTR are provided by
- * bits in the following SC_CTRLS register bits:
- *        RTS  DTR
- *  UART0  7    6
- *  UART1  5    4
- */
-#define SC_CTRLC        __io_address(INTEGRATOR_SC_CTRLC)
-#define SC_CTRLS        __io_address(INTEGRATOR_SC_CTRLS)
-static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
-{
-        unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
-        u32 phybase = dev->res.start;
-        if (phybase == INTEGRATOR_UART0_BASE) {
-                /* UART0 */
-                rts_mask = 1 << 4;
-                dtr_mask = 1 << 5;
-        } else {
-                /* UART1 */
-                rts_mask = 1 << 6;
-                dtr_mask = 1 << 7;
-        }
-        if (mctrl & TIOCM_RTS)
-                ctrlc |= rts_mask;
-        else
-                ctrls |= rts_mask;
-        if (mctrl & TIOCM_DTR)
-                ctrlc |= dtr_mask;
-        else
-                ctrls |= dtr_mask;
-        __raw_writel(ctrls, SC_CTRLS);
-        __raw_writel(ctrlc, SC_CTRLC);
-}
-struct amba_pl010_data integrator_uart_data = {
-        .set_mctrl = integrator_uart_set_mctrl,
-};
 static DEFINE_RAW_SPINLOCK(cm_lock);
 /**
@@ -169,3 +128,93 @@ void integrator_restart(char mode, const char *cmd)
 {
        cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
 }
+static u32 integrator_id;
+static ssize_t intcp_get_manf(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+        return sprintf(buf, "%02x\n", integrator_id >> 24);
+}
+static struct device_attribute intcp_manf_attr =
+        __ATTR(manufacturer,  S_IRUGO, intcp_get_manf,  NULL);
+static ssize_t intcp_get_arch(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+        const char *arch;
+        switch ((integrator_id >> 16) & 0xff) {
+        case 0x00:
+                arch = "ASB little-endian";
+                break;
+        case 0x01:
+                arch = "AHB little-endian";
+                break;
+        case 0x03:
+                arch = "AHB-Lite system bus, bi-endian";
+                break;
+        case 0x04:
+                arch = "AHB";
+                break;
+        default:
+                arch = "Unknown";
+                break;
+        }
+        return sprintf(buf, "%s\n", arch);
+}
+static struct device_attribute intcp_arch_attr =
+        __ATTR(architecture,  S_IRUGO, intcp_get_arch,  NULL);
+static ssize_t intcp_get_fpga(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+        const char *fpga;
+        switch ((integrator_id >> 12) & 0xf) {
+        case 0x01:
+                fpga = "XC4062";
+                break;
+        case 0x02:
+                fpga = "XC4085";
+                break;
+        case 0x04:
+                fpga = "EPM7256AE (Altera PLD)";
+                break;
+        default:
+                fpga = "Unknown";
+                break;
+        }
+        return sprintf(buf, "%s\n", fpga);
+}
+static struct device_attribute intcp_fpga_attr =
+        __ATTR(fpga,  S_IRUGO, intcp_get_fpga,  NULL);
+static ssize_t intcp_get_build(struct device *dev,
+                               struct device_attribute *attr,
+                               char *buf)
+{
+        return sprintf(buf, "%02x\n", (integrator_id >> 4) & 0xFF);
+}
+static struct device_attribute intcp_build_attr =
+        __ATTR(build,  S_IRUGO, intcp_get_build,  NULL);
+void integrator_init_sysfs(struct device *parent, u32 id)
+{
+        integrator_id = id;
+        device_create_file(parent, &intcp_manf_attr);
+        device_create_file(parent, &intcp_arch_attr);
+        device_create_file(parent, &intcp_fpga_attr);
+        device_create_file(parent, &intcp_build_attr);
+}
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index efeac5d0bc9e..be5859efe10e 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -190,7 +190,6 @@
 #define INTEGRATOR_SC_CTRLC_OFFSET      0x0C
 #define INTEGRATOR_SC_DEC_OFFSET        0x10
 #define INTEGRATOR_SC_ARB_OFFSET        0x14
-#define INTEGRATOR_SC_PCIENABLE_OFFSET  0x18
 #define INTEGRATOR_SC_LOCK_OFFSET       0x1C
 #define INTEGRATOR_SC_BASE              0x11000000
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index e6617c134faf..a0a7cbbb7a70 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -37,6 +37,9 @@
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
+#include <linux/stat.h>
+#include <linux/sys_soc.h>
+#include <linux/termios.h>
 #include <video/vga.h>
 #include <mach/hardware.h>
@@ -60,7 +63,10 @@
 #include "common.h"
-/* 
+/* Base address to the AP system controller */
+void __iomem *ap_syscon_base;
+/*
 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
 * is the (PA >> 12).
 *
@@ -68,7 +74,6 @@
 * just for now).
 */
 #define VA_IC_BASE      __io_address(INTEGRATOR_IC_BASE)
-#define VA_SC_BASE      __io_address(INTEGRATOR_SC_BASE)
 #define VA_EBI_BASE     __io_address(INTEGRATOR_EBI_BASE)
 #define VA_CMIC_BASE    __io_address(INTEGRATOR_HDR_IC)
@@ -97,11 +102,6 @@ static struct map_desc ap_io_desc[] __initdata = {
                .length         = SZ_4K,
                .type           = MT_DEVICE
        }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_SC_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_SC_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                .virtual        = IO_ADDRESS(INTEGRATOR_EBI_BASE),
                .pfn            = __phys_to_pfn(INTEGRATOR_EBI_BASE),
                .length         = SZ_4K,
@@ -122,11 +122,6 @@ static struct map_desc ap_io_desc[] __initdata = {
                .length         = SZ_4K,
                .type           = MT_DEVICE
        }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_UART1_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_UART1_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                .virtual        = IO_ADDRESS(INTEGRATOR_DBG_BASE),
                .pfn            = __phys_to_pfn(INTEGRATOR_DBG_BASE),
                .length         = SZ_4K,
@@ -201,8 +196,6 @@ device_initcall(irq_syscore_init);
 /*
 * Flash handling.
 */
-#define SC_CTRLC (VA_SC_BASE + INTEGRATOR_SC_CTRLC_OFFSET)
-#define SC_CTRLS (VA_SC_BASE + INTEGRATOR_SC_CTRLS_OFFSET)
 #define EBI_CSR1 (VA_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET)
 #define EBI_LOCK (VA_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET)
@@ -210,7 +203,8 @@ static int ap_flash_init(struct platform_device *dev)
 {
        u32 tmp;
-        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
+        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP,
+               ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
        tmp = readl(EBI_CSR1) | INTEGRATOR_EBI_WRITE_ENABLE;
        writel(tmp, EBI_CSR1);
@@ -227,7 +221,8 @@ static void ap_flash_exit(struct platform_device *dev)
 {
        u32 tmp;
-        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
+        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP,
+               ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
        tmp = readl(EBI_CSR1) & ~INTEGRATOR_EBI_WRITE_ENABLE;
        writel(tmp, EBI_CSR1);
@@ -241,9 +236,12 @@ static void ap_flash_exit(struct platform_device *dev)
 static void ap_flash_set_vpp(struct platform_device *pdev, int on)
 {
-        void __iomem *reg = on ? SC_CTRLS : SC_CTRLC;
+        if (on)
+                writel(INTEGRATOR_SC_CTRL_nFLVPPEN,
-        writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg);
+                       ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET);
+        else
+                writel(INTEGRATOR_SC_CTRL_nFLVPPEN,
+                       ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
 }
 static struct physmap_flash_data ap_flash_data = {
@@ -254,6 +252,45 @@ static struct physmap_flash_data ap_flash_data = {
 };
 /*
+ * For the PL010 found in the Integrator/AP some of the UART control is
+ * implemented in the system controller and accessed using a callback
+ * from the driver.
+ */
+static void integrator_uart_set_mctrl(struct amba_device *dev,
+                                void __iomem *base, unsigned int mctrl)
+{
+        unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
+        u32 phybase = dev->res.start;
+        if (phybase == INTEGRATOR_UART0_BASE) {
+                /* UART0 */
+                rts_mask = 1 << 4;
+                dtr_mask = 1 << 5;
+        } else {
+                /* UART1 */
+                rts_mask = 1 << 6;
+                dtr_mask = 1 << 7;
+        }
+        if (mctrl & TIOCM_RTS)
+                ctrlc |= rts_mask;
+        else
+                ctrls |= rts_mask;
+        if (mctrl & TIOCM_DTR)
+                ctrlc |= dtr_mask;
+        else
+                ctrls |= dtr_mask;
+        __raw_writel(ctrls, ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET);
+        __raw_writel(ctrlc, ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
+}
+struct amba_pl010_data ap_uart_data = {
+        .set_mctrl = integrator_uart_set_mctrl,
+};
+/*
 * Where is the timer (VA)?
 */
 #define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
@@ -450,9 +487,9 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
                "rtc", NULL),
        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
-                "uart0", &integrator_uart_data),
+                "uart0", &ap_uart_data),
        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
-                "uart1", &integrator_uart_data),
+                "uart1", &ap_uart_data),
        OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
                "kmi0", NULL),
        OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
@@ -465,12 +502,60 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
 static void __init ap_init_of(void)
 {
        unsigned long sc_dec;
+        struct device_node *root;
+        struct device_node *syscon;
+        struct device *parent;
+        struct soc_device *soc_dev;
+        struct soc_device_attribute *soc_dev_attr;
+        u32 ap_sc_id;
+        int err;
        int i;
-        of_platform_populate(NULL, of_default_bus_match_table,
+        /* Here we create an SoC device for the root node */
-                        ap_auxdata_lookup, NULL);
+        root = of_find_node_by_path("/");
+        if (!root)
+                return;
+        syscon = of_find_node_by_path("/syscon");
+        if (!syscon)
+                return;
+        ap_syscon_base = of_iomap(syscon, 0);
+        if (!ap_syscon_base)
+                return;
-        sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
+        ap_sc_id = readl(ap_syscon_base);
+        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+        if (!soc_dev_attr)
+                return;
+        err = of_property_read_string(root, "compatible",
+                                      &soc_dev_attr->soc_id);
+        if (err)
+                return;
+        err = of_property_read_string(root, "model", &soc_dev_attr->machine);
+        if (err)
+                return;
+        soc_dev_attr->family = "Integrator";
+        soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
+                                           'A' + (ap_sc_id & 0x0f));
+        soc_dev = soc_device_register(soc_dev_attr);
+        if (IS_ERR_OR_NULL(soc_dev)) {
+                kfree(soc_dev_attr->revision);
+                kfree(soc_dev_attr);
+                return;
+        }
+        parent = soc_device_to_device(soc_dev);
+        if (!IS_ERR_OR_NULL(parent))
+                integrator_init_sysfs(parent, ap_sc_id);
+        of_platform_populate(root, of_default_bus_match_table,
+                        ap_auxdata_lookup, parent);
+        sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
        for (i = 0; i < 4; i++) {
                struct lm_device *lmdev;
@@ -514,6 +599,27 @@ MACHINE_END
 #ifdef CONFIG_ATAGS
 /*
+ * For the ATAG boot some static mappings are needed. This will
+ * go away with the ATAG support down the road.
+ */
+static struct map_desc ap_io_desc_atag[] __initdata = {
+        {
+                .virtual        = IO_ADDRESS(INTEGRATOR_SC_BASE),
+                .pfn            = __phys_to_pfn(INTEGRATOR_SC_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE
+        },
+};
+static void __init ap_map_io_atag(void)
+{
+        iotable_init(ap_io_desc_atag, ARRAY_SIZE(ap_io_desc_atag));
+        ap_syscon_base = __io_address(INTEGRATOR_SC_BASE);
+        ap_map_io();
+}
+/*
 * This is where non-devicetree initialization code is collected and stashed
 * for eventual deletion.
 */
@@ -581,7 +687,7 @@ static void __init ap_init(void)
        platform_device_register(&cfi_flash_device);
-        sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
+        sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
        for (i = 0; i < 4; i++) {
                struct lm_device *lmdev;
@@ -608,7 +714,7 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
        /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
        .atag_offset    = 0x100,
        .reserve        = integrator_reserve,
-        .map_io         = ap_map_io,
+        .map_io         = ap_map_io_atag,
        .nr_irqs        = NR_IRQS_INTEGRATOR_AP,
        .init_early     = ap_init_early,
        .init_irq       = ap_init_irq,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5b08e8e4cc83..29df06b35d0d 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -26,6 +26,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
+#include <linux/sys_soc.h>
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -51,11 +52,13 @@
 #include "common.h"
+/* Base address to the CP controller */
+static void __iomem *intcp_con_base;
 #define INTCP_PA_FLASH_BASE             0x24000000
 #define INTCP_PA_CLCD_BASE              0xc0000000
-#define INTCP_VA_CTRL_BASE              __io_address(INTEGRATOR_CP_CTL_BASE)
 #define INTCP_FLASHPROG                 0x04
 #define CINTEGRATOR_FLASHPROG_FLVPPEN   (1 << 0)
 #define CINTEGRATOR_FLASHPROG_FLWREN    (1 << 1)
@@ -82,11 +85,6 @@ static struct map_desc intcp_io_desc[] __initdata = {
                .length         = SZ_4K,
                .type           = MT_DEVICE
        }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_SC_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_SC_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                .virtual        = IO_ADDRESS(INTEGRATOR_EBI_BASE),
                .pfn            = __phys_to_pfn(INTEGRATOR_EBI_BASE),
                .length         = SZ_4K,
@@ -107,11 +105,6 @@ static struct map_desc intcp_io_desc[] __initdata = {
                .length         = SZ_4K,
                .type           = MT_DEVICE
        }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_UART1_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_UART1_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                .virtual        = IO_ADDRESS(INTEGRATOR_DBG_BASE),
                .pfn            = __phys_to_pfn(INTEGRATOR_DBG_BASE),
                .length         = SZ_4K,
@@ -126,11 +119,6 @@ static struct map_desc intcp_io_desc[] __initdata = {
                .pfn            = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE),
                .length         = SZ_4K,
                .type           = MT_DEVICE
-        }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_CP_CTL_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_CP_CTL_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
        }
 };
@@ -146,9 +134,9 @@ static int intcp_flash_init(struct platform_device *dev)
 {
        u32 val;
-        val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        val = readl(intcp_con_base + INTCP_FLASHPROG);
        val |= CINTEGRATOR_FLASHPROG_FLWREN;
-        writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        writel(val, intcp_con_base + INTCP_FLASHPROG);
        return 0;
 }
@@ -157,21 +145,21 @@ static void intcp_flash_exit(struct platform_device *dev)
 {
        u32 val;
-        val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        val = readl(intcp_con_base + INTCP_FLASHPROG);
        val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN);
-        writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        writel(val, intcp_con_base + INTCP_FLASHPROG);
 }
 static void intcp_flash_set_vpp(struct platform_device *pdev, int on)
 {
        u32 val;
-        val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        val = readl(intcp_con_base + INTCP_FLASHPROG);
        if (on)
                val |= CINTEGRATOR_FLASHPROG_FLVPPEN;
        else
                val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN;
-        writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        writel(val, intcp_con_base + INTCP_FLASHPROG);
 }
 static struct physmap_flash_data intcp_flash_data = {
@@ -190,7 +178,7 @@ static struct physmap_flash_data intcp_flash_data = {
 static unsigned int mmc_status(struct device *dev)
 {
        unsigned int status = readl(__io_address(0xca000000 + 4));
-        writel(8, __io_address(INTEGRATOR_CP_CTL_BASE + 8));
+        writel(8, intcp_con_base + 8);
        return status & 8;
 }
@@ -318,9 +306,9 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
                "rtc", NULL),
        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
-                "uart0", &integrator_uart_data),
+                "uart0", NULL),
        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
-                "uart1", &integrator_uart_data),
+                "uart1", NULL),
        OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
                "kmi0", NULL),
        OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
@@ -338,8 +326,57 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
 static void __init intcp_init_of(void)
 {
-        of_platform_populate(NULL, of_default_bus_match_table,
+        struct device_node *root;
-                        intcp_auxdata_lookup, NULL);
+        struct device_node *cpcon;
+        struct device *parent;
+        struct soc_device *soc_dev;
+        struct soc_device_attribute *soc_dev_attr;
+        u32 intcp_sc_id;
+        int err;
+        /* Here we create an SoC device for the root node */
+        root = of_find_node_by_path("/");
+        if (!root)
+                return;
+        cpcon = of_find_node_by_path("/cpcon");
+        if (!cpcon)
+                return;
+        intcp_con_base = of_iomap(cpcon, 0);
+        if (!intcp_con_base)
+                return;
+        intcp_sc_id = readl(intcp_con_base);
+        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+        if (!soc_dev_attr)
+                return;
+        err = of_property_read_string(root, "compatible",
+                                      &soc_dev_attr->soc_id);
+        if (err)
+                return;
+        err = of_property_read_string(root, "model", &soc_dev_attr->machine);
+        if (err)
+                return;
+        soc_dev_attr->family = "Integrator";
+        soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
+                                           'A' + (intcp_sc_id & 0x0f));
+        soc_dev = soc_device_register(soc_dev_attr);
+        if (IS_ERR_OR_NULL(soc_dev)) {
+                kfree(soc_dev_attr->revision);
+                kfree(soc_dev_attr);
+                return;
+        }
+        parent = soc_device_to_device(soc_dev);
+        if (!IS_ERR_OR_NULL(parent))
+                integrator_init_sysfs(parent, intcp_sc_id);
+        of_platform_populate(root, of_default_bus_match_table,
+                        intcp_auxdata_lookup, parent);
 }
 static const char * intcp_dt_board_compat[] = {
@@ -365,6 +402,28 @@ MACHINE_END
 #ifdef CONFIG_ATAGS
 /*
+ * For the ATAG boot some static mappings are needed. This will
+ * go away with the ATAG support down the road.
+ */
+static struct map_desc intcp_io_desc_atag[] __initdata = {
+        {
+                .virtual        = IO_ADDRESS(INTEGRATOR_CP_CTL_BASE),
+                .pfn            = __phys_to_pfn(INTEGRATOR_CP_CTL_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE
+        },
+};
+static void __init intcp_map_io_atag(void)
+{
+        iotable_init(intcp_io_desc_atag, ARRAY_SIZE(intcp_io_desc_atag));
+        intcp_con_base = __io_address(INTEGRATOR_CP_CTL_BASE);
+        intcp_map_io();
+}
+/*
 * This is where non-devicetree initialization code is collected and stashed
 * for eventual deletion.
 */
@@ -503,7 +562,7 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
        /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
        .atag_offset    = 0x100,
        .reserve        = integrator_reserve,
-        .map_io         = intcp_map_io,
+        .map_io         = intcp_map_io_atag,
        .nr_irqs        = NR_IRQS_INTEGRATOR_CP,
        .init_early     = intcp_init_early,
        .init_irq       = intcp_init_irq,
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index bbeca59df66b..be50e795536d 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -191,12 +191,9 @@ static void __iomem *v3_open_config_window(struct pci_bus *bus,
        /*
         * Trap out illegal values
         */
-        if (offset > 255)
+        BUG_ON(offset > 255);
-                BUG();
+        BUG_ON(busnr > 255);
-        if (busnr > 255)
+        BUG_ON(devfn > 255);
-                BUG();
-        if (devfn > 255)
-                BUG();
        if (busnr == 0) {
                int slot = PCI_SLOT(devfn);
@@ -388,9 +385,10 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
 * means I can't get additional information on the reason for the pm2fb
 * problems.  I suppose I'll just have to mind-meld with the machine. ;)
 */
-#define SC_PCI     __io_address(INTEGRATOR_SC_PCIENABLE)
+static void __iomem *ap_syscon_base;
-#define SC_LBFADDR __io_address(INTEGRATOR_SC_BASE + 0x20)
+#define INTEGRATOR_SC_PCIENABLE_OFFSET  0x18
-#define SC_LBFCODE __io_address(INTEGRATOR_SC_BASE + 0x24)
+#define INTEGRATOR_SC_LBFADDR_OFFSET    0x20
+#define INTEGRATOR_SC_LBFCODE_OFFSET    0x24
 static int
 v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
@@ -401,13 +399,13 @@ v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
        char buf[128];
        sprintf(buf, "V3 fault: addr 0x%08lx, FSR 0x%03x, PC 0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n",
-                addr, fsr, pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255,
+                addr, fsr, pc, instr, __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFADDR_OFFSET), __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFCODE_OFFSET) & 255,
                v3_readb(V3_LB_ISTAT));
        printk(KERN_DEBUG "%s", buf);
 #endif
        v3_writeb(V3_LB_ISTAT, 0);
-        __raw_writel(3, SC_PCI);
+        __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET);
        /*
         * If the instruction being executed was a read,
@@ -449,15 +447,15 @@ static irqreturn_t v3_irq(int dummy, void *devid)
        sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x "
                "ISTAT=%02x\n", IRQ_AP_V3INT, pc, instr,
-                __raw_readl(SC_LBFADDR),
+                __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFADDR_OFFSET),
-                __raw_readl(SC_LBFCODE) & 255,
+                __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFCODE_OFFSET) & 255,
                v3_readb(V3_LB_ISTAT));
        printascii(buf);
 #endif
        v3_writew(V3_PCI_STAT, 0xf000);
        v3_writeb(V3_LB_ISTAT, 0);
-        __raw_writel(3, SC_PCI);
+        __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET);
 #ifdef CONFIG_DEBUG_LL
        /*
@@ -480,6 +478,10 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
        if (nr == 0) {
                sys->mem_offset = PHYS_PCI_MEM_BASE;
                ret = pci_v3_setup_resources(sys);
+                /* Remap the Integrator system controller */
+                ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100);
+                if (!ap_syscon_base)
+                        return -EINVAL;
        }
        return ret;
@@ -568,7 +570,7 @@ void __init pci_v3_preinit(void)
        v3_writeb(V3_LB_ISTAT, 0);
        v3_writew(V3_LB_CFG, v3_readw(V3_LB_CFG) | (1 << 10));
        v3_writeb(V3_LB_IMASK, 0x28);
-        __raw_writel(3, SC_PCI);
+        __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET);
        /*
         * Grab the PCI error interrupt.
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c
index cdeb9d3ef640..bde7a35e5000 100644
--- a/arch/arm/mach-omap1/timer.c
+++ b/arch/arm/mach-omap1/timer.c
@@ -25,6 +25,7 @@
 #include <linux/err.h>
 #include <linux/slab.h>
 #include <linux/platform_device.h>
+#include <linux/platform_data/dmtimer-omap.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 89368195bf08..41152fadd4c0 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -51,7 +51,6 @@
 #include <asm/mach/time.h>
 #include <plat/counter-32k.h>
-#include <plat/dmtimer.h>
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 78cbb8c5992e..dd76ff77760b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -73,6 +73,8 @@ obj-$(CONFIG_ARCH_OMAP4)		+= opp4xxx_data.o
 endif
 # Power Management
+obj-$(CONFIG_OMAP_PM_NOOP)              += omap-pm-noop.o
 ifeq ($(CONFIG_PM),y)
 obj-$(CONFIG_ARCH_OMAP2)                += pm24xx.o
 obj-$(CONFIG_ARCH_OMAP2)                += sleep24xx.o
@@ -80,7 +82,6 @@ obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o
 obj-$(CONFIG_ARCH_OMAP4)                += pm44xx.o omap-mpuss-lowpower.o
 obj-$(CONFIG_SOC_OMAP5)                 += omap-mpuss-lowpower.o
 obj-$(CONFIG_PM_DEBUG)                  += pm-debug.o
-obj-$(CONFIG_OMAP_PM_NOOP)              += omap-pm-noop.o
 obj-$(CONFIG_POWER_AVS_OMAP)            += sr_device.o
 obj-$(CONFIG_POWER_AVS_OMAP_CLASS3)    += smartreflex-class3.o
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 699caec8f9e2..ebbc2adb499e 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -297,6 +297,6 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
        .handle_irq     = omap3_intc_handle_irq,
        .init_machine   = cm_t3517_init,
        .init_late      = am35xx_init_late,
-        .timer          = &omap3_timer,
+        .timer          = &omap3_gp_timer,
        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index cea5d5292628..0f24cb84ba5a 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -579,6 +579,11 @@ static void __init igep_wlan_bt_init(void)
        } else
                return;
+        /* Make sure that the GPIO pins are muxed correctly */
+        omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT);
+        omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT);
+        omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT);
        err = gpio_request_array(igep_wlan_bt_gpios,
                                 ARRAY_SIZE(igep_wlan_bt_gpios));
        if (err) {
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 140b73094aff..c8fde3e56441 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -45,7 +45,6 @@
 #include <asm/mach/flash.h>
 #include <asm/mach/map.h>
-#include "common.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 #include <video/omap-panel-tfp410.h>
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index ad856092c06a..d246efd9f734 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -63,30 +63,36 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
        struct spi_board_info *spi_bi = &ads7846_spi_board_info;
        int err;
-        err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
+        /*
-        if (err) {
+         * If a board defines get_pendown_state() function, request the pendown
-                pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
+         * GPIO and set the GPIO debounce time.
-                return;
+         * If a board does not define the get_pendown_state() function, then
-        }
+         * the ads7846 driver will setup the pendown GPIO itself.
+         */
+        if (board_pdata && board_pdata->get_pendown_state) {
+                err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
+                if (err) {
+                        pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
+                        return;
+                }
+                if (gpio_debounce)
+                        gpio_set_debounce(gpio_pendown, gpio_debounce);
-        if (gpio_debounce)
+                gpio_export(gpio_pendown, 0);
-                gpio_set_debounce(gpio_pendown, gpio_debounce);
+        }
        spi_bi->bus_num = bus_num;
        spi_bi->irq     = gpio_to_irq(gpio_pendown);
+        ads7846_config.gpio_pendown = gpio_pendown;
        if (board_pdata) {
                board_pdata->gpio_pendown = gpio_pendown;
+                board_pdata->gpio_pendown_debounce = gpio_debounce;
                spi_bi->platform_data = board_pdata;
-                if (board_pdata->get_pendown_state)
-                        gpio_export(gpio_pendown, 0);
-        } else {
-                ads7846_config.gpio_pendown = gpio_pendown;
        }
-        if (!board_pdata || (board_pdata && !board_pdata->get_pendown_state))
-                gpio_free(gpio_pendown);
        spi_register_board_info(&ads7846_spi_board_info, 1);
 }
 #else
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 08c586451f93..3bbcde87dead 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -82,6 +82,7 @@ extern void omap2_init_common_infrastructure(void);
 extern struct sys_timer omap2_timer;
 extern struct sys_timer omap3_timer;
 extern struct sys_timer omap3_secure_timer;
+extern struct sys_timer omap3_gp_timer;
 extern struct sys_timer omap3_am33xx_timer;
 extern struct sys_timer omap4_timer;
 extern struct sys_timer omap5_timer;
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index f1e121502789..45cc7ed4dd58 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -28,6 +28,9 @@
 #include "soc.h"
 #include "control.h"
+#define OMAP4_SILICON_TYPE_STANDARD             0x01
+#define OMAP4_SILICON_TYPE_PERFORMANCE          0x02
 static unsigned int omap_revision;
 static const char *cpu_rev;
 u32 omap_features;
@@ -273,25 +276,11 @@ void __init omap4xxx_check_features(void)
 {
        u32 si_type;
-        if (cpu_is_omap443x())
+        si_type =
-                omap_features |= OMAP4_HAS_MPU_1GHZ;
+        (read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1) >> 16) & 0x03;
-        if (cpu_is_omap446x()) {
+        if (si_type == OMAP4_SILICON_TYPE_PERFORMANCE)
-                si_type =
+                omap_features = OMAP4_HAS_PERF_SILICON;
-                        read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1);
-                switch ((si_type & (3 << 16)) >> 16) {
-                case 2:
-                        /* High performance device */
-                        omap_features |= OMAP4_HAS_MPU_1_5GHZ;
-                        break;
-                case 1:
-                default:
-                        /* Standard device */
-                        omap_features |= OMAP4_HAS_MPU_1_2GHZ;
-                        break;
-                }
-        }
 }
 void __init ti81xx_check_features(void)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a8b3368dca3d..e8efe3d1da6c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -17,7 +17,6 @@
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <plat-omap/dma-omap.h>
-#include <plat/dmtimer.h>
 #include "omap_hwmod.h"
 #include "l3_2xxx.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index dc768c50e523..32d17e3fd727 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -18,7 +18,6 @@
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <plat-omap/dma-omap.h>
-#include <plat/dmtimer.h>
 #include "omap_hwmod.h"
 #include "mmc.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index a0116d08cf45..0db8f450bad9 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -58,8 +58,9 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
        .syss_offs      = 0x0014,
        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE),
+                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .clockact       = CLOCKACT_TEST_ICLK,
        .sysc_fields    = &omap_hwmod_sysc_type1,
 };
@@ -268,6 +269,7 @@ struct omap_hwmod omap2xxx_timer1_hwmod = {
        },
        .dev_attr       = &capability_alwon_dev_attr,
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer2 */
@@ -286,6 +288,7 @@ struct omap_hwmod omap2xxx_timer2_hwmod = {
                },
        },
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer3 */
@@ -304,6 +307,7 @@ struct omap_hwmod omap2xxx_timer3_hwmod = {
                },
        },
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer4 */
@@ -322,6 +326,7 @@ struct omap_hwmod omap2xxx_timer4_hwmod = {
                },
        },
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer5 */
@@ -341,6 +346,7 @@ struct omap_hwmod omap2xxx_timer5_hwmod = {
        },
        .dev_attr       = &capability_dsp_dev_attr,
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer6 */
@@ -360,6 +366,7 @@ struct omap_hwmod omap2xxx_timer6_hwmod = {
        },
        .dev_attr       = &capability_dsp_dev_attr,
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer7 */
@@ -379,6 +386,7 @@ struct omap_hwmod omap2xxx_timer7_hwmod = {
        },
        .dev_attr       = &capability_dsp_dev_attr,
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer8 */
@@ -398,6 +406,7 @@ struct omap_hwmod omap2xxx_timer8_hwmod = {
        },
        .dev_attr       = &capability_dsp_dev_attr,
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer9 */
@@ -417,6 +426,7 @@ struct omap_hwmod omap2xxx_timer9_hwmod = {
        },
        .dev_attr       = &capability_pwm_dev_attr,
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer10 */
@@ -436,6 +446,7 @@ struct omap_hwmod omap2xxx_timer10_hwmod = {
        },
        .dev_attr       = &capability_pwm_dev_attr,
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer11 */
@@ -455,6 +466,7 @@ struct omap_hwmod omap2xxx_timer11_hwmod = {
        },
        .dev_attr       = &capability_pwm_dev_attr,
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer12 */
@@ -474,6 +486,7 @@ struct omap_hwmod omap2xxx_timer12_hwmod = {
        },
        .dev_attr       = &capability_pwm_dev_attr,
        .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* wd_timer2 */
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index abe66ced903f..addc1c24ca2e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -153,29 +153,16 @@ static struct omap_hwmod omap3xxx_debugss_hwmod = {
 };
 /* timer class */
-static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
-                                SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                                SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = {
-        .name = "timer",
-        .sysc = &omap3xxx_timer_1ms_sysc,
-};
 static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
        .rev_offs       = 0x0000,
        .sysc_offs      = 0x0010,
        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
+        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+                           SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE |
+                           SYSS_HAS_RESET_STATUS),
        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .clockact       = CLOCKACT_TEST_ICLK,
        .sysc_fields    = &omap_hwmod_sysc_type1,
 };
@@ -224,7 +211,8 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
                },
        },
        .dev_attr       = &capability_alwon_dev_attr,
-        .class          = &omap3xxx_timer_1ms_hwmod_class,
+        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer2 */
@@ -241,7 +229,8 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
                        .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT,
                },
        },
-        .class          = &omap3xxx_timer_1ms_hwmod_class,
+        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer3 */
@@ -259,6 +248,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
                },
        },
        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer4 */
@@ -276,6 +266,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
                },
        },
        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer5 */
@@ -294,6 +285,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
        },
        .dev_attr       = &capability_dsp_dev_attr,
        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer6 */
@@ -312,6 +304,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
        },
        .dev_attr       = &capability_dsp_dev_attr,
        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer7 */
@@ -330,6 +323,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
        },
        .dev_attr       = &capability_dsp_dev_attr,
        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer8 */
@@ -348,6 +342,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
        },
        .dev_attr       = &capability_dsp_pwm_dev_attr,
        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer9 */
@@ -366,6 +361,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
        },
        .dev_attr       = &capability_pwm_dev_attr,
        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer10 */
@@ -383,7 +379,8 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
                },
        },
        .dev_attr       = &capability_pwm_dev_attr,
-        .class          = &omap3xxx_timer_1ms_hwmod_class,
+        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer11 */
@@ -402,6 +399,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
        },
        .dev_attr       = &capability_pwm_dev_attr,
        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /* timer12 */
@@ -425,6 +423,7 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = {
        },
        .dev_attr       = &capability_secure_dev_attr,
        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index b80bbf607ef8..f5b55a78a5f0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -3103,6 +3103,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = {
                           SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
                           SYSS_HAS_RESET_STATUS),
        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .clockact       = CLOCKACT_TEST_ICLK,
        .sysc_fields    = &omap_hwmod_sysc_type1,
 };
@@ -3156,6 +3157,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
        .name           = "timer1",
        .class          = &omap44xx_timer_1ms_hwmod_class,
        .clkdm_name     = "l4_wkup_clkdm",
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
        .mpu_irqs       = omap44xx_timer1_irqs,
        .main_clk       = "timer1_fck",
        .prcm = {
@@ -3178,6 +3180,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
        .name           = "timer2",
        .class          = &omap44xx_timer_1ms_hwmod_class,
        .clkdm_name     = "l4_per_clkdm",
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
        .mpu_irqs       = omap44xx_timer2_irqs,
        .main_clk       = "timer2_fck",
        .prcm = {
@@ -3352,6 +3355,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
        .name           = "timer10",
        .class          = &omap44xx_timer_1ms_hwmod_class,
        .clkdm_name     = "l4_per_clkdm",
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
        .mpu_irqs       = omap44xx_timer10_irqs,
        .main_clk       = "timer10_fck",
        .prcm = {
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 3cf4fdfd7ab0..e2c291f52f92 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -30,7 +30,6 @@
 #include "clock.h"
 #include "powerdomain.h"
 #include "clockdomain.h"
-#include <plat/dmtimer.h>
 #include "omap-pm.h"
 #include "soc.h"
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 070096496e20..f31d90774de0 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -435,9 +435,7 @@ extern u32 omap_features;
 #define OMAP3_HAS_IO_WAKEUP             BIT(6)
 #define OMAP3_HAS_SDRC                  BIT(7)
 #define OMAP3_HAS_IO_CHAIN_CTRL         BIT(8)
-#define OMAP4_HAS_MPU_1GHZ              BIT(9)
+#define OMAP4_HAS_PERF_SILICON          BIT(9)
-#define OMAP4_HAS_MPU_1_2GHZ            BIT(10)
-#define OMAP4_HAS_MPU_1_5GHZ            BIT(11)
 #define OMAP3_HAS_FEATURE(feat,flag)                    \
@@ -465,9 +463,7 @@ static inline unsigned int omap4_has_ ##feat(void)	\
        return omap_features & OMAP4_HAS_ ##flag;       \
 }                                                       \
-OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ)
+OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)
-OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ)
-OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ)
 #endif  /* __ASSEMBLY__ */
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 684d2fc3d485..b9cff72ceaec 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -39,6 +39,8 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/dmtimer-omap.h>
 #include <asm/mach/time.h>
 #include <asm/smp_twd.h>
@@ -64,20 +66,6 @@
 #define OMAP3_32K_SOURCE        "omap_32k_fck"
 #define OMAP4_32K_SOURCE        "sys_32k_ck"
-#ifdef CONFIG_OMAP_32K_TIMER
-#define OMAP2_CLKEV_SOURCE      OMAP2_32K_SOURCE
-#define OMAP3_CLKEV_SOURCE      OMAP3_32K_SOURCE
-#define OMAP4_CLKEV_SOURCE      OMAP4_32K_SOURCE
-#define OMAP3_SECURE_TIMER      12
-#define TIMER_PROP_SECURE       "ti,timer-secure"
-#else
-#define OMAP2_CLKEV_SOURCE      OMAP2_MPU_SOURCE
-#define OMAP3_CLKEV_SOURCE      OMAP3_MPU_SOURCE
-#define OMAP4_CLKEV_SOURCE      OMAP4_MPU_SOURCE
-#define OMAP3_SECURE_TIMER      1
-#define TIMER_PROP_SECURE       "ti,timer-alwon"
-#endif
 #define REALTIME_COUNTER_BASE                           0x48243200
 #define INCREMENTER_NUMERATOR_OFFSET                    0x10
 #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET           0x14
@@ -108,7 +96,7 @@ static int omap2_gp_timer_set_next_event(unsigned long cycles,
                                         struct clock_event_device *evt)
 {
        __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
-                                                0xffffffff - cycles, 1);
+                                   0xffffffff - cycles, OMAP_TIMER_POSTED);
        return 0;
 }
@@ -118,7 +106,7 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 {
        u32 period;
-        __omap_dm_timer_stop(&clkev, 1, clkev.rate);
+        __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
        switch (mode) {
        case CLOCK_EVT_MODE_PERIODIC:
@@ -126,10 +114,10 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
                period -= 1;
                /* Looks like we need to first set the load value separately */
                __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG,
-                                        0xffffffff - period, 1);
+                                      0xffffffff - period, OMAP_TIMER_POSTED);
                __omap_dm_timer_load_start(&clkev,
                                        OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
-                                                0xffffffff - period, 1);
+                                        0xffffffff - period, OMAP_TIMER_POSTED);
                break;
        case CLOCK_EVT_MODE_ONESHOT:
                break;
@@ -160,11 +148,6 @@ static struct of_device_id omap_timer_match[] __initdata = {
        { }
 };
-static struct of_device_id omap_counter_match[] __initdata = {
-        { .compatible = "ti,omap-counter32k", },
-        { }
-};
 /**
 * omap_get_timer_dt - get a timer using device-tree
 * @match       - device-tree match structure for matching a device type
@@ -222,19 +205,31 @@ void __init omap_dmtimer_init(void)
        }
 }
+/**
+ * omap_dm_timer_get_errata - get errata flags for a timer
+ *
+ * Get the timer errata flags that are specific to the OMAP device being used.
+ */
+u32 __init omap_dm_timer_get_errata(void)
+{
+        if (cpu_is_omap24xx())
+                return 0;
+        return OMAP_TIMER_ERRATA_I103_I767;
+}
 static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
                                                int gptimer_id,
                                                const char *fck_source,
-                                                const char *property)
+                                                const char *property,
+                                                int posted)
 {
        char name[10]; /* 10 = sizeof("gptXX_Xck0") */
        const char *oh_name;
        struct device_node *np;
        struct omap_hwmod *oh;
-        struct resource irq_rsrc, mem_rsrc;
+        struct resource irq, mem;
-        size_t size;
+        int r = 0;
-        int res = 0;
-        int r;
        if (of_have_populated_dt()) {
                np = omap_get_timer_dt(omap_timer_match, NULL);
@@ -260,28 +255,24 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
                oh_name = name;
        }
-        omap_hwmod_setup_one(oh_name);
        oh = omap_hwmod_lookup(oh_name);
        if (!oh)
                return -ENODEV;
        if (!of_have_populated_dt()) {
                r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL,
-                                                   &irq_rsrc);
+                                                   &irq);
                if (r)
                        return -ENXIO;
-                timer->irq = irq_rsrc.start;
+                timer->irq = irq.start;
                r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL,
-                                                   &mem_rsrc);
+                                                   &mem);
                if (r)
                        return -ENXIO;
-                timer->phys_base = mem_rsrc.start;
-                size = mem_rsrc.end - mem_rsrc.start;
                /* Static mapping, never released */
-                timer->io_base = ioremap(timer->phys_base, size);
+                timer->io_base = ioremap(mem.start, mem.end - mem.start);
        }
        if (!timer->io_base)
@@ -292,32 +283,37 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
        if (IS_ERR(timer->fclk))
                return -ENODEV;
-        omap_hwmod_enable(oh);
        /* FIXME: Need to remove hard-coded test on timer ID */
        if (gptimer_id != 12) {
                struct clk *src;
                src = clk_get(NULL, fck_source);
                if (IS_ERR(src)) {
-                        res = -EINVAL;
+                        r = -EINVAL;
                } else {
-                        res = __omap_dm_timer_set_source(timer->fclk, src);
+                        r = clk_set_parent(timer->fclk, src);
-                        if (IS_ERR_VALUE(res))
+                        if (IS_ERR_VALUE(r))
                                pr_warn("%s: %s cannot set source\n",
                                        __func__, oh->name);
                        clk_put(src);
                }
        }
+        omap_hwmod_setup_one(oh_name);
+        omap_hwmod_enable(oh);
        __omap_dm_timer_init_regs(timer);
-        __omap_dm_timer_reset(timer, 1, 1);
-        timer->posted = 1;
-        timer->rate = clk_get_rate(timer->fclk);
+        if (posted)
+                __omap_dm_timer_enable_posted(timer);
+        /* Check that the intended posted configuration matches the actual */
+        if (posted != timer->posted)
+                return -EINVAL;
+        timer->rate = clk_get_rate(timer->fclk);
        timer->reserved = 1;
-        return res;
+        return r;
 }
 static void __init omap2_gp_clockevent_init(int gptimer_id,
@@ -326,7 +322,17 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
 {
        int res;
-        res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source, property);
+        clkev.errata = omap_dm_timer_get_errata();
+        /*
+         * For clock-event timers we never read the timer counter and
+         * so we are not impacted by errata i103 and i767. Therefore,
+         * we can safely ignore this errata for clock-event timers.
+         */
+        __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767);
+        res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source, property,
+                                     OMAP_TIMER_POSTED);
        BUG_ON(res);
        omap2_gp_timer_irq.dev_id = &clkev;
@@ -359,7 +365,8 @@ static bool use_gptimer_clksrc;
 */
 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 {
-        return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
+        return (cycle_t)__omap_dm_timer_read_counter(&clksrc,
+                                                     OMAP_TIMER_NONPOSTED);
 }
 static struct clocksource clocksource_gpt = {
@@ -373,12 +380,17 @@ static struct clocksource clocksource_gpt = {
 static u32 notrace dmtimer_read_sched_clock(void)
 {
        if (clksrc.reserved)
-                return __omap_dm_timer_read_counter(&clksrc, 1);
+                return __omap_dm_timer_read_counter(&clksrc,
+                                                    OMAP_TIMER_NONPOSTED);
        return 0;
 }
-#ifdef CONFIG_OMAP_32K_TIMER
+static struct of_device_id omap_counter_match[] __initdata = {
+        { .compatible = "ti,omap-counter32k", },
+        { }
+};
 /* Setup free-running counter for clocksource */
 static int __init omap2_sync32k_clocksource_init(void)
 {
@@ -439,23 +451,21 @@ static int __init omap2_sync32k_clocksource_init(void)
        return ret;
 }
-#else
-static inline int omap2_sync32k_clocksource_init(void)
-{
-        return -ENODEV;
-}
-#endif
 static void __init omap2_gptimer_clocksource_init(int gptimer_id,
                                                const char *fck_source)
 {
        int res;
-        res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source, NULL);
+        clksrc.errata = omap_dm_timer_get_errata();
+        res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source, NULL,
+                                     OMAP_TIMER_NONPOSTED);
        BUG_ON(res);
        __omap_dm_timer_load_start(&clksrc,
-                        OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
+                                   OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
+                                   OMAP_TIMER_NONPOSTED);
        setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
        if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
@@ -466,25 +476,6 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
                        gptimer_id, clksrc.rate);
 }
-static void __init omap2_clocksource_init(int gptimer_id,
-                                                const char *fck_source)
-{
-        /*
-         * First give preference to kernel parameter configuration
-         * by user (clocksource="gp_timer").
-         *
-         * In case of missing kernel parameter for clocksource,
-         * first check for availability for 32k-sync timer, in case
-         * of failure in finding 32k_counter module or registering
-         * it as clocksource, execution will fallback to gp-timer.
-         */
-        if (use_gptimer_clksrc == true)
-                omap2_gptimer_clocksource_init(gptimer_id, fck_source);
-        else if (omap2_sync32k_clocksource_init())
-                /* Fall back to gp-timer code */
-                omap2_gptimer_clocksource_init(gptimer_id, fck_source);
-}
 #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 /*
 * The realtime counter also called master counter, is a free-running
@@ -563,52 +554,65 @@ static inline void __init realtime_counter_init(void)
 {}
 #endif
-#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,      \
+#define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,   \
+                               clksrc_nr, clksrc_src)                   \
+static void __init omap##name##_gptimer_timer_init(void)                \
+{                                                                       \
+        omap_dmtimer_init();                                            \
+        omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
+        omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);        \
+}
+#define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,  \
                                clksrc_nr, clksrc_src)                  \
-static void __init omap##name##_timer_init(void)                        \
+static void __init omap##name##_sync32k_timer_init(void)                \
 {                                                                       \
        omap_dmtimer_init();                                            \
        omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
-        omap2_clocksource_init((clksrc_nr), clksrc_src);                \
+        /* Enable the use of clocksource="gp_timer" kernel parameter */ \
+        if (use_gptimer_clksrc)                                         \
+                omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);\
+        else                                                            \
+                omap2_sync32k_clocksource_init();                       \
 }
-#define OMAP_SYS_TIMER(name)                                            \
+#define OMAP_SYS_TIMER(name, clksrc)                                    \
 struct sys_timer omap##name##_timer = {                                 \
-        .init   = omap##name##_timer_init,                              \
+        .init   = omap##name##_##clksrc##_timer_init,                   \
 };
 #ifdef CONFIG_ARCH_OMAP2
-OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, "ti,timer-alwon",
+OMAP_SYS_32K_TIMER_INIT(2, 1, OMAP2_32K_SOURCE, "ti,timer-alwon",
-                    2, OMAP2_MPU_SOURCE)
+                        2, OMAP2_MPU_SOURCE);
-OMAP_SYS_TIMER(2)
+OMAP_SYS_TIMER(2, sync32k);
-#endif
+#endif /* CONFIG_ARCH_OMAP2 */
 #ifdef CONFIG_ARCH_OMAP3
-OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, "ti,timer-alwon",
+OMAP_SYS_32K_TIMER_INIT(3, 1, OMAP3_32K_SOURCE, "ti,timer-alwon",
-                    2, OMAP3_MPU_SOURCE)
+                        2, OMAP3_MPU_SOURCE);
-OMAP_SYS_TIMER(3)
+OMAP_SYS_TIMER(3, sync32k);
-OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
+OMAP_SYS_32K_TIMER_INIT(3_secure, 12, OMAP3_32K_SOURCE, "ti,timer-secure",
-                        TIMER_PROP_SECURE, 2, OMAP3_MPU_SOURCE)
+                        2, OMAP3_MPU_SOURCE);
-OMAP_SYS_TIMER(3_secure)
+OMAP_SYS_TIMER(3_secure, sync32k);
-#endif
+OMAP_SYS_GP_TIMER_INIT(3_gp, 1, OMAP3_MPU_SOURCE, "ti,timer-alwon",
+                       2, OMAP3_MPU_SOURCE);
+OMAP_SYS_TIMER(3_gp, gptimer);
+#endif /* CONFIG_ARCH_OMAP3 */
 #ifdef CONFIG_SOC_AM33XX
-OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon",
+OMAP_SYS_GP_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon",
-                    2, OMAP4_MPU_SOURCE)
+                       2, OMAP4_MPU_SOURCE);
-OMAP_SYS_TIMER(3_am33xx)
+OMAP_SYS_TIMER(3_am33xx, gptimer);
-#endif
+#endif /* CONFIG_SOC_AM33XX */
 #ifdef CONFIG_ARCH_OMAP4
+OMAP_SYS_32K_TIMER_INIT(4, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
+                        2, OMAP4_MPU_SOURCE);
 #ifdef CONFIG_LOCAL_TIMERS
-static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
+static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29);
-                              OMAP44XX_LOCAL_TWD_BASE, 29);
+static void __init omap4_local_timer_init(void)
-#endif
-static void __init omap4_timer_init(void)
 {
-        omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE, "ti,timer-alwon");
+        omap4_sync32k_timer_init();
-        omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
-#ifdef CONFIG_LOCAL_TIMERS
        /* Local timers are not supprted on OMAP4430 ES1.0 */
        if (omap_rev() != OMAP4430_REV_ES1_0) {
                int err;
@@ -622,26 +626,32 @@ static void __init omap4_timer_init(void)
                if (err)
                        pr_err("twd_local_timer_register failed %d\n", err);
        }
-#endif
 }
-OMAP_SYS_TIMER(4)
+#else /* CONFIG_LOCAL_TIMERS */
-#endif
+static inline void omap4_local_timer_init(void)
+{
+        omap4_sync32_timer_init();
+}
+#endif /* CONFIG_LOCAL_TIMERS */
+OMAP_SYS_TIMER(4, local);
+#endif /* CONFIG_ARCH_OMAP4 */
 #ifdef CONFIG_SOC_OMAP5
-static void __init omap5_timer_init(void)
+OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
+                        2, OMAP4_MPU_SOURCE);
+static void __init omap5_realtime_timer_init(void)
 {
        int err;
-        omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE, "ti,timer-alwon");
+        omap5_sync32k_timer_init();
-        omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
        realtime_counter_init();
        err = arch_timer_of_register();
        if (err)
                pr_err("%s: arch_timer_register failed %d\n", __func__, err);
 }
-OMAP_SYS_TIMER(5)
+OMAP_SYS_TIMER(5, realtime);
-#endif
+#endif /* CONFIG_SOC_OMAP5 */
 /**
 * omap_timer_init - build and register timer device with an
@@ -693,6 +703,7 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
        if (timer_dev_attr)
                pdata->timer_capability = timer_dev_attr->timer_capability;
+        pdata->timer_errata = omap_dm_timer_get_errata();
        pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
        pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 3fa2bdb44106..e49b40b4c90a 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -70,6 +70,7 @@ void __init omap4_pmic_init(const char *pmic_type,
 {
        /* PMIC part*/
        omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
+        omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
        omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
        /* Register additional devices on i2c1 bus if needed */
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 11aa7399dc09..86eec4159cbc 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -2,27 +2,6 @@ if ARCH_PXA
 menu "Intel PXA2xx/PXA3xx Implementations"
-config ARCH_PXA_V7
-        bool "ARMv7 (PXA95x) based systems"
-if ARCH_PXA_V7
-comment "Marvell Dev Platforms (sorted by hardware release time)"
-config MACH_TAVOREVB3
-        bool "PXA95x Development Platform (aka TavorEVB III)"
-        select CPU_PXA955
-config MACH_SAARB
-        bool "PXA955 Handheld Platform (aka SAARB)"
-        select CPU_PXA955
-endif
-config PXA_V7_MACH_AUTO
-        def_bool y
-        depends on ARCH_PXA_V7
-        depends on !MACH_SAARB
-        select MACH_TAVOREVB3
-if !ARCH_PXA_V7
 comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
 config MACH_PXA3XX_DT
@@ -630,7 +609,6 @@ config MACH_ZIPIT2
        bool "Zipit Z2 Handheld"
        select HAVE_PWM
        select PXA27x
-endif
 endmenu
 config PXA25x
@@ -688,18 +666,6 @@ config CPU_PXA935
        help
          PXA935 (codename Tavor-P65)
-config PXA95x
-        bool
-        select CPU_PJ4
-        help
-          Select code specific to PXA95x variants
-config CPU_PXA955
-        bool
-        select PXA95x
-        help
-          PXA950 (codename MG1)
 config PXA_SHARP_C7xx
        bool
        select SHARPSL_PM
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index ee88d6eae648..12c500558387 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -19,7 +19,6 @@ endif
 obj-$(CONFIG_PXA25x)            += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
 obj-$(CONFIG_PXA27x)            += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
 obj-$(CONFIG_PXA3xx)            += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
-obj-$(CONFIG_PXA95x)            += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o pxa95x.o smemc.o
 obj-$(CONFIG_CPU_PXA300)        += pxa300.o
 obj-$(CONFIG_CPU_PXA320)        += pxa320.o
 obj-$(CONFIG_CPU_PXA930)        += pxa930.o
@@ -36,9 +35,7 @@ obj-$(CONFIG_MACH_ZYLONITE300)	+= zylonite.o zylonite_pxa300.o
 obj-$(CONFIG_MACH_ZYLONITE320)  += zylonite.o zylonite_pxa320.o
 obj-$(CONFIG_MACH_LITTLETON)    += littleton.o
 obj-$(CONFIG_MACH_TAVOREVB)     += tavorevb.o
-obj-$(CONFIG_MACH_TAVOREVB3)    += tavorevb3.o
 obj-$(CONFIG_MACH_SAAR)         += saar.o
-obj-$(CONFIG_MACH_SAARB)        += saarb.o
 # 3rd Party Dev Platforms
 obj-$(CONFIG_ARCH_PXA_IDP)      += idp.o
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index 3a258b1bf1aa..1f65d32c8d5e 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -57,7 +57,7 @@ void clk_pxa2xx_cken_disable(struct clk *clk);
 extern struct syscore_ops pxa2xx_clock_syscore_ops;
-#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+#if defined(CONFIG_PXA3xx)
 #define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay)   \
 struct clk clk_##_name = {                              \
                .ops    = &clk_pxa3xx_cken_ops,         \
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index ddaa04de8e22..daa86d39ed9e 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -703,7 +703,7 @@ void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
 }
 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
-#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 static struct resource pxa27x_resource_keypad[] = {
        [0] = {
                .start  = 0x41500000,
@@ -872,7 +872,7 @@ struct platform_device pxa27x_device_pwm1 = {
        .resource       = pxa27x_resource_pwm1,
        .num_resources  = ARRAY_SIZE(pxa27x_resource_pwm1),
 };
-#endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
+#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 #ifdef CONFIG_PXA3xx
 static struct resource pxa3xx_resources_mci2[] = {
@@ -981,7 +981,7 @@ struct platform_device pxa3xx_device_gcu = {
 #endif /* CONFIG_PXA3xx */
-#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+#if defined(CONFIG_PXA3xx)
 static struct resource pxa3xx_resources_i2c_power[] = {
        {
                .start  = 0x40f500c0,
@@ -1082,7 +1082,7 @@ struct platform_device pxa3xx_device_ssp4 = {
        .resource       = pxa3xx_resource_ssp4,
        .num_resources  = ARRAY_SIZE(pxa3xx_resource_ssp4),
 };
-#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
+#endif /* CONFIG_PXA3xx */
 struct resource pxa_resource_gpio[] = {
        {
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 56d92e5cad85..ccb06e485520 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -194,17 +194,6 @@
 #define __cpu_is_pxa935(id)     (0)
 #endif
-#ifdef CONFIG_CPU_PXA955
-#define __cpu_is_pxa955(id)                             \
-        ({                                              \
-                unsigned int _id = (id) >> 4 & 0xfff;   \
-                _id == 0x581 || _id == 0xc08            \
-                        || _id == 0xb76;                \
-        })
-#else
-#define __cpu_is_pxa955(id)     (0)
-#endif
 #define cpu_is_pxa210()                                 \
        ({                                              \
                __cpu_is_pxa210(read_cpuid_id());       \
@@ -255,10 +244,6 @@
                __cpu_is_pxa935(read_cpuid_id());       \
         })
-#define cpu_is_pxa955()                                 \
-        ({                                              \
-                __cpu_is_pxa955(read_cpuid_id());       \
-        })
 /*
@@ -297,15 +282,6 @@
 #define __cpu_is_pxa93x(id)     (0)
 #endif
-#ifdef CONFIG_PXA95x
-#define __cpu_is_pxa95x(id)                             \
-        ({                                              \
-                __cpu_is_pxa955(id);                    \
-        })
-#else
-#define __cpu_is_pxa95x(id)     (0)
-#endif
 #define cpu_is_pxa2xx()                                 \
        ({                                              \
                __cpu_is_pxa2xx(read_cpuid_id());       \
@@ -321,10 +297,6 @@
                __cpu_is_pxa93x(read_cpuid_id());       \
         })
-#define cpu_is_pxa95x()                                 \
-        ({                                              \
-                __cpu_is_pxa95x(read_cpuid_id());       \
-        })
 /*
 * return current memory and LCD clock frequency in units of 10kHz
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 8765782dd955..48c2fd851686 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -84,7 +84,6 @@
 #define IRQ_PXA935_MMC0 PXA_IRQ(72)     /* MMC0 Controller (PXA935) */
 #define IRQ_PXA935_MMC1 PXA_IRQ(73)     /* MMC1 Controller (PXA935) */
 #define IRQ_PXA935_MMC2 PXA_IRQ(74)     /* MMC2 Controller (PXA935) */
-#define IRQ_PXA955_MMC3 PXA_IRQ(75)     /* MMC3 Controller (PXA955) */
 #define IRQ_U2P         PXA_IRQ(93)     /* USB PHY D+/D- Lines (PXA935) */
 #define PXA_GPIO_IRQ_BASE       PXA_IRQ(96)
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h
index cd3e57f42688..6dd7fa163e29 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h
@@ -7,7 +7,6 @@
 extern void __init pxa3xx_map_io(void);
 extern void __init pxa3xx_init_irq(void);
-extern void __init pxa95x_init_irq(void);
 #define pxa3xx_handle_irq       ichp_handle_irq
diff --git a/arch/arm/mach-pxa/include/mach/pxa95x.h b/arch/arm/mach-pxa/include/mach/pxa95x.h
deleted file mode 100644
index cbb097c4cb1f..000000000000
--- a/arch/arm/mach-pxa/include/mach/pxa95x.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_PXA95X_H
-#define __MACH_PXA95X_H
-#include <mach/pxa3xx.h>
-#include <mach/mfp-pxa930.h>
-#endif /* __MACH_PXA95X_H */
diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c
index 7dbe3ccf1993..e329ccefd364 100644
--- a/arch/arm/mach-pxa/pxa3xx-ulpi.c
+++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c
@@ -384,18 +384,7 @@ static struct platform_driver pxa3xx_u2d_ulpi_driver = {
        .probe          = pxa3xx_u2d_probe,
        .remove         = pxa3xx_u2d_remove,
 };
+module_platform_driver(pxa3xx_u2d_ulpi_driver);
-static int pxa3xx_u2d_ulpi_init(void)
-{
-        return platform_driver_register(&pxa3xx_u2d_ulpi_driver);
-}
-module_init(pxa3xx_u2d_ulpi_init);
-static void __exit pxa3xx_u2d_ulpi_exit(void)
-{
-        platform_driver_unregister(&pxa3xx_u2d_ulpi_driver);
-}
-module_exit(pxa3xx_u2d_ulpi_exit);
 MODULE_DESCRIPTION("PXA3xx U2D ULPI driver");
 MODULE_AUTHOR("Igor Grinberg");
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
deleted file mode 100644
index 47601f80e6e7..000000000000
--- a/arch/arm/mach-pxa/pxa95x.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- * linux/arch/arm/mach-pxa/pxa95x.c
- *
- * code specific to PXA95x aka MGx
- *
- * Copyright (C) 2009-2010 Marvell International Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pm.h>
-#include <linux/platform_device.h>
-#include <linux/i2c/pxa-i2c.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/syscore_ops.h>
-#include <mach/hardware.h>
-#include <mach/pxa3xx-regs.h>
-#include <mach/pxa930.h>
-#include <mach/reset.h>
-#include <mach/pm.h>
-#include <mach/dma.h>
-#include "generic.h"
-#include "devices.h"
-#include "clock.h"
-static struct mfp_addr_map pxa95x_mfp_addr_map[] __initdata = {
-        MFP_ADDR(GPIO0, 0x02e0),
-        MFP_ADDR(GPIO1, 0x02dc),
-        MFP_ADDR(GPIO2, 0x02e8),
-        MFP_ADDR(GPIO3, 0x02d8),
-        MFP_ADDR(GPIO4, 0x02e4),
-        MFP_ADDR(GPIO5, 0x02ec),
-        MFP_ADDR(GPIO6, 0x02f8),
-        MFP_ADDR(GPIO7, 0x02fc),
-        MFP_ADDR(GPIO8, 0x0300),
-        MFP_ADDR(GPIO9, 0x02d4),
-        MFP_ADDR(GPIO10, 0x02f4),
-        MFP_ADDR(GPIO11, 0x02f0),
-        MFP_ADDR(GPIO12, 0x0304),
-        MFP_ADDR(GPIO13, 0x0310),
-        MFP_ADDR(GPIO14, 0x0308),
-        MFP_ADDR(GPIO15, 0x030c),
-        MFP_ADDR(GPIO16, 0x04e8),
-        MFP_ADDR(GPIO17, 0x04f4),
-        MFP_ADDR(GPIO18, 0x04f8),
-        MFP_ADDR(GPIO19, 0x04fc),
-        MFP_ADDR(GPIO20, 0x0518),
-        MFP_ADDR(GPIO21, 0x051c),
-        MFP_ADDR(GPIO22, 0x04ec),
-        MFP_ADDR(GPIO23, 0x0500),
-        MFP_ADDR(GPIO24, 0x04f0),
-        MFP_ADDR(GPIO25, 0x0504),
-        MFP_ADDR(GPIO26, 0x0510),
-        MFP_ADDR(GPIO27, 0x0514),
-        MFP_ADDR(GPIO28, 0x0520),
-        MFP_ADDR(GPIO29, 0x0600),
-        MFP_ADDR(GPIO30, 0x0618),
-        MFP_ADDR(GPIO31, 0x0610),
-        MFP_ADDR(GPIO32, 0x060c),
-        MFP_ADDR(GPIO33, 0x061c),
-        MFP_ADDR(GPIO34, 0x0620),
-        MFP_ADDR(GPIO35, 0x0628),
-        MFP_ADDR(GPIO36, 0x062c),
-        MFP_ADDR(GPIO37, 0x0630),
-        MFP_ADDR(GPIO38, 0x0634),
-        MFP_ADDR(GPIO39, 0x0638),
-        MFP_ADDR(GPIO40, 0x063c),
-        MFP_ADDR(GPIO41, 0x0614),
-        MFP_ADDR(GPIO42, 0x0624),
-        MFP_ADDR(GPIO43, 0x0608),
-        MFP_ADDR(GPIO44, 0x0604),
-        MFP_ADDR(GPIO45, 0x050c),
-        MFP_ADDR(GPIO46, 0x0508),
-        MFP_ADDR(GPIO47, 0x02bc),
-        MFP_ADDR(GPIO48, 0x02b4),
-        MFP_ADDR(GPIO49, 0x02b8),
-        MFP_ADDR(GPIO50, 0x02c8),
-        MFP_ADDR(GPIO51, 0x02c0),
-        MFP_ADDR(GPIO52, 0x02c4),
-        MFP_ADDR(GPIO53, 0x02d0),
-        MFP_ADDR(GPIO54, 0x02cc),
-        MFP_ADDR(GPIO55, 0x029c),
-        MFP_ADDR(GPIO56, 0x02a0),
-        MFP_ADDR(GPIO57, 0x0294),
-        MFP_ADDR(GPIO58, 0x0298),
-        MFP_ADDR(GPIO59, 0x02a4),
-        MFP_ADDR(GPIO60, 0x02a8),
-        MFP_ADDR(GPIO61, 0x02b0),
-        MFP_ADDR(GPIO62, 0x02ac),
-        MFP_ADDR(GPIO63, 0x0640),
-        MFP_ADDR(GPIO64, 0x065c),
-        MFP_ADDR(GPIO65, 0x0648),
-        MFP_ADDR(GPIO66, 0x0644),
-        MFP_ADDR(GPIO67, 0x0674),
-        MFP_ADDR(GPIO68, 0x0658),
-        MFP_ADDR(GPIO69, 0x0654),
-        MFP_ADDR(GPIO70, 0x0660),
-        MFP_ADDR(GPIO71, 0x0668),
-        MFP_ADDR(GPIO72, 0x0664),
-        MFP_ADDR(GPIO73, 0x0650),
-        MFP_ADDR(GPIO74, 0x066c),
-        MFP_ADDR(GPIO75, 0x064c),
-        MFP_ADDR(GPIO76, 0x0670),
-        MFP_ADDR(GPIO77, 0x0678),
-        MFP_ADDR(GPIO78, 0x067c),
-        MFP_ADDR(GPIO79, 0x0694),
-        MFP_ADDR(GPIO80, 0x069c),
-        MFP_ADDR(GPIO81, 0x06a0),
-        MFP_ADDR(GPIO82, 0x06a4),
-        MFP_ADDR(GPIO83, 0x0698),
-        MFP_ADDR(GPIO84, 0x06bc),
-        MFP_ADDR(GPIO85, 0x06b4),
-        MFP_ADDR(GPIO86, 0x06b0),
-        MFP_ADDR(GPIO87, 0x06c0),
-        MFP_ADDR(GPIO88, 0x06c4),
-        MFP_ADDR(GPIO89, 0x06ac),
-        MFP_ADDR(GPIO90, 0x0680),
-        MFP_ADDR(GPIO91, 0x0684),
-        MFP_ADDR(GPIO92, 0x0688),
-        MFP_ADDR(GPIO93, 0x0690),
-        MFP_ADDR(GPIO94, 0x068c),
-        MFP_ADDR(GPIO95, 0x06a8),
-        MFP_ADDR(GPIO96, 0x06b8),
-        MFP_ADDR(GPIO97, 0x0410),
-        MFP_ADDR(GPIO98, 0x0418),
-        MFP_ADDR(GPIO99, 0x041c),
-        MFP_ADDR(GPIO100, 0x0414),
-        MFP_ADDR(GPIO101, 0x0408),
-        MFP_ADDR(GPIO102, 0x0324),
-        MFP_ADDR(GPIO103, 0x040c),
-        MFP_ADDR(GPIO104, 0x0400),
-        MFP_ADDR(GPIO105, 0x0328),
-        MFP_ADDR(GPIO106, 0x0404),
-        MFP_ADDR(GPIO159, 0x0524),
-        MFP_ADDR(GPIO163, 0x0534),
-        MFP_ADDR(GPIO167, 0x0544),
-        MFP_ADDR(GPIO168, 0x0548),
-        MFP_ADDR(GPIO169, 0x054c),
-        MFP_ADDR(GPIO170, 0x0550),
-        MFP_ADDR(GPIO171, 0x0554),
-        MFP_ADDR(GPIO172, 0x0558),
-        MFP_ADDR(GPIO173, 0x055c),
-        MFP_ADDR(nXCVREN, 0x0204),
-        MFP_ADDR(DF_CLE_nOE, 0x020c),
-        MFP_ADDR(DF_nADV1_ALE, 0x0218),
-        MFP_ADDR(DF_SCLK_E, 0x0214),
-        MFP_ADDR(DF_SCLK_S, 0x0210),
-        MFP_ADDR(nBE0, 0x021c),
-        MFP_ADDR(nBE1, 0x0220),
-        MFP_ADDR(DF_nADV2_ALE, 0x0224),
-        MFP_ADDR(DF_INT_RnB, 0x0228),
-        MFP_ADDR(DF_nCS0, 0x022c),
-        MFP_ADDR(DF_nCS1, 0x0230),
-        MFP_ADDR(nLUA, 0x0254),
-        MFP_ADDR(nLLA, 0x0258),
-        MFP_ADDR(DF_nWE, 0x0234),
-        MFP_ADDR(DF_nRE_nOE, 0x0238),
-        MFP_ADDR(DF_ADDR0, 0x024c),
-        MFP_ADDR(DF_ADDR1, 0x0250),
-        MFP_ADDR(DF_ADDR2, 0x025c),
-        MFP_ADDR(DF_ADDR3, 0x0260),
-        MFP_ADDR(DF_IO0, 0x023c),
-        MFP_ADDR(DF_IO1, 0x0240),
-        MFP_ADDR(DF_IO2, 0x0244),
-        MFP_ADDR(DF_IO3, 0x0248),
-        MFP_ADDR(DF_IO4, 0x0264),
-        MFP_ADDR(DF_IO5, 0x0268),
-        MFP_ADDR(DF_IO6, 0x026c),
-        MFP_ADDR(DF_IO7, 0x0270),
-        MFP_ADDR(DF_IO8, 0x0274),
-        MFP_ADDR(DF_IO9, 0x0278),
-        MFP_ADDR(DF_IO10, 0x027c),
-        MFP_ADDR(DF_IO11, 0x0280),
-        MFP_ADDR(DF_IO12, 0x0284),
-        MFP_ADDR(DF_IO13, 0x0288),
-        MFP_ADDR(DF_IO14, 0x028c),
-        MFP_ADDR(DF_IO15, 0x0290),
-        MFP_ADDR(GSIM_UIO, 0x0314),
-        MFP_ADDR(GSIM_UCLK, 0x0318),
-        MFP_ADDR(GSIM_UDET, 0x031c),
-        MFP_ADDR(GSIM_nURST, 0x0320),
-        MFP_ADDR(PMIC_INT, 0x06c8),
-        MFP_ADDR(RDY, 0x0200),
-        MFP_ADDR_END,
-};
-static DEFINE_CK(pxa95x_lcd, LCD, &clk_pxa3xx_hsio_ops);
-static DEFINE_CLK(pxa95x_pout, &clk_pxa3xx_pout_ops, 13000000, 70);
-static DEFINE_PXA3_CKEN(pxa95x_ffuart, FFUART, 14857000, 1);
-static DEFINE_PXA3_CKEN(pxa95x_btuart, BTUART, 14857000, 1);
-static DEFINE_PXA3_CKEN(pxa95x_stuart, STUART, 14857000, 1);
-static DEFINE_PXA3_CKEN(pxa95x_i2c, I2C, 32842000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_keypad, KEYPAD, 32768, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp1, SSP1, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp2, SSP2, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0);
-static struct clk_lookup pxa95x_clkregs[] = {
-        INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
-        /* Power I2C clock is always on */
-        INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
-        INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-uart.2", NULL),
-        INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-ir", "UARTCLK"),
-        INIT_CLKREG(&clk_pxa95x_i2c, "pxa2xx-i2c.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_keypad, "pxa27x-keypad", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp1, "pxa27x-ssp.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp2, "pxa27x-ssp.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp3, "pxa27x-ssp.2", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
-        INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL),
-        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
-};
-void __init pxa95x_init_irq(void)
-{
-        pxa_init_irq(96, NULL);
-}
-/*
- * device registration specific to PXA93x.
- */
-void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
-{
-        pxa_register_device(&pxa3xx_device_i2c_power, info);
-}
-static struct platform_device *devices[] __initdata = {
-        &pxa_device_gpio,
-        &sa1100_device_rtc,
-        &pxa_device_rtc,
-        &pxa27x_device_ssp1,
-        &pxa27x_device_ssp2,
-        &pxa27x_device_ssp3,
-        &pxa3xx_device_ssp4,
-        &pxa27x_device_pwm0,
-        &pxa27x_device_pwm1,
-};
-static int __init pxa95x_init(void)
-{
-        int ret = 0, i;
-        if (cpu_is_pxa95x()) {
-                mfp_init_base(io_p2v(MFPR_BASE));
-                mfp_init_addr(pxa95x_mfp_addr_map);
-                reset_status = ARSR;
-                /*
-                 * clear RDH bit every time after reset
-                 *
-                 * Note: the last 3 bits DxS are write-1-to-clear so carefully
-                 * preserve them here in case they will be referenced later
-                 */
-                ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
-                clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs));
-                if ((ret = pxa_init_dma(IRQ_DMA, 32)))
-                        return ret;
-                register_syscore_ops(&pxa_irq_syscore_ops);
-                register_syscore_ops(&pxa3xx_clock_syscore_ops);
-                ret = platform_add_devices(devices, ARRAY_SIZE(devices));
-        }
-        return ret;
-}
-postcore_initcall(pxa95x_init);
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
deleted file mode 100644
index 5aded5e6148f..000000000000
--- a/arch/arm/mach-pxa/saarb.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- *  linux/arch/arm/mach-pxa/saarb.c
- *
- *  Support for the Marvell Handheld Platform (aka SAARB)
- *
- *  Copyright (C) 2007-2010 Marvell International Ltd.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
-#include <linux/mfd/88pm860x.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/irqs.h>
-#include <mach/hardware.h>
-#include <mach/mfp.h>
-#include <mach/mfp-pxa930.h>
-#include <mach/pxa95x.h>
-#include "generic.h"
-#define SAARB_NR_IRQS   (IRQ_BOARD_START + 40)
-static struct pm860x_touch_pdata saarb_touch = {
-        .gpadc_prebias  = 1,
-        .slot_cycle     = 1,
-        .tsi_prebias    = 6,
-        .pen_prebias    = 16,
-        .pen_prechg     = 2,
-        .res_x          = 300,
-};
-static struct pm860x_backlight_pdata saarb_backlight[] = {
-        {
-                .id     = PM8606_ID_BACKLIGHT,
-                .iset   = PM8606_WLED_CURRENT(24),
-                .flags  = PM8606_BACKLIGHT1,
-        },
-        {},
-};
-static struct pm860x_led_pdata saarb_led[] = {
-        {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_BLUE,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_BLUE,
-        },
-};
-static struct pm860x_platform_data saarb_pm8607_info = {
-        .touch          = &saarb_touch,
-        .backlight      = &saarb_backlight[0],
-        .led            = &saarb_led[0],
-        .companion_addr = 0x10,
-        .irq_mode       = 0,
-        .irq_base       = IRQ_BOARD_START,
-        .i2c_port       = GI2C_PORT,
-};
-static struct i2c_board_info saarb_i2c_info[] = {
-        {
-                .type           = "88PM860x",
-                .addr           = 0x34,
-                .platform_data  = &saarb_pm8607_info,
-                .irq            = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
-        },
-};
-static void __init saarb_init(void)
-{
-        pxa_set_ffuart_info(NULL);
-        pxa_set_i2c_info(NULL);
-        i2c_register_board_info(0, ARRAY_AND_SIZE(saarb_i2c_info));
-}
-MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
-        .atag_offset    = 0x100,
-        .map_io         = pxa3xx_map_io,
-        .nr_irqs        = SAARB_NR_IRQS,
-        .init_irq       = pxa95x_init_irq,
-        .handle_irq     = pxa3xx_handle_irq,
-        .timer          = &pxa_timer,
-        .init_machine   = saarb_init,
-        .restart        = pxa_restart,
-MACHINE_END
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
deleted file mode 100644
index f7d9305cfd77..000000000000
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- *  linux/arch/arm/mach-pxa/tavorevb3.c
- *
- *  Support for the Marvell EVB3 Development Platform.
- *
- *  Copyright:  (C) Copyright 2008-2010 Marvell International Ltd.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
-#include <linux/gpio.h>
-#include <linux/mfd/88pm860x.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/pxa930.h>
-#include "devices.h"
-#include "generic.h"
-#define TAVOREVB3_NR_IRQS       (IRQ_BOARD_START + 24)
-static mfp_cfg_t evb3_mfp_cfg[] __initdata = {
-        /* UART */
-        GPIO53_UART1_TXD,
-        GPIO54_UART1_RXD,
-        /* PMIC */
-        PMIC_INT_GPIO83,
-};
-#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
-static struct pm860x_touch_pdata evb3_touch = {
-        .gpadc_prebias  = 1,
-        .slot_cycle     = 1,
-        .tsi_prebias    = 6,
-        .pen_prebias    = 16,
-        .pen_prechg     = 2,
-        .res_x          = 300,
-};
-static struct pm860x_backlight_pdata evb3_backlight[] = {
-        {
-                .id     = PM8606_ID_BACKLIGHT,
-                .iset   = PM8606_WLED_CURRENT(24),
-                .flags  = PM8606_BACKLIGHT1,
-        },
-        {},
-};
-static struct pm860x_led_pdata evb3_led[] = {
-        {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_BLUE,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_BLUE,
-        },
-};
-static struct pm860x_platform_data evb3_pm8607_info = {
-        .touch                          = &evb3_touch,
-        .backlight                      = &evb3_backlight[0],
-        .led                            = &evb3_led[0],
-        .companion_addr                 = 0x10,
-        .irq_mode                       = 0,
-        .irq_base                       = IRQ_BOARD_START,
-        .i2c_port                       = GI2C_PORT,
-};
-static struct i2c_board_info evb3_i2c_info[] = {
-        {
-                .type           = "88PM860x",
-                .addr           = 0x34,
-                .platform_data  = &evb3_pm8607_info,
-                .irq            = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
-        },
-};
-static void __init evb3_init_i2c(void)
-{
-        pxa_set_i2c_info(NULL);
-        i2c_register_board_info(0, ARRAY_AND_SIZE(evb3_i2c_info));
-}
-#else
-static inline void evb3_init_i2c(void) {}
-#endif
-static void __init evb3_init(void)
-{
-        /* initialize MFP configurations */
-        pxa3xx_mfp_config(ARRAY_AND_SIZE(evb3_mfp_cfg));
-        pxa_set_ffuart_info(NULL);
-        evb3_init_i2c();
-}
-MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)")
-        .atag_offset    = 0x100,
-        .map_io         = pxa3xx_map_io,
-        .nr_irqs        = TAVOREVB3_NR_IRQS,
-        .init_irq       = pxa3xx_init_irq,
-        .handle_irq       = pxa3xx_handle_irq,
-        .timer          = &pxa_timer,
-        .init_machine   = evb3_init,
-        .restart        = pxa_restart,
-MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index 7f689ce1be61..bdaba59b42dc 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = {
                .devname        = "s3c2410-spi.0",
                .parent         = &clk_p,
                .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_SPI0,
-        }, {
-                .name           = "spi",
-                .devname        = "s3c2410-spi.1",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
                .ctrlbit        = S3C2443_PCLKCON_SPI1,
        }
 };
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 28041e83dc82..1a6f85777449 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -138,11 +138,7 @@ static struct clk init_clocks_off[] = {
                .ctrlbit        = S3C_CLKCON_PCLK_TSADC,
        }, {
                .name           = "i2c",
-#ifdef CONFIG_S3C_DEV_I2C1
                .devname        = "s3c2440-i2c.0",
-#else
-                .devname        = "s3c2440-i2c",
-#endif
                .parent         = &clk_p,
                .enable         = s3c64xx_pclk_ctrl,
                .ctrlbit        = S3C_CLKCON_PCLK_IIC,
@@ -319,10 +315,6 @@ static struct clk init_clocks_off[] = {
                .enable         = s3c64xx_sclk_ctrl,
                .ctrlbit        = S3C_CLKCON_SCLK_MFC,
        }, {
-                .name           = "cam",
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_CAM,
-        }, {
                .name           = "sclk_jpeg",
                .enable         = s3c64xx_sclk_ctrl,
                .ctrlbit        = S3C_CLKCON_SCLK_JPEG,
@@ -681,15 +673,6 @@ static struct clksrc_sources clkset_audio2 = {
        .nr_sources     = ARRAY_SIZE(clkset_audio2_list),
 };
-static struct clk *clkset_camif_list[] = {
-        &clk_h2,
-};
-static struct clksrc_sources clkset_camif = {
-        .sources        = clkset_camif_list,
-        .nr_sources     = ARRAY_SIZE(clkset_camif_list),
-};
 static struct clksrc_clk clksrcs[] = {
        {
                .clk    = {
@@ -744,10 +727,9 @@ static struct clksrc_clk clksrcs[] = {
                        .name           = "camera",
                        .ctrlbit        = S3C_CLKCON_SCLK_CAM,
                        .enable         = s3c64xx_sclk_ctrl,
+                        .parent         = &clk_h2,
                },
                .reg_div        = { .reg = S3C_CLK_DIV0, .shift = 20, .size = 4  },
-                .reg_src        = { .reg = NULL, .shift = 0, .size = 0  },
-                .sources        = &clkset_camif,
        },
 };
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index be746e33e86c..aef303b8997e 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -155,7 +155,6 @@ void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
        /* initialise the io descriptors we need for initialisation */
        iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
        iotable_init(mach_desc, size);
-        init_consistent_dma_size(SZ_8M);
        /* detect cpu id */
        s3c64xx_init_cpu();
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 111e404a81fd..8ae5800e807f 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -187,7 +187,6 @@ void __init s5p6440_map_io(void)
        s5p6440_default_sdhci2();
        iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
-        init_consistent_dma_size(SZ_8M);
 }
 void __init s5p6450_map_io(void)
@@ -202,7 +201,6 @@ void __init s5p6450_map_io(void)
        s5p6450_default_sdhci2();
        iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
-        init_consistent_dma_size(SZ_8M);
 }
 /*
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index a0c50efe8145..9dfe93e2624d 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -169,8 +169,6 @@ void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
 void __init s5pv210_map_io(void)
 {
-        init_consistent_dma_size(14 << 20);
        /* initialise device information early */
        s5pv210_default_sdhci0();
        s5pv210_default_sdhci1();
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 55e1dba4ffde..c72b31078c99 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -774,7 +774,6 @@ static void __init goni_pmic_init(void)
 /* MoviNAND */
 static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
        .max_width              = 4,
-        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
        .cd_type                = S3C_SDHCI_CD_PERMANENT,
 };
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 11bb1d984197..96f11394c7c0 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -66,12 +66,6 @@ static struct map_desc r8a7740_io_desc[] __initdata = {
 void __init r8a7740_map_io(void)
 {
        iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));
-        /*
-         * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
-         * enough to allocate the frame buffer memory.
-         */
-        init_consistent_dma_size(12 << 20);
 }
 /* SCIFA0 */
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index a07954fbcd22..be6f746c97fa 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -58,12 +58,6 @@ static struct map_desc sh7372_io_desc[] __initdata = {
 void __init sh7372_map_io(void)
 {
        iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));
-        /*
-         * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
-         * enough to allocate the frame buffer memory.
-         */
-        init_consistent_dma_size(12 << 20);
 }
 /* SCIFA0 */
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b8efac4daed8..d8632ebb1eaf 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -82,8 +82,6 @@ static struct map_desc u300_io_desc[] __initdata = {
 static void __init u300_map_io(void)
 {
        iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc));
-        /* We enable a real big DMA buffer if need be. */
-        init_consistent_dma_size(SZ_4M);
 }
 /*
diff --git a/arch/arm/mach-vt8500/include/mach/hardware.h b/arch/arm/mach-vt8500/include/mach/hardware.h
deleted file mode 100644
index db4163f72c39..000000000000
--- a/arch/arm/mach-vt8500/include/mach/hardware.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* arch/arm/mach-vt8500/include/mach/hardware.h
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
diff --git a/arch/arm/mach-vt8500/include/mach/i8042.h b/arch/arm/mach-vt8500/include/mach/i8042.h
deleted file mode 100644
index cd7143cad6f3..000000000000
--- a/arch/arm/mach-vt8500/include/mach/i8042.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-vt8500/include/mach/i8042.h
- *
- * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-extern unsigned long wmt_i8042_base __initdata;
-extern int wmt_i8042_kbd_irq;
-extern int wmt_i8042_aux_irq;
diff --git a/arch/arm/mach-vt8500/include/mach/restart.h b/arch/arm/mach-vt8500/include/mach/restart.h
deleted file mode 100644
index 738979518acb..000000000000
--- a/arch/arm/mach-vt8500/include/mach/restart.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/arch/arm/mach-vt8500/restart.h
- *
- * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-void vt8500_setup_restart(void);
-void vt8500_restart(char mode, const char *cmd);
diff --git a/arch/arm/mach-vt8500/timer.c b/arch/arm/mach-vt8500/timer.c
index 050e1833f2d0..3dd21a47881f 100644
--- a/arch/arm/mach-vt8500/timer.c
+++ b/arch/arm/mach-vt8500/timer.c
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/mach-vt8500/timer_dt.c
+ *  arch/arm/mach-vt8500/timer.c
 *
 *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
 *  Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index 8d3871f110a5..a5bd28692b06 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -31,8 +31,6 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
-#include <mach/restart.h>
 #include "common.h"
 #define LEGACY_GPIO_BASE        0xD8110000
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 82fcb206b5b2..665870dce3c8 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -154,6 +154,12 @@ config OMAP_32K_TIMER
          intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
          currently only available for OMAP16XX, 24XX, 34XX and OMAP4/5.
+          On OMAP2PLUS this value is only used for CONFIG_HZ and
+          CLOCK_TICK_RATE compile time calculation.
+          The actual timer selection is done in the board file
+          through the (DT_)MACHINE_START structure.
 config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
        bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
        depends on ARCH_OMAP3 && PM
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index c43ea21f33b4..aa7ebc6bcd65 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -111,7 +111,7 @@ static int fpga_probe(struct platform_device *pdev)
        if (!iomem)
                return -ENODEV;
-        fpga = ioremap(iomem->start, H2P2_DBG_FPGA_SIZE);
+        fpga = ioremap(iomem->start, resource_size(iomem));
        __raw_writew(0xff, &fpga->leds);
        for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) {
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 9dca23e4d6b0..89585c293554 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -35,6 +35,7 @@
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */
+#include <linux/clk.h>
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/device.h>
@@ -42,6 +43,8 @@
 #include <linux/pm_runtime.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/dmtimer-omap.h>
 #include <plat/dmtimer.h>
@@ -83,10 +86,6 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
 static void omap_timer_restore_context(struct omap_dm_timer *timer)
 {
-        if (timer->revision == 1)
-                __raw_writel(timer->context.tistat, timer->sys_stat);
-        __raw_writel(timer->context.tisr, timer->irq_stat);
        omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
                                timer->context.twer);
        omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
@@ -102,39 +101,38 @@ static void omap_timer_restore_context(struct omap_dm_timer *timer)
                                timer->context.tclr);
 }
-static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
+static int omap_dm_timer_reset(struct omap_dm_timer *timer)
 {
-        int c;
+        u32 l, timeout = 100000;
-        if (!timer->sys_stat)
+        if (timer->revision != 1)
-                return;
+                return -EINVAL;
-        c = 0;
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
-        while (!(__raw_readl(timer->sys_stat) & 1)) {
-                c++;
-                if (c > 100000) {
-                        printk(KERN_ERR "Timer failed to reset\n");
-                        return;
-                }
-        }
-}
-static void omap_dm_timer_reset(struct omap_dm_timer *timer)
+        do {
-{
+                l = __omap_dm_timer_read(timer,
-        omap_dm_timer_enable(timer);
+                                         OMAP_TIMER_V1_SYS_STAT_OFFSET, 0);
-        if (timer->pdev->id != 1) {
+        } while (!l && timeout--);
-                omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
-                omap_dm_timer_wait_for_reset(timer);
+        if (!timeout) {
+                dev_err(&timer->pdev->dev, "Timer failed to reset\n");
+                return -ETIMEDOUT;
        }
-        __omap_dm_timer_reset(timer, 0, 0);
+        /* Configure timer for smart-idle mode */
-        omap_dm_timer_disable(timer);
+        l = __omap_dm_timer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET, 0);
-        timer->posted = 1;
+        l |= 0x2 << 0x3;
+        __omap_dm_timer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, l, 0);
+        timer->posted = 0;
+        return 0;
 }
-int omap_dm_timer_prepare(struct omap_dm_timer *timer)
+static int omap_dm_timer_prepare(struct omap_dm_timer *timer)
 {
-        int ret;
+        int rc;
        /*
         * FIXME: OMAP1 devices do not use the clock framework for dmtimers so
@@ -149,13 +147,20 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer)
                }
        }
-        if (timer->capability & OMAP_TIMER_NEEDS_RESET)
+        omap_dm_timer_enable(timer);
-                omap_dm_timer_reset(timer);
-        ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
+        if (timer->capability & OMAP_TIMER_NEEDS_RESET) {
+                rc = omap_dm_timer_reset(timer);
+                if (rc) {
+                        omap_dm_timer_disable(timer);
+                        return rc;
+                }
+        }
-        timer->posted = 1;
+        __omap_dm_timer_enable_posted(timer);
-        return ret;
+        omap_dm_timer_disable(timer);
+        return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
 }
 static inline u32 omap_dm_timer_reserved_systimer(int id)
@@ -449,7 +454,6 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
         */
        timer->context.tclr =
                        omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
-        timer->context.tisr = __raw_readl(timer->irq_stat);
        omap_dm_timer_disable(timer);
        return 0;
 }
@@ -459,7 +463,7 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 {
        int ret;
        char *parent_name = NULL;
-        struct clk *fclk, *parent;
+        struct clk *parent;
        struct dmtimer_platform_data *pdata;
        if (unlikely(!timer))
@@ -478,11 +482,8 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
        if (pdata && pdata->set_timer_src)
                return pdata->set_timer_src(timer->pdev, source);
-        fclk = clk_get(&timer->pdev->dev, "fck");
+        if (!timer->fclk)
-        if (IS_ERR_OR_NULL(fclk)) {
-                pr_err("%s: fck not found\n", __func__);
                return -EINVAL;
-        }
        switch (source) {
        case OMAP_TIMER_SRC_SYS_CLK:
@@ -501,18 +502,15 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
        parent = clk_get(&timer->pdev->dev, parent_name);
        if (IS_ERR_OR_NULL(parent)) {
                pr_err("%s: %s not found\n", __func__, parent_name);
-                ret = -EINVAL;
+                return -EINVAL;
-                goto out;
        }
-        ret = clk_set_parent(fclk, parent);
+        ret = clk_set_parent(timer->fclk, parent);
        if (IS_ERR_VALUE(ret))
                pr_err("%s: failed to set %s as parent\n", __func__,
                        parent_name);
        clk_put(parent);
-out:
-        clk_put(fclk);
        return ret;
 }
@@ -595,8 +593,8 @@ int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
                l |= OMAP_TIMER_CTRL_CE;
        else
                l &= ~OMAP_TIMER_CTRL_CE;
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
        omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
        /* Save the context */
        timer->context.tclr = l;
@@ -672,6 +670,37 @@ int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
+/**
+ * omap_dm_timer_set_int_disable - disable timer interrupts
+ * @timer:      pointer to timer handle
+ * @mask:       bit mask of interrupts to be disabled
+ *
+ * Disables the specified timer interrupts for a timer.
+ */
+int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
+{
+        u32 l = mask;
+        if (unlikely(!timer))
+                return -EINVAL;
+        omap_dm_timer_enable(timer);
+        if (timer->revision == 1)
+                l = __raw_readl(timer->irq_ena) & ~mask;
+        __raw_writel(l, timer->irq_dis);
+        l = omap_dm_timer_read_reg(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask;
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, l);
+        /* Save the context */
+        timer->context.tier &= ~mask;
+        timer->context.twer &= ~mask;
+        omap_dm_timer_disable(timer);
+        return 0;
+}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_disable);
 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
 {
        unsigned int l;
@@ -693,8 +722,7 @@ int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
                return -EINVAL;
        __omap_dm_timer_write_status(timer, value);
-        /* Save the context */
-        timer->context.tisr = value;
        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
@@ -797,6 +825,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
                        timer->capability |= OMAP_TIMER_SECURE;
        } else {
                timer->id = pdev->id;
+                timer->errata = pdata->timer_errata;
                timer->capability = pdata->timer_capability;
                timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
                timer->get_context_loss_count = pdata->get_context_loss_count;
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index f8943c8f9dbf..a3fbc48c332e 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -32,7 +32,6 @@
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */
-#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
@@ -55,6 +54,10 @@
 #define OMAP_TIMER_TRIGGER_OVERFLOW             0x01
 #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02
+/* posted mode types */
+#define OMAP_TIMER_NONPOSTED                    0x00
+#define OMAP_TIMER_POSTED                       0x01
 /* timer capabilities used in hwmod database */
 #define OMAP_TIMER_SECURE                               0x80000000
 #define OMAP_TIMER_ALWON                                0x40000000
@@ -62,16 +65,22 @@
 #define OMAP_TIMER_NEEDS_RESET                          0x10000000
 #define OMAP_TIMER_HAS_DSP_IRQ                          0x08000000
+/*
+ * timer errata flags
+ *
+ * Errata i103/i767 impacts all OMAP3/4/5 devices including AM33xx. This
+ * errata prevents us from using posted mode on these devices, unless the
+ * timer counter register is never read. For more details please refer to
+ * the OMAP3/4/5 errata documents.
+ */
+#define OMAP_TIMER_ERRATA_I103_I767                     0x80000000
 struct omap_timer_capability_dev_attr {
        u32 timer_capability;
 };
-struct omap_dm_timer;
 struct timer_regs {
        u32 tidr;
-        u32 tistat;
-        u32 tisr;
        u32 tier;
        u32 twer;
        u32 tclr;
@@ -90,11 +99,29 @@ struct timer_regs {
        u32 towr;
 };
-struct dmtimer_platform_data {
+struct omap_dm_timer {
-        /* set_timer_src - Only used for OMAP1 devices */
+        int id;
-        int (*set_timer_src)(struct platform_device *pdev, int source);
+        int irq;
-        u32 timer_capability;
+        struct clk *fclk;
+        void __iomem    *io_base;
+        void __iomem    *irq_stat;      /* TISR/IRQSTATUS interrupt status */
+        void __iomem    *irq_ena;       /* irq enable */
+        void __iomem    *irq_dis;       /* irq disable, only on v2 ip */
+        void __iomem    *pend;          /* write pending */
+        void __iomem    *func_base;     /* function register base */
+        unsigned long rate;
+        unsigned reserved:1;
+        unsigned posted:1;
+        struct timer_regs context;
        int (*get_context_loss_count)(struct device *);
+        int ctx_loss_count;
+        int revision;
+        u32 capability;
+        u32 errata;
+        struct platform_device *pdev;
+        struct list_head node;
 };
 int omap_dm_timer_reserve_systimer(int id);
@@ -122,6 +149,7 @@ int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, i
 int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
 int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask);
 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer);
 int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
@@ -247,34 +275,6 @@ int omap_dm_timers_active(void);
 #define OMAP_TIMER_TICK_INT_MASK_COUNT_REG                              \
                (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
-struct omap_dm_timer {
-        unsigned long phys_base;
-        int id;
-        int irq;
-        struct clk *fclk;
-        void __iomem    *io_base;
-        void __iomem    *sys_stat;      /* TISTAT timer status */
-        void __iomem    *irq_stat;      /* TISR/IRQSTATUS interrupt status */
-        void __iomem    *irq_ena;       /* irq enable */
-        void __iomem    *irq_dis;       /* irq disable, only on v2 ip */
-        void __iomem    *pend;          /* write pending */
-        void __iomem    *func_base;     /* function register base */
-        unsigned long rate;
-        unsigned reserved:1;
-        unsigned posted:1;
-        struct timer_regs context;
-        int (*get_context_loss_count)(struct device *);
-        int ctx_loss_count;
-        int revision;
-        u32 capability;
-        struct platform_device *pdev;
-        struct list_head node;
-};
-int omap_dm_timer_prepare(struct omap_dm_timer *timer);
 static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg,
                                                int posted)
 {
@@ -303,16 +303,13 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
        tidr = __raw_readl(timer->io_base);
        if (!(tidr >> 16)) {
                timer->revision = 1;
-                timer->sys_stat = timer->io_base +
-                                OMAP_TIMER_V1_SYS_STAT_OFFSET;
                timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET;
                timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;
-                timer->irq_dis = NULL;
+                timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;
                timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET;
                timer->func_base = timer->io_base;
        } else {
                timer->revision = 2;
-                timer->sys_stat = NULL;
                timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS;
                timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET;
                timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR;
@@ -323,45 +320,44 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
        }
 }
-/* Assumes the source clock has been set by caller */
+/*
-static inline void __omap_dm_timer_reset(struct omap_dm_timer *timer,
+ * __omap_dm_timer_enable_posted - enables write posted mode
-                                        int autoidle, int wakeup)
+ * @timer:      pointer to timer instance handle
+ *
+ * Enables the write posted mode for the timer. When posted mode is enabled
+ * writes to certain timer registers are immediately acknowledged by the
+ * internal bus and hence prevents stalling the CPU waiting for the write to
+ * complete. Enabling this feature can improve performance for writing to the
+ * timer registers.
+ */
+static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
 {
-        u32 l;
+        if (timer->posted)
+                return;
-        l = __raw_readl(timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
+        if (timer->errata & OMAP_TIMER_ERRATA_I103_I767)
-        l |= 0x02 << 3;  /* Set to smart-idle mode */
+                return;
-        l |= 0x2 << 8;   /* Set clock activity to perserve f-clock on idle */
-        if (autoidle)
-                l |= 0x1 << 0;
-        if (wakeup)
-                l |= 1 << 2;
-        __raw_writel(l, timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
-        /* Match hardware reset default of posted mode */
        __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,
-                                        OMAP_TIMER_CTRL_POSTED, 0);
+                              OMAP_TIMER_CTRL_POSTED, 0);
+        timer->context.tsicr = OMAP_TIMER_CTRL_POSTED;
+        timer->posted = OMAP_TIMER_POSTED;
 }
-static inline int __omap_dm_timer_set_source(struct clk *timer_fck,
+/**
-                                                struct clk *parent)
+ * __omap_dm_timer_override_errata - override errata flags for a timer
+ * @timer:      pointer to timer handle
+ * @errata:     errata flags to be ignored
+ *
+ * For a given timer, override a timer errata by clearing the flags
+ * specified by the errata argument. A specific erratum should only be
+ * overridden for a timer if the timer is used in such a way the erratum
+ * has no impact.
+ */
+static inline void __omap_dm_timer_override_errata(struct omap_dm_timer *timer,
+                                                   u32 errata)
 {
-        int ret;
+        timer->errata &= ~errata;
-        clk_disable(timer_fck);
-        ret = clk_set_parent(timer_fck, parent);
-        clk_enable(timer_fck);
-        /*
-         * When the functional clock disappears, too quick writes seem
-         * to cause an abort. XXX Is this still necessary?
-         */
-        __delay(300000);
-        return ret;
 }
 static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer,
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index af8e484001e5..1fc941944912 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -5,7 +5,6 @@
 obj-y   := dma.o
 obj-$(CONFIG_PXA3xx)            += mfp.o
-obj-$(CONFIG_PXA95x)            += mfp.o
 obj-$(CONFIG_ARCH_MMP)          += mfp.o
 obj-$(CONFIG_PXA_SSP)           += ssp.o
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 5c79c29f2833..10bc4f3757d1 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -423,7 +423,7 @@ typedef unsigned long mfp_cfg_t;
        ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
         (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
-#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) || defined(CONFIG_ARCH_MMP)
+#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_MMP)
 /*
 * each MFP pin will have a MFPR register, since the offset of the
 * register varies between processors, the processor specific code
@@ -470,6 +470,6 @@ void mfp_write(int mfp, unsigned long mfpr_val);
 void mfp_config(unsigned long *mfp_cfgs, int num);
 void mfp_config_run(void);
 void mfp_config_lpm(void);
-#endif /* CONFIG_PXA3xx || CONFIG_PXA95x || CONFIG_ARCH_MMP */
+#endif /* CONFIG_PXA3xx || CONFIG_ARCH_MMP */
 #endif /* __ASM_PLAT_MFP_H */
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index b1e05ccff3ac..37542c2689a2 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -344,7 +344,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
        int ret;
        unsigned tmp;
-        adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
+        adc = devm_kzalloc(dev, sizeof(struct adc_device), GFP_KERNEL);
        if (adc == NULL) {
                dev_err(dev, "failed to allocate adc_device\n");
                return -ENOMEM;
@@ -355,50 +355,46 @@ static int s3c_adc_probe(struct platform_device *pdev)
        adc->pdev = pdev;
        adc->prescale = S3C2410_ADCCON_PRSCVL(49);
-        adc->vdd = regulator_get(dev, "vdd");
+        adc->vdd = devm_regulator_get(dev, "vdd");
        if (IS_ERR(adc->vdd)) {
                dev_err(dev, "operating without regulator \"vdd\" .\n");
-                ret = PTR_ERR(adc->vdd);
+                return PTR_ERR(adc->vdd);
-                goto err_alloc;
        }
        adc->irq = platform_get_irq(pdev, 1);
        if (adc->irq <= 0) {
                dev_err(dev, "failed to get adc irq\n");
-                ret = -ENOENT;
+                return -ENOENT;
-                goto err_reg;
        }
-        ret = request_irq(adc->irq, s3c_adc_irq, 0, dev_name(dev), adc);
+        ret = devm_request_irq(dev, adc->irq, s3c_adc_irq, 0, dev_name(dev),
+                                adc);
        if (ret < 0) {
                dev_err(dev, "failed to attach adc irq\n");
-                goto err_reg;
+                return ret;
        }
-        adc->clk = clk_get(dev, "adc");
+        adc->clk = devm_clk_get(dev, "adc");
        if (IS_ERR(adc->clk)) {
                dev_err(dev, "failed to get adc clock\n");
-                ret = PTR_ERR(adc->clk);
+                return PTR_ERR(adc->clk);
-                goto err_irq;
        }
        regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!regs) {
                dev_err(dev, "failed to find registers\n");
-                ret = -ENXIO;
+                return -ENXIO;
-                goto err_clk;
        }
-        adc->regs = ioremap(regs->start, resource_size(regs));
+        adc->regs = devm_request_and_ioremap(dev, regs);
        if (!adc->regs) {
                dev_err(dev, "failed to map registers\n");
-                ret = -ENXIO;
+                return -ENXIO;
-                goto err_clk;
        }
        ret = regulator_enable(adc->vdd);
        if (ret)
-                goto err_ioremap;
+                return ret;
        clk_enable(adc->clk);
@@ -418,32 +414,14 @@ static int s3c_adc_probe(struct platform_device *pdev)
        adc_dev = adc;
        return 0;
- err_ioremap:
-        iounmap(adc->regs);
- err_clk:
-        clk_put(adc->clk);
- err_irq:
-        free_irq(adc->irq, adc);
- err_reg:
-        regulator_put(adc->vdd);
- err_alloc:
-        kfree(adc);
-        return ret;
 }
 static int __devexit s3c_adc_remove(struct platform_device *pdev)
 {
        struct adc_device *adc = platform_get_drvdata(pdev);
-        iounmap(adc->regs);
-        free_irq(adc->irq, adc);
        clk_disable(adc->clk);
        regulator_disable(adc->vdd);
-        regulator_put(adc->vdd);
-        clk_put(adc->clk);
-        kfree(adc);
        return 0;
 }
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 52dfa8f914c7..bc50b20a8ffc 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -486,11 +486,7 @@ static struct resource s3c_i2c0_resource[] = {
 struct platform_device s3c_device_i2c0 = {
        .name           = "s3c2410-i2c",
-#ifdef CONFIG_S3C_DEV_I2C1
        .id             = 0,
-#else
-        .id             = -1,
-#endif
        .num_resources  = ARRAY_SIZE(s3c_i2c0_resource),
        .resource       = s3c_i2c0_resource,
 };