aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-vexpress/include
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-vexpress/include')
-rw-r--r--arch/arm/mach-vexpress/include/mach/ct-ca9x4.h5
-rw-r--r--arch/arm/mach-vexpress/include/mach/debug-macro.S30
-rw-r--r--arch/arm/mach-vexpress/include/mach/entry-macro.S5
-rw-r--r--arch/arm/mach-vexpress/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-vexpress/include/mach/motherboard.h58
-rw-r--r--arch/arm/mach-vexpress/include/mach/system.h33
-rw-r--r--arch/arm/mach-vexpress/include/mach/uncompress.h22
7 files changed, 80 insertions, 75 deletions
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
index a34d3d4faae1..84acf8439d4b 100644
--- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
+++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
@@ -22,9 +22,6 @@
22#define CT_CA9X4_SYSWDT (0x1e007000) 22#define CT_CA9X4_SYSWDT (0x1e007000)
23#define CT_CA9X4_L2CC (0x1e00a000) 23#define CT_CA9X4_L2CC (0x1e00a000)
24 24
25#define CT_CA9X4_TIMER0 (CT_CA9X4_SP804_TIMER + 0x000)
26#define CT_CA9X4_TIMER1 (CT_CA9X4_SP804_TIMER + 0x020)
27
28#define A9_MPCORE_SCU (CT_CA9X4_MPIC + 0x0000) 25#define A9_MPCORE_SCU (CT_CA9X4_MPIC + 0x0000)
29#define A9_MPCORE_GIC_CPU (CT_CA9X4_MPIC + 0x0100) 26#define A9_MPCORE_GIC_CPU (CT_CA9X4_MPIC + 0x0100)
30#define A9_MPCORE_GIT (CT_CA9X4_MPIC + 0x0200) 27#define A9_MPCORE_GIT (CT_CA9X4_MPIC + 0x0200)
@@ -35,7 +32,7 @@
35 * Interrupts. Those in {} are for AMBA devices 32 * Interrupts. Those in {} are for AMBA devices
36 */ 33 */
37#define IRQ_CT_CA9X4_CLCDC { 76 } 34#define IRQ_CT_CA9X4_CLCDC { 76 }
38#define IRQ_CT_CA9X4_DMC { -1 } 35#define IRQ_CT_CA9X4_DMC { 0 }
39#define IRQ_CT_CA9X4_SMC { 77, 78 } 36#define IRQ_CT_CA9X4_SMC { 77, 78 }
40#define IRQ_CT_CA9X4_TIMER0 80 37#define IRQ_CT_CA9X4_TIMER0 80
41#define IRQ_CT_CA9X4_TIMER1 81 38#define IRQ_CT_CA9X4_TIMER1 81
diff --git a/arch/arm/mach-vexpress/include/mach/debug-macro.S b/arch/arm/mach-vexpress/include/mach/debug-macro.S
index fd9e6c7ea49f..fa8224794e0b 100644
--- a/arch/arm/mach-vexpress/include/mach/debug-macro.S
+++ b/arch/arm/mach-vexpress/include/mach/debug-macro.S
@@ -10,12 +10,34 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12 12
13#define DEBUG_LL_UART_OFFSET 0x00009000 13#define DEBUG_LL_PHYS_BASE 0x10000000
14#define DEBUG_LL_UART_OFFSET 0x00009000
15
16#define DEBUG_LL_PHYS_BASE_RS1 0x1c000000
17#define DEBUG_LL_UART_OFFSET_RS1 0x00090000
18
19#define DEBUG_LL_VIRT_BASE 0xf8000000
14 20
15 .macro addruart,rp,rv,tmp 21 .macro addruart,rp,rv,tmp
16 mov \rp, #DEBUG_LL_UART_OFFSET 22
17 orr \rv, \rp, #0xf8000000 @ virtual base 23 @ Make an educated guess regarding the memory map:
18 orr \rp, \rp, #0x10000000 @ physical base 24 @ - the original A9 core tile, which has MPCore peripherals
25 @ located at 0x1e000000, should use UART at 0x10009000
26 @ - all other (RS1 complaint) tiles use UART mapped
27 @ at 0x1c090000
28 mrc p15, 4, \tmp, c15, c0, 0
29 cmp \tmp, #0x1e000000
30
31 @ Original memory map
32 moveq \rp, #DEBUG_LL_UART_OFFSET
33 orreq \rv, \rp, #DEBUG_LL_VIRT_BASE
34 orreq \rp, \rp, #DEBUG_LL_PHYS_BASE
35
36 @ RS1 memory map
37 movne \rp, #DEBUG_LL_UART_OFFSET_RS1
38 orrne \rv, \rp, #DEBUG_LL_VIRT_BASE
39 orrne \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1
40
19 .endm 41 .endm
20 42
21#include <asm/hardware/debug-pl01x.S> 43#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
deleted file mode 100644
index a14f9e62ca92..000000000000
--- a/arch/arm/mach-vexpress/include/mach/entry-macro.S
+++ /dev/null
@@ -1,5 +0,0 @@
1 .macro disable_fiq
2 .endm
3
4 .macro arch_ret_to_user, tmp1, tmp2
5 .endm
diff --git a/arch/arm/mach-vexpress/include/mach/irqs.h b/arch/arm/mach-vexpress/include/mach/irqs.h
index 7054cbfc9de5..4b10ee7657a6 100644
--- a/arch/arm/mach-vexpress/include/mach/irqs.h
+++ b/arch/arm/mach-vexpress/include/mach/irqs.h
@@ -1,4 +1,4 @@
1#define IRQ_LOCALTIMER 29 1#define IRQ_LOCALTIMER 29
2#define IRQ_LOCALWDOG 30 2#define IRQ_LOCALWDOG 30
3 3
4#define NR_IRQS 128 4#define NR_IRQS 256
diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h
index 0a3a37518405..31a92890893d 100644
--- a/arch/arm/mach-vexpress/include/mach/motherboard.h
+++ b/arch/arm/mach-vexpress/include/mach/motherboard.h
@@ -39,33 +39,30 @@
39#define V2M_CF (V2M_PA_CS7 + 0x0001a000) 39#define V2M_CF (V2M_PA_CS7 + 0x0001a000)
40#define V2M_CLCD (V2M_PA_CS7 + 0x0001f000) 40#define V2M_CLCD (V2M_PA_CS7 + 0x0001f000)
41 41
42#define V2M_SYS_ID (V2M_SYSREGS + 0x000) 42/*
43#define V2M_SYS_SW (V2M_SYSREGS + 0x004) 43 * Offsets from SYSREGS base
44#define V2M_SYS_LED (V2M_SYSREGS + 0x008) 44 */
45#define V2M_SYS_100HZ (V2M_SYSREGS + 0x024) 45#define V2M_SYS_ID 0x000
46#define V2M_SYS_FLAGS (V2M_SYSREGS + 0x030) 46#define V2M_SYS_SW 0x004
47#define V2M_SYS_FLAGSSET (V2M_SYSREGS + 0x030) 47#define V2M_SYS_LED 0x008
48#define V2M_SYS_FLAGSCLR (V2M_SYSREGS + 0x034) 48#define V2M_SYS_100HZ 0x024
49#define V2M_SYS_NVFLAGS (V2M_SYSREGS + 0x038) 49#define V2M_SYS_FLAGS 0x030
50#define V2M_SYS_NVFLAGSSET (V2M_SYSREGS + 0x038) 50#define V2M_SYS_FLAGSSET 0x030
51#define V2M_SYS_NVFLAGSCLR (V2M_SYSREGS + 0x03c) 51#define V2M_SYS_FLAGSCLR 0x034
52#define V2M_SYS_MCI (V2M_SYSREGS + 0x048) 52#define V2M_SYS_NVFLAGS 0x038
53#define V2M_SYS_FLASH (V2M_SYSREGS + 0x03c) 53#define V2M_SYS_NVFLAGSSET 0x038
54#define V2M_SYS_CFGSW (V2M_SYSREGS + 0x058) 54#define V2M_SYS_NVFLAGSCLR 0x03c
55#define V2M_SYS_24MHZ (V2M_SYSREGS + 0x05c) 55#define V2M_SYS_MCI 0x048
56#define V2M_SYS_MISC (V2M_SYSREGS + 0x060) 56#define V2M_SYS_FLASH 0x03c
57#define V2M_SYS_DMA (V2M_SYSREGS + 0x064) 57#define V2M_SYS_CFGSW 0x058
58#define V2M_SYS_PROCID0 (V2M_SYSREGS + 0x084) 58#define V2M_SYS_24MHZ 0x05c
59#define V2M_SYS_PROCID1 (V2M_SYSREGS + 0x088) 59#define V2M_SYS_MISC 0x060
60#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) 60#define V2M_SYS_DMA 0x064
61#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) 61#define V2M_SYS_PROCID0 0x084
62#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) 62#define V2M_SYS_PROCID1 0x088
63 63#define V2M_SYS_CFGDATA 0x0a0
64#define V2M_TIMER0 (V2M_TIMER01 + 0x000) 64#define V2M_SYS_CFGCTRL 0x0a4
65#define V2M_TIMER1 (V2M_TIMER01 + 0x020) 65#define V2M_SYS_CFGSTAT 0x0a8
66
67#define V2M_TIMER2 (V2M_TIMER23 + 0x000)
68#define V2M_TIMER3 (V2M_TIMER23 + 0x020)
69 66
70 67
71/* 68/*
@@ -117,6 +114,13 @@
117 114
118int v2m_cfg_write(u32 devfn, u32 data); 115int v2m_cfg_write(u32 devfn, u32 data);
119int v2m_cfg_read(u32 devfn, u32 *data); 116int v2m_cfg_read(u32 devfn, u32 *data);
117void v2m_flags_set(u32 data);
118
119/*
120 * Miscellaneous
121 */
122#define SYS_MISC_MASTERSITE (1 << 14)
123#define SYS_PROCIDx_HBI_MASK 0xfff
120 124
121/* 125/*
122 * Core tile IDs 126 * Core tile IDs
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
deleted file mode 100644
index f653a8e265bd..000000000000
--- a/arch/arm/mach-vexpress/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24static inline void arch_idle(void)
25{
26 /*
27 * This should do all the clock switching
28 * and wait for interrupt tricks
29 */
30 cpu_do_idle();
31}
32
33#endif
diff --git a/arch/arm/mach-vexpress/include/mach/uncompress.h b/arch/arm/mach-vexpress/include/mach/uncompress.h
index 7972c5748d0e..7dab5596b868 100644
--- a/arch/arm/mach-vexpress/include/mach/uncompress.h
+++ b/arch/arm/mach-vexpress/include/mach/uncompress.h
@@ -22,7 +22,27 @@
22#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30)) 22#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30))
23#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18)) 23#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18))
24 24
25#define get_uart_base() (0x10000000 + 0x00009000) 25#define UART_BASE 0x10009000
26#define UART_BASE_RS1 0x1c090000
27
28static unsigned long get_uart_base(void)
29{
30 unsigned long mpcore_periph;
31
32 /*
33 * Make an educated guess regarding the memory map:
34 * - the original A9 core tile, which has MPCore peripherals
35 * located at 0x1e000000, should use UART at 0x10009000
36 * - all other (RS1 complaint) tiles use UART mapped
37 * at 0x1c090000
38 */
39 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (mpcore_periph));
40
41 if (mpcore_periph == 0x1e000000)
42 return UART_BASE;
43 else
44 return UART_BASE_RS1;
45}
26 46
27/* 47/*
28 * This does not append a newline 48 * This does not append a newline