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-rw-r--r--arch/arm/mach-shmobile/Kconfig13
-rw-r--r--arch/arm/mach-shmobile/Makefile2
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c82
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c62
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c456
-rw-r--r--arch/arm/mach-shmobile/board-bonito.c10
-rw-r--r--arch/arm/mach-shmobile/board-g4evm.c52
-rw-r--r--arch/arm/mach-shmobile/board-kota2.c30
-rw-r--r--arch/arm/mach-shmobile/board-kzm9d.c11
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c321
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c27
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7740.c150
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7779.c2
-rw-r--r--arch/arm/mach-shmobile/clock-sh7367.c2
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c2
-rw-r--r--arch/arm/mach-shmobile/clock-sh7377.c2
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c16
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h1
-rw-r--r--arch/arm/mach-shmobile/include/mach/pm-rmobile.h44
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7740.h33
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7372.h45
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh73a0.h7
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7740.c13
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7779.c7
-rw-r--r--arch/arm/mach-shmobile/pfc-r8a7740.c24
-rw-r--r--arch/arm/mach-shmobile/platsmp.c5
-rw-r--r--arch/arm/mach-shmobile/pm-r8a7740.c54
-rw-r--r--arch/arm/mach-shmobile/pm-rmobile.c167
-rw-r--r--arch/arm/mach-shmobile/pm-sh7372.c292
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7740.c360
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c80
-rw-r--r--arch/arm/mach-shmobile/setup-sh7377.c47
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c152
33 files changed, 2157 insertions, 414 deletions
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index df33909205e2..4cacc2d22fbe 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -19,6 +19,7 @@ config ARCH_SH7372
19 select CPU_V7 19 select CPU_V7
20 select SH_CLK_CPG 20 select SH_CLK_CPG
21 select ARCH_WANT_OPTIONAL_GPIOLIB 21 select ARCH_WANT_OPTIONAL_GPIOLIB
22 select ARM_CPU_SUSPEND if PM || CPU_IDLE
22 23
23config ARCH_SH73A0 24config ARCH_SH73A0
24 bool "SH-Mobile AG5 (R8A73A00)" 25 bool "SH-Mobile AG5 (R8A73A00)"
@@ -58,6 +59,7 @@ config MACH_G4EVM
58 bool "G4EVM board" 59 bool "G4EVM board"
59 depends on ARCH_SH7377 60 depends on ARCH_SH7377
60 select ARCH_REQUIRE_GPIOLIB 61 select ARCH_REQUIRE_GPIOLIB
62 select REGULATOR_FIXED_VOLTAGE if REGULATOR
61 63
62config MACH_AP4EVB 64config MACH_AP4EVB
63 bool "AP4EVB board" 65 bool "AP4EVB board"
@@ -65,6 +67,7 @@ config MACH_AP4EVB
65 select ARCH_REQUIRE_GPIOLIB 67 select ARCH_REQUIRE_GPIOLIB
66 select SH_LCD_MIPI_DSI 68 select SH_LCD_MIPI_DSI
67 select SND_SOC_AK4642 if SND_SIMPLE_CARD 69 select SND_SOC_AK4642 if SND_SIMPLE_CARD
70 select REGULATOR_FIXED_VOLTAGE if REGULATOR
68 71
69choice 72choice
70 prompt "AP4EVB LCD panel selection" 73 prompt "AP4EVB LCD panel selection"
@@ -83,6 +86,7 @@ config MACH_AG5EVM
83 bool "AG5EVM board" 86 bool "AG5EVM board"
84 select ARCH_REQUIRE_GPIOLIB 87 select ARCH_REQUIRE_GPIOLIB
85 select SH_LCD_MIPI_DSI 88 select SH_LCD_MIPI_DSI
89 select REGULATOR_FIXED_VOLTAGE if REGULATOR
86 depends on ARCH_SH73A0 90 depends on ARCH_SH73A0
87 91
88config MACH_MACKEREL 92config MACH_MACKEREL
@@ -90,15 +94,18 @@ config MACH_MACKEREL
90 depends on ARCH_SH7372 94 depends on ARCH_SH7372
91 select ARCH_REQUIRE_GPIOLIB 95 select ARCH_REQUIRE_GPIOLIB
92 select SND_SOC_AK4642 if SND_SIMPLE_CARD 96 select SND_SOC_AK4642 if SND_SIMPLE_CARD
97 select REGULATOR_FIXED_VOLTAGE if REGULATOR
93 98
94config MACH_KOTA2 99config MACH_KOTA2
95 bool "KOTA2 board" 100 bool "KOTA2 board"
96 select ARCH_REQUIRE_GPIOLIB 101 select ARCH_REQUIRE_GPIOLIB
102 select REGULATOR_FIXED_VOLTAGE if REGULATOR
97 depends on ARCH_SH73A0 103 depends on ARCH_SH73A0
98 104
99config MACH_BONITO 105config MACH_BONITO
100 bool "bonito board" 106 bool "bonito board"
101 select ARCH_REQUIRE_GPIOLIB 107 select ARCH_REQUIRE_GPIOLIB
108 select REGULATOR_FIXED_VOLTAGE if REGULATOR
102 depends on ARCH_R8A7740 109 depends on ARCH_R8A7740
103 110
104config MACH_ARMADILLO800EVA 111config MACH_ARMADILLO800EVA
@@ -106,22 +113,28 @@ config MACH_ARMADILLO800EVA
106 depends on ARCH_R8A7740 113 depends on ARCH_R8A7740
107 select ARCH_REQUIRE_GPIOLIB 114 select ARCH_REQUIRE_GPIOLIB
108 select USE_OF 115 select USE_OF
116 select REGULATOR_FIXED_VOLTAGE if REGULATOR
117 select SND_SOC_WM8978 if SND_SIMPLE_CARD
109 118
110config MACH_MARZEN 119config MACH_MARZEN
111 bool "MARZEN board" 120 bool "MARZEN board"
112 depends on ARCH_R8A7779 121 depends on ARCH_R8A7779
113 select ARCH_REQUIRE_GPIOLIB 122 select ARCH_REQUIRE_GPIOLIB
123 select REGULATOR_FIXED_VOLTAGE if REGULATOR
114 124
115config MACH_KZM9D 125config MACH_KZM9D
116 bool "KZM9D board" 126 bool "KZM9D board"
117 depends on ARCH_EMEV2 127 depends on ARCH_EMEV2
118 select USE_OF 128 select USE_OF
129 select REGULATOR_FIXED_VOLTAGE if REGULATOR
119 130
120config MACH_KZM9G 131config MACH_KZM9G
121 bool "KZM-A9-GT board" 132 bool "KZM-A9-GT board"
122 depends on ARCH_SH73A0 133 depends on ARCH_SH73A0
123 select ARCH_REQUIRE_GPIOLIB 134 select ARCH_REQUIRE_GPIOLIB
124 select USE_OF 135 select USE_OF
136 select SND_SOC_AK4642 if SND_SIMPLE_CARD
137 select REGULATOR_FIXED_VOLTAGE if REGULATOR
125 138
126comment "SH-Mobile System Configuration" 139comment "SH-Mobile System Configuration"
127 140
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 8aa1962c22a2..0df5ae6740c6 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -39,7 +39,9 @@ obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o
39# PM objects 39# PM objects
40obj-$(CONFIG_SUSPEND) += suspend.o 40obj-$(CONFIG_SUSPEND) += suspend.o
41obj-$(CONFIG_CPU_IDLE) += cpuidle.o 41obj-$(CONFIG_CPU_IDLE) += cpuidle.o
42obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o
42obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o 43obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o
44obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o
43obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o 45obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
44 46
45# Board objects 47# Board objects
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 5a6f22f05e99..d82c010fdfc6 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -27,6 +27,8 @@
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/dma-mapping.h> 29#include <linux/dma-mapping.h>
30#include <linux/regulator/fixed.h>
31#include <linux/regulator/machine.h>
30#include <linux/serial_sci.h> 32#include <linux/serial_sci.h>
31#include <linux/smsc911x.h> 33#include <linux/smsc911x.h>
32#include <linux/gpio.h> 34#include <linux/gpio.h>
@@ -52,6 +54,12 @@
52#include <asm/hardware/cache-l2x0.h> 54#include <asm/hardware/cache-l2x0.h>
53#include <asm/traps.h> 55#include <asm/traps.h>
54 56
57/* Dummy supplies, where voltage doesn't matter */
58static struct regulator_consumer_supply dummy_supplies[] = {
59 REGULATOR_SUPPLY("vddvario", "smsc911x"),
60 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
61};
62
55static struct resource smsc9220_resources[] = { 63static struct resource smsc9220_resources[] = {
56 [0] = { 64 [0] = {
57 .start = 0x14000000, 65 .start = 0x14000000,
@@ -142,6 +150,13 @@ static struct platform_device fsi_device = {
142 .resource = fsi_resources, 150 .resource = fsi_resources,
143}; 151};
144 152
153/* Fixed 1.8V regulator to be used by MMCIF */
154static struct regulator_consumer_supply fixed1v8_power_consumers[] =
155{
156 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
157 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
158};
159
145static struct resource sh_mmcif_resources[] = { 160static struct resource sh_mmcif_resources[] = {
146 [0] = { 161 [0] = {
147 .name = "MMCIF", 162 .name = "MMCIF",
@@ -364,6 +379,13 @@ static struct platform_device mipidsi0_device = {
364 }, 379 },
365}; 380};
366 381
382/* Fixed 2.8V regulators to be used by SDHI0 */
383static struct regulator_consumer_supply fixed2v8_power_consumers[] =
384{
385 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
386 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
387};
388
367/* SDHI0 */ 389/* SDHI0 */
368static struct sh_mobile_sdhi_info sdhi0_info = { 390static struct sh_mobile_sdhi_info sdhi0_info = {
369 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 391 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
@@ -408,8 +430,57 @@ static struct platform_device sdhi0_device = {
408 }, 430 },
409}; 431};
410 432
411void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state) 433/* Fixed 3.3V regulator to be used by SDHI1 */
434static struct regulator_consumer_supply cn4_power_consumers[] =
412{ 435{
436 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
437 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
438};
439
440static struct regulator_init_data cn4_power_init_data = {
441 .constraints = {
442 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
443 },
444 .num_consumer_supplies = ARRAY_SIZE(cn4_power_consumers),
445 .consumer_supplies = cn4_power_consumers,
446};
447
448static struct fixed_voltage_config cn4_power_info = {
449 .supply_name = "CN4 SD/MMC Vdd",
450 .microvolts = 3300000,
451 .gpio = GPIO_PORT114,
452 .enable_high = 1,
453 .init_data = &cn4_power_init_data,
454};
455
456static struct platform_device cn4_power = {
457 .name = "reg-fixed-voltage",
458 .id = 2,
459 .dev = {
460 .platform_data = &cn4_power_info,
461 },
462};
463
464static void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
465{
466 static int power_gpio = -EINVAL;
467
468 if (power_gpio < 0) {
469 int ret = gpio_request(GPIO_PORT114, "sdhi1_power");
470 if (!ret) {
471 power_gpio = GPIO_PORT114;
472 gpio_direction_output(power_gpio, 0);
473 }
474 }
475
476 /*
477 * If requesting the GPIO above failed, it means, that the regulator got
478 * probed and grabbed the GPIO, but we don't know, whether the sdhi
479 * driver already uses the regulator. If it doesn't, we have to toggle
480 * the GPIO ourselves, even though it is now owned by the fixed
481 * regulator driver. We have to live with the race in case the driver
482 * gets unloaded and the GPIO freed between these two steps.
483 */
413 gpio_set_value(GPIO_PORT114, state); 484 gpio_set_value(GPIO_PORT114, state);
414} 485}
415 486
@@ -455,6 +526,7 @@ static struct platform_device sdhi1_device = {
455}; 526};
456 527
457static struct platform_device *ag5evm_devices[] __initdata = { 528static struct platform_device *ag5evm_devices[] __initdata = {
529 &cn4_power,
458 &eth_device, 530 &eth_device,
459 &keysc_device, 531 &keysc_device,
460 &fsi_device, 532 &fsi_device,
@@ -468,6 +540,12 @@ static struct platform_device *ag5evm_devices[] __initdata = {
468 540
469static void __init ag5evm_init(void) 541static void __init ag5evm_init(void)
470{ 542{
543 regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
544 ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
545 regulator_register_always_on(1, "fixed-2.8V", fixed2v8_power_consumers,
546 ARRAY_SIZE(fixed2v8_power_consumers), 3300000);
547 regulator_register_fixed(3, dummy_supplies, ARRAY_SIZE(dummy_supplies));
548
471 sh73a0_pinmux_init(); 549 sh73a0_pinmux_init();
472 550
473 /* enable SCIFA2 */ 551 /* enable SCIFA2 */
@@ -562,8 +640,6 @@ static void __init ag5evm_init(void)
562 gpio_request(GPIO_FN_SDHID1_2_PU, NULL); 640 gpio_request(GPIO_FN_SDHID1_2_PU, NULL);
563 gpio_request(GPIO_FN_SDHID1_1_PU, NULL); 641 gpio_request(GPIO_FN_SDHID1_1_PU, NULL);
564 gpio_request(GPIO_FN_SDHID1_0_PU, NULL); 642 gpio_request(GPIO_FN_SDHID1_0_PU, NULL);
565 gpio_request(GPIO_PORT114, "sdhi1_power");
566 gpio_direction_output(GPIO_PORT114, 0);
567 643
568#ifdef CONFIG_CACHE_L2X0 644#ifdef CONFIG_CACHE_L2X0
569 /* Shared attribute override enable, 64K*8way */ 645 /* Shared attribute override enable, 64K*8way */
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index ace60246a5df..f172ca85905c 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -34,6 +34,8 @@
34#include <linux/i2c.h> 34#include <linux/i2c.h>
35#include <linux/i2c/tsc2007.h> 35#include <linux/i2c/tsc2007.h>
36#include <linux/io.h> 36#include <linux/io.h>
37#include <linux/regulator/fixed.h>
38#include <linux/regulator/machine.h>
37#include <linux/smsc911x.h> 39#include <linux/smsc911x.h>
38#include <linux/sh_intc.h> 40#include <linux/sh_intc.h>
39#include <linux/sh_clk.h> 41#include <linux/sh_clk.h>
@@ -159,6 +161,27 @@
159 * CN12: 3.3v 161 * CN12: 3.3v
160 */ 162 */
161 163
164/* Dummy supplies, where voltage doesn't matter */
165static struct regulator_consumer_supply fixed1v8_power_consumers[] =
166{
167 /* J22 default position: 1.8V */
168 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
169 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
170 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
171 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
172};
173
174static struct regulator_consumer_supply fixed3v3_power_consumers[] =
175{
176 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
177 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
178};
179
180static struct regulator_consumer_supply dummy_supplies[] = {
181 REGULATOR_SUPPLY("vddvario", "smsc911x"),
182 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
183};
184
162/* MTD */ 185/* MTD */
163static struct mtd_partition nor_flash_partitions[] = { 186static struct mtd_partition nor_flash_partitions[] = {
164 { 187 {
@@ -1138,21 +1161,6 @@ static void __init fsi_init_pm_clock(void)
1138 clk_put(fsia_ick); 1161 clk_put(fsia_ick);
1139} 1162}
1140 1163
1141/*
1142 * FIXME !!
1143 *
1144 * gpio_no_direction
1145 * are quick_hack.
1146 *
1147 * current gpio frame work doesn't have
1148 * the method to control only pull up/down/free.
1149 * this function should be replaced by correct gpio function
1150 */
1151static void __init gpio_no_direction(u32 addr)
1152{
1153 __raw_writeb(0x00, addr);
1154}
1155
1156/* TouchScreen */ 1164/* TouchScreen */
1157#ifdef CONFIG_AP4EVB_QHD 1165#ifdef CONFIG_AP4EVB_QHD
1158# define GPIO_TSC_IRQ GPIO_FN_IRQ28_123 1166# define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
@@ -1224,6 +1232,12 @@ static void __init ap4evb_init(void)
1224 u32 srcr4; 1232 u32 srcr4;
1225 struct clk *clk; 1233 struct clk *clk;
1226 1234
1235 regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
1236 ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
1237 regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
1238 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
1239 regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
1240
1227 /* External clock source */ 1241 /* External clock source */
1228 clk_set_rate(&sh7372_dv_clki_clk, 27000000); 1242 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1229 1243
@@ -1302,8 +1316,8 @@ static void __init ap4evb_init(void)
1302 1316
1303 gpio_request(GPIO_PORT9, NULL); 1317 gpio_request(GPIO_PORT9, NULL);
1304 gpio_request(GPIO_PORT10, NULL); 1318 gpio_request(GPIO_PORT10, NULL);
1305 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */ 1319 gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1306 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */ 1320 gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1307 1321
1308 /* card detect pin for MMC slot (CN7) */ 1322 /* card detect pin for MMC slot (CN7) */
1309 gpio_request(GPIO_PORT41, NULL); 1323 gpio_request(GPIO_PORT41, NULL);
@@ -1447,14 +1461,14 @@ static void __init ap4evb_init(void)
1447 1461
1448 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); 1462 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1449 1463
1450 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device); 1464 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc1_device);
1451 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device); 1465 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device);
1452 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device); 1466 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device);
1453 1467
1454 sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device); 1468 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device);
1455 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device); 1469 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device);
1456 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device); 1470 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device);
1457 sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device); 1471 rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device);
1458 1472
1459 hdmi_init_pm_clock(); 1473 hdmi_init_pm_clock();
1460 fsi_init_pm_clock(); 1474 fsi_init_pm_clock();
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 9e37026ef9dd..cf10f92856dc 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -28,6 +28,8 @@
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/gpio.h> 29#include <linux/gpio.h>
30#include <linux/gpio_keys.h> 30#include <linux/gpio_keys.h>
31#include <linux/regulator/fixed.h>
32#include <linux/regulator/machine.h>
31#include <linux/sh_eth.h> 33#include <linux/sh_eth.h>
32#include <linux/videodev2.h> 34#include <linux/videodev2.h>
33#include <linux/usb/renesas_usbhs.h> 35#include <linux/usb/renesas_usbhs.h>
@@ -37,14 +39,20 @@
37#include <linux/mmc/sh_mobile_sdhi.h> 39#include <linux/mmc/sh_mobile_sdhi.h>
38#include <mach/common.h> 40#include <mach/common.h>
39#include <mach/irqs.h> 41#include <mach/irqs.h>
42#include <mach/r8a7740.h>
43#include <media/mt9t112.h>
44#include <media/sh_mobile_ceu.h>
45#include <media/soc_camera.h>
40#include <asm/page.h> 46#include <asm/page.h>
41#include <asm/mach-types.h> 47#include <asm/mach-types.h>
42#include <asm/mach/arch.h> 48#include <asm/mach/arch.h>
43#include <asm/mach/map.h> 49#include <asm/mach/map.h>
44#include <asm/mach/time.h> 50#include <asm/mach/time.h>
45#include <asm/hardware/cache-l2x0.h> 51#include <asm/hardware/cache-l2x0.h>
46#include <mach/r8a7740.h>
47#include <video/sh_mobile_lcdc.h> 52#include <video/sh_mobile_lcdc.h>
53#include <video/sh_mobile_hdmi.h>
54#include <sound/sh_fsi.h>
55#include <sound/simple_card.h>
48 56
49/* 57/*
50 * CON1 Camera Module 58 * CON1 Camera Module
@@ -108,6 +116,14 @@
108 */ 116 */
109 117
110/* 118/*
119 * FSI-WM8978
120 *
121 * this command is required when playback.
122 *
123 * # amixer set "Headphone" 50
124 */
125
126/*
111 * USB function 127 * USB function
112 * 128 *
113 * When you use USB Function, 129 * When you use USB Function,
@@ -117,14 +133,8 @@
117 * These are a little bit complex. 133 * These are a little bit complex.
118 * see 134 * see
119 * usbhsf_power_ctrl() 135 * usbhsf_power_ctrl()
120 *
121 * CAUTION
122 *
123 * It uses autonomy mode for USB hotplug at this point
124 * (= usbhs_private.platform_callback.get_vbus is NULL),
125 * since we don't know what's happen on PM control
126 * on this workaround.
127 */ 136 */
137#define IRQ7 evt2irq(0x02e0)
128#define USBCR1 0xe605810a 138#define USBCR1 0xe605810a
129#define USBH 0xC6700000 139#define USBH 0xC6700000
130#define USBH_USBCTR 0x10834 140#define USBH_USBCTR 0x10834
@@ -204,6 +214,20 @@ static void usbhsf_power_ctrl(struct platform_device *pdev,
204 } 214 }
205} 215}
206 216
217static int usbhsf_get_vbus(struct platform_device *pdev)
218{
219 return gpio_get_value(GPIO_PORT209);
220}
221
222static irqreturn_t usbhsf_interrupt(int irq, void *data)
223{
224 struct platform_device *pdev = data;
225
226 renesas_usbhs_call_notify_hotplug(pdev);
227
228 return IRQ_HANDLED;
229}
230
207static void usbhsf_hardware_exit(struct platform_device *pdev) 231static void usbhsf_hardware_exit(struct platform_device *pdev)
208{ 232{
209 struct usbhsf_private *priv = usbhsf_get_priv(pdev); 233 struct usbhsf_private *priv = usbhsf_get_priv(pdev);
@@ -227,11 +251,14 @@ static void usbhsf_hardware_exit(struct platform_device *pdev)
227 priv->host = NULL; 251 priv->host = NULL;
228 priv->func = NULL; 252 priv->func = NULL;
229 priv->usbh_base = NULL; 253 priv->usbh_base = NULL;
254
255 free_irq(IRQ7, pdev);
230} 256}
231 257
232static int usbhsf_hardware_init(struct platform_device *pdev) 258static int usbhsf_hardware_init(struct platform_device *pdev)
233{ 259{
234 struct usbhsf_private *priv = usbhsf_get_priv(pdev); 260 struct usbhsf_private *priv = usbhsf_get_priv(pdev);
261 int ret;
235 262
236 priv->phy = clk_get(&pdev->dev, "phy"); 263 priv->phy = clk_get(&pdev->dev, "phy");
237 priv->usb24 = clk_get(&pdev->dev, "usb24"); 264 priv->usb24 = clk_get(&pdev->dev, "usb24");
@@ -251,6 +278,14 @@ static int usbhsf_hardware_init(struct platform_device *pdev)
251 return -EIO; 278 return -EIO;
252 } 279 }
253 280
281 ret = request_irq(IRQ7, usbhsf_interrupt, IRQF_TRIGGER_NONE,
282 dev_name(&pdev->dev), pdev);
283 if (ret) {
284 dev_err(&pdev->dev, "request_irq err\n");
285 return ret;
286 }
287 irq_set_irq_type(IRQ7, IRQ_TYPE_EDGE_BOTH);
288
254 /* usb24 use 1/1 of parent clock (= usb24s = 24MHz) */ 289 /* usb24 use 1/1 of parent clock (= usb24s = 24MHz) */
255 clk_set_rate(priv->usb24, 290 clk_set_rate(priv->usb24,
256 clk_get_rate(clk_get_parent(priv->usb24))); 291 clk_get_rate(clk_get_parent(priv->usb24)));
@@ -262,6 +297,7 @@ static struct usbhsf_private usbhsf_private = {
262 .info = { 297 .info = {
263 .platform_callback = { 298 .platform_callback = {
264 .get_id = usbhsf_get_id, 299 .get_id = usbhsf_get_id,
300 .get_vbus = usbhsf_get_vbus,
265 .hardware_init = usbhsf_hardware_init, 301 .hardware_init = usbhsf_hardware_init,
266 .hardware_exit = usbhsf_hardware_exit, 302 .hardware_exit = usbhsf_hardware_exit,
267 .power_ctrl = usbhsf_power_ctrl, 303 .power_ctrl = usbhsf_power_ctrl,
@@ -269,6 +305,8 @@ static struct usbhsf_private usbhsf_private = {
269 .driver_param = { 305 .driver_param = {
270 .buswait_bwait = 5, 306 .buswait_bwait = 5,
271 .detection_delay = 5, 307 .detection_delay = 5,
308 .d0_rx_id = SHDMA_SLAVE_USBHS_RX,
309 .d1_tx_id = SHDMA_SLAVE_USBHS_TX,
272 }, 310 },
273 } 311 }
274}; 312};
@@ -384,6 +422,103 @@ static struct platform_device lcdc0_device = {
384 }, 422 },
385}; 423};
386 424
425/*
426 * LCDC1/HDMI
427 */
428static struct sh_mobile_hdmi_info hdmi_info = {
429 .flags = HDMI_OUTPUT_PUSH_PULL |
430 HDMI_OUTPUT_POLARITY_HI |
431 HDMI_32BIT_REG |
432 HDMI_HAS_HTOP1 |
433 HDMI_SND_SRC_SPDIF,
434};
435
436static struct resource hdmi_resources[] = {
437 [0] = {
438 .name = "HDMI",
439 .start = 0xe6be0000,
440 .end = 0xe6be03ff,
441 .flags = IORESOURCE_MEM,
442 },
443 [1] = {
444 .start = evt2irq(0x1700),
445 .flags = IORESOURCE_IRQ,
446 },
447 [2] = {
448 .name = "HDMI emma3pf",
449 .start = 0xe6be4000,
450 .end = 0xe6be43ff,
451 .flags = IORESOURCE_MEM,
452 },
453};
454
455static struct platform_device hdmi_device = {
456 .name = "sh-mobile-hdmi",
457 .num_resources = ARRAY_SIZE(hdmi_resources),
458 .resource = hdmi_resources,
459 .id = -1,
460 .dev = {
461 .platform_data = &hdmi_info,
462 },
463};
464
465static const struct fb_videomode lcdc1_mode = {
466 .name = "HDMI 720p",
467 .xres = 1280,
468 .yres = 720,
469 .pixclock = 13468,
470 .left_margin = 220,
471 .right_margin = 110,
472 .hsync_len = 40,
473 .upper_margin = 20,
474 .lower_margin = 5,
475 .vsync_len = 5,
476 .refresh = 60,
477 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
478};
479
480static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
481 .clock_source = LCDC_CLK_PERIPHERAL, /* HDMI clock */
482 .ch[0] = {
483 .chan = LCDC_CHAN_MAINLCD,
484 .fourcc = V4L2_PIX_FMT_RGB565,
485 .interface_type = RGB24,
486 .clock_divider = 1,
487 .flags = LCDC_FLAGS_DWPOL,
488 .lcd_modes = &lcdc1_mode,
489 .num_modes = 1,
490 .tx_dev = &hdmi_device,
491 .panel_cfg = {
492 .width = 1280,
493 .height = 720,
494 },
495 },
496};
497
498static struct resource hdmi_lcdc_resources[] = {
499 [0] = {
500 .name = "LCDC1",
501 .start = 0xfe944000,
502 .end = 0xfe948000 - 1,
503 .flags = IORESOURCE_MEM,
504 },
505 [1] = {
506 .start = intcs_evt2irq(0x1780),
507 .flags = IORESOURCE_IRQ,
508 },
509};
510
511static struct platform_device hdmi_lcdc_device = {
512 .name = "sh_mobile_lcdc_fb",
513 .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
514 .resource = hdmi_lcdc_resources,
515 .id = 1,
516 .dev = {
517 .platform_data = &hdmi_lcdc_info,
518 .coherent_dma_mask = ~0,
519 },
520};
521
387/* GPIO KEY */ 522/* GPIO KEY */
388#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } 523#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
389 524
@@ -407,6 +542,17 @@ static struct platform_device gpio_keys_device = {
407 }, 542 },
408}; 543};
409 544
545/* Fixed 3.3V regulator to be used by SDHI0, SDHI1, MMCIF */
546static struct regulator_consumer_supply fixed3v3_power_consumers[] =
547{
548 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
549 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
550 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
551 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
552 REGULATOR_SUPPLY("vmmc", "sh_mmcif"),
553 REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
554};
555
410/* SDHI0 */ 556/* SDHI0 */
411/* 557/*
412 * FIXME 558 * FIXME
@@ -418,6 +564,8 @@ static struct platform_device gpio_keys_device = {
418 */ 564 */
419#define IRQ31 evt2irq(0x33E0) 565#define IRQ31 evt2irq(0x33E0)
420static struct sh_mobile_sdhi_info sdhi0_info = { 566static struct sh_mobile_sdhi_info sdhi0_info = {
567 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
568 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
421 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |\ 569 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |\
422 MMC_CAP_NEEDS_POLL, 570 MMC_CAP_NEEDS_POLL,
423 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, 571 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
@@ -458,6 +606,8 @@ static struct platform_device sdhi0_device = {
458 606
459/* SDHI1 */ 607/* SDHI1 */
460static struct sh_mobile_sdhi_info sdhi1_info = { 608static struct sh_mobile_sdhi_info sdhi1_info = {
609 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
610 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
461 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, 611 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
462 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, 612 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
463 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, 613 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
@@ -532,12 +682,209 @@ static struct platform_device sh_mmcif_device = {
532 .resource = sh_mmcif_resources, 682 .resource = sh_mmcif_resources,
533}; 683};
534 684
685/* Camera */
686static int mt9t111_power(struct device *dev, int mode)
687{
688 struct clk *mclk = clk_get(NULL, "video1");
689
690 if (IS_ERR(mclk)) {
691 dev_err(dev, "can't get video1 clock\n");
692 return -EINVAL;
693 }
694
695 if (mode) {
696 /* video1 (= CON1 camera) expect 24MHz */
697 clk_set_rate(mclk, clk_round_rate(mclk, 24000000));
698 clk_enable(mclk);
699 gpio_direction_output(GPIO_PORT158, 1);
700 } else {
701 gpio_direction_output(GPIO_PORT158, 0);
702 clk_disable(mclk);
703 }
704
705 clk_put(mclk);
706
707 return 0;
708}
709
710static struct i2c_board_info i2c_camera_mt9t111 = {
711 I2C_BOARD_INFO("mt9t112", 0x3d),
712};
713
714static struct mt9t112_camera_info mt9t111_info = {
715 .divider = { 16, 0, 0, 7, 0, 10, 14, 7, 7 },
716};
717
718static struct soc_camera_link mt9t111_link = {
719 .i2c_adapter_id = 0,
720 .bus_id = 0,
721 .board_info = &i2c_camera_mt9t111,
722 .power = mt9t111_power,
723 .priv = &mt9t111_info,
724};
725
726static struct platform_device camera_device = {
727 .name = "soc-camera-pdrv",
728 .id = 0,
729 .dev = {
730 .platform_data = &mt9t111_link,
731 },
732};
733
734/* CEU0 */
735static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
736 .flags = SH_CEU_FLAG_LOWER_8BIT,
737};
738
739static struct resource ceu0_resources[] = {
740 [0] = {
741 .name = "CEU",
742 .start = 0xfe910000,
743 .end = 0xfe91009f,
744 .flags = IORESOURCE_MEM,
745 },
746 [1] = {
747 .start = intcs_evt2irq(0x0500),
748 .flags = IORESOURCE_IRQ,
749 },
750 [2] = {
751 /* place holder for contiguous memory */
752 },
753};
754
755static struct platform_device ceu0_device = {
756 .name = "sh_mobile_ceu",
757 .id = 0,
758 .num_resources = ARRAY_SIZE(ceu0_resources),
759 .resource = ceu0_resources,
760 .dev = {
761 .platform_data = &sh_mobile_ceu0_info,
762 .coherent_dma_mask = 0xffffffff,
763 },
764};
765
766/* FSI */
767static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
768{
769 struct clk *fsib;
770 int ret;
771
772 /* it support 48KHz only */
773 if (48000 != rate)
774 return -EINVAL;
775
776 fsib = clk_get(dev, "ickb");
777 if (IS_ERR(fsib))
778 return -EINVAL;
779
780 if (enable) {
781 ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
782 clk_enable(fsib);
783 } else {
784 ret = 0;
785 clk_disable(fsib);
786 }
787
788 clk_put(fsib);
789
790 return ret;
791}
792
793static struct sh_fsi_platform_info fsi_info = {
794 /* FSI-WM8978 */
795 .port_a = {
796 .tx_id = SHDMA_SLAVE_FSIA_TX,
797 },
798 /* FSI-HDMI */
799 .port_b = {
800 .flags = SH_FSI_FMT_SPDIF |
801 SH_FSI_ENABLE_STREAM_MODE,
802 .set_rate = fsi_hdmi_set_rate,
803 .tx_id = SHDMA_SLAVE_FSIB_TX,
804 }
805};
806
807static struct resource fsi_resources[] = {
808 [0] = {
809 .name = "FSI",
810 .start = 0xfe1f0000,
811 .end = 0xfe1f8400 - 1,
812 .flags = IORESOURCE_MEM,
813 },
814 [1] = {
815 .start = evt2irq(0x1840),
816 .flags = IORESOURCE_IRQ,
817 },
818};
819
820static struct platform_device fsi_device = {
821 .name = "sh_fsi2",
822 .id = -1,
823 .num_resources = ARRAY_SIZE(fsi_resources),
824 .resource = fsi_resources,
825 .dev = {
826 .platform_data = &fsi_info,
827 },
828};
829
830/* FSI-WM8978 */
831static struct asoc_simple_dai_init_info fsi_wm8978_init_info = {
832 .fmt = SND_SOC_DAIFMT_I2S,
833 .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_NB_NF,
834 .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
835 .sysclk = 12288000,
836};
837
838static struct asoc_simple_card_info fsi_wm8978_info = {
839 .name = "wm8978",
840 .card = "FSI2A-WM8978",
841 .cpu_dai = "fsia-dai",
842 .codec = "wm8978.0-001a",
843 .platform = "sh_fsi2",
844 .codec_dai = "wm8978-hifi",
845 .init = &fsi_wm8978_init_info,
846};
847
848static struct platform_device fsi_wm8978_device = {
849 .name = "asoc-simple-card",
850 .id = 0,
851 .dev = {
852 .platform_data = &fsi_wm8978_info,
853 },
854};
855
856/* FSI-HDMI */
857static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
858 .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
859};
860
861static struct asoc_simple_card_info fsi2_hdmi_info = {
862 .name = "HDMI",
863 .card = "FSI2B-HDMI",
864 .cpu_dai = "fsib-dai",
865 .codec = "sh-mobile-hdmi",
866 .platform = "sh_fsi2",
867 .codec_dai = "sh_mobile_hdmi-hifi",
868 .init = &fsi2_hdmi_init_info,
869};
870
871static struct platform_device fsi_hdmi_device = {
872 .name = "asoc-simple-card",
873 .id = 1,
874 .dev = {
875 .platform_data = &fsi2_hdmi_info,
876 },
877};
878
535/* I2C */ 879/* I2C */
536static struct i2c_board_info i2c0_devices[] = { 880static struct i2c_board_info i2c0_devices[] = {
537 { 881 {
538 I2C_BOARD_INFO("st1232-ts", 0x55), 882 I2C_BOARD_INFO("st1232-ts", 0x55),
539 .irq = evt2irq(0x0340), 883 .irq = evt2irq(0x0340),
540 }, 884 },
885 {
886 I2C_BOARD_INFO("wm8978", 0x1a),
887 },
541}; 888};
542 889
543/* 890/*
@@ -549,6 +896,13 @@ static struct platform_device *eva_devices[] __initdata = {
549 &sh_eth_device, 896 &sh_eth_device,
550 &sdhi0_device, 897 &sdhi0_device,
551 &sh_mmcif_device, 898 &sh_mmcif_device,
899 &hdmi_device,
900 &hdmi_lcdc_device,
901 &camera_device,
902 &ceu0_device,
903 &fsi_device,
904 &fsi_hdmi_device,
905 &fsi_wm8978_device,
552}; 906};
553 907
554static void __init eva_clock_init(void) 908static void __init eva_clock_init(void)
@@ -556,10 +910,14 @@ static void __init eva_clock_init(void)
556 struct clk *system = clk_get(NULL, "system_clk"); 910 struct clk *system = clk_get(NULL, "system_clk");
557 struct clk *xtal1 = clk_get(NULL, "extal1"); 911 struct clk *xtal1 = clk_get(NULL, "extal1");
558 struct clk *usb24s = clk_get(NULL, "usb24s"); 912 struct clk *usb24s = clk_get(NULL, "usb24s");
913 struct clk *fsibck = clk_get(NULL, "fsibck");
914 struct clk *fsib = clk_get(&fsi_device.dev, "ickb");
559 915
560 if (IS_ERR(system) || 916 if (IS_ERR(system) ||
561 IS_ERR(xtal1) || 917 IS_ERR(xtal1) ||
562 IS_ERR(usb24s)) { 918 IS_ERR(usb24s) ||
919 IS_ERR(fsibck) ||
920 IS_ERR(fsib)) {
563 pr_err("armadillo800eva board clock init failed\n"); 921 pr_err("armadillo800eva board clock init failed\n");
564 goto clock_error; 922 goto clock_error;
565 } 923 }
@@ -570,6 +928,11 @@ static void __init eva_clock_init(void)
570 /* usb24s use extal1 (= system) clock (= 24MHz) */ 928 /* usb24s use extal1 (= system) clock (= 24MHz) */
571 clk_set_parent(usb24s, system); 929 clk_set_parent(usb24s, system);
572 930
931 /* FSIBCK is 12.288MHz, and it is parent of FSI-B */
932 clk_set_parent(fsib, fsibck);
933 clk_set_rate(fsibck, 12288000);
934 clk_set_rate(fsib, 12288000);
935
573clock_error: 936clock_error:
574 if (!IS_ERR(system)) 937 if (!IS_ERR(system))
575 clk_put(system); 938 clk_put(system);
@@ -577,16 +940,26 @@ clock_error:
577 clk_put(xtal1); 940 clk_put(xtal1);
578 if (!IS_ERR(usb24s)) 941 if (!IS_ERR(usb24s))
579 clk_put(usb24s); 942 clk_put(usb24s);
943 if (!IS_ERR(fsibck))
944 clk_put(fsibck);
945 if (!IS_ERR(fsib))
946 clk_put(fsib);
580} 947}
581 948
582/* 949/*
583 * board init 950 * board init
584 */ 951 */
952#define GPIO_PORT7CR 0xe6050007
953#define GPIO_PORT8CR 0xe6050008
585static void __init eva_init(void) 954static void __init eva_init(void)
586{ 955{
587 eva_clock_init(); 956 struct platform_device *usb = NULL;
957
958 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
959 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
588 960
589 r8a7740_pinmux_init(); 961 r8a7740_pinmux_init();
962 r8a7740_meram_workaround();
590 963
591 /* SCIFA1 */ 964 /* SCIFA1 */
592 gpio_request(GPIO_FN_SCIFA1_RXD, NULL); 965 gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
@@ -667,8 +1040,19 @@ static void __init eva_init(void)
667 /* USB Host */ 1040 /* USB Host */
668 } else { 1041 } else {
669 /* USB Func */ 1042 /* USB Func */
670 gpio_request(GPIO_FN_VBUS, NULL); 1043 /*
1044 * A1 chip has 2 IRQ7 pin and it was controled by MSEL register.
1045 * OTOH, usbhs interrupt needs its value (HI/LOW) to decide
1046 * USB connection/disconnection (usbhsf_get_vbus()).
1047 * This means we needs to select GPIO_FN_IRQ7_PORT209 first,
1048 * and select GPIO_PORT209 here
1049 */
1050 gpio_request(GPIO_FN_IRQ7_PORT209, NULL);
1051 gpio_request(GPIO_PORT209, NULL);
1052 gpio_direction_input(GPIO_PORT209);
1053
671 platform_device_register(&usbhsf_device); 1054 platform_device_register(&usbhsf_device);
1055 usb = &usbhsf_device;
672 } 1056 }
673 1057
674 /* SDHI0 */ 1058 /* SDHI0 */
@@ -706,6 +1090,48 @@ static void __init eva_init(void)
706 gpio_request(GPIO_FN_MMC1_D6_PORT143, NULL); 1090 gpio_request(GPIO_FN_MMC1_D6_PORT143, NULL);
707 gpio_request(GPIO_FN_MMC1_D7_PORT142, NULL); 1091 gpio_request(GPIO_FN_MMC1_D7_PORT142, NULL);
708 1092
1093 /* CEU0 */
1094 gpio_request(GPIO_FN_VIO0_D7, NULL);
1095 gpio_request(GPIO_FN_VIO0_D6, NULL);
1096 gpio_request(GPIO_FN_VIO0_D5, NULL);
1097 gpio_request(GPIO_FN_VIO0_D4, NULL);
1098 gpio_request(GPIO_FN_VIO0_D3, NULL);
1099 gpio_request(GPIO_FN_VIO0_D2, NULL);
1100 gpio_request(GPIO_FN_VIO0_D1, NULL);
1101 gpio_request(GPIO_FN_VIO0_D0, NULL);
1102 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1103 gpio_request(GPIO_FN_VIO0_HD, NULL);
1104 gpio_request(GPIO_FN_VIO0_VD, NULL);
1105 gpio_request(GPIO_FN_VIO0_FIELD, NULL);
1106 gpio_request(GPIO_FN_VIO_CKO, NULL);
1107
1108 /* CON1/CON15 Camera */
1109 gpio_request(GPIO_PORT173, NULL); /* STANDBY */
1110 gpio_request(GPIO_PORT172, NULL); /* RST */
1111 gpio_request(GPIO_PORT158, NULL); /* CAM_PON */
1112 gpio_direction_output(GPIO_PORT173, 0);
1113 gpio_direction_output(GPIO_PORT172, 1);
1114 gpio_direction_output(GPIO_PORT158, 0); /* see mt9t111_power() */
1115
1116 /* FSI-WM8978 */
1117 gpio_request(GPIO_FN_FSIAIBT, NULL);
1118 gpio_request(GPIO_FN_FSIAILR, NULL);
1119 gpio_request(GPIO_FN_FSIAOMC, NULL);
1120 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1121 gpio_request(GPIO_FN_FSIAISLD_PORT5, NULL);
1122
1123 gpio_request(GPIO_PORT7, NULL);
1124 gpio_request(GPIO_PORT8, NULL);
1125 gpio_direction_none(GPIO_PORT7CR); /* FSIAOBT needs no direction */
1126 gpio_direction_none(GPIO_PORT8CR); /* FSIAOLR needs no direction */
1127
1128 /* FSI-HDMI */
1129 gpio_request(GPIO_FN_FSIBCK, NULL);
1130
1131 /* HDMI */
1132 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1133 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1134
709 /* 1135 /*
710 * CAUTION 1136 * CAUTION
711 * 1137 *
@@ -752,6 +1178,13 @@ static void __init eva_init(void)
752 1178
753 platform_add_devices(eva_devices, 1179 platform_add_devices(eva_devices,
754 ARRAY_SIZE(eva_devices)); 1180 ARRAY_SIZE(eva_devices));
1181
1182 eva_clock_init();
1183
1184 rmobile_add_device_to_domain(&r8a7740_pd_a4lc, &lcdc0_device);
1185 rmobile_add_device_to_domain(&r8a7740_pd_a4lc, &hdmi_lcdc_device);
1186 if (usb)
1187 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, usb);
755} 1188}
756 1189
757static void __init eva_earlytimer_init(void) 1190static void __init eva_earlytimer_init(void)
@@ -779,6 +1212,7 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
779 .init_irq = r8a7740_init_irq, 1212 .init_irq = r8a7740_init_irq,
780 .handle_irq = shmobile_handle_irq_intc, 1213 .handle_irq = shmobile_handle_irq_intc,
781 .init_machine = eva_init, 1214 .init_machine = eva_init,
1215 .init_late = shmobile_init_late,
782 .timer = &shmobile_timer, 1216 .timer = &shmobile_timer,
783 .dt_compat = eva_boards_compat_dt, 1217 .dt_compat = eva_boards_compat_dt,
784MACHINE_END 1218MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index e9b32cfbf741..4129008eae29 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -26,6 +26,8 @@
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/gpio.h> 28#include <linux/gpio.h>
29#include <linux/regulator/fixed.h>
30#include <linux/regulator/machine.h>
29#include <linux/smsc911x.h> 31#include <linux/smsc911x.h>
30#include <linux/videodev2.h> 32#include <linux/videodev2.h>
31#include <mach/common.h> 33#include <mach/common.h>
@@ -75,6 +77,12 @@
75 * S38.2 = OFF 77 * S38.2 = OFF
76 */ 78 */
77 79
80/* Dummy supplies, where voltage doesn't matter */
81static struct regulator_consumer_supply dummy_supplies[] = {
82 REGULATOR_SUPPLY("vddvario", "smsc911x"),
83 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
84};
85
78/* 86/*
79 * FPGA 87 * FPGA
80 */ 88 */
@@ -360,6 +368,8 @@ static void __init bonito_init(void)
360{ 368{
361 u16 val; 369 u16 val;
362 370
371 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
372
363 r8a7740_pinmux_init(); 373 r8a7740_pinmux_init();
364 bonito_fpga_init(); 374 bonito_fpga_init();
365 375
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index f1257321999a..fa5dfc5c8ed6 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -26,6 +26,8 @@
26#include <linux/mtd/mtd.h> 26#include <linux/mtd/mtd.h>
27#include <linux/mtd/partitions.h> 27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h> 28#include <linux/mtd/physmap.h>
29#include <linux/regulator/fixed.h>
30#include <linux/regulator/machine.h>
29#include <linux/usb/r8a66597.h> 31#include <linux/usb/r8a66597.h>
30#include <linux/io.h> 32#include <linux/io.h>
31#include <linux/input.h> 33#include <linux/input.h>
@@ -196,6 +198,15 @@ static struct platform_device keysc_device = {
196 }, 198 },
197}; 199};
198 200
201/* Fixed 3.3V regulator to be used by SDHI0 and SDHI1 */
202static struct regulator_consumer_supply fixed3v3_power_consumers[] =
203{
204 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
205 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
206 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
207 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
208};
209
199/* SDHI */ 210/* SDHI */
200static struct sh_mobile_sdhi_info sdhi0_info = { 211static struct sh_mobile_sdhi_info sdhi0_info = {
201 .tmio_caps = MMC_CAP_SDIO_IRQ, 212 .tmio_caps = MMC_CAP_SDIO_IRQ,
@@ -271,26 +282,11 @@ static struct platform_device *g4evm_devices[] __initdata = {
271#define GPIO_SDHID1_D3 0xe6052106 282#define GPIO_SDHID1_D3 0xe6052106
272#define GPIO_SDHICMD1 0xe6052107 283#define GPIO_SDHICMD1 0xe6052107
273 284
274/*
275 * FIXME !!
276 *
277 * gpio_pull_up is quick_hack.
278 *
279 * current gpio frame work doesn't have
280 * the method to control only pull up/down/free.
281 * this function should be replaced by correct gpio function
282 */
283static void __init gpio_pull_up(u32 addr)
284{
285 u8 data = __raw_readb(addr);
286
287 data &= 0x0F;
288 data |= 0xC0;
289 __raw_writeb(data, addr);
290}
291
292static void __init g4evm_init(void) 285static void __init g4evm_init(void)
293{ 286{
287 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
288 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
289
294 sh7377_pinmux_init(); 290 sh7377_pinmux_init();
295 291
296 /* Lit DS14 LED */ 292 /* Lit DS14 LED */
@@ -351,11 +347,11 @@ static void __init g4evm_init(void)
351 gpio_request(GPIO_FN_SDHID0_3, NULL); 347 gpio_request(GPIO_FN_SDHID0_3, NULL);
352 gpio_request(GPIO_FN_SDHICMD0, NULL); 348 gpio_request(GPIO_FN_SDHICMD0, NULL);
353 gpio_request(GPIO_FN_SDHIWP0, NULL); 349 gpio_request(GPIO_FN_SDHIWP0, NULL);
354 gpio_pull_up(GPIO_SDHID0_D0); 350 gpio_request_pullup(GPIO_SDHID0_D0);
355 gpio_pull_up(GPIO_SDHID0_D1); 351 gpio_request_pullup(GPIO_SDHID0_D1);
356 gpio_pull_up(GPIO_SDHID0_D2); 352 gpio_request_pullup(GPIO_SDHID0_D2);
357 gpio_pull_up(GPIO_SDHID0_D3); 353 gpio_request_pullup(GPIO_SDHID0_D3);
358 gpio_pull_up(GPIO_SDHICMD0); 354 gpio_request_pullup(GPIO_SDHICMD0);
359 355
360 /* SDHI1 */ 356 /* SDHI1 */
361 gpio_request(GPIO_FN_SDHICLK1, NULL); 357 gpio_request(GPIO_FN_SDHICLK1, NULL);
@@ -364,11 +360,11 @@ static void __init g4evm_init(void)
364 gpio_request(GPIO_FN_SDHID1_2, NULL); 360 gpio_request(GPIO_FN_SDHID1_2, NULL);
365 gpio_request(GPIO_FN_SDHID1_3, NULL); 361 gpio_request(GPIO_FN_SDHID1_3, NULL);
366 gpio_request(GPIO_FN_SDHICMD1, NULL); 362 gpio_request(GPIO_FN_SDHICMD1, NULL);
367 gpio_pull_up(GPIO_SDHID1_D0); 363 gpio_request_pullup(GPIO_SDHID1_D0);
368 gpio_pull_up(GPIO_SDHID1_D1); 364 gpio_request_pullup(GPIO_SDHID1_D1);
369 gpio_pull_up(GPIO_SDHID1_D2); 365 gpio_request_pullup(GPIO_SDHID1_D2);
370 gpio_pull_up(GPIO_SDHID1_D3); 366 gpio_request_pullup(GPIO_SDHID1_D3);
371 gpio_pull_up(GPIO_SDHICMD1); 367 gpio_request_pullup(GPIO_SDHICMD1);
372 368
373 sh7377_add_standard_devices(); 369 sh7377_add_standard_devices();
374 370
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index f60f1b281cc4..21dbe54304d5 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -27,6 +27,8 @@
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/delay.h> 28#include <linux/delay.h>
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/regulator/fixed.h>
31#include <linux/regulator/machine.h>
30#include <linux/smsc911x.h> 32#include <linux/smsc911x.h>
31#include <linux/gpio.h> 33#include <linux/gpio.h>
32#include <linux/input.h> 34#include <linux/input.h>
@@ -49,6 +51,12 @@
49#include <asm/hardware/cache-l2x0.h> 51#include <asm/hardware/cache-l2x0.h>
50#include <asm/traps.h> 52#include <asm/traps.h>
51 53
54/* Dummy supplies, where voltage doesn't matter */
55static struct regulator_consumer_supply dummy_supplies[] = {
56 REGULATOR_SUPPLY("vddvario", "smsc911x"),
57 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
58};
59
52/* SMSC 9220 */ 60/* SMSC 9220 */
53static struct resource smsc9220_resources[] = { 61static struct resource smsc9220_resources[] = {
54 [0] = { 62 [0] = {
@@ -288,6 +296,13 @@ static struct platform_device leds_tpu30_device = {
288 .resource = tpu30_resources, 296 .resource = tpu30_resources,
289}; 297};
290 298
299/* Fixed 1.8V regulator to be used by MMCIF */
300static struct regulator_consumer_supply fixed1v8_power_consumers[] =
301{
302 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
303 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
304};
305
291/* MMCIF */ 306/* MMCIF */
292static struct resource mmcif_resources[] = { 307static struct resource mmcif_resources[] = {
293 [0] = { 308 [0] = {
@@ -321,6 +336,15 @@ static struct platform_device mmcif_device = {
321 .resource = mmcif_resources, 336 .resource = mmcif_resources,
322}; 337};
323 338
339/* Fixed 3.3V regulator to be used by SDHI0 and SDHI1 */
340static struct regulator_consumer_supply fixed3v3_power_consumers[] =
341{
342 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
343 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
344 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
345 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
346};
347
324/* SDHI0 */ 348/* SDHI0 */
325static struct sh_mobile_sdhi_info sdhi0_info = { 349static struct sh_mobile_sdhi_info sdhi0_info = {
326 .tmio_caps = MMC_CAP_SD_HIGHSPEED, 350 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
@@ -411,6 +435,12 @@ static struct platform_device *kota2_devices[] __initdata = {
411 435
412static void __init kota2_init(void) 436static void __init kota2_init(void)
413{ 437{
438 regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
439 ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
440 regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
441 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
442 regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
443
414 sh73a0_pinmux_init(); 444 sh73a0_pinmux_init();
415 445
416 /* SCIFA2 (UART2) */ 446 /* SCIFA2 (UART2) */
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
index 7bc5e7d39f9b..2c986eaae7b4 100644
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ b/arch/arm/mach-shmobile/board-kzm9d.c
@@ -21,6 +21,8 @@
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/regulator/fixed.h>
25#include <linux/regulator/machine.h>
24#include <linux/smsc911x.h> 26#include <linux/smsc911x.h>
25#include <mach/common.h> 27#include <mach/common.h>
26#include <mach/emev2.h> 28#include <mach/emev2.h>
@@ -28,6 +30,12 @@
28#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
29#include <asm/hardware/gic.h> 31#include <asm/hardware/gic.h>
30 32
33/* Dummy supplies, where voltage doesn't matter */
34static struct regulator_consumer_supply dummy_supplies[] = {
35 REGULATOR_SUPPLY("vddvario", "smsc911x"),
36 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
37};
38
31/* Ether */ 39/* Ether */
32static struct resource smsc911x_resources[] = { 40static struct resource smsc911x_resources[] = {
33 [0] = { 41 [0] = {
@@ -63,6 +71,8 @@ static struct platform_device *kzm9d_devices[] __initdata = {
63 71
64void __init kzm9d_add_standard_devices(void) 72void __init kzm9d_add_standard_devices(void)
65{ 73{
74 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
75
66 emev2_add_standard_devices(); 76 emev2_add_standard_devices();
67 77
68 platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices)); 78 platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices));
@@ -80,6 +90,7 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
80 .init_irq = emev2_init_irq, 90 .init_irq = emev2_init_irq,
81 .handle_irq = gic_handle_irq, 91 .handle_irq = gic_handle_irq,
82 .init_machine = kzm9d_add_standard_devices, 92 .init_machine = kzm9d_add_standard_devices,
93 .init_late = shmobile_init_late,
83 .timer = &shmobile_timer, 94 .timer = &shmobile_timer,
84 .dt_compat = kzm9d_boards_compat_dt, 95 .dt_compat = kzm9d_boards_compat_dt,
85MACHINE_END 96MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index d8e33b682832..53b7ea92c32c 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -30,9 +30,14 @@
30#include <linux/mmc/sh_mobile_sdhi.h> 30#include <linux/mmc/sh_mobile_sdhi.h>
31#include <linux/mfd/tmio.h> 31#include <linux/mfd/tmio.h>
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/regulator/fixed.h>
34#include <linux/regulator/machine.h>
33#include <linux/smsc911x.h> 35#include <linux/smsc911x.h>
34#include <linux/usb/r8a66597.h> 36#include <linux/usb/r8a66597.h>
37#include <linux/usb/renesas_usbhs.h>
35#include <linux/videodev2.h> 38#include <linux/videodev2.h>
39#include <sound/sh_fsi.h>
40#include <sound/simple_card.h>
36#include <mach/irqs.h> 41#include <mach/irqs.h>
37#include <mach/sh73a0.h> 42#include <mach/sh73a0.h>
38#include <mach/common.h> 43#include <mach/common.h>
@@ -54,6 +59,20 @@
54#define GPIO_PCF8575_PORT15 (GPIO_NR + 13) 59#define GPIO_PCF8575_PORT15 (GPIO_NR + 13)
55#define GPIO_PCF8575_PORT16 (GPIO_NR + 14) 60#define GPIO_PCF8575_PORT16 (GPIO_NR + 14)
56 61
62/* Dummy supplies, where voltage doesn't matter */
63static struct regulator_consumer_supply dummy_supplies[] = {
64 REGULATOR_SUPPLY("vddvario", "smsc911x"),
65 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
66};
67
68/*
69 * FSI-AK4648
70 *
71 * this command is required when playback.
72 *
73 * # amixer set "LINEOUT Mixer DACL" on
74 */
75
57/* SMSC 9221 */ 76/* SMSC 9221 */
58static struct resource smsc9221_resources[] = { 77static struct resource smsc9221_resources[] = {
59 [0] = { 78 [0] = {
@@ -112,6 +131,151 @@ static struct platform_device usb_host_device = {
112 .resource = usb_resources, 131 .resource = usb_resources,
113}; 132};
114 133
134/* USB Func CN17 */
135struct usbhs_private {
136 unsigned int phy;
137 unsigned int cr2;
138 struct renesas_usbhs_platform_info info;
139};
140
141#define IRQ15 intcs_evt2irq(0x03e0)
142#define USB_PHY_MODE (1 << 4)
143#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
144#define USB_PHY_ON (1 << 1)
145#define USB_PHY_OFF (1 << 0)
146#define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
147
148#define usbhs_get_priv(pdev) \
149 container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
150
151static int usbhs_get_vbus(struct platform_device *pdev)
152{
153 struct usbhs_private *priv = usbhs_get_priv(pdev);
154
155 return !((1 << 7) & __raw_readw(priv->cr2));
156}
157
158static void usbhs_phy_reset(struct platform_device *pdev)
159{
160 struct usbhs_private *priv = usbhs_get_priv(pdev);
161
162 /* init phy */
163 __raw_writew(0x8a0a, priv->cr2);
164}
165
166static int usbhs_get_id(struct platform_device *pdev)
167{
168 return USBHS_GADGET;
169}
170
171static irqreturn_t usbhs_interrupt(int irq, void *data)
172{
173 struct platform_device *pdev = data;
174 struct usbhs_private *priv = usbhs_get_priv(pdev);
175
176 renesas_usbhs_call_notify_hotplug(pdev);
177
178 /* clear status */
179 __raw_writew(__raw_readw(priv->phy) | USB_PHY_INT_CLR, priv->phy);
180
181 return IRQ_HANDLED;
182}
183
184static int usbhs_hardware_init(struct platform_device *pdev)
185{
186 struct usbhs_private *priv = usbhs_get_priv(pdev);
187 int ret;
188
189 /* clear interrupt status */
190 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->phy);
191
192 ret = request_irq(IRQ15, usbhs_interrupt, IRQF_TRIGGER_HIGH,
193 dev_name(&pdev->dev), pdev);
194 if (ret) {
195 dev_err(&pdev->dev, "request_irq err\n");
196 return ret;
197 }
198
199 /* enable USB phy interrupt */
200 __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->phy);
201
202 return 0;
203}
204
205static void usbhs_hardware_exit(struct platform_device *pdev)
206{
207 struct usbhs_private *priv = usbhs_get_priv(pdev);
208
209 /* clear interrupt status */
210 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->phy);
211
212 free_irq(IRQ15, pdev);
213}
214
215static u32 usbhs_pipe_cfg[] = {
216 USB_ENDPOINT_XFER_CONTROL,
217 USB_ENDPOINT_XFER_ISOC,
218 USB_ENDPOINT_XFER_ISOC,
219 USB_ENDPOINT_XFER_BULK,
220 USB_ENDPOINT_XFER_BULK,
221 USB_ENDPOINT_XFER_BULK,
222 USB_ENDPOINT_XFER_INT,
223 USB_ENDPOINT_XFER_INT,
224 USB_ENDPOINT_XFER_INT,
225 USB_ENDPOINT_XFER_BULK,
226 USB_ENDPOINT_XFER_BULK,
227 USB_ENDPOINT_XFER_BULK,
228 USB_ENDPOINT_XFER_BULK,
229 USB_ENDPOINT_XFER_BULK,
230 USB_ENDPOINT_XFER_BULK,
231 USB_ENDPOINT_XFER_BULK,
232};
233
234static struct usbhs_private usbhs_private = {
235 .phy = 0xe60781e0, /* USBPHYINT */
236 .cr2 = 0xe605810c, /* USBCR2 */
237 .info = {
238 .platform_callback = {
239 .hardware_init = usbhs_hardware_init,
240 .hardware_exit = usbhs_hardware_exit,
241 .get_id = usbhs_get_id,
242 .phy_reset = usbhs_phy_reset,
243 .get_vbus = usbhs_get_vbus,
244 },
245 .driver_param = {
246 .buswait_bwait = 4,
247 .has_otg = 1,
248 .pipe_type = usbhs_pipe_cfg,
249 .pipe_size = ARRAY_SIZE(usbhs_pipe_cfg),
250 },
251 },
252};
253
254static struct resource usbhs_resources[] = {
255 [0] = {
256 .start = 0xE6890000,
257 .end = 0xE68900e6 - 1,
258 .flags = IORESOURCE_MEM,
259 },
260 [1] = {
261 .start = gic_spi(62),
262 .end = gic_spi(62),
263 .flags = IORESOURCE_IRQ,
264 },
265};
266
267static struct platform_device usbhs_device = {
268 .name = "renesas_usbhs",
269 .id = -1,
270 .dev = {
271 .dma_mask = NULL,
272 .coherent_dma_mask = 0xffffffff,
273 .platform_data = &usbhs_private.info,
274 },
275 .num_resources = ARRAY_SIZE(usbhs_resources),
276 .resource = usbhs_resources,
277};
278
115/* LCDC */ 279/* LCDC */
116static struct fb_videomode kzm_lcdc_mode = { 280static struct fb_videomode kzm_lcdc_mode = {
117 .name = "WVGA Panel", 281 .name = "WVGA Panel",
@@ -166,6 +330,13 @@ static struct platform_device lcdc_device = {
166 }, 330 },
167}; 331};
168 332
333/* Fixed 1.8V regulator to be used by MMCIF */
334static struct regulator_consumer_supply fixed1v8_power_consumers[] =
335{
336 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
337 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
338};
339
169/* MMCIF */ 340/* MMCIF */
170static struct resource sh_mmcif_resources[] = { 341static struct resource sh_mmcif_resources[] = {
171 [0] = { 342 [0] = {
@@ -187,6 +358,8 @@ static struct resource sh_mmcif_resources[] = {
187static struct sh_mmcif_plat_data sh_mmcif_platdata = { 358static struct sh_mmcif_plat_data sh_mmcif_platdata = {
188 .ocr = MMC_VDD_165_195, 359 .ocr = MMC_VDD_165_195,
189 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, 360 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
361 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
362 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
190}; 363};
191 364
192static struct platform_device mmc_device = { 365static struct platform_device mmc_device = {
@@ -200,6 +373,15 @@ static struct platform_device mmc_device = {
200 .resource = sh_mmcif_resources, 373 .resource = sh_mmcif_resources,
201}; 374};
202 375
376/* Fixed 2.8V regulators to be used by SDHI0 and SDHI2 */
377static struct regulator_consumer_supply fixed2v8_power_consumers[] =
378{
379 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
380 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
381 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.2"),
382 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.2"),
383};
384
203/* SDHI */ 385/* SDHI */
204static struct sh_mobile_sdhi_info sdhi0_info = { 386static struct sh_mobile_sdhi_info sdhi0_info = {
205 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, 387 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
@@ -240,6 +422,50 @@ static struct platform_device sdhi0_device = {
240 }, 422 },
241}; 423};
242 424
425/* Micro SD */
426static struct sh_mobile_sdhi_info sdhi2_info = {
427 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
428 TMIO_MMC_USE_GPIO_CD |
429 TMIO_MMC_WRPROTECT_DISABLE,
430 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
431 .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
432 .cd_gpio = GPIO_PORT13,
433};
434
435static struct resource sdhi2_resources[] = {
436 [0] = {
437 .name = "SDHI2",
438 .start = 0xee140000,
439 .end = 0xee1400ff,
440 .flags = IORESOURCE_MEM,
441 },
442 [1] = {
443 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
444 .start = gic_spi(103),
445 .flags = IORESOURCE_IRQ,
446 },
447 [2] = {
448 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
449 .start = gic_spi(104),
450 .flags = IORESOURCE_IRQ,
451 },
452 [3] = {
453 .name = SH_MOBILE_SDHI_IRQ_SDIO,
454 .start = gic_spi(105),
455 .flags = IORESOURCE_IRQ,
456 },
457};
458
459static struct platform_device sdhi2_device = {
460 .name = "sh_mobile_sdhi",
461 .id = 2,
462 .num_resources = ARRAY_SIZE(sdhi2_resources),
463 .resource = sdhi2_resources,
464 .dev = {
465 .platform_data = &sdhi2_info,
466 },
467};
468
243/* KEY */ 469/* KEY */
244#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } 470#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
245 471
@@ -267,11 +493,74 @@ static struct platform_device gpio_keys_device = {
267 }, 493 },
268}; 494};
269 495
496/* FSI-AK4648 */
497static struct sh_fsi_platform_info fsi_info = {
498 .port_a = {
499 .tx_id = SHDMA_SLAVE_FSI2A_TX,
500 },
501};
502
503static struct resource fsi_resources[] = {
504 [0] = {
505 .name = "FSI",
506 .start = 0xEC230000,
507 .end = 0xEC230400 - 1,
508 .flags = IORESOURCE_MEM,
509 },
510 [1] = {
511 .start = gic_spi(146),
512 .flags = IORESOURCE_IRQ,
513 },
514};
515
516static struct platform_device fsi_device = {
517 .name = "sh_fsi2",
518 .id = -1,
519 .num_resources = ARRAY_SIZE(fsi_resources),
520 .resource = fsi_resources,
521 .dev = {
522 .platform_data = &fsi_info,
523 },
524};
525
526static struct asoc_simple_dai_init_info fsi2_ak4648_init_info = {
527 .fmt = SND_SOC_DAIFMT_LEFT_J,
528 .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
529 .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
530 .sysclk = 11289600,
531};
532
533static struct asoc_simple_card_info fsi2_ak4648_info = {
534 .name = "AK4648",
535 .card = "FSI2A-AK4648",
536 .cpu_dai = "fsia-dai",
537 .codec = "ak4642-codec.0-0012",
538 .platform = "sh_fsi2",
539 .codec_dai = "ak4642-hifi",
540 .init = &fsi2_ak4648_init_info,
541};
542
543static struct platform_device fsi_ak4648_device = {
544 .name = "asoc-simple-card",
545 .dev = {
546 .platform_data = &fsi2_ak4648_info,
547 },
548};
549
270/* I2C */ 550/* I2C */
271static struct pcf857x_platform_data pcf8575_pdata = { 551static struct pcf857x_platform_data pcf8575_pdata = {
272 .gpio_base = GPIO_PCF8575_BASE, 552 .gpio_base = GPIO_PCF8575_BASE,
273}; 553};
274 554
555static struct i2c_board_info i2c0_devices[] = {
556 {
557 I2C_BOARD_INFO("ak4648", 0x12),
558 },
559 {
560 I2C_BOARD_INFO("r2025sd", 0x32),
561 }
562};
563
275static struct i2c_board_info i2c1_devices[] = { 564static struct i2c_board_info i2c1_devices[] = {
276 { 565 {
277 I2C_BOARD_INFO("st1232-ts", 0x55), 566 I2C_BOARD_INFO("st1232-ts", 0x55),
@@ -289,10 +578,14 @@ static struct i2c_board_info i2c3_devices[] = {
289static struct platform_device *kzm_devices[] __initdata = { 578static struct platform_device *kzm_devices[] __initdata = {
290 &smsc_device, 579 &smsc_device,
291 &usb_host_device, 580 &usb_host_device,
581 &usbhs_device,
292 &lcdc_device, 582 &lcdc_device,
293 &mmc_device, 583 &mmc_device,
294 &sdhi0_device, 584 &sdhi0_device,
585 &sdhi2_device,
295 &gpio_keys_device, 586 &gpio_keys_device,
587 &fsi_device,
588 &fsi_ak4648_device,
296}; 589};
297 590
298/* 591/*
@@ -350,6 +643,12 @@ device_initcall(as3711_enable_lcdc_backlight);
350 643
351static void __init kzm_init(void) 644static void __init kzm_init(void)
352{ 645{
646 regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
647 ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
648 regulator_register_always_on(1, "fixed-2.8V", fixed2v8_power_consumers,
649 ARRAY_SIZE(fixed2v8_power_consumers), 2800000);
650 regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
651
353 sh73a0_pinmux_init(); 652 sh73a0_pinmux_init();
354 653
355 /* enable SCIFA4 */ 654 /* enable SCIFA4 */
@@ -427,15 +726,36 @@ static void __init kzm_init(void)
427 gpio_request(GPIO_PORT15, NULL); 726 gpio_request(GPIO_PORT15, NULL);
428 gpio_direction_output(GPIO_PORT15, 1); /* power */ 727 gpio_direction_output(GPIO_PORT15, 1); /* power */
429 728
729 /* enable Micro SD */
730 gpio_request(GPIO_FN_SDHID2_0, NULL);
731 gpio_request(GPIO_FN_SDHID2_1, NULL);
732 gpio_request(GPIO_FN_SDHID2_2, NULL);
733 gpio_request(GPIO_FN_SDHID2_3, NULL);
734 gpio_request(GPIO_FN_SDHICMD2, NULL);
735 gpio_request(GPIO_FN_SDHICLK2, NULL);
736 gpio_request(GPIO_PORT14, NULL);
737 gpio_direction_output(GPIO_PORT14, 1); /* power */
738
430 /* I2C 3 */ 739 /* I2C 3 */
431 gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL); 740 gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL);
432 gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL); 741 gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL);
433 742
743 /* enable FSI2 port A (ak4648) */
744 gpio_request(GPIO_FN_FSIACK, NULL);
745 gpio_request(GPIO_FN_FSIAILR, NULL);
746 gpio_request(GPIO_FN_FSIAIBT, NULL);
747 gpio_request(GPIO_FN_FSIAISLD, NULL);
748 gpio_request(GPIO_FN_FSIAOSLD, NULL);
749
750 /* enable USB */
751 gpio_request(GPIO_FN_VBUS_0, NULL);
752
434#ifdef CONFIG_CACHE_L2X0 753#ifdef CONFIG_CACHE_L2X0
435 /* Early BRESP enable, Shared attribute override enable, 64K*8way */ 754 /* Early BRESP enable, Shared attribute override enable, 64K*8way */
436 l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff); 755 l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
437#endif 756#endif
438 757
758 i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
439 i2c_register_board_info(1, i2c1_devices, ARRAY_SIZE(i2c1_devices)); 759 i2c_register_board_info(1, i2c1_devices, ARRAY_SIZE(i2c1_devices));
440 i2c_register_board_info(3, i2c3_devices, ARRAY_SIZE(i2c3_devices)); 760 i2c_register_board_info(3, i2c3_devices, ARRAY_SIZE(i2c3_devices));
441 761
@@ -455,6 +775,7 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g")
455 .init_irq = sh73a0_init_irq, 775 .init_irq = sh73a0_init_irq,
456 .handle_irq = gic_handle_irq, 776 .handle_irq = gic_handle_irq,
457 .init_machine = kzm_init, 777 .init_machine = kzm_init,
778 .init_late = shmobile_init_late,
458 .timer = &shmobile_timer, 779 .timer = &shmobile_timer,
459 .dt_compat = kzm9g_boards_compat_dt, 780 .dt_compat = kzm9g_boards_compat_dt,
460MACHINE_END 781MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index b3af57a026fe..7ea2b31e3199 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1521,6 +1521,9 @@ static void __init mackerel_init(void)
1521 gpio_request(GPIO_FN_SDHID0_1, NULL); 1521 gpio_request(GPIO_FN_SDHID0_1, NULL);
1522 gpio_request(GPIO_FN_SDHID0_0, NULL); 1522 gpio_request(GPIO_FN_SDHID0_0, NULL);
1523 1523
1524 /* SDHI0 PORT172 card-detect IRQ26 */
1525 gpio_request(GPIO_FN_IRQ26_172, NULL);
1526
1524#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) 1527#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1525 /* enable SDHI1 */ 1528 /* enable SDHI1 */
1526 gpio_request(GPIO_FN_SDHICMD1, NULL); 1529 gpio_request(GPIO_FN_SDHICMD1, NULL);
@@ -1620,20 +1623,20 @@ static void __init mackerel_init(void)
1620 1623
1621 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices)); 1624 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
1622 1625
1623 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device); 1626 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device);
1624 sh7372_add_device_to_domain(&sh7372_a4lc, &hdmi_lcdc_device); 1627 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &hdmi_lcdc_device);
1625 sh7372_add_device_to_domain(&sh7372_a4lc, &meram_device); 1628 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &meram_device);
1626 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device); 1629 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device);
1627 sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device); 1630 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usbhs0_device);
1628 sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device); 1631 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usbhs1_device);
1629 sh7372_add_device_to_domain(&sh7372_a3sp, &nand_flash_device); 1632 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &nand_flash_device);
1630 sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device); 1633 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device);
1631 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device); 1634 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device);
1632#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) 1635#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1633 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device); 1636 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device);
1634#endif 1637#endif
1635 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device); 1638 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi2_device);
1636 sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device); 1639 rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device);
1637 1640
1638 hdmi_init_pm_clock(); 1641 hdmi_init_pm_clock();
1639 sh7372_pm_init(); 1642 sh7372_pm_init();
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index 26eea5f21054..ad5fccc7b5e7 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -43,7 +43,10 @@
43/* CPG registers */ 43/* CPG registers */
44#define FRQCRA 0xe6150000 44#define FRQCRA 0xe6150000
45#define FRQCRB 0xe6150004 45#define FRQCRB 0xe6150004
46#define VCLKCR1 0xE6150008
47#define VCLKCR2 0xE615000c
46#define FRQCRC 0xe61500e0 48#define FRQCRC 0xe61500e0
49#define FSIACKCR 0xe6150018
47#define PLLC01CR 0xe6150028 50#define PLLC01CR 0xe6150028
48 51
49#define SUBCKCR 0xe6150080 52#define SUBCKCR 0xe6150080
@@ -54,6 +57,8 @@
54#define MSTPSR2 0xe6150040 57#define MSTPSR2 0xe6150040
55#define MSTPSR3 0xe6150048 58#define MSTPSR3 0xe6150048
56#define MSTPSR4 0xe615004c 59#define MSTPSR4 0xe615004c
60#define FSIBCKCR 0xe6150090
61#define HDMICKCR 0xe6150094
57#define SMSTPCR0 0xe6150130 62#define SMSTPCR0 0xe6150130
58#define SMSTPCR1 0xe6150134 63#define SMSTPCR1 0xe6150134
59#define SMSTPCR2 0xe6150138 64#define SMSTPCR2 0xe6150138
@@ -271,6 +276,13 @@ static struct clk usb24_clk = {
271 .parent = &usb24s_clk, 276 .parent = &usb24s_clk,
272}; 277};
273 278
279/* External FSIACK/FSIBCK clock */
280static struct clk fsiack_clk = {
281};
282
283static struct clk fsibck_clk = {
284};
285
274struct clk *main_clks[] = { 286struct clk *main_clks[] = {
275 &extalr_clk, 287 &extalr_clk,
276 &extal1_clk, 288 &extal1_clk,
@@ -288,6 +300,8 @@ struct clk *main_clks[] = {
288 &pllc1_div2_clk, 300 &pllc1_div2_clk,
289 &usb24s_clk, 301 &usb24s_clk,
290 &usb24_clk, 302 &usb24_clk,
303 &fsiack_clk,
304 &fsibck_clk,
291}; 305};
292 306
293static void div4_kick(struct clk *clk) 307static void div4_kick(struct clk *clk)
@@ -313,6 +327,107 @@ static struct clk_div4_table div4_table = {
313 .kick = div4_kick, 327 .kick = div4_kick,
314}; 328};
315 329
330/* DIV6 reparent */
331enum {
332 DIV6_HDMI,
333 DIV6_VCLK1, DIV6_VCLK2,
334 DIV6_FSIA, DIV6_FSIB,
335 DIV6_REPARENT_NR,
336};
337
338static struct clk *hdmi_parent[] = {
339 [0] = &pllc1_div2_clk,
340 [1] = &system_clk,
341 [2] = &dv_clk
342};
343
344static struct clk *vclk_parents[8] = {
345 [0] = &pllc1_div2_clk,
346 [2] = &dv_clk,
347 [3] = &usb24s_clk,
348 [4] = &extal1_div2_clk,
349 [5] = &extalr_clk,
350};
351
352static struct clk *fsia_parents[] = {
353 [0] = &pllc1_div2_clk,
354 [1] = &fsiack_clk, /* external clock */
355};
356
357static struct clk *fsib_parents[] = {
358 [0] = &pllc1_div2_clk,
359 [1] = &fsibck_clk, /* external clock */
360};
361
362static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
363 [DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, 0,
364 hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
365 [DIV6_VCLK1] = SH_CLK_DIV6_EXT(VCLKCR1, 0,
366 vclk_parents, ARRAY_SIZE(vclk_parents), 12, 3),
367 [DIV6_VCLK2] = SH_CLK_DIV6_EXT(VCLKCR2, 0,
368 vclk_parents, ARRAY_SIZE(vclk_parents), 12, 3),
369 [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0,
370 fsia_parents, ARRAY_SIZE(fsia_parents), 6, 2),
371 [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0,
372 fsib_parents, ARRAY_SIZE(fsib_parents), 6, 2),
373};
374
375/* HDMI1/2 clock */
376static unsigned long hdmi12_recalc(struct clk *clk)
377{
378 u32 val = __raw_readl(HDMICKCR);
379 int shift = (int)clk->priv;
380
381 val >>= shift;
382 val &= 0x3;
383
384 return clk->parent->rate / (1 << val);
385};
386
387static int hdmi12_set_rate(struct clk *clk, unsigned long rate)
388{
389 u32 val, mask;
390 int i, shift;
391
392 for (i = 0; i < 3; i++)
393 if (rate == clk->parent->rate / (1 << i))
394 goto find;
395 return -ENODEV;
396
397find:
398 shift = (int)clk->priv;
399
400 val = __raw_readl(HDMICKCR);
401 mask = ~(0x3 << shift);
402 val = (val & mask) | i << shift;
403 __raw_writel(val, HDMICKCR);
404
405 return 0;
406};
407
408static struct sh_clk_ops hdmi12_clk_ops = {
409 .recalc = hdmi12_recalc,
410 .set_rate = hdmi12_set_rate,
411};
412
413static struct clk hdmi1_clk = {
414 .ops = &hdmi12_clk_ops,
415 .priv = (void *)9,
416 .parent = &div6_reparent_clks[DIV6_HDMI], /* late install */
417};
418
419static struct clk hdmi2_clk = {
420 .ops = &hdmi12_clk_ops,
421 .priv = (void *)11,
422 .parent = &div6_reparent_clks[DIV6_HDMI], /* late install */
423};
424
425static struct clk *late_main_clks[] = {
426 &hdmi1_clk,
427 &hdmi2_clk,
428};
429
430/* MSTP */
316enum { 431enum {
317 DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP, 432 DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP,
318 DIV4_HPP, DIV4_USBP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP, 433 DIV4_HPP, DIV4_USBP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP,
@@ -343,11 +458,12 @@ static struct clk div6_clks[DIV6_NR] = {
343}; 458};
344 459
345enum { 460enum {
346 MSTP125, 461 MSTP128, MSTP127, MSTP125,
347 MSTP116, MSTP111, MSTP100, MSTP117, 462 MSTP116, MSTP111, MSTP100, MSTP117,
348 463
349 MSTP230, 464 MSTP230,
350 MSTP222, 465 MSTP222,
466 MSTP218, MSTP217, MSTP216, MSTP214,
351 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 467 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
352 468
353 MSTP329, MSTP328, MSTP323, MSTP320, 469 MSTP329, MSTP328, MSTP323, MSTP320,
@@ -360,6 +476,8 @@ enum {
360}; 476};
361 477
362static struct clk mstp_clks[MSTP_NR] = { 478static struct clk mstp_clks[MSTP_NR] = {
479 [MSTP128] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR1, 28, 0), /* CEU21 */
480 [MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR1, 27, 0), /* CEU20 */
363 [MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ 481 [MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
364 [MSTP117] = SH_CLK_MSTP32(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */ 482 [MSTP117] = SH_CLK_MSTP32(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */
365 [MSTP116] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ 483 [MSTP116] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
@@ -368,6 +486,10 @@ static struct clk mstp_clks[MSTP_NR] = {
368 486
369 [MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */ 487 [MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */
370 [MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */ 488 [MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */
489 [MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */
490 [MSTP217] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
491 [MSTP216] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */
492 [MSTP214] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */
371 [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ 493 [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
372 [MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ 494 [MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
373 [MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ 495 [MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
@@ -408,6 +530,12 @@ static struct clk_lookup lookups[] = {
408 CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), 530 CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
409 CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), 531 CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
410 CLKDEV_CON_ID("usb24s", &usb24s_clk), 532 CLKDEV_CON_ID("usb24s", &usb24s_clk),
533 CLKDEV_CON_ID("hdmi1", &hdmi1_clk),
534 CLKDEV_CON_ID("hdmi2", &hdmi2_clk),
535 CLKDEV_CON_ID("video1", &div6_reparent_clks[DIV6_VCLK1]),
536 CLKDEV_CON_ID("video2", &div6_reparent_clks[DIV6_VCLK2]),
537 CLKDEV_CON_ID("fsiack", &fsiack_clk),
538 CLKDEV_CON_ID("fsibck", &fsibck_clk),
411 539
412 /* DIV4 clocks */ 540 /* DIV4 clocks */
413 CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), 541 CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
@@ -430,6 +558,8 @@ static struct clk_lookup lookups[] = {
430 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), 558 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]),
431 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), 559 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]),
432 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), 560 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]),
561 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]),
562 CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]),
433 563
434 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), 564 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]),
435 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), 565 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]),
@@ -438,7 +568,10 @@ static struct clk_lookup lookups[] = {
438 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), 568 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
439 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), 569 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]),
440 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), 570 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]),
441 571 CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]),
572 CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]),
573 CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]),
574 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]),
442 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]), 575 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]),
443 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]), 576 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]),
444 577
@@ -459,6 +592,10 @@ static struct clk_lookup lookups[] = {
459 CLKDEV_ICK_ID("phy", "renesas_usbhs", &mstp_clks[MSTP406]), 592 CLKDEV_ICK_ID("phy", "renesas_usbhs", &mstp_clks[MSTP406]),
460 CLKDEV_ICK_ID("pci", "renesas_usbhs", &div4_clks[DIV4_USBP]), 593 CLKDEV_ICK_ID("pci", "renesas_usbhs", &div4_clks[DIV4_USBP]),
461 CLKDEV_ICK_ID("usb24", "renesas_usbhs", &usb24_clk), 594 CLKDEV_ICK_ID("usb24", "renesas_usbhs", &usb24_clk),
595 CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
596
597 CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
598 CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
462}; 599};
463 600
464void __init r8a7740_clock_init(u8 md_ck) 601void __init r8a7740_clock_init(u8 md_ck)
@@ -495,7 +632,14 @@ void __init r8a7740_clock_init(u8 md_ck)
495 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 632 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
496 633
497 if (!ret) 634 if (!ret)
498 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 635 ret = sh_clk_div6_reparent_register(div6_reparent_clks,
636 DIV6_REPARENT_NR);
637
638 if (!ret)
639 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
640
641 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
642 ret = clk_register(late_main_clks[k]);
499 643
500 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 644 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
501 645
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
index 7d6e9fe47b56..339c62c824d5 100644
--- a/arch/arm/mach-shmobile/clock-r8a7779.c
+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
@@ -162,7 +162,7 @@ void __init r8a7779_clock_init(void)
162 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 162 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
163 163
164 if (!ret) 164 if (!ret)
165 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 165 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
166 166
167 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) 167 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
168 ret = clk_register(late_main_clks[k]); 168 ret = clk_register(late_main_clks[k]);
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index 006e7b5d304c..162b791b8984 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -344,7 +344,7 @@ void __init sh7367_clock_init(void)
344 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 344 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
345 345
346 if (!ret) 346 if (!ret)
347 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 347 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
348 348
349 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 349 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
350 350
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 94d1f88246d3..5a2894b1c965 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -704,7 +704,7 @@ void __init sh7372_clock_init(void)
704 ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR); 704 ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
705 705
706 if (!ret) 706 if (!ret)
707 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 707 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
708 708
709 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) 709 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
710 ret = clk_register(late_main_clks[k]); 710 ret = clk_register(late_main_clks[k]);
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
index 0798a15936c3..85f2a3ec2c44 100644
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -355,7 +355,7 @@ void __init sh7377_clock_init(void)
355 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 355 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
356 356
357 if (!ret) 357 if (!ret)
358 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 358 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
359 359
360 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 360 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
361 361
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 472d1f5361e5..7f8da18a8580 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -475,9 +475,9 @@ static struct clk *late_main_clks[] = {
475 475
476enum { MSTP001, 476enum { MSTP001,
477 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, 477 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
478 MSTP219, 478 MSTP219, MSTP218, MSTP217,
479 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 479 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
480 MSTP331, MSTP329, MSTP325, MSTP323, MSTP318, 480 MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322,
481 MSTP314, MSTP313, MSTP312, MSTP311, 481 MSTP314, MSTP313, MSTP312, MSTP311,
482 MSTP303, MSTP302, MSTP301, MSTP300, 482 MSTP303, MSTP302, MSTP301, MSTP300,
483 MSTP411, MSTP410, MSTP403, 483 MSTP411, MSTP410, MSTP403,
@@ -497,6 +497,8 @@ static struct clk mstp_clks[MSTP_NR] = {
497 [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */ 497 [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
498 [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */ 498 [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
499 [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */ 499 [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
500 [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* SY-DMAC */
501 [MSTP217] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* MP-DMAC */
500 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ 502 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
501 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ 503 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
502 [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ 504 [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
@@ -506,9 +508,10 @@ static struct clk mstp_clks[MSTP_NR] = {
506 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ 508 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
507 [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */ 509 [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */
508 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ 510 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
511 [MSTP328] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 28, 0), /*FSI*/
509 [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */ 512 [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
510 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */ 513 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
511 [MSTP318] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* SY-DMAC */ 514 [MSTP322] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 22, 0), /* USB */
512 [MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */ 515 [MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */
513 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ 516 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
514 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ 517 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
@@ -552,6 +555,8 @@ static struct clk_lookup lookups[] = {
552 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ 555 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
553 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ 556 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
554 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ 557 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
558 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */
559 CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* MP-DMAC */
555 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ 560 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
556 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ 561 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
557 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ 562 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
@@ -561,9 +566,10 @@ static struct clk_lookup lookups[] = {
561 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ 566 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
562 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */ 567 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
563 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ 568 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
569 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
564 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */ 570 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
565 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */ 571 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
566 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP318]), /* SY-DMAC */ 572 CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */
567 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ 573 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
568 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 574 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
569 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ 575 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
@@ -612,7 +618,7 @@ void __init sh73a0_clock_init(void)
612 ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR); 618 ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
613 619
614 if (!ret) 620 if (!ret)
615 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 621 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
616 622
617 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) 623 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
618 ret = clk_register(late_main_clks[k]); 624 ret = clk_register(late_main_clks[k]);
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 01e2bc014f15..45e61dada030 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -77,6 +77,7 @@ extern void r8a7779_add_standard_devices(void);
77extern void r8a7779_clock_init(void); 77extern void r8a7779_clock_init(void);
78extern void r8a7779_pinmux_init(void); 78extern void r8a7779_pinmux_init(void);
79extern void r8a7779_pm_init(void); 79extern void r8a7779_pm_init(void);
80extern void r8a7740_meram_workaround(void);
80 81
81extern unsigned int r8a7779_get_core_count(void); 82extern unsigned int r8a7779_get_core_count(void);
82extern int r8a7779_platform_cpu_kill(unsigned int cpu); 83extern int r8a7779_platform_cpu_kill(unsigned int cpu);
diff --git a/arch/arm/mach-shmobile/include/mach/pm-rmobile.h b/arch/arm/mach-shmobile/include/mach/pm-rmobile.h
new file mode 100644
index 000000000000..5a402840fe28
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/pm-rmobile.h
@@ -0,0 +1,44 @@
1/*
2 * Copyright (C) 2012 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef PM_RMOBILE_H
11#define PM_RMOBILE_H
12
13#include <linux/pm_domain.h>
14
15struct platform_device;
16
17struct rmobile_pm_domain {
18 struct generic_pm_domain genpd;
19 struct dev_power_governor *gov;
20 int (*suspend)(void);
21 void (*resume)(void);
22 unsigned int bit_shift;
23 bool no_debug;
24};
25
26static inline
27struct rmobile_pm_domain *to_rmobile_pd(struct generic_pm_domain *d)
28{
29 return container_of(d, struct rmobile_pm_domain, genpd);
30}
31
32#ifdef CONFIG_PM
33extern void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd);
34extern void rmobile_add_device_to_domain(struct rmobile_pm_domain *rmobile_pd,
35 struct platform_device *pdev);
36extern void rmobile_pm_add_subdomain(struct rmobile_pm_domain *rmobile_pd,
37 struct rmobile_pm_domain *rmobile_sd);
38#else
39#define rmobile_init_pm_domain(pd) do { } while (0)
40#define rmobile_add_device_to_domain(pd, pdev) do { } while (0)
41#define rmobile_pm_add_subdomain(pd, sd) do { } while (0)
42#endif /* CONFIG_PM */
43
44#endif /* PM_RMOBILE_H */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
index 9d447abb969c..7143147780df 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
@@ -19,6 +19,8 @@
19#ifndef __ASM_R8A7740_H__ 19#ifndef __ASM_R8A7740_H__
20#define __ASM_R8A7740_H__ 20#define __ASM_R8A7740_H__
21 21
22#include <mach/pm-rmobile.h>
23
22/* 24/*
23 * MD_CKx pin 25 * MD_CKx pin
24 */ 26 */
@@ -139,7 +141,7 @@ enum {
139 GPIO_FN_DBGMD10, GPIO_FN_DBGMD11, GPIO_FN_DBGMD20, 141 GPIO_FN_DBGMD10, GPIO_FN_DBGMD11, GPIO_FN_DBGMD20,
140 GPIO_FN_DBGMD21, 142 GPIO_FN_DBGMD21,
141 143
142 /* FSI */ 144 /* FSI-A */
143 GPIO_FN_FSIAISLD_PORT0, /* FSIAISLD Port 0/5 */ 145 GPIO_FN_FSIAISLD_PORT0, /* FSIAISLD Port 0/5 */
144 GPIO_FN_FSIAISLD_PORT5, 146 GPIO_FN_FSIAISLD_PORT5,
145 GPIO_FN_FSIASPDIF_PORT9, /* FSIASPDIF Port 9/18 */ 147 GPIO_FN_FSIASPDIF_PORT9, /* FSIASPDIF Port 9/18 */
@@ -150,6 +152,9 @@ enum {
150 GPIO_FN_FSIACK, GPIO_FN_FSIAILR, 152 GPIO_FN_FSIACK, GPIO_FN_FSIAILR,
151 GPIO_FN_FSIAIBT, 153 GPIO_FN_FSIAIBT,
152 154
155 /* FSI-B */
156 GPIO_FN_FSIBCK,
157
153 /* FMSI */ 158 /* FMSI */
154 GPIO_FN_FMSISLD_PORT1, /* FMSISLD Port 1/6 */ 159 GPIO_FN_FMSISLD_PORT1, /* FMSISLD Port 1/6 */
155 GPIO_FN_FMSISLD_PORT6, 160 GPIO_FN_FMSISLD_PORT6,
@@ -565,6 +570,10 @@ enum {
565 GPIO_FN_RESETP_PULLUP, 570 GPIO_FN_RESETP_PULLUP,
566 GPIO_FN_RESETP_PLAIN, 571 GPIO_FN_RESETP_PLAIN,
567 572
573 /* HDMI */
574 GPIO_FN_HDMI_HPD,
575 GPIO_FN_HDMI_CEC,
576
568 /* SDENC */ 577 /* SDENC */
569 GPIO_FN_SDENC_CPG, 578 GPIO_FN_SDENC_CPG,
570 GPIO_FN_SDENC_DV_CLKI, 579 GPIO_FN_SDENC_DV_CLKI,
@@ -581,4 +590,26 @@ enum {
581 GPIO_FN_TRACEAUD_FROM_MEMC, 590 GPIO_FN_TRACEAUD_FROM_MEMC,
582}; 591};
583 592
593/* DMA slave IDs */
594enum {
595 SHDMA_SLAVE_INVALID,
596 SHDMA_SLAVE_SDHI0_RX,
597 SHDMA_SLAVE_SDHI0_TX,
598 SHDMA_SLAVE_SDHI1_RX,
599 SHDMA_SLAVE_SDHI1_TX,
600 SHDMA_SLAVE_SDHI2_RX,
601 SHDMA_SLAVE_SDHI2_TX,
602 SHDMA_SLAVE_FSIA_RX,
603 SHDMA_SLAVE_FSIA_TX,
604 SHDMA_SLAVE_FSIB_TX,
605 SHDMA_SLAVE_USBHS_TX,
606 SHDMA_SLAVE_USBHS_RX,
607};
608
609#ifdef CONFIG_PM
610extern struct rmobile_pm_domain r8a7740_pd_a4s;
611extern struct rmobile_pm_domain r8a7740_pd_a3sp;
612extern struct rmobile_pm_domain r8a7740_pd_a4lc;
613#endif /* CONFIG_PM */
614
584#endif /* __ASM_R8A7740_H__ */ 615#endif /* __ASM_R8A7740_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index 915d0093da08..b59048e6d8fd 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -13,6 +13,7 @@
13 13
14#include <linux/sh_clk.h> 14#include <linux/sh_clk.h>
15#include <linux/pm_domain.h> 15#include <linux/pm_domain.h>
16#include <mach/pm-rmobile.h>
16 17
17/* 18/*
18 * Pin Function Controller: 19 * Pin Function Controller:
@@ -477,42 +478,16 @@ extern struct clk sh7372_fsibck_clk;
477extern struct clk sh7372_fsidiva_clk; 478extern struct clk sh7372_fsidiva_clk;
478extern struct clk sh7372_fsidivb_clk; 479extern struct clk sh7372_fsidivb_clk;
479 480
480struct platform_device;
481
482struct sh7372_pm_domain {
483 struct generic_pm_domain genpd;
484 struct dev_power_governor *gov;
485 int (*suspend)(void);
486 void (*resume)(void);
487 unsigned int bit_shift;
488 bool no_debug;
489};
490
491static inline struct sh7372_pm_domain *to_sh7372_pd(struct generic_pm_domain *d)
492{
493 return container_of(d, struct sh7372_pm_domain, genpd);
494}
495
496#ifdef CONFIG_PM 481#ifdef CONFIG_PM
497extern struct sh7372_pm_domain sh7372_a4lc; 482extern struct rmobile_pm_domain sh7372_pd_a4lc;
498extern struct sh7372_pm_domain sh7372_a4mp; 483extern struct rmobile_pm_domain sh7372_pd_a4mp;
499extern struct sh7372_pm_domain sh7372_d4; 484extern struct rmobile_pm_domain sh7372_pd_d4;
500extern struct sh7372_pm_domain sh7372_a4r; 485extern struct rmobile_pm_domain sh7372_pd_a4r;
501extern struct sh7372_pm_domain sh7372_a3rv; 486extern struct rmobile_pm_domain sh7372_pd_a3rv;
502extern struct sh7372_pm_domain sh7372_a3ri; 487extern struct rmobile_pm_domain sh7372_pd_a3ri;
503extern struct sh7372_pm_domain sh7372_a4s; 488extern struct rmobile_pm_domain sh7372_pd_a4s;
504extern struct sh7372_pm_domain sh7372_a3sp; 489extern struct rmobile_pm_domain sh7372_pd_a3sp;
505extern struct sh7372_pm_domain sh7372_a3sg; 490extern struct rmobile_pm_domain sh7372_pd_a3sg;
506
507extern void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd);
508extern void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
509 struct platform_device *pdev);
510extern void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd,
511 struct sh7372_pm_domain *sh7372_sd);
512#else
513#define sh7372_init_pm_domain(pd) do { } while(0)
514#define sh7372_add_device_to_domain(pd, pdev) do { } while(0)
515#define sh7372_pm_add_subdomain(pd, sd) do { } while(0)
516#endif /* CONFIG_PM */ 491#endif /* CONFIG_PM */
517 492
518extern void sh7372_intcs_suspend(void); 493extern void sh7372_intcs_suspend(void);
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index 398e2c10913b..fe950f25d793 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -516,6 +516,13 @@ enum {
516 SHDMA_SLAVE_SDHI2_RX, 516 SHDMA_SLAVE_SDHI2_RX,
517 SHDMA_SLAVE_MMCIF_TX, 517 SHDMA_SLAVE_MMCIF_TX,
518 SHDMA_SLAVE_MMCIF_RX, 518 SHDMA_SLAVE_MMCIF_RX,
519 SHDMA_SLAVE_FSI2A_TX,
520 SHDMA_SLAVE_FSI2A_RX,
521 SHDMA_SLAVE_FSI2B_TX,
522 SHDMA_SLAVE_FSI2B_RX,
523 SHDMA_SLAVE_FSI2C_TX,
524 SHDMA_SLAVE_FSI2C_RX,
525 SHDMA_SLAVE_FSI2D_RX,
519}; 526};
520 527
521/* 528/*
diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c
index 09c42afcb22d..9a69a31918ba 100644
--- a/arch/arm/mach-shmobile/intc-r8a7740.c
+++ b/arch/arm/mach-shmobile/intc-r8a7740.c
@@ -71,10 +71,12 @@ enum {
71 DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3, 71 DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
72 DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR, 72 DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
73 SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 73 SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
74 HDMI,
74 USBH_INT, USBH_OHCI, USBH_EHCI, USBH_PME, USBH_BIND, 75 USBH_INT, USBH_OHCI, USBH_EHCI, USBH_PME, USBH_BIND,
75 RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, 76 RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF,
76 SPU2_0, SPU2_1, 77 SPU2_0, SPU2_1,
77 FSI, FMSI, 78 FSI, FMSI,
79 HDMI_SSS, HDMI_KEY,
78 IPMMU, 80 IPMMU,
79 AP_ARM_CTIIRQ, AP_ARM_PMURQ, 81 AP_ARM_CTIIRQ, AP_ARM_PMURQ,
80 MFIS2, 82 MFIS2,
@@ -182,6 +184,7 @@ static struct intc_vect intca_vectors[] __initdata = {
182 INTC_VECT(USBH_EHCI, 0x1580), 184 INTC_VECT(USBH_EHCI, 0x1580),
183 INTC_VECT(USBH_PME, 0x15A0), 185 INTC_VECT(USBH_PME, 0x15A0),
184 INTC_VECT(USBH_BIND, 0x15C0), 186 INTC_VECT(USBH_BIND, 0x15C0),
187 INTC_VECT(HDMI, 0x1700),
185 INTC_VECT(RSPI_OVRF, 0x1780), 188 INTC_VECT(RSPI_OVRF, 0x1780),
186 INTC_VECT(RSPI_SPTEF, 0x17A0), 189 INTC_VECT(RSPI_SPTEF, 0x17A0),
187 INTC_VECT(RSPI_SPRF, 0x17C0), 190 INTC_VECT(RSPI_SPRF, 0x17C0),
@@ -189,6 +192,8 @@ static struct intc_vect intca_vectors[] __initdata = {
189 INTC_VECT(SPU2_1, 0x1820), 192 INTC_VECT(SPU2_1, 0x1820),
190 INTC_VECT(FSI, 0x1840), 193 INTC_VECT(FSI, 0x1840),
191 INTC_VECT(FMSI, 0x1860), 194 INTC_VECT(FMSI, 0x1860),
195 INTC_VECT(HDMI_SSS, 0x18A0),
196 INTC_VECT(HDMI_KEY, 0x18C0),
192 INTC_VECT(IPMMU, 0x1920), 197 INTC_VECT(IPMMU, 0x1920),
193 INTC_VECT(AP_ARM_CTIIRQ, 0x1980), 198 INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
194 INTC_VECT(AP_ARM_PMURQ, 0x19A0), 199 INTC_VECT(AP_ARM_PMURQ, 0x19A0),
@@ -304,11 +309,11 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = {
304 USBH_EHCI, USBH_PME, USBH_BIND, 0 } }, 309 USBH_EHCI, USBH_PME, USBH_BIND, 0 } },
305 /* IMR3A3 / IMCR3A3 */ 310 /* IMR3A3 / IMCR3A3 */
306 { /* IMR4A3 / IMCR4A3 */ 0xe6950090, 0xe69500d0, 8, 311 { /* IMR4A3 / IMCR4A3 */ 0xe6950090, 0xe69500d0, 8,
307 { 0, 0, 0, 0, 312 { HDMI, 0, 0, 0,
308 RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, 0 } }, 313 RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, 0 } },
309 { /* IMR5A3 / IMCR5A3 */ 0xe6950094, 0xe69500d4, 8, 314 { /* IMR5A3 / IMCR5A3 */ 0xe6950094, 0xe69500d4, 8,
310 { SPU2_0, SPU2_1, FSI, FMSI, 315 { SPU2_0, SPU2_1, FSI, FMSI,
311 0, 0, 0, 0 } }, 316 0, HDMI_SSS, HDMI_KEY, 0 } },
312 { /* IMR6A3 / IMCR6A3 */ 0xe6950098, 0xe69500d8, 8, 317 { /* IMR6A3 / IMCR6A3 */ 0xe6950098, 0xe69500d8, 8,
313 { 0, IPMMU, 0, 0, 318 { 0, IPMMU, 0, 0,
314 AP_ARM_CTIIRQ, AP_ARM_PMURQ, 0, 0 } }, 319 AP_ARM_CTIIRQ, AP_ARM_PMURQ, 0, 0 } },
@@ -353,10 +358,10 @@ static struct intc_prio_reg intca_prio_registers[] __initdata = {
353 { 0xe6950014, 0, 16, 4, /* IPRFA3 */ { USBH2, 0, 0, 0 } }, 358 { 0xe6950014, 0, 16, 4, /* IPRFA3 */ { USBH2, 0, 0, 0 } },
354 /* IPRGA3 */ 359 /* IPRGA3 */
355 /* IPRHA3 */ 360 /* IPRHA3 */
356 /* IPRIA3 */ 361 { 0xe6950020, 0, 16, 4, /* IPRIA3 */ { HDMI, 0, 0, 0 } },
357 { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { RSPI, 0, 0, 0 } }, 362 { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { RSPI, 0, 0, 0 } },
358 { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } }, 363 { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
359 /* IPRLA3 */ 364 { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { 0, HDMI_SSS, HDMI_KEY, 0 } },
360 { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU, 0, 0, 0 } }, 365 { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU, 0, 0, 0 } },
361 { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } }, 366 { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
362 { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S, 367 { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index 550b23df4fd4..f04fad4ec4fb 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -35,6 +35,9 @@
35#define INT2SMSKCR3 0xfe7822ac 35#define INT2SMSKCR3 0xfe7822ac
36#define INT2SMSKCR4 0xfe7822b0 36#define INT2SMSKCR4 0xfe7822b0
37 37
38#define INT2NTSR0 0xfe700060
39#define INT2NTSR1 0xfe700064
40
38static int r8a7779_set_wake(struct irq_data *data, unsigned int on) 41static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
39{ 42{
40 return 0; /* always allow wakeup */ 43 return 0; /* always allow wakeup */
@@ -49,6 +52,10 @@ void __init r8a7779_init_irq(void)
49 gic_init(0, 29, gic_dist_base, gic_cpu_base); 52 gic_init(0, 29, gic_dist_base, gic_cpu_base);
50 gic_arch_extn.irq_set_wake = r8a7779_set_wake; 53 gic_arch_extn.irq_set_wake = r8a7779_set_wake;
51 54
55 /* route all interrupts to ARM */
56 __raw_writel(0xffffffff, INT2NTSR0);
57 __raw_writel(0x3fffffff, INT2NTSR1);
58
52 /* unmask all known interrupts in INTCS2 */ 59 /* unmask all known interrupts in INTCS2 */
53 __raw_writel(0xfffffff0, INT2SMSKCR0); 60 __raw_writel(0xfffffff0, INT2SMSKCR0);
54 __raw_writel(0xfff7ffff, INT2SMSKCR1); 61 __raw_writel(0xfff7ffff, INT2SMSKCR1);
diff --git a/arch/arm/mach-shmobile/pfc-r8a7740.c b/arch/arm/mach-shmobile/pfc-r8a7740.c
index 670fe1869dbc..ce9e7fa5cc8a 100644
--- a/arch/arm/mach-shmobile/pfc-r8a7740.c
+++ b/arch/arm/mach-shmobile/pfc-r8a7740.c
@@ -169,7 +169,7 @@ enum {
169 DBGMD10_MARK, DBGMD11_MARK, DBGMD20_MARK, 169 DBGMD10_MARK, DBGMD11_MARK, DBGMD20_MARK,
170 DBGMD21_MARK, 170 DBGMD21_MARK,
171 171
172 /* FSI */ 172 /* FSI-A */
173 FSIAISLD_PORT0_MARK, /* FSIAISLD Port 0/5 */ 173 FSIAISLD_PORT0_MARK, /* FSIAISLD Port 0/5 */
174 FSIAISLD_PORT5_MARK, 174 FSIAISLD_PORT5_MARK,
175 FSIASPDIF_PORT9_MARK, /* FSIASPDIF Port 9/18 */ 175 FSIASPDIF_PORT9_MARK, /* FSIASPDIF Port 9/18 */
@@ -178,6 +178,9 @@ enum {
178 FSIAOBT_MARK, FSIAOSLD_MARK, FSIAOMC_MARK, 178 FSIAOBT_MARK, FSIAOSLD_MARK, FSIAOMC_MARK,
179 FSIACK_MARK, FSIAILR_MARK, FSIAIBT_MARK, 179 FSIACK_MARK, FSIAILR_MARK, FSIAIBT_MARK,
180 180
181 /* FSI-B */
182 FSIBCK_MARK,
183
181 /* FMSI */ 184 /* FMSI */
182 FMSISLD_PORT1_MARK, /* FMSISLD Port 1/6 */ 185 FMSISLD_PORT1_MARK, /* FMSISLD Port 1/6 */
183 FMSISLD_PORT6_MARK, 186 FMSISLD_PORT6_MARK,
@@ -560,6 +563,9 @@ enum {
560 /* SDENC */ 563 /* SDENC */
561 SDENC_CPG_MARK, SDENC_DV_CLKI_MARK, 564 SDENC_CPG_MARK, SDENC_DV_CLKI_MARK,
562 565
566 /* HDMI */
567 HDMI_HPD_MARK, HDMI_CEC_MARK,
568
563 /* DEBUG */ 569 /* DEBUG */
564 EDEBGREQ_PULLUP_MARK, /* for JTAG */ 570 EDEBGREQ_PULLUP_MARK, /* for JTAG */
565 EDEBGREQ_PULLDOWN_MARK, 571 EDEBGREQ_PULLDOWN_MARK,
@@ -771,6 +777,7 @@ static pinmux_enum_t pinmux_data[] = {
771 777
772 /* Port11 */ 778 /* Port11 */
773 PINMUX_DATA(FSIACK_MARK, PORT11_FN1), 779 PINMUX_DATA(FSIACK_MARK, PORT11_FN1),
780 PINMUX_DATA(FSIBCK_MARK, PORT11_FN2),
774 PINMUX_DATA(IRQ2_PORT11_MARK, PORT11_FN0, MSEL1CR_2_0), 781 PINMUX_DATA(IRQ2_PORT11_MARK, PORT11_FN0, MSEL1CR_2_0),
775 782
776 /* Port12 */ 783 /* Port12 */
@@ -1254,7 +1261,7 @@ static pinmux_enum_t pinmux_data[] = {
1254 PINMUX_DATA(A21_MARK, PORT120_FN1), 1261 PINMUX_DATA(A21_MARK, PORT120_FN1),
1255 PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT120_FN2), 1262 PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT120_FN2),
1256 PINMUX_DATA(MSIOF1_TSYNC_PORT120_MARK, PORT120_FN3, MSEL4CR_10_0), 1263 PINMUX_DATA(MSIOF1_TSYNC_PORT120_MARK, PORT120_FN3, MSEL4CR_10_0),
1257 PINMUX_DATA(IRQ7_PORT120_MARK, PORT120_FN0, MSEL1CR_7_0), 1264 PINMUX_DATA(IRQ7_PORT120_MARK, PORT120_FN0, MSEL1CR_7_1),
1258 1265
1259 /* Port121 */ 1266 /* Port121 */
1260 PINMUX_DATA(A20_MARK, PORT121_FN1), 1267 PINMUX_DATA(A20_MARK, PORT121_FN1),
@@ -1616,13 +1623,15 @@ static pinmux_enum_t pinmux_data[] = {
1616 1623
1617 /* Port209 */ 1624 /* Port209 */
1618 PINMUX_DATA(VBUS_MARK, PORT209_FN1), 1625 PINMUX_DATA(VBUS_MARK, PORT209_FN1),
1619 PINMUX_DATA(IRQ7_PORT209_MARK, PORT209_FN0, MSEL1CR_7_1), 1626 PINMUX_DATA(IRQ7_PORT209_MARK, PORT209_FN0, MSEL1CR_7_0),
1620 1627
1621 /* Port210 */ 1628 /* Port210 */
1622 PINMUX_DATA(IRQ9_PORT210_MARK, PORT210_FN0, MSEL1CR_9_1), 1629 PINMUX_DATA(IRQ9_PORT210_MARK, PORT210_FN0, MSEL1CR_9_1),
1630 PINMUX_DATA(HDMI_HPD_MARK, PORT210_FN1),
1623 1631
1624 /* Port211 */ 1632 /* Port211 */
1625 PINMUX_DATA(IRQ16_PORT211_MARK, PORT211_FN0, MSEL1CR_16_1), 1633 PINMUX_DATA(IRQ16_PORT211_MARK, PORT211_FN0, MSEL1CR_16_1),
1634 PINMUX_DATA(HDMI_CEC_MARK, PORT211_FN1),
1626 1635
1627 /* LCDC select */ 1636 /* LCDC select */
1628 PINMUX_DATA(LCDC0_SELECT_MARK, MSEL3CR_6_0), 1637 PINMUX_DATA(LCDC0_SELECT_MARK, MSEL3CR_6_0),
@@ -1691,7 +1700,7 @@ static struct pinmux_gpio pinmux_gpios[] = {
1691 GPIO_FN(DBGMD10), GPIO_FN(DBGMD11), GPIO_FN(DBGMD20), 1700 GPIO_FN(DBGMD10), GPIO_FN(DBGMD11), GPIO_FN(DBGMD20),
1692 GPIO_FN(DBGMD21), 1701 GPIO_FN(DBGMD21),
1693 1702
1694 /* FSI */ 1703 /* FSI-A */
1695 GPIO_FN(FSIAISLD_PORT0), /* FSIAISLD Port 0/5 */ 1704 GPIO_FN(FSIAISLD_PORT0), /* FSIAISLD Port 0/5 */
1696 GPIO_FN(FSIAISLD_PORT5), 1705 GPIO_FN(FSIAISLD_PORT5),
1697 GPIO_FN(FSIASPDIF_PORT9), /* FSIASPDIF Port 9/18 */ 1706 GPIO_FN(FSIASPDIF_PORT9), /* FSIASPDIF Port 9/18 */
@@ -1700,6 +1709,9 @@ static struct pinmux_gpio pinmux_gpios[] = {
1700 GPIO_FN(FSIAOBT), GPIO_FN(FSIAOSLD), GPIO_FN(FSIAOMC), 1709 GPIO_FN(FSIAOBT), GPIO_FN(FSIAOSLD), GPIO_FN(FSIAOMC),
1701 GPIO_FN(FSIACK), GPIO_FN(FSIAILR), GPIO_FN(FSIAIBT), 1710 GPIO_FN(FSIACK), GPIO_FN(FSIAILR), GPIO_FN(FSIAIBT),
1702 1711
1712 /* FSI-B */
1713 GPIO_FN(FSIBCK),
1714
1703 /* FMSI */ 1715 /* FMSI */
1704 GPIO_FN(FMSISLD_PORT1), /* FMSISLD Port 1/6 */ 1716 GPIO_FN(FMSISLD_PORT1), /* FMSISLD Port 1/6 */
1705 GPIO_FN(FMSISLD_PORT6), 1717 GPIO_FN(FMSISLD_PORT6),
@@ -2097,6 +2109,10 @@ static struct pinmux_gpio pinmux_gpios[] = {
2097 GPIO_FN(SDENC_CPG), 2109 GPIO_FN(SDENC_CPG),
2098 GPIO_FN(SDENC_DV_CLKI), 2110 GPIO_FN(SDENC_DV_CLKI),
2099 2111
2112 /* HDMI */
2113 GPIO_FN(HDMI_HPD),
2114 GPIO_FN(HDMI_CEC),
2115
2100 /* SYSC */ 2116 /* SYSC */
2101 GPIO_FN(RESETP_PULLUP), 2117 GPIO_FN(RESETP_PULLUP),
2102 GPIO_FN(RESETP_PLAIN), 2118 GPIO_FN(RESETP_PLAIN),
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index bacdd667e3b1..e859fcdb3d58 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -25,7 +25,12 @@
25#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \ 25#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \
26 of_machine_is_compatible("renesas,sh73a0")) 26 of_machine_is_compatible("renesas,sh73a0"))
27#define is_r8a7779() machine_is_marzen() 27#define is_r8a7779() machine_is_marzen()
28
29#ifdef CONFIG_ARCH_EMEV2
28#define is_emev2() of_machine_is_compatible("renesas,emev2") 30#define is_emev2() of_machine_is_compatible("renesas,emev2")
31#else
32#define is_emev2() (0)
33#endif
29 34
30static unsigned int __init shmobile_smp_get_core_count(void) 35static unsigned int __init shmobile_smp_get_core_count(void)
31{ 36{
diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c
new file mode 100644
index 000000000000..893504d012a6
--- /dev/null
+++ b/arch/arm/mach-shmobile/pm-r8a7740.c
@@ -0,0 +1,54 @@
1/*
2 * r8a7740 power management support
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/console.h>
12#include <mach/pm-rmobile.h>
13
14#ifdef CONFIG_PM
15static int r8a7740_pd_a4s_suspend(void)
16{
17 /*
18 * The A4S domain contains the CPU core and therefore it should
19 * only be turned off if the CPU is in use.
20 */
21 return -EBUSY;
22}
23
24struct rmobile_pm_domain r8a7740_pd_a4s = {
25 .genpd.name = "A4S",
26 .bit_shift = 10,
27 .gov = &pm_domain_always_on_gov,
28 .no_debug = true,
29 .suspend = r8a7740_pd_a4s_suspend,
30};
31
32static int r8a7740_pd_a3sp_suspend(void)
33{
34 /*
35 * Serial consoles make use of SCIF hardware located in A3SP,
36 * keep such power domain on if "no_console_suspend" is set.
37 */
38 return console_suspend_enabled ? 0 : -EBUSY;
39}
40
41struct rmobile_pm_domain r8a7740_pd_a3sp = {
42 .genpd.name = "A3SP",
43 .bit_shift = 11,
44 .gov = &pm_domain_always_on_gov,
45 .no_debug = true,
46 .suspend = r8a7740_pd_a3sp_suspend,
47};
48
49struct rmobile_pm_domain r8a7740_pd_a4lc = {
50 .genpd.name = "A4LC",
51 .bit_shift = 1,
52};
53
54#endif /* CONFIG_PM */
diff --git a/arch/arm/mach-shmobile/pm-rmobile.c b/arch/arm/mach-shmobile/pm-rmobile.c
new file mode 100644
index 000000000000..a8562540f1d6
--- /dev/null
+++ b/arch/arm/mach-shmobile/pm-rmobile.c
@@ -0,0 +1,167 @@
1/*
2 * rmobile power management support
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * based on pm-sh7372.c
8 * Copyright (C) 2011 Magnus Damm
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <linux/console.h>
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17#include <linux/pm.h>
18#include <linux/pm_clock.h>
19#include <asm/io.h>
20#include <mach/pm-rmobile.h>
21
22/* SYSC */
23#define SPDCR 0xe6180008
24#define SWUCR 0xe6180014
25#define PSTR 0xe6180080
26
27#define PSTR_RETRIES 100
28#define PSTR_DELAY_US 10
29
30#ifdef CONFIG_PM
31static int rmobile_pd_power_down(struct generic_pm_domain *genpd)
32{
33 struct rmobile_pm_domain *rmobile_pd = to_rmobile_pd(genpd);
34 unsigned int mask = 1 << rmobile_pd->bit_shift;
35
36 if (rmobile_pd->suspend) {
37 int ret = rmobile_pd->suspend();
38
39 if (ret)
40 return ret;
41 }
42
43 if (__raw_readl(PSTR) & mask) {
44 unsigned int retry_count;
45 __raw_writel(mask, SPDCR);
46
47 for (retry_count = PSTR_RETRIES; retry_count; retry_count--) {
48 if (!(__raw_readl(SPDCR) & mask))
49 break;
50 cpu_relax();
51 }
52 }
53
54 if (!rmobile_pd->no_debug)
55 pr_debug("%s: Power off, 0x%08x -> PSTR = 0x%08x\n",
56 genpd->name, mask, __raw_readl(PSTR));
57
58 return 0;
59}
60
61static int __rmobile_pd_power_up(struct rmobile_pm_domain *rmobile_pd,
62 bool do_resume)
63{
64 unsigned int mask = 1 << rmobile_pd->bit_shift;
65 unsigned int retry_count;
66 int ret = 0;
67
68 if (__raw_readl(PSTR) & mask)
69 goto out;
70
71 __raw_writel(mask, SWUCR);
72
73 for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) {
74 if (!(__raw_readl(SWUCR) & mask))
75 break;
76 if (retry_count > PSTR_RETRIES)
77 udelay(PSTR_DELAY_US);
78 else
79 cpu_relax();
80 }
81 if (!retry_count)
82 ret = -EIO;
83
84 if (!rmobile_pd->no_debug)
85 pr_debug("%s: Power on, 0x%08x -> PSTR = 0x%08x\n",
86 rmobile_pd->genpd.name, mask, __raw_readl(PSTR));
87
88out:
89 if (ret == 0 && rmobile_pd->resume && do_resume)
90 rmobile_pd->resume();
91
92 return ret;
93}
94
95static int rmobile_pd_power_up(struct generic_pm_domain *genpd)
96{
97 return __rmobile_pd_power_up(to_rmobile_pd(genpd), true);
98}
99
100static bool rmobile_pd_active_wakeup(struct device *dev)
101{
102 bool (*active_wakeup)(struct device *dev);
103
104 active_wakeup = dev_gpd_data(dev)->ops.active_wakeup;
105 return active_wakeup ? active_wakeup(dev) : true;
106}
107
108static int rmobile_pd_stop_dev(struct device *dev)
109{
110 int (*stop)(struct device *dev);
111
112 stop = dev_gpd_data(dev)->ops.stop;
113 if (stop) {
114 int ret = stop(dev);
115 if (ret)
116 return ret;
117 }
118 return pm_clk_suspend(dev);
119}
120
121static int rmobile_pd_start_dev(struct device *dev)
122{
123 int (*start)(struct device *dev);
124 int ret;
125
126 ret = pm_clk_resume(dev);
127 if (ret)
128 return ret;
129
130 start = dev_gpd_data(dev)->ops.start;
131 if (start)
132 ret = start(dev);
133
134 return ret;
135}
136
137void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
138{
139 struct generic_pm_domain *genpd = &rmobile_pd->genpd;
140 struct dev_power_governor *gov = rmobile_pd->gov;
141
142 pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
143 genpd->dev_ops.stop = rmobile_pd_stop_dev;
144 genpd->dev_ops.start = rmobile_pd_start_dev;
145 genpd->dev_ops.active_wakeup = rmobile_pd_active_wakeup;
146 genpd->dev_irq_safe = true;
147 genpd->power_off = rmobile_pd_power_down;
148 genpd->power_on = rmobile_pd_power_up;
149 __rmobile_pd_power_up(rmobile_pd, false);
150}
151
152void rmobile_add_device_to_domain(struct rmobile_pm_domain *rmobile_pd,
153 struct platform_device *pdev)
154{
155 struct device *dev = &pdev->dev;
156
157 pm_genpd_add_device(&rmobile_pd->genpd, dev);
158 if (pm_clk_no_clocks(dev))
159 pm_clk_add(dev, NULL);
160}
161
162void rmobile_pm_add_subdomain(struct rmobile_pm_domain *rmobile_pd,
163 struct rmobile_pm_domain *rmobile_sd)
164{
165 pm_genpd_add_subdomain(&rmobile_pd->genpd, &rmobile_sd->genpd);
166}
167#endif /* CONFIG_PM */
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 44daaee9df93..792037069226 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -26,6 +26,7 @@
26#include <asm/suspend.h> 26#include <asm/suspend.h>
27#include <mach/common.h> 27#include <mach/common.h>
28#include <mach/sh7372.h> 28#include <mach/sh7372.h>
29#include <mach/pm-rmobile.h>
29 30
30/* DBG */ 31/* DBG */
31#define DBGREG1 0xe6100020 32#define DBGREG1 0xe6100020
@@ -41,13 +42,10 @@
41#define PLLC01STPCR 0xe61500c8 42#define PLLC01STPCR 0xe61500c8
42 43
43/* SYSC */ 44/* SYSC */
44#define SPDCR 0xe6180008
45#define SWUCR 0xe6180014
46#define SBAR 0xe6180020 45#define SBAR 0xe6180020
47#define WUPRMSK 0xe6180028 46#define WUPRMSK 0xe6180028
48#define WUPSMSK 0xe618002c 47#define WUPSMSK 0xe618002c
49#define WUPSMSK2 0xe6180048 48#define WUPSMSK2 0xe6180048
50#define PSTR 0xe6180080
51#define WUPSFAC 0xe6180098 49#define WUPSFAC 0xe6180098
52#define IRQCR 0xe618022c 50#define IRQCR 0xe618022c
53#define IRQCR2 0xe6180238 51#define IRQCR2 0xe6180238
@@ -71,188 +69,48 @@
71/* AP-System Core */ 69/* AP-System Core */
72#define APARMBAREA 0xe6f10020 70#define APARMBAREA 0xe6f10020
73 71
74#define PSTR_RETRIES 100
75#define PSTR_DELAY_US 10
76
77#ifdef CONFIG_PM 72#ifdef CONFIG_PM
78 73
79static int pd_power_down(struct generic_pm_domain *genpd) 74struct rmobile_pm_domain sh7372_pd_a4lc = {
80{
81 struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
82 unsigned int mask = 1 << sh7372_pd->bit_shift;
83
84 if (sh7372_pd->suspend) {
85 int ret = sh7372_pd->suspend();
86
87 if (ret)
88 return ret;
89 }
90
91 if (__raw_readl(PSTR) & mask) {
92 unsigned int retry_count;
93
94 __raw_writel(mask, SPDCR);
95
96 for (retry_count = PSTR_RETRIES; retry_count; retry_count--) {
97 if (!(__raw_readl(SPDCR) & mask))
98 break;
99 cpu_relax();
100 }
101 }
102
103 if (!sh7372_pd->no_debug)
104 pr_debug("%s: Power off, 0x%08x -> PSTR = 0x%08x\n",
105 genpd->name, mask, __raw_readl(PSTR));
106
107 return 0;
108}
109
110static int __pd_power_up(struct sh7372_pm_domain *sh7372_pd, bool do_resume)
111{
112 unsigned int mask = 1 << sh7372_pd->bit_shift;
113 unsigned int retry_count;
114 int ret = 0;
115
116 if (__raw_readl(PSTR) & mask)
117 goto out;
118
119 __raw_writel(mask, SWUCR);
120
121 for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) {
122 if (!(__raw_readl(SWUCR) & mask))
123 break;
124 if (retry_count > PSTR_RETRIES)
125 udelay(PSTR_DELAY_US);
126 else
127 cpu_relax();
128 }
129 if (!retry_count)
130 ret = -EIO;
131
132 if (!sh7372_pd->no_debug)
133 pr_debug("%s: Power on, 0x%08x -> PSTR = 0x%08x\n",
134 sh7372_pd->genpd.name, mask, __raw_readl(PSTR));
135
136 out:
137 if (ret == 0 && sh7372_pd->resume && do_resume)
138 sh7372_pd->resume();
139
140 return ret;
141}
142
143static int pd_power_up(struct generic_pm_domain *genpd)
144{
145 return __pd_power_up(to_sh7372_pd(genpd), true);
146}
147
148static int sh7372_a4r_suspend(void)
149{
150 sh7372_intcs_suspend();
151 __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */
152 return 0;
153}
154
155static bool pd_active_wakeup(struct device *dev)
156{
157 bool (*active_wakeup)(struct device *dev);
158
159 active_wakeup = dev_gpd_data(dev)->ops.active_wakeup;
160 return active_wakeup ? active_wakeup(dev) : true;
161}
162
163static int sh7372_stop_dev(struct device *dev)
164{
165 int (*stop)(struct device *dev);
166
167 stop = dev_gpd_data(dev)->ops.stop;
168 if (stop) {
169 int ret = stop(dev);
170 if (ret)
171 return ret;
172 }
173 return pm_clk_suspend(dev);
174}
175
176static int sh7372_start_dev(struct device *dev)
177{
178 int (*start)(struct device *dev);
179 int ret;
180
181 ret = pm_clk_resume(dev);
182 if (ret)
183 return ret;
184
185 start = dev_gpd_data(dev)->ops.start;
186 if (start)
187 ret = start(dev);
188
189 return ret;
190}
191
192void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd)
193{
194 struct generic_pm_domain *genpd = &sh7372_pd->genpd;
195 struct dev_power_governor *gov = sh7372_pd->gov;
196
197 pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
198 genpd->dev_ops.stop = sh7372_stop_dev;
199 genpd->dev_ops.start = sh7372_start_dev;
200 genpd->dev_ops.active_wakeup = pd_active_wakeup;
201 genpd->dev_irq_safe = true;
202 genpd->power_off = pd_power_down;
203 genpd->power_on = pd_power_up;
204 __pd_power_up(sh7372_pd, false);
205}
206
207void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
208 struct platform_device *pdev)
209{
210 struct device *dev = &pdev->dev;
211
212 pm_genpd_add_device(&sh7372_pd->genpd, dev);
213 if (pm_clk_no_clocks(dev))
214 pm_clk_add(dev, NULL);
215}
216
217void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd,
218 struct sh7372_pm_domain *sh7372_sd)
219{
220 pm_genpd_add_subdomain(&sh7372_pd->genpd, &sh7372_sd->genpd);
221}
222
223struct sh7372_pm_domain sh7372_a4lc = {
224 .genpd.name = "A4LC", 75 .genpd.name = "A4LC",
225 .bit_shift = 1, 76 .bit_shift = 1,
226}; 77};
227 78
228struct sh7372_pm_domain sh7372_a4mp = { 79struct rmobile_pm_domain sh7372_pd_a4mp = {
229 .genpd.name = "A4MP", 80 .genpd.name = "A4MP",
230 .bit_shift = 2, 81 .bit_shift = 2,
231}; 82};
232 83
233struct sh7372_pm_domain sh7372_d4 = { 84struct rmobile_pm_domain sh7372_pd_d4 = {
234 .genpd.name = "D4", 85 .genpd.name = "D4",
235 .bit_shift = 3, 86 .bit_shift = 3,
236}; 87};
237 88
238struct sh7372_pm_domain sh7372_a4r = { 89static int sh7372_a4r_pd_suspend(void)
90{
91 sh7372_intcs_suspend();
92 __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */
93 return 0;
94}
95
96struct rmobile_pm_domain sh7372_pd_a4r = {
239 .genpd.name = "A4R", 97 .genpd.name = "A4R",
240 .bit_shift = 5, 98 .bit_shift = 5,
241 .suspend = sh7372_a4r_suspend, 99 .suspend = sh7372_a4r_pd_suspend,
242 .resume = sh7372_intcs_resume, 100 .resume = sh7372_intcs_resume,
243}; 101};
244 102
245struct sh7372_pm_domain sh7372_a3rv = { 103struct rmobile_pm_domain sh7372_pd_a3rv = {
246 .genpd.name = "A3RV", 104 .genpd.name = "A3RV",
247 .bit_shift = 6, 105 .bit_shift = 6,
248}; 106};
249 107
250struct sh7372_pm_domain sh7372_a3ri = { 108struct rmobile_pm_domain sh7372_pd_a3ri = {
251 .genpd.name = "A3RI", 109 .genpd.name = "A3RI",
252 .bit_shift = 8, 110 .bit_shift = 8,
253}; 111};
254 112
255static int sh7372_a4s_suspend(void) 113static int sh7372_pd_a4s_suspend(void)
256{ 114{
257 /* 115 /*
258 * The A4S domain contains the CPU core and therefore it should 116 * The A4S domain contains the CPU core and therefore it should
@@ -261,15 +119,15 @@ static int sh7372_a4s_suspend(void)
261 return -EBUSY; 119 return -EBUSY;
262} 120}
263 121
264struct sh7372_pm_domain sh7372_a4s = { 122struct rmobile_pm_domain sh7372_pd_a4s = {
265 .genpd.name = "A4S", 123 .genpd.name = "A4S",
266 .bit_shift = 10, 124 .bit_shift = 10,
267 .gov = &pm_domain_always_on_gov, 125 .gov = &pm_domain_always_on_gov,
268 .no_debug = true, 126 .no_debug = true,
269 .suspend = sh7372_a4s_suspend, 127 .suspend = sh7372_pd_a4s_suspend,
270}; 128};
271 129
272static int sh7372_a3sp_suspend(void) 130static int sh7372_a3sp_pd_suspend(void)
273{ 131{
274 /* 132 /*
275 * Serial consoles make use of SCIF hardware located in A3SP, 133 * Serial consoles make use of SCIF hardware located in A3SP,
@@ -278,27 +136,22 @@ static int sh7372_a3sp_suspend(void)
278 return console_suspend_enabled ? 0 : -EBUSY; 136 return console_suspend_enabled ? 0 : -EBUSY;
279} 137}
280 138
281struct sh7372_pm_domain sh7372_a3sp = { 139struct rmobile_pm_domain sh7372_pd_a3sp = {
282 .genpd.name = "A3SP", 140 .genpd.name = "A3SP",
283 .bit_shift = 11, 141 .bit_shift = 11,
284 .gov = &pm_domain_always_on_gov, 142 .gov = &pm_domain_always_on_gov,
285 .no_debug = true, 143 .no_debug = true,
286 .suspend = sh7372_a3sp_suspend, 144 .suspend = sh7372_a3sp_pd_suspend,
287}; 145};
288 146
289struct sh7372_pm_domain sh7372_a3sg = { 147struct rmobile_pm_domain sh7372_pd_a3sg = {
290 .genpd.name = "A3SG", 148 .genpd.name = "A3SG",
291 .bit_shift = 13, 149 .bit_shift = 13,
292}; 150};
151
293#endif /* CONFIG_PM */ 152#endif /* CONFIG_PM */
294 153
295#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE) 154#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
296static int sh7372_do_idle_core_standby(unsigned long unused)
297{
298 cpu_do_idle(); /* WFI when SYSTBCR == 0x10 -> Core Standby */
299 return 0;
300}
301
302static void sh7372_set_reset_vector(unsigned long address) 155static void sh7372_set_reset_vector(unsigned long address)
303{ 156{
304 /* set reset vector, translate 4k */ 157 /* set reset vector, translate 4k */
@@ -306,21 +159,6 @@ static void sh7372_set_reset_vector(unsigned long address)
306 __raw_writel(0, APARMBAREA); 159 __raw_writel(0, APARMBAREA);
307} 160}
308 161
309static void sh7372_enter_core_standby(void)
310{
311 sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
312
313 /* enter sleep mode with SYSTBCR to 0x10 */
314 __raw_writel(0x10, SYSTBCR);
315 cpu_suspend(0, sh7372_do_idle_core_standby);
316 __raw_writel(0, SYSTBCR);
317
318 /* disable reset vector translation */
319 __raw_writel(0, SBAR);
320}
321#endif
322
323#ifdef CONFIG_SUSPEND
324static void sh7372_enter_sysc(int pllc0_on, unsigned long sleep_mode) 162static void sh7372_enter_sysc(int pllc0_on, unsigned long sleep_mode)
325{ 163{
326 if (pllc0_on) 164 if (pllc0_on)
@@ -460,22 +298,42 @@ static void sh7372_setup_sysc(unsigned long msk, unsigned long msk2)
460 298
461static void sh7372_enter_a3sm_common(int pllc0_on) 299static void sh7372_enter_a3sm_common(int pllc0_on)
462{ 300{
301 /* use INTCA together with SYSC for wakeup */
302 sh7372_setup_sysc(1 << 0, 0);
463 sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc)); 303 sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
464 sh7372_enter_sysc(pllc0_on, 1 << 12); 304 sh7372_enter_sysc(pllc0_on, 1 << 12);
465} 305}
306#endif /* CONFIG_SUSPEND || CONFIG_CPU_IDLE */
466 307
467static void sh7372_enter_a4s_common(int pllc0_on) 308#ifdef CONFIG_CPU_IDLE
309static int sh7372_do_idle_core_standby(unsigned long unused)
468{ 310{
469 sh7372_intca_suspend(); 311 cpu_do_idle(); /* WFI when SYSTBCR == 0x10 -> Core Standby */
470 memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100); 312 return 0;
471 sh7372_set_reset_vector(SMFRAM);
472 sh7372_enter_sysc(pllc0_on, 1 << 10);
473 sh7372_intca_resume();
474} 313}
475 314
476#endif 315static void sh7372_enter_core_standby(void)
316{
317 sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
477 318
478#ifdef CONFIG_CPU_IDLE 319 /* enter sleep mode with SYSTBCR to 0x10 */
320 __raw_writel(0x10, SYSTBCR);
321 cpu_suspend(0, sh7372_do_idle_core_standby);
322 __raw_writel(0, SYSTBCR);
323
324 /* disable reset vector translation */
325 __raw_writel(0, SBAR);
326}
327
328static void sh7372_enter_a3sm_pll_on(void)
329{
330 sh7372_enter_a3sm_common(1);
331}
332
333static void sh7372_enter_a3sm_pll_off(void)
334{
335 sh7372_enter_a3sm_common(0);
336}
479 337
480static void sh7372_cpuidle_setup(struct cpuidle_driver *drv) 338static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
481{ 339{
@@ -487,7 +345,24 @@ static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
487 state->target_residency = 20 + 10; 345 state->target_residency = 20 + 10;
488 state->flags = CPUIDLE_FLAG_TIME_VALID; 346 state->flags = CPUIDLE_FLAG_TIME_VALID;
489 shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby; 347 shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby;
348 drv->state_count++;
349
350 state = &drv->states[drv->state_count];
351 snprintf(state->name, CPUIDLE_NAME_LEN, "C3");
352 strncpy(state->desc, "A3SM PLL ON", CPUIDLE_DESC_LEN);
353 state->exit_latency = 20;
354 state->target_residency = 30 + 20;
355 state->flags = CPUIDLE_FLAG_TIME_VALID;
356 shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_on;
357 drv->state_count++;
490 358
359 state = &drv->states[drv->state_count];
360 snprintf(state->name, CPUIDLE_NAME_LEN, "C4");
361 strncpy(state->desc, "A3SM PLL OFF", CPUIDLE_DESC_LEN);
362 state->exit_latency = 120;
363 state->target_residency = 30 + 120;
364 state->flags = CPUIDLE_FLAG_TIME_VALID;
365 shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_off;
491 drv->state_count++; 366 drv->state_count++;
492} 367}
493 368
@@ -500,6 +375,14 @@ static void sh7372_cpuidle_init(void) {}
500#endif 375#endif
501 376
502#ifdef CONFIG_SUSPEND 377#ifdef CONFIG_SUSPEND
378static void sh7372_enter_a4s_common(int pllc0_on)
379{
380 sh7372_intca_suspend();
381 memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
382 sh7372_set_reset_vector(SMFRAM);
383 sh7372_enter_sysc(pllc0_on, 1 << 10);
384 sh7372_intca_resume();
385}
503 386
504static int sh7372_enter_suspend(suspend_state_t suspend_state) 387static int sh7372_enter_suspend(suspend_state_t suspend_state)
505{ 388{
@@ -507,24 +390,21 @@ static int sh7372_enter_suspend(suspend_state_t suspend_state)
507 390
508 /* check active clocks to determine potential wakeup sources */ 391 /* check active clocks to determine potential wakeup sources */
509 if (sh7372_sysc_valid(&msk, &msk2)) { 392 if (sh7372_sysc_valid(&msk, &msk2)) {
510 /* convert INTC mask and sense to SYSC mask and sense */
511 sh7372_setup_sysc(msk, msk2);
512
513 if (!console_suspend_enabled && 393 if (!console_suspend_enabled &&
514 sh7372_a4s.genpd.status == GPD_STATE_POWER_OFF) { 394 sh7372_pd_a4s.genpd.status == GPD_STATE_POWER_OFF) {
395 /* convert INTC mask/sense to SYSC mask/sense */
396 sh7372_setup_sysc(msk, msk2);
397
515 /* enter A4S sleep with PLLC0 off */ 398 /* enter A4S sleep with PLLC0 off */
516 pr_debug("entering A4S\n"); 399 pr_debug("entering A4S\n");
517 sh7372_enter_a4s_common(0); 400 sh7372_enter_a4s_common(0);
518 } else { 401 return 0;
519 /* enter A3SM sleep with PLLC0 off */
520 pr_debug("entering A3SM\n");
521 sh7372_enter_a3sm_common(0);
522 } 402 }
523 } else {
524 /* default to Core Standby that supports all wakeup sources */
525 pr_debug("entering Core Standby\n");
526 sh7372_enter_core_standby();
527 } 403 }
404
405 /* default to enter A3SM sleep with PLLC0 off */
406 pr_debug("entering A3SM\n");
407 sh7372_enter_a3sm_common(0);
528 return 0; 408 return 0;
529} 409}
530 410
@@ -545,7 +425,7 @@ static int sh7372_pm_notifier_fn(struct notifier_block *notifier,
545 * executed during system suspend and resume, respectively, so 425 * executed during system suspend and resume, respectively, so
546 * that those functions don't crash while accessing the INTCS. 426 * that those functions don't crash while accessing the INTCS.
547 */ 427 */
548 pm_genpd_poweron(&sh7372_a4r.genpd); 428 pm_genpd_poweron(&sh7372_pd_a4r.genpd);
549 break; 429 break;
550 case PM_POST_SUSPEND: 430 case PM_POST_SUSPEND:
551 pm_genpd_poweroff_unused(); 431 pm_genpd_poweroff_unused();
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index ec4eb49c1693..78948a9dba0e 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -23,9 +23,14 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/of_platform.h>
26#include <linux/serial_sci.h> 27#include <linux/serial_sci.h>
28#include <linux/sh_dma.h>
27#include <linux/sh_timer.h> 29#include <linux/sh_timer.h>
30#include <linux/dma-mapping.h>
31#include <mach/dma-register.h>
28#include <mach/r8a7740.h> 32#include <mach/r8a7740.h>
33#include <mach/pm-rmobile.h>
29#include <mach/common.h> 34#include <mach/common.h>
30#include <mach/irqs.h> 35#include <mach/irqs.h>
31#include <asm/mach-types.h> 36#include <asm/mach-types.h>
@@ -276,6 +281,272 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
276 &cmt10_device, 281 &cmt10_device,
277}; 282};
278 283
284/* DMA */
285static const struct sh_dmae_slave_config r8a7740_dmae_slaves[] = {
286 {
287 .slave_id = SHDMA_SLAVE_SDHI0_TX,
288 .addr = 0xe6850030,
289 .chcr = CHCR_TX(XMIT_SZ_16BIT),
290 .mid_rid = 0xc1,
291 }, {
292 .slave_id = SHDMA_SLAVE_SDHI0_RX,
293 .addr = 0xe6850030,
294 .chcr = CHCR_RX(XMIT_SZ_16BIT),
295 .mid_rid = 0xc2,
296 }, {
297 .slave_id = SHDMA_SLAVE_SDHI1_TX,
298 .addr = 0xe6860030,
299 .chcr = CHCR_TX(XMIT_SZ_16BIT),
300 .mid_rid = 0xc9,
301 }, {
302 .slave_id = SHDMA_SLAVE_SDHI1_RX,
303 .addr = 0xe6860030,
304 .chcr = CHCR_RX(XMIT_SZ_16BIT),
305 .mid_rid = 0xca,
306 }, {
307 .slave_id = SHDMA_SLAVE_SDHI2_TX,
308 .addr = 0xe6870030,
309 .chcr = CHCR_TX(XMIT_SZ_16BIT),
310 .mid_rid = 0xcd,
311 }, {
312 .slave_id = SHDMA_SLAVE_SDHI2_RX,
313 .addr = 0xe6870030,
314 .chcr = CHCR_RX(XMIT_SZ_16BIT),
315 .mid_rid = 0xce,
316 }, {
317 .slave_id = SHDMA_SLAVE_FSIA_TX,
318 .addr = 0xfe1f0024,
319 .chcr = CHCR_TX(XMIT_SZ_32BIT),
320 .mid_rid = 0xb1,
321 }, {
322 .slave_id = SHDMA_SLAVE_FSIA_RX,
323 .addr = 0xfe1f0020,
324 .chcr = CHCR_RX(XMIT_SZ_32BIT),
325 .mid_rid = 0xb2,
326 }, {
327 .slave_id = SHDMA_SLAVE_FSIB_TX,
328 .addr = 0xfe1f0064,
329 .chcr = CHCR_TX(XMIT_SZ_32BIT),
330 .mid_rid = 0xb5,
331 },
332};
333
334#define DMA_CHANNEL(a, b, c) \
335{ \
336 .offset = a, \
337 .dmars = b, \
338 .dmars_bit = c, \
339 .chclr_offset = (0x220 - 0x20) + a \
340}
341
342static const struct sh_dmae_channel r8a7740_dmae_channels[] = {
343 DMA_CHANNEL(0x00, 0, 0),
344 DMA_CHANNEL(0x10, 0, 8),
345 DMA_CHANNEL(0x20, 4, 0),
346 DMA_CHANNEL(0x30, 4, 8),
347 DMA_CHANNEL(0x50, 8, 0),
348 DMA_CHANNEL(0x60, 8, 8),
349};
350
351static struct sh_dmae_pdata dma_platform_data = {
352 .slave = r8a7740_dmae_slaves,
353 .slave_num = ARRAY_SIZE(r8a7740_dmae_slaves),
354 .channel = r8a7740_dmae_channels,
355 .channel_num = ARRAY_SIZE(r8a7740_dmae_channels),
356 .ts_low_shift = TS_LOW_SHIFT,
357 .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
358 .ts_high_shift = TS_HI_SHIFT,
359 .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
360 .ts_shift = dma_ts_shift,
361 .ts_shift_num = ARRAY_SIZE(dma_ts_shift),
362 .dmaor_init = DMAOR_DME,
363 .chclr_present = 1,
364};
365
366/* Resource order important! */
367static struct resource r8a7740_dmae0_resources[] = {
368 {
369 /* Channel registers and DMAOR */
370 .start = 0xfe008020,
371 .end = 0xfe00828f,
372 .flags = IORESOURCE_MEM,
373 },
374 {
375 /* DMARSx */
376 .start = 0xfe009000,
377 .end = 0xfe00900b,
378 .flags = IORESOURCE_MEM,
379 },
380 {
381 .name = "error_irq",
382 .start = evt2irq(0x20c0),
383 .end = evt2irq(0x20c0),
384 .flags = IORESOURCE_IRQ,
385 },
386 {
387 /* IRQ for channels 0-5 */
388 .start = evt2irq(0x2000),
389 .end = evt2irq(0x20a0),
390 .flags = IORESOURCE_IRQ,
391 },
392};
393
394/* Resource order important! */
395static struct resource r8a7740_dmae1_resources[] = {
396 {
397 /* Channel registers and DMAOR */
398 .start = 0xfe018020,
399 .end = 0xfe01828f,
400 .flags = IORESOURCE_MEM,
401 },
402 {
403 /* DMARSx */
404 .start = 0xfe019000,
405 .end = 0xfe01900b,
406 .flags = IORESOURCE_MEM,
407 },
408 {
409 .name = "error_irq",
410 .start = evt2irq(0x21c0),
411 .end = evt2irq(0x21c0),
412 .flags = IORESOURCE_IRQ,
413 },
414 {
415 /* IRQ for channels 0-5 */
416 .start = evt2irq(0x2100),
417 .end = evt2irq(0x21a0),
418 .flags = IORESOURCE_IRQ,
419 },
420};
421
422/* Resource order important! */
423static struct resource r8a7740_dmae2_resources[] = {
424 {
425 /* Channel registers and DMAOR */
426 .start = 0xfe028020,
427 .end = 0xfe02828f,
428 .flags = IORESOURCE_MEM,
429 },
430 {
431 /* DMARSx */
432 .start = 0xfe029000,
433 .end = 0xfe02900b,
434 .flags = IORESOURCE_MEM,
435 },
436 {
437 .name = "error_irq",
438 .start = evt2irq(0x22c0),
439 .end = evt2irq(0x22c0),
440 .flags = IORESOURCE_IRQ,
441 },
442 {
443 /* IRQ for channels 0-5 */
444 .start = evt2irq(0x2200),
445 .end = evt2irq(0x22a0),
446 .flags = IORESOURCE_IRQ,
447 },
448};
449
450static struct platform_device dma0_device = {
451 .name = "sh-dma-engine",
452 .id = 0,
453 .resource = r8a7740_dmae0_resources,
454 .num_resources = ARRAY_SIZE(r8a7740_dmae0_resources),
455 .dev = {
456 .platform_data = &dma_platform_data,
457 },
458};
459
460static struct platform_device dma1_device = {
461 .name = "sh-dma-engine",
462 .id = 1,
463 .resource = r8a7740_dmae1_resources,
464 .num_resources = ARRAY_SIZE(r8a7740_dmae1_resources),
465 .dev = {
466 .platform_data = &dma_platform_data,
467 },
468};
469
470static struct platform_device dma2_device = {
471 .name = "sh-dma-engine",
472 .id = 2,
473 .resource = r8a7740_dmae2_resources,
474 .num_resources = ARRAY_SIZE(r8a7740_dmae2_resources),
475 .dev = {
476 .platform_data = &dma_platform_data,
477 },
478};
479
480/* USB-DMAC */
481static const struct sh_dmae_channel r8a7740_usb_dma_channels[] = {
482 {
483 .offset = 0,
484 }, {
485 .offset = 0x20,
486 },
487};
488
489static const struct sh_dmae_slave_config r8a7740_usb_dma_slaves[] = {
490 {
491 .slave_id = SHDMA_SLAVE_USBHS_TX,
492 .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
493 }, {
494 .slave_id = SHDMA_SLAVE_USBHS_RX,
495 .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
496 },
497};
498
499static struct sh_dmae_pdata usb_dma_platform_data = {
500 .slave = r8a7740_usb_dma_slaves,
501 .slave_num = ARRAY_SIZE(r8a7740_usb_dma_slaves),
502 .channel = r8a7740_usb_dma_channels,
503 .channel_num = ARRAY_SIZE(r8a7740_usb_dma_channels),
504 .ts_low_shift = USBTS_LOW_SHIFT,
505 .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
506 .ts_high_shift = USBTS_HI_SHIFT,
507 .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
508 .ts_shift = dma_usbts_shift,
509 .ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
510 .dmaor_init = DMAOR_DME,
511 .chcr_offset = 0x14,
512 .chcr_ie_bit = 1 << 5,
513 .dmaor_is_32bit = 1,
514 .needs_tend_set = 1,
515 .no_dmars = 1,
516 .slave_only = 1,
517};
518
519static struct resource r8a7740_usb_dma_resources[] = {
520 {
521 /* Channel registers and DMAOR */
522 .start = 0xe68a0020,
523 .end = 0xe68a0064 - 1,
524 .flags = IORESOURCE_MEM,
525 },
526 {
527 /* VCR/SWR/DMICR */
528 .start = 0xe68a0000,
529 .end = 0xe68a0014 - 1,
530 .flags = IORESOURCE_MEM,
531 },
532 {
533 /* IRQ for channels */
534 .start = evt2irq(0x0a00),
535 .end = evt2irq(0x0a00),
536 .flags = IORESOURCE_IRQ,
537 },
538};
539
540static struct platform_device usb_dma_device = {
541 .name = "sh-dma-engine",
542 .id = 3,
543 .resource = r8a7740_usb_dma_resources,
544 .num_resources = ARRAY_SIZE(r8a7740_usb_dma_resources),
545 .dev = {
546 .platform_data = &usb_dma_platform_data,
547 },
548};
549
279/* I2C */ 550/* I2C */
280static struct resource i2c0_resources[] = { 551static struct resource i2c0_resources[] = {
281 [0] = { 552 [0] = {
@@ -322,8 +593,30 @@ static struct platform_device i2c1_device = {
322static struct platform_device *r8a7740_late_devices[] __initdata = { 593static struct platform_device *r8a7740_late_devices[] __initdata = {
323 &i2c0_device, 594 &i2c0_device,
324 &i2c1_device, 595 &i2c1_device,
596 &dma0_device,
597 &dma1_device,
598 &dma2_device,
599 &usb_dma_device,
325}; 600};
326 601
602/*
603 * r8a7740 chip has lasting errata on MERAM buffer.
604 * this is work-around for it.
605 * see
606 * "Media RAM (MERAM)" on r8a7740 documentation
607 */
608#define MEBUFCNTR 0xFE950098
609void r8a7740_meram_workaround(void)
610{
611 void __iomem *reg;
612
613 reg = ioremap_nocache(MEBUFCNTR, 4);
614 if (reg) {
615 iowrite32(0x01600164, reg);
616 iounmap(reg);
617 }
618}
619
327#define ICCR 0x0004 620#define ICCR 0x0004
328#define ICSTART 0x0070 621#define ICSTART 0x0070
329 622
@@ -380,10 +673,31 @@ void __init r8a7740_add_standard_devices(void)
380 r8a7740_i2c_workaround(&i2c0_device); 673 r8a7740_i2c_workaround(&i2c0_device);
381 r8a7740_i2c_workaround(&i2c1_device); 674 r8a7740_i2c_workaround(&i2c1_device);
382 675
676 /* PM domain */
677 rmobile_init_pm_domain(&r8a7740_pd_a4s);
678 rmobile_init_pm_domain(&r8a7740_pd_a3sp);
679 rmobile_init_pm_domain(&r8a7740_pd_a4lc);
680
681 rmobile_pm_add_subdomain(&r8a7740_pd_a4s, &r8a7740_pd_a3sp);
682
683 /* add devices */
383 platform_add_devices(r8a7740_early_devices, 684 platform_add_devices(r8a7740_early_devices,
384 ARRAY_SIZE(r8a7740_early_devices)); 685 ARRAY_SIZE(r8a7740_early_devices));
385 platform_add_devices(r8a7740_late_devices, 686 platform_add_devices(r8a7740_late_devices,
386 ARRAY_SIZE(r8a7740_late_devices)); 687 ARRAY_SIZE(r8a7740_late_devices));
688
689 /* add devices to PM domain */
690
691 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif0_device);
692 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif1_device);
693 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif2_device);
694 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif3_device);
695 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif4_device);
696 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif5_device);
697 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif6_device);
698 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif7_device);
699 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scifb_device);
700 rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &i2c1_device);
387} 701}
388 702
389static void __init r8a7740_earlytimer_init(void) 703static void __init r8a7740_earlytimer_init(void)
@@ -403,3 +717,49 @@ void __init r8a7740_add_early_devices(void)
403 /* override timer setup with soc-specific code */ 717 /* override timer setup with soc-specific code */
404 shmobile_timer.init = r8a7740_earlytimer_init; 718 shmobile_timer.init = r8a7740_earlytimer_init;
405} 719}
720
721#ifdef CONFIG_USE_OF
722
723void __init r8a7740_add_early_devices_dt(void)
724{
725 shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
726
727 early_platform_add_devices(r8a7740_early_devices,
728 ARRAY_SIZE(r8a7740_early_devices));
729
730 /* setup early console here as well */
731 shmobile_setup_console();
732}
733
734static const struct of_dev_auxdata r8a7740_auxdata_lookup[] __initconst = {
735 { }
736};
737
738void __init r8a7740_add_standard_devices_dt(void)
739{
740 /* clocks are setup late during boot in the case of DT */
741 r8a7740_clock_init(0);
742
743 platform_add_devices(r8a7740_early_devices,
744 ARRAY_SIZE(r8a7740_early_devices));
745
746 of_platform_populate(NULL, of_default_bus_match_table,
747 r8a7740_auxdata_lookup, NULL);
748}
749
750static const char *r8a7740_boards_compat_dt[] __initdata = {
751 "renesas,r8a7740",
752 NULL,
753};
754
755DT_MACHINE_START(SH7372_DT, "Generic R8A7740 (Flattened Device Tree)")
756 .map_io = r8a7740_map_io,
757 .init_early = r8a7740_add_early_devices_dt,
758 .init_irq = r8a7740_init_irq,
759 .handle_irq = shmobile_handle_irq_intc,
760 .init_machine = r8a7740_add_standard_devices_dt,
761 .timer = &shmobile_timer,
762 .dt_compat = r8a7740_boards_compat_dt,
763MACHINE_END
764
765#endif /* CONFIG_USE_OF */
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 4f473320f921..838a87be1d5c 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -460,7 +460,7 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
460 }, 460 },
461}; 461};
462 462
463#define SH7372_CHCLR 0x220 463#define SH7372_CHCLR (0x220 - 0x20)
464 464
465static const struct sh_dmae_channel sh7372_dmae_channels[] = { 465static const struct sh_dmae_channel sh7372_dmae_channels[] = {
466 { 466 {
@@ -1001,21 +1001,21 @@ static struct platform_device *sh7372_late_devices[] __initdata = {
1001 1001
1002void __init sh7372_add_standard_devices(void) 1002void __init sh7372_add_standard_devices(void)
1003{ 1003{
1004 sh7372_init_pm_domain(&sh7372_a4lc); 1004 rmobile_init_pm_domain(&sh7372_pd_a4lc);
1005 sh7372_init_pm_domain(&sh7372_a4mp); 1005 rmobile_init_pm_domain(&sh7372_pd_a4mp);
1006 sh7372_init_pm_domain(&sh7372_d4); 1006 rmobile_init_pm_domain(&sh7372_pd_d4);
1007 sh7372_init_pm_domain(&sh7372_a4r); 1007 rmobile_init_pm_domain(&sh7372_pd_a4r);
1008 sh7372_init_pm_domain(&sh7372_a3rv); 1008 rmobile_init_pm_domain(&sh7372_pd_a3rv);
1009 sh7372_init_pm_domain(&sh7372_a3ri); 1009 rmobile_init_pm_domain(&sh7372_pd_a3ri);
1010 sh7372_init_pm_domain(&sh7372_a4s); 1010 rmobile_init_pm_domain(&sh7372_pd_a4s);
1011 sh7372_init_pm_domain(&sh7372_a3sp); 1011 rmobile_init_pm_domain(&sh7372_pd_a3sp);
1012 sh7372_init_pm_domain(&sh7372_a3sg); 1012 rmobile_init_pm_domain(&sh7372_pd_a3sg);
1013 1013
1014 sh7372_pm_add_subdomain(&sh7372_a4lc, &sh7372_a3rv); 1014 rmobile_pm_add_subdomain(&sh7372_pd_a4lc, &sh7372_pd_a3rv);
1015 sh7372_pm_add_subdomain(&sh7372_a4r, &sh7372_a4lc); 1015 rmobile_pm_add_subdomain(&sh7372_pd_a4r, &sh7372_pd_a4lc);
1016 1016
1017 sh7372_pm_add_subdomain(&sh7372_a4s, &sh7372_a3sg); 1017 rmobile_pm_add_subdomain(&sh7372_pd_a4s, &sh7372_pd_a3sg);
1018 sh7372_pm_add_subdomain(&sh7372_a4s, &sh7372_a3sp); 1018 rmobile_pm_add_subdomain(&sh7372_pd_a4s, &sh7372_pd_a3sp);
1019 1019
1020 platform_add_devices(sh7372_early_devices, 1020 platform_add_devices(sh7372_early_devices,
1021 ARRAY_SIZE(sh7372_early_devices)); 1021 ARRAY_SIZE(sh7372_early_devices));
@@ -1023,30 +1023,30 @@ void __init sh7372_add_standard_devices(void)
1023 platform_add_devices(sh7372_late_devices, 1023 platform_add_devices(sh7372_late_devices,
1024 ARRAY_SIZE(sh7372_late_devices)); 1024 ARRAY_SIZE(sh7372_late_devices));
1025 1025
1026 sh7372_add_device_to_domain(&sh7372_a3rv, &vpu_device); 1026 rmobile_add_device_to_domain(&sh7372_pd_a3rv, &vpu_device);
1027 sh7372_add_device_to_domain(&sh7372_a4mp, &spu0_device); 1027 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu0_device);
1028 sh7372_add_device_to_domain(&sh7372_a4mp, &spu1_device); 1028 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu1_device);
1029 sh7372_add_device_to_domain(&sh7372_a3sp, &scif0_device); 1029 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif0_device);
1030 sh7372_add_device_to_domain(&sh7372_a3sp, &scif1_device); 1030 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif1_device);
1031 sh7372_add_device_to_domain(&sh7372_a3sp, &scif2_device); 1031 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif2_device);
1032 sh7372_add_device_to_domain(&sh7372_a3sp, &scif3_device); 1032 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif3_device);
1033 sh7372_add_device_to_domain(&sh7372_a3sp, &scif4_device); 1033 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif4_device);
1034 sh7372_add_device_to_domain(&sh7372_a3sp, &scif5_device); 1034 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif5_device);
1035 sh7372_add_device_to_domain(&sh7372_a3sp, &scif6_device); 1035 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif6_device);
1036 sh7372_add_device_to_domain(&sh7372_a3sp, &iic1_device); 1036 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &iic1_device);
1037 sh7372_add_device_to_domain(&sh7372_a3sp, &dma0_device); 1037 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma0_device);
1038 sh7372_add_device_to_domain(&sh7372_a3sp, &dma1_device); 1038 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma1_device);
1039 sh7372_add_device_to_domain(&sh7372_a3sp, &dma2_device); 1039 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma2_device);
1040 sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma0_device); 1040 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usb_dma0_device);
1041 sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma1_device); 1041 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usb_dma1_device);
1042 sh7372_add_device_to_domain(&sh7372_a4r, &iic0_device); 1042 rmobile_add_device_to_domain(&sh7372_pd_a4r, &iic0_device);
1043 sh7372_add_device_to_domain(&sh7372_a4r, &veu0_device); 1043 rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu0_device);
1044 sh7372_add_device_to_domain(&sh7372_a4r, &veu1_device); 1044 rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu1_device);
1045 sh7372_add_device_to_domain(&sh7372_a4r, &veu2_device); 1045 rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu2_device);
1046 sh7372_add_device_to_domain(&sh7372_a4r, &veu3_device); 1046 rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu3_device);
1047 sh7372_add_device_to_domain(&sh7372_a4r, &jpu_device); 1047 rmobile_add_device_to_domain(&sh7372_pd_a4r, &jpu_device);
1048 sh7372_add_device_to_domain(&sh7372_a4r, &tmu00_device); 1048 rmobile_add_device_to_domain(&sh7372_pd_a4r, &tmu00_device);
1049 sh7372_add_device_to_domain(&sh7372_a4r, &tmu01_device); 1049 rmobile_add_device_to_domain(&sh7372_pd_a4r, &tmu01_device);
1050} 1050}
1051 1051
1052static void __init sh7372_earlytimer_init(void) 1052static void __init sh7372_earlytimer_init(void)
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
index d576a6abbade..855b1506caf8 100644
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -22,6 +22,7 @@
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/of_platform.h>
25#include <linux/uio_driver.h> 26#include <linux/uio_driver.h>
26#include <linux/delay.h> 27#include <linux/delay.h>
27#include <linux/input.h> 28#include <linux/input.h>
@@ -500,3 +501,49 @@ void __init sh7377_add_early_devices(void)
500 /* override timer setup with soc-specific code */ 501 /* override timer setup with soc-specific code */
501 shmobile_timer.init = sh7377_earlytimer_init; 502 shmobile_timer.init = sh7377_earlytimer_init;
502} 503}
504
505#ifdef CONFIG_USE_OF
506
507void __init sh7377_add_early_devices_dt(void)
508{
509 shmobile_setup_delay(600, 1, 3); /* Cortex-A8 @ 600MHz */
510
511 early_platform_add_devices(sh7377_early_devices,
512 ARRAY_SIZE(sh7377_early_devices));
513
514 /* setup early console here as well */
515 shmobile_setup_console();
516}
517
518static const struct of_dev_auxdata sh7377_auxdata_lookup[] __initconst = {
519 { }
520};
521
522void __init sh7377_add_standard_devices_dt(void)
523{
524 /* clocks are setup late during boot in the case of DT */
525 sh7377_clock_init();
526
527 platform_add_devices(sh7377_early_devices,
528 ARRAY_SIZE(sh7377_early_devices));
529
530 of_platform_populate(NULL, of_default_bus_match_table,
531 sh7377_auxdata_lookup, NULL);
532}
533
534static const char *sh7377_boards_compat_dt[] __initdata = {
535 "renesas,sh7377",
536 NULL,
537};
538
539DT_MACHINE_START(SH7377_DT, "Generic SH7377 (Flattened Device Tree)")
540 .map_io = sh7377_map_io,
541 .init_early = sh7377_add_early_devices_dt,
542 .init_irq = sh7377_init_irq,
543 .handle_irq = shmobile_handle_irq_intc,
544 .init_machine = sh7377_add_standard_devices_dt,
545 .timer = &shmobile_timer,
546 .dt_compat = sh7377_boards_compat_dt,
547MACHINE_END
548
549#endif /* CONFIG_USE_OF */
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index 04a0dfe75493..d230af656fc9 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -30,6 +30,7 @@
30#include <linux/sh_dma.h> 30#include <linux/sh_dma.h>
31#include <linux/sh_intc.h> 31#include <linux/sh_intc.h>
32#include <linux/sh_timer.h> 32#include <linux/sh_timer.h>
33#include <mach/dma-register.h>
33#include <mach/hardware.h> 34#include <mach/hardware.h>
34#include <mach/irqs.h> 35#include <mach/irqs.h>
35#include <mach/sh73a0.h> 36#include <mach/sh73a0.h>
@@ -415,32 +416,6 @@ static struct platform_device i2c4_device = {
415 .num_resources = ARRAY_SIZE(i2c4_resources), 416 .num_resources = ARRAY_SIZE(i2c4_resources),
416}; 417};
417 418
418/* Transmit sizes and respective CHCR register values */
419enum {
420 XMIT_SZ_8BIT = 0,
421 XMIT_SZ_16BIT = 1,
422 XMIT_SZ_32BIT = 2,
423 XMIT_SZ_64BIT = 7,
424 XMIT_SZ_128BIT = 3,
425 XMIT_SZ_256BIT = 4,
426 XMIT_SZ_512BIT = 5,
427};
428
429/* log2(size / 8) - used to calculate number of transfers */
430#define TS_SHIFT { \
431 [XMIT_SZ_8BIT] = 0, \
432 [XMIT_SZ_16BIT] = 1, \
433 [XMIT_SZ_32BIT] = 2, \
434 [XMIT_SZ_64BIT] = 3, \
435 [XMIT_SZ_128BIT] = 4, \
436 [XMIT_SZ_256BIT] = 5, \
437 [XMIT_SZ_512BIT] = 6, \
438}
439
440#define TS_INDEX2VAL(i) ((((i) & 3) << 3) | (((i) & 0xc) << (20 - 2)))
441#define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz)))
442#define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz)))
443
444static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { 419static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = {
445 { 420 {
446 .slave_id = SHDMA_SLAVE_SCIF0_TX, 421 .slave_id = SHDMA_SLAVE_SCIF0_TX,
@@ -604,19 +579,17 @@ static const struct sh_dmae_channel sh73a0_dmae_channels[] = {
604 DMAE_CHANNEL(0x8980), 579 DMAE_CHANNEL(0x8980),
605}; 580};
606 581
607static const unsigned int ts_shift[] = TS_SHIFT;
608
609static struct sh_dmae_pdata sh73a0_dmae_platform_data = { 582static struct sh_dmae_pdata sh73a0_dmae_platform_data = {
610 .slave = sh73a0_dmae_slaves, 583 .slave = sh73a0_dmae_slaves,
611 .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), 584 .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves),
612 .channel = sh73a0_dmae_channels, 585 .channel = sh73a0_dmae_channels,
613 .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), 586 .channel_num = ARRAY_SIZE(sh73a0_dmae_channels),
614 .ts_low_shift = 3, 587 .ts_low_shift = TS_LOW_SHIFT,
615 .ts_low_mask = 0x18, 588 .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
616 .ts_high_shift = (20 - 2), /* 2 bits for shifted low TS */ 589 .ts_high_shift = TS_HI_SHIFT,
617 .ts_high_mask = 0x00300000, 590 .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
618 .ts_shift = ts_shift, 591 .ts_shift = dma_ts_shift,
619 .ts_shift_num = ARRAY_SIZE(ts_shift), 592 .ts_shift_num = ARRAY_SIZE(dma_ts_shift),
620 .dmaor_init = DMAOR_DME, 593 .dmaor_init = DMAOR_DME,
621}; 594};
622 595
@@ -651,6 +624,116 @@ static struct platform_device dma0_device = {
651 }, 624 },
652}; 625};
653 626
627/* MPDMAC */
628static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = {
629 {
630 .slave_id = SHDMA_SLAVE_FSI2A_RX,
631 .addr = 0xec230020,
632 .chcr = CHCR_RX(XMIT_SZ_32BIT),
633 .mid_rid = 0xd6, /* CHECK ME */
634 }, {
635 .slave_id = SHDMA_SLAVE_FSI2A_TX,
636 .addr = 0xec230024,
637 .chcr = CHCR_TX(XMIT_SZ_32BIT),
638 .mid_rid = 0xd5, /* CHECK ME */
639 }, {
640 .slave_id = SHDMA_SLAVE_FSI2C_RX,
641 .addr = 0xec230060,
642 .chcr = CHCR_RX(XMIT_SZ_32BIT),
643 .mid_rid = 0xda, /* CHECK ME */
644 }, {
645 .slave_id = SHDMA_SLAVE_FSI2C_TX,
646 .addr = 0xec230064,
647 .chcr = CHCR_TX(XMIT_SZ_32BIT),
648 .mid_rid = 0xd9, /* CHECK ME */
649 }, {
650 .slave_id = SHDMA_SLAVE_FSI2B_RX,
651 .addr = 0xec240020,
652 .chcr = CHCR_RX(XMIT_SZ_32BIT),
653 .mid_rid = 0x8e, /* CHECK ME */
654 }, {
655 .slave_id = SHDMA_SLAVE_FSI2B_TX,
656 .addr = 0xec240024,
657 .chcr = CHCR_RX(XMIT_SZ_32BIT),
658 .mid_rid = 0x8d, /* CHECK ME */
659 }, {
660 .slave_id = SHDMA_SLAVE_FSI2D_RX,
661 .addr = 0xec240060,
662 .chcr = CHCR_RX(XMIT_SZ_32BIT),
663 .mid_rid = 0x9a, /* CHECK ME */
664 },
665};
666
667#define MPDMA_CHANNEL(a, b, c) \
668{ \
669 .offset = a, \
670 .dmars = b, \
671 .dmars_bit = c, \
672 .chclr_offset = (0x220 - 0x20) + a \
673}
674
675static const struct sh_dmae_channel sh73a0_mpdma_channels[] = {
676 MPDMA_CHANNEL(0x00, 0, 0),
677 MPDMA_CHANNEL(0x10, 0, 8),
678 MPDMA_CHANNEL(0x20, 4, 0),
679 MPDMA_CHANNEL(0x30, 4, 8),
680 MPDMA_CHANNEL(0x50, 8, 0),
681 MPDMA_CHANNEL(0x70, 8, 8),
682};
683
684static struct sh_dmae_pdata sh73a0_mpdma_platform_data = {
685 .slave = sh73a0_mpdma_slaves,
686 .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves),
687 .channel = sh73a0_mpdma_channels,
688 .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels),
689 .ts_low_shift = TS_LOW_SHIFT,
690 .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
691 .ts_high_shift = TS_HI_SHIFT,
692 .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
693 .ts_shift = dma_ts_shift,
694 .ts_shift_num = ARRAY_SIZE(dma_ts_shift),
695 .dmaor_init = DMAOR_DME,
696 .chclr_present = 1,
697};
698
699/* Resource order important! */
700static struct resource sh73a0_mpdma_resources[] = {
701 {
702 /* Channel registers and DMAOR */
703 .start = 0xec618020,
704 .end = 0xec61828f,
705 .flags = IORESOURCE_MEM,
706 },
707 {
708 /* DMARSx */
709 .start = 0xec619000,
710 .end = 0xec61900b,
711 .flags = IORESOURCE_MEM,
712 },
713 {
714 .name = "error_irq",
715 .start = gic_spi(181),
716 .end = gic_spi(181),
717 .flags = IORESOURCE_IRQ,
718 },
719 {
720 /* IRQ for channels 0-5 */
721 .start = gic_spi(175),
722 .end = gic_spi(180),
723 .flags = IORESOURCE_IRQ,
724 },
725};
726
727static struct platform_device mpdma0_device = {
728 .name = "sh-dma-engine",
729 .id = 1,
730 .resource = sh73a0_mpdma_resources,
731 .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources),
732 .dev = {
733 .platform_data = &sh73a0_mpdma_platform_data,
734 },
735};
736
654static struct platform_device *sh73a0_early_devices[] __initdata = { 737static struct platform_device *sh73a0_early_devices[] __initdata = {
655 &scif0_device, 738 &scif0_device,
656 &scif1_device, 739 &scif1_device,
@@ -673,6 +756,7 @@ static struct platform_device *sh73a0_late_devices[] __initdata = {
673 &i2c3_device, 756 &i2c3_device,
674 &i2c4_device, 757 &i2c4_device,
675 &dma0_device, 758 &dma0_device,
759 &mpdma0_device,
676}; 760};
677 761
678#define SRCR2 0xe61580b0 762#define SRCR2 0xe61580b0
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-15 01:27:05 -0500