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-rw-r--r--arch/arm/mach-s5pc100/include/mach/entry-macro.S25
1 files changed, 0 insertions, 25 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
index ba76af052c81..b8c242edfa22 100644
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
@@ -12,39 +12,14 @@
12 * warranty of any kind, whether express or implied. 12 * warranty of any kind, whether express or implied.
13*/ 13*/
14 14
15#include <asm/hardware/vic.h>
16#include <mach/map.h>
17#include <plat/irqs.h>
18
19 .macro disable_fiq 15 .macro disable_fiq
20 .endm 16 .endm
21 17
22 .macro get_irqnr_preamble, base, tmp 18 .macro get_irqnr_preamble, base, tmp
23 ldr \base, =VA_VIC0
24 .endm 19 .endm
25 20
26 .macro arch_ret_to_user, tmp1, tmp2 21 .macro arch_ret_to_user, tmp1, tmp2
27 .endm 22 .endm
28 23
29 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
30
31 @ check the vic0
32 mov \irqnr, # S5P_IRQ_OFFSET + 31
33 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
34 teq \irqstat, #0
35
36 @ otherwise try vic1
37 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
38 addeq \irqnr, \irqnr, #32
39 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
40 teqeq \irqstat, #0
41
42 @ otherwise try vic2
43 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
44 addeq \irqnr, \irqnr, #32
45 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
46 teqeq \irqstat, #0
47
48 clzne \irqstat, \irqstat
49 subne \irqnr, \irqnr, \irqstat
50 .endm 25 .endm