diff options
Diffstat (limited to 'arch/arm/mach-pxa/time.c')
| -rw-r--r-- | arch/arm/mach-pxa/time.c | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 428da3ff33a5..de684701449c 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
| @@ -105,19 +105,6 @@ static struct clock_event_device ckevt_pxa_osmr0 = { | |||
| 105 | .set_mode = pxa_osmr0_set_mode, | 105 | .set_mode = pxa_osmr0_set_mode, |
| 106 | }; | 106 | }; |
| 107 | 107 | ||
| 108 | static cycle_t pxa_read_oscr(struct clocksource *cs) | ||
| 109 | { | ||
| 110 | return OSCR; | ||
| 111 | } | ||
| 112 | |||
| 113 | static struct clocksource cksrc_pxa_oscr0 = { | ||
| 114 | .name = "oscr0", | ||
| 115 | .rating = 200, | ||
| 116 | .read = pxa_read_oscr, | ||
| 117 | .mask = CLOCKSOURCE_MASK(32), | ||
| 118 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
| 119 | }; | ||
| 120 | |||
| 121 | static struct irqaction pxa_ost0_irq = { | 108 | static struct irqaction pxa_ost0_irq = { |
| 122 | .name = "ost0", | 109 | .name = "ost0", |
| 123 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 110 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
| @@ -134,7 +121,6 @@ static void __init pxa_timer_init(void) | |||
| 134 | 121 | ||
| 135 | init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate); | 122 | init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate); |
| 136 | 123 | ||
| 137 | clocksource_calc_mult_shift(&cksrc_pxa_oscr0, clock_tick_rate, 4); | ||
| 138 | clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4); | 124 | clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4); |
| 139 | ckevt_pxa_osmr0.max_delta_ns = | 125 | ckevt_pxa_osmr0.max_delta_ns = |
| 140 | clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); | 126 | clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); |
| @@ -144,7 +130,8 @@ static void __init pxa_timer_init(void) | |||
| 144 | 130 | ||
| 145 | setup_irq(IRQ_OST0, &pxa_ost0_irq); | 131 | setup_irq(IRQ_OST0, &pxa_ost0_irq); |
| 146 | 132 | ||
| 147 | clocksource_register_hz(&cksrc_pxa_oscr0, clock_tick_rate); | 133 | clocksource_mmio_init(&OSCR, "oscr0", clock_tick_rate, 200, 32, |
| 134 | clocksource_mmio_readl_up); | ||
| 148 | clockevents_register_device(&ckevt_pxa_osmr0); | 135 | clockevents_register_device(&ckevt_pxa_osmr0); |
| 149 | } | 136 | } |
| 150 | 137 | ||
