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-rw-r--r--arch/arm/mach-orion5x/include/mach/bridge-regs.h6
-rw-r--r--arch/arm/mach-orion5x/include/mach/gpio.h28
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h1
3 files changed, 3 insertions, 32 deletions
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index 5c9744cd8ef6..96484bcd34ca 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -22,14 +22,12 @@
22 22
23#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c) 23#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c)
24 24
25#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
26
25#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C) 27#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C)
26 28
27#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
28#define WDT_INT_REQ 0x0008 29#define WDT_INT_REQ 0x0008
29 30
30#define BRIDGE_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x114)
31#define BRIDGE_INT_TIMER0 0x0002
32#define BRIDGE_INT_TIMER1 0x0004
33#define BRIDGE_INT_TIMER1_CLR (~0x0004) 31#define BRIDGE_INT_TIMER1_CLR (~0x0004)
34 32
35#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200) 33#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200)
diff --git a/arch/arm/mach-orion5x/include/mach/gpio.h b/arch/arm/mach-orion5x/include/mach/gpio.h
index d8182e87ac16..a1d0b78decb1 100644
--- a/arch/arm/mach-orion5x/include/mach/gpio.h
+++ b/arch/arm/mach-orion5x/include/mach/gpio.h
@@ -6,32 +6,4 @@
6 * warranty of any kind, whether express or implied. 6 * warranty of any kind, whether express or implied.
7 */ 7 */
8 8
9#ifndef __ASM_ARCH_GPIO_H
10#define __ASM_ARCH_GPIO_H
11
12#include <mach/irqs.h>
13#include <plat/gpio.h> 9#include <plat/gpio.h>
14#include <asm-generic/gpio.h> /* cansleep wrappers */
15
16#define GPIO_MAX 32
17#define GPIO_OUT(pin) ORION5X_DEV_BUS_REG(0x100)
18#define GPIO_IO_CONF(pin) ORION5X_DEV_BUS_REG(0x104)
19#define GPIO_BLINK_EN(pin) ORION5X_DEV_BUS_REG(0x108)
20#define GPIO_IN_POL(pin) ORION5X_DEV_BUS_REG(0x10c)
21#define GPIO_DATA_IN(pin) ORION5X_DEV_BUS_REG(0x110)
22#define GPIO_EDGE_CAUSE(pin) ORION5X_DEV_BUS_REG(0x114)
23#define GPIO_EDGE_MASK(pin) ORION5X_DEV_BUS_REG(0x118)
24#define GPIO_LEVEL_MASK(pin) ORION5X_DEV_BUS_REG(0x11c)
25
26static inline int gpio_to_irq(int pin)
27{
28 return pin + IRQ_ORION5X_GPIO_START;
29}
30
31static inline int irq_to_gpio(int irq)
32{
33 return irq - IRQ_ORION5X_GPIO_START;
34}
35
36
37#endif
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 2d8766570531..0a28bbc76891 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -73,6 +73,7 @@
73#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) 73#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000)
74#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) 74#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000)
75#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x)) 75#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x))
76#define GPIO_VIRT_BASE ORION5X_DEV_BUS_REG(0x0100)
76#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600) 77#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600)
77#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000) 78#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000)
78#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000) 79#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000)