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-rw-r--r--arch/arm/mach-omap2/Kconfig24
-rw-r--r--arch/arm/mach-omap2/Makefile21
-rw-r--r--arch/arm/mach-omap2/am35xx-emac.c117
-rw-r--r--arch/arm/mach-omap2/am35xx-emac.h15
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c2
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c5
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c87
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c119
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c8
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c2
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c4
-rw-r--r--arch/arm/mach-omap2/board-flash.c2
-rw-r--r--arch/arm/mach-omap2/board-generic.c115
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c6
-rw-r--r--arch/arm/mach-omap2/board-ldp.c3
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c13
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c10
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c32
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c4
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c26
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c15
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c17
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c111
-rw-r--r--arch/arm/mach-omap2/board-overo.c3
-rw-r--r--arch/arm/mach-omap2/board-rm680.c16
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c30
-rw-r--r--arch/arm/mach-omap2/board-zoom-display.c5
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c10
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c1
-rw-r--r--arch/arm/mach-omap2/clkt_clksel.c1
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c1
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c3
-rw-r--r--arch/arm/mach-omap2/clock2430.c2
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c2
-rw-r--r--arch/arm/mach-omap2/clock2xxx.c1
-rw-r--r--arch/arm/mach-omap2/clock3xxx.c1
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c3
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c3
-rw-r--r--arch/arm/mach-omap2/cm2xxx_3xxx.c4
-rw-r--r--arch/arm/mach-omap2/cm44xx.c2
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c2
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c9
-rw-r--r--arch/arm/mach-omap2/common.c5
-rw-r--r--arch/arm/mach-omap2/common.h20
-rw-r--r--arch/arm/mach-omap2/control.c4
-rw-r--r--arch/arm/mach-omap2/control.h6
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c5
-rw-r--r--arch/arm/mach-omap2/devices.c41
-rw-r--r--arch/arm/mach-omap2/display.c13
-rw-r--r--arch/arm/mach-omap2/dma.c2
-rw-r--r--arch/arm/mach-omap2/emu.c30
-rw-r--r--arch/arm/mach-omap2/gpio.c38
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c1
-rw-r--r--arch/arm/mach-omap2/gpmc-onenand.c1
-rw-r--r--arch/arm/mach-omap2/gpmc-smsc911x.c55
-rw-r--r--arch/arm/mach-omap2/gpmc.c8
-rw-r--r--arch/arm/mach-omap2/hsmmc.c141
-rw-r--r--arch/arm/mach-omap2/hsmmc.h12
-rw-r--r--arch/arm/mach-omap2/id.c189
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-omap2/include/mach/io.h46
-rw-r--r--arch/arm/mach-omap2/include/mach/system.h5
-rw-r--r--arch/arm/mach-omap2/io.c74
-rw-r--r--arch/arm/mach-omap2/iomap.h203
-rw-r--r--arch/arm/mach-omap2/irq.c65
-rw-r--r--arch/arm/mach-omap2/mailbox.c10
-rw-r--r--arch/arm/mach-omap2/mcbsp.c56
-rw-r--r--arch/arm/mach-omap2/mux.c8
-rw-r--r--arch/arm/mach-omap2/mux.h2
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S1
-rw-r--r--arch/arm/mach-omap2/omap-hotplug.c2
-rw-r--r--arch/arm/mach-omap2/omap-iommu.c3
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c4
-rw-r--r--arch/arm/mach-omap2/omap-smp.c3
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c53
-rw-r--r--arch/arm/mach-omap2/omap4-common.c27
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c16
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c21
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c22
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c85
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c22
-rw-r--r--arch/arm/mach-omap2/opp2420_data.c2
-rw-r--r--arch/arm/mach-omap2/opp2430_data.c2
-rw-r--r--arch/arm/mach-omap2/pm-debug.c6
-rw-r--r--arch/arm/mach-omap2/pm.c128
-rw-r--r--arch/arm/mach-omap2/pm.h3
-rw-r--r--arch/arm/mach-omap2/pm24xx.c112
-rw-r--r--arch/arm/mach-omap2/pm34xx.c94
-rw-r--r--arch/arm/mach-omap2/pm44xx.c65
-rw-r--r--arch/arm/mach-omap2/powerdomain-common.c1
-rw-r--r--arch/arm/mach-omap2/powerdomain2xxx_3xxx.c1
-rw-r--r--arch/arm/mach-omap2/powerdomain44xx.c1
-rw-r--r--arch/arm/mach-omap2/powerdomains3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/prcm_mpu44xx.c2
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c1
-rw-r--r--arch/arm/mach-omap2/prm44xx.c4
-rw-r--r--arch/arm/mach-omap2/prm_common.c1
-rw-r--r--arch/arm/mach-omap2/prminst44xx.c2
-rw-r--r--arch/arm/mach-omap2/sdram-nokia.c1
-rw-r--r--arch/arm/mach-omap2/sdrc2xxx.c6
-rw-r--r--arch/arm/mach-omap2/serial.c12
-rw-r--r--arch/arm/mach-omap2/sleep24xx.S1
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S5
-rw-r--r--arch/arm/mach-omap2/smartreflex-class3.c1
-rw-r--r--arch/arm/mach-omap2/smartreflex.c231
-rw-r--r--arch/arm/mach-omap2/smartreflex.h10
-rw-r--r--arch/arm/mach-omap2/sr_device.c13
-rw-r--r--arch/arm/mach-omap2/sram242x.S4
-rw-r--r--arch/arm/mach-omap2/sram243x.S4
-rw-r--r--arch/arm/mach-omap2/sram34xx.S5
-rw-r--r--arch/arm/mach-omap2/timer-mpu.c39
-rw-r--r--arch/arm/mach-omap2/timer.c24
-rw-r--r--arch/arm/mach-omap2/twl-common.c1
-rw-r--r--arch/arm/mach-omap2/usb-host.c6
-rw-r--r--arch/arm/mach-omap2/vc.c11
-rw-r--r--arch/arm/mach-omap2/voltagedomains3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/voltagedomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/vp.c9
118 files changed, 1842 insertions, 1145 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a8ba7b96dcd1..8141b76283a6 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -32,8 +32,7 @@ config ARCH_OMAP3
32 depends on ARCH_OMAP2PLUS 32 depends on ARCH_OMAP2PLUS
33 default y 33 default y
34 select CPU_V7 34 select CPU_V7
35 select USB_ARCH_HAS_EHCI 35 select USB_ARCH_HAS_EHCI if USB_SUPPORT
36 select ARM_L1_CACHE_SHIFT_6 if !ARCH_OMAP4
37 select ARCH_HAS_OPP 36 select ARCH_HAS_OPP
38 select PM_OPP if PM 37 select PM_OPP if PM
39 select ARM_CPU_SUSPEND if PM 38 select ARM_CPU_SUSPEND if PM
@@ -53,7 +52,7 @@ config ARCH_OMAP4
53 select ARM_ERRATA_720789 52 select ARM_ERRATA_720789
54 select ARCH_HAS_OPP 53 select ARCH_HAS_OPP
55 select PM_OPP if PM 54 select PM_OPP if PM
56 select USB_ARCH_HAS_EHCI 55 select USB_ARCH_HAS_EHCI if USB_SUPPORT
57 select ARM_CPU_SUSPEND if PM 56 select ARM_CPU_SUSPEND if PM
58 57
59comment "OMAP Core Type" 58comment "OMAP Core Type"
@@ -118,7 +117,6 @@ comment "OMAP Board Type"
118config MACH_OMAP_GENERIC 117config MACH_OMAP_GENERIC
119 bool "Generic OMAP2+ board" 118 bool "Generic OMAP2+ board"
120 depends on ARCH_OMAP2PLUS 119 depends on ARCH_OMAP2PLUS
121 select USE_OF
122 default y 120 default y
123 help 121 help
124 Support for generic TI OMAP2+ boards using Flattened Device Tree. 122 Support for generic TI OMAP2+ boards using Flattened Device Tree.
@@ -214,13 +212,12 @@ config MACH_OMAP3_PANDORA
214 depends on ARCH_OMAP3 212 depends on ARCH_OMAP3
215 default y 213 default y
216 select OMAP_PACKAGE_CBB 214 select OMAP_PACKAGE_CBB
217 select REGULATOR_FIXED_VOLTAGE 215 select REGULATOR_FIXED_VOLTAGE if REGULATOR
218 216
219config MACH_OMAP3_TOUCHBOOK 217config MACH_OMAP3_TOUCHBOOK
220 bool "OMAP3 Touch Book" 218 bool "OMAP3 Touch Book"
221 depends on ARCH_OMAP3 219 depends on ARCH_OMAP3
222 default y 220 default y
223 select BACKLIGHT_CLASS_DEVICE
224 221
225config MACH_OMAP_3430SDP 222config MACH_OMAP_3430SDP
226 bool "OMAP 3430 SDP board" 223 bool "OMAP 3430 SDP board"
@@ -247,10 +244,11 @@ config MACH_NOKIA_N8X0
247 select MACH_NOKIA_N810_WIMAX 244 select MACH_NOKIA_N810_WIMAX
248 245
249config MACH_NOKIA_RM680 246config MACH_NOKIA_RM680
250 bool "Nokia RM-680 board" 247 bool "Nokia RM-680/696 board"
251 depends on ARCH_OMAP3 248 depends on ARCH_OMAP3
252 default y 249 default y
253 select OMAP_PACKAGE_CBB 250 select OMAP_PACKAGE_CBB
251 select MACH_NOKIA_RM696
254 252
255config MACH_NOKIA_RX51 253config MACH_NOKIA_RX51
256 bool "Nokia RX-51 board" 254 bool "Nokia RX-51 board"
@@ -266,7 +264,7 @@ config MACH_OMAP_ZOOM2
266 select SERIAL_8250 264 select SERIAL_8250
267 select SERIAL_CORE_CONSOLE 265 select SERIAL_CORE_CONSOLE
268 select SERIAL_8250_CONSOLE 266 select SERIAL_8250_CONSOLE
269 select REGULATOR_FIXED_VOLTAGE 267 select REGULATOR_FIXED_VOLTAGE if REGULATOR
270 268
271config MACH_OMAP_ZOOM3 269config MACH_OMAP_ZOOM3
272 bool "OMAP3630 Zoom3 board" 270 bool "OMAP3630 Zoom3 board"
@@ -276,7 +274,7 @@ config MACH_OMAP_ZOOM3
276 select SERIAL_8250 274 select SERIAL_8250
277 select SERIAL_CORE_CONSOLE 275 select SERIAL_CORE_CONSOLE
278 select SERIAL_8250_CONSOLE 276 select SERIAL_8250_CONSOLE
279 select REGULATOR_FIXED_VOLTAGE 277 select REGULATOR_FIXED_VOLTAGE if REGULATOR
280 278
281config MACH_CM_T35 279config MACH_CM_T35
282 bool "CompuLab CM-T35/CM-T3730 modules" 280 bool "CompuLab CM-T35/CM-T3730 modules"
@@ -335,7 +333,7 @@ config MACH_OMAP_4430SDP
335 depends on ARCH_OMAP4 333 depends on ARCH_OMAP4
336 select OMAP_PACKAGE_CBL 334 select OMAP_PACKAGE_CBL
337 select OMAP_PACKAGE_CBS 335 select OMAP_PACKAGE_CBS
338 select REGULATOR_FIXED_VOLTAGE 336 select REGULATOR_FIXED_VOLTAGE if REGULATOR
339 337
340config MACH_OMAP4_PANDA 338config MACH_OMAP4_PANDA
341 bool "OMAP4 Panda Board" 339 bool "OMAP4 Panda Board"
@@ -343,7 +341,7 @@ config MACH_OMAP4_PANDA
343 depends on ARCH_OMAP4 341 depends on ARCH_OMAP4
344 select OMAP_PACKAGE_CBL 342 select OMAP_PACKAGE_CBL
345 select OMAP_PACKAGE_CBS 343 select OMAP_PACKAGE_CBS
346 select REGULATOR_FIXED_VOLTAGE 344 select REGULATOR_FIXED_VOLTAGE if REGULATOR
347 345
348config OMAP3_EMU 346config OMAP3_EMU
349 bool "OMAP3 debugging peripherals" 347 bool "OMAP3 debugging peripherals"
@@ -366,8 +364,8 @@ config OMAP3_SDRC_AC_TIMING
366 going on could result in system crashes; 364 going on could result in system crashes;
367 365
368config OMAP4_ERRATA_I688 366config OMAP4_ERRATA_I688
369 bool "OMAP4 errata: Async Bridge Corruption (BROKEN)" 367 bool "OMAP4 errata: Async Bridge Corruption"
370 depends on ARCH_OMAP4 && BROKEN 368 depends on ARCH_OMAP4
371 select ARCH_HAS_BARRIERS 369 select ARCH_HAS_BARRIERS
372 help 370 help
373 If a data is stalled inside asynchronous bridge because of back 371 If a data is stalled inside asynchronous bridge because of back
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fc9b238cbc19..49f92bc1c311 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,26 +4,27 @@
4 4
5# Common support 5# Common support
6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ 6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
7 common.o gpio.o dma.o wd_timer.o display.o 7 common.o gpio.o dma.o wd_timer.o display.o i2c.o
8 8
9omap-2-3-common = irq.o sdrc.o 9omap-2-3-common = irq.o sdrc.o
10hwmod-common = omap_hwmod.o \ 10hwmod-common = omap_hwmod.o \
11 omap_hwmod_common_data.o 11 omap_hwmod_common_data.o
12clock-common = clock.o clock_common_data.o \ 12clock-common = clock.o clock_common_data.o \
13 clkt_dpll.o clkt_clksel.o 13 clkt_dpll.o clkt_clksel.o
14secure-common = omap-smc.o omap-secure.o 14secure-common = omap-smc.o omap-secure.o
15 15
16obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) $(secure-common) 16obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
17obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) 17obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
18obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) 18obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common)
19 19
20obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 20ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
21obj-y += mcbsp.o
22endif
21 23
22obj-$(CONFIG_TWL4030_CORE) += omap_twl.o 24obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
23 25
24# SMP support ONLY available for OMAP4 26# SMP support ONLY available for OMAP4
25obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o 27obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
26obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o
27obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o 28obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
28obj-$(CONFIG_ARCH_OMAP4) += omap4-common.o omap-wakeupgen.o \ 29obj-$(CONFIG_ARCH_OMAP4) += omap4-common.o omap-wakeupgen.o \
29 sleep44xx.o 30 sleep44xx.o
@@ -182,9 +183,6 @@ obj-$(CONFIG_OMAP_IOMMU) += iommu2.o
182iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o 183iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o
183obj-y += $(iommu-m) $(iommu-y) 184obj-y += $(iommu-m) $(iommu-y)
184 185
185i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
186obj-y += $(i2c-omap-m) $(i2c-omap-y)
187
188ifneq ($(CONFIG_TIDSPBRIDGE),) 186ifneq ($(CONFIG_TIDSPBRIDGE),)
189obj-y += dsp.o 187obj-y += dsp.o
190endif 188endif
@@ -268,6 +266,11 @@ obj-y += $(smc91x-m) $(smc91x-y)
268 266
269smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o 267smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o
270obj-y += $(smsc911x-m) $(smsc911x-y) 268obj-y += $(smsc911x-m) $(smsc911x-y)
271obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o 269ifneq ($(CONFIG_HWSPINLOCK_OMAP),)
270obj-y += hwspinlock.o
271endif
272
273emac-$(CONFIG_TI_DAVINCI_EMAC) := am35xx-emac.o
274obj-y += $(emac-m) $(emac-y)
272 275
273obj-y += common-board-devices.o twl-common.o 276obj-y += common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
new file mode 100644
index 000000000000..1f97e7475206
--- /dev/null
+++ b/arch/arm/mach-omap2/am35xx-emac.c
@@ -0,0 +1,117 @@
1/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on mach-omap2/board-am3517evm.c
5 * Copyright (C) 2009 Texas Instruments Incorporated
6 * Author: Ranjith Lohithakshan <ranjithl@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13 * whether express or implied; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#include <linux/clk.h>
19#include <linux/davinci_emac.h>
20#include <linux/platform_device.h>
21#include <plat/irqs.h>
22#include <mach/am35xx.h>
23
24#include "control.h"
25
26static struct mdio_platform_data am35xx_emac_mdio_pdata;
27
28static struct resource am35xx_emac_mdio_resources[] = {
29 DEFINE_RES_MEM(AM35XX_IPSS_EMAC_BASE + AM35XX_EMAC_MDIO_OFFSET, SZ_4K),
30};
31
32static struct platform_device am35xx_emac_mdio_device = {
33 .name = "davinci_mdio",
34 .id = 0,
35 .num_resources = ARRAY_SIZE(am35xx_emac_mdio_resources),
36 .resource = am35xx_emac_mdio_resources,
37 .dev.platform_data = &am35xx_emac_mdio_pdata,
38};
39
40static void am35xx_enable_emac_int(void)
41{
42 u32 regval;
43
44 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
45 regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
46 AM35XX_CPGMAC_C0_TX_PULSE_CLR |
47 AM35XX_CPGMAC_C0_MISC_PULSE_CLR |
48 AM35XX_CPGMAC_C0_RX_THRESH_CLR);
49 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
50 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
51}
52
53static void am35xx_disable_emac_int(void)
54{
55 u32 regval;
56
57 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
58 regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
59 AM35XX_CPGMAC_C0_TX_PULSE_CLR);
60 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
61 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
62}
63
64static struct emac_platform_data am35xx_emac_pdata = {
65 .ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET,
66 .ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET,
67 .ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET,
68 .ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE,
69 .hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR,
70 .version = EMAC_VERSION_2,
71 .interrupt_enable = am35xx_enable_emac_int,
72 .interrupt_disable = am35xx_disable_emac_int,
73};
74
75static struct resource am35xx_emac_resources[] = {
76 DEFINE_RES_MEM(AM35XX_IPSS_EMAC_BASE, 0x30000),
77 DEFINE_RES_IRQ(INT_35XX_EMAC_C0_RXTHRESH_IRQ),
78 DEFINE_RES_IRQ(INT_35XX_EMAC_C0_RX_PULSE_IRQ),
79 DEFINE_RES_IRQ(INT_35XX_EMAC_C0_TX_PULSE_IRQ),
80 DEFINE_RES_IRQ(INT_35XX_EMAC_C0_MISC_PULSE_IRQ),
81};
82
83static struct platform_device am35xx_emac_device = {
84 .name = "davinci_emac",
85 .id = -1,
86 .num_resources = ARRAY_SIZE(am35xx_emac_resources),
87 .resource = am35xx_emac_resources,
88 .dev = {
89 .platform_data = &am35xx_emac_pdata,
90 },
91};
92
93void __init am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en)
94{
95 unsigned int regval;
96 int err;
97
98 am35xx_emac_pdata.rmii_en = rmii_en;
99 am35xx_emac_mdio_pdata.bus_freq = mdio_bus_freq;
100 err = platform_device_register(&am35xx_emac_device);
101 if (err) {
102 pr_err("AM35x: failed registering EMAC device: %d\n", err);
103 return;
104 }
105
106 err = platform_device_register(&am35xx_emac_mdio_device);
107 if (err) {
108 pr_err("AM35x: failed registering EMAC MDIO device: %d\n", err);
109 platform_device_unregister(&am35xx_emac_device);
110 return;
111 }
112
113 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
114 regval = regval & (~(AM35XX_CPGMACSS_SW_RST));
115 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
116 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
117}
diff --git a/arch/arm/mach-omap2/am35xx-emac.h b/arch/arm/mach-omap2/am35xx-emac.h
new file mode 100644
index 000000000000..15c6f9ce59a2
--- /dev/null
+++ b/arch/arm/mach-omap2/am35xx-emac.h
@@ -0,0 +1,15 @@
1/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#define AM35XX_DEFAULT_MDIO_FREQUENCY 1000000
10
11#if defined(CONFIG_TI_DAVINCI_EMAC) || defined(CONFIG_TI_DAVINCI_EMAC_MODULE)
12void am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en);
13#else
14static inline void am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en) {}
15#endif
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 7370983f809f..c8bda62900d8 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -279,7 +279,7 @@ static void __init omap_2430sdp_init(void)
279 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); 279 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
280 omap_serial_init(); 280 omap_serial_init();
281 omap_sdrc_init(NULL, NULL); 281 omap_sdrc_init(NULL, NULL);
282 omap2_hsmmc_init(mmc); 282 omap_hsmmc_init(mmc);
283 omap2_usbfs_init(&sdp2430_usb_config); 283 omap2_usbfs_init(&sdp2430_usb_config);
284 284
285 omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); 285 omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP);
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 383717ba63b9..da75f239873e 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -232,11 +232,13 @@ static struct omap2_hsmmc_info mmc[] = {
232 */ 232 */
233 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 233 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
234 .gpio_wp = 4, 234 .gpio_wp = 4,
235 .deferred = true,
235 }, 236 },
236 { 237 {
237 .mmc = 2, 238 .mmc = 2,
238 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 239 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
239 .gpio_wp = 7, 240 .gpio_wp = 7,
241 .deferred = true,
240 }, 242 },
241 {} /* Terminator */ 243 {} /* Terminator */
242}; 244};
@@ -249,7 +251,7 @@ static int sdp3430_twl_gpio_setup(struct device *dev,
249 */ 251 */
250 mmc[0].gpio_cd = gpio + 0; 252 mmc[0].gpio_cd = gpio + 0;
251 mmc[1].gpio_cd = gpio + 1; 253 mmc[1].gpio_cd = gpio + 1;
252 omap2_hsmmc_init(mmc); 254 omap_hsmmc_late_init(mmc);
253 255
254 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */ 256 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
255 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl"); 257 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
@@ -606,6 +608,7 @@ static void __init omap_3430sdp_init(void)
606 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 608 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
607 omap_board_config = sdp3430_config; 609 omap_board_config = sdp3430_config;
608 omap_board_config_size = ARRAY_SIZE(sdp3430_config); 610 omap_board_config_size = ARRAY_SIZE(sdp3430_config);
611 omap_hsmmc_init(mmc);
609 omap3430_i2c_init(); 612 omap3430_i2c_init();
610 omap_display_init(&sdp3430_dss_data); 613 omap_display_init(&sdp3430_dss_data);
611 if (omap_rev() > OMAP3430_REV_ES1_0) 614 if (omap_rev() > OMAP3430_REV_ES1_0)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 39fba9df17fb..37dcb1bc025e 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -25,6 +25,7 @@
25#include <linux/regulator/fixed.h> 25#include <linux/regulator/fixed.h>
26#include <linux/leds.h> 26#include <linux/leds.h>
27#include <linux/leds_pwm.h> 27#include <linux/leds_pwm.h>
28#include <linux/platform_data/omap4-keypad.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/hardware/gic.h> 31#include <asm/hardware/gic.h>
@@ -41,6 +42,7 @@
41#include <video/omap-panel-nokia-dsi.h> 42#include <video/omap-panel-nokia-dsi.h>
42#include <video/omap-panel-picodlp.h> 43#include <video/omap-panel-picodlp.h>
43#include <linux/wl12xx.h> 44#include <linux/wl12xx.h>
45#include <linux/platform_data/omap-abe-twl6040.h>
44 46
45#include "mux.h" 47#include "mux.h"
46#include "hsmmc.h" 48#include "hsmmc.h"
@@ -52,8 +54,9 @@
52#define ETH_KS8851_QUART 138 54#define ETH_KS8851_QUART 138
53#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184 55#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184
54#define OMAP4_SFH7741_ENABLE_GPIO 188 56#define OMAP4_SFH7741_ENABLE_GPIO 188
55#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */ 57#define HDMI_GPIO_CT_CP_HPD 60 /* HPD mode enable/disable */
56#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */ 58#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
59#define HDMI_GPIO_HPD 63 /* Hotplug detect */
57#define DISPLAY_SEL_GPIO 59 /* LCD2/PicoDLP switch */ 60#define DISPLAY_SEL_GPIO 59 /* LCD2/PicoDLP switch */
58#define DLP_POWER_ON_GPIO 40 61#define DLP_POWER_ON_GPIO 40
59 62
@@ -321,7 +324,10 @@ static struct spi_board_info sdp4430_spi_board_info[] __initdata = {
321 .bus_num = 1, 324 .bus_num = 1,
322 .chip_select = 0, 325 .chip_select = 0,
323 .max_speed_hz = 24000000, 326 .max_speed_hz = 24000000,
324 .irq = ETH_KS8851_IRQ, 327 /*
328 * .irq is set to gpio_to_irq(ETH_KS8851_IRQ)
329 * in omap_4430sdp_init
330 */
325 }, 331 },
326}; 332};
327 333
@@ -377,12 +383,40 @@ static struct platform_device sdp4430_dmic_codec = {
377 .id = -1, 383 .id = -1,
378}; 384};
379 385
386static struct omap_abe_twl6040_data sdp4430_abe_audio_data = {
387 .card_name = "SDP4430",
388 .has_hs = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
389 .has_hf = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
390 .has_ep = 1,
391 .has_aux = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
392 .has_vibra = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
393
394 .has_dmic = 1,
395 .has_hsmic = 1,
396 .has_mainmic = 1,
397 .has_submic = 1,
398 .has_afm = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
399
400 .jack_detection = 1,
401 /* MCLK input is 38.4MHz */
402 .mclk_freq = 38400000,
403};
404
405static struct platform_device sdp4430_abe_audio = {
406 .name = "omap-abe-twl6040",
407 .id = -1,
408 .dev = {
409 .platform_data = &sdp4430_abe_audio_data,
410 },
411};
412
380static struct platform_device *sdp4430_devices[] __initdata = { 413static struct platform_device *sdp4430_devices[] __initdata = {
381 &sdp4430_gpio_keys_device, 414 &sdp4430_gpio_keys_device,
382 &sdp4430_leds_gpio, 415 &sdp4430_leds_gpio,
383 &sdp4430_leds_pwm, 416 &sdp4430_leds_pwm,
384 &sdp4430_vbat, 417 &sdp4430_vbat,
385 &sdp4430_dmic_codec, 418 &sdp4430_dmic_codec,
419 &sdp4430_abe_audio,
386}; 420};
387 421
388static struct omap_musb_board_data musb_board_data = { 422static struct omap_musb_board_data musb_board_data = {
@@ -456,21 +490,22 @@ static struct platform_device omap_vwlan_device = {
456 490
457static int omap4_twl6030_hsmmc_late_init(struct device *dev) 491static int omap4_twl6030_hsmmc_late_init(struct device *dev)
458{ 492{
459 int ret = 0; 493 int irq = 0;
460 struct platform_device *pdev = container_of(dev, 494 struct platform_device *pdev = container_of(dev,
461 struct platform_device, dev); 495 struct platform_device, dev);
462 struct omap_mmc_platform_data *pdata = dev->platform_data; 496 struct omap_mmc_platform_data *pdata = dev->platform_data;
463 497
464 /* Setting MMC1 Card detect Irq */ 498 /* Setting MMC1 Card detect Irq */
465 if (pdev->id == 0) { 499 if (pdev->id == 0) {
466 ret = twl6030_mmc_card_detect_config(); 500 irq = twl6030_mmc_card_detect_config();
467 if (ret) 501 if (irq < 0) {
468 pr_err("Failed configuring MMC1 card detect\n"); 502 pr_err("Failed configuring MMC1 card detect\n");
469 pdata->slots[0].card_detect_irq = TWL6030_IRQ_BASE + 503 return irq;
470 MMCDETECT_INTR_OFFSET; 504 }
505 pdata->slots[0].card_detect_irq = irq;
471 pdata->slots[0].card_detect = twl6030_mmc_card_detect; 506 pdata->slots[0].card_detect = twl6030_mmc_card_detect;
472 } 507 }
473 return ret; 508 return 0;
474} 509}
475 510
476static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev) 511static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
@@ -490,9 +525,9 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
490{ 525{
491 struct omap2_hsmmc_info *c; 526 struct omap2_hsmmc_info *c;
492 527
493 omap2_hsmmc_init(controllers); 528 omap_hsmmc_init(controllers);
494 for (c = controllers; c->mmc; c++) 529 for (c = controllers; c->mmc; c++)
495 omap4_twl6030_hsmmc_set_late_init(c->dev); 530 omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev);
496 531
497 return 0; 532 return 0;
498} 533}
@@ -603,8 +638,9 @@ static void __init omap_sfh7741prox_init(void)
603} 638}
604 639
605static struct gpio sdp4430_hdmi_gpios[] = { 640static struct gpio sdp4430_hdmi_gpios[] = {
606 { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" }, 641 { HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" },
607 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" }, 642 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" },
643 { HDMI_GPIO_HPD, GPIOF_DIR_IN, "hdmi_gpio_hpd" },
608}; 644};
609 645
610static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev) 646static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev)
@@ -621,8 +657,7 @@ static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev)
621 657
622static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev) 658static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev)
623{ 659{
624 gpio_free(HDMI_GPIO_LS_OE); 660 gpio_free_array(sdp4430_hdmi_gpios, ARRAY_SIZE(sdp4430_hdmi_gpios));
625 gpio_free(HDMI_GPIO_HPD);
626} 661}
627 662
628static struct nokia_dsi_panel_data dsi1_panel = { 663static struct nokia_dsi_panel_data dsi1_panel = {
@@ -738,6 +773,10 @@ static void sdp4430_lcd_init(void)
738 pr_err("%s: Could not get lcd2_reset_gpio\n", __func__); 773 pr_err("%s: Could not get lcd2_reset_gpio\n", __func__);
739} 774}
740 775
776static struct omap_dss_hdmi_data sdp4430_hdmi_data = {
777 .hpd_gpio = HDMI_GPIO_HPD,
778};
779
741static struct omap_dss_device sdp4430_hdmi_device = { 780static struct omap_dss_device sdp4430_hdmi_device = {
742 .name = "hdmi", 781 .name = "hdmi",
743 .driver_name = "hdmi_panel", 782 .driver_name = "hdmi_panel",
@@ -745,6 +784,7 @@ static struct omap_dss_device sdp4430_hdmi_device = {
745 .platform_enable = sdp4430_panel_enable_hdmi, 784 .platform_enable = sdp4430_panel_enable_hdmi,
746 .platform_disable = sdp4430_panel_disable_hdmi, 785 .platform_disable = sdp4430_panel_disable_hdmi,
747 .channel = OMAP_DSS_CHANNEL_DIGIT, 786 .channel = OMAP_DSS_CHANNEL_DIGIT,
787 .data = &sdp4430_hdmi_data,
748}; 788};
749 789
750static struct picodlp_panel_data sdp4430_picodlp_pdata = { 790static struct picodlp_panel_data sdp4430_picodlp_pdata = {
@@ -808,7 +848,7 @@ static struct omap_dss_board_info sdp4430_dss_data = {
808 .default_device = &sdp4430_lcd_device, 848 .default_device = &sdp4430_lcd_device,
809}; 849};
810 850
811static void omap_4430sdp_display_init(void) 851static void __init omap_4430sdp_display_init(void)
812{ 852{
813 int r; 853 int r;
814 854
@@ -829,6 +869,10 @@ static void omap_4430sdp_display_init(void)
829 omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP); 869 omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP);
830 else 870 else
831 omap_hdmi_init(0); 871 omap_hdmi_init(0);
872
873 omap_mux_init_gpio(HDMI_GPIO_LS_OE, OMAP_PIN_OUTPUT);
874 omap_mux_init_gpio(HDMI_GPIO_CT_CP_HPD, OMAP_PIN_OUTPUT);
875 omap_mux_init_gpio(HDMI_GPIO_HPD, OMAP_PIN_INPUT_PULLDOWN);
832} 876}
833 877
834#ifdef CONFIG_OMAP_MUX 878#ifdef CONFIG_OMAP_MUX
@@ -841,7 +885,7 @@ static struct omap_board_mux board_mux[] __initdata = {
841#define board_mux NULL 885#define board_mux NULL
842 #endif 886 #endif
843 887
844static void omap4_sdp4430_wifi_mux_init(void) 888static void __init omap4_sdp4430_wifi_mux_init(void)
845{ 889{
846 omap_mux_init_gpio(GPIO_WIFI_IRQ, OMAP_PIN_INPUT | 890 omap_mux_init_gpio(GPIO_WIFI_IRQ, OMAP_PIN_INPUT |
847 OMAP_PIN_OFF_WAKEUPENABLE); 891 OMAP_PIN_OFF_WAKEUPENABLE);
@@ -868,12 +912,17 @@ static struct wl12xx_platform_data omap4_sdp4430_wlan_data __initdata = {
868 .board_tcxo_clock = WL12XX_TCXOCLOCK_26, 912 .board_tcxo_clock = WL12XX_TCXOCLOCK_26,
869}; 913};
870 914
871static void omap4_sdp4430_wifi_init(void) 915static void __init omap4_sdp4430_wifi_init(void)
872{ 916{
917 int ret;
918
873 omap4_sdp4430_wifi_mux_init(); 919 omap4_sdp4430_wifi_mux_init();
874 if (wl12xx_set_platform_data(&omap4_sdp4430_wlan_data)) 920 ret = wl12xx_set_platform_data(&omap4_sdp4430_wlan_data);
875 pr_err("Error setting wl12xx data\n"); 921 if (ret)
876 platform_device_register(&omap_vwlan_device); 922 pr_err("Error setting wl12xx data: %d\n", ret);
923 ret = platform_device_register(&omap_vwlan_device);
924 if (ret)
925 pr_err("Error registering wl12xx device: %d\n", ret);
877} 926}
878 927
879static void __init omap_4430sdp_init(void) 928static void __init omap_4430sdp_init(void)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 4b1cfe32e6ba..3645285a3e2b 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -39,124 +39,11 @@
39#include <video/omap-panel-generic-dpi.h> 39#include <video/omap-panel-generic-dpi.h>
40#include <video/omap-panel-dvi.h> 40#include <video/omap-panel-dvi.h>
41 41
42#include "am35xx-emac.h"
42#include "mux.h" 43#include "mux.h"
43#include "control.h" 44#include "control.h"
44#include "hsmmc.h" 45#include "hsmmc.h"
45 46
46#define AM35XX_EVM_MDIO_FREQUENCY (1000000)
47
48static struct mdio_platform_data am3517_evm_mdio_pdata = {
49 .bus_freq = AM35XX_EVM_MDIO_FREQUENCY,
50};
51
52static struct resource am3517_mdio_resources[] = {
53 {
54 .start = AM35XX_IPSS_EMAC_BASE + AM35XX_EMAC_MDIO_OFFSET,
55 .end = AM35XX_IPSS_EMAC_BASE + AM35XX_EMAC_MDIO_OFFSET +
56 SZ_4K - 1,
57 .flags = IORESOURCE_MEM,
58 },
59};
60
61static struct platform_device am3517_mdio_device = {
62 .name = "davinci_mdio",
63 .id = 0,
64 .num_resources = ARRAY_SIZE(am3517_mdio_resources),
65 .resource = am3517_mdio_resources,
66 .dev.platform_data = &am3517_evm_mdio_pdata,
67};
68
69static struct emac_platform_data am3517_evm_emac_pdata = {
70 .rmii_en = 1,
71};
72
73static struct resource am3517_emac_resources[] = {
74 {
75 .start = AM35XX_IPSS_EMAC_BASE,
76 .end = AM35XX_IPSS_EMAC_BASE + 0x2FFFF,
77 .flags = IORESOURCE_MEM,
78 },
79 {
80 .start = INT_35XX_EMAC_C0_RXTHRESH_IRQ,
81 .end = INT_35XX_EMAC_C0_RXTHRESH_IRQ,
82 .flags = IORESOURCE_IRQ,
83 },
84 {
85 .start = INT_35XX_EMAC_C0_RX_PULSE_IRQ,
86 .end = INT_35XX_EMAC_C0_RX_PULSE_IRQ,
87 .flags = IORESOURCE_IRQ,
88 },
89 {
90 .start = INT_35XX_EMAC_C0_TX_PULSE_IRQ,
91 .end = INT_35XX_EMAC_C0_TX_PULSE_IRQ,
92 .flags = IORESOURCE_IRQ,
93 },
94 {
95 .start = INT_35XX_EMAC_C0_MISC_PULSE_IRQ,
96 .end = INT_35XX_EMAC_C0_MISC_PULSE_IRQ,
97 .flags = IORESOURCE_IRQ,
98 },
99};
100
101static struct platform_device am3517_emac_device = {
102 .name = "davinci_emac",
103 .id = -1,
104 .num_resources = ARRAY_SIZE(am3517_emac_resources),
105 .resource = am3517_emac_resources,
106};
107
108static void am3517_enable_ethernet_int(void)
109{
110 u32 regval;
111
112 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
113 regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
114 AM35XX_CPGMAC_C0_TX_PULSE_CLR |
115 AM35XX_CPGMAC_C0_MISC_PULSE_CLR |
116 AM35XX_CPGMAC_C0_RX_THRESH_CLR);
117 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
118 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
119}
120
121static void am3517_disable_ethernet_int(void)
122{
123 u32 regval;
124
125 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
126 regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
127 AM35XX_CPGMAC_C0_TX_PULSE_CLR);
128 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
129 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
130}
131
132static void am3517_evm_ethernet_init(struct emac_platform_data *pdata)
133{
134 unsigned int regval;
135
136 pdata->ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET;
137 pdata->ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET;
138 pdata->ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET;
139 pdata->ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE;
140 pdata->version = EMAC_VERSION_2;
141 pdata->hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR;
142 pdata->interrupt_enable = am3517_enable_ethernet_int;
143 pdata->interrupt_disable = am3517_disable_ethernet_int;
144 am3517_emac_device.dev.platform_data = pdata;
145 platform_device_register(&am3517_emac_device);
146 platform_device_register(&am3517_mdio_device);
147 clk_add_alias(NULL, dev_name(&am3517_mdio_device.dev),
148 NULL, &am3517_emac_device.dev);
149
150 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
151 regval = regval & (~(AM35XX_CPGMACSS_SW_RST));
152 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
153 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
154
155 return ;
156}
157
158
159
160#define LCD_PANEL_PWR 176 47#define LCD_PANEL_PWR 176
161#define LCD_PANEL_BKLIGHT_PWR 182 48#define LCD_PANEL_BKLIGHT_PWR 182
162#define LCD_PANEL_PWM 181 49#define LCD_PANEL_PWM 181
@@ -498,13 +385,13 @@ static void __init am3517_evm_init(void)
498 i2c_register_board_info(1, am3517evm_i2c1_boardinfo, 385 i2c_register_board_info(1, am3517evm_i2c1_boardinfo,
499 ARRAY_SIZE(am3517evm_i2c1_boardinfo)); 386 ARRAY_SIZE(am3517evm_i2c1_boardinfo));
500 /*Ethernet*/ 387 /*Ethernet*/
501 am3517_evm_ethernet_init(&am3517_evm_emac_pdata); 388 am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1);
502 389
503 /* MUSB */ 390 /* MUSB */
504 am3517_evm_musb_init(); 391 am3517_evm_musb_init();
505 392
506 /* MMC init function */ 393 /* MMC init function */
507 omap2_hsmmc_init(mmc); 394 omap_hsmmc_init(mmc);
508} 395}
509 396
510MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") 397MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index e921e3be24a4..41b0a2fe0b04 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -280,7 +280,6 @@ static struct omap_dss_board_info cm_t35_dss_data = {
280 280
281static struct omap2_mcspi_device_config tdo24m_mcspi_config = { 281static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
282 .turbo_mode = 0, 282 .turbo_mode = 0,
283 .single_channel = 1, /* 0: slave, 1: master */
284}; 283};
285 284
286static struct tdo24m_platform_data tdo24m_config = { 285static struct tdo24m_platform_data tdo24m_config = {
@@ -413,7 +412,7 @@ static struct omap2_hsmmc_info mmc[] = {
413 .caps = MMC_CAP_4_BIT_DATA, 412 .caps = MMC_CAP_4_BIT_DATA,
414 .gpio_cd = -EINVAL, 413 .gpio_cd = -EINVAL,
415 .gpio_wp = -EINVAL, 414 .gpio_wp = -EINVAL,
416 415 .deferred = true,
417 }, 416 },
418 { 417 {
419 .mmc = 2, 418 .mmc = 2,
@@ -437,7 +436,7 @@ static struct usbhs_omap_board_data usbhs_bdata __initdata = {
437 .reset_gpio_port[2] = -EINVAL 436 .reset_gpio_port[2] = -EINVAL
438}; 437};
439 438
440static void cm_t35_init_usbh(void) 439static void __init cm_t35_init_usbh(void)
441{ 440{
442 int err; 441 int err;
443 442
@@ -471,7 +470,7 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
471 470
472 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 471 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
473 mmc[0].gpio_cd = gpio + 0; 472 mmc[0].gpio_cd = gpio + 0;
474 omap2_hsmmc_init(mmc); 473 omap_hsmmc_late_init(mmc);
475 474
476 return 0; 475 return 0;
477} 476}
@@ -639,6 +638,7 @@ static void __init cm_t3x_common_init(void)
639 omap_serial_init(); 638 omap_serial_init();
640 omap_sdrc_init(mt46h32m32lf6_sdrc_params, 639 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
641 mt46h32m32lf6_sdrc_params); 640 mt46h32m32lf6_sdrc_params);
641 omap_hsmmc_init(mmc);
642 cm_t35_init_i2c(); 642 cm_t35_init_i2c();
643 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL); 643 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
644 cm_t35_init_ethernet(); 644 cm_t35_init_ethernet();
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index f36d694d2159..9e66e167e4f3 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -49,6 +49,7 @@
49#include "mux.h" 49#include "mux.h"
50#include "control.h" 50#include "control.h"
51#include "common-board-devices.h" 51#include "common-board-devices.h"
52#include "am35xx-emac.h"
52 53
53#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) 54#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
54static struct gpio_led cm_t3517_leds[] = { 55static struct gpio_led cm_t3517_leds[] = {
@@ -291,6 +292,7 @@ static void __init cm_t3517_init(void)
291 cm_t3517_init_rtc(); 292 cm_t3517_init_rtc();
292 cm_t3517_init_usbh(); 293 cm_t3517_init_usbh();
293 cm_t3517_init_hecc(); 294 cm_t3517_init_hecc();
295 am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1);
294} 296}
295 297
296MACHINE_START(CM_T3517, "Compulab CM-T3517") 298MACHINE_START(CM_T3517, "Compulab CM-T3517")
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index e873063f4fda..11cd2a806093 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -100,6 +100,7 @@ static struct omap2_hsmmc_info mmc[] = {
100 .mmc = 1, 100 .mmc = 1,
101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
102 .gpio_wp = 29, 102 .gpio_wp = 29,
103 .deferred = true,
103 }, 104 },
104 {} /* Terminator */ 105 {} /* Terminator */
105}; 106};
@@ -228,7 +229,7 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
228 229
229 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 230 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
230 mmc[0].gpio_cd = gpio + 0; 231 mmc[0].gpio_cd = gpio + 0;
231 omap2_hsmmc_init(mmc); 232 omap_hsmmc_late_init(mmc);
232 233
233 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 234 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
234 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 235 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
@@ -636,6 +637,7 @@ static void __init devkit8000_init(void)
636 637
637 omap_dm9000_init(); 638 omap_dm9000_init();
638 639
640 omap_hsmmc_init(mmc);
639 devkit8000_i2c_init(); 641 devkit8000_i2c_init();
640 platform_add_devices(devkit8000_devices, 642 platform_add_devices(devkit8000_devices,
641 ARRAY_SIZE(devkit8000_devices)); 643 ARRAY_SIZE(devkit8000_devices));
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 30a6f527510c..0349fd2b68d8 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -189,7 +189,7 @@ unmap:
189 * 189 *
190 * @return - void. 190 * @return - void.
191 */ 191 */
192void board_flash_init(struct flash_partitions partition_info[], 192void __init board_flash_init(struct flash_partitions partition_info[],
193 char chip_sel_board[][GPMC_CS_NUM], int nand_type) 193 char chip_sel_board[][GPMC_CS_NUM], int nand_type)
194{ 194{
195 u8 cs = 0; 195 u8 cs = 0;
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index d58756060483..74e1687b5170 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -12,44 +12,36 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/of_irq.h>
15#include <linux/of_platform.h> 16#include <linux/of_platform.h>
16#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
17#include <linux/i2c/twl.h> 18#include <linux/i2c/twl.h>
18 19
19#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <asm/hardware/gic.h>
20#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
21 23
22#include <plat/board.h> 24#include <plat/board.h>
23#include "common.h" 25#include "common.h"
24#include "common-board-devices.h" 26#include "common-board-devices.h"
25 27
26/* 28#if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3))
27 * XXX: Still needed to boot until the i2c & twl driver is adapted to 29#define omap_intc_of_init NULL
28 * device-tree 30#endif
29 */ 31#ifndef CONFIG_ARCH_OMAP4
30#ifdef CONFIG_ARCH_OMAP4 32#define gic_of_init NULL
31static struct twl4030_platform_data sdp4430_twldata = {
32 .irq_base = TWL6030_IRQ_BASE,
33 .irq_end = TWL6030_IRQ_END,
34};
35
36static void __init omap4_i2c_init(void)
37{
38 omap4_pmic_init("twl6030", &sdp4430_twldata);
39}
40#endif 33#endif
41 34
42#ifdef CONFIG_ARCH_OMAP3 35static struct of_device_id irq_match[] __initdata = {
43static struct twl4030_platform_data beagle_twldata = { 36 { .compatible = "ti,omap2-intc", .data = omap_intc_of_init, },
44 .irq_base = TWL4030_IRQ_BASE, 37 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
45 .irq_end = TWL4030_IRQ_END, 38 { }
46}; 39};
47 40
48static void __init omap3_i2c_init(void) 41static void __init omap_init_irq(void)
49{ 42{
50 omap3_pmic_init("twl4030", &beagle_twldata); 43 of_irq_init(irq_match);
51} 44}
52#endif
53 45
54static struct of_device_id omap_dt_match_table[] __initdata = { 46static struct of_device_id omap_dt_match_table[] __initdata = {
55 { .compatible = "simple-bus", }, 47 { .compatible = "simple-bus", },
@@ -57,51 +49,25 @@ static struct of_device_id omap_dt_match_table[] __initdata = {
57 { } 49 { }
58}; 50};
59 51
60static struct of_device_id intc_match[] __initdata = {
61 { .compatible = "ti,omap3-intc", },
62 { .compatible = "arm,cortex-a9-gic", },
63 { }
64};
65
66static void __init omap_generic_init(void) 52static void __init omap_generic_init(void)
67{ 53{
68 struct device_node *node = of_find_matching_node(NULL, intc_match);
69 if (node)
70 irq_domain_add_simple(node, 0);
71
72 omap_sdrc_init(NULL, NULL); 54 omap_sdrc_init(NULL, NULL);
73 55
74 of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); 56 of_platform_populate(NULL, omap_dt_match_table, NULL, NULL);
75} 57}
76 58
77#ifdef CONFIG_ARCH_OMAP4 59#ifdef CONFIG_SOC_OMAP2420
78static void __init omap4_init(void)
79{
80 omap4_i2c_init();
81 omap_generic_init();
82}
83#endif
84
85#ifdef CONFIG_ARCH_OMAP3
86static void __init omap3_init(void)
87{
88 omap3_i2c_init();
89 omap_generic_init();
90}
91#endif
92
93#if defined(CONFIG_SOC_OMAP2420)
94static const char *omap242x_boards_compat[] __initdata = { 60static const char *omap242x_boards_compat[] __initdata = {
95 "ti,omap2420", 61 "ti,omap2420",
96 NULL, 62 NULL,
97}; 63};
98 64
99DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") 65DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
100 .atag_offset = 0x100,
101 .reserve = omap_reserve, 66 .reserve = omap_reserve,
102 .map_io = omap242x_map_io, 67 .map_io = omap242x_map_io,
103 .init_early = omap2420_init_early, 68 .init_early = omap2420_init_early,
104 .init_irq = omap2_init_irq, 69 .init_irq = omap_init_irq,
70 .handle_irq = omap2_intc_handle_irq,
105 .init_machine = omap_generic_init, 71 .init_machine = omap_generic_init,
106 .timer = &omap2_timer, 72 .timer = &omap2_timer,
107 .dt_compat = omap242x_boards_compat, 73 .dt_compat = omap242x_boards_compat,
@@ -109,18 +75,17 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
109MACHINE_END 75MACHINE_END
110#endif 76#endif
111 77
112#if defined(CONFIG_SOC_OMAP2430) 78#ifdef CONFIG_SOC_OMAP2430
113static const char *omap243x_boards_compat[] __initdata = { 79static const char *omap243x_boards_compat[] __initdata = {
114 "ti,omap2430", 80 "ti,omap2430",
115 NULL, 81 NULL,
116}; 82};
117 83
118DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") 84DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
119 .atag_offset = 0x100,
120 .reserve = omap_reserve, 85 .reserve = omap_reserve,
121 .map_io = omap243x_map_io, 86 .map_io = omap243x_map_io,
122 .init_early = omap2430_init_early, 87 .init_early = omap2430_init_early,
123 .init_irq = omap2_init_irq, 88 .init_irq = omap_init_irq,
124 .handle_irq = omap2_intc_handle_irq, 89 .handle_irq = omap2_intc_handle_irq,
125 .init_machine = omap_generic_init, 90 .init_machine = omap_generic_init,
126 .timer = &omap2_timer, 91 .timer = &omap2_timer,
@@ -129,18 +94,34 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
129MACHINE_END 94MACHINE_END
130#endif 95#endif
131 96
132#if defined(CONFIG_ARCH_OMAP3) 97#ifdef CONFIG_ARCH_OMAP3
98static struct twl4030_platform_data beagle_twldata = {
99 .irq_base = TWL4030_IRQ_BASE,
100 .irq_end = TWL4030_IRQ_END,
101};
102
103static void __init omap3_i2c_init(void)
104{
105 omap3_pmic_init("twl4030", &beagle_twldata);
106}
107
108static void __init omap3_init(void)
109{
110 omap3_i2c_init();
111 omap_generic_init();
112}
113
133static const char *omap3_boards_compat[] __initdata = { 114static const char *omap3_boards_compat[] __initdata = {
134 "ti,omap3", 115 "ti,omap3",
135 NULL, 116 NULL,
136}; 117};
137 118
138DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") 119DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
139 .atag_offset = 0x100,
140 .reserve = omap_reserve, 120 .reserve = omap_reserve,
141 .map_io = omap3_map_io, 121 .map_io = omap3_map_io,
142 .init_early = omap3430_init_early, 122 .init_early = omap3430_init_early,
143 .init_irq = omap3_init_irq, 123 .init_irq = omap_init_irq,
124 .handle_irq = omap3_intc_handle_irq,
144 .init_machine = omap3_init, 125 .init_machine = omap3_init,
145 .timer = &omap3_timer, 126 .timer = &omap3_timer,
146 .dt_compat = omap3_boards_compat, 127 .dt_compat = omap3_boards_compat,
@@ -148,18 +129,34 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
148MACHINE_END 129MACHINE_END
149#endif 130#endif
150 131
151#if defined(CONFIG_ARCH_OMAP4) 132#ifdef CONFIG_ARCH_OMAP4
133static struct twl4030_platform_data sdp4430_twldata = {
134 .irq_base = TWL6030_IRQ_BASE,
135 .irq_end = TWL6030_IRQ_END,
136};
137
138static void __init omap4_i2c_init(void)
139{
140 omap4_pmic_init("twl6030", &sdp4430_twldata);
141}
142
143static void __init omap4_init(void)
144{
145 omap4_i2c_init();
146 omap_generic_init();
147}
148
152static const char *omap4_boards_compat[] __initdata = { 149static const char *omap4_boards_compat[] __initdata = {
153 "ti,omap4", 150 "ti,omap4",
154 NULL, 151 NULL,
155}; 152};
156 153
157DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") 154DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
158 .atag_offset = 0x100,
159 .reserve = omap_reserve, 155 .reserve = omap_reserve,
160 .map_io = omap4_map_io, 156 .map_io = omap4_map_io,
161 .init_early = omap4430_init_early, 157 .init_early = omap4430_init_early,
162 .init_irq = gic_init_irq, 158 .init_irq = omap_init_irq,
159 .handle_irq = gic_handle_irq,
163 .init_machine = omap4_init, 160 .init_machine = omap4_init,
164 .timer = &omap4_timer, 161 .timer = &omap4_timer,
165 .dt_compat = omap4_boards_compat, 162 .dt_compat = omap4_boards_compat,
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index a59ace0ed560..e558800adfdf 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -295,6 +295,7 @@ static struct omap2_hsmmc_info mmc[] = {
295 .caps = MMC_CAP_4_BIT_DATA, 295 .caps = MMC_CAP_4_BIT_DATA,
296 .gpio_cd = -EINVAL, 296 .gpio_cd = -EINVAL,
297 .gpio_wp = -EINVAL, 297 .gpio_wp = -EINVAL,
298 .deferred = true,
298 }, 299 },
299#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) 300#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
300 { 301 {
@@ -402,7 +403,7 @@ static int igep_twl_gpio_setup(struct device *dev,
402 403
403 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 404 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
404 mmc[0].gpio_cd = gpio + 0; 405 mmc[0].gpio_cd = gpio + 0;
405 omap2_hsmmc_init(mmc); 406 omap_hsmmc_late_init(mmc);
406 407
407 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ 408 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
408#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE) 409#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE)
@@ -639,6 +640,9 @@ static void __init igep_init(void)
639 640
640 /* Get IGEP2 hardware revision */ 641 /* Get IGEP2 hardware revision */
641 igep2_get_revision(); 642 igep2_get_revision();
643
644 omap_hsmmc_init(mmc);
645
642 /* Register I2C busses and drivers */ 646 /* Register I2C busses and drivers */
643 igep_i2c_init(); 647 igep_i2c_init();
644 platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices)); 648 platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices));
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 2d2a61f7dcbf..d50a562adfa0 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -27,7 +27,6 @@
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/smsc911x.h> 28#include <linux/smsc911x.h>
29#include <linux/mmc/host.h> 29#include <linux/mmc/host.h>
30#include <linux/gpio.h>
31 30
32#include <mach/hardware.h> 31#include <mach/hardware.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
@@ -424,7 +423,7 @@ static void __init omap_ldp_init(void)
424 board_nand_init(ldp_nand_partitions, 423 board_nand_init(ldp_nand_partitions,
425 ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); 424 ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
426 425
427 omap2_hsmmc_init(mmc); 426 omap_hsmmc_init(mmc);
428 ldp_display_init(); 427 ldp_display_init();
429} 428}
430 429
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 42a4d11fad23..518091c5f77c 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -36,10 +36,6 @@
36 36
37#include "mux.h" 37#include "mux.h"
38 38
39static int slot1_cover_open;
40static int slot2_cover_open;
41static struct device *mmc_device;
42
43#define TUSB6010_ASYNC_CS 1 39#define TUSB6010_ASYNC_CS 1
44#define TUSB6010_SYNC_CS 4 40#define TUSB6010_SYNC_CS 4
45#define TUSB6010_GPIO_INT 58 41#define TUSB6010_GPIO_INT 58
@@ -137,7 +133,6 @@ static void __init n8x0_usb_init(void) {}
137 133
138static struct omap2_mcspi_device_config p54spi_mcspi_config = { 134static struct omap2_mcspi_device_config p54spi_mcspi_config = {
139 .turbo_mode = 0, 135 .turbo_mode = 0,
140 .single_channel = 1,
141}; 136};
142 137
143static struct spi_board_info n800_spi_board_info[] __initdata = { 138static struct spi_board_info n800_spi_board_info[] __initdata = {
@@ -211,6 +206,10 @@ static struct omap_onenand_platform_data board_onenand_data[] = {
211#define N810_EMMC_VSD_GPIO 23 206#define N810_EMMC_VSD_GPIO 23
212#define N810_EMMC_VIO_GPIO 9 207#define N810_EMMC_VIO_GPIO 9
213 208
209static int slot1_cover_open;
210static int slot2_cover_open;
211static struct device *mmc_device;
212
214static int n8x0_mmc_switch_slot(struct device *dev, int slot) 213static int n8x0_mmc_switch_slot(struct device *dev, int slot)
215{ 214{
216#ifdef CONFIG_MMC_DEBUG 215#ifdef CONFIG_MMC_DEBUG
@@ -371,7 +370,11 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
371 else 370 else
372 *openp = 0; 371 *openp = 0;
373 372
373#ifdef CONFIG_MMC_OMAP
374 omap_mmc_notify_cover_event(mmc_device, index, *openp); 374 omap_mmc_notify_cover_event(mmc_device, index, *openp);
375#else
376 pr_warn("MMC: notify cover event not available\n");
377#endif
375} 378}
376 379
377static int n8x0_mmc_late_init(struct device *dev) 380static int n8x0_mmc_late_init(struct device *dev)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 7ffcd2839e7b..7be8d659d91d 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -253,6 +253,7 @@ static struct omap2_hsmmc_info mmc[] = {
253 .mmc = 1, 253 .mmc = 1,
254 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 254 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
255 .gpio_wp = -EINVAL, 255 .gpio_wp = -EINVAL,
256 .deferred = true,
256 }, 257 },
257 {} /* Terminator */ 258 {} /* Terminator */
258}; 259};
@@ -272,12 +273,10 @@ static int beagle_twl_gpio_setup(struct device *dev,
272{ 273{
273 int r; 274 int r;
274 275
275 if (beagle_config.mmc1_gpio_wp != -EINVAL)
276 omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
277 mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; 276 mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp;
278 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 277 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
279 mmc[0].gpio_cd = gpio + 0; 278 mmc[0].gpio_cd = gpio + 0;
280 omap2_hsmmc_init(mmc); 279 omap_hsmmc_late_init(mmc);
281 280
282 /* 281 /*
283 * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active 282 * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active
@@ -521,6 +520,11 @@ static void __init omap3_beagle_init(void)
521{ 520{
522 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 521 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
523 omap3_beagle_init_rev(); 522 omap3_beagle_init_rev();
523
524 if (beagle_config.mmc1_gpio_wp != -EINVAL)
525 omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
526 omap_hsmmc_init(mmc);
527
524 omap3_beagle_i2c_init(); 528 omap3_beagle_i2c_init();
525 529
526 gpio_buttons[0].gpio = beagle_config.usr_button_gpio; 530 gpio_buttons[0].gpio = beagle_config.usr_button_gpio;
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 003fe34c9343..a659e198892b 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -317,6 +317,7 @@ static struct omap2_hsmmc_info mmc[] = {
317 .caps = MMC_CAP_4_BIT_DATA, 317 .caps = MMC_CAP_4_BIT_DATA,
318 .gpio_cd = -EINVAL, 318 .gpio_cd = -EINVAL,
319 .gpio_wp = 63, 319 .gpio_wp = 63,
320 .deferred = true,
320 }, 321 },
321#ifdef CONFIG_WL12XX_PLATFORM_DATA 322#ifdef CONFIG_WL12XX_PLATFORM_DATA
322 { 323 {
@@ -361,9 +362,8 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
361 int r, lcd_bl_en; 362 int r, lcd_bl_en;
362 363
363 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 364 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
364 omap_mux_init_gpio(63, OMAP_PIN_INPUT);
365 mmc[0].gpio_cd = gpio + 0; 365 mmc[0].gpio_cd = gpio + 0;
366 omap2_hsmmc_init(mmc); 366 omap_hsmmc_late_init(mmc);
367 367
368 /* 368 /*
369 * Most GPIOs are for USB OTG. Some are mostly sent to 369 * Most GPIOs are for USB OTG. Some are mostly sent to
@@ -381,7 +381,7 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
381 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI"); 381 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
382 382
383 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ 383 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
384 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 384 gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
385 385
386 platform_device_register(&leds_gpio); 386 platform_device_register(&leds_gpio);
387 387
@@ -617,6 +617,21 @@ static struct gpio omap3_evm_ehci_gpios[] __initdata = {
617 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" }, 617 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
618}; 618};
619 619
620static void __init omap3_evm_wl12xx_init(void)
621{
622#ifdef CONFIG_WL12XX_PLATFORM_DATA
623 int ret;
624
625 /* WL12xx WLAN Init */
626 ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
627 if (ret)
628 pr_err("error setting wl12xx data: %d\n", ret);
629 ret = platform_device_register(&omap3evm_wlan_regulator);
630 if (ret)
631 pr_err("error registering wl12xx device: %d\n", ret);
632#endif
633}
634
620static void __init omap3_evm_init(void) 635static void __init omap3_evm_init(void)
621{ 636{
622 omap3_evm_get_revision(); 637 omap3_evm_get_revision();
@@ -629,6 +644,9 @@ static void __init omap3_evm_init(void)
629 omap_board_config = omap3_evm_config; 644 omap_board_config = omap3_evm_config;
630 omap_board_config_size = ARRAY_SIZE(omap3_evm_config); 645 omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
631 646
647 omap_mux_init_gpio(63, OMAP_PIN_INPUT);
648 omap_hsmmc_init(mmc);
649
632 omap3_evm_i2c_init(); 650 omap3_evm_i2c_init();
633 651
634 omap_display_init(&omap3_evm_dss_data); 652 omap_display_init(&omap3_evm_dss_data);
@@ -665,13 +683,7 @@ static void __init omap3_evm_init(void)
665 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL); 683 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
666 omap3evm_init_smsc911x(); 684 omap3evm_init_smsc911x();
667 omap3_evm_display_init(); 685 omap3_evm_display_init();
668 686 omap3_evm_wl12xx_init();
669#ifdef CONFIG_WL12XX_PLATFORM_DATA
670 /* WL12xx WLAN Init */
671 if (wl12xx_set_platform_data(&omap3evm_wlan_data))
672 pr_err("error setting wl12xx data\n");
673 platform_device_register(&omap3evm_wlan_regulator);
674#endif
675} 687}
676 688
677MACHINE_START(OMAP3EVM, "OMAP3 EVM") 689MACHINE_START(OMAP3EVM, "OMAP3 EVM")
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 4198dd017d8f..4a7d8c8a75da 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -128,7 +128,7 @@ static void __init board_mmc_init(void)
128 return; 128 return;
129 } 129 }
130 130
131 omap2_hsmmc_init(board_mmc_info); 131 omap_hsmmc_init(board_mmc_info);
132} 132}
133 133
134static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = { 134static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = {
@@ -205,6 +205,7 @@ static void __init omap3logic_init(void)
205 205
206MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") 206MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
207 .atag_offset = 0x100, 207 .atag_offset = 0x100,
208 .reserve = omap_reserve,
208 .map_io = omap3_map_io, 209 .map_io = omap3_map_io,
209 .init_early = omap35xx_init_early, 210 .init_early = omap35xx_init_early,
210 .init_irq = omap3_init_irq, 211 .init_irq = omap3_init_irq,
@@ -216,6 +217,7 @@ MACHINE_END
216 217
217MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") 218MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
218 .atag_offset = 0x100, 219 .atag_offset = 0x100,
220 .reserve = omap_reserve,
219 .map_io = omap3_map_io, 221 .map_io = omap3_map_io,
220 .init_early = omap35xx_init_early, 222 .init_early = omap35xx_init_early,
221 .init_irq = omap3_init_irq, 223 .init_irq = omap3_init_irq,
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 1644b73017fc..33d995d0f075 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -121,6 +121,11 @@ static struct platform_device pandora_leds_gpio = {
121 }, 121 },
122}; 122};
123 123
124static struct platform_device pandora_backlight = {
125 .name = "pandora-backlight",
126 .id = -1,
127};
128
124#define GPIO_BUTTON(gpio_num, ev_type, ev_code, act_low, descr) \ 129#define GPIO_BUTTON(gpio_num, ev_type, ev_code, act_low, descr) \
125{ \ 130{ \
126 .gpio = gpio_num, \ 131 .gpio = gpio_num, \
@@ -273,6 +278,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = {
273 .gpio_cd = -EINVAL, 278 .gpio_cd = -EINVAL,
274 .gpio_wp = 126, 279 .gpio_wp = 126,
275 .ext_clock = 0, 280 .ext_clock = 0,
281 .deferred = true,
276 }, 282 },
277 { 283 {
278 .mmc = 2, 284 .mmc = 2,
@@ -281,6 +287,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = {
281 .gpio_wp = 127, 287 .gpio_wp = 127,
282 .ext_clock = 1, 288 .ext_clock = 1,
283 .transceiver = true, 289 .transceiver = true,
290 .deferred = true,
284 }, 291 },
285 { 292 {
286 .mmc = 3, 293 .mmc = 3,
@@ -300,7 +307,7 @@ static int omap3pandora_twl_gpio_setup(struct device *dev,
300 /* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */ 307 /* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */
301 omap3pandora_mmc[0].gpio_cd = gpio + 0; 308 omap3pandora_mmc[0].gpio_cd = gpio + 0;
302 omap3pandora_mmc[1].gpio_cd = gpio + 1; 309 omap3pandora_mmc[1].gpio_cd = gpio + 1;
303 omap2_hsmmc_init(omap3pandora_mmc); 310 omap_hsmmc_late_init(omap3pandora_mmc);
304 311
305 /* gpio + 13 drives 32kHz buffer for wifi module */ 312 /* gpio + 13 drives 32kHz buffer for wifi module */
306 gpio_32khz = gpio + 13; 313 gpio_32khz = gpio + 13;
@@ -343,7 +350,7 @@ static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = {
343}; 350};
344 351
345static struct regulator_consumer_supply pandora_usb_phy_supply[] = { 352static struct regulator_consumer_supply pandora_usb_phy_supply[] = {
346 REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"), 353 REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"),
347}; 354};
348 355
349/* ads7846 on SPI and 2 nub controllers on I2C */ 356/* ads7846 on SPI and 2 nub controllers on I2C */
@@ -476,6 +483,10 @@ static struct platform_device pandora_vwlan_device = {
476 483
477static struct twl4030_bci_platform_data pandora_bci_data; 484static struct twl4030_bci_platform_data pandora_bci_data;
478 485
486static struct twl4030_power_data pandora_power_data = {
487 .use_poweroff = true,
488};
489
479static struct twl4030_platform_data omap3pandora_twldata = { 490static struct twl4030_platform_data omap3pandora_twldata = {
480 .gpio = &omap3pandora_gpio_data, 491 .gpio = &omap3pandora_gpio_data,
481 .vmmc1 = &pandora_vmmc1, 492 .vmmc1 = &pandora_vmmc1,
@@ -486,6 +497,7 @@ static struct twl4030_platform_data omap3pandora_twldata = {
486 .vsim = &pandora_vsim, 497 .vsim = &pandora_vsim,
487 .keypad = &pandora_kp_data, 498 .keypad = &pandora_kp_data,
488 .bci = &pandora_bci_data, 499 .bci = &pandora_bci_data,
500 .power = &pandora_power_data,
489}; 501};
490 502
491static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { 503static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = {
@@ -557,17 +569,18 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
557 &pandora_leds_gpio, 569 &pandora_leds_gpio,
558 &pandora_keys_gpio, 570 &pandora_keys_gpio,
559 &pandora_vwlan_device, 571 &pandora_vwlan_device,
572 &pandora_backlight,
560}; 573};
561 574
562static const struct usbhs_omap_board_data usbhs_bdata __initconst = { 575static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
563 576
564 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 577 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
565 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, 578 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
566 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, 579 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
567 580
568 .phy_reset = true, 581 .phy_reset = true,
569 .reset_gpio_port[0] = 16, 582 .reset_gpio_port[0] = -EINVAL,
570 .reset_gpio_port[1] = -EINVAL, 583 .reset_gpio_port[1] = 16,
571 .reset_gpio_port[2] = -EINVAL 584 .reset_gpio_port[2] = -EINVAL
572}; 585};
573 586
@@ -580,6 +593,7 @@ static struct omap_board_mux board_mux[] __initdata = {
580static void __init omap3pandora_init(void) 593static void __init omap3pandora_init(void)
581{ 594{
582 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 595 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
596 omap_hsmmc_init(omap3pandora_mmc);
583 omap3pandora_i2c_init(); 597 omap3pandora_i2c_init();
584 pandora_wl1251_init(); 598 pandora_wl1251_init();
585 platform_add_devices(omap3pandora_devices, 599 platform_add_devices(omap3pandora_devices,
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index cb089a46f62f..641004380795 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -209,10 +209,11 @@ static struct regulator_init_data omap3stalker_vsim = {
209 209
210static struct omap2_hsmmc_info mmc[] = { 210static struct omap2_hsmmc_info mmc[] = {
211 { 211 {
212 .mmc = 1, 212 .mmc = 1,
213 .caps = MMC_CAP_4_BIT_DATA, 213 .caps = MMC_CAP_4_BIT_DATA,
214 .gpio_cd = -EINVAL, 214 .gpio_cd = -EINVAL,
215 .gpio_wp = 23, 215 .gpio_wp = 23,
216 .deferred = true,
216 }, 217 },
217 {} /* Terminator */ 218 {} /* Terminator */
218}; 219};
@@ -282,9 +283,8 @@ omap3stalker_twl_gpio_setup(struct device *dev,
282 unsigned gpio, unsigned ngpio) 283 unsigned gpio, unsigned ngpio)
283{ 284{
284 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 285 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
285 omap_mux_init_gpio(23, OMAP_PIN_INPUT);
286 mmc[0].gpio_cd = gpio + 0; 286 mmc[0].gpio_cd = gpio + 0;
287 omap2_hsmmc_init(mmc); 287 omap_hsmmc_late_init(mmc);
288 288
289 /* 289 /*
290 * Most GPIOs are for USB OTG. Some are mostly sent to 290 * Most GPIOs are for USB OTG. Some are mostly sent to
@@ -425,6 +425,9 @@ static void __init omap3_stalker_init(void)
425 omap_board_config = omap3_stalker_config; 425 omap_board_config = omap3_stalker_config;
426 omap_board_config_size = ARRAY_SIZE(omap3_stalker_config); 426 omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
427 427
428 omap_mux_init_gpio(23, OMAP_PIN_INPUT);
429 omap_hsmmc_init(mmc);
430
428 omap3_stalker_i2c_init(); 431 omap3_stalker_i2c_init();
429 432
430 platform_add_devices(omap3_stalker_devices, 433 platform_add_devices(omap3_stalker_devices,
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index a0b851aafcca..8842e04aef01 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -100,6 +100,7 @@ static struct omap2_hsmmc_info mmc[] = {
100 .mmc = 1, 100 .mmc = 1,
101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
102 .gpio_wp = 29, 102 .gpio_wp = 29,
103 .deferred = true,
103 }, 104 },
104 {} /* Terminator */ 105 {} /* Terminator */
105}; 106};
@@ -117,15 +118,9 @@ static struct gpio_led gpio_leds[];
117static int touchbook_twl_gpio_setup(struct device *dev, 118static int touchbook_twl_gpio_setup(struct device *dev,
118 unsigned gpio, unsigned ngpio) 119 unsigned gpio, unsigned ngpio)
119{ 120{
120 if (system_rev >= 0x20 && system_rev <= 0x34301000) {
121 omap_mux_init_gpio(23, OMAP_PIN_INPUT);
122 mmc[0].gpio_wp = 23;
123 } else {
124 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
125 }
126 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 121 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
127 mmc[0].gpio_cd = gpio + 0; 122 mmc[0].gpio_cd = gpio + 0;
128 omap2_hsmmc_init(mmc); 123 omap_hsmmc_late_init(mmc);
129 124
130 /* REVISIT: need ehci-omap hooks for external VBUS 125 /* REVISIT: need ehci-omap hooks for external VBUS
131 * power switch and overcurrent detect 126 * power switch and overcurrent detect
@@ -351,6 +346,14 @@ static void __init omap3_touchbook_init(void)
351 346
352 pm_power_off = omap3_touchbook_poweroff; 347 pm_power_off = omap3_touchbook_poweroff;
353 348
349 if (system_rev >= 0x20 && system_rev <= 0x34301000) {
350 omap_mux_init_gpio(23, OMAP_PIN_INPUT);
351 mmc[0].gpio_wp = 23;
352 } else {
353 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
354 }
355 omap_hsmmc_init(mmc);
356
354 omap3_touchbook_i2c_init(); 357 omap3_touchbook_i2c_init();
355 platform_add_devices(omap3_touchbook_devices, 358 platform_add_devices(omap3_touchbook_devices,
356 ARRAY_SIZE(omap3_touchbook_devices)); 359 ARRAY_SIZE(omap3_touchbook_devices));
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 30ad40db2cf3..8bf8e99c358e 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -28,6 +28,7 @@
28#include <linux/regulator/machine.h> 28#include <linux/regulator/machine.h>
29#include <linux/regulator/fixed.h> 29#include <linux/regulator/fixed.h>
30#include <linux/wl12xx.h> 30#include <linux/wl12xx.h>
31#include <linux/platform_data/omap-abe-twl6040.h>
31 32
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/hardware/gic.h> 34#include <asm/hardware/gic.h>
@@ -51,8 +52,9 @@
51#define GPIO_HUB_NRESET 62 52#define GPIO_HUB_NRESET 62
52#define GPIO_WIFI_PMENA 43 53#define GPIO_WIFI_PMENA 43
53#define GPIO_WIFI_IRQ 53 54#define GPIO_WIFI_IRQ 53
54#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */ 55#define HDMI_GPIO_CT_CP_HPD 60 /* HPD mode enable/disable */
55#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */ 56#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
57#define HDMI_GPIO_HPD 63 /* Hotplug detect */
56 58
57/* wl127x BT, FM, GPS connectivity chip */ 59/* wl127x BT, FM, GPS connectivity chip */
58static int wl1271_gpios[] = {46, -1, -1}; 60static int wl1271_gpios[] = {46, -1, -1};
@@ -90,9 +92,40 @@ static struct platform_device leds_gpio = {
90 }, 92 },
91}; 93};
92 94
95static struct omap_abe_twl6040_data panda_abe_audio_data = {
96 /* Audio out */
97 .has_hs = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
98 /* HandsFree through expasion connector */
99 .has_hf = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
100 /* PandaBoard: FM TX, PandaBoardES: can be connected to audio out */
101 .has_aux = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
102 /* PandaBoard: FM RX, PandaBoardES: audio in */
103 .has_afm = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
104 /* No jack detection. */
105 .jack_detection = 0,
106 /* MCLK input is 38.4MHz */
107 .mclk_freq = 38400000,
108
109};
110
111static struct platform_device panda_abe_audio = {
112 .name = "omap-abe-twl6040",
113 .id = -1,
114 .dev = {
115 .platform_data = &panda_abe_audio_data,
116 },
117};
118
119static struct platform_device btwilink_device = {
120 .name = "btwilink",
121 .id = -1,
122};
123
93static struct platform_device *panda_devices[] __initdata = { 124static struct platform_device *panda_devices[] __initdata = {
94 &leds_gpio, 125 &leds_gpio,
95 &wl1271_device, 126 &wl1271_device,
127 &panda_abe_audio,
128 &btwilink_device,
96}; 129};
97 130
98static const struct usbhs_omap_board_data usbhs_bdata __initconst = { 131static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
@@ -205,7 +238,7 @@ struct wl12xx_platform_data omap_panda_wlan_data __initdata = {
205 238
206static int omap4_twl6030_hsmmc_late_init(struct device *dev) 239static int omap4_twl6030_hsmmc_late_init(struct device *dev)
207{ 240{
208 int ret = 0; 241 int irq = 0;
209 struct platform_device *pdev = container_of(dev, 242 struct platform_device *pdev = container_of(dev,
210 struct platform_device, dev); 243 struct platform_device, dev);
211 struct omap_mmc_platform_data *pdata = dev->platform_data; 244 struct omap_mmc_platform_data *pdata = dev->platform_data;
@@ -216,14 +249,15 @@ static int omap4_twl6030_hsmmc_late_init(struct device *dev)
216 } 249 }
217 /* Setting MMC1 Card detect Irq */ 250 /* Setting MMC1 Card detect Irq */
218 if (pdev->id == 0) { 251 if (pdev->id == 0) {
219 ret = twl6030_mmc_card_detect_config(); 252 irq = twl6030_mmc_card_detect_config();
220 if (ret) 253 if (irq < 0) {
221 dev_err(dev, "%s: Error card detect config(%d)\n", 254 dev_err(dev, "%s: Error card detect config(%d)\n",
222 __func__, ret); 255 __func__, irq);
223 else 256 return irq;
224 pdata->slots[0].card_detect = twl6030_mmc_card_detect; 257 }
258 pdata->slots[0].card_detect = twl6030_mmc_card_detect;
225 } 259 }
226 return ret; 260 return 0;
227} 261}
228 262
229static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev) 263static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
@@ -244,15 +278,32 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
244{ 278{
245 struct omap2_hsmmc_info *c; 279 struct omap2_hsmmc_info *c;
246 280
247 omap2_hsmmc_init(controllers); 281 omap_hsmmc_init(controllers);
248 for (c = controllers; c->mmc; c++) 282 for (c = controllers; c->mmc; c++)
249 omap4_twl6030_hsmmc_set_late_init(c->dev); 283 omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev);
250 284
251 return 0; 285 return 0;
252} 286}
253 287
288static struct twl4030_codec_data twl6040_codec = {
289 /* single-step ramp for headset and handsfree */
290 .hs_left_step = 0x0f,
291 .hs_right_step = 0x0f,
292 .hf_left_step = 0x1d,
293 .hf_right_step = 0x1d,
294};
295
296static struct twl4030_audio_data twl6040_audio = {
297 .codec = &twl6040_codec,
298 .audpwron_gpio = 127,
299 .naudint_irq = OMAP44XX_IRQ_SYS_2N,
300 .irq_base = TWL6040_CODEC_IRQ_BASE,
301};
302
254/* Panda board uses the common PMIC configuration */ 303/* Panda board uses the common PMIC configuration */
255static struct twl4030_platform_data omap4_panda_twldata; 304static struct twl4030_platform_data omap4_panda_twldata = {
305 .audio = &twl6040_audio,
306};
256 307
257/* 308/*
258 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM 309 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
@@ -413,8 +464,9 @@ int __init omap4_panda_dvi_init(void)
413} 464}
414 465
415static struct gpio panda_hdmi_gpios[] = { 466static struct gpio panda_hdmi_gpios[] = {
416 { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" }, 467 { HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" },
417 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" }, 468 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" },
469 { HDMI_GPIO_HPD, GPIOF_DIR_IN, "hdmi_gpio_hpd" },
418}; 470};
419 471
420static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev) 472static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
@@ -431,10 +483,13 @@ static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
431 483
432static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev) 484static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev)
433{ 485{
434 gpio_free(HDMI_GPIO_LS_OE); 486 gpio_free_array(panda_hdmi_gpios, ARRAY_SIZE(panda_hdmi_gpios));
435 gpio_free(HDMI_GPIO_HPD);
436} 487}
437 488
489static struct omap_dss_hdmi_data omap4_panda_hdmi_data = {
490 .hpd_gpio = HDMI_GPIO_HPD,
491};
492
438static struct omap_dss_device omap4_panda_hdmi_device = { 493static struct omap_dss_device omap4_panda_hdmi_device = {
439 .name = "hdmi", 494 .name = "hdmi",
440 .driver_name = "hdmi_panel", 495 .driver_name = "hdmi_panel",
@@ -442,6 +497,7 @@ static struct omap_dss_device omap4_panda_hdmi_device = {
442 .platform_enable = omap4_panda_panel_enable_hdmi, 497 .platform_enable = omap4_panda_panel_enable_hdmi,
443 .platform_disable = omap4_panda_panel_disable_hdmi, 498 .platform_disable = omap4_panda_panel_disable_hdmi,
444 .channel = OMAP_DSS_CHANNEL_DIGIT, 499 .channel = OMAP_DSS_CHANNEL_DIGIT,
500 .data = &omap4_panda_hdmi_data,
445}; 501};
446 502
447static struct omap_dss_device *omap4_panda_dss_devices[] = { 503static struct omap_dss_device *omap4_panda_dss_devices[] = {
@@ -455,7 +511,7 @@ static struct omap_dss_board_info omap4_panda_dss_data = {
455 .default_device = &omap4_panda_dvi_device, 511 .default_device = &omap4_panda_dvi_device,
456}; 512};
457 513
458void omap4_panda_display_init(void) 514void __init omap4_panda_display_init(void)
459{ 515{
460 int r; 516 int r;
461 517
@@ -473,19 +529,40 @@ void omap4_panda_display_init(void)
473 omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP); 529 omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP);
474 else 530 else
475 omap_hdmi_init(0); 531 omap_hdmi_init(0);
532
533 omap_mux_init_gpio(HDMI_GPIO_LS_OE, OMAP_PIN_OUTPUT);
534 omap_mux_init_gpio(HDMI_GPIO_CT_CP_HPD, OMAP_PIN_OUTPUT);
535 omap_mux_init_gpio(HDMI_GPIO_HPD, OMAP_PIN_INPUT_PULLDOWN);
536}
537
538static void omap4_panda_init_rev(void)
539{
540 if (cpu_is_omap443x()) {
541 /* PandaBoard 4430 */
542 /* ASoC audio configuration */
543 panda_abe_audio_data.card_name = "PandaBoard";
544 panda_abe_audio_data.has_hsmic = 1;
545 } else {
546 /* PandaBoard ES */
547 /* ASoC audio configuration */
548 panda_abe_audio_data.card_name = "PandaBoardES";
549 }
476} 550}
477 551
478static void __init omap4_panda_init(void) 552static void __init omap4_panda_init(void)
479{ 553{
480 int package = OMAP_PACKAGE_CBS; 554 int package = OMAP_PACKAGE_CBS;
555 int ret;
481 556
482 if (omap_rev() == OMAP4430_REV_ES1_0) 557 if (omap_rev() == OMAP4430_REV_ES1_0)
483 package = OMAP_PACKAGE_CBL; 558 package = OMAP_PACKAGE_CBL;
484 omap4_mux_init(board_mux, NULL, package); 559 omap4_mux_init(board_mux, NULL, package);
485 560
486 if (wl12xx_set_platform_data(&omap_panda_wlan_data)) 561 ret = wl12xx_set_platform_data(&omap_panda_wlan_data);
487 pr_err("error setting wl12xx data\n"); 562 if (ret)
563 pr_err("error setting wl12xx data: %d\n", ret);
488 564
565 omap4_panda_init_rev();
489 omap4_panda_i2c_init(); 566 omap4_panda_i2c_init();
490 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); 567 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
491 platform_device_register(&omap_vwlan_device); 568 platform_device_register(&omap_vwlan_device);
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 52c0cef77165..668533e2a379 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -407,8 +407,6 @@ static inline void __init overo_init_keys(void) { return; }
407static int overo_twl_gpio_setup(struct device *dev, 407static int overo_twl_gpio_setup(struct device *dev,
408 unsigned gpio, unsigned ngpio) 408 unsigned gpio, unsigned ngpio)
409{ 409{
410 omap2_hsmmc_init(mmc);
411
412#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) 410#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
413 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 411 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
414 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 412 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
@@ -505,6 +503,7 @@ static void __init overo_init(void)
505 int ret; 503 int ret;
506 504
507 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 505 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
506 omap_hsmmc_init(mmc);
508 overo_i2c_init(); 507 overo_i2c_init();
509 omap_display_init(&overo_dss_data); 508 omap_display_init(&overo_dss_data);
510 omap_serial_init(); 509 omap_serial_init();
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 8678b386c6a2..ae53d71f0ce0 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Board support file for Nokia RM-680. 2 * Board support file for Nokia RM-680/696.
3 * 3 *
4 * Copyright (C) 2010 Nokia 4 * Copyright (C) 2010 Nokia
5 * 5 *
@@ -120,7 +120,7 @@ static void __init rm680_peripherals_init(void)
120 ARRAY_SIZE(rm680_peripherals_devices)); 120 ARRAY_SIZE(rm680_peripherals_devices));
121 rm680_i2c_init(); 121 rm680_i2c_init();
122 gpmc_onenand_init(board_onenand_data); 122 gpmc_onenand_init(board_onenand_data);
123 omap2_hsmmc_init(mmc); 123 omap_hsmmc_init(mmc);
124} 124}
125 125
126#ifdef CONFIG_OMAP_MUX 126#ifdef CONFIG_OMAP_MUX
@@ -154,3 +154,15 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
154 .timer = &omap3_timer, 154 .timer = &omap3_timer,
155 .restart = omap_prcm_restart, 155 .restart = omap_prcm_restart,
156MACHINE_END 156MACHINE_END
157
158MACHINE_START(NOKIA_RM696, "Nokia RM-696 board")
159 .atag_offset = 0x100,
160 .reserve = omap_reserve,
161 .map_io = omap3_map_io,
162 .init_early = omap3630_init_early,
163 .init_irq = omap3_init_irq,
164 .handle_irq = omap3_intc_handle_irq,
165 .init_machine = rm680_init,
166 .timer = &omap3_timer,
167 .restart = omap_prcm_restart,
168MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index acb4e77b39ef..16aebfb8a7ec 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -138,17 +138,14 @@ static struct lp5523_platform_data rx51_lp5523_platform_data = {
138 138
139static struct omap2_mcspi_device_config wl1251_mcspi_config = { 139static struct omap2_mcspi_device_config wl1251_mcspi_config = {
140 .turbo_mode = 0, 140 .turbo_mode = 0,
141 .single_channel = 1,
142}; 141};
143 142
144static struct omap2_mcspi_device_config mipid_mcspi_config = { 143static struct omap2_mcspi_device_config mipid_mcspi_config = {
145 .turbo_mode = 0, 144 .turbo_mode = 0,
146 .single_channel = 1,
147}; 145};
148 146
149static struct omap2_mcspi_device_config tsc2005_mcspi_config = { 147static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
150 .turbo_mode = 0, 148 .turbo_mode = 0,
151 .single_channel = 1,
152}; 149};
153 150
154static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { 151static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
@@ -1105,6 +1102,11 @@ static struct tsc2005_platform_data tsc2005_pdata = {
1105 .esd_timeout_ms = 8000, 1102 .esd_timeout_ms = 8000,
1106}; 1103};
1107 1104
1105static struct gpio rx51_tsc2005_gpios[] __initdata = {
1106 { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" },
1107 { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" },
1108};
1109
1108static void rx51_tsc2005_set_reset(bool enable) 1110static void rx51_tsc2005_set_reset(bool enable)
1109{ 1111{
1110 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable); 1112 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
@@ -1114,20 +1116,18 @@ static void __init rx51_init_tsc2005(void)
1114{ 1116{
1115 int r; 1117 int r;
1116 1118
1117 r = gpio_request_one(RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ"); 1119 omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT);
1118 if (r < 0) { 1120 omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP);
1119 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 IRQ");
1120 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq = 0;
1121 }
1122 1121
1123 r = gpio_request_one(RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, 1122 r = gpio_request_array(rx51_tsc2005_gpios,
1124 "tsc2005 reset"); 1123 ARRAY_SIZE(rx51_tsc2005_gpios));
1125 if (r >= 0) { 1124 if (r < 0) {
1126 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset; 1125 printk(KERN_ERR "tsc2005 board initialization failed\n");
1127 } else {
1128 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 reset");
1129 tsc2005_pdata.esd_timeout_ms = 0; 1126 tsc2005_pdata.esd_timeout_ms = 0;
1127 return;
1130 } 1128 }
1129
1130 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
1131} 1131}
1132 1132
1133void __init rx51_peripherals_init(void) 1133void __init rx51_peripherals_init(void)
@@ -1145,7 +1145,7 @@ void __init rx51_peripherals_init(void)
1145 1145
1146 partition = omap_mux_get("core"); 1146 partition = omap_mux_get("core");
1147 if (partition) 1147 if (partition)
1148 omap2_hsmmc_init(mmc); 1148 omap_hsmmc_init(mmc);
1149 1149
1150 rx51_charger_init(); 1150 rx51_charger_init();
1151} 1151}
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c
index d4683ba5f721..a43a765dd092 100644
--- a/arch/arm/mach-omap2/board-zoom-display.c
+++ b/arch/arm/mach-omap2/board-zoom-display.c
@@ -55,6 +55,7 @@ static void zoom_panel_disable_lcd(struct omap_dss_device *dssdev)
55 55
56static int zoom_set_bl_intensity(struct omap_dss_device *dssdev, int level) 56static int zoom_set_bl_intensity(struct omap_dss_device *dssdev, int level)
57{ 57{
58#ifdef CONFIG_TWL4030_CORE
58 unsigned char c; 59 unsigned char c;
59 u8 mux_pwm, enb_pwm; 60 u8 mux_pwm, enb_pwm;
60 61
@@ -90,6 +91,9 @@ static int zoom_set_bl_intensity(struct omap_dss_device *dssdev, int level)
90 c = ((50 * (100 - level)) / 100) + 1; 91 c = ((50 * (100 - level)) / 100) + 1;
91 twl_i2c_write_u8(TWL4030_MODULE_PWM1, 0x7F, TWL_LED_PWMOFF); 92 twl_i2c_write_u8(TWL4030_MODULE_PWM1, 0x7F, TWL_LED_PWMOFF);
92 twl_i2c_write_u8(TWL4030_MODULE_PWM1, c, TWL_LED_PWMON); 93 twl_i2c_write_u8(TWL4030_MODULE_PWM1, c, TWL_LED_PWMON);
94#else
95 pr_warn("Backlight not enabled\n");
96#endif
93 97
94 return 0; 98 return 0;
95} 99}
@@ -117,7 +121,6 @@ static struct omap_dss_board_info zoom_dss_data = {
117 121
118static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { 122static struct omap2_mcspi_device_config dss_lcd_mcspi_config = {
119 .turbo_mode = 1, 123 .turbo_mode = 1,
120 .single_channel = 1, /* 0: slave, 1: master */
121}; 124};
122 125
123static struct spi_board_info nec_8048_spi_board_info[] __initdata = { 126static struct spi_board_info nec_8048_spi_board_info[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 8d7ce11cfeaf..3d39cdb2e250 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -205,6 +205,7 @@ static struct omap2_hsmmc_info mmc[] = {
205 .caps = MMC_CAP_4_BIT_DATA, 205 .caps = MMC_CAP_4_BIT_DATA,
206 .gpio_wp = -EINVAL, 206 .gpio_wp = -EINVAL,
207 .power_saving = true, 207 .power_saving = true,
208 .deferred = true,
208 }, 209 },
209 { 210 {
210 .name = "internal", 211 .name = "internal",
@@ -233,7 +234,7 @@ static int zoom_twl_gpio_setup(struct device *dev,
233 234
234 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 235 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
235 mmc[0].gpio_cd = gpio + 0; 236 mmc[0].gpio_cd = gpio + 0;
236 omap2_hsmmc_init(mmc); 237 omap_hsmmc_late_init(mmc);
237 238
238 ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, 239 ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW,
239 "lcd enable"); 240 "lcd enable");
@@ -296,9 +297,12 @@ static void enable_board_wakeup_source(void)
296 297
297void __init zoom_peripherals_init(void) 298void __init zoom_peripherals_init(void)
298{ 299{
299 if (wl12xx_set_platform_data(&omap_zoom_wlan_data)) 300 int ret = wl12xx_set_platform_data(&omap_zoom_wlan_data);
300 pr_err("error setting wl12xx data\n");
301 301
302 if (ret)
303 pr_err("error setting wl12xx data: %d\n", ret);
304
305 omap_hsmmc_init(mmc);
302 omap_i2c_init(); 306 omap_i2c_init();
303 platform_device_register(&omap_vwlan_device); 307 platform_device_register(&omap_vwlan_device);
304 usb_musb_init(NULL); 308 usb_musb_init(NULL);
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 39f9d5a58d0c..7072e0d651b1 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -33,6 +33,7 @@
33#include <linux/cpufreq.h> 33#include <linux/cpufreq.h>
34#include <linux/slab.h> 34#include <linux/slab.h>
35 35
36#include <plat/cpu.h>
36#include <plat/clock.h> 37#include <plat/clock.h>
37#include <plat/sram.h> 38#include <plat/sram.h>
38#include <plat/sdrc.h> 39#include <plat/sdrc.h>
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index e25364de028a..04d551b1f7f7 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -43,6 +43,7 @@
43#include <linux/errno.h> 43#include <linux/errno.h>
44#include <linux/clk.h> 44#include <linux/clk.h>
45#include <linux/io.h> 45#include <linux/io.h>
46#include <linux/bug.h>
46 47
47#include <plat/clock.h> 48#include <plat/clock.h>
48 49
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index e069a9be93df..cd7fd0f91149 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -22,6 +22,7 @@
22#include <asm/div64.h> 22#include <asm/div64.h>
23 23
24#include <plat/clock.h> 24#include <plat/clock.h>
25#include <plat/cpu.h>
25 26
26#include "clock.h" 27#include "clock.h"
27#include "cm-regbits-24xx.h" 28#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 61ad3855f10a..bace9308a4db 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -14,11 +14,14 @@
14 */ 14 */
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/io.h>
17#include <linux/clk.h> 18#include <linux/clk.h>
18#include <linux/list.h> 19#include <linux/list.h>
19 20
21#include <plat/hardware.h>
20#include <plat/clkdev_omap.h> 22#include <plat/clkdev_omap.h>
21 23
24#include "iomap.h"
22#include "clock.h" 25#include "clock.h"
23#include "clock2xxx.h" 26#include "clock2xxx.h"
24#include "opp2xxx.h" 27#include "opp2xxx.h"
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c
index d87bc9cb2a36..dfda9a3f2cb2 100644
--- a/arch/arm/mach-omap2/clock2430.c
+++ b/arch/arm/mach-omap2/clock2430.c
@@ -21,8 +21,10 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/hardware.h>
24#include <plat/clock.h> 25#include <plat/clock.h>
25 26
27#include "iomap.h"
26#include "clock.h" 28#include "clock.h"
27#include "clock2xxx.h" 29#include "clock2xxx.h"
28#include "cm2xxx_3xxx.h" 30#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 0cc12879e7b9..3b4d09a50399 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -17,8 +17,10 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/list.h> 18#include <linux/list.h>
19 19
20#include <plat/hardware.h>
20#include <plat/clkdev_omap.h> 21#include <plat/clkdev_omap.h>
21 22
23#include "iomap.h"
22#include "clock.h" 24#include "clock.h"
23#include "clock2xxx.h" 25#include "clock2xxx.h"
24#include "opp2xxx.h" 26#include "opp2xxx.h"
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index 80bb0f0e92e6..12500097378d 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -22,6 +22,7 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <plat/cpu.h>
25#include <plat/clock.h> 26#include <plat/clock.h>
26 27
27#include "clock.h" 28#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 952c3e01c9eb..794d82702c85 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -21,6 +21,7 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/hardware.h>
24#include <plat/clock.h> 25#include <plat/clock.h>
25 26
26#include "clock.h" 27#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index d75e5f6b8a01..981b9f9111a4 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -20,14 +20,15 @@
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/list.h> 21#include <linux/list.h>
22 22
23#include <plat/hardware.h>
23#include <plat/clkdev_omap.h> 24#include <plat/clkdev_omap.h>
24 25
26#include "iomap.h"
25#include "clock.h" 27#include "clock.h"
26#include "clock3xxx.h" 28#include "clock3xxx.h"
27#include "clock34xx.h" 29#include "clock34xx.h"
28#include "clock36xx.h" 30#include "clock36xx.h"
29#include "clock3517.h" 31#include "clock3517.h"
30
31#include "cm2xxx_3xxx.h" 32#include "cm2xxx_3xxx.h"
32#include "cm-regbits-34xx.h" 33#include "cm-regbits-34xx.h"
33#include "prm2xxx_3xxx.h" 34#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 08e86d793a1f..79b98f22f207 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -26,8 +26,11 @@
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/list.h> 27#include <linux/list.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29
30#include <plat/hardware.h>
29#include <plat/clkdev_omap.h> 31#include <plat/clkdev_omap.h>
30 32
33#include "iomap.h"
31#include "clock.h" 34#include "clock.h"
32#include "clock44xx.h" 35#include "clock44xx.h"
33#include "cm1_44xx.h" 36#include "cm1_44xx.h"
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c
index 04d39cdd2112..389f9f8b570c 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c
@@ -18,8 +18,10 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include "common.h" 21#include <plat/hardware.h>
22 22
23#include "iomap.h"
24#include "common.h"
23#include "cm.h" 25#include "cm.h"
24#include "cm2xxx_3xxx.h" 26#include "cm2xxx_3xxx.h"
25#include "cm-regbits-24xx.h" 27#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
index 6a836303252c..535d66e2822c 100644
--- a/arch/arm/mach-omap2/cm44xx.c
+++ b/arch/arm/mach-omap2/cm44xx.c
@@ -18,8 +18,8 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include "iomap.h"
21#include "common.h" 22#include "common.h"
22
23#include "cm.h" 23#include "cm.h"
24#include "cm1_44xx.h" 24#include "cm1_44xx.h"
25#include "cm2_44xx.h" 25#include "cm2_44xx.h"
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 6204deaf85b1..bd8810c3753f 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -20,8 +20,8 @@
20#include <linux/err.h> 20#include <linux/err.h>
21#include <linux/io.h> 21#include <linux/io.h>
22 22
23#include "iomap.h"
23#include "common.h" 24#include "common.h"
24
25#include "cm.h" 25#include "cm.h"
26#include "cm1_44xx.h" 26#include "cm1_44xx.h"
27#include "cm2_44xx.h" 27#include "cm2_44xx.h"
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index bcb0c5817167..9498b0f5fbd0 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -33,7 +33,6 @@
33 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) 33 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
34static struct omap2_mcspi_device_config ads7846_mcspi_config = { 34static struct omap2_mcspi_device_config ads7846_mcspi_config = {
35 .turbo_mode = 0, 35 .turbo_mode = 0,
36 .single_channel = 1, /* 0: slave, 1: master */
37}; 36};
38 37
39static struct ads7846_platform_data ads7846_config = { 38static struct ads7846_platform_data ads7846_config = {
@@ -76,13 +75,15 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
76 gpio_set_debounce(gpio_pendown, gpio_debounce); 75 gpio_set_debounce(gpio_pendown, gpio_debounce);
77 } 76 }
78 77
79 ads7846_config.gpio_pendown = gpio_pendown;
80
81 spi_bi->bus_num = bus_num; 78 spi_bi->bus_num = bus_num;
82 spi_bi->irq = OMAP_GPIO_IRQ(gpio_pendown); 79 spi_bi->irq = OMAP_GPIO_IRQ(gpio_pendown);
83 80
84 if (board_pdata) 81 if (board_pdata) {
82 board_pdata->gpio_pendown = gpio_pendown;
85 spi_bi->platform_data = board_pdata; 83 spi_bi->platform_data = board_pdata;
84 } else {
85 ads7846_config.gpio_pendown = gpio_pendown;
86 }
86 87
87 spi_register_board_info(&ads7846_spi_board_info, 1); 88 spi_register_board_info(&ads7846_spi_board_info, 1);
88} 89}
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index aaf421178c91..1549c11000d3 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -17,12 +17,13 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include "common.h" 20#include <plat/hardware.h>
21#include <plat/board.h> 21#include <plat/board.h>
22#include <plat/mux.h> 22#include <plat/mux.h>
23
24#include <plat/clock.h> 23#include <plat/clock.h>
25 24
25#include "iomap.h"
26#include "common.h"
26#include "sdrc.h" 27#include "sdrc.h"
27#include "control.h" 28#include "control.h"
28 29
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index febffde2ff10..57da7f406e28 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -132,6 +132,9 @@ void omap3_map_io(void);
132void am33xx_map_io(void); 132void am33xx_map_io(void);
133void omap4_map_io(void); 133void omap4_map_io(void);
134void ti81xx_map_io(void); 134void ti81xx_map_io(void);
135void omap_barriers_init(void);
136
137extern void __init omap_init_consistent_dma_size(void);
135 138
136/** 139/**
137 * omap_test_timeout - busy-loop, testing a condition 140 * omap_test_timeout - busy-loop, testing a condition
@@ -174,6 +177,18 @@ void omap3_intc_handle_irq(struct pt_regs *regs);
174extern void __iomem *omap4_get_l2cache_base(void); 177extern void __iomem *omap4_get_l2cache_base(void);
175#endif 178#endif
176 179
180struct device_node;
181#ifdef CONFIG_OF
182int __init omap_intc_of_init(struct device_node *node,
183 struct device_node *parent);
184#else
185int __init omap_intc_of_init(struct device_node *node,
186 struct device_node *parent)
187{
188 return 0;
189}
190#endif
191
177#ifdef CONFIG_SMP 192#ifdef CONFIG_SMP
178extern void __iomem *omap4_get_scu_base(void); 193extern void __iomem *omap4_get_scu_base(void);
179#else 194#else
@@ -235,5 +250,10 @@ static inline u32 omap4_mpuss_read_prev_context_state(void)
235 return 0; 250 return 0;
236} 251}
237#endif 252#endif
253
254struct omap_sdrc_params;
255extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
256 struct omap_sdrc_params *sdrc_cs1);
257
238#endif /* __ASSEMBLER__ */ 258#endif /* __ASSEMBLER__ */
239#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 259#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 114c037e433c..08e674bb0417 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -15,9 +15,11 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include "common.h" 18#include <plat/hardware.h>
19#include <plat/sdrc.h> 19#include <plat/sdrc.h>
20 20
21#include "iomap.h"
22#include "common.h"
21#include "cm-regbits-34xx.h" 23#include "cm-regbits-34xx.h"
22#include "prm-regbits-34xx.h" 24#include "prm-regbits-34xx.h"
23#include "prm2xxx_3xxx.h" 25#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index 0ba68d3764bc..a406fd045ce1 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -16,7 +16,6 @@
16#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H 16#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H
17#define __ARCH_ARM_MACH_OMAP2_CONTROL_H 17#define __ARCH_ARM_MACH_OMAP2_CONTROL_H
18 18
19#include <mach/io.h>
20#include <mach/ctrl_module_core_44xx.h> 19#include <mach/ctrl_module_core_44xx.h>
21#include <mach/ctrl_module_wkup_44xx.h> 20#include <mach/ctrl_module_wkup_44xx.h>
22#include <mach/ctrl_module_pad_core_44xx.h> 21#include <mach/ctrl_module_pad_core_44xx.h>
@@ -339,6 +338,11 @@
339#define AM35XX_VPFE_PCLK_SW_RST BIT(4) 338#define AM35XX_VPFE_PCLK_SW_RST BIT(4)
340 339
341/* 340/*
341 * CONTROL AM33XX STATUS register
342 */
343#define AM33XX_CONTROL_STATUS 0x040
344
345/*
342 * CONTROL OMAP STATUS register to identify OMAP3 features 346 * CONTROL OMAP STATUS register to identify OMAP3 features
343 */ 347 */
344#define OMAP3_CONTROL_OMAP_STATUS 0x044c 348#define OMAP3_CONTROL_OMAP_STATUS 0x044c
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index cfdbb86bc84e..72e018b9b260 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -65,7 +65,6 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
65 struct timespec ts_preidle, ts_postidle, ts_idle; 65 struct timespec ts_preidle, ts_postidle, ts_idle;
66 u32 cpu1_state; 66 u32 cpu1_state;
67 int idle_time; 67 int idle_time;
68 int new_state_idx;
69 int cpu_id = smp_processor_id(); 68 int cpu_id = smp_processor_id();
70 69
71 /* Used to keep track of the total time in idle */ 70 /* Used to keep track of the total time in idle */
@@ -84,8 +83,8 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
84 */ 83 */
85 cpu1_state = pwrdm_read_pwrst(cpu1_pd); 84 cpu1_state = pwrdm_read_pwrst(cpu1_pd);
86 if (cpu1_state != PWRDM_POWER_OFF) { 85 if (cpu1_state != PWRDM_POWER_OFF) {
87 new_state_idx = drv->safe_state_index; 86 index = drv->safe_state_index;
88 cx = cpuidle_get_statedata(&dev->states_usage[new_state_idx]); 87 cx = cpuidle_get_statedata(&dev->states_usage[index]);
89 } 88 }
90 89
91 if (index > 0) 90 if (index > 0)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 0b510ad01a00..e4336035c0ea 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -17,6 +17,7 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/of.h> 19#include <linux/of.h>
20#include <linux/platform_data/omap4-keypad.h>
20 21
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <mach/irqs.h> 23#include <mach/irqs.h>
@@ -24,9 +25,8 @@
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
25#include <asm/pmu.h> 26#include <asm/pmu.h>
26 27
27#include <plat/tc.h> 28#include "iomap.h"
28#include <plat/board.h> 29#include <plat/board.h>
29#include <plat/mcbsp.h>
30#include <plat/mmc.h> 30#include <plat/mmc.h>
31#include <plat/dma.h> 31#include <plat/dma.h>
32#include <plat/omap_hwmod.h> 32#include <plat/omap_hwmod.h>
@@ -276,7 +276,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data
276} 276}
277 277
278#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) 278#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
279static inline void omap_init_mbox(void) 279static inline void __init omap_init_mbox(void)
280{ 280{
281 struct omap_hwmod *oh; 281 struct omap_hwmod *oh;
282 struct platform_device *pdev; 282 struct platform_device *pdev;
@@ -304,29 +304,8 @@ static struct platform_device omap_pcm = {
304 .id = -1, 304 .id = -1,
305}; 305};
306 306
307/*
308 * OMAP2420 has 2 McBSP ports
309 * OMAP2430 has 5 McBSP ports
310 * OMAP3 has 5 McBSP ports
311 * OMAP4 has 4 McBSP ports
312 */
313OMAP_MCBSP_PLATFORM_DEVICE(1);
314OMAP_MCBSP_PLATFORM_DEVICE(2);
315OMAP_MCBSP_PLATFORM_DEVICE(3);
316OMAP_MCBSP_PLATFORM_DEVICE(4);
317OMAP_MCBSP_PLATFORM_DEVICE(5);
318
319static void omap_init_audio(void) 307static void omap_init_audio(void)
320{ 308{
321 platform_device_register(&omap_mcbsp1);
322 platform_device_register(&omap_mcbsp2);
323 if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
324 platform_device_register(&omap_mcbsp3);
325 platform_device_register(&omap_mcbsp4);
326 }
327 if (cpu_is_omap243x() || cpu_is_omap34xx())
328 platform_device_register(&omap_mcbsp5);
329
330 platform_device_register(&omap_pcm); 309 platform_device_register(&omap_pcm);
331} 310}
332 311
@@ -337,7 +316,7 @@ static inline void omap_init_audio(void) {}
337#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ 316#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
338 defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) 317 defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
339 318
340static void omap_init_mcpdm(void) 319static void __init omap_init_mcpdm(void)
341{ 320{
342 struct omap_hwmod *oh; 321 struct omap_hwmod *oh;
343 struct platform_device *pdev; 322 struct platform_device *pdev;
@@ -358,7 +337,7 @@ static inline void omap_init_mcpdm(void) {}
358#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \ 337#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
359 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE) 338 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
360 339
361static void omap_init_dmic(void) 340static void __init omap_init_dmic(void)
362{ 341{
363 struct omap_hwmod *oh; 342 struct omap_hwmod *oh;
364 struct platform_device *pdev; 343 struct platform_device *pdev;
@@ -380,7 +359,7 @@ static inline void omap_init_dmic(void) {}
380 359
381#include <plat/mcspi.h> 360#include <plat/mcspi.h>
382 361
383static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) 362static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
384{ 363{
385 struct platform_device *pdev; 364 struct platform_device *pdev;
386 char *name = "omap2_mcspi"; 365 char *name = "omap2_mcspi";
@@ -405,6 +384,7 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
405 break; 384 break;
406 default: 385 default:
407 pr_err("Invalid McSPI Revision value\n"); 386 pr_err("Invalid McSPI Revision value\n");
387 kfree(pdata);
408 return -EINVAL; 388 return -EINVAL;
409 } 389 }
410 390
@@ -653,9 +633,7 @@ void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
653/*-------------------------------------------------------------------------*/ 633/*-------------------------------------------------------------------------*/
654 634
655#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) 635#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
656#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
657#define OMAP_HDQ_BASE 0x480B2000 636#define OMAP_HDQ_BASE 0x480B2000
658#endif
659static struct resource omap_hdq_resources[] = { 637static struct resource omap_hdq_resources[] = {
660 { 638 {
661 .start = OMAP_HDQ_BASE, 639 .start = OMAP_HDQ_BASE,
@@ -678,7 +656,10 @@ static struct platform_device omap_hdq_dev = {
678}; 656};
679static inline void omap_hdq_init(void) 657static inline void omap_hdq_init(void)
680{ 658{
681 (void) platform_device_register(&omap_hdq_dev); 659 if (cpu_is_omap2420())
660 return;
661
662 platform_device_register(&omap_hdq_dev);
682} 663}
683#else 664#else
684static inline void omap_hdq_init(void) {} 665static inline void omap_hdq_init(void) {}
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 3c446d1a1781..9706c648bc19 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -30,6 +30,7 @@
30#include <plat/omap-pm.h> 30#include <plat/omap-pm.h>
31#include "common.h" 31#include "common.h"
32 32
33#include "iomap.h"
33#include "mux.h" 34#include "mux.h"
34#include "control.h" 35#include "control.h"
35#include "display.h" 36#include "display.h"
@@ -103,12 +104,8 @@ static void omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
103 u32 reg; 104 u32 reg;
104 u16 control_i2c_1; 105 u16 control_i2c_1;
105 106
106 /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
107 omap_mux_init_signal("hdmi_hpd",
108 OMAP_PIN_INPUT_PULLUP);
109 omap_mux_init_signal("hdmi_cec", 107 omap_mux_init_signal("hdmi_cec",
110 OMAP_PIN_INPUT_PULLUP); 108 OMAP_PIN_INPUT_PULLUP);
111 /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */
112 omap_mux_init_signal("hdmi_ddc_scl", 109 omap_mux_init_signal("hdmi_ddc_scl",
113 OMAP_PIN_INPUT_PULLUP); 110 OMAP_PIN_INPUT_PULLUP);
114 omap_mux_init_signal("hdmi_ddc_sda", 111 omap_mux_init_signal("hdmi_ddc_sda",
@@ -128,7 +125,7 @@ static void omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
128 } 125 }
129} 126}
130 127
131static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) 128static int __init omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
132{ 129{
133 u32 enable_mask, enable_shift; 130 u32 enable_mask, enable_shift;
134 u32 pipd_mask, pipd_shift; 131 u32 pipd_mask, pipd_shift;
@@ -161,7 +158,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
161 return 0; 158 return 0;
162} 159}
163 160
164int omap_hdmi_init(enum omap_hdmi_flags flags) 161int __init omap_hdmi_init(enum omap_hdmi_flags flags)
165{ 162{
166 if (cpu_is_omap44xx()) 163 if (cpu_is_omap44xx())
167 omap4_hdmi_mux_pads(flags); 164 omap4_hdmi_mux_pads(flags);
@@ -169,7 +166,7 @@ int omap_hdmi_init(enum omap_hdmi_flags flags)
169 return 0; 166 return 0;
170} 167}
171 168
172static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) 169static int __init omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
173{ 170{
174 if (cpu_is_omap44xx()) 171 if (cpu_is_omap44xx())
175 return omap4_dsi_mux_pads(dsi_id, lane_mask); 172 return omap4_dsi_mux_pads(dsi_id, lane_mask);
@@ -177,7 +174,7 @@ static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
177 return 0; 174 return 0;
178} 175}
179 176
180static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask) 177static void __init omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
181{ 178{
182 if (cpu_is_omap44xx()) 179 if (cpu_is_omap44xx())
183 omap4_dsi_mux_pads(dsi_id, 0); 180 omap4_dsi_mux_pads(dsi_id, 0);
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index a59a45a0096e..b19d8496c16e 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -227,7 +227,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
227 227
228 dma_stride = OMAP2_DMA_STRIDE; 228 dma_stride = OMAP2_DMA_STRIDE;
229 dma_common_ch_start = CSDP; 229 dma_common_ch_start = CSDP;
230 if (cpu_is_omap3630() || cpu_is_omap4430()) 230 if (cpu_is_omap3630() || cpu_is_omap44xx())
231 dma_common_ch_end = CCDN; 231 dma_common_ch_end = CCDN;
232 else 232 else
233 dma_common_ch_end = CCFN; 233 dma_common_ch_end = CCFN;
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
index 9c442e290ccb..e28e761b7ab9 100644
--- a/arch/arm/mach-omap2/emu.c
+++ b/arch/arm/mach-omap2/emu.c
@@ -21,6 +21,10 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/err.h> 22#include <linux/err.h>
23 23
24#include <mach/hardware.h>
25
26#include "iomap.h"
27
24MODULE_LICENSE("GPL"); 28MODULE_LICENSE("GPL");
25MODULE_AUTHOR("Alexander Shishkin"); 29MODULE_AUTHOR("Alexander Shishkin");
26 30
@@ -30,29 +34,8 @@ MODULE_AUTHOR("Alexander Shishkin");
30#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) 34#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000)
31#define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) 35#define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000)
32 36
33static struct amba_device omap3_etb_device = { 37static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL);
34 .dev = { 38static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL);
35 .init_name = "etb",
36 },
37 .res = {
38 .start = ETB_BASE,
39 .end = ETB_BASE + SZ_4K - 1,
40 .flags = IORESOURCE_MEM,
41 },
42 .periphid = 0x000bb907,
43};
44
45static struct amba_device omap3_etm_device = {
46 .dev = {
47 .init_name = "etm",
48 },
49 .res = {
50 .start = ETM_BASE,
51 .end = ETM_BASE + SZ_4K - 1,
52 .flags = IORESOURCE_MEM,
53 },
54 .periphid = 0x102bb921,
55};
56 39
57static int __init emu_init(void) 40static int __init emu_init(void)
58{ 41{
@@ -66,4 +49,3 @@ static int __init emu_init(void)
66} 49}
67 50
68subsys_initcall(emu_init); 51subsys_initcall(emu_init);
69
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 8cbfbc2918ce..2f994e5194e8 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -23,14 +23,18 @@
23 23
24#include <plat/omap_hwmod.h> 24#include <plat/omap_hwmod.h>
25#include <plat/omap_device.h> 25#include <plat/omap_device.h>
26#include <plat/omap-pm.h>
26 27
27static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) 28#include "powerdomain.h"
29
30static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
28{ 31{
29 struct platform_device *pdev; 32 struct platform_device *pdev;
30 struct omap_gpio_platform_data *pdata; 33 struct omap_gpio_platform_data *pdata;
31 struct omap_gpio_dev_attr *dev_attr; 34 struct omap_gpio_dev_attr *dev_attr;
32 char *name = "omap_gpio"; 35 char *name = "omap_gpio";
33 int id; 36 int id;
37 struct powerdomain *pwrdm;
34 38
35 /* 39 /*
36 * extract the device id from name field available in the 40 * extract the device id from name field available in the
@@ -52,7 +56,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
52 pdata->bank_width = dev_attr->bank_width; 56 pdata->bank_width = dev_attr->bank_width;
53 pdata->dbck_flag = dev_attr->dbck_flag; 57 pdata->dbck_flag = dev_attr->dbck_flag;
54 pdata->virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1); 58 pdata->virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1);
55 59 pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
56 pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL); 60 pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL);
57 if (!pdata) { 61 if (!pdata) {
58 pr_err("gpio%d: Memory allocation failed\n", id); 62 pr_err("gpio%d: Memory allocation failed\n", id);
@@ -61,8 +65,15 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
61 65
62 switch (oh->class->rev) { 66 switch (oh->class->rev) {
63 case 0: 67 case 0:
68 if (id == 1)
69 /* non-wakeup GPIO pins for OMAP2 Bank1 */
70 pdata->non_wakeup_gpios = 0xe203ffc0;
71 else if (id == 2)
72 /* non-wakeup GPIO pins for OMAP2 Bank2 */
73 pdata->non_wakeup_gpios = 0x08700040;
74 /* fall through */
75
64 case 1: 76 case 1:
65 pdata->bank_type = METHOD_GPIO_24XX;
66 pdata->regs->revision = OMAP24XX_GPIO_REVISION; 77 pdata->regs->revision = OMAP24XX_GPIO_REVISION;
67 pdata->regs->direction = OMAP24XX_GPIO_OE; 78 pdata->regs->direction = OMAP24XX_GPIO_OE;
68 pdata->regs->datain = OMAP24XX_GPIO_DATAIN; 79 pdata->regs->datain = OMAP24XX_GPIO_DATAIN;
@@ -72,13 +83,19 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
72 pdata->regs->irqstatus = OMAP24XX_GPIO_IRQSTATUS1; 83 pdata->regs->irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
73 pdata->regs->irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2; 84 pdata->regs->irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
74 pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1; 85 pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1;
86 pdata->regs->irqenable2 = OMAP24XX_GPIO_IRQENABLE2;
75 pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1; 87 pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
76 pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1; 88 pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
77 pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL; 89 pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
78 pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN; 90 pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
91 pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
92 pdata->regs->wkup_en = OMAP24XX_GPIO_WAKE_EN;
93 pdata->regs->leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
94 pdata->regs->leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
95 pdata->regs->risingdetect = OMAP24XX_GPIO_RISINGDETECT;
96 pdata->regs->fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
79 break; 97 break;
80 case 2: 98 case 2:
81 pdata->bank_type = METHOD_GPIO_44XX;
82 pdata->regs->revision = OMAP4_GPIO_REVISION; 99 pdata->regs->revision = OMAP4_GPIO_REVISION;
83 pdata->regs->direction = OMAP4_GPIO_OE; 100 pdata->regs->direction = OMAP4_GPIO_OE;
84 pdata->regs->datain = OMAP4_GPIO_DATAIN; 101 pdata->regs->datain = OMAP4_GPIO_DATAIN;
@@ -88,10 +105,17 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
88 pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0; 105 pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
89 pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1; 106 pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
90 pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0; 107 pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
108 pdata->regs->irqenable2 = OMAP4_GPIO_IRQSTATUSSET1;
91 pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0; 109 pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
92 pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0; 110 pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
93 pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME; 111 pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
94 pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE; 112 pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
113 pdata->regs->ctrl = OMAP4_GPIO_CTRL;
114 pdata->regs->wkup_en = OMAP4_GPIO_IRQWAKEN0;
115 pdata->regs->leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
116 pdata->regs->leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
117 pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
118 pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
95 break; 119 break;
96 default: 120 default:
97 WARN(1, "Invalid gpio bank_type\n"); 121 WARN(1, "Invalid gpio bank_type\n");
@@ -99,6 +123,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
99 return -EINVAL; 123 return -EINVAL;
100 } 124 }
101 125
126 pwrdm = omap_hwmod_get_pwrdm(oh);
127 pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
128
102 pdev = omap_device_build(name, id - 1, oh, pdata, 129 pdev = omap_device_build(name, id - 1, oh, pdata,
103 sizeof(*pdata), NULL, 0, false); 130 sizeof(*pdata), NULL, 0, false);
104 kfree(pdata); 131 kfree(pdata);
@@ -109,9 +136,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
109 return PTR_ERR(pdev); 136 return PTR_ERR(pdev);
110 } 137 }
111 138
112 omap_device_disable_idle_on_suspend(pdev);
113
114 gpio_bank_count++;
115 return 0; 139 return 0;
116} 140}
117 141
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 8ad210bda9a9..386dec8d2351 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -16,6 +16,7 @@
16 16
17#include <asm/mach/flash.h> 17#include <asm/mach/flash.h>
18 18
19#include <plat/cpu.h>
19#include <plat/nand.h> 20#include <plat/nand.h>
20#include <plat/board.h> 21#include <plat/board.h>
21#include <plat/gpmc.h> 22#include <plat/gpmc.h>
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index 5cdce10d6183..385b3e02c4a6 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -18,6 +18,7 @@
18 18
19#include <asm/mach/flash.h> 19#include <asm/mach/flash.h>
20 20
21#include <plat/cpu.h>
21#include <plat/onenand.h> 22#include <plat/onenand.h>
22#include <plat/board.h> 23#include <plat/board.h>
23#include <plat/gpmc.h> 24#include <plat/gpmc.h>
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index 997033129d26..5e5880d6d099 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -19,6 +19,8 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/smsc911x.h> 21#include <linux/smsc911x.h>
22#include <linux/regulator/fixed.h>
23#include <linux/regulator/machine.h>
22 24
23#include <plat/board.h> 25#include <plat/board.h>
24#include <plat/gpmc.h> 26#include <plat/gpmc.h>
@@ -42,6 +44,50 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
42 .flags = SMSC911X_USE_16BIT, 44 .flags = SMSC911X_USE_16BIT,
43}; 45};
44 46
47static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
48 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
49 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
50};
51
52/* Generic regulator definition to satisfy smsc911x */
53static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
54 .constraints = {
55 .min_uV = 3300000,
56 .max_uV = 3300000,
57 .valid_modes_mask = REGULATOR_MODE_NORMAL
58 | REGULATOR_MODE_STANDBY,
59 .valid_ops_mask = REGULATOR_CHANGE_MODE
60 | REGULATOR_CHANGE_STATUS,
61 },
62 .num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply),
63 .consumer_supplies = gpmc_smsc911x_supply,
64};
65
66static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
67 .supply_name = "gpmc_smsc911x",
68 .microvolts = 3300000,
69 .gpio = -EINVAL,
70 .startup_delay = 0,
71 .enable_high = 0,
72 .enabled_at_boot = 1,
73 .init_data = &gpmc_smsc911x_reg_init_data,
74};
75
76/*
77 * Platform device id of 42 is a temporary fix to avoid conflicts
78 * with other reg-fixed-voltage devices. The real fix should
79 * involve the driver core providing a way of dynamically
80 * assigning a unique id on registration for platform devices
81 * in the same name space.
82 */
83static struct platform_device gpmc_smsc911x_regulator = {
84 .name = "reg-fixed-voltage",
85 .id = 42,
86 .dev = {
87 .platform_data = &gpmc_smsc911x_fixed_reg_data,
88 },
89};
90
45/* 91/*
46 * Initialize smsc911x device connected to the GPMC. Note that we 92 * Initialize smsc911x device connected to the GPMC. Note that we
47 * assume that pin multiplexing is done in the board-*.c file, 93 * assume that pin multiplexing is done in the board-*.c file,
@@ -55,6 +101,15 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
55 101
56 gpmc_cfg = board_data; 102 gpmc_cfg = board_data;
57 103
104 if (!gpmc_cfg->id) {
105 ret = platform_device_register(&gpmc_smsc911x_regulator);
106 if (ret < 0) {
107 pr_err("Unable to register smsc911x regulators: %d\n",
108 ret);
109 return;
110 }
111 }
112
58 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { 113 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
59 pr_err("Failed to request GPMC mem region\n"); 114 pr_err("Failed to request GPMC mem region\n");
60 return; 115 return;
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 130034bf01d5..00d510858e28 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -528,7 +528,13 @@ int gpmc_cs_configure(int cs, int cmd, int wval)
528 528
529 case GPMC_CONFIG_DEV_SIZE: 529 case GPMC_CONFIG_DEV_SIZE:
530 regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); 530 regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
531
532 /* clear 2 target bits */
533 regval &= ~GPMC_CONFIG1_DEVICESIZE(3);
534
535 /* set the proper value */
531 regval |= GPMC_CONFIG1_DEVICESIZE(wval); 536 regval |= GPMC_CONFIG1_DEVICESIZE(wval);
537
532 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); 538 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
533 break; 539 break;
534 540
@@ -882,6 +888,7 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
882 gpmc_write_reg(GPMC_ECC_CONFIG, val); 888 gpmc_write_reg(GPMC_ECC_CONFIG, val);
883 return 0; 889 return 0;
884} 890}
891EXPORT_SYMBOL_GPL(gpmc_enable_hwecc);
885 892
886/** 893/**
887 * gpmc_calculate_ecc - generate non-inverted ecc bytes 894 * gpmc_calculate_ecc - generate non-inverted ecc bytes
@@ -912,3 +919,4 @@ int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code)
912 gpmc_ecc_used = -EINVAL; 919 gpmc_ecc_used = -EINVAL;
913 return 0; 920 return 0;
914} 921}
922EXPORT_SYMBOL_GPL(gpmc_calculate_ecc);
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index bd844af13af5..8121720e942f 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -175,14 +175,15 @@ static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data *mmc)
175{ 175{
176 u32 reg; 176 u32 reg;
177 177
178 if (mmc->slots[0].internal_clock) { 178 reg = omap_ctrl_readl(control_devconf1_offset);
179 reg = omap_ctrl_readl(control_devconf1_offset); 179 if (mmc->slots[0].internal_clock)
180 reg |= OMAP2_MMCSDIO2ADPCLKISEL; 180 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
181 omap_ctrl_writel(reg, control_devconf1_offset); 181 else
182 } 182 reg &= ~OMAP2_MMCSDIO2ADPCLKISEL;
183 omap_ctrl_writel(reg, control_devconf1_offset);
183} 184}
184 185
185static void hsmmc23_before_set_reg(struct device *dev, int slot, 186static void hsmmc2_before_set_reg(struct device *dev, int slot,
186 int power_on, int vdd) 187 int power_on, int vdd)
187{ 188{
188 struct omap_mmc_platform_data *mmc = dev->platform_data; 189 struct omap_mmc_platform_data *mmc = dev->platform_data;
@@ -407,14 +408,13 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
407 c->caps &= ~MMC_CAP_8_BIT_DATA; 408 c->caps &= ~MMC_CAP_8_BIT_DATA;
408 c->caps |= MMC_CAP_4_BIT_DATA; 409 c->caps |= MMC_CAP_4_BIT_DATA;
409 } 410 }
410 /* FALLTHROUGH */
411 case 3:
412 if (mmc->slots[0].features & HSMMC_HAS_PBIAS) { 411 if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {
413 /* off-chip level shifting, or none */ 412 /* off-chip level shifting, or none */
414 mmc->slots[0].before_set_reg = hsmmc23_before_set_reg; 413 mmc->slots[0].before_set_reg = hsmmc2_before_set_reg;
415 mmc->slots[0].after_set_reg = NULL; 414 mmc->slots[0].after_set_reg = NULL;
416 } 415 }
417 break; 416 break;
417 case 3:
418 case 4: 418 case 4:
419 case 5: 419 case 5:
420 mmc->slots[0].before_set_reg = NULL; 420 mmc->slots[0].before_set_reg = NULL;
@@ -428,69 +428,140 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
428 return 0; 428 return 0;
429} 429}
430 430
431static int omap_hsmmc_done;
432
433void omap_hsmmc_late_init(struct omap2_hsmmc_info *c)
434{
435 struct platform_device *pdev;
436 struct omap_mmc_platform_data *mmc_pdata;
437 int res;
438
439 if (omap_hsmmc_done != 1)
440 return;
441
442 omap_hsmmc_done++;
443
444 for (; c->mmc; c++) {
445 if (!c->deferred)
446 continue;
447
448 pdev = c->pdev;
449 if (!pdev)
450 continue;
451
452 mmc_pdata = pdev->dev.platform_data;
453 if (!mmc_pdata)
454 continue;
455
456 mmc_pdata->slots[0].switch_pin = c->gpio_cd;
457 mmc_pdata->slots[0].gpio_wp = c->gpio_wp;
458
459 res = omap_device_register(pdev);
460 if (res)
461 pr_err("Could not late init MMC %s\n",
462 c->name);
463 }
464}
465
431#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 466#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
432 467
433void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) 468static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
469 int ctrl_nr)
434{ 470{
435 struct omap_hwmod *oh; 471 struct omap_hwmod *oh;
472 struct omap_hwmod *ohs[1];
473 struct omap_device *od;
436 struct platform_device *pdev; 474 struct platform_device *pdev;
437 char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; 475 char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN];
438 struct omap_mmc_platform_data *mmc_data; 476 struct omap_mmc_platform_data *mmc_data;
439 struct omap_mmc_dev_attr *mmc_dev_attr; 477 struct omap_mmc_dev_attr *mmc_dev_attr;
440 char *name; 478 char *name;
441 int l; 479 int res;
442 480
443 mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL); 481 mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
444 if (!mmc_data) { 482 if (!mmc_data) {
445 pr_err("Cannot allocate memory for mmc device!\n"); 483 pr_err("Cannot allocate memory for mmc device!\n");
446 goto done; 484 return;
447 } 485 }
448 486
449 if (omap_hsmmc_pdata_init(hsmmcinfo, mmc_data) < 0) { 487 res = omap_hsmmc_pdata_init(hsmmcinfo, mmc_data);
450 pr_err("%s fails!\n", __func__); 488 if (res < 0)
451 goto done; 489 goto free_mmc;
452 } 490
453 omap_hsmmc_mux(mmc_data, (ctrl_nr - 1)); 491 omap_hsmmc_mux(mmc_data, (ctrl_nr - 1));
454 492
455 name = "omap_hsmmc"; 493 name = "omap_hsmmc";
456 494 res = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN,
457 l = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN,
458 "mmc%d", ctrl_nr); 495 "mmc%d", ctrl_nr);
459 WARN(l >= MAX_OMAP_MMC_HWMOD_NAME_LEN, 496 WARN(res >= MAX_OMAP_MMC_HWMOD_NAME_LEN,
460 "String buffer overflow in MMC%d device setup\n", ctrl_nr); 497 "String buffer overflow in MMC%d device setup\n", ctrl_nr);
498
461 oh = omap_hwmod_lookup(oh_name); 499 oh = omap_hwmod_lookup(oh_name);
462 if (!oh) { 500 if (!oh) {
463 pr_err("Could not look up %s\n", oh_name); 501 pr_err("Could not look up %s\n", oh_name);
464 kfree(mmc_data->slots[0].name); 502 goto free_name;
465 goto done;
466 } 503 }
467 504 ohs[0] = oh;
468 if (oh->dev_attr != NULL) { 505 if (oh->dev_attr != NULL) {
469 mmc_dev_attr = oh->dev_attr; 506 mmc_dev_attr = oh->dev_attr;
470 mmc_data->controller_flags = mmc_dev_attr->flags; 507 mmc_data->controller_flags = mmc_dev_attr->flags;
471 } 508 }
472 509
473 pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, 510 pdev = platform_device_alloc(name, ctrl_nr - 1);
474 sizeof(struct omap_mmc_platform_data), NULL, 0, false); 511 if (!pdev) {
475 if (IS_ERR(pdev)) { 512 pr_err("Could not allocate pdev for %s\n", name);
476 WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); 513 goto free_name;
477 kfree(mmc_data->slots[0].name);
478 goto done;
479 } 514 }
480 /* 515 dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
481 * return device handle to board setup code 516
482 * required to populate for regulator framework structure 517 od = omap_device_alloc(pdev, ohs, 1, NULL, 0);
483 */ 518 if (!od) {
484 hsmmcinfo->dev = &pdev->dev; 519 pr_err("Could not allocate od for %s\n", name);
520 goto put_pdev;
521 }
522
523 res = platform_device_add_data(pdev, mmc_data,
524 sizeof(struct omap_mmc_platform_data));
525 if (res) {
526 pr_err("Could not add pdata for %s\n", name);
527 goto put_pdev;
528 }
529
530 hsmmcinfo->pdev = pdev;
485 531
486done: 532 if (hsmmcinfo->deferred)
533 goto free_mmc;
534
535 res = omap_device_register(pdev);
536 if (res) {
537 pr_err("Could not register od for %s\n", name);
538 goto free_od;
539 }
540
541 goto free_mmc;
542
543free_od:
544 omap_device_delete(od);
545
546put_pdev:
547 platform_device_put(pdev);
548
549free_name:
550 kfree(mmc_data->slots[0].name);
551
552free_mmc:
487 kfree(mmc_data); 553 kfree(mmc_data);
488} 554}
489 555
490void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) 556void __init omap_hsmmc_init(struct omap2_hsmmc_info *controllers)
491{ 557{
492 u32 reg; 558 u32 reg;
493 559
560 if (omap_hsmmc_done)
561 return;
562
563 omap_hsmmc_done = 1;
564
494 if (!cpu_is_omap44xx()) { 565 if (!cpu_is_omap44xx()) {
495 if (cpu_is_omap2430()) { 566 if (cpu_is_omap2430()) {
496 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE; 567 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
@@ -515,7 +586,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
515 } 586 }
516 587
517 for (; controllers->mmc; controllers++) 588 for (; controllers->mmc; controllers++)
518 omap_init_hsmmc(controllers, controllers->mmc); 589 omap_hsmmc_init_one(controllers, controllers->mmc);
519 590
520} 591}
521 592
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h
index c4409730c4bb..07831cc3c171 100644
--- a/arch/arm/mach-omap2/hsmmc.h
+++ b/arch/arm/mach-omap2/hsmmc.h
@@ -21,10 +21,11 @@ struct omap2_hsmmc_info {
21 bool no_off; /* power_saving and power is not to go off */ 21 bool no_off; /* power_saving and power is not to go off */
22 bool no_off_init; /* no power off when not in MMC sleep state */ 22 bool no_off_init; /* no power off when not in MMC sleep state */
23 bool vcc_aux_disable_is_sleep; /* Regulator off remapped to sleep */ 23 bool vcc_aux_disable_is_sleep; /* Regulator off remapped to sleep */
24 bool deferred; /* mmc needs a deferred probe */
24 int gpio_cd; /* or -EINVAL */ 25 int gpio_cd; /* or -EINVAL */
25 int gpio_wp; /* or -EINVAL */ 26 int gpio_wp; /* or -EINVAL */
26 char *name; /* or NULL for default */ 27 char *name; /* or NULL for default */
27 struct device *dev; /* returned: pointer to mmc adapter */ 28 struct platform_device *pdev; /* mmc controller instance */
28 int ocr_mask; /* temporary HACK */ 29 int ocr_mask; /* temporary HACK */
29 /* Remux (pad configuration) when powering on/off */ 30 /* Remux (pad configuration) when powering on/off */
30 void (*remux)(struct device *dev, int slot, int power_on); 31 void (*remux)(struct device *dev, int slot, int power_on);
@@ -34,11 +35,16 @@ struct omap2_hsmmc_info {
34 35
35#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) 36#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
36 37
37void omap2_hsmmc_init(struct omap2_hsmmc_info *); 38void omap_hsmmc_init(struct omap2_hsmmc_info *);
39void omap_hsmmc_late_init(struct omap2_hsmmc_info *);
38 40
39#else 41#else
40 42
41static inline void omap2_hsmmc_init(struct omap2_hsmmc_info *info) 43static inline void omap_hsmmc_init(struct omap2_hsmmc_info *info)
44{
45}
46
47static inline void omap_hsmmc_late_init(struct omap2_hsmmc_info *info)
42{ 48{
43} 49}
44 50
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 6c5826605eae..0e79b7bc6aa4 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -29,7 +29,7 @@
29#include "control.h" 29#include "control.h"
30 30
31static unsigned int omap_revision; 31static unsigned int omap_revision;
32 32static const char *cpu_rev;
33u32 omap_features; 33u32 omap_features;
34 34
35unsigned int omap_rev(void) 35unsigned int omap_rev(void)
@@ -44,6 +44,8 @@ int omap_type(void)
44 44
45 if (cpu_is_omap24xx()) { 45 if (cpu_is_omap24xx()) {
46 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); 46 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
47 } else if (cpu_is_am33xx()) {
48 val = omap_ctrl_readl(AM33XX_CONTROL_STATUS);
47 } else if (cpu_is_omap34xx()) { 49 } else if (cpu_is_omap34xx()) {
48 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); 50 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
49 } else if (cpu_is_omap44xx()) { 51 } else if (cpu_is_omap44xx()) {
@@ -112,7 +114,7 @@ void omap_get_die_id(struct omap_die_id *odi)
112 odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3); 114 odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
113} 115}
114 116
115static void __init omap24xx_check_revision(void) 117void __init omap2xxx_check_revision(void)
116{ 118{
117 int i, j; 119 int i, j;
118 u32 idcode, prod_id; 120 u32 idcode, prod_id;
@@ -166,13 +168,63 @@ static void __init omap24xx_check_revision(void)
166 pr_info("\n"); 168 pr_info("\n");
167} 169}
168 170
171#define OMAP3_SHOW_FEATURE(feat) \
172 if (omap3_has_ ##feat()) \
173 printk(#feat" ");
174
175static void __init omap3_cpuinfo(void)
176{
177 const char *cpu_name;
178
179 /*
180 * OMAP3430 and OMAP3530 are assumed to be same.
181 *
182 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
183 * on available features. Upon detection, update the CPU id
184 * and CPU class bits.
185 */
186 if (cpu_is_omap3630()) {
187 cpu_name = "OMAP3630";
188 } else if (cpu_is_omap3517()) {
189 /* AM35xx devices */
190 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
191 } else if (cpu_is_ti816x()) {
192 cpu_name = "TI816X";
193 } else if (cpu_is_am335x()) {
194 cpu_name = "AM335X";
195 } else if (cpu_is_ti814x()) {
196 cpu_name = "TI814X";
197 } else if (omap3_has_iva() && omap3_has_sgx()) {
198 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
199 cpu_name = "OMAP3430/3530";
200 } else if (omap3_has_iva()) {
201 cpu_name = "OMAP3525";
202 } else if (omap3_has_sgx()) {
203 cpu_name = "OMAP3515";
204 } else {
205 cpu_name = "OMAP3503";
206 }
207
208 /* Print verbose information */
209 pr_info("%s ES%s (", cpu_name, cpu_rev);
210
211 OMAP3_SHOW_FEATURE(l2cache);
212 OMAP3_SHOW_FEATURE(iva);
213 OMAP3_SHOW_FEATURE(sgx);
214 OMAP3_SHOW_FEATURE(neon);
215 OMAP3_SHOW_FEATURE(isp);
216 OMAP3_SHOW_FEATURE(192mhz_clk);
217
218 printk(")\n");
219}
220
169#define OMAP3_CHECK_FEATURE(status,feat) \ 221#define OMAP3_CHECK_FEATURE(status,feat) \
170 if (((status & OMAP3_ ##feat## _MASK) \ 222 if (((status & OMAP3_ ##feat## _MASK) \
171 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \ 223 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \
172 omap_features |= OMAP3_HAS_ ##feat; \ 224 omap_features |= OMAP3_HAS_ ##feat; \
173 } 225 }
174 226
175static void __init omap3_check_features(void) 227void __init omap3xxx_check_features(void)
176{ 228{
177 u32 status; 229 u32 status;
178 230
@@ -199,9 +251,11 @@ static void __init omap3_check_features(void)
199 * TODO: Get additional info (where applicable) 251 * TODO: Get additional info (where applicable)
200 * e.g. Size of L2 cache. 252 * e.g. Size of L2 cache.
201 */ 253 */
254
255 omap3_cpuinfo();
202} 256}
203 257
204static void __init omap4_check_features(void) 258void __init omap4xxx_check_features(void)
205{ 259{
206 u32 si_type; 260 u32 si_type;
207 261
@@ -226,12 +280,13 @@ static void __init omap4_check_features(void)
226 } 280 }
227} 281}
228 282
229static void __init ti81xx_check_features(void) 283void __init ti81xx_check_features(void)
230{ 284{
231 omap_features = OMAP3_HAS_NEON; 285 omap_features = OMAP3_HAS_NEON;
286 omap3_cpuinfo();
232} 287}
233 288
234static void __init omap3_check_revision(const char **cpu_rev) 289void __init omap3xxx_check_revision(void)
235{ 290{
236 u32 cpuid, idcode; 291 u32 cpuid, idcode;
237 u16 hawkeye; 292 u16 hawkeye;
@@ -245,7 +300,7 @@ static void __init omap3_check_revision(const char **cpu_rev)
245 cpuid = read_cpuid(CPUID_ID); 300 cpuid = read_cpuid(CPUID_ID);
246 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { 301 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
247 omap_revision = OMAP3430_REV_ES1_0; 302 omap_revision = OMAP3430_REV_ES1_0;
248 *cpu_rev = "1.0"; 303 cpu_rev = "1.0";
249 return; 304 return;
250 } 305 }
251 306
@@ -266,26 +321,26 @@ static void __init omap3_check_revision(const char **cpu_rev)
266 case 0: /* Take care of early samples */ 321 case 0: /* Take care of early samples */
267 case 1: 322 case 1:
268 omap_revision = OMAP3430_REV_ES2_0; 323 omap_revision = OMAP3430_REV_ES2_0;
269 *cpu_rev = "2.0"; 324 cpu_rev = "2.0";
270 break; 325 break;
271 case 2: 326 case 2:
272 omap_revision = OMAP3430_REV_ES2_1; 327 omap_revision = OMAP3430_REV_ES2_1;
273 *cpu_rev = "2.1"; 328 cpu_rev = "2.1";
274 break; 329 break;
275 case 3: 330 case 3:
276 omap_revision = OMAP3430_REV_ES3_0; 331 omap_revision = OMAP3430_REV_ES3_0;
277 *cpu_rev = "3.0"; 332 cpu_rev = "3.0";
278 break; 333 break;
279 case 4: 334 case 4:
280 omap_revision = OMAP3430_REV_ES3_1; 335 omap_revision = OMAP3430_REV_ES3_1;
281 *cpu_rev = "3.1"; 336 cpu_rev = "3.1";
282 break; 337 break;
283 case 7: 338 case 7:
284 /* FALLTHROUGH */ 339 /* FALLTHROUGH */
285 default: 340 default:
286 /* Use the latest known revision as default */ 341 /* Use the latest known revision as default */
287 omap_revision = OMAP3430_REV_ES3_1_2; 342 omap_revision = OMAP3430_REV_ES3_1_2;
288 *cpu_rev = "3.1.2"; 343 cpu_rev = "3.1.2";
289 } 344 }
290 break; 345 break;
291 case 0xb868: 346 case 0xb868:
@@ -298,13 +353,13 @@ static void __init omap3_check_revision(const char **cpu_rev)
298 switch (rev) { 353 switch (rev) {
299 case 0: 354 case 0:
300 omap_revision = OMAP3517_REV_ES1_0; 355 omap_revision = OMAP3517_REV_ES1_0;
301 *cpu_rev = "1.0"; 356 cpu_rev = "1.0";
302 break; 357 break;
303 case 1: 358 case 1:
304 /* FALLTHROUGH */ 359 /* FALLTHROUGH */
305 default: 360 default:
306 omap_revision = OMAP3517_REV_ES1_1; 361 omap_revision = OMAP3517_REV_ES1_1;
307 *cpu_rev = "1.1"; 362 cpu_rev = "1.1";
308 } 363 }
309 break; 364 break;
310 case 0xb891: 365 case 0xb891:
@@ -313,65 +368,66 @@ static void __init omap3_check_revision(const char **cpu_rev)
313 switch(rev) { 368 switch(rev) {
314 case 0: /* Take care of early samples */ 369 case 0: /* Take care of early samples */
315 omap_revision = OMAP3630_REV_ES1_0; 370 omap_revision = OMAP3630_REV_ES1_0;
316 *cpu_rev = "1.0"; 371 cpu_rev = "1.0";
317 break; 372 break;
318 case 1: 373 case 1:
319 omap_revision = OMAP3630_REV_ES1_1; 374 omap_revision = OMAP3630_REV_ES1_1;
320 *cpu_rev = "1.1"; 375 cpu_rev = "1.1";
321 break; 376 break;
322 case 2: 377 case 2:
323 /* FALLTHROUGH */ 378 /* FALLTHROUGH */
324 default: 379 default:
325 omap_revision = OMAP3630_REV_ES1_2; 380 omap_revision = OMAP3630_REV_ES1_2;
326 *cpu_rev = "1.2"; 381 cpu_rev = "1.2";
327 } 382 }
328 break; 383 break;
329 case 0xb81e: 384 case 0xb81e:
330 switch (rev) { 385 switch (rev) {
331 case 0: 386 case 0:
332 omap_revision = TI8168_REV_ES1_0; 387 omap_revision = TI8168_REV_ES1_0;
333 *cpu_rev = "1.0"; 388 cpu_rev = "1.0";
334 break; 389 break;
335 case 1: 390 case 1:
336 /* FALLTHROUGH */ 391 /* FALLTHROUGH */
337 default: 392 default:
338 omap_revision = TI8168_REV_ES1_1; 393 omap_revision = TI8168_REV_ES1_1;
339 *cpu_rev = "1.1"; 394 cpu_rev = "1.1";
340 break; 395 break;
341 } 396 }
342 break; 397 break;
343 case 0xb944: 398 case 0xb944:
344 omap_revision = AM335X_REV_ES1_0; 399 omap_revision = AM335X_REV_ES1_0;
345 *cpu_rev = "1.0"; 400 cpu_rev = "1.0";
401 break;
346 case 0xb8f2: 402 case 0xb8f2:
347 switch (rev) { 403 switch (rev) {
348 case 0: 404 case 0:
349 /* FALLTHROUGH */ 405 /* FALLTHROUGH */
350 case 1: 406 case 1:
351 omap_revision = TI8148_REV_ES1_0; 407 omap_revision = TI8148_REV_ES1_0;
352 *cpu_rev = "1.0"; 408 cpu_rev = "1.0";
353 break; 409 break;
354 case 2: 410 case 2:
355 omap_revision = TI8148_REV_ES2_0; 411 omap_revision = TI8148_REV_ES2_0;
356 *cpu_rev = "2.0"; 412 cpu_rev = "2.0";
357 break; 413 break;
358 case 3: 414 case 3:
359 /* FALLTHROUGH */ 415 /* FALLTHROUGH */
360 default: 416 default:
361 omap_revision = TI8148_REV_ES2_1; 417 omap_revision = TI8148_REV_ES2_1;
362 *cpu_rev = "2.1"; 418 cpu_rev = "2.1";
363 break; 419 break;
364 } 420 }
365 break; 421 break;
366 default: 422 default:
367 /* Unknown default to latest silicon rev as default */ 423 /* Unknown default to latest silicon rev as default */
368 omap_revision = OMAP3630_REV_ES1_2; 424 omap_revision = OMAP3630_REV_ES1_2;
369 *cpu_rev = "1.2"; 425 cpu_rev = "1.2";
370 pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); 426 pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
371 } 427 }
372} 428}
373 429
374static void __init omap4_check_revision(void) 430void __init omap4xxx_check_revision(void)
375{ 431{
376 u32 idcode; 432 u32 idcode;
377 u16 hawkeye; 433 u16 hawkeye;
@@ -444,89 +500,6 @@ static void __init omap4_check_revision(void)
444 ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf)); 500 ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf));
445} 501}
446 502
447#define OMAP3_SHOW_FEATURE(feat) \
448 if (omap3_has_ ##feat()) \
449 printk(#feat" ");
450
451static void __init omap3_cpuinfo(const char *cpu_rev)
452{
453 const char *cpu_name;
454
455 /*
456 * OMAP3430 and OMAP3530 are assumed to be same.
457 *
458 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
459 * on available features. Upon detection, update the CPU id
460 * and CPU class bits.
461 */
462 if (cpu_is_omap3630()) {
463 cpu_name = "OMAP3630";
464 } else if (cpu_is_omap3517()) {
465 /* AM35xx devices */
466 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
467 } else if (cpu_is_ti816x()) {
468 cpu_name = "TI816X";
469 } else if (cpu_is_am335x()) {
470 cpu_name = "AM335X";
471 } else if (cpu_is_ti814x()) {
472 cpu_name = "TI814X";
473 } else if (omap3_has_iva() && omap3_has_sgx()) {
474 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
475 cpu_name = "OMAP3430/3530";
476 } else if (omap3_has_iva()) {
477 cpu_name = "OMAP3525";
478 } else if (omap3_has_sgx()) {
479 cpu_name = "OMAP3515";
480 } else {
481 cpu_name = "OMAP3503";
482 }
483
484 /* Print verbose information */
485 pr_info("%s ES%s (", cpu_name, cpu_rev);
486
487 OMAP3_SHOW_FEATURE(l2cache);
488 OMAP3_SHOW_FEATURE(iva);
489 OMAP3_SHOW_FEATURE(sgx);
490 OMAP3_SHOW_FEATURE(neon);
491 OMAP3_SHOW_FEATURE(isp);
492 OMAP3_SHOW_FEATURE(192mhz_clk);
493
494 printk(")\n");
495}
496
497/*
498 * Try to detect the exact revision of the omap we're running on
499 */
500void __init omap2_check_revision(void)
501{
502 const char *cpu_rev;
503
504 /*
505 * At this point we have an idea about the processor revision set
506 * earlier with omap2_set_globals_tap().
507 */
508 if (cpu_is_omap24xx()) {
509 omap24xx_check_revision();
510 } else if (cpu_is_omap34xx()) {
511 omap3_check_revision(&cpu_rev);
512
513 /* TI81XX doesn't have feature register */
514 if (!cpu_is_ti81xx())
515 omap3_check_features();
516 else
517 ti81xx_check_features();
518
519 omap3_cpuinfo(cpu_rev);
520 return;
521 } else if (cpu_is_omap44xx()) {
522 omap4_check_revision();
523 omap4_check_features();
524 return;
525 } else {
526 pr_err("OMAP revision unknown, please fix!\n");
527 }
528}
529
530/* 503/*
531 * Set up things for map_io and processor detection later on. Gets called 504 * Set up things for map_io and processor detection later on. Gets called
532 * pretty much first thing from board init. For multi-omap, this gets 505 * pretty much first thing from board init. For multi-omap, this gets
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
deleted file mode 100644
index 56964a0c4c7e..000000000000
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for OMAP-based platforms
5 *
6 * Copyright (C) 2009 Texas Instruments
7 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14 .macro disable_fiq
15 .endm
16
17 .macro arch_ret_to_user, tmp1, tmp2
18 .endm
diff --git a/arch/arm/mach-omap2/include/mach/io.h b/arch/arm/mach-omap2/include/mach/io.h
index fd78f31aa1ad..b8758c8a9394 100644
--- a/arch/arm/mach-omap2/include/mach/io.h
+++ b/arch/arm/mach-omap2/include/mach/io.h
@@ -1,5 +1,49 @@
1/* 1/*
2 * arch/arm/mach-omap2/include/mach/io.h 2 * arch/arm/mach-omap2/include/mach/io.h
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from arch/arm/mach-sa1100/include/mach/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
24 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * Modifications:
33 * 06-12-1997 RMK Created.
34 * 07-04-1999 RMK Major cleanup
3 */ 35 */
4 36
5#include <plat/io.h> 37#ifndef __ASM_ARM_ARCH_IO_H
38#define __ASM_ARM_ARCH_IO_H
39
40#define IO_SPACE_LIMIT 0xffffffff
41
42/*
43 * We don't actually have real ISA nor PCI buses, but there is so many
44 * drivers out there that might just work if we fake them...
45 */
46#define __io(a) __typesafe_io(a)
47#define __mem_pci(a) (a)
48
49#endif
diff --git a/arch/arm/mach-omap2/include/mach/system.h b/arch/arm/mach-omap2/include/mach/system.h
deleted file mode 100644
index d488721ab90b..000000000000
--- a/arch/arm/mach-omap2/include/mach/system.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-omap2/include/mach/system.h
3 */
4
5#include <plat/system.h>
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 3f174d51f67f..065bd768987c 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -21,36 +21,32 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/omapfb.h>
25 24
26#include <asm/tlb.h> 25#include <asm/tlb.h>
27
28#include <asm/mach/map.h> 26#include <asm/mach/map.h>
29 27
30#include <plat/sram.h> 28#include <plat/sram.h>
31#include <plat/sdrc.h> 29#include <plat/sdrc.h>
32#include <plat/serial.h> 30#include <plat/serial.h>
33
34#include "clock2xxx.h"
35#include "clock3xxx.h"
36#include "clock44xx.h"
37
38#include "common.h"
39#include <plat/omap-pm.h> 31#include <plat/omap-pm.h>
32#include <plat/omap_hwmod.h>
33#include <plat/multi.h>
34
35#include "iomap.h"
40#include "voltage.h" 36#include "voltage.h"
41#include "powerdomain.h" 37#include "powerdomain.h"
42
43#include "clockdomain.h" 38#include "clockdomain.h"
44#include <plat/omap_hwmod.h>
45#include <plat/multi.h>
46#include "common.h" 39#include "common.h"
40#include "clock2xxx.h"
41#include "clock3xxx.h"
42#include "clock44xx.h"
47 43
48/* 44/*
49 * The machine specific code may provide the extra mapping besides the 45 * The machine specific code may provide the extra mapping besides the
50 * default mapping provided here. 46 * default mapping provided here.
51 */ 47 */
52 48
53#ifdef CONFIG_ARCH_OMAP2 49#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
54static struct map_desc omap24xx_io_desc[] __initdata = { 50static struct map_desc omap24xx_io_desc[] __initdata = {
55 { 51 {
56 .virtual = L3_24XX_VIRT, 52 .virtual = L3_24XX_VIRT,
@@ -307,6 +303,7 @@ void __init omapam33xx_map_common_io(void)
307void __init omap44xx_map_common_io(void) 303void __init omap44xx_map_common_io(void)
308{ 304{
309 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); 305 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
306 omap_barriers_init();
310} 307}
311#endif 308#endif
312 309
@@ -351,7 +348,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
351 348
352static void __init omap_common_init_early(void) 349static void __init omap_common_init_early(void)
353{ 350{
354 omap2_check_revision();
355 omap_init_consistent_dma_size(); 351 omap_init_consistent_dma_size();
356} 352}
357 353
@@ -388,10 +384,11 @@ static void __init omap_hwmod_init_postsetup(void)
388 omap_pm_if_early_init(); 384 omap_pm_if_early_init();
389} 385}
390 386
391#ifdef CONFIG_ARCH_OMAP2 387#ifdef CONFIG_SOC_OMAP2420
392void __init omap2420_init_early(void) 388void __init omap2420_init_early(void)
393{ 389{
394 omap2_set_globals_242x(); 390 omap2_set_globals_242x();
391 omap2xxx_check_revision();
395 omap_common_init_early(); 392 omap_common_init_early();
396 omap2xxx_voltagedomains_init(); 393 omap2xxx_voltagedomains_init();
397 omap242x_powerdomains_init(); 394 omap242x_powerdomains_init();
@@ -400,10 +397,13 @@ void __init omap2420_init_early(void)
400 omap_hwmod_init_postsetup(); 397 omap_hwmod_init_postsetup();
401 omap2420_clk_init(); 398 omap2420_clk_init();
402} 399}
400#endif
403 401
402#ifdef CONFIG_SOC_OMAP2430
404void __init omap2430_init_early(void) 403void __init omap2430_init_early(void)
405{ 404{
406 omap2_set_globals_243x(); 405 omap2_set_globals_243x();
406 omap2xxx_check_revision();
407 omap_common_init_early(); 407 omap_common_init_early();
408 omap2xxx_voltagedomains_init(); 408 omap2xxx_voltagedomains_init();
409 omap243x_powerdomains_init(); 409 omap243x_powerdomains_init();
@@ -422,6 +422,8 @@ void __init omap2430_init_early(void)
422void __init omap3_init_early(void) 422void __init omap3_init_early(void)
423{ 423{
424 omap2_set_globals_3xxx(); 424 omap2_set_globals_3xxx();
425 omap3xxx_check_revision();
426 omap3xxx_check_features();
425 omap_common_init_early(); 427 omap_common_init_early();
426 omap3xxx_voltagedomains_init(); 428 omap3xxx_voltagedomains_init();
427 omap3xxx_powerdomains_init(); 429 omap3xxx_powerdomains_init();
@@ -454,6 +456,8 @@ void __init am35xx_init_early(void)
454void __init ti81xx_init_early(void) 456void __init ti81xx_init_early(void)
455{ 457{
456 omap2_set_globals_ti81xx(); 458 omap2_set_globals_ti81xx();
459 omap3xxx_check_revision();
460 ti81xx_check_features();
457 omap_common_init_early(); 461 omap_common_init_early();
458 omap3xxx_voltagedomains_init(); 462 omap3xxx_voltagedomains_init();
459 omap3xxx_powerdomains_init(); 463 omap3xxx_powerdomains_init();
@@ -468,6 +472,8 @@ void __init ti81xx_init_early(void)
468void __init omap4430_init_early(void) 472void __init omap4430_init_early(void)
469{ 473{
470 omap2_set_globals_443x(); 474 omap2_set_globals_443x();
475 omap4xxx_check_revision();
476 omap4xxx_check_features();
471 omap_common_init_early(); 477 omap_common_init_early();
472 omap44xx_voltagedomains_init(); 478 omap44xx_voltagedomains_init();
473 omap44xx_powerdomains_init(); 479 omap44xx_powerdomains_init();
@@ -488,43 +494,3 @@ void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
488 _omap2_init_reprogram_sdrc(); 494 _omap2_init_reprogram_sdrc();
489 } 495 }
490} 496}
491
492/*
493 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
494 */
495
496u8 omap_readb(u32 pa)
497{
498 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
499}
500EXPORT_SYMBOL(omap_readb);
501
502u16 omap_readw(u32 pa)
503{
504 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
505}
506EXPORT_SYMBOL(omap_readw);
507
508u32 omap_readl(u32 pa)
509{
510 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
511}
512EXPORT_SYMBOL(omap_readl);
513
514void omap_writeb(u8 v, u32 pa)
515{
516 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
517}
518EXPORT_SYMBOL(omap_writeb);
519
520void omap_writew(u16 v, u32 pa)
521{
522 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
523}
524EXPORT_SYMBOL(omap_writew);
525
526void omap_writel(u32 v, u32 pa)
527{
528 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
529}
530EXPORT_SYMBOL(omap_writel);
diff --git a/arch/arm/mach-omap2/iomap.h b/arch/arm/mach-omap2/iomap.h
new file mode 100644
index 000000000000..e6f958165296
--- /dev/null
+++ b/arch/arm/mach-omap2/iomap.h
@@ -0,0 +1,203 @@
1/*
2 * IO mappings for OMAP2+
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifdef __ASSEMBLER__
26#define IOMEM(x) (x)
27#else
28#define IOMEM(x) ((void __force __iomem *)(x))
29#endif
30
31#define OMAP2_L3_IO_OFFSET 0x90000000
32#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
33
34#define OMAP2_L4_IO_OFFSET 0xb2000000
35#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
36
37#define OMAP4_L3_IO_OFFSET 0xb4000000
38#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
39
40#define AM33XX_L4_WK_IO_OFFSET 0xb5000000
41#define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
42
43#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
44#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
45
46#define OMAP4_GPMC_IO_OFFSET 0xa9000000
47#define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
48
49#define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
50#define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
51
52/*
53 * ----------------------------------------------------------------------------
54 * Omap2 specific IO mapping
55 * ----------------------------------------------------------------------------
56 */
57
58/* We map both L3 and L4 on OMAP2 */
59#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
60#define L3_24XX_VIRT (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
61#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
62#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
63#define L4_24XX_VIRT (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
64#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
65
66#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
67#define L4_WK_243X_VIRT (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
68#define L4_WK_243X_SIZE SZ_1M
69#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE
70#define OMAP243X_GPMC_VIRT (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
71 /* 0x6e000000 --> 0xfe000000 */
72#define OMAP243X_GPMC_SIZE SZ_1M
73#define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE
74 /* 0x6D000000 --> 0xfd000000 */
75#define OMAP243X_SDRC_VIRT (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
76#define OMAP243X_SDRC_SIZE SZ_1M
77#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE
78 /* 0x6c000000 --> 0xfc000000 */
79#define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
80#define OMAP243X_SMS_SIZE SZ_1M
81
82/* 2420 IVA */
83#define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE
84 /* 0x58000000 --> 0xfc100000 */
85#define DSP_MEM_2420_VIRT 0xfc100000
86#define DSP_MEM_2420_SIZE 0x28000
87#define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE
88 /* 0x59000000 --> 0xfc128000 */
89#define DSP_IPI_2420_VIRT 0xfc128000
90#define DSP_IPI_2420_SIZE SZ_4K
91#define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE
92 /* 0x5a000000 --> 0xfc129000 */
93#define DSP_MMU_2420_VIRT 0xfc129000
94#define DSP_MMU_2420_SIZE SZ_4K
95
96/* 2430 IVA2.1 - currently unmapped */
97
98/*
99 * ----------------------------------------------------------------------------
100 * Omap3 specific IO mapping
101 * ----------------------------------------------------------------------------
102 */
103
104/* We map both L3 and L4 on OMAP3 */
105#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */
106#define L3_34XX_VIRT (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
107#define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
108
109#define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */
110#define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
111#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
112
113/*
114 * ----------------------------------------------------------------------------
115 * AM33XX specific IO mapping
116 * ----------------------------------------------------------------------------
117 */
118#define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
119#define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
120#define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
121
122/*
123 * Need to look at the Size 4M for L4.
124 * VPOM3430 was not working for Int controller
125 */
126
127#define L4_PER_34XX_PHYS L4_PER_34XX_BASE
128 /* 0x49000000 --> 0xfb000000 */
129#define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
130#define L4_PER_34XX_SIZE SZ_1M
131
132#define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE
133 /* 0x54000000 --> 0xfe800000 */
134#define L4_EMU_34XX_VIRT (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
135#define L4_EMU_34XX_SIZE SZ_8M
136
137#define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE
138 /* 0x6e000000 --> 0xfe000000 */
139#define OMAP34XX_GPMC_VIRT (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
140#define OMAP34XX_GPMC_SIZE SZ_1M
141
142#define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE
143 /* 0x6c000000 --> 0xfc000000 */
144#define OMAP343X_SMS_VIRT (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
145#define OMAP343X_SMS_SIZE SZ_1M
146
147#define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE
148 /* 0x6D000000 --> 0xfd000000 */
149#define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
150#define OMAP343X_SDRC_SIZE SZ_1M
151
152/* 3430 IVA - currently unmapped */
153
154/*
155 * ----------------------------------------------------------------------------
156 * Omap4 specific IO mapping
157 * ----------------------------------------------------------------------------
158 */
159
160/* We map both L3 and L4 on OMAP4 */
161#define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */
162#define L3_44XX_VIRT (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
163#define L3_44XX_SIZE SZ_1M
164
165#define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */
166#define L4_44XX_VIRT (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
167#define L4_44XX_SIZE SZ_4M
168
169#define L4_PER_44XX_PHYS L4_PER_44XX_BASE
170 /* 0x48000000 --> 0xfa000000 */
171#define L4_PER_44XX_VIRT (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
172#define L4_PER_44XX_SIZE SZ_4M
173
174#define L4_ABE_44XX_PHYS L4_ABE_44XX_BASE
175 /* 0x49000000 --> 0xfb000000 */
176#define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
177#define L4_ABE_44XX_SIZE SZ_1M
178
179#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
180 /* 0x54000000 --> 0xfe800000 */
181#define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
182#define L4_EMU_44XX_SIZE SZ_8M
183
184#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
185 /* 0x50000000 --> 0xf9000000 */
186#define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
187#define OMAP44XX_GPMC_SIZE SZ_1M
188
189
190#define OMAP44XX_EMIF1_PHYS OMAP44XX_EMIF1_BASE
191 /* 0x4c000000 --> 0xfd100000 */
192#define OMAP44XX_EMIF1_VIRT (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)
193#define OMAP44XX_EMIF1_SIZE SZ_1M
194
195#define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
196 /* 0x4d000000 --> 0xfd200000 */
197#define OMAP44XX_EMIF2_SIZE SZ_1M
198#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE)
199
200#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
201 /* 0x4e000000 --> 0xfd300000 */
202#define OMAP44XX_DMM_SIZE SZ_1M
203#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 1fef061f7927..65f0d2571c9a 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -11,13 +11,20 @@
11 * for more details. 11 * for more details.
12 */ 12 */
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/module.h>
14#include <linux/init.h> 15#include <linux/init.h>
15#include <linux/interrupt.h> 16#include <linux/interrupt.h>
16#include <linux/io.h> 17#include <linux/io.h>
17#include <mach/hardware.h> 18
18#include <asm/exception.h> 19#include <asm/exception.h>
19#include <asm/mach/irq.h> 20#include <asm/mach/irq.h>
21#include <linux/irqdomain.h>
22#include <linux/of.h>
23#include <linux/of_address.h>
20 24
25#include <mach/hardware.h>
26
27#include "iomap.h"
21 28
22/* selected INTC register offsets */ 29/* selected INTC register offsets */
23 30
@@ -57,6 +64,8 @@ static struct omap_irq_bank {
57 }, 64 },
58}; 65};
59 66
67static struct irq_domain *domain;
68
60/* Structure to save interrupt controller context */ 69/* Structure to save interrupt controller context */
61struct omap3_intc_regs { 70struct omap3_intc_regs {
62 u32 sysconfig; 71 u32 sysconfig;
@@ -147,17 +156,27 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
147 IRQ_NOREQUEST | IRQ_NOPROBE, 0); 156 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
148} 157}
149 158
150static void __init omap_init_irq(u32 base, int nr_irqs) 159static void __init omap_init_irq(u32 base, int nr_irqs,
160 struct device_node *node)
151{ 161{
152 void __iomem *omap_irq_base; 162 void __iomem *omap_irq_base;
153 unsigned long nr_of_irqs = 0; 163 unsigned long nr_of_irqs = 0;
154 unsigned int nr_banks = 0; 164 unsigned int nr_banks = 0;
155 int i, j; 165 int i, j, irq_base;
156 166
157 omap_irq_base = ioremap(base, SZ_4K); 167 omap_irq_base = ioremap(base, SZ_4K);
158 if (WARN_ON(!omap_irq_base)) 168 if (WARN_ON(!omap_irq_base))
159 return; 169 return;
160 170
171 irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);
172 if (irq_base < 0) {
173 pr_warn("Couldn't allocate IRQ numbers\n");
174 irq_base = 0;
175 }
176
177 domain = irq_domain_add_legacy(node, nr_irqs, irq_base, 0,
178 &irq_domain_simple_ops, NULL);
179
161 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { 180 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
162 struct omap_irq_bank *bank = irq_banks + i; 181 struct omap_irq_bank *bank = irq_banks + i;
163 182
@@ -166,36 +185,36 @@ static void __init omap_init_irq(u32 base, int nr_irqs)
166 /* Static mapping, never released */ 185 /* Static mapping, never released */
167 bank->base_reg = ioremap(base, SZ_4K); 186 bank->base_reg = ioremap(base, SZ_4K);
168 if (!bank->base_reg) { 187 if (!bank->base_reg) {
169 printk(KERN_ERR "Could not ioremap irq bank%i\n", i); 188 pr_err("Could not ioremap irq bank%i\n", i);
170 continue; 189 continue;
171 } 190 }
172 191
173 omap_irq_bank_init_one(bank); 192 omap_irq_bank_init_one(bank);
174 193
175 for (j = 0; j < bank->nr_irqs; j += 32) 194 for (j = 0; j < bank->nr_irqs; j += 32)
176 omap_alloc_gc(bank->base_reg + j, j, 32); 195 omap_alloc_gc(bank->base_reg + j, j + irq_base, 32);
177 196
178 nr_of_irqs += bank->nr_irqs; 197 nr_of_irqs += bank->nr_irqs;
179 nr_banks++; 198 nr_banks++;
180 } 199 }
181 200
182 printk(KERN_INFO "Total of %ld interrupts on %d active controller%s\n", 201 pr_info("Total of %ld interrupts on %d active controller%s\n",
183 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); 202 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
184} 203}
185 204
186void __init omap2_init_irq(void) 205void __init omap2_init_irq(void)
187{ 206{
188 omap_init_irq(OMAP24XX_IC_BASE, 96); 207 omap_init_irq(OMAP24XX_IC_BASE, 96, NULL);
189} 208}
190 209
191void __init omap3_init_irq(void) 210void __init omap3_init_irq(void)
192{ 211{
193 omap_init_irq(OMAP34XX_IC_BASE, 96); 212 omap_init_irq(OMAP34XX_IC_BASE, 96, NULL);
194} 213}
195 214
196void __init ti81xx_init_irq(void) 215void __init ti81xx_init_irq(void)
197{ 216{
198 omap_init_irq(OMAP34XX_IC_BASE, 128); 217 omap_init_irq(OMAP34XX_IC_BASE, 128, NULL);
199} 218}
200 219
201static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs) 220static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
@@ -225,8 +244,10 @@ out:
225 irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET); 244 irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET);
226 irqnr &= ACTIVEIRQ_MASK; 245 irqnr &= ACTIVEIRQ_MASK;
227 246
228 if (irqnr) 247 if (irqnr) {
248 irqnr = irq_find_mapping(domain, irqnr);
229 handle_IRQ(irqnr, regs); 249 handle_IRQ(irqnr, regs);
250 }
230 } while (irqnr); 251 } while (irqnr);
231} 252}
232 253
@@ -236,6 +257,28 @@ asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs
236 omap_intc_handle_irq(base_addr, regs); 257 omap_intc_handle_irq(base_addr, regs);
237} 258}
238 259
260int __init omap_intc_of_init(struct device_node *node,
261 struct device_node *parent)
262{
263 struct resource res;
264 u32 nr_irqs = 96;
265
266 if (WARN_ON(!node))
267 return -ENODEV;
268
269 if (of_address_to_resource(node, 0, &res)) {
270 WARN(1, "unable to get intc registers\n");
271 return -EINVAL;
272 }
273
274 if (of_property_read_u32(node, "ti,intc-size", &nr_irqs))
275 pr_warn("unable to get intc-size, default to %d\n", nr_irqs);
276
277 omap_init_irq(res.start, nr_irqs, of_node_get(node));
278
279 return 0;
280}
281
239#ifdef CONFIG_ARCH_OMAP3 282#ifdef CONFIG_ARCH_OMAP3
240static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; 283static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
241 284
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 609ea2ded7e3..415a6f1cf419 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -281,8 +281,16 @@ static struct omap_mbox mbox_iva_info = {
281 .ops = &omap2_mbox_ops, 281 .ops = &omap2_mbox_ops,
282 .priv = &omap2_mbox_iva_priv, 282 .priv = &omap2_mbox_iva_priv,
283}; 283};
284#endif
284 285
285struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL }; 286#ifdef CONFIG_ARCH_OMAP2
287struct omap_mbox *omap2_mboxes[] = {
288 &mbox_dsp_info,
289#ifdef CONFIG_SOC_OMAP2420
290 &mbox_iva_info,
291#endif
292 NULL
293};
286#endif 294#endif
287 295
288#if defined(CONFIG_ARCH_OMAP4) 296#if defined(CONFIG_ARCH_OMAP4)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index fb4bcf81a183..577cb77db26c 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -34,7 +34,7 @@
34#include "cm2xxx_3xxx.h" 34#include "cm2xxx_3xxx.h"
35#include "cm-regbits-34xx.h" 35#include "cm-regbits-34xx.h"
36 36
37/* McBSP internal signal muxing function */ 37/* McBSP1 internal signal muxing function for OMAP2/3 */
38static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal, 38static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
39 const char *src) 39 const char *src)
40{ 40{
@@ -65,6 +65,42 @@ static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
65 return 0; 65 return 0;
66} 66}
67 67
68/* McBSP4 internal signal muxing function for OMAP4 */
69#define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX (1 << 31)
70#define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX (1 << 30)
71static int omap4_mcbsp4_mux_rx_clk(struct device *dev, const char *signal,
72 const char *src)
73{
74 u32 v;
75
76 /*
77 * In CONTROL_MCBSPLP register only bit 30 (CLKR mux), and bit 31 (FSR
78 * mux) is used */
79 v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
80
81 if (!strcmp(signal, "clkr")) {
82 if (!strcmp(src, "clkr"))
83 v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
84 else if (!strcmp(src, "clkx"))
85 v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
86 else
87 return -EINVAL;
88 } else if (!strcmp(signal, "fsr")) {
89 if (!strcmp(src, "fsr"))
90 v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
91 else if (!strcmp(src, "fsx"))
92 v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
93 else
94 return -EINVAL;
95 } else {
96 return -EINVAL;
97 }
98
99 omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
100
101 return 0;
102}
103
68/* McBSP CLKS source switching function */ 104/* McBSP CLKS source switching function */
69static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk, 105static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
70 const char *src) 106 const char *src)
@@ -122,7 +158,7 @@ static int omap3_enable_st_clock(unsigned int id, bool enable)
122 return 0; 158 return 0;
123} 159}
124 160
125static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) 161static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
126{ 162{
127 int id, count = 1; 163 int id, count = 1;
128 char *name = "omap-mcbsp"; 164 char *name = "omap-mcbsp";
@@ -146,9 +182,15 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
146 pdata->has_ccr = true; 182 pdata->has_ccr = true;
147 } 183 }
148 pdata->set_clk_src = omap2_mcbsp_set_clk_src; 184 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
149 if (id == 1) 185
186 /* On OMAP2/3 the McBSP1 port has 6 pin configuration */
187 if (id == 1 && oh->class->rev < MCBSP_CONFIG_TYPE4)
150 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk; 188 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
151 189
190 /* On OMAP4 the McBSP4 port has 6 pin configuration */
191 if (id == 4 && oh->class->rev == MCBSP_CONFIG_TYPE4)
192 pdata->mux_signal = omap4_mcbsp4_mux_rx_clk;
193
152 if (oh->class->rev == MCBSP_CONFIG_TYPE3) { 194 if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
153 if (id == 2) 195 if (id == 2)
154 /* The FIFO has 1024 + 256 locations */ 196 /* The FIFO has 1024 + 256 locations */
@@ -180,7 +222,6 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
180 name, oh->name); 222 name, oh->name);
181 return PTR_ERR(pdev); 223 return PTR_ERR(pdev);
182 } 224 }
183 omap_mcbsp_count++;
184 return 0; 225 return 0;
185} 226}
186 227
@@ -188,11 +229,6 @@ static int __init omap2_mcbsp_init(void)
188{ 229{
189 omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL); 230 omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
190 231
191 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), 232 return 0;
192 GFP_KERNEL);
193 if (!mcbsp_ptr)
194 return -ENOMEM;
195
196 return omap_mcbsp_init();
197} 233}
198arch_initcall(omap2_mcbsp_init); 234arch_initcall(omap2_mcbsp_init);
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index e1cc75d1a57a..f26b2faa1694 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1094,8 +1094,8 @@ static void omap_mux_init_package(struct omap_mux *superset,
1094 omap_mux_package_init_balls(package_balls, superset); 1094 omap_mux_package_init_balls(package_balls, superset);
1095} 1095}
1096 1096
1097static void omap_mux_init_signals(struct omap_mux_partition *partition, 1097static void __init omap_mux_init_signals(struct omap_mux_partition *partition,
1098 struct omap_board_mux *board_mux) 1098 struct omap_board_mux *board_mux)
1099{ 1099{
1100 omap_mux_set_cmdline_signals(); 1100 omap_mux_set_cmdline_signals();
1101 omap_mux_write_array(partition, board_mux); 1101 omap_mux_write_array(partition, board_mux);
@@ -1109,8 +1109,8 @@ static void omap_mux_init_package(struct omap_mux *superset,
1109{ 1109{
1110} 1110}
1111 1111
1112static void omap_mux_init_signals(struct omap_mux_partition *partition, 1112static void __init omap_mux_init_signals(struct omap_mux_partition *partition,
1113 struct omap_board_mux *board_mux) 1113 struct omap_board_mux *board_mux)
1114{ 1114{
1115} 1115}
1116 1116
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 2132308ad1e4..69fe060a0b75 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -246,7 +246,7 @@ static inline void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
246{ 246{
247} 247}
248 248
249static struct omap_board_mux *board_mux __initdata __maybe_unused; 249static struct omap_board_mux *board_mux __maybe_unused;
250 250
251#endif 251#endif
252 252
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index b13ef7ef5ef4..503ac777a2ba 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -18,6 +18,7 @@
18#include <linux/linkage.h> 18#include <linux/linkage.h>
19#include <linux/init.h> 19#include <linux/init.h>
20 20
21 __CPUINIT
21/* 22/*
22 * OMAP4 specific entry point for secondary CPU to jump from ROM 23 * OMAP4 specific entry point for secondary CPU to jump from ROM
23 * code. This routine also provides a holding flag into which 24 * code. This routine also provides a holding flag into which
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index adbe4d8c7caf..56c345b8b931 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -33,7 +33,7 @@ int platform_cpu_kill(unsigned int cpu)
33 * platform-specific code to shutdown a CPU 33 * platform-specific code to shutdown a CPU
34 * Called with IRQs disabled 34 * Called with IRQs disabled
35 */ 35 */
36void platform_cpu_die(unsigned int cpu) 36void __ref platform_cpu_die(unsigned int cpu)
37{ 37{
38 unsigned int this_cpu; 38 unsigned int this_cpu;
39 39
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index b8822048e409..ac49384d0285 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -150,7 +150,8 @@ err_out:
150 platform_device_put(omap_iommu_pdev[i]); 150 platform_device_put(omap_iommu_pdev[i]);
151 return err; 151 return err;
152} 152}
153module_init(omap_iommu_init); 153/* must be ready before omap3isp is probed */
154subsys_initcall(omap_iommu_init);
154 155
155static void __exit omap_iommu_exit(void) 156static void __exit omap_iommu_exit(void)
156{ 157{
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 1d5d01056558..63ab686834c1 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -263,12 +263,10 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
263 * In MPUSS OSWR or device OFF, interrupt controller contest is lost. 263 * In MPUSS OSWR or device OFF, interrupt controller contest is lost.
264 */ 264 */
265 mpuss_clear_prev_logic_pwrst(); 265 mpuss_clear_prev_logic_pwrst();
266 pwrdm_clear_all_prev_pwrst(mpuss_pd);
267 if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) && 266 if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) &&
268 (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF)) 267 (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF))
269 save_state = 2; 268 save_state = 2;
270 269
271 clear_cpu_prev_pwrst(cpu);
272 cpu_clear_prev_logic_pwrst(cpu); 270 cpu_clear_prev_logic_pwrst(cpu);
273 set_cpu_next_pwrst(cpu, power_state); 271 set_cpu_next_pwrst(cpu, power_state);
274 set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume)); 272 set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume));
@@ -300,7 +298,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
300 * @cpu : CPU ID 298 * @cpu : CPU ID
301 * @power_state: CPU low power state. 299 * @power_state: CPU low power state.
302 */ 300 */
303int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 301int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
304{ 302{
305 unsigned int cpu_state = 0; 303 unsigned int cpu_state = 0;
306 304
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index c1bf3ef0ba02..deffbf1c9627 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -23,11 +23,12 @@
23#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
24#include <asm/hardware/gic.h> 24#include <asm/hardware/gic.h>
25#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <mach/omap-secure.h> 28#include <mach/omap-secure.h>
28 29
30#include "iomap.h"
29#include "common.h" 31#include "common.h"
30
31#include "clockdomain.h" 32#include "clockdomain.h"
32 33
33/* SCU base address */ 34/* SCU base address */
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index d3d8971d7f30..42cd7fb52414 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -43,7 +43,6 @@
43 43
44static void __iomem *wakeupgen_base; 44static void __iomem *wakeupgen_base;
45static void __iomem *sar_base; 45static void __iomem *sar_base;
46static DEFINE_PER_CPU(u32 [NR_REG_BANKS], irqmasks);
47static DEFINE_SPINLOCK(wakeupgen_lock); 46static DEFINE_SPINLOCK(wakeupgen_lock);
48static unsigned int irq_target_cpu[NR_IRQS]; 47static unsigned int irq_target_cpu[NR_IRQS];
49 48
@@ -67,14 +66,6 @@ static inline void sar_writel(u32 val, u32 offset, u8 idx)
67 __raw_writel(val, sar_base + offset + (idx * 4)); 66 __raw_writel(val, sar_base + offset + (idx * 4));
68} 67}
69 68
70static void _wakeupgen_set_all(unsigned int cpu, unsigned int reg)
71{
72 u8 i;
73
74 for (i = 0; i < NR_REG_BANKS; i++)
75 wakeupgen_writel(reg, i, cpu);
76}
77
78static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index) 69static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index)
79{ 70{
80 unsigned int spi_irq; 71 unsigned int spi_irq;
@@ -130,22 +121,6 @@ static void _wakeupgen_set(unsigned int irq, unsigned int cpu)
130 wakeupgen_writel(val, i, cpu); 121 wakeupgen_writel(val, i, cpu);
131} 122}
132 123
133static void _wakeupgen_save_masks(unsigned int cpu)
134{
135 u8 i;
136
137 for (i = 0; i < NR_REG_BANKS; i++)
138 per_cpu(irqmasks, cpu)[i] = wakeupgen_readl(i, cpu);
139}
140
141static void _wakeupgen_restore_masks(unsigned int cpu)
142{
143 u8 i;
144
145 for (i = 0; i < NR_REG_BANKS; i++)
146 wakeupgen_writel(per_cpu(irqmasks, cpu)[i], i, cpu);
147}
148
149/* 124/*
150 * Architecture specific Mask extension 125 * Architecture specific Mask extension
151 */ 126 */
@@ -170,6 +145,33 @@ static void wakeupgen_unmask(struct irq_data *d)
170 spin_unlock_irqrestore(&wakeupgen_lock, flags); 145 spin_unlock_irqrestore(&wakeupgen_lock, flags);
171} 146}
172 147
148#ifdef CONFIG_HOTPLUG_CPU
149static DEFINE_PER_CPU(u32 [NR_REG_BANKS], irqmasks);
150
151static void _wakeupgen_save_masks(unsigned int cpu)
152{
153 u8 i;
154
155 for (i = 0; i < NR_REG_BANKS; i++)
156 per_cpu(irqmasks, cpu)[i] = wakeupgen_readl(i, cpu);
157}
158
159static void _wakeupgen_restore_masks(unsigned int cpu)
160{
161 u8 i;
162
163 for (i = 0; i < NR_REG_BANKS; i++)
164 wakeupgen_writel(per_cpu(irqmasks, cpu)[i], i, cpu);
165}
166
167static void _wakeupgen_set_all(unsigned int cpu, unsigned int reg)
168{
169 u8 i;
170
171 for (i = 0; i < NR_REG_BANKS; i++)
172 wakeupgen_writel(reg, i, cpu);
173}
174
173/* 175/*
174 * Mask or unmask all interrupts on given CPU. 176 * Mask or unmask all interrupts on given CPU.
175 * 0 = Mask all interrupts on the 'cpu' 177 * 0 = Mask all interrupts on the 'cpu'
@@ -191,6 +193,7 @@ static void wakeupgen_irqmask_all(unsigned int cpu, unsigned int set)
191 } 193 }
192 spin_unlock_irqrestore(&wakeupgen_lock, flags); 194 spin_unlock_irqrestore(&wakeupgen_lock, flags);
193} 195}
196#endif
194 197
195#ifdef CONFIG_CPU_PM 198#ifdef CONFIG_CPU_PM
196/* 199/*
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 40a8fbc07e4b..70de277f5c15 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -24,12 +24,14 @@
24 24
25#include <plat/irqs.h> 25#include <plat/irqs.h>
26#include <plat/sram.h> 26#include <plat/sram.h>
27#include <plat/omap-secure.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <mach/omap-wakeupgen.h> 30#include <mach/omap-wakeupgen.h>
30 31
31#include "common.h" 32#include "common.h"
32#include "omap4-sar-layout.h" 33#include "omap4-sar-layout.h"
34#include <linux/export.h>
33 35
34#ifdef CONFIG_CACHE_L2X0 36#ifdef CONFIG_CACHE_L2X0
35static void __iomem *l2cache_base; 37static void __iomem *l2cache_base;
@@ -43,6 +45,9 @@ static void __iomem *sar_ram_base;
43 45
44void __iomem *dram_sync, *sram_sync; 46void __iomem *dram_sync, *sram_sync;
45 47
48static phys_addr_t paddr;
49static u32 size;
50
46void omap_bus_sync(void) 51void omap_bus_sync(void)
47{ 52{
48 if (dram_sync && sram_sync) { 53 if (dram_sync && sram_sync) {
@@ -51,19 +56,22 @@ void omap_bus_sync(void)
51 isb(); 56 isb();
52 } 57 }
53} 58}
59EXPORT_SYMBOL(omap_bus_sync);
54 60
55static int __init omap_barriers_init(void) 61/* Steal one page physical memory for barrier implementation */
62int __init omap_barrier_reserve_memblock(void)
56{ 63{
57 struct map_desc dram_io_desc[1];
58 phys_addr_t paddr;
59 u32 size;
60
61 if (!cpu_is_omap44xx())
62 return -ENODEV;
63 64
64 size = ALIGN(PAGE_SIZE, SZ_1M); 65 size = ALIGN(PAGE_SIZE, SZ_1M);
65 paddr = arm_memblock_steal(size, SZ_1M); 66 paddr = arm_memblock_steal(size, SZ_1M);
66 67
68 return 0;
69}
70
71void __init omap_barriers_init(void)
72{
73 struct map_desc dram_io_desc[1];
74
67 dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA; 75 dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
68 dram_io_desc[0].pfn = __phys_to_pfn(paddr); 76 dram_io_desc[0].pfn = __phys_to_pfn(paddr);
69 dram_io_desc[0].length = size; 77 dram_io_desc[0].length = size;
@@ -75,9 +83,10 @@ static int __init omap_barriers_init(void)
75 pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n", 83 pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
76 (long long) paddr, dram_io_desc[0].virtual); 84 (long long) paddr, dram_io_desc[0].virtual);
77 85
78 return 0;
79} 86}
80core_initcall(omap_barriers_init); 87#else
88void __init omap_barriers_init(void)
89{}
81#endif 90#endif
82 91
83void __init gic_init_irq(void) 92void __init gic_init_irq(void)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 5192cabb40ed..eba6cd3816f5 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1517,8 +1517,8 @@ static int _enable(struct omap_hwmod *oh)
1517 if (oh->_state != _HWMOD_STATE_INITIALIZED && 1517 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1518 oh->_state != _HWMOD_STATE_IDLE && 1518 oh->_state != _HWMOD_STATE_IDLE &&
1519 oh->_state != _HWMOD_STATE_DISABLED) { 1519 oh->_state != _HWMOD_STATE_DISABLED) {
1520 WARN(1, "omap_hwmod: %s: enabled state can only be entered " 1520 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1521 "from initialized, idle, or disabled state\n", oh->name); 1521 oh->name);
1522 return -EINVAL; 1522 return -EINVAL;
1523 } 1523 }
1524 1524
@@ -1600,8 +1600,8 @@ static int _idle(struct omap_hwmod *oh)
1600 pr_debug("omap_hwmod: %s: idling\n", oh->name); 1600 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1601 1601
1602 if (oh->_state != _HWMOD_STATE_ENABLED) { 1602 if (oh->_state != _HWMOD_STATE_ENABLED) {
1603 WARN(1, "omap_hwmod: %s: idle state can only be entered from " 1603 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1604 "enabled state\n", oh->name); 1604 oh->name);
1605 return -EINVAL; 1605 return -EINVAL;
1606 } 1606 }
1607 1607
@@ -1682,8 +1682,8 @@ static int _shutdown(struct omap_hwmod *oh)
1682 1682
1683 if (oh->_state != _HWMOD_STATE_IDLE && 1683 if (oh->_state != _HWMOD_STATE_IDLE &&
1684 oh->_state != _HWMOD_STATE_ENABLED) { 1684 oh->_state != _HWMOD_STATE_ENABLED) {
1685 WARN(1, "omap_hwmod: %s: disabled state can only be entered " 1685 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1686 "from idle, or enabled state\n", oh->name); 1686 oh->name);
1687 return -EINVAL; 1687 return -EINVAL;
1688 } 1688 }
1689 1689
@@ -2240,8 +2240,8 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2240 BUG_ON(!oh); 2240 BUG_ON(!oh);
2241 2241
2242 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) { 2242 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
2243 WARN(1, "omap_device: %s: OCP barrier impossible due to " 2243 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2244 "device configuration\n", oh->name); 2244 oh->name);
2245 return; 2245 return;
2246 } 2246 }
2247 2247
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index c11273da5dcc..f08e442af397 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -56,27 +56,6 @@ struct omap_hwmod_class omap2_dss_hwmod_class = {
56}; 56};
57 57
58/* 58/*
59 * 'dispc' class
60 * display controller
61 */
62
63static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
64 .rev_offs = 0x0000,
65 .sysc_offs = 0x0010,
66 .syss_offs = 0x0014,
67 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
68 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
69 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
70 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
71 .sysc_fields = &omap_hwmod_sysc_type1,
72};
73
74struct omap_hwmod_class omap2_dispc_hwmod_class = {
75 .name = "dispc",
76 .sysc = &omap2_dispc_sysc,
77};
78
79/*
80 * 'rfbi' class 59 * 'rfbi' class
81 * remote frame buffer interface 60 * remote frame buffer interface
82 */ 61 */
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 177dee20faef..2a6729741b06 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -28,6 +28,28 @@ struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
28 { .name = "dispc", .dma_req = 5 }, 28 { .name = "dispc", .dma_req = 5 },
29 { .dma_req = -1 } 29 { .dma_req = -1 }
30}; 30};
31
32/*
33 * 'dispc' class
34 * display controller
35 */
36
37static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
38 .rev_offs = 0x0000,
39 .sysc_offs = 0x0010,
40 .syss_offs = 0x0014,
41 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
42 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
43 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
44 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
45 .sysc_fields = &omap_hwmod_sysc_type1,
46};
47
48struct omap_hwmod_class omap2_dispc_hwmod_class = {
49 .name = "dispc",
50 .sysc = &omap2_dispc_sysc,
51};
52
31/* OMAP2xxx Timer Common */ 53/* OMAP2xxx Timer Common */
32static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { 54static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
33 .rev_offs = 0x0000, 55 .rev_offs = 0x0000,
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 5324e8d93bc0..34b9766d1d23 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -29,6 +29,7 @@
29 29
30#include "omap_hwmod_common_data.h" 30#include "omap_hwmod_common_data.h"
31 31
32#include "smartreflex.h"
32#include "prm-regbits-34xx.h" 33#include "prm-regbits-34xx.h"
33#include "cm-regbits-34xx.h" 34#include "cm-regbits-34xx.h"
34#include "wd_timer.h" 35#include "wd_timer.h"
@@ -376,6 +377,16 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
376 .user = OCP_USER_MPU | OCP_USER_SDMA, 377 .user = OCP_USER_MPU | OCP_USER_SDMA,
377}; 378};
378 379
380static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = {
381 { .irq = 18},
382 { .irq = -1 }
383};
384
385static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = {
386 { .irq = 19},
387 { .irq = -1 }
388};
389
379/* L4 CORE -> SR1 interface */ 390/* L4 CORE -> SR1 interface */
380static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { 391static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = {
381 { 392 {
@@ -1480,6 +1491,28 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1480 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), 1491 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1481}; 1492};
1482 1493
1494/*
1495 * 'dispc' class
1496 * display controller
1497 */
1498
1499static struct omap_hwmod_class_sysconfig omap3_dispc_sysc = {
1500 .rev_offs = 0x0000,
1501 .sysc_offs = 0x0010,
1502 .syss_offs = 0x0014,
1503 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
1504 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
1505 SYSC_HAS_ENAWAKEUP),
1506 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1507 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1508 .sysc_fields = &omap_hwmod_sysc_type1,
1509};
1510
1511static struct omap_hwmod_class omap3_dispc_hwmod_class = {
1512 .name = "dispc",
1513 .sysc = &omap3_dispc_sysc,
1514};
1515
1483/* l4_core -> dss_dispc */ 1516/* l4_core -> dss_dispc */
1484static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { 1517static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
1485 .master = &omap3xxx_l4_core_hwmod, 1518 .master = &omap3xxx_l4_core_hwmod,
@@ -1503,7 +1536,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {
1503 1536
1504static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { 1537static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1505 .name = "dss_dispc", 1538 .name = "dss_dispc",
1506 .class = &omap2_dispc_hwmod_class, 1539 .class = &omap3_dispc_hwmod_class,
1507 .mpu_irqs = omap2_dispc_irqs, 1540 .mpu_irqs = omap2_dispc_irqs,
1508 .main_clk = "dss1_alwon_fck", 1541 .main_clk = "dss1_alwon_fck",
1509 .prcm = { 1542 .prcm = {
@@ -2642,6 +2675,10 @@ static struct omap_hwmod_class omap36xx_smartreflex_hwmod_class = {
2642}; 2675};
2643 2676
2644/* SR1 */ 2677/* SR1 */
2678static struct omap_smartreflex_dev_attr sr1_dev_attr = {
2679 .sensor_voltdm_name = "mpu_iva",
2680};
2681
2645static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = { 2682static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = {
2646 &omap3_l4_core__sr1, 2683 &omap3_l4_core__sr1,
2647}; 2684};
@@ -2650,7 +2687,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
2650 .name = "sr1_hwmod", 2687 .name = "sr1_hwmod",
2651 .class = &omap34xx_smartreflex_hwmod_class, 2688 .class = &omap34xx_smartreflex_hwmod_class,
2652 .main_clk = "sr1_fck", 2689 .main_clk = "sr1_fck",
2653 .vdd_name = "mpu_iva",
2654 .prcm = { 2690 .prcm = {
2655 .omap2 = { 2691 .omap2 = {
2656 .prcm_reg_id = 1, 2692 .prcm_reg_id = 1,
@@ -2662,6 +2698,8 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
2662 }, 2698 },
2663 .slaves = omap3_sr1_slaves, 2699 .slaves = omap3_sr1_slaves,
2664 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), 2700 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
2701 .dev_attr = &sr1_dev_attr,
2702 .mpu_irqs = omap3_smartreflex_mpu_irqs,
2665 .flags = HWMOD_SET_DEFAULT_CLOCKACT, 2703 .flags = HWMOD_SET_DEFAULT_CLOCKACT,
2666}; 2704};
2667 2705
@@ -2669,7 +2707,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
2669 .name = "sr1_hwmod", 2707 .name = "sr1_hwmod",
2670 .class = &omap36xx_smartreflex_hwmod_class, 2708 .class = &omap36xx_smartreflex_hwmod_class,
2671 .main_clk = "sr1_fck", 2709 .main_clk = "sr1_fck",
2672 .vdd_name = "mpu_iva",
2673 .prcm = { 2710 .prcm = {
2674 .omap2 = { 2711 .omap2 = {
2675 .prcm_reg_id = 1, 2712 .prcm_reg_id = 1,
@@ -2681,9 +2718,15 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
2681 }, 2718 },
2682 .slaves = omap3_sr1_slaves, 2719 .slaves = omap3_sr1_slaves,
2683 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), 2720 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
2721 .dev_attr = &sr1_dev_attr,
2722 .mpu_irqs = omap3_smartreflex_mpu_irqs,
2684}; 2723};
2685 2724
2686/* SR2 */ 2725/* SR2 */
2726static struct omap_smartreflex_dev_attr sr2_dev_attr = {
2727 .sensor_voltdm_name = "core",
2728};
2729
2687static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = { 2730static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = {
2688 &omap3_l4_core__sr2, 2731 &omap3_l4_core__sr2,
2689}; 2732};
@@ -2692,7 +2735,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
2692 .name = "sr2_hwmod", 2735 .name = "sr2_hwmod",
2693 .class = &omap34xx_smartreflex_hwmod_class, 2736 .class = &omap34xx_smartreflex_hwmod_class,
2694 .main_clk = "sr2_fck", 2737 .main_clk = "sr2_fck",
2695 .vdd_name = "core",
2696 .prcm = { 2738 .prcm = {
2697 .omap2 = { 2739 .omap2 = {
2698 .prcm_reg_id = 1, 2740 .prcm_reg_id = 1,
@@ -2704,6 +2746,8 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
2704 }, 2746 },
2705 .slaves = omap3_sr2_slaves, 2747 .slaves = omap3_sr2_slaves,
2706 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), 2748 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
2749 .dev_attr = &sr2_dev_attr,
2750 .mpu_irqs = omap3_smartreflex_core_irqs,
2707 .flags = HWMOD_SET_DEFAULT_CLOCKACT, 2751 .flags = HWMOD_SET_DEFAULT_CLOCKACT,
2708}; 2752};
2709 2753
@@ -2711,7 +2755,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
2711 .name = "sr2_hwmod", 2755 .name = "sr2_hwmod",
2712 .class = &omap36xx_smartreflex_hwmod_class, 2756 .class = &omap36xx_smartreflex_hwmod_class,
2713 .main_clk = "sr2_fck", 2757 .main_clk = "sr2_fck",
2714 .vdd_name = "core",
2715 .prcm = { 2758 .prcm = {
2716 .omap2 = { 2759 .omap2 = {
2717 .prcm_reg_id = 1, 2760 .prcm_reg_id = 1,
@@ -2723,6 +2766,8 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
2723 }, 2766 },
2724 .slaves = omap3_sr2_slaves, 2767 .slaves = omap3_sr2_slaves,
2725 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), 2768 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
2769 .dev_attr = &sr2_dev_attr,
2770 .mpu_irqs = omap3_smartreflex_core_irqs,
2726}; 2771};
2727 2772
2728/* 2773/*
@@ -3523,12 +3568,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3523 &omap3xxx_uart2_hwmod, 3568 &omap3xxx_uart2_hwmod,
3524 &omap3xxx_uart3_hwmod, 3569 &omap3xxx_uart3_hwmod,
3525 3570
3526 /* dss class */
3527 &omap3xxx_dss_dispc_hwmod,
3528 &omap3xxx_dss_dsi1_hwmod,
3529 &omap3xxx_dss_rfbi_hwmod,
3530 &omap3xxx_dss_venc_hwmod,
3531
3532 /* i2c class */ 3571 /* i2c class */
3533 &omap3xxx_i2c1_hwmod, 3572 &omap3xxx_i2c1_hwmod,
3534 &omap3xxx_i2c2_hwmod, 3573 &omap3xxx_i2c2_hwmod,
@@ -3635,6 +3674,15 @@ static __initdata struct omap_hwmod *am35xx_hwmods[] = {
3635 NULL 3674 NULL
3636}; 3675};
3637 3676
3677static __initdata struct omap_hwmod *omap3xxx_dss_hwmods[] = {
3678 /* dss class */
3679 &omap3xxx_dss_dispc_hwmod,
3680 &omap3xxx_dss_dsi1_hwmod,
3681 &omap3xxx_dss_rfbi_hwmod,
3682 &omap3xxx_dss_venc_hwmod,
3683 NULL
3684};
3685
3638int __init omap3xxx_hwmod_init(void) 3686int __init omap3xxx_hwmod_init(void)
3639{ 3687{
3640 int r; 3688 int r;
@@ -3708,6 +3756,21 @@ int __init omap3xxx_hwmod_init(void)
3708 3756
3709 if (h) 3757 if (h)
3710 r = omap_hwmod_register(h); 3758 r = omap_hwmod_register(h);
3759 if (r < 0)
3760 return r;
3761
3762 /*
3763 * DSS code presumes that dss_core hwmod is handled first,
3764 * _before_ any other DSS related hwmods so register common
3765 * DSS hwmods last to ensure that dss_core is already registered.
3766 * Otherwise some change things may happen, for ex. if dispc
3767 * is handled before dss_core and DSS is enabled in bootloader
3768 * DIPSC will be reset with outputs enabled which sometimes leads
3769 * to unrecoverable L3 error.
3770 * XXX The long-term fix to this is to ensure modules are set up
3771 * in dependency order in the hwmod core code.
3772 */
3773 r = omap_hwmod_register(omap3xxx_dss_hwmods);
3711 3774
3712 return r; 3775 return r;
3713} 3776}
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index f9f151081760..08daa5e0eb5f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -28,12 +28,12 @@
28#include <plat/mcspi.h> 28#include <plat/mcspi.h>
29#include <plat/mcbsp.h> 29#include <plat/mcbsp.h>
30#include <plat/mmc.h> 30#include <plat/mmc.h>
31#include <plat/i2c.h>
32#include <plat/dmtimer.h> 31#include <plat/dmtimer.h>
33#include <plat/common.h> 32#include <plat/common.h>
34 33
35#include "omap_hwmod_common_data.h" 34#include "omap_hwmod_common_data.h"
36 35
36#include "smartreflex.h"
37#include "cm1_44xx.h" 37#include "cm1_44xx.h"
38#include "cm2_44xx.h" 38#include "cm2_44xx.h"
39#include "prm44xx.h" 39#include "prm44xx.h"
@@ -1031,6 +1031,7 @@ static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = {
1031 1031
1032static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { 1032static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = {
1033 { 1033 {
1034 .name = "mpu",
1034 .pa_start = 0x4012e000, 1035 .pa_start = 0x4012e000,
1035 .pa_end = 0x4012e07f, 1036 .pa_end = 0x4012e07f,
1036 .flags = ADDR_TYPE_RT 1037 .flags = ADDR_TYPE_RT
@@ -1049,6 +1050,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = {
1049 1050
1050static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = { 1051static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = {
1051 { 1052 {
1053 .name = "dma",
1052 .pa_start = 0x4902e000, 1054 .pa_start = 0x4902e000,
1053 .pa_end = 0x4902e07f, 1055 .pa_end = 0x4902e07f,
1054 .flags = ADDR_TYPE_RT 1056 .flags = ADDR_TYPE_RT
@@ -3961,6 +3963,10 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = {
3961}; 3963};
3962 3964
3963/* smartreflex_core */ 3965/* smartreflex_core */
3966static struct omap_smartreflex_dev_attr smartreflex_core_dev_attr = {
3967 .sensor_voltdm_name = "core",
3968};
3969
3964static struct omap_hwmod omap44xx_smartreflex_core_hwmod; 3970static struct omap_hwmod omap44xx_smartreflex_core_hwmod;
3965static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = { 3971static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = {
3966 { .irq = 19 + OMAP44XX_IRQ_GIC_START }, 3972 { .irq = 19 + OMAP44XX_IRQ_GIC_START },
@@ -3997,7 +4003,6 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
3997 .mpu_irqs = omap44xx_smartreflex_core_irqs, 4003 .mpu_irqs = omap44xx_smartreflex_core_irqs,
3998 4004
3999 .main_clk = "smartreflex_core_fck", 4005 .main_clk = "smartreflex_core_fck",
4000 .vdd_name = "core",
4001 .prcm = { 4006 .prcm = {
4002 .omap4 = { 4007 .omap4 = {
4003 .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, 4008 .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET,
@@ -4007,9 +4012,14 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
4007 }, 4012 },
4008 .slaves = omap44xx_smartreflex_core_slaves, 4013 .slaves = omap44xx_smartreflex_core_slaves,
4009 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_slaves), 4014 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_slaves),
4015 .dev_attr = &smartreflex_core_dev_attr,
4010}; 4016};
4011 4017
4012/* smartreflex_iva */ 4018/* smartreflex_iva */
4019static struct omap_smartreflex_dev_attr smartreflex_iva_dev_attr = {
4020 .sensor_voltdm_name = "iva",
4021};
4022
4013static struct omap_hwmod omap44xx_smartreflex_iva_hwmod; 4023static struct omap_hwmod omap44xx_smartreflex_iva_hwmod;
4014static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = { 4024static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = {
4015 { .irq = 102 + OMAP44XX_IRQ_GIC_START }, 4025 { .irq = 102 + OMAP44XX_IRQ_GIC_START },
@@ -4045,7 +4055,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
4045 .clkdm_name = "l4_ao_clkdm", 4055 .clkdm_name = "l4_ao_clkdm",
4046 .mpu_irqs = omap44xx_smartreflex_iva_irqs, 4056 .mpu_irqs = omap44xx_smartreflex_iva_irqs,
4047 .main_clk = "smartreflex_iva_fck", 4057 .main_clk = "smartreflex_iva_fck",
4048 .vdd_name = "iva",
4049 .prcm = { 4058 .prcm = {
4050 .omap4 = { 4059 .omap4 = {
4051 .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, 4060 .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET,
@@ -4055,9 +4064,14 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
4055 }, 4064 },
4056 .slaves = omap44xx_smartreflex_iva_slaves, 4065 .slaves = omap44xx_smartreflex_iva_slaves,
4057 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves), 4066 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves),
4067 .dev_attr = &smartreflex_iva_dev_attr,
4058}; 4068};
4059 4069
4060/* smartreflex_mpu */ 4070/* smartreflex_mpu */
4071static struct omap_smartreflex_dev_attr smartreflex_mpu_dev_attr = {
4072 .sensor_voltdm_name = "mpu",
4073};
4074
4061static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod; 4075static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod;
4062static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = { 4076static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = {
4063 { .irq = 18 + OMAP44XX_IRQ_GIC_START }, 4077 { .irq = 18 + OMAP44XX_IRQ_GIC_START },
@@ -4093,7 +4107,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
4093 .clkdm_name = "l4_ao_clkdm", 4107 .clkdm_name = "l4_ao_clkdm",
4094 .mpu_irqs = omap44xx_smartreflex_mpu_irqs, 4108 .mpu_irqs = omap44xx_smartreflex_mpu_irqs,
4095 .main_clk = "smartreflex_mpu_fck", 4109 .main_clk = "smartreflex_mpu_fck",
4096 .vdd_name = "mpu",
4097 .prcm = { 4110 .prcm = {
4098 .omap4 = { 4111 .omap4 = {
4099 .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, 4112 .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET,
@@ -4103,6 +4116,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
4103 }, 4116 },
4104 .slaves = omap44xx_smartreflex_mpu_slaves, 4117 .slaves = omap44xx_smartreflex_mpu_slaves,
4105 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves), 4118 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves),
4119 .dev_attr = &smartreflex_mpu_dev_attr,
4106}; 4120};
4107 4121
4108/* 4122/*
diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c
index e6dda694fd5c..5037e76e4e23 100644
--- a/arch/arm/mach-omap2/opp2420_data.c
+++ b/arch/arm/mach-omap2/opp2420_data.c
@@ -28,6 +28,8 @@
28 * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/ 28 * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/
29 */ 29 */
30 30
31#include <plat/hardware.h>
32
31#include "opp2xxx.h" 33#include "opp2xxx.h"
32#include "sdrc.h" 34#include "sdrc.h"
33#include "clock.h" 35#include "clock.h"
diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c
index 1b9596ae201e..750805c528d8 100644
--- a/arch/arm/mach-omap2/opp2430_data.c
+++ b/arch/arm/mach-omap2/opp2430_data.c
@@ -26,6 +26,8 @@
26 * This is technically part of the OMAP2xxx clock code. 26 * This is technically part of the OMAP2xxx clock code.
27 */ 27 */
28 28
29#include <plat/hardware.h>
30
29#include "opp2xxx.h" 31#include "opp2xxx.h"
30#include "sdrc.h" 32#include "sdrc.h"
31#include "clock.h" 33#include "clock.h"
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 4411163e012d..814bcd901596 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -220,8 +220,8 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir)
220 return 0; 220 return 0;
221 221
222 d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir); 222 d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir);
223 223 if (!(IS_ERR_OR_NULL(d)))
224 (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d, 224 (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d,
225 (void *)pwrdm, &pwrdm_suspend_fops); 225 (void *)pwrdm, &pwrdm_suspend_fops);
226 226
227 return 0; 227 return 0;
@@ -264,7 +264,7 @@ static int __init pm_dbg_init(void)
264 return 0; 264 return 0;
265 265
266 d = debugfs_create_dir("pm_debug", NULL); 266 d = debugfs_create_dir("pm_debug", NULL);
267 if (IS_ERR(d)) 267 if (IS_ERR_OR_NULL(d))
268 return PTR_ERR(d); 268 return PTR_ERR(d);
269 269
270 (void) debugfs_create_file("count", S_IRUGO, 270 (void) debugfs_create_file("count", S_IRUGO,
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 1881fe915149..a7bdec69a2b3 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -15,11 +15,13 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/opp.h> 16#include <linux/opp.h>
17#include <linux/export.h> 17#include <linux/export.h>
18#include <linux/suspend.h>
18 19
19#include <plat/omap-pm.h> 20#include <plat/omap-pm.h>
20#include <plat/omap_device.h> 21#include <plat/omap_device.h>
21#include "common.h" 22#include "common.h"
22 23
24#include "prcm-common.h"
23#include "voltage.h" 25#include "voltage.h"
24#include "powerdomain.h" 26#include "powerdomain.h"
25#include "clockdomain.h" 27#include "clockdomain.h"
@@ -28,7 +30,13 @@
28 30
29static struct omap_device_pm_latency *pm_lats; 31static struct omap_device_pm_latency *pm_lats;
30 32
31static int _init_omap_device(char *name) 33/*
34 * omap_pm_suspend: points to a function that does the SoC-specific
35 * suspend work
36 */
37int (*omap_pm_suspend)(void);
38
39static int __init _init_omap_device(char *name)
32{ 40{
33 struct omap_hwmod *oh; 41 struct omap_hwmod *oh;
34 struct platform_device *pdev; 42 struct platform_device *pdev;
@@ -49,7 +57,7 @@ static int _init_omap_device(char *name)
49/* 57/*
50 * Build omap_devices for processors and bus. 58 * Build omap_devices for processors and bus.
51 */ 59 */
52static void omap2_init_processor_devices(void) 60static void __init omap2_init_processor_devices(void)
53{ 61{
54 _init_omap_device("mpu"); 62 _init_omap_device("mpu");
55 if (omap3_has_iva()) 63 if (omap3_has_iva())
@@ -68,32 +76,41 @@ static void omap2_init_processor_devices(void)
68#define FORCEWAKEUP_SWITCH 0 76#define FORCEWAKEUP_SWITCH 0
69#define LOWPOWERSTATE_SWITCH 1 77#define LOWPOWERSTATE_SWITCH 1
70 78
79int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
80{
81 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
82 clkdm_allow_idle(clkdm);
83 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
84 atomic_read(&clkdm->usecount) == 0)
85 clkdm_sleep(clkdm);
86 return 0;
87}
88
71/* 89/*
72 * This sets pwrdm state (other than mpu & core. Currently only ON & 90 * This sets pwrdm state (other than mpu & core. Currently only ON &
73 * RET are supported. 91 * RET are supported.
74 */ 92 */
75int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) 93int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
76{ 94{
77 u32 cur_state; 95 u8 curr_pwrst, next_pwrst;
78 int sleep_switch = -1; 96 int sleep_switch = -1, ret = 0, hwsup = 0;
79 int ret = 0;
80 int hwsup = 0;
81 97
82 if (pwrdm == NULL || IS_ERR(pwrdm)) 98 if (!pwrdm || IS_ERR(pwrdm))
83 return -EINVAL; 99 return -EINVAL;
84 100
85 while (!(pwrdm->pwrsts & (1 << state))) { 101 while (!(pwrdm->pwrsts & (1 << pwrst))) {
86 if (state == PWRDM_POWER_OFF) 102 if (pwrst == PWRDM_POWER_OFF)
87 return ret; 103 return ret;
88 state--; 104 pwrst--;
89 } 105 }
90 106
91 cur_state = pwrdm_read_next_pwrst(pwrdm); 107 next_pwrst = pwrdm_read_next_pwrst(pwrdm);
92 if (cur_state == state) 108 if (next_pwrst == pwrst)
93 return ret; 109 return ret;
94 110
95 if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) { 111 curr_pwrst = pwrdm_read_pwrst(pwrdm);
96 if ((pwrdm_read_pwrst(pwrdm) > state) && 112 if (curr_pwrst < PWRDM_POWER_ON) {
113 if ((curr_pwrst > pwrst) &&
97 (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { 114 (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
98 sleep_switch = LOWPOWERSTATE_SWITCH; 115 sleep_switch = LOWPOWERSTATE_SWITCH;
99 } else { 116 } else {
@@ -103,12 +120,10 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
103 } 120 }
104 } 121 }
105 122
106 ret = pwrdm_set_next_pwrst(pwrdm, state); 123 ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
107 if (ret) { 124 if (ret)
108 pr_err("%s: unable to set state of powerdomain: %s\n", 125 pr_err("%s: unable to set power state of powerdomain: %s\n",
109 __func__, pwrdm->name); 126 __func__, pwrdm->name);
110 goto err;
111 }
112 127
113 switch (sleep_switch) { 128 switch (sleep_switch) {
114 case FORCEWAKEUP_SWITCH: 129 case FORCEWAKEUP_SWITCH:
@@ -119,16 +134,16 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
119 break; 134 break;
120 case LOWPOWERSTATE_SWITCH: 135 case LOWPOWERSTATE_SWITCH:
121 pwrdm_set_lowpwrstchange(pwrdm); 136 pwrdm_set_lowpwrstchange(pwrdm);
137 pwrdm_wait_transition(pwrdm);
138 pwrdm_state_switch(pwrdm);
122 break; 139 break;
123 default:
124 return ret;
125 } 140 }
126 141
127 pwrdm_state_switch(pwrdm);
128err:
129 return ret; 142 return ret;
130} 143}
131 144
145
146
132/* 147/*
133 * This API is to be called during init to set the various voltage 148 * This API is to be called during init to set the various voltage
134 * domains to the voltage as per the opp table. Typically we boot up 149 * domains to the voltage as per the opp table. Typically we boot up
@@ -174,14 +189,17 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
174 freq = clk->rate; 189 freq = clk->rate;
175 clk_put(clk); 190 clk_put(clk);
176 191
192 rcu_read_lock();
177 opp = opp_find_freq_ceil(dev, &freq); 193 opp = opp_find_freq_ceil(dev, &freq);
178 if (IS_ERR(opp)) { 194 if (IS_ERR(opp)) {
195 rcu_read_unlock();
179 pr_err("%s: unable to find boot up OPP for vdd_%s\n", 196 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
180 __func__, vdd_name); 197 __func__, vdd_name);
181 goto exit; 198 goto exit;
182 } 199 }
183 200
184 bootup_volt = opp_get_voltage(opp); 201 bootup_volt = opp_get_voltage(opp);
202 rcu_read_unlock();
185 if (!bootup_volt) { 203 if (!bootup_volt) {
186 pr_err("%s: unable to find voltage corresponding " 204 pr_err("%s: unable to find voltage corresponding "
187 "to the bootup OPP for vdd_%s\n", __func__, vdd_name); 205 "to the bootup OPP for vdd_%s\n", __func__, vdd_name);
@@ -196,6 +214,56 @@ exit:
196 return -EINVAL; 214 return -EINVAL;
197} 215}
198 216
217#ifdef CONFIG_SUSPEND
218static int omap_pm_enter(suspend_state_t suspend_state)
219{
220 int ret = 0;
221
222 if (!omap_pm_suspend)
223 return -ENOENT; /* XXX doublecheck */
224
225 switch (suspend_state) {
226 case PM_SUSPEND_STANDBY:
227 case PM_SUSPEND_MEM:
228 ret = omap_pm_suspend();
229 break;
230 default:
231 ret = -EINVAL;
232 }
233
234 return ret;
235}
236
237static int omap_pm_begin(suspend_state_t state)
238{
239 disable_hlt();
240 if (cpu_is_omap34xx())
241 omap_prcm_irq_prepare();
242 return 0;
243}
244
245static void omap_pm_end(void)
246{
247 enable_hlt();
248 return;
249}
250
251static void omap_pm_finish(void)
252{
253 if (cpu_is_omap34xx())
254 omap_prcm_irq_complete();
255}
256
257static const struct platform_suspend_ops omap_pm_ops = {
258 .begin = omap_pm_begin,
259 .end = omap_pm_end,
260 .enter = omap_pm_enter,
261 .finish = omap_pm_finish,
262 .valid = suspend_valid_only_mem,
263};
264
265#endif /* CONFIG_SUSPEND */
266
199static void __init omap3_init_voltages(void) 267static void __init omap3_init_voltages(void)
200{ 268{
201 if (!cpu_is_omap34xx()) 269 if (!cpu_is_omap34xx())
@@ -227,6 +295,14 @@ postcore_initcall(omap2_common_pm_init);
227 295
228static int __init omap2_common_pm_late_init(void) 296static int __init omap2_common_pm_late_init(void)
229{ 297{
298 /*
299 * In the case of DT, the PMIC and SR initialization will be done using
300 * a completely different mechanism.
301 * Disable this part if a DT blob is available.
302 */
303 if (of_have_populated_dt())
304 return 0;
305
230 /* Init the voltage layer */ 306 /* Init the voltage layer */
231 omap_pmic_late_init(); 307 omap_pmic_late_init();
232 omap_voltage_late_init(); 308 omap_voltage_late_init();
@@ -238,6 +314,10 @@ static int __init omap2_common_pm_late_init(void)
238 /* Smartreflex device init */ 314 /* Smartreflex device init */
239 omap_devinit_smartreflex(); 315 omap_devinit_smartreflex();
240 316
317#ifdef CONFIG_SUSPEND
318 suspend_set_ops(&omap_pm_ops);
319#endif
320
241 return 0; 321 return 0;
242} 322}
243late_initcall(omap2_common_pm_late_init); 323late_initcall(omap2_common_pm_late_init);
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index b737b11e4499..36fa90b6ece8 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -18,10 +18,11 @@
18extern void *omap3_secure_ram_storage; 18extern void *omap3_secure_ram_storage;
19extern void omap3_pm_off_mode_enable(int); 19extern void omap3_pm_off_mode_enable(int);
20extern void omap_sram_idle(void); 20extern void omap_sram_idle(void);
21extern int omap3_can_sleep(void);
22extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); 21extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
23extern int omap3_idle_init(void); 22extern int omap3_idle_init(void);
24extern int omap4_idle_init(void); 23extern int omap4_idle_init(void);
24extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
25extern int (*omap_pm_suspend)(void);
25 26
26#if defined(CONFIG_PM_OPP) 27#if defined(CONFIG_PM_OPP)
27extern int omap3_opp_init(void); 28extern int omap3_opp_init(void);
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index b8822f8b2891..5ca45ca76946 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -26,7 +26,6 @@
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/io.h>
30#include <linux/irq.h> 29#include <linux/irq.h>
31#include <linux/time.h> 30#include <linux/time.h>
32#include <linux/gpio.h> 31#include <linux/gpio.h>
@@ -35,12 +34,13 @@
35#include <asm/mach/irq.h> 34#include <asm/mach/irq.h>
36#include <asm/mach-types.h> 35#include <asm/mach-types.h>
37 36
38#include <mach/irqs.h>
39#include <plat/clock.h> 37#include <plat/clock.h>
40#include <plat/sram.h> 38#include <plat/sram.h>
41#include <plat/dma.h> 39#include <plat/dma.h>
42#include <plat/board.h> 40#include <plat/board.h>
43 41
42#include <mach/irqs.h>
43
44#include "common.h" 44#include "common.h"
45#include "prm2xxx_3xxx.h" 45#include "prm2xxx_3xxx.h"
46#include "prm-regbits-24xx.h" 46#include "prm-regbits-24xx.h"
@@ -49,23 +49,9 @@
49#include "sdrc.h" 49#include "sdrc.h"
50#include "pm.h" 50#include "pm.h"
51#include "control.h" 51#include "control.h"
52
53#include "powerdomain.h" 52#include "powerdomain.h"
54#include "clockdomain.h" 53#include "clockdomain.h"
55 54
56#ifdef CONFIG_SUSPEND
57static suspend_state_t suspend_state = PM_SUSPEND_ON;
58static inline bool is_suspending(void)
59{
60 return (suspend_state != PM_SUSPEND_ON);
61}
62#else
63static inline bool is_suspending(void)
64{
65 return false;
66}
67#endif
68
69static void (*omap2_sram_idle)(void); 55static void (*omap2_sram_idle)(void);
70static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, 56static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
71 void __iomem *sdrc_power); 57 void __iomem *sdrc_power);
@@ -82,16 +68,10 @@ static int omap2_fclks_active(void)
82 f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); 68 f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
83 f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2); 69 f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
84 70
85 /* Ignore UART clocks. These are handled by UART core (serial.c) */ 71 return (f1 | f2) ? 1 : 0;
86 f1 &= ~(OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_UART2_MASK);
87 f2 &= ~OMAP24XX_EN_UART3_MASK;
88
89 if (f1 | f2)
90 return 1;
91 return 0;
92} 72}
93 73
94static void omap2_enter_full_retention(void) 74static int omap2_enter_full_retention(void)
95{ 75{
96 u32 l; 76 u32 l;
97 77
@@ -154,6 +134,8 @@ no_sleep:
154 134
155 /* Mask future PRCM-to-MPU interrupts */ 135 /* Mask future PRCM-to-MPU interrupts */
156 omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); 136 omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
137
138 return 0;
157} 139}
158 140
159static int omap2_i2c_active(void) 141static int omap2_i2c_active(void)
@@ -232,7 +214,6 @@ static int omap2_can_sleep(void)
232 214
233static void omap2_pm_idle(void) 215static void omap2_pm_idle(void)
234{ 216{
235 local_irq_disable();
236 local_fiq_disable(); 217 local_fiq_disable();
237 218
238 if (!omap2_can_sleep()) { 219 if (!omap2_can_sleep()) {
@@ -249,78 +230,6 @@ static void omap2_pm_idle(void)
249 230
250out: 231out:
251 local_fiq_enable(); 232 local_fiq_enable();
252 local_irq_enable();
253}
254
255#ifdef CONFIG_SUSPEND
256static int omap2_pm_begin(suspend_state_t state)
257{
258 disable_hlt();
259 suspend_state = state;
260 return 0;
261}
262
263static int omap2_pm_suspend(void)
264{
265 u32 wken_wkup, mir1;
266
267 wken_wkup = omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
268 wken_wkup &= ~OMAP24XX_EN_GPT1_MASK;
269 omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
270
271 /* Mask GPT1 */
272 mir1 = omap_readl(0x480fe0a4);
273 omap_writel(1 << 5, 0x480fe0ac);
274
275 omap2_enter_full_retention();
276
277 omap_writel(mir1, 0x480fe0a4);
278 omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
279
280 return 0;
281}
282
283static int omap2_pm_enter(suspend_state_t state)
284{
285 int ret = 0;
286
287 switch (state) {
288 case PM_SUSPEND_STANDBY:
289 case PM_SUSPEND_MEM:
290 ret = omap2_pm_suspend();
291 break;
292 default:
293 ret = -EINVAL;
294 }
295
296 return ret;
297}
298
299static void omap2_pm_end(void)
300{
301 suspend_state = PM_SUSPEND_ON;
302 enable_hlt();
303}
304
305static const struct platform_suspend_ops omap_pm_ops = {
306 .begin = omap2_pm_begin,
307 .enter = omap2_pm_enter,
308 .end = omap2_pm_end,
309 .valid = suspend_valid_only_mem,
310};
311#else
312static const struct platform_suspend_ops __initdata omap_pm_ops;
313#endif /* CONFIG_SUSPEND */
314
315/* XXX This function should be shareable between OMAP2xxx and OMAP3 */
316static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
317{
318 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
319 clkdm_allow_idle(clkdm);
320 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
321 atomic_read(&clkdm->usecount) == 0)
322 clkdm_sleep(clkdm);
323 return 0;
324} 233}
325 234
326static void __init prcm_setup_regs(void) 235static void __init prcm_setup_regs(void)
@@ -364,9 +273,13 @@ static void __init prcm_setup_regs(void)
364 clkdm_sleep(gfx_clkdm); 273 clkdm_sleep(gfx_clkdm);
365 274
366 /* Enable hardware-supervised idle for all clkdms */ 275 /* Enable hardware-supervised idle for all clkdms */
367 clkdm_for_each(clkdms_setup, NULL); 276 clkdm_for_each(omap_pm_clkdms_setup, NULL);
368 clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); 277 clkdm_add_wkdep(mpu_clkdm, wkup_clkdm);
369 278
279#ifdef CONFIG_SUSPEND
280 omap_pm_suspend = omap2_enter_full_retention;
281#endif
282
370 /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk 283 /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk
371 * stabilisation */ 284 * stabilisation */
372 omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, 285 omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD,
@@ -467,8 +380,7 @@ static int __init omap2_pm_init(void)
467 omap24xx_cpu_suspend_sz); 380 omap24xx_cpu_suspend_sz);
468 } 381 }
469 382
470 suspend_set_ops(&omap_pm_ops); 383 arm_pm_idle = omap2_pm_idle;
471 pm_idle = omap2_pm_idle;
472 384
473 return 0; 385 return 0;
474} 386}
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fc6987578920..027a537d72b2 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -50,10 +50,6 @@
50#include "sdrc.h" 50#include "sdrc.h"
51#include "control.h" 51#include "control.h"
52 52
53#ifdef CONFIG_SUSPEND
54static suspend_state_t suspend_state = PM_SUSPEND_ON;
55#endif
56
57/* pm34xx errata defined in pm.h */ 53/* pm34xx errata defined in pm.h */
58u16 pm34xx_errata; 54u16 pm34xx_errata;
59 55
@@ -75,16 +71,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
75static struct powerdomain *core_pwrdm, *per_pwrdm; 71static struct powerdomain *core_pwrdm, *per_pwrdm;
76static struct powerdomain *cam_pwrdm; 72static struct powerdomain *cam_pwrdm;
77 73
78static inline void omap3_per_save_context(void)
79{
80 omap_gpio_save_context();
81}
82
83static inline void omap3_per_restore_context(void)
84{
85 omap_gpio_restore_context();
86}
87
88static void omap3_enable_io_chain(void) 74static void omap3_enable_io_chain(void)
89{ 75{
90 int timeout = 0; 76 int timeout = 0;
@@ -290,11 +276,6 @@ void omap_sram_idle(void)
290 int core_prev_state, per_prev_state; 276 int core_prev_state, per_prev_state;
291 u32 sdrc_pwr = 0; 277 u32 sdrc_pwr = 0;
292 278
293 pwrdm_clear_all_prev_pwrst(mpu_pwrdm);
294 pwrdm_clear_all_prev_pwrst(neon_pwrdm);
295 pwrdm_clear_all_prev_pwrst(core_pwrdm);
296 pwrdm_clear_all_prev_pwrst(per_pwrdm);
297
298 mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm); 279 mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
299 switch (mpu_next_state) { 280 switch (mpu_next_state) {
300 case PWRDM_POWER_ON: 281 case PWRDM_POWER_ON:
@@ -332,8 +313,6 @@ void omap_sram_idle(void)
332 if (per_next_state < PWRDM_POWER_ON) { 313 if (per_next_state < PWRDM_POWER_ON) {
333 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0; 314 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
334 omap2_gpio_prepare_for_idle(per_going_off); 315 omap2_gpio_prepare_for_idle(per_going_off);
335 if (per_next_state == PWRDM_POWER_OFF)
336 omap3_per_save_context();
337 } 316 }
338 317
339 /* CORE */ 318 /* CORE */
@@ -399,8 +378,6 @@ void omap_sram_idle(void)
399 if (per_next_state < PWRDM_POWER_ON) { 378 if (per_next_state < PWRDM_POWER_ON) {
400 per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm); 379 per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
401 omap2_gpio_resume_after_idle(); 380 omap2_gpio_resume_after_idle();
402 if (per_prev_state == PWRDM_POWER_OFF)
403 omap3_per_restore_context();
404 } 381 }
405 382
406 /* Disable IO-PAD and IO-CHAIN wakeup */ 383 /* Disable IO-PAD and IO-CHAIN wakeup */
@@ -418,10 +395,9 @@ void omap_sram_idle(void)
418 395
419static void omap3_pm_idle(void) 396static void omap3_pm_idle(void)
420{ 397{
421 local_irq_disable();
422 local_fiq_disable(); 398 local_fiq_disable();
423 399
424 if (omap_irq_pending() || need_resched()) 400 if (omap_irq_pending())
425 goto out; 401 goto out;
426 402
427 trace_power_start(POWER_CSTATE, 1, smp_processor_id()); 403 trace_power_start(POWER_CSTATE, 1, smp_processor_id());
@@ -434,7 +410,6 @@ static void omap3_pm_idle(void)
434 410
435out: 411out:
436 local_fiq_enable(); 412 local_fiq_enable();
437 local_irq_enable();
438} 413}
439 414
440#ifdef CONFIG_SUSPEND 415#ifdef CONFIG_SUSPEND
@@ -479,50 +454,6 @@ restore:
479 return ret; 454 return ret;
480} 455}
481 456
482static int omap3_pm_enter(suspend_state_t unused)
483{
484 int ret = 0;
485
486 switch (suspend_state) {
487 case PM_SUSPEND_STANDBY:
488 case PM_SUSPEND_MEM:
489 ret = omap3_pm_suspend();
490 break;
491 default:
492 ret = -EINVAL;
493 }
494
495 return ret;
496}
497
498/* Hooks to enable / disable UART interrupts during suspend */
499static int omap3_pm_begin(suspend_state_t state)
500{
501 disable_hlt();
502 suspend_state = state;
503 omap_prcm_irq_prepare();
504 return 0;
505}
506
507static void omap3_pm_end(void)
508{
509 suspend_state = PM_SUSPEND_ON;
510 enable_hlt();
511 return;
512}
513
514static void omap3_pm_finish(void)
515{
516 omap_prcm_irq_complete();
517}
518
519static const struct platform_suspend_ops omap_pm_ops = {
520 .begin = omap3_pm_begin,
521 .end = omap3_pm_end,
522 .enter = omap3_pm_enter,
523 .finish = omap3_pm_finish,
524 .valid = suspend_valid_only_mem,
525};
526#endif /* CONFIG_SUSPEND */ 457#endif /* CONFIG_SUSPEND */
527 458
528 459
@@ -743,21 +674,6 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
743} 674}
744 675
745/* 676/*
746 * Enable hw supervised mode for all clockdomains if it's
747 * supported. Initiate sleep transition for other clockdomains, if
748 * they are not used
749 */
750static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
751{
752 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
753 clkdm_allow_idle(clkdm);
754 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
755 atomic_read(&clkdm->usecount) == 0)
756 clkdm_sleep(clkdm);
757 return 0;
758}
759
760/*
761 * Push functions to SRAM 677 * Push functions to SRAM
762 * 678 *
763 * The minimum set of functions is pushed to SRAM for execution: 679 * The minimum set of functions is pushed to SRAM for execution:
@@ -826,7 +742,7 @@ static int __init omap3_pm_init(void)
826 goto err2; 742 goto err2;
827 } 743 }
828 744
829 (void) clkdm_for_each(clkdms_setup, NULL); 745 (void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
830 746
831 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); 747 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
832 if (mpu_pwrdm == NULL) { 748 if (mpu_pwrdm == NULL) {
@@ -845,10 +761,10 @@ static int __init omap3_pm_init(void)
845 core_clkdm = clkdm_lookup("core_clkdm"); 761 core_clkdm = clkdm_lookup("core_clkdm");
846 762
847#ifdef CONFIG_SUSPEND 763#ifdef CONFIG_SUSPEND
848 suspend_set_ops(&omap_pm_ops); 764 omap_pm_suspend = omap3_pm_suspend;
849#endif /* CONFIG_SUSPEND */ 765#endif
850 766
851 pm_idle = omap3_pm_idle; 767 arm_pm_idle = omap3_pm_idle;
852 omap3_idle_init(); 768 omap3_idle_init();
853 769
854 /* 770 /*
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index c264ef7219c1..91e0b1c9b76c 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -83,59 +83,8 @@ static int omap4_pm_suspend(void)
83 83
84 return 0; 84 return 0;
85} 85}
86
87static int omap4_pm_enter(suspend_state_t suspend_state)
88{
89 int ret = 0;
90
91 switch (suspend_state) {
92 case PM_SUSPEND_STANDBY:
93 case PM_SUSPEND_MEM:
94 ret = omap4_pm_suspend();
95 break;
96 default:
97 ret = -EINVAL;
98 }
99
100 return ret;
101}
102
103static int omap4_pm_begin(suspend_state_t state)
104{
105 disable_hlt();
106 return 0;
107}
108
109static void omap4_pm_end(void)
110{
111 enable_hlt();
112 return;
113}
114
115static const struct platform_suspend_ops omap_pm_ops = {
116 .begin = omap4_pm_begin,
117 .end = omap4_pm_end,
118 .enter = omap4_pm_enter,
119 .valid = suspend_valid_only_mem,
120};
121#endif /* CONFIG_SUSPEND */ 86#endif /* CONFIG_SUSPEND */
122 87
123/*
124 * Enable hardware supervised mode for all clockdomains if it's
125 * supported. Initiate sleep transition for other clockdomains, if
126 * they are not used
127 */
128static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
129{
130 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
131 clkdm_allow_idle(clkdm);
132 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
133 atomic_read(&clkdm->usecount) == 0)
134 clkdm_sleep(clkdm);
135 return 0;
136}
137
138
139static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) 88static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
140{ 89{
141 struct power_state *pwrst; 90 struct power_state *pwrst;
@@ -173,18 +122,16 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
173 * omap_default_idle - OMAP4 default ilde routine.' 122 * omap_default_idle - OMAP4 default ilde routine.'
174 * 123 *
175 * Implements OMAP4 memory, IO ordering requirements which can't be addressed 124 * Implements OMAP4 memory, IO ordering requirements which can't be addressed
176 * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and 125 * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
177 * by secondary CPU with CONFIG_CPUIDLE. 126 * by secondary CPU with CONFIG_CPUIDLE.
178 */ 127 */
179static void omap_default_idle(void) 128static void omap_default_idle(void)
180{ 129{
181 local_irq_disable();
182 local_fiq_disable(); 130 local_fiq_disable();
183 131
184 omap_do_wfi(); 132 omap_do_wfi();
185 133
186 local_fiq_enable(); 134 local_fiq_enable();
187 local_irq_enable();
188} 135}
189 136
190/** 137/**
@@ -249,14 +196,14 @@ static int __init omap4_pm_init(void)
249 goto err2; 196 goto err2;
250 } 197 }
251 198
252 (void) clkdm_for_each(clkdms_setup, NULL); 199 (void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
253 200
254#ifdef CONFIG_SUSPEND 201#ifdef CONFIG_SUSPEND
255 suspend_set_ops(&omap_pm_ops); 202 omap_pm_suspend = omap4_pm_suspend;
256#endif /* CONFIG_SUSPEND */ 203#endif
257 204
258 /* Overwrite the default arch_idle() */ 205 /* Overwrite the default cpu_do_idle() */
259 pm_idle = omap_default_idle; 206 arm_pm_idle = omap_default_idle;
260 207
261 omap4_idle_init(); 208 omap4_idle_init();
262 209
diff --git a/arch/arm/mach-omap2/powerdomain-common.c b/arch/arm/mach-omap2/powerdomain-common.c
index f97afff68d6d..c0aeabfcf009 100644
--- a/arch/arm/mach-omap2/powerdomain-common.c
+++ b/arch/arm/mach-omap2/powerdomain-common.c
@@ -13,6 +13,7 @@
13 13
14#include <linux/errno.h> 14#include <linux/errno.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/bug.h>
16#include "pm.h" 17#include "pm.h"
17#include "cm.h" 18#include "cm.h"
18#include "cm-regbits-34xx.h" 19#include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index 6a17e4ca1d79..0f0a9f1592fe 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -15,6 +15,7 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/bug.h>
18 19
19#include <plat/prcm.h> 20#include <plat/prcm.h>
20 21
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c
index a7880af4b3d9..601325b852a4 100644
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ b/arch/arm/mach-omap2/powerdomain44xx.c
@@ -15,6 +15,7 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/bug.h>
18 19
19#include "powerdomain.h" 20#include "powerdomain.h"
20#include <plat/prcm.h> 21#include <plat/prcm.h>
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 8ef26daeed68..b7ea468eea32 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -13,6 +13,7 @@
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/bug.h>
16 17
17#include <plat/cpu.h> 18#include <plat/cpu.h>
18 19
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c
index ca669b50f390..928dbd4f20ed 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.c
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
@@ -15,8 +15,8 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include "iomap.h"
18#include "common.h" 19#include "common.h"
19
20#include "prcm_mpu44xx.h" 20#include "prcm_mpu44xx.h"
21#include "cm-regbits-44xx.h" 21#include "cm-regbits-44xx.h"
22 22
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index c1c4d86a79a8..9ce765407ad5 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -19,6 +19,7 @@
19#include "common.h" 19#include "common.h"
20#include <plat/cpu.h> 20#include <plat/cpu.h>
21#include <plat/prcm.h> 21#include <plat/prcm.h>
22#include <plat/irqs.h>
22 23
23#include "vp.h" 24#include "vp.h"
24 25
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 33dd655e6aab..eac623c7c3d8 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -17,10 +17,12 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include "common.h"
21#include <plat/cpu.h> 20#include <plat/cpu.h>
21#include <plat/irqs.h>
22#include <plat/prcm.h> 22#include <plat/prcm.h>
23 23
24#include "iomap.h"
25#include "common.h"
24#include "vp.h" 26#include "vp.h"
25#include "prm44xx.h" 27#include "prm44xx.h"
26#include "prm-regbits-44xx.h" 28#include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 860118ab43e2..873b51d494ea 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -24,7 +24,6 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26 26
27#include <mach/system.h>
28#include <plat/common.h> 27#include <plat/common.h>
29#include <plat/prcm.h> 28#include <plat/prcm.h>
30#include <plat/irqs.h> 29#include <plat/irqs.h>
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index f6de5bc6b12a..9b3898a3ac9b 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -16,8 +16,8 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include "iomap.h"
19#include "common.h" 20#include "common.h"
20
21#include "prm44xx.h" 21#include "prm44xx.h"
22#include "prminst44xx.h" 22#include "prminst44xx.h"
23#include "prm-regbits-44xx.h" 23#include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index 7479d7ea1379..845c4fd2b125 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -17,7 +17,6 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <plat/io.h>
21#include "common.h" 20#include "common.h"
22#include <plat/clock.h> 21#include <plat/clock.h>
23#include <plat/sdrc.h> 22#include <plat/sdrc.h>
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 791a63cdceb2..1133bb2f632b 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,13 +24,15 @@
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/io.h> 25#include <linux/io.h>
26 26
27#include "common.h" 27#include <plat/hardware.h>
28#include <plat/clock.h> 28#include <plat/clock.h>
29#include <plat/sram.h> 29#include <plat/sram.h>
30#include <plat/sdrc.h>
30 31
32#include "iomap.h"
33#include "common.h"
31#include "prm2xxx_3xxx.h" 34#include "prm2xxx_3xxx.h"
32#include "clock.h" 35#include "clock.h"
33#include <plat/sdrc.h>
34#include "sdrc.h" 36#include "sdrc.h"
35 37
36/* Memory timing, DLL mode flags */ 38/* Memory timing, DLL mode flags */
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 247d89478f24..0cdd359a128e 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -54,11 +54,9 @@
54 54
55struct omap_uart_state { 55struct omap_uart_state {
56 int num; 56 int num;
57 int can_sleep;
58 57
59 struct list_head node; 58 struct list_head node;
60 struct omap_hwmod *oh; 59 struct omap_hwmod *oh;
61 struct platform_device *pdev;
62}; 60};
63 61
64static LIST_HEAD(uart_list); 62static LIST_HEAD(uart_list);
@@ -107,18 +105,18 @@ static void omap_uart_set_noidle(struct platform_device *pdev)
107 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO); 105 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
108} 106}
109 107
110static void omap_uart_set_forceidle(struct platform_device *pdev) 108static void omap_uart_set_smartidle(struct platform_device *pdev)
111{ 109{
112 struct omap_device *od = to_omap_device(pdev); 110 struct omap_device *od = to_omap_device(pdev);
113 111
114 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_FORCE); 112 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART);
115} 113}
116 114
117#else 115#else
118static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable) 116static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
119{} 117{}
120static void omap_uart_set_noidle(struct platform_device *pdev) {} 118static void omap_uart_set_noidle(struct platform_device *pdev) {}
121static void omap_uart_set_forceidle(struct platform_device *pdev) {} 119static void omap_uart_set_smartidle(struct platform_device *pdev) {}
122#endif /* CONFIG_PM */ 120#endif /* CONFIG_PM */
123 121
124#ifdef CONFIG_OMAP_MUX 122#ifdef CONFIG_OMAP_MUX
@@ -349,7 +347,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
349 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16; 347 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
350 omap_up.flags = UPF_BOOT_AUTOCONF; 348 omap_up.flags = UPF_BOOT_AUTOCONF;
351 omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count; 349 omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
352 omap_up.set_forceidle = omap_uart_set_forceidle; 350 omap_up.set_forceidle = omap_uart_set_smartidle;
353 omap_up.set_noidle = omap_uart_set_noidle; 351 omap_up.set_noidle = omap_uart_set_noidle;
354 omap_up.enable_wakeup = omap_uart_enable_wakeup; 352 omap_up.enable_wakeup = omap_uart_enable_wakeup;
355 omap_up.dma_rx_buf_size = info->dma_rx_buf_size; 353 omap_up.dma_rx_buf_size = info->dma_rx_buf_size;
@@ -381,8 +379,6 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
381 379
382 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); 380 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
383 381
384 uart->pdev = pdev;
385
386 oh->dev_attr = uart; 382 oh->dev_attr = uart;
387 383
388 if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) 384 if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads)
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S
index b5071a47ec39..d4bf904d84ab 100644
--- a/arch/arm/mach-omap2/sleep24xx.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -27,7 +27,6 @@
27 27
28#include <linux/linkage.h> 28#include <linux/linkage.h>
29#include <asm/assembler.h> 29#include <asm/assembler.h>
30#include <mach/io.h>
31 30
32#include <plat/omap24xx.h> 31#include <plat/omap24xx.h>
33 32
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index f2ea1bd1c691..1f62f23673fb 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -23,10 +23,13 @@
23 * MA 02111-1307 USA 23 * MA 02111-1307 USA
24 */ 24 */
25#include <linux/linkage.h> 25#include <linux/linkage.h>
26
26#include <asm/assembler.h> 27#include <asm/assembler.h>
28
29#include <plat/hardware.h>
27#include <plat/sram.h> 30#include <plat/sram.h>
28#include <mach/io.h>
29 31
32#include "iomap.h"
30#include "cm2xxx_3xxx.h" 33#include "cm2xxx_3xxx.h"
31#include "prm2xxx_3xxx.h" 34#include "prm2xxx_3xxx.h"
32#include "sdrc.h" 35#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c
index 53d9d0a5b39d..955566eefac4 100644
--- a/arch/arm/mach-omap2/smartreflex-class3.c
+++ b/arch/arm/mach-omap2/smartreflex-class3.c
@@ -29,6 +29,7 @@ static int sr_class3_enable(struct voltagedomain *voltdm)
29 29
30static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset) 30static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset)
31{ 31{
32 sr_disable_errgen(voltdm);
32 omap_vp_disable(voltdm); 33 omap_vp_disable(voltdm);
33 sr_disable(voltdm); 34 sr_disable(voltdm);
34 if (is_volt_reset) 35 if (is_volt_reset)
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 9dd93453e563..008fbd7b9352 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -36,6 +36,12 @@
36#define SR_DISABLE_TIMEOUT 200 36#define SR_DISABLE_TIMEOUT 200
37 37
38struct omap_sr { 38struct omap_sr {
39 struct list_head node;
40 struct platform_device *pdev;
41 struct omap_sr_nvalue_table *nvalue_table;
42 struct voltagedomain *voltdm;
43 struct dentry *dbg_dir;
44 unsigned int irq;
39 int srid; 45 int srid;
40 int ip_type; 46 int ip_type;
41 int nvalue_count; 47 int nvalue_count;
@@ -49,13 +55,7 @@ struct omap_sr {
49 u32 senp_avgweight; 55 u32 senp_avgweight;
50 u32 senp_mod; 56 u32 senp_mod;
51 u32 senn_mod; 57 u32 senn_mod;
52 unsigned int irq;
53 void __iomem *base; 58 void __iomem *base;
54 struct platform_device *pdev;
55 struct list_head node;
56 struct omap_sr_nvalue_table *nvalue_table;
57 struct voltagedomain *voltdm;
58 struct dentry *dbg_dir;
59}; 59};
60 60
61/* sr_list contains all the instances of smartreflex module */ 61/* sr_list contains all the instances of smartreflex module */
@@ -74,10 +74,6 @@ static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
74 u32 value) 74 u32 value)
75{ 75{
76 u32 reg_val; 76 u32 reg_val;
77 u32 errconfig_offs = 0, errconfig_mask = 0;
78
79 reg_val = __raw_readl(sr->base + offset);
80 reg_val &= ~mask;
81 77
82 /* 78 /*
83 * Smartreflex error config register is special as it contains 79 * Smartreflex error config register is special as it contains
@@ -88,16 +84,15 @@ static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
88 * if they are currently set, but does allow the caller to write 84 * if they are currently set, but does allow the caller to write
89 * those bits. 85 * those bits.
90 */ 86 */
91 if (sr->ip_type == SR_TYPE_V1) { 87 if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
92 errconfig_offs = ERRCONFIG_V1; 88 mask |= ERRCONFIG_STATUS_V1_MASK;
93 errconfig_mask = ERRCONFIG_STATUS_V1_MASK; 89 else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
94 } else if (sr->ip_type == SR_TYPE_V2) { 90 mask |= ERRCONFIG_VPBOUNDINTST_V2;
95 errconfig_offs = ERRCONFIG_V2; 91
96 errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2; 92 reg_val = __raw_readl(sr->base + offset);
97 } 93 reg_val &= ~mask;
98 94
99 if (offset == errconfig_offs) 95 value &= mask;
100 reg_val &= ~errconfig_mask;
101 96
102 reg_val |= value; 97 reg_val |= value;
103 98
@@ -128,21 +123,28 @@ static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
128 123
129static irqreturn_t sr_interrupt(int irq, void *data) 124static irqreturn_t sr_interrupt(int irq, void *data)
130{ 125{
131 struct omap_sr *sr_info = (struct omap_sr *)data; 126 struct omap_sr *sr_info = data;
132 u32 status = 0; 127 u32 status = 0;
133 128
134 if (sr_info->ip_type == SR_TYPE_V1) { 129 switch (sr_info->ip_type) {
130 case SR_TYPE_V1:
135 /* Read the status bits */ 131 /* Read the status bits */
136 status = sr_read_reg(sr_info, ERRCONFIG_V1); 132 status = sr_read_reg(sr_info, ERRCONFIG_V1);
137 133
138 /* Clear them by writing back */ 134 /* Clear them by writing back */
139 sr_write_reg(sr_info, ERRCONFIG_V1, status); 135 sr_write_reg(sr_info, ERRCONFIG_V1, status);
140 } else if (sr_info->ip_type == SR_TYPE_V2) { 136 break;
137 case SR_TYPE_V2:
141 /* Read the status bits */ 138 /* Read the status bits */
142 status = sr_read_reg(sr_info, IRQSTATUS); 139 status = sr_read_reg(sr_info, IRQSTATUS);
143 140
144 /* Clear them by writing back */ 141 /* Clear them by writing back */
145 sr_write_reg(sr_info, IRQSTATUS, status); 142 sr_write_reg(sr_info, IRQSTATUS, status);
143 break;
144 default:
145 dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
146 sr_info->ip_type);
147 return IRQ_NONE;
146 } 148 }
147 149
148 if (sr_class->notify) 150 if (sr_class->notify)
@@ -166,6 +168,7 @@ static void sr_set_clk_length(struct omap_sr *sr)
166 __func__); 168 __func__);
167 return; 169 return;
168 } 170 }
171
169 sys_clk_speed = clk_get_rate(sys_ck); 172 sys_clk_speed = clk_get_rate(sys_ck);
170 clk_put(sys_ck); 173 clk_put(sys_ck);
171 174
@@ -267,7 +270,7 @@ static int sr_late_init(struct omap_sr *sr_info)
267 goto error; 270 goto error;
268 } 271 }
269 ret = request_irq(sr_info->irq, sr_interrupt, 272 ret = request_irq(sr_info->irq, sr_interrupt,
270 0, name, (void *)sr_info); 273 0, name, sr_info);
271 if (ret) 274 if (ret)
272 goto error; 275 goto error;
273 disable_irq(sr_info->irq); 276 disable_irq(sr_info->irq);
@@ -288,12 +291,15 @@ error:
288 "not function as desired\n", __func__); 291 "not function as desired\n", __func__);
289 kfree(name); 292 kfree(name);
290 kfree(sr_info); 293 kfree(sr_info);
294
291 return ret; 295 return ret;
292} 296}
293 297
294static void sr_v1_disable(struct omap_sr *sr) 298static void sr_v1_disable(struct omap_sr *sr)
295{ 299{
296 int timeout = 0; 300 int timeout = 0;
301 int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
302 ERRCONFIG_MCUBOUNDINTST;
297 303
298 /* Enable MCUDisableAcknowledge interrupt */ 304 /* Enable MCUDisableAcknowledge interrupt */
299 sr_modify_reg(sr, ERRCONFIG_V1, 305 sr_modify_reg(sr, ERRCONFIG_V1,
@@ -302,13 +308,13 @@ static void sr_v1_disable(struct omap_sr *sr)
302 /* SRCONFIG - disable SR */ 308 /* SRCONFIG - disable SR */
303 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); 309 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
304 310
305 /* Disable all other SR interrupts and clear the status */ 311 /* Disable all other SR interrupts and clear the status as needed */
312 if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
313 errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
306 sr_modify_reg(sr, ERRCONFIG_V1, 314 sr_modify_reg(sr, ERRCONFIG_V1,
307 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | 315 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
308 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1), 316 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
309 (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST | 317 errconf_val);
310 ERRCONFIG_MCUBOUNDINTST |
311 ERRCONFIG_VPBOUNDINTST_V1));
312 318
313 /* 319 /*
314 * Wait for SR to be disabled. 320 * Wait for SR to be disabled.
@@ -337,9 +343,17 @@ static void sr_v2_disable(struct omap_sr *sr)
337 /* SRCONFIG - disable SR */ 343 /* SRCONFIG - disable SR */
338 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); 344 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
339 345
340 /* Disable all other SR interrupts and clear the status */ 346 /*
341 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, 347 * Disable all other SR interrupts and clear the status
348 * write to status register ONLY on need basis - only if status
349 * is set.
350 */
351 if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
352 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
342 ERRCONFIG_VPBOUNDINTST_V2); 353 ERRCONFIG_VPBOUNDINTST_V2);
354 else
355 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
356 0x0);
343 sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT | 357 sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
344 IRQENABLE_MCUVALIDINT | 358 IRQENABLE_MCUVALIDINT |
345 IRQENABLE_MCUBOUNDSINT)); 359 IRQENABLE_MCUBOUNDSINT));
@@ -398,15 +412,16 @@ static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs)
398 */ 412 */
399int sr_configure_errgen(struct voltagedomain *voltdm) 413int sr_configure_errgen(struct voltagedomain *voltdm)
400{ 414{
401 u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en; 415 u32 sr_config, sr_errconfig, errconfig_offs;
402 u32 vpboundint_st, senp_en = 0, senn_en = 0; 416 u32 vpboundint_en, vpboundint_st;
417 u32 senp_en = 0, senn_en = 0;
403 u8 senp_shift, senn_shift; 418 u8 senp_shift, senn_shift;
404 struct omap_sr *sr = _sr_lookup(voltdm); 419 struct omap_sr *sr = _sr_lookup(voltdm);
405 420
406 if (IS_ERR(sr)) { 421 if (IS_ERR(sr)) {
407 pr_warning("%s: omap_sr struct for sr_%s not found\n", 422 pr_warning("%s: omap_sr struct for sr_%s not found\n",
408 __func__, voltdm->name); 423 __func__, voltdm->name);
409 return -EINVAL; 424 return PTR_ERR(sr);
410 } 425 }
411 426
412 if (!sr->clk_length) 427 if (!sr->clk_length)
@@ -418,20 +433,23 @@ int sr_configure_errgen(struct voltagedomain *voltdm)
418 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | 433 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
419 SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN; 434 SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
420 435
421 if (sr->ip_type == SR_TYPE_V1) { 436 switch (sr->ip_type) {
437 case SR_TYPE_V1:
422 sr_config |= SRCONFIG_DELAYCTRL; 438 sr_config |= SRCONFIG_DELAYCTRL;
423 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; 439 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
424 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; 440 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
425 errconfig_offs = ERRCONFIG_V1; 441 errconfig_offs = ERRCONFIG_V1;
426 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; 442 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
427 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; 443 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
428 } else if (sr->ip_type == SR_TYPE_V2) { 444 break;
445 case SR_TYPE_V2:
429 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; 446 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
430 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; 447 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
431 errconfig_offs = ERRCONFIG_V2; 448 errconfig_offs = ERRCONFIG_V2;
432 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; 449 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
433 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; 450 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
434 } else { 451 break;
452 default:
435 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" 453 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
436 "module without specifying the ip\n", __func__); 454 "module without specifying the ip\n", __func__);
437 return -EINVAL; 455 return -EINVAL;
@@ -447,8 +465,55 @@ int sr_configure_errgen(struct voltagedomain *voltdm)
447 sr_errconfig); 465 sr_errconfig);
448 466
449 /* Enabling the interrupts if the ERROR module is used */ 467 /* Enabling the interrupts if the ERROR module is used */
450 sr_modify_reg(sr, errconfig_offs, 468 sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
451 vpboundint_en, (vpboundint_en | vpboundint_st)); 469 vpboundint_en);
470
471 return 0;
472}
473
474/**
475 * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
476 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
477 *
478 * This API is to be called from the smartreflex class driver to
479 * disable the error generator module inside the smartreflex module.
480 *
481 * Returns 0 on success and error value in case of failure.
482 */
483int sr_disable_errgen(struct voltagedomain *voltdm)
484{
485 u32 errconfig_offs;
486 u32 vpboundint_en, vpboundint_st;
487 struct omap_sr *sr = _sr_lookup(voltdm);
488
489 if (IS_ERR(sr)) {
490 pr_warning("%s: omap_sr struct for sr_%s not found\n",
491 __func__, voltdm->name);
492 return PTR_ERR(sr);
493 }
494
495 switch (sr->ip_type) {
496 case SR_TYPE_V1:
497 errconfig_offs = ERRCONFIG_V1;
498 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
499 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
500 break;
501 case SR_TYPE_V2:
502 errconfig_offs = ERRCONFIG_V2;
503 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
504 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
505 break;
506 default:
507 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
508 "module without specifying the ip\n", __func__);
509 return -EINVAL;
510 }
511
512 /* Disable the interrupts of ERROR module */
513 sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
514
515 /* Disable the Sensor and errorgen */
516 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
452 517
453 return 0; 518 return 0;
454} 519}
@@ -475,7 +540,7 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
475 if (IS_ERR(sr)) { 540 if (IS_ERR(sr)) {
476 pr_warning("%s: omap_sr struct for sr_%s not found\n", 541 pr_warning("%s: omap_sr struct for sr_%s not found\n",
477 __func__, voltdm->name); 542 __func__, voltdm->name);
478 return -EINVAL; 543 return PTR_ERR(sr);
479 } 544 }
480 545
481 if (!sr->clk_length) 546 if (!sr->clk_length)
@@ -488,14 +553,17 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
488 SRCONFIG_SENENABLE | 553 SRCONFIG_SENENABLE |
489 (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT); 554 (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
490 555
491 if (sr->ip_type == SR_TYPE_V1) { 556 switch (sr->ip_type) {
557 case SR_TYPE_V1:
492 sr_config |= SRCONFIG_DELAYCTRL; 558 sr_config |= SRCONFIG_DELAYCTRL;
493 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; 559 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
494 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; 560 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
495 } else if (sr->ip_type == SR_TYPE_V2) { 561 break;
562 case SR_TYPE_V2:
496 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; 563 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
497 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; 564 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
498 } else { 565 break;
566 default:
499 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" 567 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
500 "module without specifying the ip\n", __func__); 568 "module without specifying the ip\n", __func__);
501 return -EINVAL; 569 return -EINVAL;
@@ -511,20 +579,27 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
511 * Enabling the interrupts if MINMAXAVG module is used. 579 * Enabling the interrupts if MINMAXAVG module is used.
512 * TODO: check if all the interrupts are mandatory 580 * TODO: check if all the interrupts are mandatory
513 */ 581 */
514 if (sr->ip_type == SR_TYPE_V1) { 582 switch (sr->ip_type) {
583 case SR_TYPE_V1:
515 sr_modify_reg(sr, ERRCONFIG_V1, 584 sr_modify_reg(sr, ERRCONFIG_V1,
516 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | 585 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
517 ERRCONFIG_MCUBOUNDINTEN), 586 ERRCONFIG_MCUBOUNDINTEN),
518 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST | 587 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
519 ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST | 588 ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
520 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST)); 589 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
521 } else if (sr->ip_type == SR_TYPE_V2) { 590 break;
591 case SR_TYPE_V2:
522 sr_write_reg(sr, IRQSTATUS, 592 sr_write_reg(sr, IRQSTATUS,
523 IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT | 593 IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
524 IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT); 594 IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
525 sr_write_reg(sr, IRQENABLE_SET, 595 sr_write_reg(sr, IRQENABLE_SET,
526 IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT | 596 IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
527 IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT); 597 IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
598 break;
599 default:
600 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
601 "module without specifying the ip\n", __func__);
602 return -EINVAL;
528 } 603 }
529 604
530 return 0; 605 return 0;
@@ -543,15 +618,15 @@ int sr_configure_minmax(struct voltagedomain *voltdm)
543 */ 618 */
544int sr_enable(struct voltagedomain *voltdm, unsigned long volt) 619int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
545{ 620{
546 u32 nvalue_reciprocal;
547 struct omap_volt_data *volt_data; 621 struct omap_volt_data *volt_data;
548 struct omap_sr *sr = _sr_lookup(voltdm); 622 struct omap_sr *sr = _sr_lookup(voltdm);
623 u32 nvalue_reciprocal;
549 int ret; 624 int ret;
550 625
551 if (IS_ERR(sr)) { 626 if (IS_ERR(sr)) {
552 pr_warning("%s: omap_sr struct for sr_%s not found\n", 627 pr_warning("%s: omap_sr struct for sr_%s not found\n",
553 __func__, voltdm->name); 628 __func__, voltdm->name);
554 return -EINVAL; 629 return PTR_ERR(sr);
555 } 630 }
556 631
557 volt_data = omap_voltage_get_voltdata(sr->voltdm, volt); 632 volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
@@ -559,7 +634,7 @@ int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
559 if (IS_ERR(volt_data)) { 634 if (IS_ERR(volt_data)) {
560 dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table" 635 dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
561 "for nominal voltage %ld\n", __func__, volt); 636 "for nominal voltage %ld\n", __func__, volt);
562 return -ENODATA; 637 return PTR_ERR(volt_data);
563 } 638 }
564 639
565 nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs); 640 nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs);
@@ -617,10 +692,17 @@ void sr_disable(struct voltagedomain *voltdm)
617 * disable the clocks. 692 * disable the clocks.
618 */ 693 */
619 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) { 694 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
620 if (sr->ip_type == SR_TYPE_V1) 695 switch (sr->ip_type) {
696 case SR_TYPE_V1:
621 sr_v1_disable(sr); 697 sr_v1_disable(sr);
622 else if (sr->ip_type == SR_TYPE_V2) 698 break;
699 case SR_TYPE_V2:
623 sr_v2_disable(sr); 700 sr_v2_disable(sr);
701 break;
702 default:
703 dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
704 sr->ip_type);
705 }
624 } 706 }
625 707
626 pm_runtime_put_sync_suspend(&sr->pdev->dev); 708 pm_runtime_put_sync_suspend(&sr->pdev->dev);
@@ -779,10 +861,10 @@ void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
779 sr_pmic_data = pmic_data; 861 sr_pmic_data = pmic_data;
780} 862}
781 863
782/* PM Debug Fs enteries to enable disable smartreflex. */ 864/* PM Debug FS entries to enable and disable smartreflex. */
783static int omap_sr_autocomp_show(void *data, u64 *val) 865static int omap_sr_autocomp_show(void *data, u64 *val)
784{ 866{
785 struct omap_sr *sr_info = (struct omap_sr *) data; 867 struct omap_sr *sr_info = data;
786 868
787 if (!sr_info) { 869 if (!sr_info) {
788 pr_warning("%s: omap_sr struct not found\n", __func__); 870 pr_warning("%s: omap_sr struct not found\n", __func__);
@@ -796,7 +878,7 @@ static int omap_sr_autocomp_show(void *data, u64 *val)
796 878
797static int omap_sr_autocomp_store(void *data, u64 val) 879static int omap_sr_autocomp_store(void *data, u64 val)
798{ 880{
799 struct omap_sr *sr_info = (struct omap_sr *) data; 881 struct omap_sr *sr_info = data;
800 882
801 if (!sr_info) { 883 if (!sr_info) {
802 pr_warning("%s: omap_sr struct not found\n", __func__); 884 pr_warning("%s: omap_sr struct not found\n", __func__);
@@ -804,7 +886,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
804 } 886 }
805 887
806 /* Sanity check */ 888 /* Sanity check */
807 if (val && (val != 1)) { 889 if (val > 1) {
808 pr_warning("%s: Invalid argument %lld\n", __func__, val); 890 pr_warning("%s: Invalid argument %lld\n", __func__, val);
809 return -EINVAL; 891 return -EINVAL;
810 } 892 }
@@ -821,11 +903,11 @@ static int omap_sr_autocomp_store(void *data, u64 val)
821} 903}
822 904
823DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show, 905DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
824 omap_sr_autocomp_store, "%llu\n"); 906 omap_sr_autocomp_store, "%llu\n");
825 907
826static int __init omap_sr_probe(struct platform_device *pdev) 908static int __init omap_sr_probe(struct platform_device *pdev)
827{ 909{
828 struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); 910 struct omap_sr *sr_info;
829 struct omap_sr_data *pdata = pdev->dev.platform_data; 911 struct omap_sr_data *pdata = pdev->dev.platform_data;
830 struct resource *mem, *irq; 912 struct resource *mem, *irq;
831 struct dentry *nvalue_dir; 913 struct dentry *nvalue_dir;
@@ -833,12 +915,15 @@ static int __init omap_sr_probe(struct platform_device *pdev)
833 int i, ret = 0; 915 int i, ret = 0;
834 char *name; 916 char *name;
835 917
918 sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
836 if (!sr_info) { 919 if (!sr_info) {
837 dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", 920 dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
838 __func__); 921 __func__);
839 return -ENOMEM; 922 return -ENOMEM;
840 } 923 }
841 924
925 platform_set_drvdata(pdev, sr_info);
926
842 if (!pdata) { 927 if (!pdata) {
843 dev_err(&pdev->dev, "%s: platform data missing\n", __func__); 928 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
844 ret = -EINVAL; 929 ret = -EINVAL;
@@ -897,14 +982,14 @@ static int __init omap_sr_probe(struct platform_device *pdev)
897 ret = sr_late_init(sr_info); 982 ret = sr_late_init(sr_info);
898 if (ret) { 983 if (ret) {
899 pr_warning("%s: Error in SR late init\n", __func__); 984 pr_warning("%s: Error in SR late init\n", __func__);
900 return ret; 985 goto err_iounmap;
901 } 986 }
902 } 987 }
903 988
904 dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); 989 dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
905 if (!sr_dbg_dir) { 990 if (!sr_dbg_dir) {
906 sr_dbg_dir = debugfs_create_dir("smartreflex", NULL); 991 sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
907 if (!sr_dbg_dir) { 992 if (IS_ERR_OR_NULL(sr_dbg_dir)) {
908 ret = PTR_ERR(sr_dbg_dir); 993 ret = PTR_ERR(sr_dbg_dir);
909 pr_err("%s:sr debugfs dir creation failed(%d)\n", 994 pr_err("%s:sr debugfs dir creation failed(%d)\n",
910 __func__, ret); 995 __func__, ret);
@@ -921,7 +1006,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
921 } 1006 }
922 sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir); 1007 sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir);
923 kfree(name); 1008 kfree(name);
924 if (IS_ERR(sr_info->dbg_dir)) { 1009 if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
925 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", 1010 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
926 __func__); 1011 __func__);
927 ret = PTR_ERR(sr_info->dbg_dir); 1012 ret = PTR_ERR(sr_info->dbg_dir);
@@ -938,7 +1023,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
938 &sr_info->err_minlimit); 1023 &sr_info->err_minlimit);
939 1024
940 nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir); 1025 nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
941 if (IS_ERR(nvalue_dir)) { 1026 if (IS_ERR_OR_NULL(nvalue_dir)) {
942 dev_err(&pdev->dev, "%s: Unable to create debugfs directory" 1027 dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
943 "for n-values\n", __func__); 1028 "for n-values\n", __func__);
944 ret = PTR_ERR(nvalue_dir); 1029 ret = PTR_ERR(nvalue_dir);
@@ -994,7 +1079,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
994 if (IS_ERR(sr_info)) { 1079 if (IS_ERR(sr_info)) {
995 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", 1080 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
996 __func__); 1081 __func__);
997 return -EINVAL; 1082 return PTR_ERR(sr_info);
998 } 1083 }
999 1084
1000 if (sr_info->autocomp_active) 1085 if (sr_info->autocomp_active)
@@ -1011,8 +1096,32 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
1011 return 0; 1096 return 0;
1012} 1097}
1013 1098
1099static void __devexit omap_sr_shutdown(struct platform_device *pdev)
1100{
1101 struct omap_sr_data *pdata = pdev->dev.platform_data;
1102 struct omap_sr *sr_info;
1103
1104 if (!pdata) {
1105 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
1106 return;
1107 }
1108
1109 sr_info = _sr_lookup(pdata->voltdm);
1110 if (IS_ERR(sr_info)) {
1111 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
1112 __func__);
1113 return;
1114 }
1115
1116 if (sr_info->autocomp_active)
1117 sr_stop_vddautocomp(sr_info);
1118
1119 return;
1120}
1121
1014static struct platform_driver smartreflex_driver = { 1122static struct platform_driver smartreflex_driver = {
1015 .remove = omap_sr_remove, 1123 .remove = __devexit_p(omap_sr_remove),
1124 .shutdown = __devexit_p(omap_sr_shutdown),
1016 .driver = { 1125 .driver = {
1017 .name = "smartreflex", 1126 .name = "smartreflex",
1018 }, 1127 },
@@ -1042,12 +1151,12 @@ static int __init sr_init(void)
1042 1151
1043 return 0; 1152 return 0;
1044} 1153}
1154late_initcall(sr_init);
1045 1155
1046static void __exit sr_exit(void) 1156static void __exit sr_exit(void)
1047{ 1157{
1048 platform_driver_unregister(&smartreflex_driver); 1158 platform_driver_unregister(&smartreflex_driver);
1049} 1159}
1050late_initcall(sr_init);
1051module_exit(sr_exit); 1160module_exit(sr_exit);
1052 1161
1053MODULE_DESCRIPTION("OMAP Smartreflex Driver"); 1162MODULE_DESCRIPTION("OMAP Smartreflex Driver");
diff --git a/arch/arm/mach-omap2/smartreflex.h b/arch/arm/mach-omap2/smartreflex.h
index 5f35b9e25556..5809141171f8 100644
--- a/arch/arm/mach-omap2/smartreflex.h
+++ b/arch/arm/mach-omap2/smartreflex.h
@@ -152,6 +152,15 @@ struct omap_sr_pmic_data {
152 void (*sr_pmic_init) (void); 152 void (*sr_pmic_init) (void);
153}; 153};
154 154
155/**
156 * struct omap_smartreflex_dev_attr - Smartreflex Device attribute.
157 *
158 * @sensor_voltdm_name: Name of voltdomain of SR instance
159 */
160struct omap_smartreflex_dev_attr {
161 const char *sensor_voltdm_name;
162};
163
155#ifdef CONFIG_OMAP_SMARTREFLEX 164#ifdef CONFIG_OMAP_SMARTREFLEX
156/* 165/*
157 * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR. 166 * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR.
@@ -231,6 +240,7 @@ void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data);
231int sr_enable(struct voltagedomain *voltdm, unsigned long volt); 240int sr_enable(struct voltagedomain *voltdm, unsigned long volt);
232void sr_disable(struct voltagedomain *voltdm); 241void sr_disable(struct voltagedomain *voltdm);
233int sr_configure_errgen(struct voltagedomain *voltdm); 242int sr_configure_errgen(struct voltagedomain *voltdm);
243int sr_disable_errgen(struct voltagedomain *voltdm);
234int sr_configure_minmax(struct voltagedomain *voltdm); 244int sr_configure_minmax(struct voltagedomain *voltdm);
235 245
236/* API to register the smartreflex class driver with the smartreflex driver */ 246/* API to register the smartreflex class driver with the smartreflex driver */
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index 9f43fcc05d3e..a503e1e8358c 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -69,11 +69,12 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
69 sr_data->nvalue_count = count; 69 sr_data->nvalue_count = count;
70} 70}
71 71
72static int sr_dev_init(struct omap_hwmod *oh, void *user) 72static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
73{ 73{
74 struct omap_sr_data *sr_data; 74 struct omap_sr_data *sr_data;
75 struct platform_device *pdev; 75 struct platform_device *pdev;
76 struct omap_volt_data *volt_data; 76 struct omap_volt_data *volt_data;
77 struct omap_smartreflex_dev_attr *sr_dev_attr;
77 char *name = "smartreflex"; 78 char *name = "smartreflex";
78 static int i; 79 static int i;
79 80
@@ -84,9 +85,11 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)
84 return -ENOMEM; 85 return -ENOMEM;
85 } 86 }
86 87
87 if (!oh->vdd_name) { 88 sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
89 if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
88 pr_err("%s: No voltage domain specified for %s." 90 pr_err("%s: No voltage domain specified for %s."
89 "Cannot initialize\n", __func__, oh->name); 91 "Cannot initialize\n", __func__,
92 oh->name);
90 goto exit; 93 goto exit;
91 } 94 }
92 95
@@ -94,10 +97,10 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)
94 sr_data->senn_mod = 0x1; 97 sr_data->senn_mod = 0x1;
95 sr_data->senp_mod = 0x1; 98 sr_data->senp_mod = 0x1;
96 99
97 sr_data->voltdm = voltdm_lookup(oh->vdd_name); 100 sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
98 if (IS_ERR(sr_data->voltdm)) { 101 if (IS_ERR(sr_data->voltdm)) {
99 pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", 102 pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
100 __func__, oh->vdd_name); 103 __func__, sr_dev_attr->sensor_voltdm_name);
101 goto exit; 104 goto exit;
102 } 105 }
103 106
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index ff9b9dbcb30e..ee0bfcc1410f 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -29,10 +29,12 @@
29 * These crashes may be intermittent. 29 * These crashes may be intermittent.
30 */ 30 */
31#include <linux/linkage.h> 31#include <linux/linkage.h>
32
32#include <asm/assembler.h> 33#include <asm/assembler.h>
33#include <mach/io.h> 34
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35 36
37#include "iomap.h"
36#include "prm2xxx_3xxx.h" 38#include "prm2xxx_3xxx.h"
37#include "cm2xxx_3xxx.h" 39#include "cm2xxx_3xxx.h"
38#include "sdrc.h" 40#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S
index 76730209fa0e..d4d39ef04769 100644
--- a/arch/arm/mach-omap2/sram243x.S
+++ b/arch/arm/mach-omap2/sram243x.S
@@ -29,10 +29,12 @@
29 * These crashes may be intermittent. 29 * These crashes may be intermittent.
30 */ 30 */
31#include <linux/linkage.h> 31#include <linux/linkage.h>
32
32#include <asm/assembler.h> 33#include <asm/assembler.h>
33#include <mach/io.h> 34
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35 36
37#include "iomap.h"
36#include "prm2xxx_3xxx.h" 38#include "prm2xxx_3xxx.h"
37#include "cm2xxx_3xxx.h" 39#include "cm2xxx_3xxx.h"
38#include "sdrc.h" 40#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index 6f5849aaa7c0..df5a21322b0a 100644
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -26,11 +26,12 @@
26 * MA 02111-1307 USA 26 * MA 02111-1307 USA
27 */ 27 */
28#include <linux/linkage.h> 28#include <linux/linkage.h>
29
29#include <asm/assembler.h> 30#include <asm/assembler.h>
30#include <mach/hardware.h>
31 31
32#include <mach/io.h> 32#include <mach/hardware.h>
33 33
34#include "iomap.h"
34#include "sdrc.h" 35#include "sdrc.h"
35#include "cm2xxx_3xxx.h" 36#include "cm2xxx_3xxx.h"
36 37
diff --git a/arch/arm/mach-omap2/timer-mpu.c b/arch/arm/mach-omap2/timer-mpu.c
deleted file mode 100644
index 31c0ac4cd66a..000000000000
--- a/arch/arm/mach-omap2/timer-mpu.c
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * The MPU local timer source file. In OMAP4, both cortex-a9 cores have
3 * own timer in it's MPU domain. These timers will be driving the
4 * linux kernel SMP tick framework when active. These timers are not
5 * part of the wake up domain.
6 *
7 * Copyright (C) 2009 Texas Instruments, Inc.
8 *
9 * Author:
10 * Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
12 * This file is based on arm realview smp platform file.
13 * Copyright (C) 2002 ARM Ltd.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
19#include <linux/init.h>
20#include <linux/smp.h>
21#include <linux/clockchips.h>
22#include <asm/irq.h>
23#include <asm/smp_twd.h>
24#include <asm/localtimer.h>
25
26/*
27 * Setup the local clock events for a CPU.
28 */
29int __cpuinit local_timer_setup(struct clock_event_device *evt)
30{
31 /* Local timers are not supprted on OMAP4430 ES1.0 */
32 if (omap_rev() == OMAP4430_REV_ES1_0)
33 return -ENXIO;
34
35 evt->irq = OMAP44XX_IRQ_LOCALTIMER;
36 twd_timer_setup(evt);
37 return 0;
38}
39
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 6eeff0e0ae01..c512bac69ec5 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -39,7 +39,7 @@
39 39
40#include <asm/mach/time.h> 40#include <asm/mach/time.h>
41#include <plat/dmtimer.h> 41#include <plat/dmtimer.h>
42#include <asm/localtimer.h> 42#include <asm/smp_twd.h>
43#include <asm/sched_clock.h> 43#include <asm/sched_clock.h>
44#include "common.h" 44#include "common.h"
45#include <plat/omap_hwmod.h> 45#include <plat/omap_hwmod.h>
@@ -270,7 +270,7 @@ static struct clocksource clocksource_gpt = {
270static u32 notrace dmtimer_read_sched_clock(void) 270static u32 notrace dmtimer_read_sched_clock(void)
271{ 271{
272 if (clksrc.reserved) 272 if (clksrc.reserved)
273 return __omap_dm_timer_read_counter(clksrc.io_base, 1); 273 return __omap_dm_timer_read_counter(&clksrc, 1);
274 274
275 return 0; 275 return 0;
276} 276}
@@ -324,14 +324,26 @@ OMAP_SYS_TIMER(3_secure)
324#endif 324#endif
325 325
326#ifdef CONFIG_ARCH_OMAP4 326#ifdef CONFIG_ARCH_OMAP4
327static void __init omap4_timer_init(void)
328{
329#ifdef CONFIG_LOCAL_TIMERS 327#ifdef CONFIG_LOCAL_TIMERS
330 twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); 328static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
331 BUG_ON(!twd_base); 329 OMAP44XX_LOCAL_TWD_BASE,
330 OMAP44XX_IRQ_LOCALTIMER);
332#endif 331#endif
332
333static void __init omap4_timer_init(void)
334{
333 omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); 335 omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
334 omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); 336 omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE);
337#ifdef CONFIG_LOCAL_TIMERS
338 /* Local timers are not supprted on OMAP4430 ES1.0 */
339 if (omap_rev() != OMAP4430_REV_ES1_0) {
340 int err;
341
342 err = twd_local_timer_register(&twd_local_timer);
343 if (err)
344 pr_err("twd_local_timer_register failed %d\n", err);
345 }
346#endif
335} 347}
336OMAP_SYS_TIMER(4) 348OMAP_SYS_TIMER(4)
337#endif 349#endif
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 10b20c652e5d..4b57757bf9d1 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -270,7 +270,6 @@ static struct regulator_init_data omap4_vusb_idata = {
270 .constraints = { 270 .constraints = {
271 .min_uV = 3300000, 271 .min_uV = 3300000,
272 .max_uV = 3300000, 272 .max_uV = 3300000,
273 .apply_uV = true,
274 .valid_modes_mask = REGULATOR_MODE_NORMAL 273 .valid_modes_mask = REGULATOR_MODE_NORMAL
275 | REGULATOR_MODE_STANDBY, 274 | REGULATOR_MODE_STANDBY,
276 .valid_ops_mask = REGULATOR_CHANGE_MODE 275 .valid_ops_mask = REGULATOR_CHANGE_MODE
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 771dc781b746..f51348dafafd 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -486,7 +486,7 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
486void __init usbhs_init(const struct usbhs_omap_board_data *pdata) 486void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
487{ 487{
488 struct omap_hwmod *oh[2]; 488 struct omap_hwmod *oh[2];
489 struct omap_device *od; 489 struct platform_device *pdev;
490 int bus_id = -1; 490 int bus_id = -1;
491 int i; 491 int i;
492 492
@@ -522,11 +522,11 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
522 return; 522 return;
523 } 523 }
524 524
525 od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2, 525 pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
526 (void *)&usbhs_data, sizeof(usbhs_data), 526 (void *)&usbhs_data, sizeof(usbhs_data),
527 omap_uhhtll_latency, 527 omap_uhhtll_latency,
528 ARRAY_SIZE(omap_uhhtll_latency), false); 528 ARRAY_SIZE(omap_uhhtll_latency), false);
529 if (IS_ERR(od)) { 529 if (IS_ERR(pdev)) {
530 pr_err("Could not build hwmod devices %s,%s\n", 530 pr_err("Could not build hwmod devices %s,%s\n",
531 USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME); 531 USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
532 return; 532 return;
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 031d116fbf10..84da34f9a7cf 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -10,6 +10,7 @@
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/delay.h> 11#include <linux/delay.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/bug.h>
13 14
14#include <plat/cpu.h> 15#include <plat/cpu.h>
15 16
@@ -247,7 +248,7 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
247 * omap_vc_i2c_init - initialize I2C interface to PMIC 248 * omap_vc_i2c_init - initialize I2C interface to PMIC
248 * @voltdm: voltage domain containing VC data 249 * @voltdm: voltage domain containing VC data
249 * 250 *
250 * Use PMIC supplied seetings for I2C high-speed mode and 251 * Use PMIC supplied settings for I2C high-speed mode and
251 * master code (if set) and program the VC I2C configuration 252 * master code (if set) and program the VC I2C configuration
252 * register. 253 * register.
253 * 254 *
@@ -265,8 +266,8 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
265 266
266 if (initialized) { 267 if (initialized) {
267 if (voltdm->pmic->i2c_high_speed != i2c_high_speed) 268 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
268 pr_warn("%s: I2C config for all channels must match.", 269 pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",
269 __func__); 270 __func__, voltdm->name, i2c_high_speed);
270 return; 271 return;
271 } 272 }
272 273
@@ -292,9 +293,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
292 u32 val; 293 u32 val;
293 294
294 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { 295 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
295 pr_err("%s: PMIC info requried to configure vc for" 296 pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
296 "vdd_%s not populated.Hence cannot initialize vc\n",
297 __func__, voltdm->name);
298 return; 297 return;
299 } 298 }
300 299
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index c005e2f5e383..57db2038b23c 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -108,6 +108,7 @@ void __init omap3xxx_voltagedomains_init(void)
108 * XXX Will depend on the process, validation, and binning 108 * XXX Will depend on the process, validation, and binning
109 * for the currently-running IC 109 * for the currently-running IC
110 */ 110 */
111#ifdef CONFIG_PM_OPP
111 if (cpu_is_omap3630()) { 112 if (cpu_is_omap3630()) {
112 omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data; 113 omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data;
113 omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data; 114 omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data;
@@ -115,6 +116,7 @@ void __init omap3xxx_voltagedomains_init(void)
115 omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data; 116 omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data;
116 omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; 117 omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
117 } 118 }
119#endif
118 120
119 if (cpu_is_omap3517() || cpu_is_omap3505()) 121 if (cpu_is_omap3517() || cpu_is_omap3505())
120 voltdms = voltagedomains_am35xx; 122 voltdms = voltagedomains_am35xx;
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index 4e11d022595d..c3115f6853d4 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -100,9 +100,11 @@ void __init omap44xx_voltagedomains_init(void)
100 * XXX Will depend on the process, validation, and binning 100 * XXX Will depend on the process, validation, and binning
101 * for the currently-running IC 101 * for the currently-running IC
102 */ 102 */
103#ifdef CONFIG_PM_OPP
103 omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data; 104 omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data;
104 omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data; 105 omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data;
105 omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data; 106 omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data;
107#endif
106 108
107 for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) 109 for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++)
108 voltdm->sys_clk.name = sys_clk_name; 110 voltdm->sys_clk.name = sys_clk_name;
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 807391d84a9d..f95c1bad9dc6 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -41,6 +41,11 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
41 u32 val, sys_clk_rate, timeout, waittime; 41 u32 val, sys_clk_rate, timeout, waittime;
42 u32 vddmin, vddmax, vstepmin, vstepmax; 42 u32 vddmin, vddmax, vstepmin, vstepmax;
43 43
44 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
45 pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
46 return;
47 }
48
44 if (!voltdm->read || !voltdm->write) { 49 if (!voltdm->read || !voltdm->write) {
45 pr_err("%s: No read/write API for accessing vdd_%s regs\n", 50 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
46 __func__, voltdm->name); 51 __func__, voltdm->name);
@@ -56,8 +61,8 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
56 vddmin = voltdm->pmic->vp_vddmin; 61 vddmin = voltdm->pmic->vp_vddmin;
57 vddmax = voltdm->pmic->vp_vddmax; 62 vddmax = voltdm->pmic->vp_vddmax;
58 63
59 waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * 64 waittime = DIV_ROUND_UP(voltdm->pmic->step_size * sys_clk_rate,
60 sys_clk_rate) / 1000; 65 1000 * voltdm->pmic->slew_rate);
61 vstepmin = voltdm->pmic->vp_vstepmin; 66 vstepmin = voltdm->pmic->vp_vstepmin;
62 vstepmax = voltdm->pmic->vp_vstepmax; 67 vstepmax = voltdm->pmic->vp_vstepmax;
63 68