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-rw-r--r--arch/arm/mach-omap2/include/mach/am35xx.h2
-rw-r--r--arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h1
-rw-r--r--arch/arm/mach-omap2/include/mach/debug-macro.S25
-rw-r--r--arch/arm/mach-omap2/include/mach/omap-wakeupgen.h7
4 files changed, 30 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/include/mach/am35xx.h b/arch/arm/mach-omap2/include/mach/am35xx.h
index f1e13d1ca5e7..95594495fcf6 100644
--- a/arch/arm/mach-omap2/include/mach/am35xx.h
+++ b/arch/arm/mach-omap2/include/mach/am35xx.h
@@ -36,6 +36,8 @@
36#define AM35XX_EMAC_CNTRL_MOD_OFFSET (0x0) 36#define AM35XX_EMAC_CNTRL_MOD_OFFSET (0x0)
37#define AM35XX_EMAC_CNTRL_RAM_OFFSET (0x20000) 37#define AM35XX_EMAC_CNTRL_RAM_OFFSET (0x20000)
38#define AM35XX_EMAC_MDIO_OFFSET (0x30000) 38#define AM35XX_EMAC_MDIO_OFFSET (0x30000)
39#define AM35XX_IPSS_MDIO_BASE (AM35XX_IPSS_EMAC_BASE + \
40 AM35XX_EMAC_MDIO_OFFSET)
39#define AM35XX_EMAC_CNTRL_RAM_SIZE (0x2000) 41#define AM35XX_EMAC_CNTRL_RAM_SIZE (0x2000)
40#define AM35XX_EMAC_RAM_ADDR (AM3517_EMAC_BASE + \ 42#define AM35XX_EMAC_RAM_ADDR (AM3517_EMAC_BASE + \
41 AM3517_EMAC_CNTRL_RAM_OFFSET) 43 AM3517_EMAC_CNTRL_RAM_OFFSET)
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
index 2f7ac70a20d8..01970824e0e5 100644
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
+++ b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
@@ -42,6 +42,7 @@
42#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268 42#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268
43#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4 43#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
44#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300 44#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300
45#define OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR 0x0304
45#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314 46#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314
46#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318 47#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318
47#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320 48#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index cdfc2a1f0e75..93d10de7129f 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -60,18 +60,20 @@ omap_uart_lsr: .word 0
60 beq 23f @ configure OMAP2UART3 60 beq 23f @ configure OMAP2UART3
61 cmp \rp, #OMAP3UART3 @ only on 34xx 61 cmp \rp, #OMAP3UART3 @ only on 34xx
62 beq 33f @ configure OMAP3UART3 62 beq 33f @ configure OMAP3UART3
63 cmp \rp, #OMAP4UART3 @ only on 44xx 63 cmp \rp, #OMAP4UART3 @ only on 44xx/54xx
64 beq 43f @ configure OMAP4UART3 64 beq 43f @ configure OMAP4/5UART3
65 cmp \rp, #OMAP3UART4 @ only on 36xx 65 cmp \rp, #OMAP3UART4 @ only on 36xx
66 beq 34f @ configure OMAP3UART4 66 beq 34f @ configure OMAP3UART4
67 cmp \rp, #OMAP4UART4 @ only on 44xx 67 cmp \rp, #OMAP4UART4 @ only on 44xx/54xx
68 beq 44f @ configure OMAP4UART4 68 beq 44f @ configure OMAP4/5UART4
69 cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different 69 cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different
70 beq 81f @ configure UART1 70 beq 81f @ configure UART1
71 cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different 71 cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different
72 beq 82f @ configure UART2 72 beq 82f @ configure UART2
73 cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different 73 cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different
74 beq 83f @ configure UART3 74 beq 83f @ configure UART3
75 cmp \rp, #AM33XXUART1 @ AM33XX UART offsets different
76 beq 84f @ configure UART1
75 cmp \rp, #ZOOM_UART @ only on zoom2/3 77 cmp \rp, #ZOOM_UART @ only on zoom2/3
76 beq 95f @ configure ZOOM_UART 78 beq 95f @ configure ZOOM_UART
77 79
@@ -100,7 +102,9 @@ omap_uart_lsr: .word 0
100 b 98f 102 b 98f
10183: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE) 10383: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
102 b 98f 104 b 98f
103 10584: ldr \rp, =AM33XX_UART1_BASE
106 and \rp, \rp, #0x00ffffff
107 b 97f
10495: ldr \rp, =ZOOM_UART_BASE 10895: ldr \rp, =ZOOM_UART_BASE
105 str \rp, [\tmp, #0] @ omap_uart_phys 109 str \rp, [\tmp, #0] @ omap_uart_phys
106 ldr \rp, =ZOOM_UART_VIRT 110 ldr \rp, =ZOOM_UART_VIRT
@@ -109,6 +113,17 @@ omap_uart_lsr: .word 0
109 str \rp, [\tmp, #8] @ omap_uart_lsr 113 str \rp, [\tmp, #8] @ omap_uart_lsr
110 b 10b 114 b 10b
111 115
116 /* AM33XX: Store both phys and virt address for the uart */
11797: add \rp, \rp, #0x44000000 @ phys base
118 str \rp, [\tmp, #0] @ omap_uart_phys
119 sub \rp, \rp, #0x44000000 @ phys base
120 add \rp, \rp, #0xf9000000 @ virt base
121 str \rp, [\tmp, #4] @ omap_uart_virt
122 mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
123 str \rp, [\tmp, #8] @ omap_uart_lsr
124
125 b 10b
126
112 /* Store both phys and virt address for the uart */ 127 /* Store both phys and virt address for the uart */
11398: add \rp, \rp, #0x48000000 @ phys base 12898: add \rp, \rp, #0x48000000 @ phys base
114 str \rp, [\tmp, #0] @ omap_uart_phys 129 str \rp, [\tmp, #0] @ omap_uart_phys
diff --git a/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
index 548de90b58c2..b0fd16f5c391 100644
--- a/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
+++ b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
@@ -11,15 +11,20 @@
11#ifndef OMAP_ARCH_WAKEUPGEN_H 11#ifndef OMAP_ARCH_WAKEUPGEN_H
12#define OMAP_ARCH_WAKEUPGEN_H 12#define OMAP_ARCH_WAKEUPGEN_H
13 13
14/* OMAP4 and OMAP5 has same base address */
15#define OMAP_WKUPGEN_BASE 0x48281000
16
14#define OMAP_WKG_CONTROL_0 0x00 17#define OMAP_WKG_CONTROL_0 0x00
15#define OMAP_WKG_ENB_A_0 0x10 18#define OMAP_WKG_ENB_A_0 0x10
16#define OMAP_WKG_ENB_B_0 0x14 19#define OMAP_WKG_ENB_B_0 0x14
17#define OMAP_WKG_ENB_C_0 0x18 20#define OMAP_WKG_ENB_C_0 0x18
18#define OMAP_WKG_ENB_D_0 0x1c 21#define OMAP_WKG_ENB_D_0 0x1c
22#define OMAP_WKG_ENB_E_0 0x20
19#define OMAP_WKG_ENB_A_1 0x410 23#define OMAP_WKG_ENB_A_1 0x410
20#define OMAP_WKG_ENB_B_1 0x414 24#define OMAP_WKG_ENB_B_1 0x414
21#define OMAP_WKG_ENB_C_1 0x418 25#define OMAP_WKG_ENB_C_1 0x418
22#define OMAP_WKG_ENB_D_1 0x41c 26#define OMAP_WKG_ENB_D_1 0x41c
27#define OMAP_WKG_ENB_E_1 0x420
23#define OMAP_AUX_CORE_BOOT_0 0x800 28#define OMAP_AUX_CORE_BOOT_0 0x800
24#define OMAP_AUX_CORE_BOOT_1 0x804 29#define OMAP_AUX_CORE_BOOT_1 0x804
25#define OMAP_PTMSYNCREQ_MASK 0xc00 30#define OMAP_PTMSYNCREQ_MASK 0xc00
@@ -28,4 +33,6 @@
28#define OMAP_TIMESTAMPCYCLEHI 0xc0c 33#define OMAP_TIMESTAMPCYCLEHI 0xc0c
29 34
30extern int __init omap_wakeupgen_init(void); 35extern int __init omap_wakeupgen_init(void);
36extern void __iomem *omap_get_wakeupgen_base(void);
37extern int omap_secure_apis_support(void);
31#endif 38#endif