diff options
Diffstat (limited to 'arch/arm/mach-omap2/gpmc.c')
-rw-r--r-- | arch/arm/mach-omap2/gpmc.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 382dea83e4f0..674174365f78 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
@@ -60,7 +60,6 @@ | |||
60 | #define GPMC_CHUNK_SHIFT 24 /* 16 MB */ | 60 | #define GPMC_CHUNK_SHIFT 24 /* 16 MB */ |
61 | #define GPMC_SECTION_SHIFT 28 /* 128 MB */ | 61 | #define GPMC_SECTION_SHIFT 28 /* 128 MB */ |
62 | 62 | ||
63 | #define PREFETCH_FIFOTHRESHOLD (0x40 << 8) | ||
64 | #define CS_NUM_SHIFT 24 | 63 | #define CS_NUM_SHIFT 24 |
65 | #define ENABLE_PREFETCH (0x1 << 7) | 64 | #define ENABLE_PREFETCH (0x1 << 7) |
66 | #define DMA_MPU_MODE 2 | 65 | #define DMA_MPU_MODE 2 |
@@ -606,15 +605,19 @@ EXPORT_SYMBOL(gpmc_nand_write); | |||
606 | /** | 605 | /** |
607 | * gpmc_prefetch_enable - configures and starts prefetch transfer | 606 | * gpmc_prefetch_enable - configures and starts prefetch transfer |
608 | * @cs: cs (chip select) number | 607 | * @cs: cs (chip select) number |
608 | * @fifo_th: fifo threshold to be used for read/ write | ||
609 | * @dma_mode: dma mode enable (1) or disable (0) | 609 | * @dma_mode: dma mode enable (1) or disable (0) |
610 | * @u32_count: number of bytes to be transferred | 610 | * @u32_count: number of bytes to be transferred |
611 | * @is_write: prefetch read(0) or write post(1) mode | 611 | * @is_write: prefetch read(0) or write post(1) mode |
612 | */ | 612 | */ |
613 | int gpmc_prefetch_enable(int cs, int dma_mode, | 613 | int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode, |
614 | unsigned int u32_count, int is_write) | 614 | unsigned int u32_count, int is_write) |
615 | { | 615 | { |
616 | 616 | ||
617 | if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) { | 617 | if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX) { |
618 | pr_err("gpmc: fifo threshold is not supported\n"); | ||
619 | return -1; | ||
620 | } else if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) { | ||
618 | /* Set the amount of bytes to be prefetched */ | 621 | /* Set the amount of bytes to be prefetched */ |
619 | gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count); | 622 | gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count); |
620 | 623 | ||
@@ -622,7 +625,7 @@ int gpmc_prefetch_enable(int cs, int dma_mode, | |||
622 | * enable the engine. Set which cs is has requested for. | 625 | * enable the engine. Set which cs is has requested for. |
623 | */ | 626 | */ |
624 | gpmc_write_reg(GPMC_PREFETCH_CONFIG1, ((cs << CS_NUM_SHIFT) | | 627 | gpmc_write_reg(GPMC_PREFETCH_CONFIG1, ((cs << CS_NUM_SHIFT) | |
625 | PREFETCH_FIFOTHRESHOLD | | 628 | PREFETCH_FIFOTHRESHOLD(fifo_th) | |
626 | ENABLE_PREFETCH | | 629 | ENABLE_PREFETCH | |
627 | (dma_mode << DMA_MPU_MODE) | | 630 | (dma_mode << DMA_MPU_MODE) | |
628 | (0x1 & is_write))); | 631 | (0x1 & is_write))); |