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-rw-r--r--arch/arm/mach-mxs/include/mach/mxs.h29
1 files changed, 16 insertions, 13 deletions
diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h
index bde5f6634747..7d4fb6d0afda 100644
--- a/arch/arm/mach-mxs/include/mach/mxs.h
+++ b/arch/arm/mach-mxs/include/mach/mxs.h
@@ -23,22 +23,10 @@
23#include <linux/io.h> 23#include <linux/io.h>
24#endif 24#endif
25#include <asm/mach-types.h> 25#include <asm/mach-types.h>
26#include <mach/digctl.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27 28
28/* 29/*
29 * MXS CPU types
30 */
31#define cpu_is_mx23() ( \
32 machine_is_mx23evk() || \
33 machine_is_stmp378x() || \
34 0)
35#define cpu_is_mx28() ( \
36 machine_is_mx28evk() || \
37 machine_is_m28evk() || \
38 machine_is_tx28() || \
39 0)
40
41/*
42 * IO addresses common to MXS-based 30 * IO addresses common to MXS-based
43 */ 31 */
44#define MXS_IO_BASE_ADDR 0x80000000 32#define MXS_IO_BASE_ADDR 0x80000000
@@ -109,6 +97,21 @@ static inline void __mxs_togl(u32 mask, void __iomem *reg)
109{ 97{
110 __raw_writel(mask, reg + MXS_TOG_ADDR); 98 __raw_writel(mask, reg + MXS_TOG_ADDR);
111} 99}
100
101/*
102 * MXS CPU types
103 */
104#define MXS_CHIPID (MXS_IO_ADDRESS(MXS_DIGCTL_BASE_ADDR) + HW_DIGCTL_CHIPID)
105
106static inline int cpu_is_mx23(void)
107{
108 return ((__raw_readl(MXS_CHIPID) >> 16) == 0x3780);
109}
110
111static inline int cpu_is_mx28(void)
112{
113 return ((__raw_readl(MXS_CHIPID) >> 16) == 0x2800);
114}
112#endif 115#endif
113 116
114#endif /* __MACH_MXS_H__ */ 117#endif /* __MACH_MXS_H__ */