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-rw-r--r--arch/arm/mach-exynos/common.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index d6d0dc651089..4ea80bc4ef9b 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -22,12 +22,13 @@
22#include <linux/of_irq.h> 22#include <linux/of_irq.h>
23#include <linux/export.h> 23#include <linux/export.h>
24#include <linux/irqdomain.h> 24#include <linux/irqdomain.h>
25#include <linux/irqchip.h>
25#include <linux/of_address.h> 26#include <linux/of_address.h>
27#include <linux/irqchip/arm-gic.h>
26 28
27#include <asm/proc-fns.h> 29#include <asm/proc-fns.h>
28#include <asm/exception.h> 30#include <asm/exception.h>
29#include <asm/hardware/cache-l2x0.h> 31#include <asm/hardware/cache-l2x0.h>
30#include <asm/hardware/gic.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/mach/irq.h> 33#include <asm/mach/irq.h>
33#include <asm/cacheflush.h> 34#include <asm/cacheflush.h>
@@ -424,11 +425,18 @@ static void __init exynos5_init_clocks(int xtal)
424{ 425{
425 printk(KERN_DEBUG "%s: initializing clocks\n", __func__); 426 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
426 427
428 /* EXYNOS5440 can support only common clock framework */
429
430 if (soc_is_exynos5440())
431 return;
432
433#ifdef CONFIG_SOC_EXYNOS5250
427 s3c24xx_register_baseclocks(xtal); 434 s3c24xx_register_baseclocks(xtal);
428 s5p_register_clocks(xtal); 435 s5p_register_clocks(xtal);
429 436
430 exynos5_register_clocks(); 437 exynos5_register_clocks();
431 exynos5_setup_clocks(); 438 exynos5_setup_clocks();
439#endif
432} 440}
433 441
434#define COMBINER_ENABLE_SET 0x0 442#define COMBINER_ENABLE_SET 0x0
@@ -637,8 +645,6 @@ static int __init combiner_of_init(struct device_node *np,
637} 645}
638 646
639static const struct of_device_id exynos_dt_irq_match[] = { 647static const struct of_device_id exynos_dt_irq_match[] = {
640 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
641 { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
642 { .compatible = "samsung,exynos4210-combiner", 648 { .compatible = "samsung,exynos4210-combiner",
643 .data = combiner_of_init, }, 649 .data = combiner_of_init, },
644 {}, 650 {},
@@ -654,8 +660,10 @@ void __init exynos4_init_irq(void)
654 if (!of_have_populated_dt()) 660 if (!of_have_populated_dt())
655 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL); 661 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
656#ifdef CONFIG_OF 662#ifdef CONFIG_OF
657 else 663 else {
664 irqchip_init();
658 of_irq_init(exynos_dt_irq_match); 665 of_irq_init(exynos_dt_irq_match);
666 }
659#endif 667#endif
660 668
661 if (!of_have_populated_dt()) 669 if (!of_have_populated_dt())
@@ -672,6 +680,7 @@ void __init exynos4_init_irq(void)
672void __init exynos5_init_irq(void) 680void __init exynos5_init_irq(void)
673{ 681{
674#ifdef CONFIG_OF 682#ifdef CONFIG_OF
683 irqchip_init();
675 of_irq_init(exynos_dt_irq_match); 684 of_irq_init(exynos_dt_irq_match);
676#endif 685#endif
677 /* 686 /*