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-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c67
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c96
-rw-r--r--arch/arm/mach-davinci/board-mityomapl138.c167
-rw-r--r--arch/arm/mach-davinci/board-omapl138-hawk.c284
-rw-r--r--arch/arm/mach-davinci/da830.c6
-rw-r--r--arch/arm/mach-davinci/da850.c99
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c125
-rw-r--r--arch/arm/mach-davinci/dm355.c5
-rw-r--r--arch/arm/mach-davinci/dm365.c5
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h11
-rw-r--r--arch/arm/mach-davinci/include/mach/edma.h36
-rw-r--r--arch/arm/mach-davinci/include/mach/mux.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/spi.h15
14 files changed, 784 insertions, 138 deletions
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index b52a3a1abd94..8bc3701aa05c 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -20,6 +20,8 @@
20#include <linux/i2c/at24.h> 20#include <linux/i2c/at24.h>
21#include <linux/mtd/mtd.h> 21#include <linux/mtd/mtd.h>
22#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
23#include <linux/spi/spi.h>
24#include <linux/spi/flash.h>
23 25
24#include <asm/mach-types.h> 26#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
@@ -30,6 +32,7 @@
30#include <mach/da8xx.h> 32#include <mach/da8xx.h>
31#include <mach/usb.h> 33#include <mach/usb.h>
32#include <mach/aemif.h> 34#include <mach/aemif.h>
35#include <mach/spi.h>
33 36
34#define DA830_EVM_PHY_ID "" 37#define DA830_EVM_PHY_ID ""
35/* 38/*
@@ -534,6 +537,64 @@ static struct edma_rsv_info da830_edma_rsv[] = {
534 }, 537 },
535}; 538};
536 539
540static struct mtd_partition da830evm_spiflash_part[] = {
541 [0] = {
542 .name = "DSP-UBL",
543 .offset = 0,
544 .size = SZ_8K,
545 .mask_flags = MTD_WRITEABLE,
546 },
547 [1] = {
548 .name = "ARM-UBL",
549 .offset = MTDPART_OFS_APPEND,
550 .size = SZ_16K + SZ_8K,
551 .mask_flags = MTD_WRITEABLE,
552 },
553 [2] = {
554 .name = "U-Boot",
555 .offset = MTDPART_OFS_APPEND,
556 .size = SZ_256K - SZ_32K,
557 .mask_flags = MTD_WRITEABLE,
558 },
559 [3] = {
560 .name = "U-Boot-Environment",
561 .offset = MTDPART_OFS_APPEND,
562 .size = SZ_16K,
563 .mask_flags = 0,
564 },
565 [4] = {
566 .name = "Kernel",
567 .offset = MTDPART_OFS_APPEND,
568 .size = MTDPART_SIZ_FULL,
569 .mask_flags = 0,
570 },
571};
572
573static struct flash_platform_data da830evm_spiflash_data = {
574 .name = "m25p80",
575 .parts = da830evm_spiflash_part,
576 .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
577 .type = "w25x32",
578};
579
580static struct davinci_spi_config da830evm_spiflash_cfg = {
581 .io_type = SPI_IO_TYPE_DMA,
582 .c2tdelay = 8,
583 .t2cdelay = 8,
584};
585
586static struct spi_board_info da830evm_spi_info[] = {
587 {
588 .modalias = "m25p80",
589 .platform_data = &da830evm_spiflash_data,
590 .controller_data = &da830evm_spiflash_cfg,
591 .mode = SPI_MODE_0,
592 .max_speed_hz = 30000000,
593 .bus_num = 0,
594 .chip_select = 0,
595 },
596};
597
537static __init void da830_evm_init(void) 598static __init void da830_evm_init(void)
538{ 599{
539 struct davinci_soc_info *soc_info = &davinci_soc_info; 600 struct davinci_soc_info *soc_info = &davinci_soc_info;
@@ -590,6 +651,12 @@ static __init void da830_evm_init(void)
590 ret = da8xx_register_rtc(); 651 ret = da8xx_register_rtc();
591 if (ret) 652 if (ret)
592 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret); 653 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
654
655 ret = da8xx_register_spi(0, da830evm_spi_info,
656 ARRAY_SIZE(da830evm_spi_info));
657 if (ret)
658 pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
659 ret);
593} 660}
594 661
595#ifdef CONFIG_SERIAL_8250_CONSOLE 662#ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index b01fb2ab944a..a7b41bf505f1 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -29,6 +29,8 @@
29#include <linux/regulator/machine.h> 29#include <linux/regulator/machine.h>
30#include <linux/regulator/tps6507x.h> 30#include <linux/regulator/tps6507x.h>
31#include <linux/input/tps6507x-ts.h> 31#include <linux/input/tps6507x-ts.h>
32#include <linux/spi/spi.h>
33#include <linux/spi/flash.h>
32 34
33#include <asm/mach-types.h> 35#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
@@ -38,6 +40,7 @@
38#include <mach/nand.h> 40#include <mach/nand.h>
39#include <mach/mux.h> 41#include <mach/mux.h>
40#include <mach/aemif.h> 42#include <mach/aemif.h>
43#include <mach/spi.h>
41 44
42#define DA850_EVM_PHY_ID "0:00" 45#define DA850_EVM_PHY_ID "0:00"
43#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) 46#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
@@ -48,6 +51,70 @@
48 51
49#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) 52#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
50 53
54static struct mtd_partition da850evm_spiflash_part[] = {
55 [0] = {
56 .name = "UBL",
57 .offset = 0,
58 .size = SZ_64K,
59 .mask_flags = MTD_WRITEABLE,
60 },
61 [1] = {
62 .name = "U-Boot",
63 .offset = MTDPART_OFS_APPEND,
64 .size = SZ_512K,
65 .mask_flags = MTD_WRITEABLE,
66 },
67 [2] = {
68 .name = "U-Boot-Env",
69 .offset = MTDPART_OFS_APPEND,
70 .size = SZ_64K,
71 .mask_flags = MTD_WRITEABLE,
72 },
73 [3] = {
74 .name = "Kernel",
75 .offset = MTDPART_OFS_APPEND,
76 .size = SZ_2M + SZ_512K,
77 .mask_flags = 0,
78 },
79 [4] = {
80 .name = "Filesystem",
81 .offset = MTDPART_OFS_APPEND,
82 .size = SZ_4M,
83 .mask_flags = 0,
84 },
85 [5] = {
86 .name = "MAC-Address",
87 .offset = SZ_8M - SZ_64K,
88 .size = SZ_64K,
89 .mask_flags = MTD_WRITEABLE,
90 },
91};
92
93static struct flash_platform_data da850evm_spiflash_data = {
94 .name = "m25p80",
95 .parts = da850evm_spiflash_part,
96 .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
97 .type = "m25p64",
98};
99
100static struct davinci_spi_config da850evm_spiflash_cfg = {
101 .io_type = SPI_IO_TYPE_DMA,
102 .c2tdelay = 8,
103 .t2cdelay = 8,
104};
105
106static struct spi_board_info da850evm_spi_info[] = {
107 {
108 .modalias = "m25p80",
109 .platform_data = &da850evm_spiflash_data,
110 .controller_data = &da850evm_spiflash_cfg,
111 .mode = SPI_MODE_0,
112 .max_speed_hz = 30000000,
113 .bus_num = 1,
114 .chip_select = 0,
115 },
116};
117
51static struct mtd_partition da850_evm_norflash_partition[] = { 118static struct mtd_partition da850_evm_norflash_partition[] = {
52 { 119 {
53 .name = "bootloaders + env", 120 .name = "bootloaders + env",
@@ -231,8 +298,6 @@ static const short da850_evm_nor_pins[] = {
231 -1 298 -1
232}; 299};
233 300
234static u32 ui_card_detected;
235
236#if defined(CONFIG_MMC_DAVINCI) || \ 301#if defined(CONFIG_MMC_DAVINCI) || \
237 defined(CONFIG_MMC_DAVINCI_MODULE) 302 defined(CONFIG_MMC_DAVINCI_MODULE)
238#define HAS_MMC 1 303#define HAS_MMC 1
@@ -244,7 +309,7 @@ static inline void da850_evm_setup_nor_nand(void)
244{ 309{
245 int ret = 0; 310 int ret = 0;
246 311
247 if (ui_card_detected & !HAS_MMC) { 312 if (!HAS_MMC) {
248 ret = davinci_cfg_reg_list(da850_evm_nand_pins); 313 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
249 if (ret) 314 if (ret)
250 pr_warning("da850_evm_init: nand mux setup failed: " 315 pr_warning("da850_evm_init: nand mux setup failed: "
@@ -394,7 +459,6 @@ static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
394 goto exp_setup_keys_fail; 459 goto exp_setup_keys_fail;
395 } 460 }
396 461
397 ui_card_detected = 1;
398 pr_info("DA850/OMAP-L138 EVM UI card detected\n"); 462 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
399 463
400 da850_evm_setup_nor_nand(); 464 da850_evm_setup_nor_nand();
@@ -664,6 +728,13 @@ static struct snd_platform_data da850_evm_snd_data = {
664 .rxnumevt = 1, 728 .rxnumevt = 1,
665}; 729};
666 730
731static const short da850_evm_mcasp_pins[] __initconst = {
732 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
733 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
734 DA850_AXR_11, DA850_AXR_12,
735 -1
736};
737
667static int da850_evm_mmc_get_ro(int index) 738static int da850_evm_mmc_get_ro(int index)
668{ 739{
669 return gpio_get_value(DA850_MMCSD_WP_PIN); 740 return gpio_get_value(DA850_MMCSD_WP_PIN);
@@ -683,6 +754,13 @@ static struct davinci_mmc_config da850_mmc_config = {
683 .version = MMC_CTLR_VERSION_2, 754 .version = MMC_CTLR_VERSION_2,
684}; 755};
685 756
757static const short da850_evm_mmcsd0_pins[] __initconst = {
758 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
759 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
760 DA850_GPIO4_0, DA850_GPIO4_1,
761 -1
762};
763
686static void da850_panel_power_ctrl(int val) 764static void da850_panel_power_ctrl(int val)
687{ 765{
688 /* lcd backlight */ 766 /* lcd backlight */
@@ -1070,7 +1148,7 @@ static __init void da850_evm_init(void)
1070 ret); 1148 ret);
1071 1149
1072 if (HAS_MMC) { 1150 if (HAS_MMC) {
1073 ret = davinci_cfg_reg_list(da850_mmcsd0_pins); 1151 ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
1074 if (ret) 1152 if (ret)
1075 pr_warning("da850_evm_init: mmcsd0 mux setup failed:" 1153 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
1076 " %d\n", ret); 1154 " %d\n", ret);
@@ -1106,7 +1184,7 @@ static __init void da850_evm_init(void)
1106 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); 1184 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
1107 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); 1185 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
1108 1186
1109 ret = davinci_cfg_reg_list(da850_mcasp_pins); 1187 ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
1110 if (ret) 1188 if (ret)
1111 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", 1189 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
1112 ret); 1190 ret);
@@ -1153,6 +1231,12 @@ static __init void da850_evm_init(void)
1153 if (ret) 1231 if (ret)
1154 pr_warning("da850_evm_init: suspend registration failed: %d\n", 1232 pr_warning("da850_evm_init: suspend registration failed: %d\n",
1155 ret); 1233 ret);
1234
1235 ret = da8xx_register_spi(1, da850evm_spi_info,
1236 ARRAY_SIZE(da850evm_spi_info));
1237 if (ret)
1238 pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
1239 ret);
1156} 1240}
1157 1241
1158#ifdef CONFIG_SERIAL_8250_CONSOLE 1242#ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 0bb5f0ce4fdc..2aa79c54f98e 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -17,6 +17,8 @@
17#include <linux/i2c.h> 17#include <linux/i2c.h>
18#include <linux/i2c/at24.h> 18#include <linux/i2c/at24.h>
19#include <linux/etherdevice.h> 19#include <linux/etherdevice.h>
20#include <linux/spi/spi.h>
21#include <linux/spi/flash.h>
20 22
21#include <asm/mach-types.h> 23#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -25,6 +27,7 @@
25#include <mach/da8xx.h> 27#include <mach/da8xx.h>
26#include <mach/nand.h> 28#include <mach/nand.h>
27#include <mach/mux.h> 29#include <mach/mux.h>
30#include <mach/spi.h>
28 31
29#define MITYOMAPL138_PHY_ID "0:03" 32#define MITYOMAPL138_PHY_ID "0:03"
30 33
@@ -44,38 +47,109 @@ struct factory_config {
44 47
45static struct factory_config factory_config; 48static struct factory_config factory_config;
46 49
50struct part_no_info {
51 const char *part_no; /* part number string of interest */
52 int max_freq; /* khz */
53};
54
55static struct part_no_info mityomapl138_pn_info[] = {
56 {
57 .part_no = "L138-C",
58 .max_freq = 300000,
59 },
60 {
61 .part_no = "L138-D",
62 .max_freq = 375000,
63 },
64 {
65 .part_no = "L138-F",
66 .max_freq = 456000,
67 },
68 {
69 .part_no = "1808-C",
70 .max_freq = 300000,
71 },
72 {
73 .part_no = "1808-D",
74 .max_freq = 375000,
75 },
76 {
77 .part_no = "1808-F",
78 .max_freq = 456000,
79 },
80 {
81 .part_no = "1810-D",
82 .max_freq = 375000,
83 },
84};
85
86#ifdef CONFIG_CPU_FREQ
87static void mityomapl138_cpufreq_init(const char *partnum)
88{
89 int i, ret;
90
91 for (i = 0; partnum && i < ARRAY_SIZE(mityomapl138_pn_info); i++) {
92 /*
93 * the part number has additional characters beyond what is
94 * stored in the table. This information is not needed for
95 * determining the speed grade, and would require several
96 * more table entries. Only check the first N characters
97 * for a match.
98 */
99 if (!strncmp(partnum, mityomapl138_pn_info[i].part_no,
100 strlen(mityomapl138_pn_info[i].part_no))) {
101 da850_max_speed = mityomapl138_pn_info[i].max_freq;
102 break;
103 }
104 }
105
106 ret = da850_register_cpufreq("pll0_sysclk3");
107 if (ret)
108 pr_warning("cpufreq registration failed: %d\n", ret);
109}
110#else
111static void mityomapl138_cpufreq_init(const char *partnum) { }
112#endif
113
47static void read_factory_config(struct memory_accessor *a, void *context) 114static void read_factory_config(struct memory_accessor *a, void *context)
48{ 115{
49 int ret; 116 int ret;
117 const char *partnum = NULL;
50 struct davinci_soc_info *soc_info = &davinci_soc_info; 118 struct davinci_soc_info *soc_info = &davinci_soc_info;
51 119
52 ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config)); 120 ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config));
53 if (ret != sizeof(struct factory_config)) { 121 if (ret != sizeof(struct factory_config)) {
54 pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n", 122 pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n",
55 ret); 123 ret);
56 return; 124 goto bad_config;
57 } 125 }
58 126
59 if (factory_config.magic != FACTORY_CONFIG_MAGIC) { 127 if (factory_config.magic != FACTORY_CONFIG_MAGIC) {
60 pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n", 128 pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n",
61 factory_config.magic); 129 factory_config.magic);
62 return; 130 goto bad_config;
63 } 131 }
64 132
65 if (factory_config.version != FACTORY_CONFIG_VERSION) { 133 if (factory_config.version != FACTORY_CONFIG_VERSION) {
66 pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n", 134 pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n",
67 factory_config.version); 135 factory_config.version);
68 return; 136 goto bad_config;
69 } 137 }
70 138
71 pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac); 139 pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac);
72 pr_info("MityOMAPL138: Part Number = %s\n", factory_config.partnum);
73 if (is_valid_ether_addr(factory_config.mac)) 140 if (is_valid_ether_addr(factory_config.mac))
74 memcpy(soc_info->emac_pdata->mac_addr, 141 memcpy(soc_info->emac_pdata->mac_addr,
75 factory_config.mac, ETH_ALEN); 142 factory_config.mac, ETH_ALEN);
76 else 143 else
77 pr_warning("MityOMAPL138: Invalid MAC found " 144 pr_warning("MityOMAPL138: Invalid MAC found "
78 "in factory config block\n"); 145 "in factory config block\n");
146
147 partnum = factory_config.partnum;
148 pr_info("MityOMAPL138: Part Number = %s\n", partnum);
149
150bad_config:
151 /* default maximum speed is valid for all platforms */
152 mityomapl138_cpufreq_init(partnum);
79} 153}
80 154
81static struct at24_platform_data mityomapl138_fd_chip = { 155static struct at24_platform_data mityomapl138_fd_chip = {
@@ -223,6 +297,82 @@ static int __init pmic_tps65023_init(void)
223} 297}
224 298
225/* 299/*
300 * SPI Devices:
301 * SPI1_CS0: 8M Flash ST-M25P64-VME6G
302 */
303static struct mtd_partition spi_flash_partitions[] = {
304 [0] = {
305 .name = "ubl",
306 .offset = 0,
307 .size = SZ_64K,
308 .mask_flags = MTD_WRITEABLE,
309 },
310 [1] = {
311 .name = "u-boot",
312 .offset = MTDPART_OFS_APPEND,
313 .size = SZ_512K,
314 .mask_flags = MTD_WRITEABLE,
315 },
316 [2] = {
317 .name = "u-boot-env",
318 .offset = MTDPART_OFS_APPEND,
319 .size = SZ_64K,
320 .mask_flags = MTD_WRITEABLE,
321 },
322 [3] = {
323 .name = "periph-config",
324 .offset = MTDPART_OFS_APPEND,
325 .size = SZ_64K,
326 .mask_flags = MTD_WRITEABLE,
327 },
328 [4] = {
329 .name = "reserved",
330 .offset = MTDPART_OFS_APPEND,
331 .size = SZ_256K + SZ_64K,
332 },
333 [5] = {
334 .name = "kernel",
335 .offset = MTDPART_OFS_APPEND,
336 .size = SZ_2M + SZ_1M,
337 },
338 [6] = {
339 .name = "fpga",
340 .offset = MTDPART_OFS_APPEND,
341 .size = SZ_2M,
342 },
343 [7] = {
344 .name = "spare",
345 .offset = MTDPART_OFS_APPEND,
346 .size = MTDPART_SIZ_FULL,
347 },
348};
349
350static struct flash_platform_data mityomapl138_spi_flash_data = {
351 .name = "m25p80",
352 .parts = spi_flash_partitions,
353 .nr_parts = ARRAY_SIZE(spi_flash_partitions),
354 .type = "m24p64",
355};
356
357static struct davinci_spi_config spi_eprom_config = {
358 .io_type = SPI_IO_TYPE_DMA,
359 .c2tdelay = 8,
360 .t2cdelay = 8,
361};
362
363static struct spi_board_info mityomapl138_spi_flash_info[] = {
364 {
365 .modalias = "m25p80",
366 .platform_data = &mityomapl138_spi_flash_data,
367 .controller_data = &spi_eprom_config,
368 .mode = SPI_MODE_0,
369 .max_speed_hz = 30000000,
370 .bus_num = 1,
371 .chip_select = 0,
372 },
373};
374
375/*
226 * MityDSP-L138 includes a 256 MByte large-page NAND flash 376 * MityDSP-L138 includes a 256 MByte large-page NAND flash
227 * (128K blocks). 377 * (128K blocks).
228 */ 378 */
@@ -377,16 +527,17 @@ static void __init mityomapl138_init(void)
377 527
378 mityomapl138_setup_nand(); 528 mityomapl138_setup_nand();
379 529
530 ret = da8xx_register_spi(1, mityomapl138_spi_flash_info,
531 ARRAY_SIZE(mityomapl138_spi_flash_info));
532 if (ret)
533 pr_warning("spi 1 registration failed: %d\n", ret);
534
380 mityomapl138_config_emac(); 535 mityomapl138_config_emac();
381 536
382 ret = da8xx_register_rtc(); 537 ret = da8xx_register_rtc();
383 if (ret) 538 if (ret)
384 pr_warning("rtc setup failed: %d\n", ret); 539 pr_warning("rtc setup failed: %d\n", ret);
385 540
386 ret = da850_register_cpufreq("pll0_sysclk3");
387 if (ret)
388 pr_warning("cpufreq registration failed: %d\n", ret);
389
390 ret = da8xx_register_cpuidle(); 541 ret = da8xx_register_cpuidle();
391 if (ret) 542 if (ret)
392 pr_warning("cpuidle registration failed: %d\n", ret); 543 pr_warning("cpuidle registration failed: %d\n", ret);
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 0b8dbdb79fe0..67c38d0ecd10 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -19,6 +19,279 @@
19 19
20#include <mach/cp_intc.h> 20#include <mach/cp_intc.h>
21#include <mach/da8xx.h> 21#include <mach/da8xx.h>
22#include <mach/mux.h>
23
24#define HAWKBOARD_PHY_ID "0:07"
25#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12)
26#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13)
27
28#define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4)
29#define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13)
30
31static short omapl138_hawk_mii_pins[] __initdata = {
32 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
33 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
34 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
35 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
36 DA850_MDIO_D,
37 -1
38};
39
40static __init void omapl138_hawk_config_emac(void)
41{
42 void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
43 int ret;
44 u32 val;
45 struct davinci_soc_info *soc_info = &davinci_soc_info;
46
47 val = __raw_readl(cfgchip3);
48 val &= ~BIT(8);
49 ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins);
50 if (ret) {
51 pr_warning("%s: cpgmac/mii mux setup failed: %d\n",
52 __func__, ret);
53 return;
54 }
55
56 /* configure the CFGCHIP3 register for MII */
57 __raw_writel(val, cfgchip3);
58 pr_info("EMAC: MII PHY configured\n");
59
60 soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID;
61
62 ret = da8xx_register_emac();
63 if (ret)
64 pr_warning("%s: emac registration failed: %d\n",
65 __func__, ret);
66}
67
68/*
69 * The following EDMA channels/slots are not being used by drivers (for
70 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard,
71 * hence they are being reserved for codecs on the DSP side.
72 */
73static const s16 da850_dma0_rsv_chans[][2] = {
74 /* (offset, number) */
75 { 8, 6},
76 {24, 4},
77 {30, 2},
78 {-1, -1}
79};
80
81static const s16 da850_dma0_rsv_slots[][2] = {
82 /* (offset, number) */
83 { 8, 6},
84 {24, 4},
85 {30, 50},
86 {-1, -1}
87};
88
89static const s16 da850_dma1_rsv_chans[][2] = {
90 /* (offset, number) */
91 { 0, 28},
92 {30, 2},
93 {-1, -1}
94};
95
96static const s16 da850_dma1_rsv_slots[][2] = {
97 /* (offset, number) */
98 { 0, 28},
99 {30, 90},
100 {-1, -1}
101};
102
103static struct edma_rsv_info da850_edma_cc0_rsv = {
104 .rsv_chans = da850_dma0_rsv_chans,
105 .rsv_slots = da850_dma0_rsv_slots,
106};
107
108static struct edma_rsv_info da850_edma_cc1_rsv = {
109 .rsv_chans = da850_dma1_rsv_chans,
110 .rsv_slots = da850_dma1_rsv_slots,
111};
112
113static struct edma_rsv_info *da850_edma_rsv[2] = {
114 &da850_edma_cc0_rsv,
115 &da850_edma_cc1_rsv,
116};
117
118static const short hawk_mmcsd0_pins[] = {
119 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
120 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
121 DA850_GPIO3_12, DA850_GPIO3_13,
122 -1
123};
124
125static int da850_hawk_mmc_get_ro(int index)
126{
127 return gpio_get_value(DA850_HAWK_MMCSD_WP_PIN);
128}
129
130static int da850_hawk_mmc_get_cd(int index)
131{
132 return !gpio_get_value(DA850_HAWK_MMCSD_CD_PIN);
133}
134
135static struct davinci_mmc_config da850_mmc_config = {
136 .get_ro = da850_hawk_mmc_get_ro,
137 .get_cd = da850_hawk_mmc_get_cd,
138 .wires = 4,
139 .max_freq = 50000000,
140 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
141 .version = MMC_CTLR_VERSION_2,
142};
143
144static __init void omapl138_hawk_mmc_init(void)
145{
146 int ret;
147
148 ret = davinci_cfg_reg_list(hawk_mmcsd0_pins);
149 if (ret) {
150 pr_warning("%s: MMC/SD0 mux setup failed: %d\n",
151 __func__, ret);
152 return;
153 }
154
155 ret = gpio_request_one(DA850_HAWK_MMCSD_CD_PIN,
156 GPIOF_DIR_IN, "MMC CD");
157 if (ret < 0) {
158 pr_warning("%s: can not open GPIO %d\n",
159 __func__, DA850_HAWK_MMCSD_CD_PIN);
160 return;
161 }
162
163 ret = gpio_request_one(DA850_HAWK_MMCSD_WP_PIN,
164 GPIOF_DIR_IN, "MMC WP");
165 if (ret < 0) {
166 pr_warning("%s: can not open GPIO %d\n",
167 __func__, DA850_HAWK_MMCSD_WP_PIN);
168 goto mmc_setup_wp_fail;
169 }
170
171 ret = da8xx_register_mmcsd0(&da850_mmc_config);
172 if (ret) {
173 pr_warning("%s: MMC/SD0 registration failed: %d\n",
174 __func__, ret);
175 goto mmc_setup_mmcsd_fail;
176 }
177
178 return;
179
180mmc_setup_mmcsd_fail:
181 gpio_free(DA850_HAWK_MMCSD_WP_PIN);
182mmc_setup_wp_fail:
183 gpio_free(DA850_HAWK_MMCSD_CD_PIN);
184}
185
186static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id);
187static da8xx_ocic_handler_t hawk_usb_ocic_handler;
188
189static const short da850_hawk_usb11_pins[] = {
190 DA850_GPIO2_4, DA850_GPIO6_13,
191 -1
192};
193
194static int hawk_usb_set_power(unsigned port, int on)
195{
196 gpio_set_value(DA850_USB1_VBUS_PIN, on);
197 return 0;
198}
199
200static int hawk_usb_get_power(unsigned port)
201{
202 return gpio_get_value(DA850_USB1_VBUS_PIN);
203}
204
205static int hawk_usb_get_oci(unsigned port)
206{
207 return !gpio_get_value(DA850_USB1_OC_PIN);
208}
209
210static int hawk_usb_ocic_notify(da8xx_ocic_handler_t handler)
211{
212 int irq = gpio_to_irq(DA850_USB1_OC_PIN);
213 int error = 0;
214
215 if (handler != NULL) {
216 hawk_usb_ocic_handler = handler;
217
218 error = request_irq(irq, omapl138_hawk_usb_ocic_irq,
219 IRQF_DISABLED | IRQF_TRIGGER_RISING |
220 IRQF_TRIGGER_FALLING,
221 "OHCI over-current indicator", NULL);
222 if (error)
223 pr_err("%s: could not request IRQ to watch "
224 "over-current indicator changes\n", __func__);
225 } else {
226 free_irq(irq, NULL);
227 }
228 return error;
229}
230
231static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = {
232 .set_power = hawk_usb_set_power,
233 .get_power = hawk_usb_get_power,
234 .get_oci = hawk_usb_get_oci,
235 .ocic_notify = hawk_usb_ocic_notify,
236 /* TPS2087 switch @ 5V */
237 .potpgt = (3 + 1) / 2, /* 3 ms max */
238};
239
240static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id)
241{
242 hawk_usb_ocic_handler(&omapl138_hawk_usb11_pdata, 1);
243 return IRQ_HANDLED;
244}
245
246static __init void omapl138_hawk_usb_init(void)
247{
248 int ret;
249 u32 cfgchip2;
250
251 ret = davinci_cfg_reg_list(da850_hawk_usb11_pins);
252 if (ret) {
253 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
254 __func__, ret);
255 return;
256 }
257
258 /* Setup the Ref. clock frequency for the HAWK at 24 MHz. */
259
260 cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
261 cfgchip2 &= ~CFGCHIP2_REFFREQ;
262 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
263 __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
264
265 ret = gpio_request_one(DA850_USB1_VBUS_PIN,
266 GPIOF_DIR_OUT, "USB1 VBUS");
267 if (ret < 0) {
268 pr_err("%s: failed to request GPIO for USB 1.1 port "
269 "power control: %d\n", __func__, ret);
270 return;
271 }
272
273 ret = gpio_request_one(DA850_USB1_OC_PIN,
274 GPIOF_DIR_IN, "USB1 OC");
275 if (ret < 0) {
276 pr_err("%s: failed to request GPIO for USB 1.1 port "
277 "over-current indicator: %d\n", __func__, ret);
278 goto usb11_setup_oc_fail;
279 }
280
281 ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata);
282 if (ret) {
283 pr_warning("%s: USB 1.1 registration failed: %d\n",
284 __func__, ret);
285 goto usb11_setup_fail;
286 }
287
288 return;
289
290usb11_setup_fail:
291 gpio_free(DA850_USB1_OC_PIN);
292usb11_setup_oc_fail:
293 gpio_free(DA850_USB1_VBUS_PIN);
294}
22 295
23static struct davinci_uart_config omapl138_hawk_uart_config __initdata = { 296static struct davinci_uart_config omapl138_hawk_uart_config __initdata = {
24 .enabled_uarts = 0x7, 297 .enabled_uarts = 0x7,
@@ -30,6 +303,17 @@ static __init void omapl138_hawk_init(void)
30 303
31 davinci_serial_init(&omapl138_hawk_uart_config); 304 davinci_serial_init(&omapl138_hawk_uart_config);
32 305
306 omapl138_hawk_config_emac();
307
308 ret = da850_register_edma(da850_edma_rsv);
309 if (ret)
310 pr_warning("%s: EDMA registration failed: %d\n",
311 __func__, ret);
312
313 omapl138_hawk_mmc_init();
314
315 omapl138_hawk_usb_init();
316
33 ret = da8xx_register_watchdog(); 317 ret = da8xx_register_watchdog();
34 if (ret) 318 if (ret)
35 pr_warning("omapl138_hawk_init: " 319 pr_warning("omapl138_hawk_init: "
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index ec23ab473620..2ed2f822fc40 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -148,7 +148,7 @@ static struct clk scr2_ss_clk = {
148static struct clk dmax_clk = { 148static struct clk dmax_clk = {
149 .name = "dmax", 149 .name = "dmax",
150 .parent = &pll0_sysclk2, 150 .parent = &pll0_sysclk2,
151 .lpsc = DA8XX_LPSC0_DMAX, 151 .lpsc = DA8XX_LPSC0_PRUSS,
152 .flags = ALWAYS_ENABLED, 152 .flags = ALWAYS_ENABLED,
153}; 153};
154 154
@@ -397,8 +397,8 @@ static struct clk_lookup da830_clks[] = {
397 CLK(NULL, "uart0", &uart0_clk), 397 CLK(NULL, "uart0", &uart0_clk),
398 CLK(NULL, "uart1", &uart1_clk), 398 CLK(NULL, "uart1", &uart1_clk),
399 CLK(NULL, "uart2", &uart2_clk), 399 CLK(NULL, "uart2", &uart2_clk),
400 CLK("dm_spi.0", NULL, &spi0_clk), 400 CLK("spi_davinci.0", NULL, &spi0_clk),
401 CLK("dm_spi.1", NULL, &spi1_clk), 401 CLK("spi_davinci.1", NULL, &spi1_clk),
402 CLK(NULL, "ecap0", &ecap0_clk), 402 CLK(NULL, "ecap0", &ecap0_clk),
403 CLK(NULL, "ecap1", &ecap1_clk), 403 CLK(NULL, "ecap1", &ecap1_clk),
404 CLK(NULL, "ecap2", &ecap2_clk), 404 CLK(NULL, "ecap2", &ecap2_clk),
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 78b5ae29ae40..68fe4c289d77 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -345,6 +345,34 @@ static struct clk aemif_clk = {
345 .flags = ALWAYS_ENABLED, 345 .flags = ALWAYS_ENABLED,
346}; 346};
347 347
348static struct clk usb11_clk = {
349 .name = "usb11",
350 .parent = &pll0_sysclk4,
351 .lpsc = DA8XX_LPSC1_USB11,
352 .gpsc = 1,
353};
354
355static struct clk usb20_clk = {
356 .name = "usb20",
357 .parent = &pll0_sysclk2,
358 .lpsc = DA8XX_LPSC1_USB20,
359 .gpsc = 1,
360};
361
362static struct clk spi0_clk = {
363 .name = "spi0",
364 .parent = &pll0_sysclk2,
365 .lpsc = DA8XX_LPSC0_SPI0,
366};
367
368static struct clk spi1_clk = {
369 .name = "spi1",
370 .parent = &pll0_sysclk2,
371 .lpsc = DA8XX_LPSC1_SPI1,
372 .gpsc = 1,
373 .flags = DA850_CLK_ASYNC3,
374};
375
348static struct clk_lookup da850_clks[] = { 376static struct clk_lookup da850_clks[] = {
349 CLK(NULL, "ref", &ref_clk), 377 CLK(NULL, "ref", &ref_clk),
350 CLK(NULL, "pll0", &pll0_clk), 378 CLK(NULL, "pll0", &pll0_clk),
@@ -387,6 +415,10 @@ static struct clk_lookup da850_clks[] = {
387 CLK("davinci_mmc.0", NULL, &mmcsd0_clk), 415 CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
388 CLK("davinci_mmc.1", NULL, &mmcsd1_clk), 416 CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
389 CLK(NULL, "aemif", &aemif_clk), 417 CLK(NULL, "aemif", &aemif_clk),
418 CLK(NULL, "usb11", &usb11_clk),
419 CLK(NULL, "usb20", &usb20_clk),
420 CLK("spi_davinci.0", NULL, &spi0_clk),
421 CLK("spi_davinci.1", NULL, &spi1_clk),
390 CLK(NULL, NULL, NULL), 422 CLK(NULL, NULL, NULL),
391}; 423};
392 424
@@ -543,30 +575,19 @@ static const struct mux_config da850_pins[] = {
543 MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false) 575 MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false)
544 MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false) 576 MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false)
545 /* GPIO function */ 577 /* GPIO function */
578 MUX_CFG(DA850, GPIO2_4, 6, 12, 15, 8, false)
546 MUX_CFG(DA850, GPIO2_6, 6, 4, 15, 8, false) 579 MUX_CFG(DA850, GPIO2_6, 6, 4, 15, 8, false)
547 MUX_CFG(DA850, GPIO2_8, 5, 28, 15, 8, false) 580 MUX_CFG(DA850, GPIO2_8, 5, 28, 15, 8, false)
548 MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) 581 MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false)
582 MUX_CFG(DA850, GPIO3_12, 7, 12, 15, 8, false)
583 MUX_CFG(DA850, GPIO3_13, 7, 8, 15, 8, false)
549 MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false) 584 MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false)
550 MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false) 585 MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false)
586 MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false)
551 MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false) 587 MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false)
552#endif 588#endif
553}; 589};
554 590
555const short da850_uart0_pins[] __initdata = {
556 DA850_NUART0_CTS, DA850_NUART0_RTS, DA850_UART0_RXD, DA850_UART0_TXD,
557 -1
558};
559
560const short da850_uart1_pins[] __initdata = {
561 DA850_UART1_RXD, DA850_UART1_TXD,
562 -1
563};
564
565const short da850_uart2_pins[] __initdata = {
566 DA850_UART2_RXD, DA850_UART2_TXD,
567 -1
568};
569
570const short da850_i2c0_pins[] __initdata = { 591const short da850_i2c0_pins[] __initdata = {
571 DA850_I2C0_SDA, DA850_I2C0_SCL, 592 DA850_I2C0_SDA, DA850_I2C0_SCL,
572 -1 593 -1
@@ -577,24 +598,6 @@ const short da850_i2c1_pins[] __initdata = {
577 -1 598 -1
578}; 599};
579 600
580const short da850_cpgmac_pins[] __initdata = {
581 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
582 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
583 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
584 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
585 DA850_MDIO_D, DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
586 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, DA850_RMII_RXER,
587 DA850_RMII_MHZ_50_CLK,
588 -1
589};
590
591const short da850_mcasp_pins[] __initdata = {
592 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
593 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
594 DA850_AXR_11, DA850_AXR_12,
595 -1
596};
597
598const short da850_lcdcntl_pins[] __initdata = { 601const short da850_lcdcntl_pins[] __initdata = {
599 DA850_LCD_D_0, DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3, 602 DA850_LCD_D_0, DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3,
600 DA850_LCD_D_4, DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7, 603 DA850_LCD_D_4, DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7,
@@ -604,29 +607,6 @@ const short da850_lcdcntl_pins[] __initdata = {
604 -1 607 -1
605}; 608};
606 609
607const short da850_mmcsd0_pins[] __initdata = {
608 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
609 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
610 DA850_GPIO4_0, DA850_GPIO4_1,
611 -1
612};
613
614const short da850_emif25_pins[] __initdata = {
615 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
616 DA850_NEMA_CS_3, DA850_NEMA_CS_4, DA850_NEMA_WE, DA850_NEMA_OE,
617 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
618 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
619 DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11,
620 DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15,
621 DA850_EMA_A_0, DA850_EMA_A_1, DA850_EMA_A_2, DA850_EMA_A_3,
622 DA850_EMA_A_4, DA850_EMA_A_5, DA850_EMA_A_6, DA850_EMA_A_7,
623 DA850_EMA_A_8, DA850_EMA_A_9, DA850_EMA_A_10, DA850_EMA_A_11,
624 DA850_EMA_A_12, DA850_EMA_A_13, DA850_EMA_A_14, DA850_EMA_A_15,
625 DA850_EMA_A_16, DA850_EMA_A_17, DA850_EMA_A_18, DA850_EMA_A_19,
626 DA850_EMA_A_20, DA850_EMA_A_21, DA850_EMA_A_22, DA850_EMA_A_23,
627 -1
628};
629
630/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ 610/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
631static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { 611static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
632 [IRQ_DA8XX_COMMTX] = 7, 612 [IRQ_DA8XX_COMMTX] = 7,
@@ -764,6 +744,13 @@ static struct davinci_id da850_ids[] = {
764 .cpu_id = DAVINCI_CPU_ID_DA850, 744 .cpu_id = DAVINCI_CPU_ID_DA850,
765 .name = "da850/omap-l138", 745 .name = "da850/omap-l138",
766 }, 746 },
747 {
748 .variant = 0x1,
749 .part_no = 0xb7d1,
750 .manufacturer = 0x017, /* 0x02f >> 1 */
751 .cpu_id = DAVINCI_CPU_ID_DA850,
752 .name = "da850/omap-l138/am18x",
753 },
767}; 754};
768 755
769static struct davinci_timer_instance da850_timer_instance[4] = { 756static struct davinci_timer_instance da850_timer_instance[4] = {
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index beda8a4133a0..625d4b66718b 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -38,12 +38,23 @@
38#define DA8XX_EMAC_MDIO_BASE 0x01e24000 38#define DA8XX_EMAC_MDIO_BASE 0x01e24000
39#define DA8XX_GPIO_BASE 0x01e26000 39#define DA8XX_GPIO_BASE 0x01e26000
40#define DA8XX_I2C1_BASE 0x01e28000 40#define DA8XX_I2C1_BASE 0x01e28000
41#define DA8XX_SPI0_BASE 0x01c41000
42#define DA8XX_SPI1_BASE 0x01f0e000
41 43
42#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 44#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
43#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 45#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
44#define DA8XX_EMAC_RAM_OFFSET 0x0000 46#define DA8XX_EMAC_RAM_OFFSET 0x0000
45#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K 47#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
46 48
49#define DA8XX_DMA_SPI0_RX EDMA_CTLR_CHAN(0, 14)
50#define DA8XX_DMA_SPI0_TX EDMA_CTLR_CHAN(0, 15)
51#define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16)
52#define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17)
53#define DA8XX_DMA_SPI1_RX EDMA_CTLR_CHAN(0, 18)
54#define DA8XX_DMA_SPI1_TX EDMA_CTLR_CHAN(0, 19)
55#define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28)
56#define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29)
57
47void __iomem *da8xx_syscfg0_base; 58void __iomem *da8xx_syscfg0_base;
48void __iomem *da8xx_syscfg1_base; 59void __iomem *da8xx_syscfg1_base;
49 60
@@ -573,13 +584,13 @@ static struct resource da8xx_mmcsd0_resources[] = {
573 .flags = IORESOURCE_IRQ, 584 .flags = IORESOURCE_IRQ,
574 }, 585 },
575 { /* DMA RX */ 586 { /* DMA RX */
576 .start = EDMA_CTLR_CHAN(0, 16), 587 .start = DA8XX_DMA_MMCSD0_RX,
577 .end = EDMA_CTLR_CHAN(0, 16), 588 .end = DA8XX_DMA_MMCSD0_RX,
578 .flags = IORESOURCE_DMA, 589 .flags = IORESOURCE_DMA,
579 }, 590 },
580 { /* DMA TX */ 591 { /* DMA TX */
581 .start = EDMA_CTLR_CHAN(0, 17), 592 .start = DA8XX_DMA_MMCSD0_TX,
582 .end = EDMA_CTLR_CHAN(0, 17), 593 .end = DA8XX_DMA_MMCSD0_TX,
583 .flags = IORESOURCE_DMA, 594 .flags = IORESOURCE_DMA,
584 }, 595 },
585}; 596};
@@ -610,13 +621,13 @@ static struct resource da850_mmcsd1_resources[] = {
610 .flags = IORESOURCE_IRQ, 621 .flags = IORESOURCE_IRQ,
611 }, 622 },
612 { /* DMA RX */ 623 { /* DMA RX */
613 .start = EDMA_CTLR_CHAN(1, 28), 624 .start = DA850_DMA_MMCSD1_RX,
614 .end = EDMA_CTLR_CHAN(1, 28), 625 .end = DA850_DMA_MMCSD1_RX,
615 .flags = IORESOURCE_DMA, 626 .flags = IORESOURCE_DMA,
616 }, 627 },
617 { /* DMA TX */ 628 { /* DMA TX */
618 .start = EDMA_CTLR_CHAN(1, 29), 629 .start = DA850_DMA_MMCSD1_TX,
619 .end = EDMA_CTLR_CHAN(1, 29), 630 .end = DA850_DMA_MMCSD1_TX,
620 .flags = IORESOURCE_DMA, 631 .flags = IORESOURCE_DMA,
621 }, 632 },
622}; 633};
@@ -725,3 +736,101 @@ int __init da8xx_register_cpuidle(void)
725 736
726 return platform_device_register(&da8xx_cpuidle_device); 737 return platform_device_register(&da8xx_cpuidle_device);
727} 738}
739
740static struct resource da8xx_spi0_resources[] = {
741 [0] = {
742 .start = DA8XX_SPI0_BASE,
743 .end = DA8XX_SPI0_BASE + SZ_4K - 1,
744 .flags = IORESOURCE_MEM,
745 },
746 [1] = {
747 .start = IRQ_DA8XX_SPINT0,
748 .end = IRQ_DA8XX_SPINT0,
749 .flags = IORESOURCE_IRQ,
750 },
751 [2] = {
752 .start = DA8XX_DMA_SPI0_RX,
753 .end = DA8XX_DMA_SPI0_RX,
754 .flags = IORESOURCE_DMA,
755 },
756 [3] = {
757 .start = DA8XX_DMA_SPI0_TX,
758 .end = DA8XX_DMA_SPI0_TX,
759 .flags = IORESOURCE_DMA,
760 },
761};
762
763static struct resource da8xx_spi1_resources[] = {
764 [0] = {
765 .start = DA8XX_SPI1_BASE,
766 .end = DA8XX_SPI1_BASE + SZ_4K - 1,
767 .flags = IORESOURCE_MEM,
768 },
769 [1] = {
770 .start = IRQ_DA8XX_SPINT1,
771 .end = IRQ_DA8XX_SPINT1,
772 .flags = IORESOURCE_IRQ,
773 },
774 [2] = {
775 .start = DA8XX_DMA_SPI1_RX,
776 .end = DA8XX_DMA_SPI1_RX,
777 .flags = IORESOURCE_DMA,
778 },
779 [3] = {
780 .start = DA8XX_DMA_SPI1_TX,
781 .end = DA8XX_DMA_SPI1_TX,
782 .flags = IORESOURCE_DMA,
783 },
784};
785
786struct davinci_spi_platform_data da8xx_spi_pdata[] = {
787 [0] = {
788 .version = SPI_VERSION_2,
789 .intr_line = 1,
790 .dma_event_q = EVENTQ_0,
791 },
792 [1] = {
793 .version = SPI_VERSION_2,
794 .intr_line = 1,
795 .dma_event_q = EVENTQ_0,
796 },
797};
798
799static struct platform_device da8xx_spi_device[] = {
800 [0] = {
801 .name = "spi_davinci",
802 .id = 0,
803 .num_resources = ARRAY_SIZE(da8xx_spi0_resources),
804 .resource = da8xx_spi0_resources,
805 .dev = {
806 .platform_data = &da8xx_spi_pdata[0],
807 },
808 },
809 [1] = {
810 .name = "spi_davinci",
811 .id = 1,
812 .num_resources = ARRAY_SIZE(da8xx_spi1_resources),
813 .resource = da8xx_spi1_resources,
814 .dev = {
815 .platform_data = &da8xx_spi_pdata[1],
816 },
817 },
818};
819
820int __init da8xx_register_spi(int instance, struct spi_board_info *info,
821 unsigned len)
822{
823 int ret;
824
825 if (instance < 0 || instance > 1)
826 return -EINVAL;
827
828 ret = spi_register_board_info(info, len);
829 if (ret)
830 pr_warning("%s: failed to register board info for spi %d :"
831 " %d\n", __func__, instance, ret);
832
833 da8xx_spi_pdata[instance].num_chipselect = len;
834
835 return platform_device_register(&da8xx_spi_device[instance]);
836}
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a5f8a80c1f28..76364d1345df 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -403,16 +403,13 @@ static struct resource dm355_spi0_resources[] = {
403 .start = 16, 403 .start = 16,
404 .flags = IORESOURCE_DMA, 404 .flags = IORESOURCE_DMA,
405 }, 405 },
406 {
407 .start = EVENTQ_1,
408 .flags = IORESOURCE_DMA,
409 },
410}; 406};
411 407
412static struct davinci_spi_platform_data dm355_spi0_pdata = { 408static struct davinci_spi_platform_data dm355_spi0_pdata = {
413 .version = SPI_VERSION_1, 409 .version = SPI_VERSION_1,
414 .num_chipselect = 2, 410 .num_chipselect = 2,
415 .cshold_bug = true, 411 .cshold_bug = true,
412 .dma_event_q = EVENTQ_1,
416}; 413};
417static struct platform_device dm355_spi0_device = { 414static struct platform_device dm355_spi0_device = {
418 .name = "spi_davinci", 415 .name = "spi_davinci",
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 02d2cc380df7..4604e72d7d99 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -625,6 +625,7 @@ static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32);
625static struct davinci_spi_platform_data dm365_spi0_pdata = { 625static struct davinci_spi_platform_data dm365_spi0_pdata = {
626 .version = SPI_VERSION_1, 626 .version = SPI_VERSION_1,
627 .num_chipselect = 2, 627 .num_chipselect = 2,
628 .dma_event_q = EVENTQ_3,
628}; 629};
629 630
630static struct resource dm365_spi0_resources[] = { 631static struct resource dm365_spi0_resources[] = {
@@ -645,10 +646,6 @@ static struct resource dm365_spi0_resources[] = {
645 .start = 16, 646 .start = 16,
646 .flags = IORESOURCE_DMA, 647 .flags = IORESOURCE_DMA,
647 }, 648 },
648 {
649 .start = EVENTQ_3,
650 .flags = IORESOURCE_DMA,
651 },
652}; 649};
653 650
654static struct platform_device dm365_spi0_device = { 651static struct platform_device dm365_spi0_device = {
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e7f952066527..e4fc1af8500e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -15,6 +15,7 @@
15 15
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/davinci_emac.h> 17#include <linux/davinci_emac.h>
18#include <linux/spi/spi.h>
18 19
19#include <mach/serial.h> 20#include <mach/serial.h>
20#include <mach/edma.h> 21#include <mach/edma.h>
@@ -23,6 +24,7 @@
23#include <mach/mmc.h> 24#include <mach/mmc.h>
24#include <mach/usb.h> 25#include <mach/usb.h>
25#include <mach/pm.h> 26#include <mach/pm.h>
27#include <mach/spi.h>
26 28
27extern void __iomem *da8xx_syscfg0_base; 29extern void __iomem *da8xx_syscfg0_base;
28extern void __iomem *da8xx_syscfg1_base; 30extern void __iomem *da8xx_syscfg1_base;
@@ -77,6 +79,7 @@ void __init da850_init(void);
77int da830_register_edma(struct edma_rsv_info *rsv); 79int da830_register_edma(struct edma_rsv_info *rsv);
78int da850_register_edma(struct edma_rsv_info *rsv[2]); 80int da850_register_edma(struct edma_rsv_info *rsv[2]);
79int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); 81int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
82int da8xx_register_spi(int instance, struct spi_board_info *info, unsigned len);
80int da8xx_register_watchdog(void); 83int da8xx_register_watchdog(void);
81int da8xx_register_usb20(unsigned mA, unsigned potpgt); 84int da8xx_register_usb20(unsigned mA, unsigned potpgt);
82int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); 85int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
@@ -95,6 +98,7 @@ extern struct platform_device da8xx_serial_device;
95extern struct emac_platform_data da8xx_emac_pdata; 98extern struct emac_platform_data da8xx_emac_pdata;
96extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; 99extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
97extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; 100extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
101extern struct davinci_spi_platform_data da8xx_spi_pdata[];
98 102
99extern struct platform_device da8xx_wdt_device; 103extern struct platform_device da8xx_wdt_device;
100 104
@@ -123,15 +127,8 @@ extern const short da830_ecap2_pins[];
123extern const short da830_eqep0_pins[]; 127extern const short da830_eqep0_pins[];
124extern const short da830_eqep1_pins[]; 128extern const short da830_eqep1_pins[];
125 129
126extern const short da850_uart0_pins[];
127extern const short da850_uart1_pins[];
128extern const short da850_uart2_pins[];
129extern const short da850_i2c0_pins[]; 130extern const short da850_i2c0_pins[];
130extern const short da850_i2c1_pins[]; 131extern const short da850_i2c1_pins[];
131extern const short da850_cpgmac_pins[];
132extern const short da850_mcasp_pins[];
133extern const short da850_lcdcntl_pins[]; 132extern const short da850_lcdcntl_pins[];
134extern const short da850_mmcsd0_pins[];
135extern const short da850_emif25_pins[];
136 133
137#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ 134#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index dc10ef6cf572..20c77f29bf0f 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -151,42 +151,6 @@ struct edmacc_param {
151#define DA830_DMACH2EVENT_MAP1 0x00000000u 151#define DA830_DMACH2EVENT_MAP1 0x00000000u
152#define DA830_EDMA_ARM_OWN 0x30FFCCFFu 152#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
153 153
154/* DA830 specific EDMA3 Events Information */
155enum DA830_edma_ch {
156 DA830_DMACH_MCASP0_RX,
157 DA830_DMACH_MCASP0_TX,
158 DA830_DMACH_MCASP1_RX,
159 DA830_DMACH_MCASP1_TX,
160 DA830_DMACH_MCASP2_RX,
161 DA830_DMACH_MCASP2_TX,
162 DA830_DMACH_GPIO_BNK0INT,
163 DA830_DMACH_GPIO_BNK1INT,
164 DA830_DMACH_UART0_RX,
165 DA830_DMACH_UART0_TX,
166 DA830_DMACH_TMR64P0_EVTOUT12,
167 DA830_DMACH_TMR64P0_EVTOUT34,
168 DA830_DMACH_UART1_RX,
169 DA830_DMACH_UART1_TX,
170 DA830_DMACH_SPI0_RX,
171 DA830_DMACH_SPI0_TX,
172 DA830_DMACH_MMCSD_RX,
173 DA830_DMACH_MMCSD_TX,
174 DA830_DMACH_SPI1_RX,
175 DA830_DMACH_SPI1_TX,
176 DA830_DMACH_DMAX_EVTOUT6,
177 DA830_DMACH_DMAX_EVTOUT7,
178 DA830_DMACH_GPIO_BNK2INT,
179 DA830_DMACH_GPIO_BNK3INT,
180 DA830_DMACH_I2C0_RX,
181 DA830_DMACH_I2C0_TX,
182 DA830_DMACH_I2C1_RX,
183 DA830_DMACH_I2C1_TX,
184 DA830_DMACH_GPIO_BNK4INT,
185 DA830_DMACH_GPIO_BNK5INT,
186 DA830_DMACH_UART2_RX,
187 DA830_DMACH_UART2_TX
188};
189
190/*ch_status paramater of callback function possible values*/ 154/*ch_status paramater of callback function possible values*/
191#define DMA_COMPLETE 1 155#define DMA_COMPLETE 1
192#define DMA_CC_ERROR 2 156#define DMA_CC_ERROR 2
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index de11aac76a80..5d4e0fed828a 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -908,11 +908,15 @@ enum davinci_da850_index {
908 DA850_NEMA_CS_2, 908 DA850_NEMA_CS_2,
909 909
910 /* GPIO function */ 910 /* GPIO function */
911 DA850_GPIO2_4,
911 DA850_GPIO2_6, 912 DA850_GPIO2_6,
912 DA850_GPIO2_8, 913 DA850_GPIO2_8,
913 DA850_GPIO2_15, 914 DA850_GPIO2_15,
915 DA850_GPIO3_12,
916 DA850_GPIO3_13,
914 DA850_GPIO4_0, 917 DA850_GPIO4_0,
915 DA850_GPIO4_1, 918 DA850_GPIO4_1,
919 DA850_GPIO6_13,
916 DA850_RTC_ALARM, 920 DA850_RTC_ALARM,
917}; 921};
918 922
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 62b0858f68ca..a47e6f29206e 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -150,7 +150,7 @@
150#define DA8XX_LPSC0_SCR0_SS 10 150#define DA8XX_LPSC0_SCR0_SS 10
151#define DA8XX_LPSC0_SCR1_SS 11 151#define DA8XX_LPSC0_SCR1_SS 11
152#define DA8XX_LPSC0_SCR2_SS 12 152#define DA8XX_LPSC0_SCR2_SS 12
153#define DA8XX_LPSC0_DMAX 13 153#define DA8XX_LPSC0_PRUSS 13
154#define DA8XX_LPSC0_ARM 14 154#define DA8XX_LPSC0_ARM 14
155#define DA8XX_LPSC0_GEM 15 155#define DA8XX_LPSC0_GEM 15
156 156
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 38f4da5ca135..7af305b37868 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -19,6 +19,8 @@
19#ifndef __ARCH_ARM_DAVINCI_SPI_H 19#ifndef __ARCH_ARM_DAVINCI_SPI_H
20#define __ARCH_ARM_DAVINCI_SPI_H 20#define __ARCH_ARM_DAVINCI_SPI_H
21 21
22#include <mach/edma.h>
23
22#define SPI_INTERN_CS 0xFF 24#define SPI_INTERN_CS 0xFF
23 25
24enum { 26enum {
@@ -39,13 +41,16 @@ enum {
39 * to populate if all chip-selects are internal. 41 * to populate if all chip-selects are internal.
40 * @cshold_bug: set this to true if the SPI controller on your chip requires 42 * @cshold_bug: set this to true if the SPI controller on your chip requires
41 * a write to CSHOLD bit in between transfers (like in DM355). 43 * a write to CSHOLD bit in between transfers (like in DM355).
44 * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
45 * device on the bus.
42 */ 46 */
43struct davinci_spi_platform_data { 47struct davinci_spi_platform_data {
44 u8 version; 48 u8 version;
45 u8 num_chipselect; 49 u8 num_chipselect;
46 u8 intr_line; 50 u8 intr_line;
47 u8 *chip_sel; 51 u8 *chip_sel;
48 bool cshold_bug; 52 bool cshold_bug;
53 enum dma_event_q dma_event_q;
49}; 54};
50 55
51/** 56/**
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 06:40:27 -0500