103 files changed, 900 insertions, 1270 deletions
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c
index e1362ce48497..7119ef28e0ad 100644
--- a/arch/arm/mach-omap1/board-h2-mmc.c
+++ b/arch/arm/mach-omap1/board-h2-mmc.c
@@ -13,12 +13,11 @@
 */
 #include <linux/gpio.h>
 #include <linux/platform_device.h>
+#include <linux/platform_data/gpio-omap.h>
 #include <linux/i2c/tps65010.h>
-#include <plat/mmc.h>
 #include "board-h2.h"
+#include "mmc.h"
 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 376f7f29ef77..fc84e2b3400a 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -39,7 +39,7 @@
 #include <asm/mach/map.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/tc.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
@@ -50,6 +50,7 @@
 #include "common.h"
 #include "board-h2.h"
+#include "dma.h"
 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
 #define OMAP1610_ETHR_START             0x04000300
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c
index c74daace8cd6..17d77914d769 100644
--- a/arch/arm/mach-omap1/board-h3-mmc.c
+++ b/arch/arm/mach-omap1/board-h3-mmc.c
@@ -16,9 +16,8 @@
 #include <linux/i2c/tps65010.h>
-#include <plat/mmc.h>
 #include "board-h3.h"
+#include "mmc.h"
 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index ededdb7ef28c..81f55a6c5678 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -43,7 +43,7 @@
 #include <mach/mux.h>
 #include <plat/tc.h>
 #include <linux/platform_data/keypad-omap.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/flash.h>
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 87ab2086ef96..f23200ceb43d 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -43,7 +43,7 @@
 #include <asm/mach/arch.h>
 #include <mach/omap7xx.h>
-#include <plat/mmc.h>
+#include "mmc.h"
 #include <mach/irqs.h>
 #include <mach/usb.h>
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index db5f7d2976e7..411cc5b14ce3 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -36,13 +36,13 @@
 #include <plat/fpga.h>
 #include <plat/tc.h>
 #include <linux/platform_data/keypad-omap.h>
-#include <plat/mmc.h>
 #include <mach/hardware.h>
 #include <mach/usb.h>
 #include "iomap.h"
 #include "common.h"
+#include "mmc.h"
 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
 #define INNOVATOR1610_ETHR_START        0x04000300
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 7d5c06d6a52a..cb72f2474430 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -29,13 +29,13 @@
 #include <asm/mach/map.h>
 #include <mach/mux.h>
-#include <plat/mmc.h>
 #include <plat/clock.h>
 #include <mach/hardware.h>
 #include <mach/usb.h>
 #include "common.h"
+#include "mmc.h"
 #define ADS7846_PENDOWN_GPIO    15
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 1c578d58923a..eac94c267f5b 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -37,7 +37,7 @@
 #include <mach/flash.h>
 #include <mach/mux.h>
 #include <plat/tc.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
@@ -45,6 +45,7 @@
 #include <mach/usb.h>
 #include "common.h"
+#include "dma.h"
 #define PALMTE_USBDETECT_GPIO   0
 #define PALMTE_USB_OR_DC_GPIO   1
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 97158095083c..5b8ac0fcf451 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -36,7 +36,7 @@
 #include <plat/led.h>
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/tc.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
@@ -45,6 +45,7 @@
 #include <mach/usb.h>
 #include "common.h"
+#include "dma.h"
 #define PALMTT_USBDETECT_GPIO   0
 #define PALMTT_CABLE_GPIO       1
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index e311032e7eeb..9f3460321ecd 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -38,7 +38,7 @@
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/tc.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
@@ -47,6 +47,7 @@
 #include <mach/usb.h>
 #include "common.h"
+#include "dma.h"
 #define PALMZ71_USBDETECT_GPIO  0
 #define PALMZ71_PENIRQ_GPIO     6
diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c
index 5932d56e17bf..4fcf19c78a08 100644
--- a/arch/arm/mach-omap1/board-sx1-mmc.c
+++ b/arch/arm/mach-omap1/board-sx1-mmc.c
@@ -16,9 +16,10 @@
 #include <linux/platform_device.h>
 #include <mach/hardware.h>
-#include <plat/mmc.h>
 #include <mach/board-sx1.h>
+#include "mmc.h"
 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
 static int mmc_set_power(struct device *dev, int slot, int power_on,
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 13bf2cc56814..f4c5db991226 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -36,7 +36,7 @@
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/irda.h>
 #include <plat/tc.h>
 #include <mach/board-sx1.h>
@@ -45,6 +45,7 @@
 #include <mach/usb.h>
 #include "common.h"
+#include "dma.h"
 /* Write to I2C device */
 int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index d3fec92c54cb..8e32d50d275b 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -21,8 +21,6 @@
 #include <plat/tc.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
-#include <plat/mmc.h>
 #include <mach/omap7xx.h>
 #include <mach/camera.h>
@@ -30,6 +28,8 @@
 #include "common.h"
 #include "clock.h"
+#include "dma.h"
+#include "mmc.h"
 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
@@ -175,6 +175,13 @@ static int __init omap_mmc_add(const char *name, int id, unsigned long base,
        res[3].name = "tx";
        res[3].flags = IORESOURCE_DMA;
+        if (cpu_is_omap7xx())
+                data->slots[0].features = MMC_OMAP7XX;
+        if (cpu_is_omap15xx())
+                data->slots[0].features = MMC_OMAP15XX;
+        if (cpu_is_omap16xx())
+                data->slots[0].features = MMC_OMAP16XX;
        ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
        if (ret == 0)
                ret = platform_device_add_data(pdev, data, sizeof(*data));
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index 29007fef84cd..91594177f6bc 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -25,11 +25,13 @@
 #include <linux/device.h>
 #include <linux/io.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/tc.h>
 #include <mach/irqs.h>
+#include "dma.h"
 #define OMAP1_DMA_BASE                  (0xfffed800)
 #define OMAP1_LOGICAL_DMA_CH_COUNT      17
 #define OMAP1_DMA_STRIDE                0x40
diff --git a/arch/arm/mach-omap1/dma.h b/arch/arm/mach-omap1/dma.h
new file mode 100644
index 000000000000..da6345dab03f
--- /dev/null
+++ b/arch/arm/mach-omap1/dma.h
@@ -0,0 +1,83 @@
+/*
+ *  OMAP1 DMA channel definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __OMAP1_DMA_CHANNEL_H
+#define __OMAP1_DMA_CHANNEL_H
+/* DMA channels for omap1 */
+#define OMAP_DMA_NO_DEVICE              0
+#define OMAP_DMA_MCSI1_TX               1
+#define OMAP_DMA_MCSI1_RX               2
+#define OMAP_DMA_I2C_RX                 3
+#define OMAP_DMA_I2C_TX                 4
+#define OMAP_DMA_EXT_NDMA_REQ           5
+#define OMAP_DMA_EXT_NDMA_REQ2          6
+#define OMAP_DMA_UWIRE_TX               7
+#define OMAP_DMA_MCBSP1_TX              8
+#define OMAP_DMA_MCBSP1_RX              9
+#define OMAP_DMA_MCBSP3_TX              10
+#define OMAP_DMA_MCBSP3_RX              11
+#define OMAP_DMA_UART1_TX               12
+#define OMAP_DMA_UART1_RX               13
+#define OMAP_DMA_UART2_TX               14
+#define OMAP_DMA_UART2_RX               15
+#define OMAP_DMA_MCBSP2_TX              16
+#define OMAP_DMA_MCBSP2_RX              17
+#define OMAP_DMA_UART3_TX               18
+#define OMAP_DMA_UART3_RX               19
+#define OMAP_DMA_CAMERA_IF_RX           20
+#define OMAP_DMA_MMC_TX                 21
+#define OMAP_DMA_MMC_RX                 22
+#define OMAP_DMA_NAND                   23
+#define OMAP_DMA_IRQ_LCD_LINE           24
+#define OMAP_DMA_MEMORY_STICK           25
+#define OMAP_DMA_USB_W2FC_RX0           26
+#define OMAP_DMA_USB_W2FC_RX1           27
+#define OMAP_DMA_USB_W2FC_RX2           28
+#define OMAP_DMA_USB_W2FC_TX0           29
+#define OMAP_DMA_USB_W2FC_TX1           30
+#define OMAP_DMA_USB_W2FC_TX2           31
+/* These are only for 1610 */
+#define OMAP_DMA_CRYPTO_DES_IN          32
+#define OMAP_DMA_SPI_TX                 33
+#define OMAP_DMA_SPI_RX                 34
+#define OMAP_DMA_CRYPTO_HASH            35
+#define OMAP_DMA_CCP_ATTN               36
+#define OMAP_DMA_CCP_FIFO_NOT_EMPTY     37
+#define OMAP_DMA_CMT_APE_TX_CHAN_0      38
+#define OMAP_DMA_CMT_APE_RV_CHAN_0      39
+#define OMAP_DMA_CMT_APE_TX_CHAN_1      40
+#define OMAP_DMA_CMT_APE_RV_CHAN_1      41
+#define OMAP_DMA_CMT_APE_TX_CHAN_2      42
+#define OMAP_DMA_CMT_APE_RV_CHAN_2      43
+#define OMAP_DMA_CMT_APE_TX_CHAN_3      44
+#define OMAP_DMA_CMT_APE_RV_CHAN_3      45
+#define OMAP_DMA_CMT_APE_TX_CHAN_4      46
+#define OMAP_DMA_CMT_APE_RV_CHAN_4      47
+#define OMAP_DMA_CMT_APE_TX_CHAN_5      48
+#define OMAP_DMA_CMT_APE_RV_CHAN_5      49
+#define OMAP_DMA_CMT_APE_TX_CHAN_6      50
+#define OMAP_DMA_CMT_APE_RV_CHAN_6      51
+#define OMAP_DMA_CMT_APE_TX_CHAN_7      52
+#define OMAP_DMA_CMT_APE_RV_CHAN_7      53
+#define OMAP_DMA_MMC2_TX                54
+#define OMAP_DMA_MMC2_RX                55
+#define OMAP_DMA_CRYPTO_DES_OUT         56
+#endif /* __OMAP1_DMA_CHANNEL_H */
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 6a5baab1f4cb..244cc757ce7d 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -18,7 +18,7 @@
 #include <mach/mux.h>
 #include <plat/tc.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include "iomap.h"
 #include "common.h"
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index ed42628611bc..7ed8c1857d56 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -27,11 +27,13 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/hardware.h>
 #include <mach/lcdc.h>
+#include "dma.h"
 int omap_lcd_dma_running(void)
 {
        /*
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index bdc2e7541adb..3d461e1b8577 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -19,7 +19,7 @@
 #include <linux/platform_device.h>
 #include <linux/slab.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/mux.h>
 #include <plat/cpu.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
@@ -27,6 +27,7 @@
 #include <mach/irqs.h>
 #include "iomap.h"
+#include "dma.h"
 #define DPS_RSTCT2_PER_EN       (1 << 0)
 #define DSP_RSTCT2_WD_PER_EN    (1 << 1)
diff --git a/arch/arm/mach-omap1/mmc.h b/arch/arm/mach-omap1/mmc.h
new file mode 100644
index 000000000000..39c2b13de884
--- /dev/null
+++ b/arch/arm/mach-omap1/mmc.h
@@ -0,0 +1,18 @@
+#include <linux/mmc/host.h>
+#include <linux/platform_data/mmc-omap.h>
+#define OMAP15XX_NR_MMC         1
+#define OMAP16XX_NR_MMC         2
+#define OMAP1_MMC_SIZE          0x080
+#define OMAP1_MMC1_BASE         0xfffb7800
+#define OMAP1_MMC2_BASE         0xfffb7c00      /* omap16xx only */
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
+void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
+                                int nr_controllers);
+#else
+static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
+                                int nr_controllers)
+{
+}
+#endif
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 47ec16155483..c16b03ad5b50 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -54,7 +54,7 @@
 #include <plat/sram.h>
 #include <plat/tc.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/dmtimer.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 95b384d54f8a..49e49d0b7cf5 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -34,7 +34,7 @@
 #include <asm/mach/map.h>
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <plat/usb.h>
 #include "gpmc-smc91x.h"
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 96cd3693e1ae..3e8725b73161 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -32,11 +32,11 @@
 #include <plat/usb.h>
 #include "common.h"
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
-#include <plat/gpmc.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-tfp410.h>
+#include "gpmc.h"
 #include "gpmc-smc91x.h"
 #include "board-flash.h"
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 3669c120c7e8..2ab267ec3b75 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -35,7 +35,6 @@
 #include "common.h"
 #include <plat/usb.h>
-#include <plat/mmc.h>
 #include "omap4-keypad.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-nokia-dsi.h>
@@ -45,6 +44,7 @@
 #include "soc.h"
 #include "mux.h"
+#include "mmc.h"
 #include "hsmmc.h"
 #include "control.h"
 #include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index cea3abace815..8cdd18699de6 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -35,7 +35,7 @@
 #include <plat/led.h>
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 376d26eb601c..73e2ba9b343b 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -40,7 +40,7 @@
 #include "common.h"
 #include <linux/platform_data/mtd-nand-omap2.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <plat/usb.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
@@ -53,6 +53,7 @@
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "hsmmc.h"
 #include "common-board-devices.h"
+#include "gpmc-nand.h"
 #define CM_T35_GPIO_PENDOWN             57
 #define SB_T35_USB_HUB_RESET_GPIO       167
@@ -181,7 +182,7 @@ static struct omap_nand_platform_data cm_t35_nand_data = {
 static void __init cm_t35_init_nand(void)
 {
-        if (gpmc_nand_init(&cm_t35_nand_data) < 0)
+        if (gpmc_nand_init(&cm_t35_nand_data, NULL) < 0)
                pr_err("CM-T35: Unable to register NAND device\n");
 }
 #else
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 59c0a45f75b0..b5495e415024 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -41,7 +41,7 @@
 #include "common.h"
 #include <plat/usb.h>
 #include <linux/platform_data/mtd-nand-omap2.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "am35xx.h"
@@ -49,6 +49,7 @@
 #include "control.h"
 #include "common-board-devices.h"
 #include "am35xx-emac.h"
+#include "gpmc-nand.h"
 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
 static struct gpio_led cm_t3517_leds[] = {
@@ -240,7 +241,7 @@ static struct omap_nand_platform_data cm_t3517_nand_data = {
 static void __init cm_t3517_init_nand(void)
 {
-        if (gpmc_nand_init(&cm_t3517_nand_data) < 0)
+        if (gpmc_nand_init(&cm_t3517_nand_data, NULL) < 0)
                pr_err("CM-T3517: NAND initialization failed\n");
 }
 #else
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 1fd161e934c7..3eedb8fd0370 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -39,7 +39,7 @@
 #include <asm/mach/flash.h>
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <linux/platform_data/mtd-nand-omap2.h>
 #include <plat/usb.h>
 #include <video/omapdss.h>
@@ -55,8 +55,11 @@
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "mux.h"
 #include "hsmmc.h"
+#include "board-flash.h"
 #include "common-board-devices.h"
+#define NAND_CS                 0
 #define OMAP_DM9000_GPIO_IRQ    25
 #define OMAP3_DEVKIT_TS_GPIO    27
@@ -621,8 +624,9 @@ static void __init devkit8000_init(void)
        usb_musb_init(NULL);
        usbhs_init(&usbhs_bdata);
-        omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
+        board_nand_init(devkit8000_nand_partitions,
-                             ARRAY_SIZE(devkit8000_nand_partitions));
+                        ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS,
+                        NAND_BUSWIDTH_16, NULL);
        omap_twl4030_audio_init("omap3beagle");
        /* Ensure SDRC pins are mux'd for self-refresh */
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index e642acf9cad0..020b96b91f73 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -18,13 +18,15 @@
 #include <linux/io.h>
 #include <plat/cpu.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <linux/platform_data/mtd-nand-omap2.h>
 #include <linux/platform_data/mtd-onenand-omap2.h>
 #include <plat/tc.h>
 #include "common.h"
 #include "board-flash.h"
+#include "gpmc-onenand.h"
+#include "gpmc-nand.h"
 #define REG_FPGA_REV                    0x10
 #define REG_FPGA_DIP_SWITCH_INPUT2      0x60
@@ -104,36 +106,35 @@ __init board_onenand_init(struct mtd_partition *onenand_parts,
                defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 /* Note that all values in this struct are in nanoseconds */
-static struct gpmc_timings nand_timings = {
+struct gpmc_timings nand_default_timings[1] = {
+        {
+                .sync_clk = 0,
-        .sync_clk = 0,
+                .cs_on = 0,
+                .cs_rd_off = 36,
+                .cs_wr_off = 36,
-        .cs_on = 0,
+                .adv_on = 6,
-        .cs_rd_off = 36,
+                .adv_rd_off = 24,
-        .cs_wr_off = 36,
+                .adv_wr_off = 36,
-        .adv_on = 6,
+                .we_off = 30,
-        .adv_rd_off = 24,
+                .oe_off = 48,
-        .adv_wr_off = 36,
-        .we_off = 30,
+                .access = 54,
-        .oe_off = 48,
+                .rd_cycle = 72,
+                .wr_cycle = 72,
-        .access = 54,
+                .wr_access = 30,
-        .rd_cycle = 72,
+                .wr_data_mux_bus = 0,
-        .wr_cycle = 72,
+        },
-        .wr_access = 30,
-        .wr_data_mux_bus = 0,
 };
-static struct omap_nand_platform_data board_nand_data = {
+static struct omap_nand_platform_data board_nand_data;
-        .gpmc_t         = &nand_timings,
-};
 void
-__init board_nand_init(struct mtd_partition *nand_parts,
+__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
-                        u8 nr_parts, u8 cs, int nand_type)
+                                int nand_type, struct gpmc_timings *gpmc_t)
 {
        board_nand_data.cs              = cs;
        board_nand_data.parts           = nand_parts;
@@ -141,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts,
        board_nand_data.devsize         = nand_type;
        board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
-        gpmc_nand_init(&board_nand_data);
+        gpmc_nand_init(&board_nand_data, gpmc_t);
 }
 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
@@ -238,5 +239,6 @@ void __init board_flash_init(struct flash_partitions partition_info[],
                pr_err("NAND: Unable to find configuration in GPMC\n");
        else
                board_nand_init(partition_info[2].parts,
-                        partition_info[2].nr_parts, nandcs, nand_type);
+                        partition_info[2].nr_parts, nandcs,
+                        nand_type, nand_default_timings);
 }
diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h
index c44b70d52021..2fb5d41a9fae 100644
--- a/arch/arm/mach-omap2/board-flash.h
+++ b/arch/arm/mach-omap2/board-flash.h
@@ -12,7 +12,7 @@
 */
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #define PDC_NOR         1
 #define PDC_NAND        2
@@ -40,12 +40,14 @@ static inline void board_flash_init(struct flash_partitions part[],
 #if defined(CONFIG_MTD_NAND_OMAP2) || \
                defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 extern void board_nand_init(struct mtd_partition *nand_parts,
-                                        u8 nr_parts, u8 cs, int nand_type);
+                u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t);
+extern struct gpmc_timings nand_default_timings[];
 #else
 static inline void board_nand_init(struct mtd_partition *nand_parts,
-                                        u8 nr_parts, u8 cs, int nand_type)
+                u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t)
 {
 }
+#define nand_default_timings    NULL
 #endif
 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 8d04bf851af4..366ebd93ae24 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -32,8 +32,7 @@
 #include <asm/mach/map.h>
 #include <plat/menelaus.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
-#include <plat/gpmc.h>
 #include "debug-devices.h"
 #include <video/omapdss.h>
@@ -42,6 +41,7 @@
 #include "common.h"
 #include "mux.h"
 #include "control.h"
+#include "gpmc.h"
 #define H4_FLASH_CS     0
 #define H4_SMC91X_CS    1
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 48d5e41dfbfa..9a9a9b5f78b6 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -30,7 +30,7 @@
 #include <asm/mach/arch.h>
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <plat/usb.h>
 #include <video/omapdss.h>
@@ -43,6 +43,7 @@
 #include "common-board-devices.h"
 #include "board-flash.h"
 #include "control.h"
+#include "gpmc-onenand.h"
 #define IGEP2_SMSC911X_CS       5
 #define IGEP2_SMSC911X_GPIO     176
@@ -175,7 +176,7 @@ static void __init igep_flash_init(void)
                pr_info("IGEP: initializing NAND memory device\n");
                board_nand_init(igep_flash_partitions,
                                ARRAY_SIZE(igep_flash_partitions),
-                                0, NAND_BUSWIDTH_16);
+                                0, NAND_BUSWIDTH_16, nand_default_timings);
        } else if (mux == IGEP_SYSBOOT_ONENAND) {
                pr_info("IGEP: initializing OneNAND memory device\n");
                board_onenand_init(igep_flash_partitions,
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index ee8c3cfb95b3..e1628cd25ab4 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -35,7 +35,7 @@
 #include <asm/mach/map.h>
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <mach/board-zoom.h>
 #include <plat/usb.h>
 #include "gpmc-smsc911x.h"
@@ -420,8 +420,8 @@ static void __init omap_ldp_init(void)
        omap_serial_init();
        omap_sdrc_init(NULL, NULL);
        usb_musb_init(NULL);
-        board_nand_init(ldp_nand_partitions,
+        board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions),
-                ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
+                        ZOOM_NAND_CS, 0, nand_default_timings);
        omap_hsmmc_init(mmc);
        ldp_display_init();
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index d95f727ca39a..cea433b9b7b9 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -29,9 +29,10 @@
 #include "common.h"
 #include <plat/menelaus.h>
-#include <plat/mmc.h>
+#include "mmc.h"
 #include "mux.h"
+#include "gpmc-onenand.h"
 #define TUSB6010_ASYNC_CS       1
 #define TUSB6010_SYNC_CS        4
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 388c431c745a..f11a5eb595f7 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -41,7 +41,7 @@
 #include "common.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-tfp410.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <linux/platform_data/mtd-nand-omap2.h>
 #include <plat/usb.h>
 #include <plat/omap_device.h>
@@ -49,8 +49,11 @@
 #include "mux.h"
 #include "hsmmc.h"
 #include "pm.h"
+#include "board-flash.h"
 #include "common-board-devices.h"
+#define NAND_CS 0
 /*
 * OMAP3 Beagle revision
 * Run time detection of Beagle revision is done by reading GPIO.
@@ -512,8 +515,9 @@ static void __init omap3_beagle_init(void)
        usb_musb_init(NULL);
        usbhs_init(&usbhs_bdata);
-        omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions,
+        board_nand_init(omap3beagle_nand_partitions,
-                             ARRAY_SIZE(omap3beagle_nand_partitions));
+                        ARRAY_SIZE(omap3beagle_nand_partitions), NAND_CS,
+                        NAND_BUSWIDTH_16, NULL);
        omap_twl4030_audio_init("omap3beagle");
        /* Ensure msecure is mux'd to be able to set the RTC. */
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index b9b776b6c954..1d8e926b52fe 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -56,6 +56,9 @@
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "hsmmc.h"
 #include "common-board-devices.h"
+#include "board-flash.h"
+#define NAND_CS                 0
 #define OMAP3_EVM_TS_GPIO       175
 #define OMAP3_EVM_EHCI_VBUS     22
@@ -731,8 +734,9 @@ static void __init omap3_evm_init(void)
        }
        usb_musb_init(&musb_board_data);
        usbhs_init(&usbhs_bdata);
-        omap_nand_flash_init(NAND_BUSWIDTH_16, omap3evm_nand_partitions,
+        board_nand_init(omap3evm_nand_partitions,
-                             ARRAY_SIZE(omap3evm_nand_partitions));
+                        ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
+                        NAND_BUSWIDTH_16, NULL);
        omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
        omap3evm_init_smsc911x();
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index cbcea420e332..6f58cad5bf74 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -34,8 +34,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include "gpmc-smsc911x.h"
-#include <plat/gpmc.h>
 #include <plat/usb.h>
 #include "common.h"
@@ -43,6 +41,8 @@
 #include "hsmmc.h"
 #include "control.h"
 #include "common-board-devices.h"
+#include "gpmc.h"
+#include "gpmc-smsc911x.h"
 #define OMAP3LOGIC_SMSC911X_CS                  1
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 00a1f4ae6e44..f286b4b4bd5b 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -50,6 +50,7 @@
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "hsmmc.h"
 #include "common-board-devices.h"
+#include "gpmc-nand.h"
 #define PANDORA_WIFI_IRQ_GPIO           21
 #define PANDORA_WIFI_NRESET_GPIO        23
@@ -602,7 +603,7 @@ static void __init omap3pandora_init(void)
        omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
        usbhs_init(&usbhs_bdata);
        usb_musb_init(NULL);
-        gpmc_nand_init(&pandora_nand_data);
+        gpmc_nand_init(&pandora_nand_data, NULL);
        /* Ensure SDRC pins are mux'd for self-refresh */
        omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 731235eb319e..3c83b9fbff45 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -40,7 +40,7 @@
 #include <asm/mach/flash.h>
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <linux/platform_data/mtd-nand-omap2.h>
 #include <plat/usb.h>
 #include <video/omapdss.h>
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 944ffc436577..cd282ae0856b 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -44,12 +44,13 @@
 #include <asm/system_info.h>
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <linux/platform_data/mtd-nand-omap2.h>
 #include <plat/usb.h>
 #include "mux.h"
 #include "hsmmc.h"
+#include "board-flash.h"
 #include "common-board-devices.h"
 #include <asm/setup.h>
@@ -59,6 +60,8 @@
 #define TB_BL_PWM_TIMER         9
 #define TB_KILL_POWER_GPIO      168
+#define NAND_CS                 0
 static unsigned long touchbook_revision;
 static struct mtd_partition omap3touchbook_nand_partitions[] = {
@@ -365,8 +368,9 @@ static void __init omap3_touchbook_init(void)
        omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata);
        usb_musb_init(NULL);
        usbhs_init(&usbhs_bdata);
-        omap_nand_flash_init(NAND_BUSWIDTH_16, omap3touchbook_nand_partitions,
+        board_nand_init(omap3touchbook_nand_partitions,
-                             ARRAY_SIZE(omap3touchbook_nand_partitions));
+                        ARRAY_SIZE(omap3touchbook_nand_partitions), NAND_CS,
+                        NAND_BUSWIDTH_16, NULL);
        /* Ensure SDRC pins are mux'd for self-refresh */
        omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index bfcd397e233c..e9ce9fb9ffac 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -40,10 +40,10 @@
 #include "common.h"
 #include <plat/usb.h>
-#include <plat/mmc.h>
 #include <video/omap-panel-tfp410.h>
 #include "soc.h"
+#include "mmc.h"
 #include "hsmmc.h"
 #include "control.h"
 #include "mux.h"
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index b700685762b5..3a9d1fa8bebd 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -49,14 +49,17 @@
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 #include <video/omap-panel-tfp410.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <plat/usb.h>
 #include "mux.h"
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "hsmmc.h"
+#include "board-flash.h"
 #include "common-board-devices.h"
+#define NAND_CS                 0
 #define OVERO_GPIO_BT_XGATE     15
 #define OVERO_GPIO_W2W_NRESET   16
 #define OVERO_GPIO_PENDOWN      114
@@ -495,8 +498,8 @@ static void __init overo_init(void)
        omap_serial_init();
        omap_sdrc_init(mt46h32m32lf6_sdrc_params,
                                  mt46h32m32lf6_sdrc_params);
-        omap_nand_flash_init(0, overo_nand_partitions,
+        board_nand_init(overo_nand_partitions,
-                             ARRAY_SIZE(overo_nand_partitions));
+                        ARRAY_SIZE(overo_nand_partitions), NAND_CS, 0, NULL);
        usb_musb_init(NULL);
        usbhs_init(&usbhs_bdata);
        overo_spi_init();
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 45997bfbcbd2..208a7a239db5 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -23,16 +23,17 @@
 #include <asm/mach-types.h>
 #include <plat/i2c.h>
-#include <plat/mmc.h>
 #include <plat/usb.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "common.h"
 #include <plat/serial.h>
 #include "mux.h"
+#include "mmc.h"
 #include "hsmmc.h"
 #include "sdram-nokia.h"
 #include "common-board-devices.h"
+#include "gpmc-onenand.h"
 static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
        REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 020e03c95bfe..c2eed847c05b 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -31,8 +31,7 @@
 #include <asm/system_info.h>
 #include "common.h"
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
-#include <plat/gpmc.h>
 #include <plat/omap-pm.h>
 #include "gpmc-smc91x.h"
@@ -54,6 +53,8 @@
 #include "mux.h"
 #include "hsmmc.h"
 #include "common-board-devices.h"
+#include "gpmc.h"
+#include "gpmc-onenand.h"
 #define SYSTEM_REV_B_USES_VAUX3 0x1699
 #define SYSTEM_REV_S_USES_VAUX3 0x8
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 7bbb05d9689b..63b33c63bd94 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -23,12 +23,12 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include "common.h"
+#include <plat-omap/dma-omap.h>
-#include <plat/dma.h>
-#include <plat/gpmc.h>
 #include <plat/usb.h>
+#include "common.h"
 #include "mux.h"
+#include "gpmc.h"
 #include "pm.h"
 #include "sdram-nokia.h"
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index afb2278a29f6..be9f71d436bf 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -17,7 +17,7 @@
 #include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "gpmc-smsc911x.h"
 #include <mach/board-zoom.h>
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 4994438e1f46..c39578c1fa6d 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -113,8 +113,9 @@ static void __init omap_zoom_init(void)
                usbhs_init(&usbhs_bdata);
        }
-        board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions),
+        board_nand_init(zoom_nand_partitions,
-                                                ZOOM_NAND_CS, NAND_BUSWIDTH_16);
+                        ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS,
+                        NAND_BUSWIDTH_16, nand_default_timings);
        zoom_debugboard_init();
        zoom_peripherals_init();
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 48daac2581b4..ad856092c06a 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -25,7 +25,6 @@
 #include <linux/spi/ads7846.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
-#include <linux/platform_data/mtd-nand-omap2.h>
 #include "common.h"
 #include "common-board-devices.h"
@@ -96,48 +95,3 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
 {
 }
 #endif
-#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
-static struct omap_nand_platform_data nand_data;
-void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
-                                 int nr_parts)
-{
-        u8 cs = 0;
-        u8 nandcs = GPMC_CS_NUM + 1;
-        /* find out the chip-select on which NAND exists */
-        while (cs < GPMC_CS_NUM) {
-                u32 ret = 0;
-                ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
-                if ((ret & 0xC00) == 0x800) {
-                        printk(KERN_INFO "Found NAND on CS%d\n", cs);
-                        if (nandcs > GPMC_CS_NUM)
-                                nandcs = cs;
-                }
-                cs++;
-        }
-        if (nandcs > GPMC_CS_NUM) {
-                pr_info("NAND: Unable to find configuration in GPMC\n");
-                return;
-        }
-        if (nandcs < GPMC_CS_NUM) {
-                nand_data.cs = nandcs;
-                nand_data.parts = parts;
-                nand_data.nr_parts = nr_parts;
-                nand_data.devsize = options;
-                printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
-                if (gpmc_nand_init(&nand_data) < 0)
-                        printk(KERN_ERR "Unable to register NAND device\n");
-        }
-}
-#else
-void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
-                                 int nr_parts)
-{
-}
-#endif
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
index a0b4a42836ab..72bb41b3fd25 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -10,6 +10,5 @@ struct ads7846_platform_data;
 void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
                       struct ads7846_platform_data *board_pdata);
-void omap_nand_flash_init(int opts, struct mtd_partition *parts, int n_parts);
 #endif /* __OMAP_COMMON_BOARD_DEVICES__ */
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c8c211731d26..e9ee9d99f881 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -24,7 +24,7 @@
 #include <asm/mach/map.h>
 #include "iomap.h"
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
 #include "omap4-keypad.h"
@@ -34,6 +34,7 @@
 #include "mux.h"
 #include "control.h"
 #include "devices.h"
+#include "dma.h"
 #define L3_MODULES_MAX_LEN 12
 #define L3_MODULES 3
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index ff75abe60af2..4e3ac6b9449e 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -30,7 +30,7 @@
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #define OMAP2_DMA_STRIDE        0x60
diff --git a/arch/arm/mach-omap2/dma.h b/arch/arm/mach-omap2/dma.h
new file mode 100644
index 000000000000..eba80dbc5218
--- /dev/null
+++ b/arch/arm/mach-omap2/dma.h
@@ -0,0 +1,131 @@
+/*
+ *  OMAP2PLUS DMA channel definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __OMAP2PLUS_DMA_CHANNEL_H
+#define __OMAP2PLUS_DMA_CHANNEL_H
+/* DMA channels for 24xx */
+#define OMAP24XX_DMA_NO_DEVICE          0
+#define OMAP24XX_DMA_XTI_DMA            1       /* S_DMA_0 */
+#define OMAP24XX_DMA_EXT_DMAREQ0        2       /* S_DMA_1 */
+#define OMAP24XX_DMA_EXT_DMAREQ1        3       /* S_DMA_2 */
+#define OMAP24XX_DMA_GPMC               4       /* S_DMA_3 */
+#define OMAP24XX_DMA_GFX                5       /* S_DMA_4 */
+#define OMAP24XX_DMA_DSS                6       /* S_DMA_5 */
+#define OMAP242X_DMA_VLYNQ_TX           7       /* S_DMA_6 */
+#define OMAP24XX_DMA_EXT_DMAREQ2        7       /* S_DMA_6 */
+#define OMAP24XX_DMA_CWT                8       /* S_DMA_7 */
+#define OMAP24XX_DMA_AES_TX             9       /* S_DMA_8 */
+#define OMAP24XX_DMA_AES_RX             10      /* S_DMA_9 */
+#define OMAP24XX_DMA_DES_TX             11      /* S_DMA_10 */
+#define OMAP24XX_DMA_DES_RX             12      /* S_DMA_11 */
+#define OMAP24XX_DMA_SHA1MD5_RX         13      /* S_DMA_12 */
+#define OMAP34XX_DMA_SHA2MD5_RX         13      /* S_DMA_12 */
+#define OMAP242X_DMA_EXT_DMAREQ2        14      /* S_DMA_13 */
+#define OMAP242X_DMA_EXT_DMAREQ3        15      /* S_DMA_14 */
+#define OMAP242X_DMA_EXT_DMAREQ4        16      /* S_DMA_15 */
+#define OMAP242X_DMA_EAC_AC_RD          17      /* S_DMA_16 */
+#define OMAP242X_DMA_EAC_AC_WR          18      /* S_DMA_17 */
+#define OMAP242X_DMA_EAC_MD_UL_RD       19      /* S_DMA_18 */
+#define OMAP242X_DMA_EAC_MD_UL_WR       20      /* S_DMA_19 */
+#define OMAP242X_DMA_EAC_MD_DL_RD       21      /* S_DMA_20 */
+#define OMAP242X_DMA_EAC_MD_DL_WR       22      /* S_DMA_21 */
+#define OMAP242X_DMA_EAC_BT_UL_RD       23      /* S_DMA_22 */
+#define OMAP242X_DMA_EAC_BT_UL_WR       24      /* S_DMA_23 */
+#define OMAP242X_DMA_EAC_BT_DL_RD       25      /* S_DMA_24 */
+#define OMAP242X_DMA_EAC_BT_DL_WR       26      /* S_DMA_25 */
+#define OMAP243X_DMA_EXT_DMAREQ3        14      /* S_DMA_13 */
+#define OMAP24XX_DMA_SPI3_TX0           15      /* S_DMA_14 */
+#define OMAP24XX_DMA_SPI3_RX0           16      /* S_DMA_15 */
+#define OMAP24XX_DMA_MCBSP3_TX          17      /* S_DMA_16 */
+#define OMAP24XX_DMA_MCBSP3_RX          18      /* S_DMA_17 */
+#define OMAP24XX_DMA_MCBSP4_TX          19      /* S_DMA_18 */
+#define OMAP24XX_DMA_MCBSP4_RX          20      /* S_DMA_19 */
+#define OMAP24XX_DMA_MCBSP5_TX          21      /* S_DMA_20 */
+#define OMAP24XX_DMA_MCBSP5_RX          22      /* S_DMA_21 */
+#define OMAP24XX_DMA_SPI3_TX1           23      /* S_DMA_22 */
+#define OMAP24XX_DMA_SPI3_RX1           24      /* S_DMA_23 */
+#define OMAP243X_DMA_EXT_DMAREQ4        25      /* S_DMA_24 */
+#define OMAP243X_DMA_EXT_DMAREQ5        26      /* S_DMA_25 */
+#define OMAP34XX_DMA_I2C3_TX            25      /* S_DMA_24 */
+#define OMAP34XX_DMA_I2C3_RX            26      /* S_DMA_25 */
+#define OMAP24XX_DMA_I2C1_TX            27      /* S_DMA_26 */
+#define OMAP24XX_DMA_I2C1_RX            28      /* S_DMA_27 */
+#define OMAP24XX_DMA_I2C2_TX            29      /* S_DMA_28 */
+#define OMAP24XX_DMA_I2C2_RX            30      /* S_DMA_29 */
+#define OMAP24XX_DMA_MCBSP1_TX          31      /* S_DMA_30 */
+#define OMAP24XX_DMA_MCBSP1_RX          32      /* S_DMA_31 */
+#define OMAP24XX_DMA_MCBSP2_TX          33      /* S_DMA_32 */
+#define OMAP24XX_DMA_MCBSP2_RX          34      /* S_DMA_33 */
+#define OMAP24XX_DMA_SPI1_TX0           35      /* S_DMA_34 */
+#define OMAP24XX_DMA_SPI1_RX0           36      /* S_DMA_35 */
+#define OMAP24XX_DMA_SPI1_TX1           37      /* S_DMA_36 */
+#define OMAP24XX_DMA_SPI1_RX1           38      /* S_DMA_37 */
+#define OMAP24XX_DMA_SPI1_TX2           39      /* S_DMA_38 */
+#define OMAP24XX_DMA_SPI1_RX2           40      /* S_DMA_39 */
+#define OMAP24XX_DMA_SPI1_TX3           41      /* S_DMA_40 */
+#define OMAP24XX_DMA_SPI1_RX3           42      /* S_DMA_41 */
+#define OMAP24XX_DMA_SPI2_TX0           43      /* S_DMA_42 */
+#define OMAP24XX_DMA_SPI2_RX0           44      /* S_DMA_43 */
+#define OMAP24XX_DMA_SPI2_TX1           45      /* S_DMA_44 */
+#define OMAP24XX_DMA_SPI2_RX1           46      /* S_DMA_45 */
+#define OMAP24XX_DMA_MMC2_TX            47      /* S_DMA_46 */
+#define OMAP24XX_DMA_MMC2_RX            48      /* S_DMA_47 */
+#define OMAP24XX_DMA_UART1_TX           49      /* S_DMA_48 */
+#define OMAP24XX_DMA_UART1_RX           50      /* S_DMA_49 */
+#define OMAP24XX_DMA_UART2_TX           51      /* S_DMA_50 */
+#define OMAP24XX_DMA_UART2_RX           52      /* S_DMA_51 */
+#define OMAP24XX_DMA_UART3_TX           53      /* S_DMA_52 */
+#define OMAP24XX_DMA_UART3_RX           54      /* S_DMA_53 */
+#define OMAP24XX_DMA_USB_W2FC_TX0       55      /* S_DMA_54 */
+#define OMAP24XX_DMA_USB_W2FC_RX0       56      /* S_DMA_55 */
+#define OMAP24XX_DMA_USB_W2FC_TX1       57      /* S_DMA_56 */
+#define OMAP24XX_DMA_USB_W2FC_RX1       58      /* S_DMA_57 */
+#define OMAP24XX_DMA_USB_W2FC_TX2       59      /* S_DMA_58 */
+#define OMAP24XX_DMA_USB_W2FC_RX2       60      /* S_DMA_59 */
+#define OMAP24XX_DMA_MMC1_TX            61      /* S_DMA_60 */
+#define OMAP24XX_DMA_MMC1_RX            62      /* S_DMA_61 */
+#define OMAP24XX_DMA_MS                 63      /* S_DMA_62 */
+#define OMAP242X_DMA_EXT_DMAREQ5        64      /* S_DMA_63 */
+#define OMAP243X_DMA_EXT_DMAREQ6        64      /* S_DMA_63 */
+#define OMAP34XX_DMA_EXT_DMAREQ3        64      /* S_DMA_63 */
+#define OMAP34XX_DMA_AES2_TX            65      /* S_DMA_64 */
+#define OMAP34XX_DMA_AES2_RX            66      /* S_DMA_65 */
+#define OMAP34XX_DMA_DES2_TX            67      /* S_DMA_66 */
+#define OMAP34XX_DMA_DES2_RX            68      /* S_DMA_67 */
+#define OMAP34XX_DMA_SHA1MD5_RX         69      /* S_DMA_68 */
+#define OMAP34XX_DMA_SPI4_TX0           70      /* S_DMA_69 */
+#define OMAP34XX_DMA_SPI4_RX0           71      /* S_DMA_70 */
+#define OMAP34XX_DSS_DMA0               72      /* S_DMA_71 */
+#define OMAP34XX_DSS_DMA1               73      /* S_DMA_72 */
+#define OMAP34XX_DSS_DMA2               74      /* S_DMA_73 */
+#define OMAP34XX_DSS_DMA3               75      /* S_DMA_74 */
+#define OMAP34XX_DMA_MMC3_TX            77      /* S_DMA_76 */
+#define OMAP34XX_DMA_MMC3_RX            78      /* S_DMA_77 */
+#define OMAP34XX_DMA_USIM_TX            79      /* S_DMA_78 */
+#define OMAP34XX_DMA_USIM_RX            80      /* S_DMA_79 */
+#define OMAP36XX_DMA_UART4_TX           81      /* S_DMA_80 */
+#define OMAP36XX_DMA_UART4_RX           82      /* S_DMA_81 */
+/* Only for AM35xx */
+#define AM35XX_DMA_UART4_TX             54
+#define AM35XX_DMA_UART4_RX             55
+#endif /* __OMAP2PLUS_DMA_CHANNEL_H */
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 4acf497faeb3..8607735b3ab3 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -17,9 +17,12 @@
 #include <asm/mach/flash.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "soc.h"
+#include "gpmc-nand.h"
+/* minimum size for IO mapping */
+#define NAND_IO_SIZE    4
 static struct resource gpmc_nand_resource[] = {
        {
@@ -40,41 +43,36 @@ static struct platform_device gpmc_nand_device = {
        .resource       = gpmc_nand_resource,
 };
-static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
+static int omap2_nand_gpmc_retime(
+                                struct omap_nand_platform_data *gpmc_nand_data,
+                                struct gpmc_timings *gpmc_t)
 {
        struct gpmc_timings t;
        int err;
-        if (!gpmc_nand_data->gpmc_t)
-                return 0;
        memset(&t, 0, sizeof(t));
-        t.sync_clk = gpmc_nand_data->gpmc_t->sync_clk;
+        t.sync_clk = gpmc_t->sync_clk;
-        t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on);
+        t.cs_on = gpmc_round_ns_to_ticks(gpmc_t->cs_on);
-        t.adv_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->adv_on);
+        t.adv_on = gpmc_round_ns_to_ticks(gpmc_t->adv_on);
        /* Read */
-        t.adv_rd_off = gpmc_round_ns_to_ticks(
+        t.adv_rd_off = gpmc_round_ns_to_ticks(gpmc_t->adv_rd_off);
-                                gpmc_nand_data->gpmc_t->adv_rd_off);
        t.oe_on  = t.adv_on;
-        t.access = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->access);
+        t.access = gpmc_round_ns_to_ticks(gpmc_t->access);
-        t.oe_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->oe_off);
+        t.oe_off = gpmc_round_ns_to_ticks(gpmc_t->oe_off);
-        t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_rd_off);
+        t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_t->cs_rd_off);
-        t.rd_cycle  = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->rd_cycle);
+        t.rd_cycle  = gpmc_round_ns_to_ticks(gpmc_t->rd_cycle);
        /* Write */
-        t.adv_wr_off = gpmc_round_ns_to_ticks(
+        t.adv_wr_off = gpmc_round_ns_to_ticks(gpmc_t->adv_wr_off);
-                                gpmc_nand_data->gpmc_t->adv_wr_off);
        t.we_on  = t.oe_on;
        if (cpu_is_omap34xx()) {
-            t.wr_data_mux_bus = gpmc_round_ns_to_ticks(
+            t.wr_data_mux_bus = gpmc_round_ns_to_ticks(gpmc_t->wr_data_mux_bus);
-                                gpmc_nand_data->gpmc_t->wr_data_mux_bus);
+            t.wr_access = gpmc_round_ns_to_ticks(gpmc_t->wr_access);
-            t.wr_access = gpmc_round_ns_to_ticks(
-                                gpmc_nand_data->gpmc_t->wr_access);
        }
-        t.we_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->we_off);
+        t.we_off = gpmc_round_ns_to_ticks(gpmc_t->we_off);
-        t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_wr_off);
+        t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_t->cs_wr_off);
-        t.wr_cycle  = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
+        t.wr_cycle  = gpmc_round_ns_to_ticks(gpmc_t->wr_cycle);
        /* Configure GPMC */
        if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
@@ -91,7 +89,29 @@ static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data
        return 0;
 }
-int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
+static bool __init gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
+{
+        /* support only OMAP3 class */
+        if (!cpu_is_omap34xx()) {
+                pr_err("BCH ecc is not supported on this CPU\n");
+                return 0;
+        }
+        /*
+         * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1.
+         * Other chips may be added if confirmed to work.
+         */
+        if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) &&
+            (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) {
+                pr_err("BCH 4-bit mode is not supported on this CPU\n");
+                return 0;
+        }
+        return 1;
+}
+int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
+                          struct gpmc_timings *gpmc_t)
 {
        int err = 0;
        struct device *dev = &gpmc_nand_device.dev;
@@ -112,11 +132,13 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
                                gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
        gpmc_nand_resource[2].start =
                                gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
-         /* Set timings in GPMC */
-        err = omap2_nand_gpmc_retime(gpmc_nand_data);
+        if (gpmc_t) {
-        if (err < 0) {
+                err = omap2_nand_gpmc_retime(gpmc_nand_data, gpmc_t);
-                dev_err(dev, "Unable to set gpmc timings: %d\n", err);
+                if (err < 0) {
-                return err;
+                        dev_err(dev, "Unable to set gpmc timings: %d\n", err);
+                        return err;
+                }
        }
        /* Enable RD PIN Monitoring Reg */
@@ -126,6 +148,9 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
        gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
+        if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt))
+                return -EINVAL;
        err = platform_device_register(&gpmc_nand_device);
        if (err < 0) {
                dev_err(dev, "Unable to register NAND device\n");
diff --git a/arch/arm/mach-omap2/gpmc-nand.h b/arch/arm/mach-omap2/gpmc-nand.h
new file mode 100644
index 000000000000..d59e1281e851
--- /dev/null
+++ b/arch/arm/mach-omap2/gpmc-nand.h
@@ -0,0 +1,27 @@
+/*
+ *  arch/arm/mach-omap2/gpmc-nand.h
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#ifndef __OMAP2_GPMC_NAND_H
+#define __OMAP2_GPMC_NAND_H
+#include "gpmc.h"
+#include <linux/platform_data/mtd-nand-omap2.h>
+#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2)
+extern int gpmc_nand_init(struct omap_nand_platform_data *d,
+                          struct gpmc_timings *gpmc_t);
+#else
+static inline int gpmc_nand_init(struct omap_nand_platform_data *d,
+                                 struct gpmc_timings *gpmc_t)
+{
+        return 0;
+}
+#endif
+#endif
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index 916716e1da3b..d102183ed9a5 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -16,15 +16,25 @@
 #include <linux/mtd/onenand_regs.h>
 #include <linux/io.h>
 #include <linux/platform_data/mtd-onenand-omap2.h>
+#include <linux/err.h>
 #include <asm/mach/flash.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "soc.h"
+#include "gpmc-onenand.h"
 #define ONENAND_IO_SIZE SZ_128K
+#define ONENAND_FLAG_SYNCREAD   (1 << 0)
+#define ONENAND_FLAG_SYNCWRITE  (1 << 1)
+#define ONENAND_FLAG_HF         (1 << 2)
+#define ONENAND_FLAG_VHF        (1 << 3)
+static unsigned onenand_flags;
+static unsigned latency;
+static int fclk_offset;
 static struct omap_onenand_platform_data *gpmc_onenand_data;
 static struct resource gpmc_onenand_resource = {
@@ -38,11 +48,9 @@ static struct platform_device gpmc_onenand_device = {
        .resource       = &gpmc_onenand_resource,
 };
-static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
+static struct gpmc_timings omap2_onenand_calc_async_timings(void)
 {
        struct gpmc_timings t;
-        u32 reg;
-        int err;
        const int t_cer = 15;
        const int t_avdp = 12;
@@ -55,11 +63,6 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
        const int t_wpl = 40;
        const int t_wph = 30;
-        /* Ensure sync read and sync write are disabled */
-        reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
-        reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;
-        writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
        memset(&t, 0, sizeof(t));
        t.sync_clk = 0;
        t.cs_on = 0;
@@ -86,25 +89,30 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
        t.cs_wr_off = t.we_off + gpmc_round_ns_to_ticks(t_wph);
        t.wr_cycle  = t.cs_wr_off + gpmc_round_ns_to_ticks(t_cez);
+        return t;
+}
+static int gpmc_set_async_mode(int cs, struct gpmc_timings *t)
+{
        /* Configure GPMC for asynchronous read */
        gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
                          GPMC_CONFIG1_DEVICESIZE_16 |
                          GPMC_CONFIG1_MUXADDDATA);
-        err = gpmc_cs_set_timings(cs, &t);
+        return gpmc_cs_set_timings(cs, t);
-        if (err)
+}
-                return err;
+static void omap2_onenand_set_async_mode(void __iomem *onenand_base)
+{
+        u32 reg;
        /* Ensure sync read and sync write are disabled */
        reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
        reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;
        writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
-        return 0;
 }
-static void set_onenand_cfg(void __iomem *onenand_base, int latency,
+static void set_onenand_cfg(void __iomem *onenand_base)
-                                int sync_read, int sync_write, int hf, int vhf)
 {
        u32 reg;
@@ -112,19 +120,19 @@ static void set_onenand_cfg(void __iomem *onenand_base, int latency,
        reg &= ~((0x7 << ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 << 9));
        reg |=  (latency << ONENAND_SYS_CFG1_BRL_SHIFT) |
                ONENAND_SYS_CFG1_BL_16;
-        if (sync_read)
+        if (onenand_flags & ONENAND_FLAG_SYNCREAD)
                reg |= ONENAND_SYS_CFG1_SYNC_READ;
        else
                reg &= ~ONENAND_SYS_CFG1_SYNC_READ;
-        if (sync_write)
+        if (onenand_flags & ONENAND_FLAG_SYNCWRITE)
                reg |= ONENAND_SYS_CFG1_SYNC_WRITE;
        else
                reg &= ~ONENAND_SYS_CFG1_SYNC_WRITE;
-        if (hf)
+        if (onenand_flags & ONENAND_FLAG_HF)
                reg |= ONENAND_SYS_CFG1_HF;
        else
                reg &= ~ONENAND_SYS_CFG1_HF;
-        if (vhf)
+        if (onenand_flags & ONENAND_FLAG_VHF)
                reg |= ONENAND_SYS_CFG1_VHF;
        else
                reg &= ~ONENAND_SYS_CFG1_VHF;
@@ -132,21 +140,10 @@ static void set_onenand_cfg(void __iomem *onenand_base, int latency,
 }
 static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg,
-                                  void __iomem *onenand_base, bool *clk_dep)
+                                  void __iomem *onenand_base)
 {
        u16 ver = readw(onenand_base + ONENAND_REG_VERSION_ID);
-        int freq = 0;
+        int freq;
-        if (cfg->get_freq) {
-                struct onenand_freq_info fi;
-                fi.maf_id = readw(onenand_base + ONENAND_REG_MANUFACTURER_ID);
-                fi.dev_id = readw(onenand_base + ONENAND_REG_DEVICE_ID);
-                fi.ver_id = ver;
-                freq = cfg->get_freq(&fi, clk_dep);
-                if (freq)
-                        return freq;
-        }
        switch ((ver >> 4) & 0xf) {
        case 0:
@@ -172,9 +169,9 @@ static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg,
        return freq;
 }
-static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
+static struct gpmc_timings
-                                        void __iomem *onenand_base,
+omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg,
-                                        int *freq_ptr)
+                                int freq)
 {
        struct gpmc_timings t;
        const int t_cer  = 15;
@@ -184,29 +181,15 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
        const int t_wpl  = 40;
        const int t_wph  = 30;
        int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo;
-        int div, fclk_offset_ns, fclk_offset, gpmc_clk_ns, latency;
-        int first_time = 0, hf = 0, vhf = 0, sync_read = 0, sync_write = 0;
-        int err, ticks_cez;
-        int cs = cfg->cs, freq = *freq_ptr;
        u32 reg;
-        bool clk_dep = false;
+        int div, fclk_offset_ns, gpmc_clk_ns;
+        int ticks_cez;
+        int cs = cfg->cs;
-        if (cfg->flags & ONENAND_SYNC_READ) {
+        if (cfg->flags & ONENAND_SYNC_READ)
-                sync_read = 1;
+                onenand_flags = ONENAND_FLAG_SYNCREAD;
-        } else if (cfg->flags & ONENAND_SYNC_READWRITE) {
+        else if (cfg->flags & ONENAND_SYNC_READWRITE)
-                sync_read = 1;
+                onenand_flags = ONENAND_FLAG_SYNCREAD | ONENAND_FLAG_SYNCWRITE;
-                sync_write = 1;
-        } else
-                return omap2_onenand_set_async_mode(cs, onenand_base);
-        if (!freq) {
-                /* Very first call freq is not known */
-                err = omap2_onenand_set_async_mode(cs, onenand_base);
-                if (err)
-                        return err;
-                freq = omap2_onenand_get_freq(cfg, onenand_base, &clk_dep);
-                first_time = 1;
-        }
        switch (freq) {
        case 104:
@@ -244,44 +227,31 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
                t_ach   = 9;
                t_aavdh = 7;
                t_rdyo  = 15;
-                sync_write = 0;
+                onenand_flags &= ~ONENAND_FLAG_SYNCWRITE;
                break;
        }
-        div = gpmc_cs_calc_divider(cs, min_gpmc_clk_period);
+        div = gpmc_calc_divider(min_gpmc_clk_period);
        gpmc_clk_ns = gpmc_ticks_to_ns(div);
        if (gpmc_clk_ns < 15) /* >66Mhz */
-                hf = 1;
+                onenand_flags |= ONENAND_FLAG_HF;
+        else
+                onenand_flags &= ~ONENAND_FLAG_HF;
        if (gpmc_clk_ns < 12) /* >83Mhz */
-                vhf = 1;
+                onenand_flags |= ONENAND_FLAG_VHF;
-        if (vhf)
+        else
+                onenand_flags &= ~ONENAND_FLAG_VHF;
+        if (onenand_flags & ONENAND_FLAG_VHF)
                latency = 8;
-        else if (hf)
+        else if (onenand_flags & ONENAND_FLAG_HF)
                latency = 6;
        else if (gpmc_clk_ns >= 25) /* 40 MHz*/
                latency = 3;
        else
                latency = 4;
-        if (clk_dep) {
+        /* Set synchronous read timings */
-                if (gpmc_clk_ns < 12) { /* >83Mhz */
+        memset(&t, 0, sizeof(t));
-                        t_ces   = 3;
-                        t_avds  = 4;
-                } else if (gpmc_clk_ns < 15) { /* >66Mhz */
-                        t_ces   = 5;
-                        t_avds  = 4;
-                } else if (gpmc_clk_ns < 25) { /* >40Mhz */
-                        t_ces   = 6;
-                        t_avds  = 5;
-                } else {
-                        t_ces   = 7;
-                        t_avds  = 7;
-                }
-        }
-        if (first_time)
-                set_onenand_cfg(onenand_base, latency,
-                                        sync_read, sync_write, hf, vhf);
        if (div == 1) {
                reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG2);
@@ -307,8 +277,6 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
                gpmc_cs_write_reg(cs, GPMC_CS_CONFIG4, reg);
        }
-        /* Set synchronous read timings */
-        memset(&t, 0, sizeof(t));
        t.sync_clk = min_gpmc_clk_period;
        t.cs_on = 0;
        t.adv_on = 0;
@@ -330,7 +298,7 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
                     ticks_cez);
        /* Write */
-        if (sync_write) {
+        if (onenand_flags & ONENAND_FLAG_SYNCWRITE) {
                t.adv_wr_off = t.adv_rd_off;
                t.we_on  = 0;
                t.we_off = t.cs_rd_off;
@@ -355,6 +323,14 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
                }
        }
+        return t;
+}
+static int gpmc_set_sync_mode(int cs, struct gpmc_timings *t)
+{
+        unsigned sync_read = onenand_flags & ONENAND_FLAG_SYNCREAD;
+        unsigned sync_write = onenand_flags & ONENAND_FLAG_SYNCWRITE;
        /* Configure GPMC for synchronous read */
        gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
                          GPMC_CONFIG1_WRAPBURST_SUPP |
@@ -371,11 +347,45 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
                          GPMC_CONFIG1_DEVICETYPE_NOR |
                          GPMC_CONFIG1_MUXADDDATA);
-        err = gpmc_cs_set_timings(cs, &t);
+        return gpmc_cs_set_timings(cs, t);
-        if (err)
+}
-                return err;
+static int omap2_onenand_setup_async(void __iomem *onenand_base)
+{
+        struct gpmc_timings t;
+        int ret;
+        omap2_onenand_set_async_mode(onenand_base);
-        set_onenand_cfg(onenand_base, latency, sync_read, sync_write, hf, vhf);
+        t = omap2_onenand_calc_async_timings();
+        ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t);
+        if (IS_ERR_VALUE(ret))
+                return ret;
+        omap2_onenand_set_async_mode(onenand_base);
+        return 0;
+}
+static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr)
+{
+        int ret, freq = *freq_ptr;
+        struct gpmc_timings t;
+        if (!freq) {
+                /* Very first call freq is not known */
+                freq = omap2_onenand_get_freq(gpmc_onenand_data, onenand_base);
+                set_onenand_cfg(onenand_base);
+        }
+        t = omap2_onenand_calc_sync_timings(gpmc_onenand_data, freq);
+        ret = gpmc_set_sync_mode(gpmc_onenand_data->cs, &t);
+        if (IS_ERR_VALUE(ret))
+                return ret;
+        set_onenand_cfg(onenand_base);
        *freq_ptr = freq;
@@ -385,15 +395,22 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
 static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
 {
        struct device *dev = &gpmc_onenand_device.dev;
+        unsigned l = ONENAND_SYNC_READ | ONENAND_SYNC_READWRITE;
+        int ret;
-        /* Set sync timings in GPMC */
+        ret = omap2_onenand_setup_async(onenand_base);
-        if (omap2_onenand_set_sync_mode(gpmc_onenand_data, onenand_base,
+        if (ret) {
-                        freq_ptr) < 0) {
+                dev_err(dev, "unable to set to async mode\n");
-                dev_err(dev, "Unable to set synchronous mode\n");
+                return ret;
-                return -EINVAL;
        }
-        return 0;
+        if (!(gpmc_onenand_data->flags & l))
+                return 0;
+        ret = omap2_onenand_setup_sync(onenand_base, freq_ptr);
+        if (ret)
+                dev_err(dev, "unable to set to sync mode\n");
+        return ret;
 }
 void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
@@ -411,6 +428,11 @@ void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
                gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
        }
+        if (cpu_is_omap34xx())
+                gpmc_onenand_data->flags |= ONENAND_IN_OMAP34XX;
+        else
+                gpmc_onenand_data->flags &= ~ONENAND_IN_OMAP34XX;
        err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE,
                                (unsigned long *)&gpmc_onenand_resource.start);
        if (err < 0) {
diff --git a/arch/arm/mach-omap2/gpmc-onenand.h b/arch/arm/mach-omap2/gpmc-onenand.h
new file mode 100644
index 000000000000..216f23a8b45c
--- /dev/null
+++ b/arch/arm/mach-omap2/gpmc-onenand.h
@@ -0,0 +1,24 @@
+/*
+ *  arch/arm/mach-omap2/gpmc-onenand.h
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#ifndef __OMAP2_GPMC_ONENAND_H
+#define __OMAP2_GPMC_ONENAND_H
+#include <linux/platform_data/mtd-onenand-omap2.h>
+#if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2)
+extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
+#else
+#define board_onenand_data      NULL
+static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
+{
+}
+#endif
+#endif
diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c
index 565475310374..6eed907d594c 100644
--- a/arch/arm/mach-omap2/gpmc-smc91x.c
+++ b/arch/arm/mach-omap2/gpmc-smc91x.c
@@ -17,7 +17,7 @@
 #include <linux/io.h>
 #include <linux/smc91x.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "gpmc-smc91x.h"
 #include "soc.h"
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index 249a0b440cd6..ef990118d32b 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -20,7 +20,7 @@
 #include <linux/io.h>
 #include <linux/smsc911x.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "gpmc-smsc911x.h"
 static struct resource gpmc_smsc911x_resources[] = {
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index e7f2b80721c4..9472541a4d8d 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -26,15 +26,16 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/platform_data/mtd-nand-omap2.h>
 #include <asm/mach-types.h>
-#include <plat/gpmc.h>
 #include <plat/cpu.h>
-#include <plat/gpmc.h>
 #include <plat/omap_device.h>
 #include "soc.h"
 #include "common.h"
+#include "gpmc.h"
 #define DEVICE_NAME             "omap-gpmc"
@@ -58,6 +59,9 @@
 #define GPMC_ECC_SIZE_CONFIG    0x1fc
 #define GPMC_ECC1_RESULT        0x200
 #define GPMC_ECC_BCH_RESULT_0   0x240   /* not available on OMAP2 */
+#define GPMC_ECC_BCH_RESULT_1   0x244   /* not available on OMAP2 */
+#define GPMC_ECC_BCH_RESULT_2   0x248   /* not available on OMAP2 */
+#define GPMC_ECC_BCH_RESULT_3   0x24c   /* not available on OMAP2 */
 /* GPMC ECC control settings */
 #define GPMC_ECC_CTRL_ECCCLEAR          0x100
@@ -74,6 +78,7 @@
 #define GPMC_CS0_OFFSET         0x60
 #define GPMC_CS_SIZE            0x30
+#define GPMC_BCH_SIZE           0x10
 #define GPMC_MEM_START          0x00000000
 #define GPMC_MEM_END            0x3FFFFFFF
@@ -136,7 +141,6 @@ static struct resource	gpmc_mem_root;
 static struct resource  gpmc_cs_mem[GPMC_CS_NUM];
 static DEFINE_SPINLOCK(gpmc_mem_lock);
 static unsigned int gpmc_cs_map;        /* flag for cs which are initialized */
-static int gpmc_ecc_used = -EINVAL;     /* cs using ecc engine */
 static struct device *gpmc_dev;
 static int gpmc_irq;
 static resource_size_t phys_base, mem_size;
@@ -157,22 +161,6 @@ static u32 gpmc_read_reg(int idx)
        return __raw_readl(gpmc_base + idx);
 }
-static void gpmc_cs_write_byte(int cs, int idx, u8 val)
-{
-        void __iomem *reg_addr;
-        reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
-        __raw_writeb(val, reg_addr);
-}
-static u8 gpmc_cs_read_byte(int cs, int idx)
-{
-        void __iomem *reg_addr;
-        reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
-        return __raw_readb(reg_addr);
-}
 void gpmc_cs_write_reg(int cs, int idx, u32 val)
 {
        void __iomem *reg_addr;
@@ -287,7 +275,7 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
                return -1
 #endif
-int gpmc_cs_calc_divider(int cs, unsigned int sync_clk)
+int gpmc_calc_divider(unsigned int sync_clk)
 {
        int div;
        u32 l;
@@ -307,7 +295,7 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
        int div;
        u32 l;
-        div = gpmc_cs_calc_divider(cs, t->sync_clk);
+        div = gpmc_calc_divider(t->sync_clk);
        if (div < 0)
                return div;
@@ -508,44 +496,6 @@ void gpmc_cs_free(int cs)
 EXPORT_SYMBOL(gpmc_cs_free);
 /**
- * gpmc_read_status - read access request to get the different gpmc status
- * @cmd: command type
- * @return status
- */
-int gpmc_read_status(int cmd)
-{
-        int     status = -EINVAL;
-        u32     regval = 0;
-        switch (cmd) {
-        case GPMC_GET_IRQ_STATUS:
-                status = gpmc_read_reg(GPMC_IRQSTATUS);
-                break;
-        case GPMC_PREFETCH_FIFO_CNT:
-                regval = gpmc_read_reg(GPMC_PREFETCH_STATUS);
-                status = GPMC_PREFETCH_STATUS_FIFO_CNT(regval);
-                break;
-        case GPMC_PREFETCH_COUNT:
-                regval = gpmc_read_reg(GPMC_PREFETCH_STATUS);
-                status = GPMC_PREFETCH_STATUS_COUNT(regval);
-                break;
-        case GPMC_STATUS_BUFFER:
-                regval = gpmc_read_reg(GPMC_STATUS);
-                /* 1 : buffer is available to write */
-                status = regval & GPMC_STATUS_BUFF_EMPTY;
-                break;
-        default:
-                printk(KERN_ERR "gpmc_read_status: Not supported\n");
-        }
-        return status;
-}
-EXPORT_SYMBOL(gpmc_read_status);
-/**
 * gpmc_cs_configure - write request to configure gpmc
 * @cs: chip select number
 * @cmd: command type
@@ -613,121 +563,10 @@ int gpmc_cs_configure(int cs, int cmd, int wval)
 }
 EXPORT_SYMBOL(gpmc_cs_configure);
-/**
- * gpmc_nand_read - nand specific read access request
- * @cs: chip select number
- * @cmd: command type
- */
-int gpmc_nand_read(int cs, int cmd)
-{
-        int rval = -EINVAL;
-        switch (cmd) {
-        case GPMC_NAND_DATA:
-                rval = gpmc_cs_read_byte(cs, GPMC_CS_NAND_DATA);
-                break;
-        default:
-                printk(KERN_ERR "gpmc_read_nand_ctrl: Not supported\n");
-        }
-        return rval;
-}
-EXPORT_SYMBOL(gpmc_nand_read);
-/**
- * gpmc_nand_write - nand specific write request
- * @cs: chip select number
- * @cmd: command type
- * @wval: value to write
- */
-int gpmc_nand_write(int cs, int cmd, int wval)
-{
-        int err = 0;
-        switch (cmd) {
-        case GPMC_NAND_COMMAND:
-                gpmc_cs_write_byte(cs, GPMC_CS_NAND_COMMAND, wval);
-                break;
-        case GPMC_NAND_ADDRESS:
-                gpmc_cs_write_byte(cs, GPMC_CS_NAND_ADDRESS, wval);
-                break;
-        case GPMC_NAND_DATA:
-                gpmc_cs_write_byte(cs, GPMC_CS_NAND_DATA, wval);
-        default:
-                printk(KERN_ERR "gpmc_write_nand_ctrl: Not supported\n");
-                err = -EINVAL;
-        }
-        return err;
-}
-EXPORT_SYMBOL(gpmc_nand_write);
-/**
- * gpmc_prefetch_enable - configures and starts prefetch transfer
- * @cs: cs (chip select) number
- * @fifo_th: fifo threshold to be used for read/ write
- * @dma_mode: dma mode enable (1) or disable (0)
- * @u32_count: number of bytes to be transferred
- * @is_write: prefetch read(0) or write post(1) mode
- */
-int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
-                                unsigned int u32_count, int is_write)
-{
-        if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX) {
-                pr_err("gpmc: fifo threshold is not supported\n");
-                return -1;
-        } else if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
-                /* Set the amount of bytes to be prefetched */
-                gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count);
-                /* Set dma/mpu mode, the prefetch read / post write and
-                 * enable the engine. Set which cs is has requested for.
-                 */
-                gpmc_write_reg(GPMC_PREFETCH_CONFIG1, ((cs << CS_NUM_SHIFT) |
-                                        PREFETCH_FIFOTHRESHOLD(fifo_th) |
-                                        ENABLE_PREFETCH |
-                                        (dma_mode << DMA_MPU_MODE) |
-                                        (0x1 & is_write)));
-                /*  Start the prefetch engine */
-                gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1);
-        } else {
-                return -EBUSY;
-        }
-        return 0;
-}
-EXPORT_SYMBOL(gpmc_prefetch_enable);
-/**
- * gpmc_prefetch_reset - disables and stops the prefetch engine
- */
-int gpmc_prefetch_reset(int cs)
-{
-        u32 config1;
-        /* check if the same module/cs is trying to reset */
-        config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1);
-        if (((config1 >> CS_NUM_SHIFT) & 0x7) != cs)
-                return -EINVAL;
-        /* Stop the PFPW engine */
-        gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x0);
-        /* Reset/disable the PFPW engine */
-        gpmc_write_reg(GPMC_PREFETCH_CONFIG1, 0x0);
-        return 0;
-}
-EXPORT_SYMBOL(gpmc_prefetch_reset);
 void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
 {
+        int i;
        reg->gpmc_status = gpmc_base + GPMC_STATUS;
        reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET +
                                GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs;
@@ -743,7 +582,17 @@ void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
        reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL;
        reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG;
        reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT;
-        reg->gpmc_bch_result0 = gpmc_base + GPMC_ECC_BCH_RESULT_0;
+        for (i = 0; i < GPMC_BCH_NUM_REMAINDER; i++) {
+                reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 +
+                                           GPMC_BCH_SIZE * i;
+                reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 +
+                                           GPMC_BCH_SIZE * i;
+                reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 +
+                                           GPMC_BCH_SIZE * i;
+                reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 +
+                                           GPMC_BCH_SIZE * i;
+        }
 }
 int gpmc_get_client_irq(unsigned irq_config)
@@ -1078,267 +927,3 @@ void omap3_gpmc_restore_context(void)
        }
 }
 #endif /* CONFIG_ARCH_OMAP3 */
-/**
- * gpmc_enable_hwecc - enable hardware ecc functionality
- * @cs: chip select number
- * @mode: read/write mode
- * @dev_width: device bus width(1 for x16, 0 for x8)
- * @ecc_size: bytes for which ECC will be generated
- */
-int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
-{
-        unsigned int val;
-        /* check if ecc module is in used */
-        if (gpmc_ecc_used != -EINVAL)
-                return -EINVAL;
-        gpmc_ecc_used = cs;
-        /* clear ecc and enable bits */
-        gpmc_write_reg(GPMC_ECC_CONTROL,
-                        GPMC_ECC_CTRL_ECCCLEAR |
-                        GPMC_ECC_CTRL_ECCREG1);
-        /* program ecc and result sizes */
-        val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F));
-        gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, val);
-        switch (mode) {
-        case GPMC_ECC_READ:
-        case GPMC_ECC_WRITE:
-                gpmc_write_reg(GPMC_ECC_CONTROL,
-                                GPMC_ECC_CTRL_ECCCLEAR |
-                                GPMC_ECC_CTRL_ECCREG1);
-                break;
-        case GPMC_ECC_READSYN:
-                gpmc_write_reg(GPMC_ECC_CONTROL,
-                                GPMC_ECC_CTRL_ECCCLEAR |
-                                GPMC_ECC_CTRL_ECCDISABLE);
-                break;
-        default:
-                printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode);
-                break;
-        }
-        /* (ECC 16 or 8 bit col) | ( CS  )  | ECC Enable */
-        val = (dev_width << 7) | (cs << 1) | (0x1);
-        gpmc_write_reg(GPMC_ECC_CONFIG, val);
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_enable_hwecc);
-/**
- * gpmc_calculate_ecc - generate non-inverted ecc bytes
- * @cs: chip select number
- * @dat: data pointer over which ecc is computed
- * @ecc_code: ecc code buffer
- *
- * Using non-inverted ECC is considered ugly since writing a blank
- * page (padding) will clear the ECC bytes. This is not a problem as long
- * no one is trying to write data on the seemingly unused page. Reading
- * an erased page will produce an ECC mismatch between generated and read
- * ECC bytes that has to be dealt with separately.
- */
-int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code)
-{
-        unsigned int val = 0x0;
-        if (gpmc_ecc_used != cs)
-                return -EINVAL;
-        /* read ecc result */
-        val = gpmc_read_reg(GPMC_ECC1_RESULT);
-        *ecc_code++ = val;          /* P128e, ..., P1e */
-        *ecc_code++ = val >> 16;    /* P128o, ..., P1o */
-        /* P2048o, P1024o, P512o, P256o, P2048e, P1024e, P512e, P256e */
-        *ecc_code++ = ((val >> 8) & 0x0f) | ((val >> 20) & 0xf0);
-        gpmc_ecc_used = -EINVAL;
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_calculate_ecc);
-#ifdef CONFIG_ARCH_OMAP3
-/**
- * gpmc_init_hwecc_bch - initialize hardware BCH ecc functionality
- * @cs: chip select number
- * @nsectors: how many 512-byte sectors to process
- * @nerrors: how many errors to correct per sector (4 or 8)
- *
- * This function must be executed before any call to gpmc_enable_hwecc_bch.
- */
-int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors)
-{
-        /* check if ecc module is in use */
-        if (gpmc_ecc_used != -EINVAL)
-                return -EINVAL;
-        /* support only OMAP3 class */
-        if (!cpu_is_omap34xx()) {
-                printk(KERN_ERR "BCH ecc is not supported on this CPU\n");
-                return -EINVAL;
-        }
-        /*
-         * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1.
-         * Other chips may be added if confirmed to work.
-         */
-        if ((nerrors == 4) &&
-            (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) {
-                printk(KERN_ERR "BCH 4-bit mode is not supported on this CPU\n");
-                return -EINVAL;
-        }
-        /* sanity check */
-        if (nsectors > 8) {
-                printk(KERN_ERR "BCH cannot process %d sectors (max is 8)\n",
-                       nsectors);
-                return -EINVAL;
-        }
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_init_hwecc_bch);
-/**
- * gpmc_enable_hwecc_bch - enable hardware BCH ecc functionality
- * @cs: chip select number
- * @mode: read/write mode
- * @dev_width: device bus width(1 for x16, 0 for x8)
- * @nsectors: how many 512-byte sectors to process
- * @nerrors: how many errors to correct per sector (4 or 8)
- */
-int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors,
-                          int nerrors)
-{
-        unsigned int val;
-        /* check if ecc module is in use */
-        if (gpmc_ecc_used != -EINVAL)
-                return -EINVAL;
-        gpmc_ecc_used = cs;
-        /* clear ecc and enable bits */
-        gpmc_write_reg(GPMC_ECC_CONTROL, 0x1);
-        /*
-         * When using BCH, sector size is hardcoded to 512 bytes.
-         * Here we are using wrapping mode 6 both for reading and writing, with:
-         *  size0 = 0  (no additional protected byte in spare area)
-         *  size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
-         */
-        gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, (32 << 22) | (0 << 12));
-        /* BCH configuration */
-        val = ((1                        << 16) | /* enable BCH */
-               (((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */
-               (0x06                     <<  8) | /* wrap mode = 6 */
-               (dev_width                <<  7) | /* bus width */
-               (((nsectors-1) & 0x7)     <<  4) | /* number of sectors */
-               (cs                       <<  1) | /* ECC CS */
-               (0x1));                            /* enable ECC */
-        gpmc_write_reg(GPMC_ECC_CONFIG, val);
-        gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_enable_hwecc_bch);
-/**
- * gpmc_calculate_ecc_bch4 - Generate 7 ecc bytes per sector of 512 data bytes
- * @cs:  chip select number
- * @dat: The pointer to data on which ecc is computed
- * @ecc: The ecc output buffer
- */
-int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc)
-{
-        int i;
-        unsigned long nsectors, reg, val1, val2;
-        if (gpmc_ecc_used != cs)
-                return -EINVAL;
-        nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) >> 4) & 0x7) + 1;
-        for (i = 0; i < nsectors; i++) {
-                reg = GPMC_ECC_BCH_RESULT_0 + 16*i;
-                /* Read hw-computed remainder */
-                val1 = gpmc_read_reg(reg + 0);
-                val2 = gpmc_read_reg(reg + 4);
-                /*
-                 * Add constant polynomial to remainder, in order to get an ecc
-                 * sequence of 0xFFs for a buffer filled with 0xFFs; and
-                 * left-justify the resulting polynomial.
-                 */
-                *ecc++ = 0x28 ^ ((val2 >> 12) & 0xFF);
-                *ecc++ = 0x13 ^ ((val2 >>  4) & 0xFF);
-                *ecc++ = 0xcc ^ (((val2 & 0xF) << 4)|((val1 >> 28) & 0xF));
-                *ecc++ = 0x39 ^ ((val1 >> 20) & 0xFF);
-                *ecc++ = 0x96 ^ ((val1 >> 12) & 0xFF);
-                *ecc++ = 0xac ^ ((val1 >> 4) & 0xFF);
-                *ecc++ = 0x7f ^ ((val1 & 0xF) << 4);
-        }
-        gpmc_ecc_used = -EINVAL;
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch4);
-/**
- * gpmc_calculate_ecc_bch8 - Generate 13 ecc bytes per block of 512 data bytes
- * @cs:  chip select number
- * @dat: The pointer to data on which ecc is computed
- * @ecc: The ecc output buffer
- */
-int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc)
-{
-        int i;
-        unsigned long nsectors, reg, val1, val2, val3, val4;
-        if (gpmc_ecc_used != cs)
-                return -EINVAL;
-        nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) >> 4) & 0x7) + 1;
-        for (i = 0; i < nsectors; i++) {
-                reg = GPMC_ECC_BCH_RESULT_0 + 16*i;
-                /* Read hw-computed remainder */
-                val1 = gpmc_read_reg(reg + 0);
-                val2 = gpmc_read_reg(reg + 4);
-                val3 = gpmc_read_reg(reg + 8);
-                val4 = gpmc_read_reg(reg + 12);
-                /*
-                 * Add constant polynomial to remainder, in order to get an ecc
-                 * sequence of 0xFFs for a buffer filled with 0xFFs.
-                 */
-                *ecc++ = 0xef ^ (val4 & 0xFF);
-                *ecc++ = 0x51 ^ ((val3 >> 24) & 0xFF);
-                *ecc++ = 0x2e ^ ((val3 >> 16) & 0xFF);
-                *ecc++ = 0x09 ^ ((val3 >> 8) & 0xFF);
-                *ecc++ = 0xed ^ (val3 & 0xFF);
-                *ecc++ = 0x93 ^ ((val2 >> 24) & 0xFF);
-                *ecc++ = 0x9a ^ ((val2 >> 16) & 0xFF);
-                *ecc++ = 0xc2 ^ ((val2 >> 8) & 0xFF);
-                *ecc++ = 0x97 ^ (val2 & 0xFF);
-                *ecc++ = 0x79 ^ ((val1 >> 24) & 0xFF);
-                *ecc++ = 0xe5 ^ ((val1 >> 16) & 0xFF);
-                *ecc++ = 0x24 ^ ((val1 >> 8) & 0xFF);
-                *ecc++ = 0xb5 ^ (val1 & 0xFF);
-        }
-        gpmc_ecc_used = -EINVAL;
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch8);
-#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/mach-omap2/gpmc.h
index 2e6e2597178c..79f4dfc2adb3 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/mach-omap2/gpmc.h
@@ -11,6 +11,8 @@
 #ifndef __OMAP2_GPMC_H
 #define __OMAP2_GPMC_H
+#include <linux/platform_data/mtd-nand-omap2.h>
 /* Maximum Number of Chip Selects */
 #define GPMC_CS_NUM             8
@@ -32,15 +34,6 @@
 #define GPMC_SET_IRQ_STATUS     0x00000004
 #define GPMC_CONFIG_WP          0x00000005
-#define GPMC_GET_IRQ_STATUS     0x00000006
-#define GPMC_PREFETCH_FIFO_CNT  0x00000007 /* bytes available in FIFO for r/w */
-#define GPMC_PREFETCH_COUNT     0x00000008 /* remaining bytes to be read/write*/
-#define GPMC_STATUS_BUFFER      0x00000009 /* 1: buffer is available to write */
-#define GPMC_NAND_COMMAND       0x0000000a
-#define GPMC_NAND_ADDRESS       0x0000000b
-#define GPMC_NAND_DATA          0x0000000c
 #define GPMC_ENABLE_IRQ         0x0000000d
 /* ECC commands */
@@ -76,25 +69,10 @@
 #define GPMC_DEVICETYPE_NOR             0
 #define GPMC_DEVICETYPE_NAND            2
 #define GPMC_CONFIG_WRITEPROTECT        0x00000010
-#define GPMC_STATUS_BUFF_EMPTY          0x00000001
 #define WR_RD_PIN_MONITORING            0x00600000
-#define GPMC_PREFETCH_STATUS_FIFO_CNT(val)      ((val >> 24) & 0x7F)
-#define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
 #define GPMC_IRQ_FIFOEVENTENABLE        0x01
 #define GPMC_IRQ_COUNT_EVENT            0x02
-#define PREFETCH_FIFOTHRESHOLD_MAX      0x40
-#define PREFETCH_FIFOTHRESHOLD(val)     ((val) << 8)
-enum omap_ecc {
-                /* 1-bit ecc: stored at end of spare area */
-        OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
-        OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
-                /* 1-bit ecc: stored at beginning of spare area as romcode */
-        OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
-        OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
-        OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
-};
 /*
 * Note that all values in this struct are in nanoseconds except sync_clk
@@ -133,22 +111,6 @@ struct gpmc_timings {
        u16 wr_data_mux_bus;    /* WRDATAONADMUXBUS */
 };
-struct gpmc_nand_regs {
-        void __iomem    *gpmc_status;
-        void __iomem    *gpmc_nand_command;
-        void __iomem    *gpmc_nand_address;
-        void __iomem    *gpmc_nand_data;
-        void __iomem    *gpmc_prefetch_config1;
-        void __iomem    *gpmc_prefetch_config2;
-        void __iomem    *gpmc_prefetch_control;
-        void __iomem    *gpmc_prefetch_status;
-        void __iomem    *gpmc_ecc_config;
-        void __iomem    *gpmc_ecc_control;
-        void __iomem    *gpmc_ecc_size_config;
-        void __iomem    *gpmc_ecc1_result;
-        void __iomem    *gpmc_bch_result0;
-};
 extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
 extern int gpmc_get_client_irq(unsigned irq_config);
@@ -160,31 +122,14 @@ extern unsigned long gpmc_get_fclk_period(void);
 extern void gpmc_cs_write_reg(int cs, int idx, u32 val);
 extern u32 gpmc_cs_read_reg(int cs, int idx);
-extern int gpmc_cs_calc_divider(int cs, unsigned int sync_clk);
+extern int gpmc_calc_divider(unsigned int sync_clk);
 extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t);
 extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
 extern void gpmc_cs_free(int cs);
 extern int gpmc_cs_set_reserved(int cs, int reserved);
 extern int gpmc_cs_reserved(int cs);
-extern int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
-                                        unsigned int u32_count, int is_write);
-extern int gpmc_prefetch_reset(int cs);
 extern void omap3_gpmc_save_context(void);
 extern void omap3_gpmc_restore_context(void);
-extern int gpmc_read_status(int cmd);
 extern int gpmc_cs_configure(int cs, int cmd, int wval);
-extern int gpmc_nand_read(int cs, int cmd);
-extern int gpmc_nand_write(int cs, int cmd, int wval);
-int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size);
-int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code);
-#ifdef CONFIG_ARCH_OMAP3
-int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors);
-int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors,
-                          int nerrors);
-int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc);
-int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc);
-#endif /* CONFIG_ARCH_OMAP3 */
 #endif
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 4d3a6324155f..ec6c2230cb38 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -17,11 +17,11 @@
 #include <mach/hardware.h>
 #include <linux/platform_data/gpio-omap.h>
-#include <plat/mmc.h>
 #include <plat/omap-pm.h>
 #include <plat/omap_device.h>
 #include "mux.h"
+#include "mmc.h"
 #include "hsmmc.h"
 #include "control.h"
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index ab82dbe92e02..f71e51bfbe2a 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -30,7 +30,7 @@
 #include <plat/omap-pm.h>
 #include <plat/omap_hwmod.h>
 #include <plat/multi.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include "soc.h"
 #include "iomap.h"
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 37f8f948047b..b2c7f2300759 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -20,7 +20,7 @@
 #include <linux/slab.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/omap_device.h>
 #include <linux/pm_runtime.h>
diff --git a/arch/arm/mach-omap2/mmc.h b/arch/arm/mach-omap2/mmc.h
new file mode 100644
index 000000000000..0cd4b089da9c
--- /dev/null
+++ b/arch/arm/mach-omap2/mmc.h
@@ -0,0 +1,23 @@
+#include <linux/mmc/host.h>
+#include <linux/platform_data/mmc-omap.h>
+#define OMAP24XX_NR_MMC         2
+#define OMAP2420_MMC_SIZE       OMAP1_MMC_SIZE
+#define OMAP2_MMC1_BASE         0x4809c000
+#define OMAP4_MMC_REG_OFFSET    0x100
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
+void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
+#else
+static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
+{
+}
+#endif
+struct omap_hwmod;
+int omap_msdi_reset(struct omap_hwmod *oh);
+/* called from board-specific card detection service routine */
+extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
+                                        int is_closed);
diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c
index 9e57b4aadb06..a6020d750431 100644
--- a/arch/arm/mach-omap2/msdi.c
+++ b/arch/arm/mach-omap2/msdi.c
@@ -27,11 +27,11 @@
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
-#include <plat/mmc.h>
 #include "common.h"
 #include "control.h"
 #include "mux.h"
+#include "mmc.h"
 /*
 * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index e1f289748c5d..de89d382f52c 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -27,12 +27,12 @@
 #include <plat/sram.h>
 #include <plat/omap-secure.h>
-#include <plat/mmc.h>
 #include "omap-wakeupgen.h"
 #include "soc.h"
 #include "common.h"
+#include "mmc.h"
 #include "hsmmc.h"
 #include "omap4-sar-layout.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index b5db6007c523..80bbbee57649 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -15,18 +15,18 @@
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <plat/omap_hwmod.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/serial.h>
 #include <plat/i2c.h>
 #include <plat/dmtimer.h>
 #include "l3_2xxx.h"
 #include "l4_2xxx.h"
-#include <plat/mmc.h>
 #include "omap_hwmod_common_data.h"
 #include "cm-regbits-24xx.h"
 #include "prm-regbits-24xx.h"
+#include "mmc.h"
 #include "wd_timer.h"
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index c455e41b0237..dff04f948a2f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -16,11 +16,11 @@
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <plat/omap_hwmod.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/serial.h>
 #include <plat/i2c.h>
 #include <plat/dmtimer.h>
-#include <plat/mmc.h>
+#include "mmc.h"
 #include "l3_2xxx.h"
 #include "soc.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index 8851bbb6bb24..2420097d29f5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -11,11 +11,12 @@
 */
 #include <plat/omap_hwmod.h>
 #include <plat/serial.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/common.h>
 #include "hdq1w.h"
 #include "omap_hwmod_common_data.h"
+#include "dma.h"
 /* UART */
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index bd9220ed5ab9..b9024868774c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -11,7 +11,7 @@
 #include <plat/omap_hwmod.h>
 #include <plat/serial.h>
 #include <linux/platform_data/gpio-omap.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/dmtimer.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 59d5c1cd316d..44a661882a7e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -18,8 +18,6 @@
 #include <plat/cpu.h>
 #include <linux/platform_data/gpio-omap.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
-#include <plat/dma.h>
-#include <plat/mmc.h>
 #include <plat/i2c.h>
 #include "omap_hwmod_common_data.h"
@@ -28,6 +26,7 @@
 #include "cm33xx.h"
 #include "prm33xx.h"
 #include "prm-regbits-33xx.h"
+#include "mmc.h"
 /*
 * IP blocks
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index f67b7ee07dd4..2aaf3ce80626 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -18,12 +18,11 @@
 #include <linux/platform_data/gpio-omap.h>
 #include <plat/omap_hwmod.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/serial.h>
 #include "l3_3xxx.h"
 #include "l4_3xxx.h"
 #include <plat/i2c.h>
-#include <plat/mmc.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <plat/dmtimer.h>
@@ -35,6 +34,9 @@
 #include "omap_hwmod_common_data.h"
 #include "prm-regbits-34xx.h"
 #include "cm-regbits-34xx.h"
+#include "dma.h"
+#include "mmc.h"
 #include "wd_timer.h"
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 652d0285bd6d..f47a57fa1f3a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -24,10 +24,9 @@
 #include <plat/omap_hwmod.h>
 #include <plat/i2c.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
-#include <plat/mmc.h>
 #include <plat/dmtimer.h>
 #include <plat/common.h>
 #include <plat/iommu.h>
@@ -37,6 +36,7 @@
 #include "cm2_44xx.h"
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
+#include "mmc.h"
 #include "wd_timer.h"
 /* Base offset for all OMAP4 interrupts external to MPUSS */
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 8af6cd6ac331..601a49bc264c 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -38,7 +38,7 @@
 #include <plat/clock.h>
 #include <plat/sram.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include "common.h"
 #include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ee0bffc614be..bbe15cb1b874 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -39,12 +39,12 @@
 #include "clockdomain.h"
 #include "powerdomain.h"
 #include <plat/prcm.h>
-#include <plat/gpmc.h>
+#include <plat-omap/dma-omap.h>
-#include <plat/dma.h>
 #include "common.h"
 #include "cm2xxx_3xxx.h"
 #include "cm-regbits-34xx.h"
+#include "gpmc.h"
 #include "prm-regbits-34xx.h"
 #include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0405c8190803..67c41961fa42 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -29,7 +29,7 @@
 #include <plat/omap-serial.h>
 #include "common.h"
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
 #include <plat/omap-pm.h>
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index 805bea6edf17..6064425ed47b 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -18,7 +18,7 @@
 #include <linux/usb/musb.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "mux.h"
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 111315a69354..b388e87b522b 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -19,7 +19,7 @@
 #include <plat/common.h>
 #include <plat/vram.h>
 #include <linux/platform_data/dsp-omap.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/omap-secure.h>
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c76ed8bff838..b729623f2967 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -37,7 +37,7 @@
 #include <linux/delay.h>
 #include <plat/cpu.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/tc.h>
 /*
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat-omap/dma-omap.h
index 0a87b052f8f7..222be7e934e5 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat-omap/dma-omap.h
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/plat-omap/include/mach/dma.h
+ *  OMAP DMA handling defines and function
 *
 *  Copyright (C) 2003 Nokia Corporation
 *  Author: Juha Yrjölä <juha.yrjola@nokia.com>
@@ -23,187 +23,8 @@
 #include <linux/platform_device.h>
-/*
- * TODO: These dma channel defines should go away once all
- * the omap drivers hwmod adapted.
- */
-/* Move omap4 specific defines to dma-44xx.h */
-#include "dma-44xx.h"
 #define INT_DMA_LCD                     25
-/* DMA channels for omap1 */
-#define OMAP_DMA_NO_DEVICE              0
-#define OMAP_DMA_MCSI1_TX               1
-#define OMAP_DMA_MCSI1_RX               2
-#define OMAP_DMA_I2C_RX                 3
-#define OMAP_DMA_I2C_TX                 4
-#define OMAP_DMA_EXT_NDMA_REQ           5
-#define OMAP_DMA_EXT_NDMA_REQ2          6
-#define OMAP_DMA_UWIRE_TX               7
-#define OMAP_DMA_MCBSP1_TX              8
-#define OMAP_DMA_MCBSP1_RX              9
-#define OMAP_DMA_MCBSP3_TX              10
-#define OMAP_DMA_MCBSP3_RX              11
-#define OMAP_DMA_UART1_TX               12
-#define OMAP_DMA_UART1_RX               13
-#define OMAP_DMA_UART2_TX               14
-#define OMAP_DMA_UART2_RX               15
-#define OMAP_DMA_MCBSP2_TX              16
-#define OMAP_DMA_MCBSP2_RX              17
-#define OMAP_DMA_UART3_TX               18
-#define OMAP_DMA_UART3_RX               19
-#define OMAP_DMA_CAMERA_IF_RX           20
-#define OMAP_DMA_MMC_TX                 21
-#define OMAP_DMA_MMC_RX                 22
-#define OMAP_DMA_NAND                   23
-#define OMAP_DMA_IRQ_LCD_LINE           24
-#define OMAP_DMA_MEMORY_STICK           25
-#define OMAP_DMA_USB_W2FC_RX0           26
-#define OMAP_DMA_USB_W2FC_RX1           27
-#define OMAP_DMA_USB_W2FC_RX2           28
-#define OMAP_DMA_USB_W2FC_TX0           29
-#define OMAP_DMA_USB_W2FC_TX1           30
-#define OMAP_DMA_USB_W2FC_TX2           31
-/* These are only for 1610 */
-#define OMAP_DMA_CRYPTO_DES_IN          32
-#define OMAP_DMA_SPI_TX                 33
-#define OMAP_DMA_SPI_RX                 34
-#define OMAP_DMA_CRYPTO_HASH            35
-#define OMAP_DMA_CCP_ATTN               36
-#define OMAP_DMA_CCP_FIFO_NOT_EMPTY     37
-#define OMAP_DMA_CMT_APE_TX_CHAN_0      38
-#define OMAP_DMA_CMT_APE_RV_CHAN_0      39
-#define OMAP_DMA_CMT_APE_TX_CHAN_1      40
-#define OMAP_DMA_CMT_APE_RV_CHAN_1      41
-#define OMAP_DMA_CMT_APE_TX_CHAN_2      42
-#define OMAP_DMA_CMT_APE_RV_CHAN_2      43
-#define OMAP_DMA_CMT_APE_TX_CHAN_3      44
-#define OMAP_DMA_CMT_APE_RV_CHAN_3      45
-#define OMAP_DMA_CMT_APE_TX_CHAN_4      46
-#define OMAP_DMA_CMT_APE_RV_CHAN_4      47
-#define OMAP_DMA_CMT_APE_TX_CHAN_5      48
-#define OMAP_DMA_CMT_APE_RV_CHAN_5      49
-#define OMAP_DMA_CMT_APE_TX_CHAN_6      50
-#define OMAP_DMA_CMT_APE_RV_CHAN_6      51
-#define OMAP_DMA_CMT_APE_TX_CHAN_7      52
-#define OMAP_DMA_CMT_APE_RV_CHAN_7      53
-#define OMAP_DMA_MMC2_TX                54
-#define OMAP_DMA_MMC2_RX                55
-#define OMAP_DMA_CRYPTO_DES_OUT         56
-/* DMA channels for 24xx */
-#define OMAP24XX_DMA_NO_DEVICE          0
-#define OMAP24XX_DMA_XTI_DMA            1       /* S_DMA_0 */
-#define OMAP24XX_DMA_EXT_DMAREQ0        2       /* S_DMA_1 */
-#define OMAP24XX_DMA_EXT_DMAREQ1        3       /* S_DMA_2 */
-#define OMAP24XX_DMA_GPMC               4       /* S_DMA_3 */
-#define OMAP24XX_DMA_GFX                5       /* S_DMA_4 */
-#define OMAP24XX_DMA_DSS                6       /* S_DMA_5 */
-#define OMAP242X_DMA_VLYNQ_TX           7       /* S_DMA_6 */
-#define OMAP24XX_DMA_EXT_DMAREQ2        7       /* S_DMA_6 */
-#define OMAP24XX_DMA_CWT                8       /* S_DMA_7 */
-#define OMAP24XX_DMA_AES_TX             9       /* S_DMA_8 */
-#define OMAP24XX_DMA_AES_RX             10      /* S_DMA_9 */
-#define OMAP24XX_DMA_DES_TX             11      /* S_DMA_10 */
-#define OMAP24XX_DMA_DES_RX             12      /* S_DMA_11 */
-#define OMAP24XX_DMA_SHA1MD5_RX         13      /* S_DMA_12 */
-#define OMAP34XX_DMA_SHA2MD5_RX         13      /* S_DMA_12 */
-#define OMAP242X_DMA_EXT_DMAREQ2        14      /* S_DMA_13 */
-#define OMAP242X_DMA_EXT_DMAREQ3        15      /* S_DMA_14 */
-#define OMAP242X_DMA_EXT_DMAREQ4        16      /* S_DMA_15 */
-#define OMAP242X_DMA_EAC_AC_RD          17      /* S_DMA_16 */
-#define OMAP242X_DMA_EAC_AC_WR          18      /* S_DMA_17 */
-#define OMAP242X_DMA_EAC_MD_UL_RD       19      /* S_DMA_18 */
-#define OMAP242X_DMA_EAC_MD_UL_WR       20      /* S_DMA_19 */
-#define OMAP242X_DMA_EAC_MD_DL_RD       21      /* S_DMA_20 */
-#define OMAP242X_DMA_EAC_MD_DL_WR       22      /* S_DMA_21 */
-#define OMAP242X_DMA_EAC_BT_UL_RD       23      /* S_DMA_22 */
-#define OMAP242X_DMA_EAC_BT_UL_WR       24      /* S_DMA_23 */
-#define OMAP242X_DMA_EAC_BT_DL_RD       25      /* S_DMA_24 */
-#define OMAP242X_DMA_EAC_BT_DL_WR       26      /* S_DMA_25 */
-#define OMAP243X_DMA_EXT_DMAREQ3        14      /* S_DMA_13 */
-#define OMAP24XX_DMA_SPI3_TX0           15      /* S_DMA_14 */
-#define OMAP24XX_DMA_SPI3_RX0           16      /* S_DMA_15 */
-#define OMAP24XX_DMA_MCBSP3_TX          17      /* S_DMA_16 */
-#define OMAP24XX_DMA_MCBSP3_RX          18      /* S_DMA_17 */
-#define OMAP24XX_DMA_MCBSP4_TX          19      /* S_DMA_18 */
-#define OMAP24XX_DMA_MCBSP4_RX          20      /* S_DMA_19 */
-#define OMAP24XX_DMA_MCBSP5_TX          21      /* S_DMA_20 */
-#define OMAP24XX_DMA_MCBSP5_RX          22      /* S_DMA_21 */
-#define OMAP24XX_DMA_SPI3_TX1           23      /* S_DMA_22 */
-#define OMAP24XX_DMA_SPI3_RX1           24      /* S_DMA_23 */
-#define OMAP243X_DMA_EXT_DMAREQ4        25      /* S_DMA_24 */
-#define OMAP243X_DMA_EXT_DMAREQ5        26      /* S_DMA_25 */
-#define OMAP34XX_DMA_I2C3_TX            25      /* S_DMA_24 */
-#define OMAP34XX_DMA_I2C3_RX            26      /* S_DMA_25 */
-#define OMAP24XX_DMA_I2C1_TX            27      /* S_DMA_26 */
-#define OMAP24XX_DMA_I2C1_RX            28      /* S_DMA_27 */
-#define OMAP24XX_DMA_I2C2_TX            29      /* S_DMA_28 */
-#define OMAP24XX_DMA_I2C2_RX            30      /* S_DMA_29 */
-#define OMAP24XX_DMA_MCBSP1_TX          31      /* S_DMA_30 */
-#define OMAP24XX_DMA_MCBSP1_RX          32      /* S_DMA_31 */
-#define OMAP24XX_DMA_MCBSP2_TX          33      /* S_DMA_32 */
-#define OMAP24XX_DMA_MCBSP2_RX          34      /* S_DMA_33 */
-#define OMAP24XX_DMA_SPI1_TX0           35      /* S_DMA_34 */
-#define OMAP24XX_DMA_SPI1_RX0           36      /* S_DMA_35 */
-#define OMAP24XX_DMA_SPI1_TX1           37      /* S_DMA_36 */
-#define OMAP24XX_DMA_SPI1_RX1           38      /* S_DMA_37 */
-#define OMAP24XX_DMA_SPI1_TX2           39      /* S_DMA_38 */
-#define OMAP24XX_DMA_SPI1_RX2           40      /* S_DMA_39 */
-#define OMAP24XX_DMA_SPI1_TX3           41      /* S_DMA_40 */
-#define OMAP24XX_DMA_SPI1_RX3           42      /* S_DMA_41 */
-#define OMAP24XX_DMA_SPI2_TX0           43      /* S_DMA_42 */
-#define OMAP24XX_DMA_SPI2_RX0           44      /* S_DMA_43 */
-#define OMAP24XX_DMA_SPI2_TX1           45      /* S_DMA_44 */
-#define OMAP24XX_DMA_SPI2_RX1           46      /* S_DMA_45 */
-#define OMAP24XX_DMA_MMC2_TX            47      /* S_DMA_46 */
-#define OMAP24XX_DMA_MMC2_RX            48      /* S_DMA_47 */
-#define OMAP24XX_DMA_UART1_TX           49      /* S_DMA_48 */
-#define OMAP24XX_DMA_UART1_RX           50      /* S_DMA_49 */
-#define OMAP24XX_DMA_UART2_TX           51      /* S_DMA_50 */
-#define OMAP24XX_DMA_UART2_RX           52      /* S_DMA_51 */
-#define OMAP24XX_DMA_UART3_TX           53      /* S_DMA_52 */
-#define OMAP24XX_DMA_UART3_RX           54      /* S_DMA_53 */
-#define OMAP24XX_DMA_USB_W2FC_TX0       55      /* S_DMA_54 */
-#define OMAP24XX_DMA_USB_W2FC_RX0       56      /* S_DMA_55 */
-#define OMAP24XX_DMA_USB_W2FC_TX1       57      /* S_DMA_56 */
-#define OMAP24XX_DMA_USB_W2FC_RX1       58      /* S_DMA_57 */
-#define OMAP24XX_DMA_USB_W2FC_TX2       59      /* S_DMA_58 */
-#define OMAP24XX_DMA_USB_W2FC_RX2       60      /* S_DMA_59 */
-#define OMAP24XX_DMA_MMC1_TX            61      /* S_DMA_60 */
-#define OMAP24XX_DMA_MMC1_RX            62      /* S_DMA_61 */
-#define OMAP24XX_DMA_MS                 63      /* S_DMA_62 */
-#define OMAP242X_DMA_EXT_DMAREQ5        64      /* S_DMA_63 */
-#define OMAP243X_DMA_EXT_DMAREQ6        64      /* S_DMA_63 */
-#define OMAP34XX_DMA_EXT_DMAREQ3        64      /* S_DMA_63 */
-#define OMAP34XX_DMA_AES2_TX            65      /* S_DMA_64 */
-#define OMAP34XX_DMA_AES2_RX            66      /* S_DMA_65 */
-#define OMAP34XX_DMA_DES2_TX            67      /* S_DMA_66 */
-#define OMAP34XX_DMA_DES2_RX            68      /* S_DMA_67 */
-#define OMAP34XX_DMA_SHA1MD5_RX         69      /* S_DMA_68 */
-#define OMAP34XX_DMA_SPI4_TX0           70      /* S_DMA_69 */
-#define OMAP34XX_DMA_SPI4_RX0           71      /* S_DMA_70 */
-#define OMAP34XX_DSS_DMA0               72      /* S_DMA_71 */
-#define OMAP34XX_DSS_DMA1               73      /* S_DMA_72 */
-#define OMAP34XX_DSS_DMA2               74      /* S_DMA_73 */
-#define OMAP34XX_DSS_DMA3               75      /* S_DMA_74 */
-#define OMAP34XX_DMA_MMC3_TX            77      /* S_DMA_76 */
-#define OMAP34XX_DMA_MMC3_RX            78      /* S_DMA_77 */
-#define OMAP34XX_DMA_USIM_TX            79      /* S_DMA_78 */
-#define OMAP34XX_DMA_USIM_RX            80      /* S_DMA_79 */
-#define OMAP36XX_DMA_UART4_TX           81      /* S_DMA_80 */
-#define OMAP36XX_DMA_UART4_RX           82      /* S_DMA_81 */
-/* Only for AM35xx */
-#define AM35XX_DMA_UART4_TX             54
-#define AM35XX_DMA_UART4_RX             55
-/*----------------------------------------------------------------------------*/
 #define OMAP1_DMA_TOUT_IRQ              (1 << 0)
 #define OMAP_DMA_DROP_IRQ               (1 << 1)
 #define OMAP_DMA_HALF_IRQ               (1 << 2)
diff --git a/arch/arm/plat-omap/include/plat/dma-44xx.h b/arch/arm/plat-omap/include/plat/dma-44xx.h
deleted file mode 100644
index 1f767cb2f38a..000000000000
--- a/arch/arm/plat-omap/include/plat/dma-44xx.h
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * OMAP4 SDMA channel definitions
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- * Copyright (C) 2009-2010 Nokia Corporation
- *
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- * Benoit Cousson (b-cousson@ti.com)
- * Paul Walmsley (paul@pwsan.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
-#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
-#define OMAP44XX_DMA_SYS_REQ0                   2
-#define OMAP44XX_DMA_SYS_REQ1                   3
-#define OMAP44XX_DMA_GPMC                       4
-#define OMAP44XX_DMA_DSS_DISPC_REQ              6
-#define OMAP44XX_DMA_SYS_REQ2                   7
-#define OMAP44XX_DMA_MCASP1_AXEVT               8
-#define OMAP44XX_DMA_ISS_REQ1                   9
-#define OMAP44XX_DMA_ISS_REQ2                   10
-#define OMAP44XX_DMA_MCASP1_AREVT               11
-#define OMAP44XX_DMA_ISS_REQ3                   12
-#define OMAP44XX_DMA_ISS_REQ4                   13
-#define OMAP44XX_DMA_DSS_RFBI_REQ               14
-#define OMAP44XX_DMA_SPI3_TX0                   15
-#define OMAP44XX_DMA_SPI3_RX0                   16
-#define OMAP44XX_DMA_MCBSP2_TX                  17
-#define OMAP44XX_DMA_MCBSP2_RX                  18
-#define OMAP44XX_DMA_MCBSP3_TX                  19
-#define OMAP44XX_DMA_MCBSP3_RX                  20
-#define OMAP44XX_DMA_C2C_SSCM_GPO0              21
-#define OMAP44XX_DMA_C2C_SSCM_GPO1              22
-#define OMAP44XX_DMA_SPI3_TX1                   23
-#define OMAP44XX_DMA_SPI3_RX1                   24
-#define OMAP44XX_DMA_I2C3_TX                    25
-#define OMAP44XX_DMA_I2C3_RX                    26
-#define OMAP44XX_DMA_I2C1_TX                    27
-#define OMAP44XX_DMA_I2C1_RX                    28
-#define OMAP44XX_DMA_I2C2_TX                    29
-#define OMAP44XX_DMA_I2C2_RX                    30
-#define OMAP44XX_DMA_MCBSP4_TX                  31
-#define OMAP44XX_DMA_MCBSP4_RX                  32
-#define OMAP44XX_DMA_MCBSP1_TX                  33
-#define OMAP44XX_DMA_MCBSP1_RX                  34
-#define OMAP44XX_DMA_SPI1_TX0                   35
-#define OMAP44XX_DMA_SPI1_RX0                   36
-#define OMAP44XX_DMA_SPI1_TX1                   37
-#define OMAP44XX_DMA_SPI1_RX1                   38
-#define OMAP44XX_DMA_SPI1_TX2                   39
-#define OMAP44XX_DMA_SPI1_RX2                   40
-#define OMAP44XX_DMA_SPI1_TX3                   41
-#define OMAP44XX_DMA_SPI1_RX3                   42
-#define OMAP44XX_DMA_SPI2_TX0                   43
-#define OMAP44XX_DMA_SPI2_RX0                   44
-#define OMAP44XX_DMA_SPI2_TX1                   45
-#define OMAP44XX_DMA_SPI2_RX1                   46
-#define OMAP44XX_DMA_MMC2_TX                    47
-#define OMAP44XX_DMA_MMC2_RX                    48
-#define OMAP44XX_DMA_UART1_TX                   49
-#define OMAP44XX_DMA_UART1_RX                   50
-#define OMAP44XX_DMA_UART2_TX                   51
-#define OMAP44XX_DMA_UART2_RX                   52
-#define OMAP44XX_DMA_UART3_TX                   53
-#define OMAP44XX_DMA_UART3_RX                   54
-#define OMAP44XX_DMA_UART4_TX                   55
-#define OMAP44XX_DMA_UART4_RX                   56
-#define OMAP44XX_DMA_MMC4_TX                    57
-#define OMAP44XX_DMA_MMC4_RX                    58
-#define OMAP44XX_DMA_MMC5_TX                    59
-#define OMAP44XX_DMA_MMC5_RX                    60
-#define OMAP44XX_DMA_MMC1_TX                    61
-#define OMAP44XX_DMA_MMC1_RX                    62
-#define OMAP44XX_DMA_SYS_REQ3                   64
-#define OMAP44XX_DMA_MCPDM_UP                   65
-#define OMAP44XX_DMA_MCPDM_DL                   66
-#define OMAP44XX_DMA_DMIC_REQ                   67
-#define OMAP44XX_DMA_C2C_SSCM_GPO2              68
-#define OMAP44XX_DMA_C2C_SSCM_GPO3              69
-#define OMAP44XX_DMA_SPI4_TX0                   70
-#define OMAP44XX_DMA_SPI4_RX0                   71
-#define OMAP44XX_DMA_DSS_DSI1_REQ0              72
-#define OMAP44XX_DMA_DSS_DSI1_REQ1              73
-#define OMAP44XX_DMA_DSS_DSI1_REQ2              74
-#define OMAP44XX_DMA_DSS_DSI1_REQ3              75
-#define OMAP44XX_DMA_DSS_HDMI_REQ               76
-#define OMAP44XX_DMA_MMC3_TX                    77
-#define OMAP44XX_DMA_MMC3_RX                    78
-#define OMAP44XX_DMA_USIM_TX                    79
-#define OMAP44XX_DMA_USIM_RX                    80
-#define OMAP44XX_DMA_DSS_DSI2_REQ0              81
-#define OMAP44XX_DMA_DSS_DSI2_REQ1              82
-#define OMAP44XX_DMA_DSS_DSI2_REQ2              83
-#define OMAP44XX_DMA_DSS_DSI2_REQ3              84
-#define OMAP44XX_DMA_SLIMBUS1_TX0               85
-#define OMAP44XX_DMA_SLIMBUS1_TX1               86
-#define OMAP44XX_DMA_SLIMBUS1_TX2               87
-#define OMAP44XX_DMA_SLIMBUS1_TX3               88
-#define OMAP44XX_DMA_SLIMBUS1_RX0               89
-#define OMAP44XX_DMA_SLIMBUS1_RX1               90
-#define OMAP44XX_DMA_SLIMBUS1_RX2               91
-#define OMAP44XX_DMA_SLIMBUS1_RX3               92
-#define OMAP44XX_DMA_SLIMBUS2_TX0               93
-#define OMAP44XX_DMA_SLIMBUS2_TX1               94
-#define OMAP44XX_DMA_SLIMBUS2_TX2               95
-#define OMAP44XX_DMA_SLIMBUS2_TX3               96
-#define OMAP44XX_DMA_SLIMBUS2_RX0               97
-#define OMAP44XX_DMA_SLIMBUS2_RX1               98
-#define OMAP44XX_DMA_SLIMBUS2_RX2               99
-#define OMAP44XX_DMA_SLIMBUS2_RX3               100
-#define OMAP44XX_DMA_ABE_REQ_0                  101
-#define OMAP44XX_DMA_ABE_REQ_1                  102
-#define OMAP44XX_DMA_ABE_REQ_2                  103
-#define OMAP44XX_DMA_ABE_REQ_3                  104
-#define OMAP44XX_DMA_ABE_REQ_4                  105
-#define OMAP44XX_DMA_ABE_REQ_5                  106
-#define OMAP44XX_DMA_ABE_REQ_6                  107
-#define OMAP44XX_DMA_ABE_REQ_7                  108
-#define OMAP44XX_DMA_AES1_P_CTX_IN_REQ          109
-#define OMAP44XX_DMA_AES1_P_DATA_IN_REQ         110
-#define OMAP44XX_DMA_AES1_P_DATA_OUT_REQ        111
-#define OMAP44XX_DMA_AES2_P_CTX_IN_REQ          112
-#define OMAP44XX_DMA_AES2_P_DATA_IN_REQ         113
-#define OMAP44XX_DMA_AES2_P_DATA_OUT_REQ        114
-#define OMAP44XX_DMA_DES_P_CTX_IN_REQ           115
-#define OMAP44XX_DMA_DES_P_DATA_IN_REQ          116
-#define OMAP44XX_DMA_DES_P_DATA_OUT_REQ         117
-#define OMAP44XX_DMA_SHA2_CTXIN_P               118
-#define OMAP44XX_DMA_SHA2_DIN_P                 119
-#define OMAP44XX_DMA_SHA2_CTXOUT_P              120
-#define OMAP44XX_DMA_AES1_P_CONTEXT_OUT_REQ     121
-#define OMAP44XX_DMA_AES2_P_CONTEXT_OUT_REQ     122
-#define OMAP44XX_DMA_I2C4_TX                    124
-#define OMAP44XX_DMA_I2C4_RX                    125
-#endif
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index a5effd813abd..45e467dcc8c8 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -27,8 +27,6 @@
 #include <asm/io.h>
-#include <plat/cpu.h>
 #define RNG_OUT_REG             0x00            /* Output register */
 #define RNG_STAT_REG            0x04            /* Status register
                                                        [0] = STAT_BUSY */
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 093a8af59cbe..649a146e1382 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -29,8 +29,7 @@
 #include <crypto/scatterwalk.h>
 #include <crypto/aes.h>
-#include <plat/cpu.h>
+#include <plat-omap/dma-omap.h>
-#include <plat/dma.h>
 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
   number. For example 7:0 */
@@ -941,11 +940,6 @@ static int __init omap_aes_mod_init(void)
 {
        pr_info("loading %s driver\n", "omap-aes");
-        if (!cpu_class_is_omap2() || omap_type() != OMAP2_DEVICE_TYPE_SEC) {
-                pr_err("Unsupported cpu\n");
-                return -ENODEV;
-        }
        return  platform_driver_register(&omap_aes_driver);
 }
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index a3fd6fc504b1..d76fe06b9417 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c
@@ -37,8 +37,7 @@
 #include <crypto/hash.h>
 #include <crypto/internal/hash.h>
-#include <plat/cpu.h>
+#include <plat-omap/dma-omap.h>
-#include <plat/dma.h>
 #include <mach/irqs.h>
 #define SHA_REG_DIGEST(x)               (0x00 + ((x) * 0x04))
@@ -1289,13 +1288,6 @@ static int __init omap_sham_mod_init(void)
 {
        pr_info("loading %s driver\n", "omap-sham");
-        if (!cpu_class_is_omap2() ||
-                (omap_type() != OMAP2_DEVICE_TYPE_SEC &&
-                        omap_type() != OMAP2_DEVICE_TYPE_EMU)) {
-                pr_err("Unsupported cpu\n");
-                return -ENODEV;
-        }
        return platform_driver_register(&omap_sham_driver);
 }
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index bb2d8e7029eb..56d925312a5c 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -19,8 +19,13 @@
 #include "virt-dma.h"
-#include <plat/cpu.h>
+#include <plat-omap/dma-omap.h>
-#include <plat/dma.h>
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#define dma_omap2plus() 1
+#else
+#define dma_omap2plus() 0
+#endif
 struct omap_dmadev {
        struct dma_device ddev;
@@ -438,7 +443,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
                omap_disable_dma_irq(c->dma_ch, OMAP_DMA_BLOCK_IRQ);
        }
-        if (!cpu_class_is_omap1()) {
+        if (dma_omap2plus()) {
                omap_set_dma_src_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
                omap_set_dma_dest_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
        }
diff --git a/drivers/media/platform/omap/omap_vout.c b/drivers/media/platform/omap/omap_vout.c
index 3ff94a30fde4..4b1becc86e54 100644
--- a/drivers/media/platform/omap/omap_vout.c
+++ b/drivers/media/platform/omap/omap_vout.c
@@ -45,7 +45,7 @@
 #include <media/v4l2-ioctl.h>
 #include <plat/cpu.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <video/omapvrfb.h>
 #include <video/omapdss.h>
diff --git a/drivers/media/platform/omap/omap_vout_vrfb.c b/drivers/media/platform/omap/omap_vout_vrfb.c
index 6c37f9240ddf..8340445a0ee5 100644
--- a/drivers/media/platform/omap/omap_vout_vrfb.c
+++ b/drivers/media/platform/omap/omap_vout_vrfb.c
@@ -16,12 +16,14 @@
 #include <media/videobuf-dma-contig.h>
 #include <media/v4l2-device.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <video/omapvrfb.h>
 #include "omap_voutdef.h"
 #include "omap_voutlib.h"
+#define OMAP_DMA_NO_DEVICE      0
 /*
 * Function for allocating video buffers
 */
diff --git a/drivers/media/platform/omap3isp/isphist.c b/drivers/media/platform/omap3isp/isphist.c
index d1a8dee5e1ca..e7f9c4292cc6 100644
--- a/drivers/media/platform/omap3isp/isphist.c
+++ b/drivers/media/platform/omap3isp/isphist.c
@@ -34,6 +34,8 @@
 #include "ispreg.h"
 #include "isphist.h"
+#define OMAP24XX_DMA_NO_DEVICE          0
 #define HIST_CONFIG_DMA 1
 #define HIST_USING_DMA(hist) ((hist)->dma_ch >= 0)
diff --git a/drivers/media/platform/omap3isp/ispstat.h b/drivers/media/platform/omap3isp/ispstat.h
index a6fe653eb237..40f87cdd7994 100644
--- a/drivers/media/platform/omap3isp/ispstat.h
+++ b/drivers/media/platform/omap3isp/ispstat.h
@@ -30,7 +30,7 @@
 #include <linux/types.h>
 #include <linux/omap3isp.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <media/v4l2-event.h>
 #include "isp.h"
diff --git a/drivers/media/platform/soc_camera/omap1_camera.c b/drivers/media/platform/soc_camera/omap1_camera.c
index fa08c7695ccb..cae9ce6275e9 100644
--- a/drivers/media/platform/soc_camera/omap1_camera.c
+++ b/drivers/media/platform/soc_camera/omap1_camera.c
@@ -34,12 +34,13 @@
 #include <media/videobuf-dma-contig.h>
 #include <media/videobuf-dma-sg.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #define DRIVER_NAME             "omap1-camera"
 #define DRIVER_VERSION          "0.0.2"
+#define OMAP_DMA_CAMERA_IF_RX           20
 /*
 * ---------------------------------------------------------------------------
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 48ad361613ef..ae115c01283b 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -28,9 +28,8 @@
 #include <linux/clk.h>
 #include <linux/scatterlist.h>
 #include <linux/slab.h>
+#include <linux/platform_data/mmc-omap.h>
-#include <plat/mmc.h>
-#include <plat/dma.h>
 #define OMAP_MMC_REG_CMD        0x00
 #define OMAP_MMC_REG_ARGL       0x01
@@ -72,6 +71,13 @@
 #define OMAP_MMC_STAT_CARD_BUSY         (1 <<  2)
 #define OMAP_MMC_STAT_END_OF_CMD        (1 <<  0)
+#define mmc_omap7xx()   (host->features & MMC_OMAP7XX)
+#define mmc_omap15xx()  (host->features & MMC_OMAP15XX)
+#define mmc_omap16xx()  (host->features & MMC_OMAP16XX)
+#define MMC_OMAP1_MASK  (MMC_OMAP7XX | MMC_OMAP15XX | MMC_OMAP16XX)
+#define mmc_omap1()     (host->features & MMC_OMAP1_MASK)
+#define mmc_omap2()     (!mmc_omap1())
 #define OMAP_MMC_REG(host, reg)         (OMAP_MMC_REG_##reg << (host)->reg_shift)
 #define OMAP_MMC_READ(host, reg)        __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg))
 #define OMAP_MMC_WRITE(host, reg, val)  __raw_writew((val), (host)->virt_base + OMAP_MMC_REG(host, reg))
@@ -84,6 +90,16 @@
 #define OMAP_MMC_CMDTYPE_AC     2
 #define OMAP_MMC_CMDTYPE_ADTC   3
+#define OMAP_DMA_MMC_TX         21
+#define OMAP_DMA_MMC_RX         22
+#define OMAP_DMA_MMC2_TX        54
+#define OMAP_DMA_MMC2_RX        55
+#define OMAP24XX_DMA_MMC2_TX    47
+#define OMAP24XX_DMA_MMC2_RX    48
+#define OMAP24XX_DMA_MMC1_TX    61
+#define OMAP24XX_DMA_MMC1_RX    62
 #define DRIVER_NAME "mmci-omap"
@@ -147,6 +163,7 @@ struct mmc_omap_host {
        u32                     buffer_bytes_left;
        u32                     total_bytes_left;
+        unsigned                features;
        unsigned                use_dma:1;
        unsigned                brs_received:1, dma_done:1;
        unsigned                dma_in_use:1;
@@ -988,7 +1005,7 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
                 * blocksize is at least that large. Blocksize is
                 * usually 512 bytes; but not for some SD reads.
                 */
-                burst = cpu_is_omap15xx() ? 32 : 64;
+                burst = mmc_omap15xx() ? 32 : 64;
                if (burst > data->blksz)
                        burst = data->blksz;
@@ -1104,8 +1121,7 @@ static void mmc_omap_set_power(struct mmc_omap_slot *slot, int power_on,
        if (slot->pdata->set_power != NULL)
                slot->pdata->set_power(mmc_dev(slot->mmc), slot->id, power_on,
                                        vdd);
+        if (mmc_omap2()) {
-        if (cpu_is_omap24xx()) {
                u16 w;
                if (power_on) {
@@ -1239,7 +1255,7 @@ static int __devinit mmc_omap_new_slot(struct mmc_omap_host *host, int id)
        mmc->ops = &mmc_omap_ops;
        mmc->f_min = 400000;
-        if (cpu_class_is_omap2())
+        if (mmc_omap2())
                mmc->f_max = 48000000;
        else
                mmc->f_max = 24000000;
@@ -1359,6 +1375,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
        init_waitqueue_head(&host->slot_wq);
        host->pdata = pdata;
+        host->features = host->pdata->slots[0].features;
        host->dev = &pdev->dev;
        platform_set_drvdata(pdev, host);
@@ -1391,7 +1408,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
        host->dma_tx_burst = -1;
        host->dma_rx_burst = -1;
-        if (cpu_is_omap24xx())
+        if (mmc_omap2())
                sig = host->id == 0 ? OMAP24XX_DMA_MMC1_TX : OMAP24XX_DMA_MMC2_TX;
        else
                sig = host->id == 0 ? OMAP_DMA_MMC_TX : OMAP_DMA_MMC2_TX;
@@ -1407,7 +1424,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
                dev_warn(host->dev, "unable to obtain TX DMA engine channel %u\n",
                        sig);
 #endif
-        if (cpu_is_omap24xx())
+        if (mmc_omap2())
                sig = host->id == 0 ? OMAP24XX_DMA_MMC1_RX : OMAP24XX_DMA_MMC2_RX;
        else
                sig = host->id == 0 ? OMAP_DMA_MMC_RX : OMAP_DMA_MMC2_RX;
@@ -1435,7 +1452,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
        }
        host->nr_slots = pdata->nr_slots;
-        host->reg_shift = (cpu_is_omap7xx() ? 1 : 2);
+        host->reg_shift = (mmc_omap7xx() ? 1 : 2);
        host->mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0);
        if (!host->mmc_omap_wq)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 54bfd0cc106b..9b24bd46aad3 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -38,9 +38,7 @@
 #include <linux/gpio.h>
 #include <linux/regulator/consumer.h>
 #include <linux/pm_runtime.h>
-#include <mach/hardware.h>
+#include <linux/platform_data/mmc-omap.h>
-#include <plat/mmc.h>
-#include <plat/cpu.h>
 /* OMAP HSMMC Host Controller Registers */
 #define OMAP_HSMMC_SYSSTATUS    0x0014
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b3138620646..5c8978e90240 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -27,8 +27,7 @@
 #include <linux/bch.h>
 #endif
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
-#include <plat/gpmc.h>
 #include <linux/platform_data/mtd-nand-omap2.h>
 #define DRIVER_NAME     "omap2-nand"
@@ -106,10 +105,18 @@
 #define CS_MASK                         0x7
 #define ENABLE_PREFETCH                 (0x1 << 7)
 #define DMA_MPU_MODE_SHIFT              2
+#define ECCSIZE0_SHIFT                  12
 #define ECCSIZE1_SHIFT                  22
 #define ECC1RESULTSIZE                  0x1
 #define ECCCLEAR                        0x100
 #define ECC1                            0x1
+#define PREFETCH_FIFOTHRESHOLD_MAX      0x40
+#define PREFETCH_FIFOTHRESHOLD(val)     ((val) << 8)
+#define PREFETCH_STATUS_COUNT(val)      (val & 0x00003fff)
+#define PREFETCH_STATUS_FIFO_CNT(val)   ((val >> 24) & 0x7F)
+#define STATUS_BUFF_EMPTY               0x00000001
+#define OMAP24XX_DMA_GPMC               4
 /* oob info generated runtime depending on ecc algorithm and layout selected */
 static struct nand_ecclayout omap_oobinfo;
@@ -269,7 +276,7 @@ static void omap_write_buf8(struct mtd_info *mtd, const u_char *buf, int len)
                /* wait until buffer is available for write */
                do {
                        status = readl(info->reg.gpmc_status) &
-                                        GPMC_STATUS_BUFF_EMPTY;
+                                        STATUS_BUFF_EMPTY;
                } while (!status);
        }
 }
@@ -307,7 +314,7 @@ static void omap_write_buf16(struct mtd_info *mtd, const u_char * buf, int len)
                /* wait until buffer is available for write */
                do {
                        status = readl(info->reg.gpmc_status) &
-                                        GPMC_STATUS_BUFF_EMPTY;
+                                        STATUS_BUFF_EMPTY;
                } while (!status);
        }
 }
@@ -348,7 +355,7 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
        } else {
                do {
                        r_count = readl(info->reg.gpmc_prefetch_status);
-                        r_count = GPMC_PREFETCH_STATUS_FIFO_CNT(r_count);
+                        r_count = PREFETCH_STATUS_FIFO_CNT(r_count);
                        r_count = r_count >> 2;
                        ioread32_rep(info->nand.IO_ADDR_R, p, r_count);
                        p += r_count;
@@ -395,7 +402,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
        } else {
                while (len) {
                        w_count = readl(info->reg.gpmc_prefetch_status);
-                        w_count = GPMC_PREFETCH_STATUS_FIFO_CNT(w_count);
+                        w_count = PREFETCH_STATUS_FIFO_CNT(w_count);
                        w_count = w_count >> 1;
                        for (i = 0; (i < w_count) && len; i++, len -= 2)
                                iowrite16(*p++, info->nand.IO_ADDR_W);
@@ -407,7 +414,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
                do {
                        cpu_relax();
                        val = readl(info->reg.gpmc_prefetch_status);
-                        val = GPMC_PREFETCH_STATUS_COUNT(val);
+                        val = PREFETCH_STATUS_COUNT(val);
                } while (val && (tim++ < limit));
                /* disable and stop the PFPW engine */
@@ -493,7 +500,7 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
        do {
                cpu_relax();
                val = readl(info->reg.gpmc_prefetch_status);
-                val = GPMC_PREFETCH_STATUS_COUNT(val);
+                val = PREFETCH_STATUS_COUNT(val);
        } while (val && (tim++ < limit));
        /* disable and stop the PFPW engine */
@@ -556,7 +563,7 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev)
        u32 bytes;
        bytes = readl(info->reg.gpmc_prefetch_status);
-        bytes = GPMC_PREFETCH_STATUS_FIFO_CNT(bytes);
+        bytes = PREFETCH_STATUS_FIFO_CNT(bytes);
        bytes = bytes  & 0xFFFC; /* io in multiple of 4 bytes */
        if (info->iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */
                if (this_irq == info->gpmc_irq_count)
@@ -682,7 +689,7 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd,
        limit = (loops_per_jiffy *  msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
        do {
                val = readl(info->reg.gpmc_prefetch_status);
-                val = GPMC_PREFETCH_STATUS_COUNT(val);
+                val = PREFETCH_STATUS_COUNT(val);
                cpu_relax();
        } while (val && (tim++ < limit));
@@ -996,7 +1003,7 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)
                cond_resched();
        }
-        status = gpmc_nand_read(info->gpmc_cs, GPMC_NAND_DATA);
+        status = readb(info->reg.gpmc_nand_data);
        return status;
 }
@@ -1029,19 +1036,45 @@ static int omap_dev_ready(struct mtd_info *mtd)
 static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
 {
        int nerrors;
-        unsigned int dev_width;
+        unsigned int dev_width, nsectors;
        struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
                                                   mtd);
        struct nand_chip *chip = mtd->priv;
+        u32 val;
        nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4;
        dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
+        nsectors = 1;
        /*
         * Program GPMC to perform correction on one 512-byte sector at a time.
         * Using 4 sectors at a time (i.e. ecc.size = 2048) is also possible and
         * gives a slight (5%) performance gain (but requires additional code).
         */
-        (void)gpmc_enable_hwecc_bch(info->gpmc_cs, mode, dev_width, 1, nerrors);
+        writel(ECC1, info->reg.gpmc_ecc_control);
+        /*
+         * When using BCH, sector size is hardcoded to 512 bytes.
+         * Here we are using wrapping mode 6 both for reading and writing, with:
+         *  size0 = 0  (no additional protected byte in spare area)
+         *  size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
+         */
+        val = (32 << ECCSIZE1_SHIFT) | (0 << ECCSIZE0_SHIFT);
+        writel(val, info->reg.gpmc_ecc_size_config);
+        /* BCH configuration */
+        val = ((1                        << 16) | /* enable BCH */
+               (((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */
+               (0x06                     <<  8) | /* wrap mode = 6 */
+               (dev_width                <<  7) | /* bus width */
+               (((nsectors-1) & 0x7)     <<  4) | /* number of sectors */
+               (info->gpmc_cs            <<  1) | /* ECC CS */
+               (0x1));                            /* enable ECC */
+        writel(val, info->reg.gpmc_ecc_config);
+        /* clear ecc and enable bits */
+        writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
 }
 /**
@@ -1055,7 +1088,32 @@ static int omap3_calculate_ecc_bch4(struct mtd_info *mtd, const u_char *dat,
 {
        struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
                                                   mtd);
-        return gpmc_calculate_ecc_bch4(info->gpmc_cs, dat, ecc_code);
+        unsigned long nsectors, val1, val2;
+        int i;
+        nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
+        for (i = 0; i < nsectors; i++) {
+                /* Read hw-computed remainder */
+                val1 = readl(info->reg.gpmc_bch_result0[i]);
+                val2 = readl(info->reg.gpmc_bch_result1[i]);
+                /*
+                 * Add constant polynomial to remainder, in order to get an ecc
+                 * sequence of 0xFFs for a buffer filled with 0xFFs; and
+                 * left-justify the resulting polynomial.
+                 */
+                *ecc_code++ = 0x28 ^ ((val2 >> 12) & 0xFF);
+                *ecc_code++ = 0x13 ^ ((val2 >>  4) & 0xFF);
+                *ecc_code++ = 0xcc ^ (((val2 & 0xF) << 4)|((val1 >> 28) & 0xF));
+                *ecc_code++ = 0x39 ^ ((val1 >> 20) & 0xFF);
+                *ecc_code++ = 0x96 ^ ((val1 >> 12) & 0xFF);
+                *ecc_code++ = 0xac ^ ((val1 >> 4) & 0xFF);
+                *ecc_code++ = 0x7f ^ ((val1 & 0xF) << 4);
+        }
+        return 0;
 }
 /**
@@ -1069,7 +1127,39 @@ static int omap3_calculate_ecc_bch8(struct mtd_info *mtd, const u_char *dat,
 {
        struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
                                                   mtd);
-        return gpmc_calculate_ecc_bch8(info->gpmc_cs, dat, ecc_code);
+        unsigned long nsectors, val1, val2, val3, val4;
+        int i;
+        nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
+        for (i = 0; i < nsectors; i++) {
+                /* Read hw-computed remainder */
+                val1 = readl(info->reg.gpmc_bch_result0[i]);
+                val2 = readl(info->reg.gpmc_bch_result1[i]);
+                val3 = readl(info->reg.gpmc_bch_result2[i]);
+                val4 = readl(info->reg.gpmc_bch_result3[i]);
+                /*
+                 * Add constant polynomial to remainder, in order to get an ecc
+                 * sequence of 0xFFs for a buffer filled with 0xFFs.
+                 */
+                *ecc_code++ = 0xef ^ (val4 & 0xFF);
+                *ecc_code++ = 0x51 ^ ((val3 >> 24) & 0xFF);
+                *ecc_code++ = 0x2e ^ ((val3 >> 16) & 0xFF);
+                *ecc_code++ = 0x09 ^ ((val3 >> 8) & 0xFF);
+                *ecc_code++ = 0xed ^ (val3 & 0xFF);
+                *ecc_code++ = 0x93 ^ ((val2 >> 24) & 0xFF);
+                *ecc_code++ = 0x9a ^ ((val2 >> 16) & 0xFF);
+                *ecc_code++ = 0xc2 ^ ((val2 >> 8) & 0xFF);
+                *ecc_code++ = 0x97 ^ (val2 & 0xFF);
+                *ecc_code++ = 0x79 ^ ((val1 >> 24) & 0xFF);
+                *ecc_code++ = 0xe5 ^ ((val1 >> 16) & 0xFF);
+                *ecc_code++ = 0x24 ^ ((val1 >> 8) & 0xFF);
+                *ecc_code++ = 0xb5 ^ (val1 & 0xFF);
+        }
+        return 0;
 }
 /**
@@ -1125,7 +1215,7 @@ static void omap3_free_bch(struct mtd_info *mtd)
 */
 static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
 {
-        int ret, max_errors;
+        int max_errors;
        struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
                                                   mtd);
 #ifdef CONFIG_MTD_NAND_OMAP_BCH8
@@ -1142,11 +1232,6 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
                goto fail;
        }
-        /* initialize GPMC BCH engine */
-        ret = gpmc_init_hwecc_bch(info->gpmc_cs, 1, max_errors);
-        if (ret)
-                goto fail;
        /* software bch library is only used to detect and locate errors */
        info->bch = init_bch(13, max_errors, 0x201b /* hw polynomial */);
        if (!info->bch)
@@ -1513,7 +1598,7 @@ static int omap_nand_remove(struct platform_device *pdev)
        /* Release NAND device, its internal structures and partitions */
        nand_release(&info->mtd);
        iounmap(info->nand.IO_ADDR_R);
-        release_mem_region(info->phys_base, NAND_IO_SIZE);
+        release_mem_region(info->phys_base, info->mem_size);
        kfree(info);
        return 0;
 }
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 1961be985171..53069aef1f48 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -38,12 +38,10 @@
 #include <linux/regulator/consumer.h>
 #include <asm/mach/flash.h>
-#include <plat/gpmc.h>
 #include <linux/platform_data/mtd-onenand-omap2.h>
 #include <asm/gpio.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
-#include <plat/cpu.h>
 #define DRIVER_NAME "omap2-onenand"
@@ -63,6 +61,7 @@ struct omap2_onenand {
        int freq;
        int (*setup)(void __iomem *base, int *freq_ptr);
        struct regulator *regulator;
+        u8 flags;
 };
 static void omap2_onenand_dma_cb(int lch, u16 ch_status, void *data)
@@ -155,7 +154,7 @@ static int omap2_onenand_wait(struct mtd_info *mtd, int state)
                if (!(syscfg & ONENAND_SYS_CFG1_IOBE)) {
                        syscfg |= ONENAND_SYS_CFG1_IOBE;
                        write_reg(c, syscfg, ONENAND_REG_SYS_CFG1);
-                        if (cpu_is_omap34xx())
+                        if (c->flags & ONENAND_IN_OMAP34XX)
                                /* Add a delay to let GPIO settle */
                                syscfg = read_reg(c, ONENAND_REG_SYS_CFG1);
                }
@@ -639,6 +638,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
        init_completion(&c->irq_done);
        init_completion(&c->dma_done);
+        c->flags = pdata->flags;
        c->gpmc_cs = pdata->cs;
        c->gpio_irq = pdata->gpio_irq;
        c->dma_channel = pdata->dma_channel;
@@ -729,7 +729,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
        this = &c->onenand;
        if (c->dma_channel >= 0) {
                this->wait = omap2_onenand_wait;
-                if (cpu_is_omap34xx()) {
+                if (c->flags & ONENAND_IN_OMAP34XX) {
                        this->read_bufferram = omap3_onenand_read_bufferram;
                        this->write_bufferram = omap3_onenand_write_bufferram;
                } else {
@@ -803,7 +803,6 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
        }
        iounmap(c->onenand.base);
        release_mem_region(c->phys_base, c->mem_size);
-        gpmc_cs_free(c->gpmc_cs);
        kfree(c);
        return 0;
diff --git a/drivers/staging/tidspbridge/include/dspbridge/host_os.h b/drivers/staging/tidspbridge/include/dspbridge/host_os.h
index ed00d3da3205..896f1579d5d7 100644
--- a/drivers/staging/tidspbridge/include/dspbridge/host_os.h
+++ b/drivers/staging/tidspbridge/include/dspbridge/host_os.h
@@ -40,7 +40,6 @@
 #include <linux/vmalloc.h>
 #include <linux/ioport.h>
 #include <linux/platform_device.h>
-#include <plat/clock.h>
 #include <linux/clk.h>
 #include <plat/mailbox.h>
 #include <linux/pagemap.h>
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index 2a4749c3eb3f..23afa06b65a4 100644
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -44,7 +44,7 @@
 #include <asm/unaligned.h>
 #include <asm/mach-types.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/usb.h>
@@ -61,6 +61,8 @@
 #define DRIVER_DESC     "OMAP UDC driver"
 #define DRIVER_VERSION  "4 October 2004"
+#define OMAP_DMA_USB_W2FC_TX0           29
 /*
 * The OMAP UDC needs _very_ early endpoint setup:  before enabling the
 * D+ pullup to allow enumeration.  That's too early for the gadget
diff --git a/drivers/usb/musb/tusb6010_omap.c b/drivers/usb/musb/tusb6010_omap.c
index 7a62b95dac24..bfca114f7c56 100644
--- a/drivers/usb/musb/tusb6010_omap.c
+++ b/drivers/usb/musb/tusb6010_omap.c
@@ -16,7 +16,7 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/slab.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include "musb_core.h"
 #include "tusb6010.h"
@@ -25,6 +25,13 @@
 #define MAX_DMAREQ              5       /* REVISIT: Really 6, but req5 not OK */
+#define OMAP24XX_DMA_EXT_DMAREQ0        2
+#define OMAP24XX_DMA_EXT_DMAREQ1        3
+#define OMAP242X_DMA_EXT_DMAREQ2        14
+#define OMAP242X_DMA_EXT_DMAREQ3        15
+#define OMAP242X_DMA_EXT_DMAREQ4        16
+#define OMAP242X_DMA_EXT_DMAREQ5        64
 struct tusb_omap_dma_ch {
        struct musb             *musb;
        void __iomem            *tbase;
diff --git a/drivers/video/omap/lcdc.c b/drivers/video/omap/lcdc.c
index 7767338f8b14..c39d6e46f8c5 100644
--- a/drivers/video/omap/lcdc.c
+++ b/drivers/video/omap/lcdc.c
@@ -31,7 +31,7 @@
 #include <linux/gfp.h>
 #include <mach/lcdc.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <asm/mach-types.h>
diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
index 4351c438b76f..1b5ee8ec192a 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -30,7 +30,7 @@
 #include <linux/uaccess.h>
 #include <linux/module.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include "omapfb.h"
 #include "lcdc.h"
diff --git a/drivers/video/omap/sossi.c b/drivers/video/omap/sossi.c
index f79c137753d7..c510a4457398 100644
--- a/drivers/video/omap/sossi.c
+++ b/drivers/video/omap/sossi.c
@@ -25,7 +25,7 @@
 #include <linux/io.h>
 #include <linux/interrupt.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include "omapfb.h"
 #include "lcdc.h"
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/include/linux/platform_data/mmc-omap.h
index 8b4e4f2da2f5..2bf6ea82ff94 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/include/linux/platform_data/mmc-omap.h
@@ -8,27 +8,6 @@
 * published by the Free Software Foundation.
 */
-#ifndef __OMAP2_MMC_H
-#define __OMAP2_MMC_H
-#include <linux/types.h>
-#include <linux/device.h>
-#include <linux/mmc/host.h>
-#include <plat/omap_hwmod.h>
-#define OMAP15XX_NR_MMC         1
-#define OMAP16XX_NR_MMC         2
-#define OMAP1_MMC_SIZE          0x080
-#define OMAP1_MMC1_BASE         0xfffb7800
-#define OMAP1_MMC2_BASE         0xfffb7c00      /* omap16xx only */
-#define OMAP24XX_NR_MMC         2
-#define OMAP2420_MMC_SIZE       OMAP1_MMC_SIZE
-#define OMAP2_MMC1_BASE         0x4809c000
-#define OMAP4_MMC_REG_OFFSET    0x100
 #define OMAP_MMC_MAX_SLOTS      2
 /*
@@ -50,6 +29,8 @@
 #define OMAP_HSMMC_SUPPORTS_DUAL_VOLT           BIT(0)
 #define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ       BIT(1)
+struct mmc_card;
 struct omap_mmc_dev_attr {
        u8 flags;
 };
@@ -126,6 +107,9 @@ struct omap_mmc_platform_data {
                /* we can put the features above into this variable */
 #define HSMMC_HAS_PBIAS         (1 << 0)
 #define HSMMC_HAS_UPDATED_RESET (1 << 1)
+#define MMC_OMAP7XX             (1 << 2)
+#define MMC_OMAP15XX            (1 << 3)
+#define MMC_OMAP16XX            (1 << 4)
                unsigned features;
                int switch_pin;                 /* gpio (card detect) */
@@ -164,25 +148,3 @@ struct omap_mmc_platform_data {
        } slots[OMAP_MMC_MAX_SLOTS];
 };
-/* called from board-specific card detection service routine */
-extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
-                                        int is_closed);
-#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
-void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
-                                int nr_controllers);
-void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
-#else
-static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
-                                int nr_controllers)
-{
-}
-static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
-{
-}
-#endif
-extern int omap_msdi_reset(struct omap_hwmod *oh);
-#endif
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index 1a68c1e5fe53..24d32ca34bef 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -8,9 +8,13 @@
 * published by the Free Software Foundation.
 */
-#include <plat/gpmc.h>
+#ifndef _MTD_NAND_OMAP2_H
+#define _MTD_NAND_OMAP2_H
 #include <linux/mtd/partitions.h>
+#define GPMC_BCH_NUM_REMAINDER  8
 enum nand_io {
        NAND_OMAP_PREFETCH_POLLED = 0,  /* prefetch polled mode, default */
        NAND_OMAP_POLLED,               /* polled mode, without prefetch */
@@ -18,10 +22,38 @@ enum nand_io {
        NAND_OMAP_PREFETCH_IRQ          /* prefetch enabled irq mode */
 };
+enum omap_ecc {
+                /* 1-bit ecc: stored at end of spare area */
+        OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
+        OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
+                /* 1-bit ecc: stored at beginning of spare area as romcode */
+        OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
+        OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
+        OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
+};
+struct gpmc_nand_regs {
+        void __iomem    *gpmc_status;
+        void __iomem    *gpmc_nand_command;
+        void __iomem    *gpmc_nand_address;
+        void __iomem    *gpmc_nand_data;
+        void __iomem    *gpmc_prefetch_config1;
+        void __iomem    *gpmc_prefetch_config2;
+        void __iomem    *gpmc_prefetch_control;
+        void __iomem    *gpmc_prefetch_status;
+        void __iomem    *gpmc_ecc_config;
+        void __iomem    *gpmc_ecc_control;
+        void __iomem    *gpmc_ecc_size_config;
+        void __iomem    *gpmc_ecc1_result;
+        void __iomem    *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER];
+        void __iomem    *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
+        void __iomem    *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
+        void __iomem    *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
+};
 struct omap_nand_platform_data {
        int                     cs;
        struct mtd_partition    *parts;
-        struct gpmc_timings     *gpmc_t;
        int                     nr_parts;
        bool                    dev_ready;
        enum nand_io            xfer_type;
@@ -30,14 +62,4 @@ struct omap_nand_platform_data {
        struct gpmc_nand_regs   reg;
 };
-/* minimum size for IO mapping */
-#define NAND_IO_SIZE    4
-#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
-extern int gpmc_nand_init(struct omap_nand_platform_data *d);
-#else
-static inline int gpmc_nand_init(struct omap_nand_platform_data *d)
-{
-        return 0;
-}
 #endif
diff --git a/include/linux/platform_data/mtd-onenand-omap2.h b/include/linux/platform_data/mtd-onenand-omap2.h
index 2858667d2e4f..685af7e8b120 100644
--- a/include/linux/platform_data/mtd-onenand-omap2.h
+++ b/include/linux/platform_data/mtd-onenand-omap2.h
@@ -9,17 +9,15 @@
 * published by the Free Software Foundation.
 */
+#ifndef __MTD_ONENAND_OMAP2_H
+#define __MTD_ONENAND_OMAP2_H
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #define ONENAND_SYNC_READ       (1 << 0)
 #define ONENAND_SYNC_READWRITE  (1 << 1)
+#define ONENAND_IN_OMAP34XX     (1 << 2)
-struct onenand_freq_info {
-        u16                     maf_id;
-        u16                     dev_id;
-        u16                     ver_id;
-};
 struct omap_onenand_platform_data {
        int                     cs;
@@ -27,27 +25,9 @@ struct omap_onenand_platform_data {
        struct mtd_partition    *parts;
        int                     nr_parts;
        int                     (*onenand_setup)(void __iomem *, int *freq_ptr);
-        int             (*get_freq)(const struct onenand_freq_info *freq_info,
-                                    bool *clk_dep);
        int                     dma_channel;
        u8                      flags;
        u8                      regulator_can_sleep;
        u8                      skip_initial_unlocking;
 };
-#define ONENAND_MAX_PARTITIONS 8
-#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
-        defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
-extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
-#else
-#define board_onenand_data      NULL
-static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
-{
-}
 #endif
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c
index 340874ebf9ae..52977aa30355 100644
--- a/sound/soc/omap/omap-pcm.c
+++ b/sound/soc/omap/omap-pcm.c
@@ -32,9 +32,14 @@
 #include <sound/dmaengine_pcm.h>
 #include <sound/soc.h>
-#include <plat/cpu.h>
 #include "omap-pcm.h"
+#ifdef CONFIG_ARCH_OMAP1
+#define pcm_omap1510()  cpu_is_omap1510()
+#else
+#define pcm_omap1510()  0
+#endif
 static const struct snd_pcm_hardware omap_pcm_hardware = {
        .info                   = SNDRV_PCM_INFO_MMAP |
                                  SNDRV_PCM_INFO_MMAP_VALID |
@@ -159,7 +164,7 @@ static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream)
 {
        snd_pcm_uframes_t offset;
-        if (cpu_is_omap1510())
+        if (pcm_omap1510())
                offset = snd_dmaengine_pcm_pointer_no_residue(substream);
        else
                offset = snd_dmaengine_pcm_pointer(substream);