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-rw-r--r--arch/arm/configs/mx51_defconfig3
-rw-r--r--arch/arm/configs/mxs_defconfig2
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c29
-rw-r--r--arch/arm/mach-imx/mach-mx31_3ds.c10
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c4
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxsfb.c1
-rw-r--r--arch/arm/mach-mxs/mach-tx28.c8
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-dma.c14
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-ssi.c2
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx53.h14
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-v1.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-v3.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/mx53.h26
-rw-r--r--arch/arm/plat-mxc/iomux-v1.c34
-rw-r--r--drivers/dma/imx-dma.c3
-rw-r--r--drivers/mmc/host/mxcmmc.c8
-rw-r--r--sound/soc/imx/imx-pcm-dma-mx2.c4
17 files changed, 73 insertions, 92 deletions
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
index 0ace16cba9b5..88c5802a2351 100644
--- a/arch/arm/configs/mx51_defconfig
+++ b/arch/arm/configs/mx51_defconfig
@@ -106,6 +106,7 @@ CONFIG_GPIO_SYSFS=y
106CONFIG_USB=y 106CONFIG_USB=y
107CONFIG_USB_EHCI_HCD=y 107CONFIG_USB_EHCI_HCD=y
108CONFIG_USB_EHCI_MXC=y 108CONFIG_USB_EHCI_MXC=y
109CONFIG_USB_STORAGE=y
109CONFIG_MMC=y 110CONFIG_MMC=y
110CONFIG_MMC_BLOCK=m 111CONFIG_MMC_BLOCK=m
111CONFIG_MMC_SDHCI=m 112CONFIG_MMC_SDHCI=m
@@ -145,7 +146,7 @@ CONFIG_ROOT_NFS=y
145CONFIG_NLS_DEFAULT="cp437" 146CONFIG_NLS_DEFAULT="cp437"
146CONFIG_NLS_CODEPAGE_437=y 147CONFIG_NLS_CODEPAGE_437=y
147CONFIG_NLS_ASCII=y 148CONFIG_NLS_ASCII=y
148CONFIG_NLS_ISO8859_1=m 149CONFIG_NLS_ISO8859_1=y
149CONFIG_NLS_ISO8859_15=m 150CONFIG_NLS_ISO8859_15=m
150CONFIG_NLS_UTF8=y 151CONFIG_NLS_UTF8=y
151CONFIG_MAGIC_SYSRQ=y 152CONFIG_MAGIC_SYSRQ=y
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index 2bf224310fb4..5a6ff7c605df 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -89,7 +89,7 @@ CONFIG_DISPLAY_SUPPORT=m
89# CONFIG_USB_SUPPORT is not set 89# CONFIG_USB_SUPPORT is not set
90CONFIG_MMC=y 90CONFIG_MMC=y
91CONFIG_MMC_MXS=y 91CONFIG_MMC_MXS=y
92CONFIG_RTC_CLASS=m 92CONFIG_RTC_CLASS=y
93CONFIG_RTC_DRV_DS1307=m 93CONFIG_RTC_DRV_DS1307=m
94CONFIG_DMADEVICES=y 94CONFIG_DMADEVICES=y
95CONFIG_MXS_DMA=y 95CONFIG_MXS_DMA=y
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 6e1accf93f81..e7965ec176fc 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -42,10 +42,11 @@
42 42
43#include "devices-imx27.h" 43#include "devices-imx27.h"
44 44
45#define SD1_EN_GPIO (GPIO_PORTB + 25) 45#define SD1_EN_GPIO IMX_GPIO_NR(2, 25)
46#define OTG_PHY_RESET_GPIO (GPIO_PORTB + 23) 46#define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23)
47#define SPI2_SS0 (GPIO_PORTD + 21) 47#define SPI2_SS0 IMX_GPIO_NR(4, 21)
48#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTC + 28) 48#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28))
49#define PMIC_INT IMX_GPIO_NR(3, 14)
49 50
50static const int mx27pdk_pins[] __initconst = { 51static const int mx27pdk_pins[] __initconst = {
51 /* UART1 */ 52 /* UART1 */
@@ -98,9 +99,12 @@ static const int mx27pdk_pins[] __initconst = {
98 PD22_PF_CSPI2_SCLK, 99 PD22_PF_CSPI2_SCLK,
99 PD23_PF_CSPI2_MISO, 100 PD23_PF_CSPI2_MISO,
100 PD24_PF_CSPI2_MOSI, 101 PD24_PF_CSPI2_MOSI,
102 SPI2_SS0 | GPIO_GPIO | GPIO_OUT,
101 /* I2C1 */ 103 /* I2C1 */
102 PD17_PF_I2C_DATA, 104 PD17_PF_I2C_DATA,
103 PD18_PF_I2C_CLK, 105 PD18_PF_I2C_CLK,
106 /* PMIC INT */
107 PMIC_INT | GPIO_GPIO | GPIO_IN,
104}; 108};
105 109
106static const struct imxuart_platform_data uart_pdata __initconst = { 110static const struct imxuart_platform_data uart_pdata __initconst = {
@@ -193,6 +197,13 @@ static int __init mx27_3ds_otg_mode(char *options)
193__setup("otg_mode=", mx27_3ds_otg_mode); 197__setup("otg_mode=", mx27_3ds_otg_mode);
194 198
195/* Regulators */ 199/* Regulators */
200static struct regulator_init_data gpo_init = {
201 .constraints = {
202 .boot_on = 1,
203 .always_on = 1,
204 }
205};
206
196static struct regulator_consumer_supply vmmc1_consumers[] = { 207static struct regulator_consumer_supply vmmc1_consumers[] = {
197 REGULATOR_SUPPLY("lcd_2v8", NULL), 208 REGULATOR_SUPPLY("lcd_2v8", NULL),
198}; 209};
@@ -201,7 +212,9 @@ static struct regulator_init_data vmmc1_init = {
201 .constraints = { 212 .constraints = {
202 .min_uV = 2800000, 213 .min_uV = 2800000,
203 .max_uV = 2800000, 214 .max_uV = 2800000,
204 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, 215 .apply_uV = 1,
216 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
217 REGULATOR_CHANGE_STATUS,
205 }, 218 },
206 .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers), 219 .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
207 .consumer_supplies = vmmc1_consumers, 220 .consumer_supplies = vmmc1_consumers,
@@ -228,6 +241,12 @@ static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
228 }, { 241 }, {
229 .id = MC13783_REG_VGEN, 242 .id = MC13783_REG_VGEN,
230 .init_data = &vgen_init, 243 .init_data = &vgen_init,
244 }, {
245 .id = MC13783_REG_GPO1, /* Turn on 1.8V */
246 .init_data = &gpo_init,
247 }, {
248 .id = MC13783_REG_GPO3, /* Turn on 3.3V */
249 .init_data = &gpo_init,
231 }, 250 },
232}; 251};
233 252
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index 9b982449cb52..62983bd07d6a 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -53,11 +53,8 @@ static int mx31_3ds_pins[] = {
53 MX31_PIN_RXD1__RXD1, 53 MX31_PIN_RXD1__RXD1,
54 IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), 54 IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
55 /*SPI0*/ 55 /*SPI0*/
56 MX31_PIN_CSPI1_SCLK__SCLK, 56 IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_ALT1),
57 MX31_PIN_CSPI1_MOSI__MOSI, 57 IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_ALT1),
58 MX31_PIN_CSPI1_MISO__MISO,
59 MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
60 MX31_PIN_CSPI1_SS2__SS2, /* CS for LCD */
61 /* SPI 1 */ 58 /* SPI 1 */
62 MX31_PIN_CSPI2_SCLK__SCLK, 59 MX31_PIN_CSPI2_SCLK__SCLK,
63 MX31_PIN_CSPI2_MOSI__MOSI, 60 MX31_PIN_CSPI2_MOSI__MOSI,
@@ -689,6 +686,9 @@ static void __init mx31_3ds_init(void)
689{ 686{
690 int ret; 687 int ret;
691 688
689 /* Configure SPI1 IOMUX */
690 mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true);
691
692 mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins), 692 mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
693 "mx31_3ds"); 693 "mx31_3ds");
694 694
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 6b89c1bf4eb2..cea2bba06d0b 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1274,9 +1274,9 @@ DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET,
1274 1274
1275/* I2C */ 1275/* I2C */
1276DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, 1276DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,
1277 NULL, NULL, &ipg_clk, NULL); 1277 NULL, NULL, &ipg_perclk, NULL);
1278DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET, 1278DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET,
1279 NULL, NULL, &ipg_clk, NULL); 1279 NULL, NULL, &ipg_perclk, NULL);
1280DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, 1280DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET,
1281 NULL, NULL, &ipg_clk, NULL); 1281 NULL, NULL, &ipg_clk, NULL);
1282 1282
diff --git a/arch/arm/mach-mxs/devices/platform-mxsfb.c b/arch/arm/mach-mxs/devices/platform-mxsfb.c
index bf72c9b8dbdd..5a75b7180f74 100644
--- a/arch/arm/mach-mxs/devices/platform-mxsfb.c
+++ b/arch/arm/mach-mxs/devices/platform-mxsfb.c
@@ -5,6 +5,7 @@
5 * the terms of the GNU General Public License version 2 as published by the 5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation. 6 * Free Software Foundation.
7 */ 7 */
8#include <linux/dma-mapping.h>
8#include <asm/sizes.h> 9#include <asm/sizes.h>
9#include <mach/mx23.h> 10#include <mach/mx23.h>
10#include <mach/mx28.h> 11#include <mach/mx28.h>
diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c
index b65e3719cbc4..068e540efbb6 100644
--- a/arch/arm/mach-mxs/mach-tx28.c
+++ b/arch/arm/mach-mxs/mach-tx28.c
@@ -101,14 +101,6 @@ static const iomux_cfg_t tx28_stk5v3_pads[] __initconst = {
101 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), 101 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
102 MX28_PAD_SSP0_DATA3__SSP0_D3 | 102 MX28_PAD_SSP0_DATA3__SSP0_D3 |
103 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), 103 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
104 MX28_PAD_SSP0_DATA4__SSP0_D4 |
105 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
106 MX28_PAD_SSP0_DATA5__SSP0_D5 |
107 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
108 MX28_PAD_SSP0_DATA6__SSP0_D6 |
109 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
110 MX28_PAD_SSP0_DATA7__SSP0_D7 |
111 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
112 MX28_PAD_SSP0_CMD__SSP0_CMD | 104 MX28_PAD_SSP0_CMD__SSP0_CMD |
113 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), 105 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
114 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | 106 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c
index b130f60ca6b7..c64f015e031b 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-dma.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c
@@ -33,22 +33,22 @@ struct imx_imx_sdma_data {
33 33
34#ifdef CONFIG_SOC_IMX25 34#ifdef CONFIG_SOC_IMX25
35struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = 35struct imx_imx_sdma_data imx25_imx_sdma_data __initconst =
36 imx_imx_sdma_data_entry_single(MX25, 1, "imx25", 0); 36 imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 1);
37#endif /* ifdef CONFIG_SOC_IMX25 */ 37#endif /* ifdef CONFIG_SOC_IMX25 */
38 38
39#ifdef CONFIG_SOC_IMX31 39#ifdef CONFIG_SOC_IMX31
40struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = 40struct imx_imx_sdma_data imx31_imx_sdma_data __initdata =
41 imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 0); 41 imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 1);
42#endif /* ifdef CONFIG_SOC_IMX31 */ 42#endif /* ifdef CONFIG_SOC_IMX31 */
43 43
44#ifdef CONFIG_SOC_IMX35 44#ifdef CONFIG_SOC_IMX35
45struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = 45struct imx_imx_sdma_data imx35_imx_sdma_data __initdata =
46 imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0); 46 imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 1);
47#endif /* ifdef CONFIG_SOC_IMX35 */ 47#endif /* ifdef CONFIG_SOC_IMX35 */
48 48
49#ifdef CONFIG_SOC_IMX51 49#ifdef CONFIG_SOC_IMX51
50struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = 50struct imx_imx_sdma_data imx51_imx_sdma_data __initconst =
51 imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 0); 51 imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 1);
52#endif /* ifdef CONFIG_SOC_IMX51 */ 52#endif /* ifdef CONFIG_SOC_IMX51 */
53 53
54static struct platform_device __init __maybe_unused *imx_add_imx_sdma( 54static struct platform_device __init __maybe_unused *imx_add_imx_sdma(
@@ -57,7 +57,7 @@ static struct platform_device __init __maybe_unused *imx_add_imx_sdma(
57 struct resource res[] = { 57 struct resource res[] = {
58 { 58 {
59 .start = data->iobase, 59 .start = data->iobase,
60 .end = data->iobase + SZ_4K - 1, 60 .end = data->iobase + SZ_16K - 1,
61 .flags = IORESOURCE_MEM, 61 .flags = IORESOURCE_MEM,
62 }, { 62 }, {
63 .start = data->irq, 63 .start = data->irq,
@@ -77,7 +77,7 @@ static struct platform_device __init __maybe_unused *imx_add_imx_dma(void)
77} 77}
78 78
79#ifdef CONFIG_ARCH_MX25 79#ifdef CONFIG_ARCH_MX25
80static struct sdma_script_start_addrs addr_imx25_to1 = { 80static struct sdma_script_start_addrs addr_imx25 = {
81 .ap_2_ap_addr = 729, 81 .ap_2_ap_addr = 729,
82 .uart_2_mcu_addr = 904, 82 .uart_2_mcu_addr = 904,
83 .per_2_app_addr = 1255, 83 .per_2_app_addr = 1255,
@@ -165,7 +165,7 @@ static int __init imxXX_add_imx_dma(void)
165 165
166#if defined(CONFIG_SOC_IMX25) 166#if defined(CONFIG_SOC_IMX25)
167 if (cpu_is_mx25()) { 167 if (cpu_is_mx25()) {
168 imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25_to1; 168 imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25;
169 ret = imx_add_imx_sdma(&imx25_imx_sdma_data); 169 ret = imx_add_imx_sdma(&imx25_imx_sdma_data);
170 } else 170 } else
171#endif 171#endif
diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c
index 2569c8d8a2ef..66b8593e9b69 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c
@@ -69,7 +69,7 @@ const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = {
69#ifdef CONFIG_SOC_IMX51 69#ifdef CONFIG_SOC_IMX51
70const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { 70const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = {
71#define imx51_imx_ssi_data_entry(_id, _hwid) \ 71#define imx51_imx_ssi_data_entry(_id, _hwid) \
72 imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_4K) 72 imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_16K)
73 imx51_imx_ssi_data_entry(0, 1), 73 imx51_imx_ssi_data_entry(0, 1),
74 imx51_imx_ssi_data_entry(1, 2), 74 imx51_imx_ssi_data_entry(1, 2),
75 imx51_imx_ssi_data_entry(2, 3), 75 imx51_imx_ssi_data_entry(2, 3),
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
index 2c4c60fe471a..9440b9e00e89 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
@@ -39,7 +39,7 @@
39#define _MX53_PAD_GPIO_19__ECSPI1_RDY IOMUX_PAD(0x348, 0x20, 5, 0x0, 0, 0) 39#define _MX53_PAD_GPIO_19__ECSPI1_RDY IOMUX_PAD(0x348, 0x20, 5, 0x0, 0, 0)
40#define _MX53_PAD_GPIO_19__FEC_TDATA_3 IOMUX_PAD(0x348, 0x20, 6, 0x0, 0, 0) 40#define _MX53_PAD_GPIO_19__FEC_TDATA_3 IOMUX_PAD(0x348, 0x20, 6, 0x0, 0, 0)
41#define _MX53_PAD_GPIO_19__SRC_INT_BOOT IOMUX_PAD(0x348, 0x20,7, 0x0, 0, 0) 41#define _MX53_PAD_GPIO_19__SRC_INT_BOOT IOMUX_PAD(0x348, 0x20,7, 0x0, 0, 0)
42#define _MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x24, o, 0x0, 0, 0) 42#define _MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x24, 0, 0x0, 0, 0)
43#define _MX53_PAD_KEY_COL0__GPIO4_6 IOMUX_PAD(0x34C, 0x24, 1, 0x0, 0, 0) 43#define _MX53_PAD_KEY_COL0__GPIO4_6 IOMUX_PAD(0x34C, 0x24, 1, 0x0, 0, 0)
44#define _MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC IOMUX_PAD(0x34C, 0x24, 2, 0x758, 0, 0) 44#define _MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC IOMUX_PAD(0x34C, 0x24, 2, 0x758, 0, 0)
45#define _MX53_PAD_KEY_COL0__UART4_TXD_MUX IOMUX_PAD(0x34C, 0x24, 4, 0x0, 0, 0) 45#define _MX53_PAD_KEY_COL0__UART4_TXD_MUX IOMUX_PAD(0x34C, 0x24, 4, 0x0, 0, 0)
@@ -697,7 +697,7 @@
697#define _MX53_PAD_EIM_DA5__GPIO3_5 IOMUX_PAD(0x500, 0x1B0, 1, 0x0, 0, 0) 697#define _MX53_PAD_EIM_DA5__GPIO3_5 IOMUX_PAD(0x500, 0x1B0, 1, 0x0, 0, 0)
698#define _MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 IOMUX_PAD(0x500, 0x1B0, 3, 0x0, 0, 0) 698#define _MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 IOMUX_PAD(0x500, 0x1B0, 3, 0x0, 0, 0)
699#define _MX53_PAD_EIM_DA5__IPU_CSI1_D_4 IOMUX_PAD(0x500, 0x1B0, 4, 0x0, 0, 0) 699#define _MX53_PAD_EIM_DA5__IPU_CSI1_D_4 IOMUX_PAD(0x500, 0x1B0, 4, 0x0, 0, 0)
700#define _MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 17, 0x0, 0, 0) 700#define _MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 7 | IOMUX_CONFIG_SION, 0x0, 0, 0)
701#define _MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 IOMUX_PAD(0x504, 0x1B4, 0, 0x0, 0, 0) 701#define _MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 IOMUX_PAD(0x504, 0x1B4, 0, 0x0, 0, 0)
702#define _MX53_PAD_EIM_DA6__GPIO3_6 IOMUX_PAD(0x504, 0x1B4, 1, 0x0, 0, 0) 702#define _MX53_PAD_EIM_DA6__GPIO3_6 IOMUX_PAD(0x504, 0x1B4, 1, 0x0, 0, 0)
703#define _MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 IOMUX_PAD(0x504, 0x1B4, 3, 0x0, 0, 0) 703#define _MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 IOMUX_PAD(0x504, 0x1B4, 3, 0x0, 0, 0)
@@ -958,12 +958,12 @@
958#define _MX53_PAD_PATA_DATA5__ESDHC4_DAT5 IOMUX_PAD(0x63C, 0x2B8, 4, 0x0, 0, 0) 958#define _MX53_PAD_PATA_DATA5__ESDHC4_DAT5 IOMUX_PAD(0x63C, 0x2B8, 4, 0x0, 0, 0)
959#define _MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 IOMUX_PAD(0x63C, 0x2B8, 5, 0x0, 0, 0) 959#define _MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 IOMUX_PAD(0x63C, 0x2B8, 5, 0x0, 0, 0)
960#define _MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 IOMUX_PAD(0x63C, 0x2B8, 6, 0x0, 0, 0) 960#define _MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 IOMUX_PAD(0x63C, 0x2B8, 6, 0x0, 0, 0)
961#define _MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) 961#define _MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 0, 0x0, 0, 0)
962#define _MX53_PAD_PATA_DATA6__GPIO2_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) 962#define _MX53_PAD_PATA_DATA6__GPIO2_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0)
963#define _MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) 963#define _MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 3, 0x0, 0, 0)
964#define _MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) 964#define _MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 4, 0x0, 0, 0)
965#define _MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) 965#define _MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 5, 0x0, 0, 0)
966#define _MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) 966#define _MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 6, 0x0, 0, 0)
967#define _MX53_PAD_PATA_DATA7__PATA_DATA_7 IOMUX_PAD(0x644, 0x2C0, 0, 0x0, 0, 0) 967#define _MX53_PAD_PATA_DATA7__PATA_DATA_7 IOMUX_PAD(0x644, 0x2C0, 0, 0x0, 0, 0)
968#define _MX53_PAD_PATA_DATA7__GPIO2_7 IOMUX_PAD(0x644, 0x2C0, 1, 0x0, 0, 0) 968#define _MX53_PAD_PATA_DATA7__GPIO2_7 IOMUX_PAD(0x644, 0x2C0, 1, 0x0, 0, 0)
969#define _MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 IOMUX_PAD(0x644, 0x2C0, 3, 0x0, 0, 0) 969#define _MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 IOMUX_PAD(0x644, 0x2C0, 3, 0x0, 0, 0)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h
index c07d30210c57..253d64d686f8 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v1.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h
@@ -98,7 +98,6 @@
98extern int mxc_gpio_mode(int gpio_mode); 98extern int mxc_gpio_mode(int gpio_mode);
99extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, 99extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
100 const char *label); 100 const char *label);
101extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count);
102 101
103extern int __init imx_iomuxv1_init(void __iomem *base, int numports); 102extern int __init imx_iomuxv1_init(void __iomem *base, int numports);
104 103
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
index 82620af1922f..ebbce33097a7 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
@@ -66,7 +66,6 @@ typedef u64 iomux_v3_cfg_t;
66#define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) 66#define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT)
67#define MUX_PAD_CTRL_SHIFT 41 67#define MUX_PAD_CTRL_SHIFT 41
68#define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT) 68#define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT)
69#define NO_PAD_CTRL ((iomux_v3_cfg_t)1 << (MUX_PAD_CTRL_SHIFT + 16))
70#define MUX_SEL_INPUT_SHIFT 58 69#define MUX_SEL_INPUT_SHIFT 58
71#define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) 70#define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT)
72 71
@@ -85,6 +84,7 @@ typedef u64 iomux_v3_cfg_t;
85 * Use to set PAD control 84 * Use to set PAD control
86 */ 85 */
87 86
87#define NO_PAD_CTRL (1 << 16)
88#define PAD_CTL_DVS (1 << 13) 88#define PAD_CTL_DVS (1 << 13)
89#define PAD_CTL_HYS (1 << 8) 89#define PAD_CTL_HYS (1 << 8)
90 90
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h
index 9d2a1ef84de2..74cd093203e0 100644
--- a/arch/arm/plat-mxc/include/mach/mx53.h
+++ b/arch/arm/plat-mxc/include/mach/mx53.h
@@ -145,14 +145,14 @@
145/* 145/*
146 * Memory regions and CS 146 * Memory regions and CS
147 */ 147 */
148#define MX53_CSD0_BASE_ADDR 0x90000000 148#define MX53_CSD0_BASE_ADDR 0x70000000
149#define MX53_CSD1_BASE_ADDR 0xA0000000 149#define MX53_CSD1_BASE_ADDR 0xB0000000
150#define MX53_CS0_BASE_ADDR 0xB0000000 150#define MX53_CS0_BASE_ADDR 0xF0000000
151#define MX53_CS1_BASE_ADDR 0xB8000000 151#define MX53_CS1_32MB_BASE_ADDR 0xF2000000
152#define MX53_CS2_BASE_ADDR 0xC0000000 152#define MX53_CS1_64MB_BASE_ADDR 0xF4000000
153#define MX53_CS3_BASE_ADDR 0xC8000000 153#define MX53_CS2_64MB_BASE_ADDR 0xF4000000
154#define MX53_CS4_BASE_ADDR 0xCC000000 154#define MX53_CS2_96MB_BASE_ADDR 0xF6000000
155#define MX53_CS5_BASE_ADDR 0xCE000000 155#define MX53_CS3_BASE_ADDR 0xF6000000
156 156
157#define MX53_IO_P2V(x) IMX_IO_P2V(x) 157#define MX53_IO_P2V(x) IMX_IO_P2V(x)
158#define MX53_IO_ADDRESS(x) IOMEM(MX53_IO_P2V(x)) 158#define MX53_IO_ADDRESS(x) IOMEM(MX53_IO_P2V(x))
@@ -233,7 +233,7 @@
233#define MX53_INT_ESDHC2 2 233#define MX53_INT_ESDHC2 2
234#define MX53_INT_ESDHC3 3 234#define MX53_INT_ESDHC3 3
235#define MX53_INT_ESDHC4 4 235#define MX53_INT_ESDHC4 4
236#define MX53_INT_RESV5 5 236#define MX53_INT_DAP 5
237#define MX53_INT_SDMA 6 237#define MX53_INT_SDMA 6
238#define MX53_INT_IOMUX 7 238#define MX53_INT_IOMUX 7
239#define MX53_INT_NFC 8 239#define MX53_INT_NFC 8
@@ -262,8 +262,8 @@
262#define MX53_INT_UART1 31 262#define MX53_INT_UART1 31
263#define MX53_INT_UART2 32 263#define MX53_INT_UART2 32
264#define MX53_INT_UART3 33 264#define MX53_INT_UART3 33
265#define MX53_INT_RESV34 34 265#define MX53_INT_RTC 34
266#define MX53_INT_RESV35 35 266#define MX53_INT_PTP 35
267#define MX53_INT_ECSPI1 36 267#define MX53_INT_ECSPI1 36
268#define MX53_INT_ECSPI2 37 268#define MX53_INT_ECSPI2 37
269#define MX53_INT_CSPI 38 269#define MX53_INT_CSPI 38
@@ -293,8 +293,8 @@
293#define MX53_INT_I2C1 62 293#define MX53_INT_I2C1 62
294#define MX53_INT_I2C2 63 294#define MX53_INT_I2C2 63
295#define MX53_INT_I2C3 64 295#define MX53_INT_I2C3 64
296#define MX53_INT_RESV65 65 296#define MX53_INT_MLB 65
297#define MX53_INT_RESV66 66 297#define MX53_INT_ASRC 66
298#define MX53_INT_SPDIF 67 298#define MX53_INT_SPDIF 67
299#define MX53_INT_SIM_DAT 68 299#define MX53_INT_SIM_DAT 68
300#define MX53_INT_IIM 69 300#define MX53_INT_IIM 69
diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/plat-mxc/iomux-v1.c
index 3238c10d4e02..1f73963bc13e 100644
--- a/arch/arm/plat-mxc/iomux-v1.c
+++ b/arch/arm/plat-mxc/iomux-v1.c
@@ -157,7 +157,7 @@ EXPORT_SYMBOL(mxc_gpio_mode);
157static int imx_iomuxv1_setup_multiple(const int *list, unsigned count) 157static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
158{ 158{
159 size_t i; 159 size_t i;
160 int ret; 160 int ret = 0;
161 161
162 for (i = 0; i < count; ++i) { 162 for (i = 0; i < count; ++i) {
163 ret = mxc_gpio_mode(list[i]); 163 ret = mxc_gpio_mode(list[i]);
@@ -172,45 +172,13 @@ static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
172int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, 172int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
173 const char *label) 173 const char *label)
174{ 174{
175 size_t i;
176 int ret; 175 int ret;
177 176
178 for (i = 0; i < count; ++i) {
179 unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK);
180
181 ret = gpio_request(gpio, label);
182 if (ret)
183 goto err_gpio_request;
184 }
185
186 ret = imx_iomuxv1_setup_multiple(pin_list, count); 177 ret = imx_iomuxv1_setup_multiple(pin_list, count);
187 if (ret)
188 goto err_setup;
189
190 return 0;
191
192err_setup:
193 BUG_ON(i != count);
194
195err_gpio_request:
196 mxc_gpio_release_multiple_pins(pin_list, i);
197
198 return ret; 178 return ret;
199} 179}
200EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins); 180EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
201 181
202void mxc_gpio_release_multiple_pins(const int *pin_list, int count)
203{
204 size_t i;
205
206 for (i = 0; i < count; ++i) {
207 unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK);
208
209 gpio_free(gpio);
210 }
211}
212EXPORT_SYMBOL(mxc_gpio_release_multiple_pins);
213
214int __init imx_iomuxv1_init(void __iomem *base, int numports) 182int __init imx_iomuxv1_init(void __iomem *base, int numports)
215{ 183{
216 imx_iomuxv1_baseaddr = base; 184 imx_iomuxv1_baseaddr = base;
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index e18eaabe92b9..d99f71c356b5 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -135,7 +135,8 @@ static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
135 if (ret) 135 if (ret)
136 return ret; 136 return ret;
137 137
138 imx_dma_config_burstlen(imxdmac->imxdma_channel, imxdmac->watermark_level); 138 imx_dma_config_burstlen(imxdmac->imxdma_channel,
139 imxdmac->watermark_level * imxdmac->word_size);
139 140
140 return 0; 141 return 0;
141 default: 142 default:
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c
index cc20e0259325..14aa213b00da 100644
--- a/drivers/mmc/host/mxcmmc.c
+++ b/drivers/mmc/host/mxcmmc.c
@@ -715,13 +715,13 @@ static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
715 int burstlen, ret; 715 int burstlen, ret;
716 716
717 /* 717 /*
718 * use burstlen of 64 in 4 bit mode (--> reg value 0) 718 * use burstlen of 64 (16 words) in 4 bit mode (--> reg value 0)
719 * use burstlen of 16 in 1 bit mode (--> reg value 16) 719 * use burstlen of 16 (4 words) in 1 bit mode (--> reg value 16)
720 */ 720 */
721 if (ios->bus_width == MMC_BUS_WIDTH_4) 721 if (ios->bus_width == MMC_BUS_WIDTH_4)
722 burstlen = 64;
723 else
724 burstlen = 16; 722 burstlen = 16;
723 else
724 burstlen = 4;
725 725
726 if (mxcmci_use_dma(host) && burstlen != host->burstlen) { 726 if (mxcmci_use_dma(host) && burstlen != host->burstlen) {
727 host->burstlen = burstlen; 727 host->burstlen = burstlen;
diff --git a/sound/soc/imx/imx-pcm-dma-mx2.c b/sound/soc/imx/imx-pcm-dma-mx2.c
index 4173b3d87f97..43fdc24f7e8d 100644
--- a/sound/soc/imx/imx-pcm-dma-mx2.c
+++ b/sound/soc/imx/imx-pcm-dma-mx2.c
@@ -110,12 +110,12 @@ static int imx_ssi_dma_alloc(struct snd_pcm_substream *substream,
110 slave_config.direction = DMA_TO_DEVICE; 110 slave_config.direction = DMA_TO_DEVICE;
111 slave_config.dst_addr = dma_params->dma_addr; 111 slave_config.dst_addr = dma_params->dma_addr;
112 slave_config.dst_addr_width = buswidth; 112 slave_config.dst_addr_width = buswidth;
113 slave_config.dst_maxburst = dma_params->burstsize * buswidth; 113 slave_config.dst_maxburst = dma_params->burstsize;
114 } else { 114 } else {
115 slave_config.direction = DMA_FROM_DEVICE; 115 slave_config.direction = DMA_FROM_DEVICE;
116 slave_config.src_addr = dma_params->dma_addr; 116 slave_config.src_addr = dma_params->dma_addr;
117 slave_config.src_addr_width = buswidth; 117 slave_config.src_addr_width = buswidth;
118 slave_config.src_maxburst = dma_params->burstsize * buswidth; 118 slave_config.src_maxburst = dma_params->burstsize;
119 } 119 }
120 120
121 ret = dmaengine_slave_config(iprtd->dma_chan, &slave_config); 121 ret = dmaengine_slave_config(iprtd->dma_chan, &slave_config);