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-rw-r--r--drivers/char/drm/radeon_drv.h3
-rw-r--r--drivers/char/drm/radeon_state.c6
2 files changed, 7 insertions, 2 deletions
diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h
index a3190fcc34e3..f45cd7f147a5 100644
--- a/drivers/char/drm/radeon_drv.h
+++ b/drivers/char/drm/radeon_drv.h
@@ -425,6 +425,8 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp,
425#define RADEON_RB3D_COLOROFFSET 0x1c40 425#define RADEON_RB3D_COLOROFFSET 0x1c40
426#define RADEON_RB3D_COLORPITCH 0x1c48 426#define RADEON_RB3D_COLORPITCH 0x1c48
427 427
428#define RADEON_SRC_X_Y 0x1590
429
428#define RADEON_DP_GUI_MASTER_CNTL 0x146c 430#define RADEON_DP_GUI_MASTER_CNTL 0x146c
429# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) 431# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
430# define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1) 432# define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1)
@@ -442,6 +444,7 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp,
442# define RADEON_ROP3_S 0x00cc0000 444# define RADEON_ROP3_S 0x00cc0000
443# define RADEON_ROP3_P 0x00f00000 445# define RADEON_ROP3_P 0x00f00000
444#define RADEON_DP_WRITE_MASK 0x16cc 446#define RADEON_DP_WRITE_MASK 0x16cc
447#define RADEON_SRC_PITCH_OFFSET 0x1428
445#define RADEON_DST_PITCH_OFFSET 0x142c 448#define RADEON_DST_PITCH_OFFSET 0x142c
446#define RADEON_DST_PITCH_OFFSET_C 0x1c80 449#define RADEON_DST_PITCH_OFFSET_C 0x1c80
447# define RADEON_DST_TILE_LINEAR (0 << 30) 450# define RADEON_DST_TILE_LINEAR (0 << 30)
diff --git a/drivers/char/drm/radeon_state.c b/drivers/char/drm/radeon_state.c
index bb4b2e1a78c1..feac5f005d47 100644
--- a/drivers/char/drm/radeon_state.c
+++ b/drivers/char/drm/radeon_state.c
@@ -1269,9 +1269,9 @@ static void radeon_cp_dispatch_swap(drm_device_t * dev)
1269 1269
1270 DRM_DEBUG("dispatch swap %d,%d-%d,%d\n", x, y, w, h); 1270 DRM_DEBUG("dispatch swap %d,%d-%d,%d\n", x, y, w, h);
1271 1271
1272 BEGIN_RING(7); 1272 BEGIN_RING(9);
1273 1273
1274 OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT_MULTI, 5)); 1274 OUT_RING(CP_PACKET0(RADEON_DP_GUI_MASTER_CNTL, 0));
1275 OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL | 1275 OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
1276 RADEON_GMC_DST_PITCH_OFFSET_CNTL | 1276 RADEON_GMC_DST_PITCH_OFFSET_CNTL |
1277 RADEON_GMC_BRUSH_NONE | 1277 RADEON_GMC_BRUSH_NONE |
@@ -1283,6 +1283,7 @@ static void radeon_cp_dispatch_swap(drm_device_t * dev)
1283 1283
1284 /* Make this work even if front & back are flipped: 1284 /* Make this work even if front & back are flipped:
1285 */ 1285 */
1286 OUT_RING(CP_PACKET0(RADEON_SRC_PITCH_OFFSET, 1));
1286 if (dev_priv->current_page == 0) { 1287 if (dev_priv->current_page == 0) {
1287 OUT_RING(dev_priv->back_pitch_offset); 1288 OUT_RING(dev_priv->back_pitch_offset);
1288 OUT_RING(dev_priv->front_pitch_offset); 1289 OUT_RING(dev_priv->front_pitch_offset);
@@ -1291,6 +1292,7 @@ static void radeon_cp_dispatch_swap(drm_device_t * dev)
1291 OUT_RING(dev_priv->back_pitch_offset); 1292 OUT_RING(dev_priv->back_pitch_offset);
1292 } 1293 }
1293 1294
1295 OUT_RING(CP_PACKET0(RADEON_SRC_X_Y, 2));
1294 OUT_RING((x << 16) | y); 1296 OUT_RING((x << 16) | y);
1295 OUT_RING((x << 16) | y); 1297 OUT_RING((x << 16) | y);
1296 OUT_RING((w << 16) | h); 1298 OUT_RING((w << 16) | h);