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authorMark Brown <broonie@opensource.wolfsonmicro.com>2013-04-12 08:57:21 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2013-04-12 08:57:21 -0400
commitd14bc151a4f66871fd02fd9b28d8464859ca3ae2 (patch)
tree0d868863b8a00960bc1d40a495fed8759be36951 /sound/soc/tegra/tegra30_ahub.c
parent5b9fd76972836272afba57404d2662627926165b (diff)
parenta7fc5d256be9fda27bb69e872e6a212542a84230 (diff)
Merge remote-tracking branch 'asoc/topic/tegra' into asoc-next
Diffstat (limited to 'sound/soc/tegra/tegra30_ahub.c')
-rw-r--r--sound/soc/tegra/tegra30_ahub.c64
1 files changed, 47 insertions, 17 deletions
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
index 5e08f3e7e6cf..23e592f453fa 100644
--- a/sound/soc/tegra/tegra30_ahub.c
+++ b/sound/soc/tegra/tegra30_ahub.c
@@ -287,16 +287,27 @@ int tegra30_ahub_unset_rx_cif_source(enum tegra30_ahub_rxcif rxcif)
287} 287}
288EXPORT_SYMBOL_GPL(tegra30_ahub_unset_rx_cif_source); 288EXPORT_SYMBOL_GPL(tegra30_ahub_unset_rx_cif_source);
289 289
290static const char * const configlink_clocks[] = { 290#define CLK_LIST_MASK_TEGRA30 BIT(0)
291 "i2s0", 291#define CLK_LIST_MASK_TEGRA114 BIT(1)
292 "i2s1", 292
293 "i2s2", 293#define CLK_LIST_MASK_TEGRA30_OR_LATER \
294 "i2s3", 294 (CLK_LIST_MASK_TEGRA30 | CLK_LIST_MASK_TEGRA114)
295 "i2s4", 295
296 "dam0", 296static const struct {
297 "dam1", 297 const char *clk_name;
298 "dam2", 298 u32 clk_list_mask;
299 "spdif_in", 299} configlink_clocks[] = {
300 { "i2s0", CLK_LIST_MASK_TEGRA30_OR_LATER },
301 { "i2s1", CLK_LIST_MASK_TEGRA30_OR_LATER },
302 { "i2s2", CLK_LIST_MASK_TEGRA30_OR_LATER },
303 { "i2s3", CLK_LIST_MASK_TEGRA30_OR_LATER },
304 { "i2s4", CLK_LIST_MASK_TEGRA30_OR_LATER },
305 { "dam0", CLK_LIST_MASK_TEGRA30_OR_LATER },
306 { "dam1", CLK_LIST_MASK_TEGRA30_OR_LATER },
307 { "dam2", CLK_LIST_MASK_TEGRA30_OR_LATER },
308 { "spdif_in", CLK_LIST_MASK_TEGRA30_OR_LATER },
309 { "amx", CLK_LIST_MASK_TEGRA114 },
310 { "adx", CLK_LIST_MASK_TEGRA114 },
300}; 311};
301 312
302#define LAST_REG(name) \ 313#define LAST_REG(name) \
@@ -424,8 +435,24 @@ static const struct regmap_config tegra30_ahub_ahub_regmap_config = {
424 .cache_type = REGCACHE_RBTREE, 435 .cache_type = REGCACHE_RBTREE,
425}; 436};
426 437
438static struct tegra30_ahub_soc_data soc_data_tegra30 = {
439 .clk_list_mask = CLK_LIST_MASK_TEGRA30,
440};
441
442static struct tegra30_ahub_soc_data soc_data_tegra114 = {
443 .clk_list_mask = CLK_LIST_MASK_TEGRA114,
444};
445
446static const struct of_device_id tegra30_ahub_of_match[] = {
447 { .compatible = "nvidia,tegra114-ahub", .data = &soc_data_tegra114 },
448 { .compatible = "nvidia,tegra30-ahub", .data = &soc_data_tegra30 },
449 {},
450};
451
427static int tegra30_ahub_probe(struct platform_device *pdev) 452static int tegra30_ahub_probe(struct platform_device *pdev)
428{ 453{
454 const struct of_device_id *match;
455 const struct tegra30_ahub_soc_data *soc_data;
429 struct clk *clk; 456 struct clk *clk;
430 int i; 457 int i;
431 struct resource *res0, *res1, *region; 458 struct resource *res0, *res1, *region;
@@ -436,16 +463,24 @@ static int tegra30_ahub_probe(struct platform_device *pdev)
436 if (ahub) 463 if (ahub)
437 return -ENODEV; 464 return -ENODEV;
438 465
466 match = of_match_device(tegra30_ahub_of_match, &pdev->dev);
467 if (!match)
468 return -EINVAL;
469 soc_data = match->data;
470
439 /* 471 /*
440 * The AHUB hosts a register bus: the "configlink". For this to 472 * The AHUB hosts a register bus: the "configlink". For this to
441 * operate correctly, all devices on this bus must be out of reset. 473 * operate correctly, all devices on this bus must be out of reset.
442 * Ensure that here. 474 * Ensure that here.
443 */ 475 */
444 for (i = 0; i < ARRAY_SIZE(configlink_clocks); i++) { 476 for (i = 0; i < ARRAY_SIZE(configlink_clocks); i++) {
445 clk = clk_get(&pdev->dev, configlink_clocks[i]); 477 if (!(configlink_clocks[i].clk_list_mask &
478 soc_data->clk_list_mask))
479 continue;
480 clk = clk_get(&pdev->dev, configlink_clocks[i].clk_name);
446 if (IS_ERR(clk)) { 481 if (IS_ERR(clk)) {
447 dev_err(&pdev->dev, "Can't get clock %s\n", 482 dev_err(&pdev->dev, "Can't get clock %s\n",
448 configlink_clocks[i]); 483 configlink_clocks[i].clk_name);
449 ret = PTR_ERR(clk); 484 ret = PTR_ERR(clk);
450 goto err; 485 goto err;
451 } 486 }
@@ -592,11 +627,6 @@ static int tegra30_ahub_remove(struct platform_device *pdev)
592 return 0; 627 return 0;
593} 628}
594 629
595static const struct of_device_id tegra30_ahub_of_match[] = {
596 { .compatible = "nvidia,tegra30-ahub", },
597 {},
598};
599
600static const struct dev_pm_ops tegra30_ahub_pm_ops = { 630static const struct dev_pm_ops tegra30_ahub_pm_ops = {
601 SET_RUNTIME_PM_OPS(tegra30_ahub_runtime_suspend, 631 SET_RUNTIME_PM_OPS(tegra30_ahub_runtime_suspend,
602 tegra30_ahub_runtime_resume, NULL) 632 tegra30_ahub_runtime_resume, NULL)