diff options
author | Nicolin Chen <b42378@freescale.com> | 2013-08-23 07:31:52 -0400 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2014-04-16 09:01:31 -0400 |
commit | b34d7e9229f04a02592cf1424820ba8aef5a5f5c (patch) | |
tree | 4fcf7461b28963836575c28c358b482fb3f4722f /sound/soc/fsl/fsl_ssi.h | |
parent | 2df4851ae48d1b2d4e10b0f6aea0386937880af1 (diff) |
ENGR00276567-2 ASoC: fsl: Add I2S Master support for ssi
Add I2S master/PCM(DSP_A, DSP_B)/LEFT_J formats support for ssi,
also dropped the constrain of i2s-slave in probe().
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Diffstat (limited to 'sound/soc/fsl/fsl_ssi.h')
-rw-r--r-- | sound/soc/fsl/fsl_ssi.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/sound/soc/fsl/fsl_ssi.h b/sound/soc/fsl/fsl_ssi.h index e6b9a69e2a68..5ff9b1d5270d 100644 --- a/sound/soc/fsl/fsl_ssi.h +++ b/sound/soc/fsl/fsl_ssi.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Author: Timur Tabi <timur@freescale.com> | 4 | * Author: Timur Tabi <timur@freescale.com> |
5 | * | 5 | * |
6 | * Copyright 2007-2008 Freescale Semiconductor, Inc. This file is licensed | 6 | * Copyright 2007-2013 Freescale Semiconductor, Inc. This file is licensed |
7 | * under the terms of the GNU General Public License version 2. This | 7 | * under the terms of the GNU General Public License version 2. This |
8 | * program is licensed "as is" without any warranty of any kind, whether | 8 | * program is licensed "as is" without any warranty of any kind, whether |
9 | * express or implied. | 9 | * express or implied. |
@@ -125,7 +125,11 @@ struct ccsr_ssi { | |||
125 | #define CCSR_SSI_SRCR_REFS 0x00000001 | 125 | #define CCSR_SSI_SRCR_REFS 0x00000001 |
126 | 126 | ||
127 | /* STCCR and SRCCR */ | 127 | /* STCCR and SRCCR */ |
128 | #define CCSR_SSI_SxCCR_DIV2_SHIFT 18 | ||
129 | #define CCSR_SSI_SxCCR_DIV2_MASK 0x00040000 | ||
128 | #define CCSR_SSI_SxCCR_DIV2 0x00040000 | 130 | #define CCSR_SSI_SxCCR_DIV2 0x00040000 |
131 | #define CCSR_SSI_SxCCR_PSR_SHIFT 17 | ||
132 | #define CCSR_SSI_SxCCR_PSR_MASK 0x00020000 | ||
129 | #define CCSR_SSI_SxCCR_PSR 0x00020000 | 133 | #define CCSR_SSI_SxCCR_PSR 0x00020000 |
130 | #define CCSR_SSI_SxCCR_WL_SHIFT 13 | 134 | #define CCSR_SSI_SxCCR_WL_SHIFT 13 |
131 | #define CCSR_SSI_SxCCR_WL_MASK 0x0001E000 | 135 | #define CCSR_SSI_SxCCR_WL_MASK 0x0001E000 |